diff options
author | mike.travis@hpe.com <mike.travis@hpe.com> | 2017-10-12 12:32:04 -0400 |
---|---|---|
committer | Thomas Gleixner <tglx@linutronix.de> | 2017-10-16 16:50:36 -0400 |
commit | 41e7864ab5ce4ec36e89a9f55d8d9dfe19b0392c (patch) | |
tree | 6b50e8053e210a1da087c775ef910312030ee25f | |
parent | 9514ececa52e9f1436e7682e98c852d1338b699f (diff) |
x86/tsc: Drastically reduce the number of firmware bug warnings
Prior to the TSC ADJUST MSR being available, the method to set TSC's in
sync with each other naturally caused a small skew between cpu threads.
This was NOT a firmware bug at the time so introducing a whole avalanche
of alarming warning messages might cause unnecessary concern and customer
complaints. (Example: >3000 msgs in a 32 socket Skylake system.)
Simply report the warning condition, if possible do the necessary fixes,
and move on.
Signed-off-by: Mike Travis <mike.travis@hpe.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Dimitri Sivanich <dimitri.sivanich@hpe.com>
Reviewed-by: Russ Anderson <russ.anderson@hpe.com>
Reviewed-by: Peter Zijlstra <peterz@infradead.org>
Cc: Prarit Bhargava <prarit@redhat.com>
Cc: Andrew Banman <andrew.banman@hpe.com>
Cc: Bin Gao <bin.gao@linux.intel.com>
Link: https://lkml.kernel.org/r/20171012163202.175062400@stormcage.americas.sgi.com
-rw-r--r-- | arch/x86/kernel/tsc_sync.c | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/arch/x86/kernel/tsc_sync.c b/arch/x86/kernel/tsc_sync.c index 3bdb983fd11b..26ba0530a8a7 100644 --- a/arch/x86/kernel/tsc_sync.c +++ b/arch/x86/kernel/tsc_sync.c | |||
@@ -177,10 +177,9 @@ bool tsc_store_and_check_tsc_adjust(bool bootcpu) | |||
177 | * Compare the boot value and complain if it differs in the | 177 | * Compare the boot value and complain if it differs in the |
178 | * package. | 178 | * package. |
179 | */ | 179 | */ |
180 | if (bootval != ref->bootval) { | 180 | if (bootval != ref->bootval) |
181 | pr_warn(FW_BUG "TSC ADJUST differs: Reference CPU%u: %lld CPU%u: %lld\n", | 181 | printk_once(FW_BUG "TSC ADJUST differs within socket(s), fixing all errors\n"); |
182 | refcpu, ref->bootval, cpu, bootval); | 182 | |
183 | } | ||
184 | /* | 183 | /* |
185 | * The TSC_ADJUST values in a package must be the same. If the boot | 184 | * The TSC_ADJUST values in a package must be the same. If the boot |
186 | * value on this newly upcoming CPU differs from the adjustment | 185 | * value on this newly upcoming CPU differs from the adjustment |
@@ -188,8 +187,6 @@ bool tsc_store_and_check_tsc_adjust(bool bootcpu) | |||
188 | * adjusted value. | 187 | * adjusted value. |
189 | */ | 188 | */ |
190 | if (bootval != ref->adjusted) { | 189 | if (bootval != ref->adjusted) { |
191 | pr_warn("TSC ADJUST synchronize: Reference CPU%u: %lld CPU%u: %lld\n", | ||
192 | refcpu, ref->adjusted, cpu, bootval); | ||
193 | cur->adjusted = ref->adjusted; | 190 | cur->adjusted = ref->adjusted; |
194 | wrmsrl(MSR_IA32_TSC_ADJUST, ref->adjusted); | 191 | wrmsrl(MSR_IA32_TSC_ADJUST, ref->adjusted); |
195 | } | 192 | } |