diff options
author | Kishon Vijay Abraham I <kishon@ti.com> | 2017-02-15 08:18:13 -0500 |
---|---|---|
committer | Bjorn Helgaas <bhelgaas@google.com> | 2017-02-21 16:00:26 -0500 |
commit | 40f67fb2c384fe12741aa35010d62bfe8c98286c (patch) | |
tree | 98adb5d1545cc7ed8bec8c3da1e0d18d69088384 | |
parent | 19ce01cc8cbc314d73db9755715a8f6e8ad59a7f (diff) |
PCI: dwc: designware: Get device pointer at the start of dw_pcie_host_init()
No functional change. Get device pointer at the beginning of
dw_pcie_host_init() instead of getting it all over dw_pcie_host_init().
This is in preparation for splitting struct pcie_port into host and core
structures (once split pcie_port will not have device pointer).
Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
-rw-r--r-- | drivers/pci/dwc/pcie-designware.c | 33 |
1 files changed, 17 insertions, 16 deletions
diff --git a/drivers/pci/dwc/pcie-designware.c b/drivers/pci/dwc/pcie-designware.c index de143ea5f28c..6e95291d9cb4 100644 --- a/drivers/pci/dwc/pcie-designware.c +++ b/drivers/pci/dwc/pcie-designware.c | |||
@@ -446,8 +446,9 @@ static u8 dw_pcie_iatu_unroll_enabled(struct pcie_port *pp) | |||
446 | 446 | ||
447 | int dw_pcie_host_init(struct pcie_port *pp) | 447 | int dw_pcie_host_init(struct pcie_port *pp) |
448 | { | 448 | { |
449 | struct device_node *np = pp->dev->of_node; | 449 | struct device *dev = pp->dev; |
450 | struct platform_device *pdev = to_platform_device(pp->dev); | 450 | struct device_node *np = dev->of_node; |
451 | struct platform_device *pdev = to_platform_device(dev); | ||
451 | struct pci_bus *bus, *child; | 452 | struct pci_bus *bus, *child; |
452 | struct resource *cfg_res; | 453 | struct resource *cfg_res; |
453 | int i, ret; | 454 | int i, ret; |
@@ -461,14 +462,14 @@ int dw_pcie_host_init(struct pcie_port *pp) | |||
461 | pp->cfg0_base = cfg_res->start; | 462 | pp->cfg0_base = cfg_res->start; |
462 | pp->cfg1_base = cfg_res->start + pp->cfg0_size; | 463 | pp->cfg1_base = cfg_res->start + pp->cfg0_size; |
463 | } else if (!pp->va_cfg0_base) { | 464 | } else if (!pp->va_cfg0_base) { |
464 | dev_err(pp->dev, "missing *config* reg space\n"); | 465 | dev_err(dev, "missing *config* reg space\n"); |
465 | } | 466 | } |
466 | 467 | ||
467 | ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base); | 468 | ret = of_pci_get_host_bridge_resources(np, 0, 0xff, &res, &pp->io_base); |
468 | if (ret) | 469 | if (ret) |
469 | return ret; | 470 | return ret; |
470 | 471 | ||
471 | ret = devm_request_pci_bus_resources(&pdev->dev, &res); | 472 | ret = devm_request_pci_bus_resources(dev, &res); |
472 | if (ret) | 473 | if (ret) |
473 | goto error; | 474 | goto error; |
474 | 475 | ||
@@ -478,7 +479,7 @@ int dw_pcie_host_init(struct pcie_port *pp) | |||
478 | case IORESOURCE_IO: | 479 | case IORESOURCE_IO: |
479 | ret = pci_remap_iospace(win->res, pp->io_base); | 480 | ret = pci_remap_iospace(win->res, pp->io_base); |
480 | if (ret) { | 481 | if (ret) { |
481 | dev_warn(pp->dev, "error %d: failed to map resource %pR\n", | 482 | dev_warn(dev, "error %d: failed to map resource %pR\n", |
482 | ret, win->res); | 483 | ret, win->res); |
483 | resource_list_destroy_entry(win); | 484 | resource_list_destroy_entry(win); |
484 | } else { | 485 | } else { |
@@ -508,10 +509,10 @@ int dw_pcie_host_init(struct pcie_port *pp) | |||
508 | } | 509 | } |
509 | 510 | ||
510 | if (!pp->dbi_base) { | 511 | if (!pp->dbi_base) { |
511 | pp->dbi_base = devm_ioremap(pp->dev, pp->cfg->start, | 512 | pp->dbi_base = devm_ioremap(dev, pp->cfg->start, |
512 | resource_size(pp->cfg)); | 513 | resource_size(pp->cfg)); |
513 | if (!pp->dbi_base) { | 514 | if (!pp->dbi_base) { |
514 | dev_err(pp->dev, "error with ioremap\n"); | 515 | dev_err(dev, "error with ioremap\n"); |
515 | ret = -ENOMEM; | 516 | ret = -ENOMEM; |
516 | goto error; | 517 | goto error; |
517 | } | 518 | } |
@@ -520,20 +521,20 @@ int dw_pcie_host_init(struct pcie_port *pp) | |||
520 | pp->mem_base = pp->mem->start; | 521 | pp->mem_base = pp->mem->start; |
521 | 522 | ||
522 | if (!pp->va_cfg0_base) { | 523 | if (!pp->va_cfg0_base) { |
523 | pp->va_cfg0_base = devm_ioremap(pp->dev, pp->cfg0_base, | 524 | pp->va_cfg0_base = devm_ioremap(dev, pp->cfg0_base, |
524 | pp->cfg0_size); | 525 | pp->cfg0_size); |
525 | if (!pp->va_cfg0_base) { | 526 | if (!pp->va_cfg0_base) { |
526 | dev_err(pp->dev, "error with ioremap in function\n"); | 527 | dev_err(dev, "error with ioremap in function\n"); |
527 | ret = -ENOMEM; | 528 | ret = -ENOMEM; |
528 | goto error; | 529 | goto error; |
529 | } | 530 | } |
530 | } | 531 | } |
531 | 532 | ||
532 | if (!pp->va_cfg1_base) { | 533 | if (!pp->va_cfg1_base) { |
533 | pp->va_cfg1_base = devm_ioremap(pp->dev, pp->cfg1_base, | 534 | pp->va_cfg1_base = devm_ioremap(dev, pp->cfg1_base, |
534 | pp->cfg1_size); | 535 | pp->cfg1_size); |
535 | if (!pp->va_cfg1_base) { | 536 | if (!pp->va_cfg1_base) { |
536 | dev_err(pp->dev, "error with ioremap\n"); | 537 | dev_err(dev, "error with ioremap\n"); |
537 | ret = -ENOMEM; | 538 | ret = -ENOMEM; |
538 | goto error; | 539 | goto error; |
539 | } | 540 | } |
@@ -549,11 +550,11 @@ int dw_pcie_host_init(struct pcie_port *pp) | |||
549 | 550 | ||
550 | if (IS_ENABLED(CONFIG_PCI_MSI)) { | 551 | if (IS_ENABLED(CONFIG_PCI_MSI)) { |
551 | if (!pp->ops->msi_host_init) { | 552 | if (!pp->ops->msi_host_init) { |
552 | pp->irq_domain = irq_domain_add_linear(pp->dev->of_node, | 553 | pp->irq_domain = irq_domain_add_linear(dev->of_node, |
553 | MAX_MSI_IRQS, &msi_domain_ops, | 554 | MAX_MSI_IRQS, &msi_domain_ops, |
554 | &dw_pcie_msi_chip); | 555 | &dw_pcie_msi_chip); |
555 | if (!pp->irq_domain) { | 556 | if (!pp->irq_domain) { |
556 | dev_err(pp->dev, "irq domain init failed\n"); | 557 | dev_err(dev, "irq domain init failed\n"); |
557 | ret = -ENXIO; | 558 | ret = -ENXIO; |
558 | goto error; | 559 | goto error; |
559 | } | 560 | } |
@@ -572,12 +573,12 @@ int dw_pcie_host_init(struct pcie_port *pp) | |||
572 | 573 | ||
573 | pp->root_bus_nr = pp->busn->start; | 574 | pp->root_bus_nr = pp->busn->start; |
574 | if (IS_ENABLED(CONFIG_PCI_MSI)) { | 575 | if (IS_ENABLED(CONFIG_PCI_MSI)) { |
575 | bus = pci_scan_root_bus_msi(pp->dev, pp->root_bus_nr, | 576 | bus = pci_scan_root_bus_msi(dev, pp->root_bus_nr, |
576 | &dw_pcie_ops, pp, &res, | 577 | &dw_pcie_ops, pp, &res, |
577 | &dw_pcie_msi_chip); | 578 | &dw_pcie_msi_chip); |
578 | dw_pcie_msi_chip.dev = pp->dev; | 579 | dw_pcie_msi_chip.dev = dev; |
579 | } else | 580 | } else |
580 | bus = pci_scan_root_bus(pp->dev, pp->root_bus_nr, &dw_pcie_ops, | 581 | bus = pci_scan_root_bus(dev, pp->root_bus_nr, &dw_pcie_ops, |
581 | pp, &res); | 582 | pp, &res); |
582 | if (!bus) { | 583 | if (!bus) { |
583 | ret = -ENOMEM; | 584 | ret = -ENOMEM; |