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authorBen Skeggs <bskeggs@redhat.com>2014-10-14 23:42:29 -0400
committerBen Skeggs <bskeggs@redhat.com>2014-10-20 02:13:12 -0400
commit40ac948e02e01e98474330f259ff842844096541 (patch)
tree1ca58cd063a42556ddf41ef3d640300b218d3b9f
parent7a42e83d36d2d0a68622320900dc4e880b1d920a (diff)
drm/gt215/gr: fix initialisation on gddr5 boards
The binary driver modifies the default context to have this value, rather than 0x3d0040, *after* it's filled the buffer with the usual golden data. We don't really have anything in place to locate the correct offset to do these type of modifications outside of the generation function, so this will have to do. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
-rw-r--r--drivers/gpu/drm/nouveau/core/engine/graph/ctxnv50.c10
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv50.c b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv50.c
index 552fdbd45ebe..1d0e33fb5f61 100644
--- a/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv50.c
+++ b/drivers/gpu/drm/nouveau/core/engine/graph/ctxnv50.c
@@ -113,6 +113,8 @@
113#define IS_NVA3F(x) (((x) > 0xa0 && (x) < 0xaa) || (x) == 0xaf) 113#define IS_NVA3F(x) (((x) > 0xa0 && (x) < 0xaa) || (x) == 0xaf)
114#define IS_NVAAF(x) ((x) >= 0xaa && (x) <= 0xac) 114#define IS_NVAAF(x) ((x) >= 0xaa && (x) <= 0xac)
115 115
116#include <subdev/fb.h>
117
116/* 118/*
117 * This code deals with PGRAPH contexts on NV50 family cards. Like NV40, it's 119 * This code deals with PGRAPH contexts on NV50 family cards. Like NV40, it's
118 * the GPU itself that does context-switching, but it needs a special 120 * the GPU itself that does context-switching, but it needs a special
@@ -569,8 +571,12 @@ nv50_graph_construct_mmio(struct nouveau_grctx *ctx)
569 gr_def(ctx, 0x407d08, 0x00010040); 571 gr_def(ctx, 0x407d08, 0x00010040);
570 else if (device->chipset < 0xa0) 572 else if (device->chipset < 0xa0)
571 gr_def(ctx, 0x407d08, 0x00390040); 573 gr_def(ctx, 0x407d08, 0x00390040);
572 else 574 else {
573 gr_def(ctx, 0x407d08, 0x003d0040); 575 if (nouveau_fb(device)->ram->type != NV_MEM_TYPE_GDDR5)
576 gr_def(ctx, 0x407d08, 0x003d0040);
577 else
578 gr_def(ctx, 0x407d08, 0x003c0040);
579 }
574 gr_def(ctx, 0x407d0c, 0x00000022); 580 gr_def(ctx, 0x407d0c, 0x00000022);
575 } 581 }
576 582