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authorKatsuhiro Suzuki <katsuhiro@katsuster.net>2019-04-06 11:35:57 -0400
committerHeiko Stuebner <heiko@sntech.de>2019-04-11 08:41:34 -0400
commit40a0dd4253c03e7ec21dd38f25901486d34b01c7 (patch)
tree1c14b3c6861a5164f8b43e1fdb67b82cce6047c3
parentd64420e816059661e70db31d891f38e79f483080 (diff)
arm64: dts: rockchip: fix cts, rts pin assign of UART3 for rk3399
This patch fixes pin assign of cts and rts signal of UART3. Currently GPIO3_C2 and C3 pins are assigned but TRM says that GPIO3_C0 and C1 are correct. Refer: RK3399 TRM v1.4 - Table 19-1 UART Interface Description Signed-off-by: Katsuhiro Suzuki <katsuhiro@katsuster.net> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
-rw-r--r--arch/arm64/boot/dts/rockchip/rk3399.dtsi4
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/arm64/boot/dts/rockchip/rk3399.dtsi b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
index f54c855f8cdf..196ac9b78076 100644
--- a/arch/arm64/boot/dts/rockchip/rk3399.dtsi
+++ b/arch/arm64/boot/dts/rockchip/rk3399.dtsi
@@ -2543,12 +2543,12 @@
2543 2543
2544 uart3_cts: uart3-cts { 2544 uart3_cts: uart3-cts {
2545 rockchip,pins = 2545 rockchip,pins =
2546 <3 RK_PC2 2 &pcfg_pull_none>; 2546 <3 RK_PC0 2 &pcfg_pull_none>;
2547 }; 2547 };
2548 2548
2549 uart3_rts: uart3-rts { 2549 uart3_rts: uart3-rts {
2550 rockchip,pins = 2550 rockchip,pins =
2551 <3 RK_PC3 2 &pcfg_pull_none>; 2551 <3 RK_PC1 2 &pcfg_pull_none>;
2552 }; 2552 };
2553 }; 2553 };
2554 2554