aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorDavid S. Miller <davem@davemloft.net>2014-08-22 22:42:25 -0400
committerDavid S. Miller <davem@davemloft.net>2014-08-22 22:42:25 -0400
commit3f8a2b746e3aece61f9c4714b86d1484d66461f0 (patch)
tree6702a2dde309d87b15c4a1c9b03adfb6a496786c
parent13322f2e664333b40ea7c71df8785e6f4bba1e68 (diff)
parent3a73aeff37c2e425b11d19c19e42e8269d58d417 (diff)
Merge tag 'linux-can-next-for-3.18-20140820' of git://gitorious.org/linux-can/linux-can-next
Marc Kleine-Budde says: ==================== pull-request: can-next 2014-08-20 this is a pull request of 10 patches for net-next/master. There is one patch by Wolfram Sang to clean up the build system. Two patches by Stefan Agner that add vf610 support to the flexcan driver. Dong Aisheng add support for bosch's m_can core, which is found in the new freescale ARM SoCs. Sergei Shtylyov improves the rcar_can driver by supporting all input clocks and adding device tree support. The next patch is a small cleanup for the bit rate calculation function by Lad, Prabhakar. And finally a patch by Himangi Saraogi, which converts the mcp251x driver to use dmam_alloc_coherent. ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat
-rw-r--r--Documentation/devicetree/bindings/net/can/m_can.txt67
-rw-r--r--Documentation/devicetree/bindings/net/can/rcar_can.txt43
-rw-r--r--drivers/net/can/Kconfig2
-rw-r--r--drivers/net/can/Makefile3
-rw-r--r--drivers/net/can/c_can/Makefile2
-rw-r--r--drivers/net/can/cc770/Makefile2
-rw-r--r--drivers/net/can/dev.c3
-rw-r--r--drivers/net/can/flexcan.c111
-rw-r--r--drivers/net/can/m_can/Kconfig4
-rw-r--r--drivers/net/can/m_can/Makefile5
-rw-r--r--drivers/net/can/m_can/m_can.c1202
-rw-r--r--drivers/net/can/mscan/Makefile2
-rw-r--r--drivers/net/can/rcar_can.c66
-rw-r--r--drivers/net/can/sja1000/Makefile2
-rw-r--r--drivers/net/can/softing/Makefile2
-rw-r--r--drivers/net/can/spi/Makefile2
-rw-r--r--drivers/net/can/spi/mcp251x.c16
-rw-r--r--drivers/net/can/usb/Makefile2
18 files changed, 1484 insertions, 52 deletions
diff --git a/Documentation/devicetree/bindings/net/can/m_can.txt b/Documentation/devicetree/bindings/net/can/m_can.txt
new file mode 100644
index 000000000000..9e331777c203
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/m_can.txt
@@ -0,0 +1,67 @@
1Bosch MCAN controller Device Tree Bindings
2-------------------------------------------------
3
4Required properties:
5- compatible : Should be "bosch,m_can" for M_CAN controllers
6- reg : physical base address and size of the M_CAN
7 registers map and Message RAM
8- reg-names : Should be "m_can" and "message_ram"
9- interrupts : Should be the interrupt number of M_CAN interrupt
10 line 0 and line 1, could be same if sharing
11 the same interrupt.
12- interrupt-names : Should contain "int0" and "int1"
13- clocks : Clocks used by controller, should be host clock
14 and CAN clock.
15- clock-names : Should contain "hclk" and "cclk"
16- pinctrl-<n> : Pinctrl states as described in bindings/pinctrl/pinctrl-bindings.txt
17- pinctrl-names : Names corresponding to the numbered pinctrl states
18- bosch,mram-cfg : Message RAM configuration data.
19 Multiple M_CAN instances can share the same Message
20 RAM and each element(e.g Rx FIFO or Tx Buffer and etc)
21 number in Message RAM is also configurable,
22 so this property is telling driver how the shared or
23 private Message RAM are used by this M_CAN controller.
24
25 The format should be as follows:
26 <offset sidf_elems xidf_elems rxf0_elems rxf1_elems
27 rxb_elems txe_elems txb_elems>
28 The 'offset' is an address offset of the Message RAM
29 where the following elements start from. This is
30 usually set to 0x0 if you're using a private Message
31 RAM. The remain cells are used to specify how many
32 elements are used for each FIFO/Buffer.
33
34 M_CAN includes the following elements according to user manual:
35 11-bit Filter 0-128 elements / 0-128 words
36 29-bit Filter 0-64 elements / 0-128 words
37 Rx FIFO 0 0-64 elements / 0-1152 words
38 Rx FIFO 1 0-64 elements / 0-1152 words
39 Rx Buffers 0-64 elements / 0-1152 words
40 Tx Event FIFO 0-32 elements / 0-64 words
41 Tx Buffers 0-32 elements / 0-576 words
42
43 Please refer to 2.4.1 Message RAM Configuration in
44 Bosch M_CAN user manual for details.
45
46Example:
47SoC dtsi:
48m_can1: can@020e8000 {
49 compatible = "bosch,m_can";
50 reg = <0x020e8000 0x4000>, <0x02298000 0x4000>;
51 reg-names = "m_can", "message_ram";
52 interrupts = <0 114 0x04>,
53 <0 114 0x04>;
54 interrupt-names = "int0", "int1";
55 clocks = <&clks IMX6SX_CLK_CANFD>,
56 <&clks IMX6SX_CLK_CANFD>;
57 clock-names = "hclk", "cclk";
58 bosch,mram-cfg = <0x0 0 0 32 0 0 0 1>;
59 status = "disabled";
60};
61
62Board dts:
63&m_can1 {
64 pinctrl-names = "default";
65 pinctrl-0 = <&pinctrl_m_can1>;
66 status = "enabled";
67};
diff --git a/Documentation/devicetree/bindings/net/can/rcar_can.txt b/Documentation/devicetree/bindings/net/can/rcar_can.txt
new file mode 100644
index 000000000000..002d8440bf66
--- /dev/null
+++ b/Documentation/devicetree/bindings/net/can/rcar_can.txt
@@ -0,0 +1,43 @@
1Renesas R-Car CAN controller Device Tree Bindings
2-------------------------------------------------
3
4Required properties:
5- compatible: "renesas,can-r8a7778" if CAN controller is a part of R8A7778 SoC.
6 "renesas,can-r8a7779" if CAN controller is a part of R8A7779 SoC.
7 "renesas,can-r8a7790" if CAN controller is a part of R8A7790 SoC.
8 "renesas,can-r8a7791" if CAN controller is a part of R8A7791 SoC.
9- reg: physical base address and size of the R-Car CAN register map.
10- interrupts: interrupt specifier for the sole interrupt.
11- clocks: phandles and clock specifiers for 3 CAN clock inputs.
12- clock-names: 3 clock input name strings: "clkp1", "clkp2", "can_clk".
13- pinctrl-0: pin control group to be used for this controller.
14- pinctrl-names: must be "default".
15
16Optional properties:
17- renesas,can-clock-select: R-Car CAN Clock Source Select. Valid values are:
18 <0x0> (default) : Peripheral clock (clkp1)
19 <0x1> : Peripheral clock (clkp2)
20 <0x3> : Externally input clock
21
22Example
23-------
24
25SoC common .dtsi file:
26
27 can0: can@e6e80000 {
28 compatible = "renesas,can-r8a7791";
29 reg = <0 0xe6e80000 0 0x1000>;
30 interrupts = <0 186 IRQ_TYPE_LEVEL_HIGH>;
31 clocks = <&mstp9_clks R8A7791_CLK_RCAN0>,
32 <&cpg_clocks R8A7791_CLK_RCAN>, <&can_clk>;
33 clock-names = "clkp1", "clkp2", "can_clk";
34 status = "disabled";
35 };
36
37Board specific .dts file:
38
39&can0 {
40 pinctrl-0 = <&can0_pins>;
41 pinctrl-names = "default";
42 status = "okay";
43};
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index 41688229c570..e78d6b32431d 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -143,6 +143,8 @@ source "drivers/net/can/sja1000/Kconfig"
143 143
144source "drivers/net/can/c_can/Kconfig" 144source "drivers/net/can/c_can/Kconfig"
145 145
146source "drivers/net/can/m_can/Kconfig"
147
146source "drivers/net/can/cc770/Kconfig" 148source "drivers/net/can/cc770/Kconfig"
147 149
148source "drivers/net/can/spi/Kconfig" 150source "drivers/net/can/spi/Kconfig"
diff --git a/drivers/net/can/Makefile b/drivers/net/can/Makefile
index 1697f22353a9..fc9304143f44 100644
--- a/drivers/net/can/Makefile
+++ b/drivers/net/can/Makefile
@@ -17,6 +17,7 @@ obj-y += softing/
17obj-$(CONFIG_CAN_SJA1000) += sja1000/ 17obj-$(CONFIG_CAN_SJA1000) += sja1000/
18obj-$(CONFIG_CAN_MSCAN) += mscan/ 18obj-$(CONFIG_CAN_MSCAN) += mscan/
19obj-$(CONFIG_CAN_C_CAN) += c_can/ 19obj-$(CONFIG_CAN_C_CAN) += c_can/
20obj-$(CONFIG_CAN_M_CAN) += m_can/
20obj-$(CONFIG_CAN_CC770) += cc770/ 21obj-$(CONFIG_CAN_CC770) += cc770/
21obj-$(CONFIG_CAN_AT91) += at91_can.o 22obj-$(CONFIG_CAN_AT91) += at91_can.o
22obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o 23obj-$(CONFIG_CAN_TI_HECC) += ti_hecc.o
@@ -28,4 +29,4 @@ obj-$(CONFIG_CAN_GRCAN) += grcan.o
28obj-$(CONFIG_CAN_RCAR) += rcar_can.o 29obj-$(CONFIG_CAN_RCAR) += rcar_can.o
29obj-$(CONFIG_CAN_XILINXCAN) += xilinx_can.o 30obj-$(CONFIG_CAN_XILINXCAN) += xilinx_can.o
30 31
31ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG 32subdir-ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/c_can/Makefile b/drivers/net/can/c_can/Makefile
index ad1cc842170a..9fdc678b5b37 100644
--- a/drivers/net/can/c_can/Makefile
+++ b/drivers/net/can/c_can/Makefile
@@ -5,5 +5,3 @@
5obj-$(CONFIG_CAN_C_CAN) += c_can.o 5obj-$(CONFIG_CAN_C_CAN) += c_can.o
6obj-$(CONFIG_CAN_C_CAN_PLATFORM) += c_can_platform.o 6obj-$(CONFIG_CAN_C_CAN_PLATFORM) += c_can_platform.o
7obj-$(CONFIG_CAN_C_CAN_PCI) += c_can_pci.o 7obj-$(CONFIG_CAN_C_CAN_PCI) += c_can_pci.o
8
9ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/cc770/Makefile b/drivers/net/can/cc770/Makefile
index 9fb8321b33eb..8657f879ae19 100644
--- a/drivers/net/can/cc770/Makefile
+++ b/drivers/net/can/cc770/Makefile
@@ -5,5 +5,3 @@
5obj-$(CONFIG_CAN_CC770) += cc770.o 5obj-$(CONFIG_CAN_CC770) += cc770.o
6obj-$(CONFIG_CAN_CC770_ISA) += cc770_isa.o 6obj-$(CONFIG_CAN_CC770_ISA) += cc770_isa.o
7obj-$(CONFIG_CAN_CC770_PLATFORM) += cc770_platform.o 7obj-$(CONFIG_CAN_CC770_PLATFORM) += cc770_platform.o
8
9ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c
index 9f91fcba43f8..02492d241e4c 100644
--- a/drivers/net/can/dev.c
+++ b/drivers/net/can/dev.c
@@ -103,11 +103,11 @@ static int can_calc_bittiming(struct net_device *dev, struct can_bittiming *bt,
103 const struct can_bittiming_const *btc) 103 const struct can_bittiming_const *btc)
104{ 104{
105 struct can_priv *priv = netdev_priv(dev); 105 struct can_priv *priv = netdev_priv(dev);
106 long rate, best_rate = 0;
107 long best_error = 1000000000, error = 0; 106 long best_error = 1000000000, error = 0;
108 int best_tseg = 0, best_brp = 0, brp = 0; 107 int best_tseg = 0, best_brp = 0, brp = 0;
109 int tsegall, tseg = 0, tseg1 = 0, tseg2 = 0; 108 int tsegall, tseg = 0, tseg1 = 0, tseg2 = 0;
110 int spt_error = 1000, spt = 0, sampl_pt; 109 int spt_error = 1000, spt = 0, sampl_pt;
110 long rate;
111 u64 v64; 111 u64 v64;
112 112
113 /* Use CIA recommended sample points */ 113 /* Use CIA recommended sample points */
@@ -152,7 +152,6 @@ static int can_calc_bittiming(struct net_device *dev, struct can_bittiming *bt,
152 } 152 }
153 best_tseg = tseg / 2; 153 best_tseg = tseg / 2;
154 best_brp = brp; 154 best_brp = brp;
155 best_rate = rate;
156 if (error == 0) 155 if (error == 0)
157 break; 156 break;
158 } 157 }
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c
index f425ec2c7839..ff1beb92a985 100644
--- a/drivers/net/can/flexcan.c
+++ b/drivers/net/can/flexcan.c
@@ -92,6 +92,27 @@
92#define FLEXCAN_CTRL_ERR_ALL \ 92#define FLEXCAN_CTRL_ERR_ALL \
93 (FLEXCAN_CTRL_ERR_BUS | FLEXCAN_CTRL_ERR_STATE) 93 (FLEXCAN_CTRL_ERR_BUS | FLEXCAN_CTRL_ERR_STATE)
94 94
95/* FLEXCAN control register 2 (CTRL2) bits */
96#define FLEXCAN_CRL2_ECRWRE BIT(29)
97#define FLEXCAN_CRL2_WRMFRZ BIT(28)
98#define FLEXCAN_CRL2_RFFN(x) (((x) & 0x0f) << 24)
99#define FLEXCAN_CRL2_TASD(x) (((x) & 0x1f) << 19)
100#define FLEXCAN_CRL2_MRP BIT(18)
101#define FLEXCAN_CRL2_RRS BIT(17)
102#define FLEXCAN_CRL2_EACEN BIT(16)
103
104/* FLEXCAN memory error control register (MECR) bits */
105#define FLEXCAN_MECR_ECRWRDIS BIT(31)
106#define FLEXCAN_MECR_HANCEI_MSK BIT(19)
107#define FLEXCAN_MECR_FANCEI_MSK BIT(18)
108#define FLEXCAN_MECR_CEI_MSK BIT(16)
109#define FLEXCAN_MECR_HAERRIE BIT(15)
110#define FLEXCAN_MECR_FAERRIE BIT(14)
111#define FLEXCAN_MECR_EXTERRIE BIT(13)
112#define FLEXCAN_MECR_RERRDIS BIT(9)
113#define FLEXCAN_MECR_ECCDIS BIT(8)
114#define FLEXCAN_MECR_NCEFAFRZ BIT(7)
115
95/* FLEXCAN error and status register (ESR) bits */ 116/* FLEXCAN error and status register (ESR) bits */
96#define FLEXCAN_ESR_TWRN_INT BIT(17) 117#define FLEXCAN_ESR_TWRN_INT BIT(17)
97#define FLEXCAN_ESR_RWRN_INT BIT(16) 118#define FLEXCAN_ESR_RWRN_INT BIT(16)
@@ -150,18 +171,20 @@
150 * FLEXCAN hardware feature flags 171 * FLEXCAN hardware feature flags
151 * 172 *
152 * Below is some version info we got: 173 * Below is some version info we got:
153 * SOC Version IP-Version Glitch- [TR]WRN_INT 174 * SOC Version IP-Version Glitch- [TR]WRN_INT Memory err
154 * Filter? connected? 175 * Filter? connected? detection
155 * MX25 FlexCAN2 03.00.00.00 no no 176 * MX25 FlexCAN2 03.00.00.00 no no no
156 * MX28 FlexCAN2 03.00.04.00 yes yes 177 * MX28 FlexCAN2 03.00.04.00 yes yes no
157 * MX35 FlexCAN2 03.00.00.00 no no 178 * MX35 FlexCAN2 03.00.00.00 no no no
158 * MX53 FlexCAN2 03.00.00.00 yes no 179 * MX53 FlexCAN2 03.00.00.00 yes no no
159 * MX6s FlexCAN3 10.00.12.00 yes yes 180 * MX6s FlexCAN3 10.00.12.00 yes yes no
181 * VF610 FlexCAN3 ? no yes yes
160 * 182 *
161 * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected. 183 * Some SOCs do not have the RX_WARN & TX_WARN interrupt line connected.
162 */ 184 */
163#define FLEXCAN_HAS_V10_FEATURES BIT(1) /* For core version >= 10 */ 185#define FLEXCAN_HAS_V10_FEATURES BIT(1) /* For core version >= 10 */
164#define FLEXCAN_HAS_BROKEN_ERR_STATE BIT(2) /* [TR]WRN_INT not connected */ 186#define FLEXCAN_HAS_BROKEN_ERR_STATE BIT(2) /* [TR]WRN_INT not connected */
187#define FLEXCAN_HAS_MECR_FEATURES BIT(3) /* Memory error detection */
165 188
166/* Structure of the message buffer */ 189/* Structure of the message buffer */
167struct flexcan_mb { 190struct flexcan_mb {
@@ -192,8 +215,17 @@ struct flexcan_regs {
192 u32 crcr; /* 0x44 */ 215 u32 crcr; /* 0x44 */
193 u32 rxfgmask; /* 0x48 */ 216 u32 rxfgmask; /* 0x48 */
194 u32 rxfir; /* 0x4c */ 217 u32 rxfir; /* 0x4c */
195 u32 _reserved3[12]; 218 u32 _reserved3[12]; /* 0x50 */
196 struct flexcan_mb cantxfg[64]; 219 struct flexcan_mb cantxfg[64]; /* 0x80 */
220 u32 _reserved4[408];
221 u32 mecr; /* 0xae0 */
222 u32 erriar; /* 0xae4 */
223 u32 erridpr; /* 0xae8 */
224 u32 errippr; /* 0xaec */
225 u32 rerrar; /* 0xaf0 */
226 u32 rerrdr; /* 0xaf4 */
227 u32 rerrsynr; /* 0xaf8 */
228 u32 errsr; /* 0xafc */
197}; 229};
198 230
199struct flexcan_devtype_data { 231struct flexcan_devtype_data {
@@ -223,6 +255,9 @@ static struct flexcan_devtype_data fsl_imx28_devtype_data;
223static struct flexcan_devtype_data fsl_imx6q_devtype_data = { 255static struct flexcan_devtype_data fsl_imx6q_devtype_data = {
224 .features = FLEXCAN_HAS_V10_FEATURES, 256 .features = FLEXCAN_HAS_V10_FEATURES,
225}; 257};
258static struct flexcan_devtype_data fsl_vf610_devtype_data = {
259 .features = FLEXCAN_HAS_V10_FEATURES | FLEXCAN_HAS_MECR_FEATURES,
260};
226 261
227static const struct can_bittiming_const flexcan_bittiming_const = { 262static const struct can_bittiming_const flexcan_bittiming_const = {
228 .name = DRV_NAME, 263 .name = DRV_NAME,
@@ -378,8 +413,9 @@ static int flexcan_chip_softreset(struct flexcan_priv *priv)
378 return 0; 413 return 0;
379} 414}
380 415
381static int flexcan_get_berr_counter(const struct net_device *dev, 416
382 struct can_berr_counter *bec) 417static int __flexcan_get_berr_counter(const struct net_device *dev,
418 struct can_berr_counter *bec)
383{ 419{
384 const struct flexcan_priv *priv = netdev_priv(dev); 420 const struct flexcan_priv *priv = netdev_priv(dev);
385 struct flexcan_regs __iomem *regs = priv->base; 421 struct flexcan_regs __iomem *regs = priv->base;
@@ -391,6 +427,29 @@ static int flexcan_get_berr_counter(const struct net_device *dev,
391 return 0; 427 return 0;
392} 428}
393 429
430static int flexcan_get_berr_counter(const struct net_device *dev,
431 struct can_berr_counter *bec)
432{
433 const struct flexcan_priv *priv = netdev_priv(dev);
434 int err;
435
436 err = clk_prepare_enable(priv->clk_ipg);
437 if (err)
438 return err;
439
440 err = clk_prepare_enable(priv->clk_per);
441 if (err)
442 goto out_disable_ipg;
443
444 err = __flexcan_get_berr_counter(dev, bec);
445
446 clk_disable_unprepare(priv->clk_per);
447 out_disable_ipg:
448 clk_disable_unprepare(priv->clk_ipg);
449
450 return err;
451}
452
394static int flexcan_start_xmit(struct sk_buff *skb, struct net_device *dev) 453static int flexcan_start_xmit(struct sk_buff *skb, struct net_device *dev)
395{ 454{
396 const struct flexcan_priv *priv = netdev_priv(dev); 455 const struct flexcan_priv *priv = netdev_priv(dev);
@@ -503,7 +562,7 @@ static void do_state(struct net_device *dev,
503 struct flexcan_priv *priv = netdev_priv(dev); 562 struct flexcan_priv *priv = netdev_priv(dev);
504 struct can_berr_counter bec; 563 struct can_berr_counter bec;
505 564
506 flexcan_get_berr_counter(dev, &bec); 565 __flexcan_get_berr_counter(dev, &bec);
507 566
508 switch (priv->can.state) { 567 switch (priv->can.state) {
509 case CAN_STATE_ERROR_ACTIVE: 568 case CAN_STATE_ERROR_ACTIVE:
@@ -793,7 +852,7 @@ static int flexcan_chip_start(struct net_device *dev)
793 struct flexcan_priv *priv = netdev_priv(dev); 852 struct flexcan_priv *priv = netdev_priv(dev);
794 struct flexcan_regs __iomem *regs = priv->base; 853 struct flexcan_regs __iomem *regs = priv->base;
795 int err; 854 int err;
796 u32 reg_mcr, reg_ctrl; 855 u32 reg_mcr, reg_ctrl, reg_crl2, reg_mecr;
797 856
798 /* enable module */ 857 /* enable module */
799 err = flexcan_chip_enable(priv); 858 err = flexcan_chip_enable(priv);
@@ -870,6 +929,31 @@ static int flexcan_chip_start(struct net_device *dev)
870 if (priv->devtype_data->features & FLEXCAN_HAS_V10_FEATURES) 929 if (priv->devtype_data->features & FLEXCAN_HAS_V10_FEATURES)
871 flexcan_write(0x0, &regs->rxfgmask); 930 flexcan_write(0x0, &regs->rxfgmask);
872 931
932 /*
933 * On Vybrid, disable memory error detection interrupts
934 * and freeze mode.
935 * This also works around errata e5295 which generates
936 * false positive memory errors and put the device in
937 * freeze mode.
938 */
939 if (priv->devtype_data->features & FLEXCAN_HAS_MECR_FEATURES) {
940 /*
941 * Follow the protocol as described in "Detection
942 * and Correction of Memory Errors" to write to
943 * MECR register
944 */
945 reg_crl2 = flexcan_read(&regs->crl2);
946 reg_crl2 |= FLEXCAN_CRL2_ECRWRE;
947 flexcan_write(reg_crl2, &regs->crl2);
948
949 reg_mecr = flexcan_read(&regs->mecr);
950 reg_mecr &= ~FLEXCAN_MECR_ECRWRDIS;
951 flexcan_write(reg_mecr, &regs->mecr);
952 reg_mecr &= ~(FLEXCAN_MECR_NCEFAFRZ | FLEXCAN_MECR_HANCEI_MSK |
953 FLEXCAN_MECR_FANCEI_MSK);
954 flexcan_write(reg_mecr, &regs->mecr);
955 }
956
873 err = flexcan_transceiver_enable(priv); 957 err = flexcan_transceiver_enable(priv);
874 if (err) 958 if (err)
875 goto out_chip_disable; 959 goto out_chip_disable;
@@ -1080,6 +1164,7 @@ static const struct of_device_id flexcan_of_match[] = {
1080 { .compatible = "fsl,imx6q-flexcan", .data = &fsl_imx6q_devtype_data, }, 1164 { .compatible = "fsl,imx6q-flexcan", .data = &fsl_imx6q_devtype_data, },
1081 { .compatible = "fsl,imx28-flexcan", .data = &fsl_imx28_devtype_data, }, 1165 { .compatible = "fsl,imx28-flexcan", .data = &fsl_imx28_devtype_data, },
1082 { .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, }, 1166 { .compatible = "fsl,p1010-flexcan", .data = &fsl_p1010_devtype_data, },
1167 { .compatible = "fsl,vf610-flexcan", .data = &fsl_vf610_devtype_data, },
1083 { /* sentinel */ }, 1168 { /* sentinel */ },
1084}; 1169};
1085MODULE_DEVICE_TABLE(of, flexcan_of_match); 1170MODULE_DEVICE_TABLE(of, flexcan_of_match);
diff --git a/drivers/net/can/m_can/Kconfig b/drivers/net/can/m_can/Kconfig
new file mode 100644
index 000000000000..fca5482c09ac
--- /dev/null
+++ b/drivers/net/can/m_can/Kconfig
@@ -0,0 +1,4 @@
1config CAN_M_CAN
2 tristate "Bosch M_CAN devices"
3 ---help---
4 Say Y here if you want to support for Bosch M_CAN controller.
diff --git a/drivers/net/can/m_can/Makefile b/drivers/net/can/m_can/Makefile
new file mode 100644
index 000000000000..8bbd7f24f5be
--- /dev/null
+++ b/drivers/net/can/m_can/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the Bosch M_CAN controller driver.
3#
4
5obj-$(CONFIG_CAN_M_CAN) += m_can.o
diff --git a/drivers/net/can/m_can/m_can.c b/drivers/net/can/m_can/m_can.c
new file mode 100644
index 000000000000..10d571eaed85
--- /dev/null
+++ b/drivers/net/can/m_can/m_can.c
@@ -0,0 +1,1202 @@
1/*
2 * CAN bus driver for Bosch M_CAN controller
3 *
4 * Copyright (C) 2014 Freescale Semiconductor, Inc.
5 * Dong Aisheng <b29396@freescale.com>
6 *
7 * Bosch M_CAN user manual can be obtained from:
8 * http://www.bosch-semiconductors.de/media/pdf_1/ipmodules_1/m_can/
9 * mcan_users_manual_v302.pdf
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without any
13 * warranty of any kind, whether express or implied.
14 */
15
16#include <linux/clk.h>
17#include <linux/delay.h>
18#include <linux/interrupt.h>
19#include <linux/io.h>
20#include <linux/kernel.h>
21#include <linux/module.h>
22#include <linux/netdevice.h>
23#include <linux/of.h>
24#include <linux/of_device.h>
25#include <linux/platform_device.h>
26
27#include <linux/can/dev.h>
28
29/* napi related */
30#define M_CAN_NAPI_WEIGHT 64
31
32/* message ram configuration data length */
33#define MRAM_CFG_LEN 8
34
35/* registers definition */
36enum m_can_reg {
37 M_CAN_CREL = 0x0,
38 M_CAN_ENDN = 0x4,
39 M_CAN_CUST = 0x8,
40 M_CAN_FBTP = 0xc,
41 M_CAN_TEST = 0x10,
42 M_CAN_RWD = 0x14,
43 M_CAN_CCCR = 0x18,
44 M_CAN_BTP = 0x1c,
45 M_CAN_TSCC = 0x20,
46 M_CAN_TSCV = 0x24,
47 M_CAN_TOCC = 0x28,
48 M_CAN_TOCV = 0x2c,
49 M_CAN_ECR = 0x40,
50 M_CAN_PSR = 0x44,
51 M_CAN_IR = 0x50,
52 M_CAN_IE = 0x54,
53 M_CAN_ILS = 0x58,
54 M_CAN_ILE = 0x5c,
55 M_CAN_GFC = 0x80,
56 M_CAN_SIDFC = 0x84,
57 M_CAN_XIDFC = 0x88,
58 M_CAN_XIDAM = 0x90,
59 M_CAN_HPMS = 0x94,
60 M_CAN_NDAT1 = 0x98,
61 M_CAN_NDAT2 = 0x9c,
62 M_CAN_RXF0C = 0xa0,
63 M_CAN_RXF0S = 0xa4,
64 M_CAN_RXF0A = 0xa8,
65 M_CAN_RXBC = 0xac,
66 M_CAN_RXF1C = 0xb0,
67 M_CAN_RXF1S = 0xb4,
68 M_CAN_RXF1A = 0xb8,
69 M_CAN_RXESC = 0xbc,
70 M_CAN_TXBC = 0xc0,
71 M_CAN_TXFQS = 0xc4,
72 M_CAN_TXESC = 0xc8,
73 M_CAN_TXBRP = 0xcc,
74 M_CAN_TXBAR = 0xd0,
75 M_CAN_TXBCR = 0xd4,
76 M_CAN_TXBTO = 0xd8,
77 M_CAN_TXBCF = 0xdc,
78 M_CAN_TXBTIE = 0xe0,
79 M_CAN_TXBCIE = 0xe4,
80 M_CAN_TXEFC = 0xf0,
81 M_CAN_TXEFS = 0xf4,
82 M_CAN_TXEFA = 0xf8,
83};
84
85/* m_can lec values */
86enum m_can_lec_type {
87 LEC_NO_ERROR = 0,
88 LEC_STUFF_ERROR,
89 LEC_FORM_ERROR,
90 LEC_ACK_ERROR,
91 LEC_BIT1_ERROR,
92 LEC_BIT0_ERROR,
93 LEC_CRC_ERROR,
94 LEC_UNUSED,
95};
96
97enum m_can_mram_cfg {
98 MRAM_SIDF = 0,
99 MRAM_XIDF,
100 MRAM_RXF0,
101 MRAM_RXF1,
102 MRAM_RXB,
103 MRAM_TXE,
104 MRAM_TXB,
105 MRAM_CFG_NUM,
106};
107
108/* Test Register (TEST) */
109#define TEST_LBCK BIT(4)
110
111/* CC Control Register(CCCR) */
112#define CCCR_TEST BIT(7)
113#define CCCR_MON BIT(5)
114#define CCCR_CCE BIT(1)
115#define CCCR_INIT BIT(0)
116
117/* Bit Timing & Prescaler Register (BTP) */
118#define BTR_BRP_MASK 0x3ff
119#define BTR_BRP_SHIFT 16
120#define BTR_TSEG1_SHIFT 8
121#define BTR_TSEG1_MASK (0x3f << BTR_TSEG1_SHIFT)
122#define BTR_TSEG2_SHIFT 4
123#define BTR_TSEG2_MASK (0xf << BTR_TSEG2_SHIFT)
124#define BTR_SJW_SHIFT 0
125#define BTR_SJW_MASK 0xf
126
127/* Error Counter Register(ECR) */
128#define ECR_RP BIT(15)
129#define ECR_REC_SHIFT 8
130#define ECR_REC_MASK (0x7f << ECR_REC_SHIFT)
131#define ECR_TEC_SHIFT 0
132#define ECR_TEC_MASK 0xff
133
134/* Protocol Status Register(PSR) */
135#define PSR_BO BIT(7)
136#define PSR_EW BIT(6)
137#define PSR_EP BIT(5)
138#define PSR_LEC_MASK 0x7
139
140/* Interrupt Register(IR) */
141#define IR_ALL_INT 0xffffffff
142#define IR_STE BIT(31)
143#define IR_FOE BIT(30)
144#define IR_ACKE BIT(29)
145#define IR_BE BIT(28)
146#define IR_CRCE BIT(27)
147#define IR_WDI BIT(26)
148#define IR_BO BIT(25)
149#define IR_EW BIT(24)
150#define IR_EP BIT(23)
151#define IR_ELO BIT(22)
152#define IR_BEU BIT(21)
153#define IR_BEC BIT(20)
154#define IR_DRX BIT(19)
155#define IR_TOO BIT(18)
156#define IR_MRAF BIT(17)
157#define IR_TSW BIT(16)
158#define IR_TEFL BIT(15)
159#define IR_TEFF BIT(14)
160#define IR_TEFW BIT(13)
161#define IR_TEFN BIT(12)
162#define IR_TFE BIT(11)
163#define IR_TCF BIT(10)
164#define IR_TC BIT(9)
165#define IR_HPM BIT(8)
166#define IR_RF1L BIT(7)
167#define IR_RF1F BIT(6)
168#define IR_RF1W BIT(5)
169#define IR_RF1N BIT(4)
170#define IR_RF0L BIT(3)
171#define IR_RF0F BIT(2)
172#define IR_RF0W BIT(1)
173#define IR_RF0N BIT(0)
174#define IR_ERR_STATE (IR_BO | IR_EW | IR_EP)
175#define IR_ERR_LEC (IR_STE | IR_FOE | IR_ACKE | IR_BE | IR_CRCE)
176#define IR_ERR_BUS (IR_ERR_LEC | IR_WDI | IR_ELO | IR_BEU | \
177 IR_BEC | IR_TOO | IR_MRAF | IR_TSW | IR_TEFL | \
178 IR_RF1L | IR_RF0L)
179#define IR_ERR_ALL (IR_ERR_STATE | IR_ERR_BUS)
180
181/* Interrupt Line Select (ILS) */
182#define ILS_ALL_INT0 0x0
183#define ILS_ALL_INT1 0xFFFFFFFF
184
185/* Interrupt Line Enable (ILE) */
186#define ILE_EINT0 BIT(0)
187#define ILE_EINT1 BIT(1)
188
189/* Rx FIFO 0/1 Configuration (RXF0C/RXF1C) */
190#define RXFC_FWM_OFF 24
191#define RXFC_FWM_MASK 0x7f
192#define RXFC_FWM_1 (1 << RXFC_FWM_OFF)
193#define RXFC_FS_OFF 16
194#define RXFC_FS_MASK 0x7f
195
196/* Rx FIFO 0/1 Status (RXF0S/RXF1S) */
197#define RXFS_RFL BIT(25)
198#define RXFS_FF BIT(24)
199#define RXFS_FPI_OFF 16
200#define RXFS_FPI_MASK 0x3f0000
201#define RXFS_FGI_OFF 8
202#define RXFS_FGI_MASK 0x3f00
203#define RXFS_FFL_MASK 0x7f
204
205/* Rx Buffer / FIFO Element Size Configuration (RXESC) */
206#define M_CAN_RXESC_8BYTES 0x0
207
208/* Tx Buffer Configuration(TXBC) */
209#define TXBC_NDTB_OFF 16
210#define TXBC_NDTB_MASK 0x3f
211
212/* Tx Buffer Element Size Configuration(TXESC) */
213#define TXESC_TBDS_8BYTES 0x0
214
215/* Tx Event FIFO Con.guration (TXEFC) */
216#define TXEFC_EFS_OFF 16
217#define TXEFC_EFS_MASK 0x3f
218
219/* Message RAM Configuration (in bytes) */
220#define SIDF_ELEMENT_SIZE 4
221#define XIDF_ELEMENT_SIZE 8
222#define RXF0_ELEMENT_SIZE 16
223#define RXF1_ELEMENT_SIZE 16
224#define RXB_ELEMENT_SIZE 16
225#define TXE_ELEMENT_SIZE 8
226#define TXB_ELEMENT_SIZE 16
227
228/* Message RAM Elements */
229#define M_CAN_FIFO_ID 0x0
230#define M_CAN_FIFO_DLC 0x4
231#define M_CAN_FIFO_DATA(n) (0x8 + ((n) << 2))
232
233/* Rx Buffer Element */
234#define RX_BUF_ESI BIT(31)
235#define RX_BUF_XTD BIT(30)
236#define RX_BUF_RTR BIT(29)
237
238/* Tx Buffer Element */
239#define TX_BUF_XTD BIT(30)
240#define TX_BUF_RTR BIT(29)
241
242/* address offset and element number for each FIFO/Buffer in the Message RAM */
243struct mram_cfg {
244 u16 off;
245 u8 num;
246};
247
248/* m_can private data structure */
249struct m_can_priv {
250 struct can_priv can; /* must be the first member */
251 struct napi_struct napi;
252 struct net_device *dev;
253 struct device *device;
254 struct clk *hclk;
255 struct clk *cclk;
256 void __iomem *base;
257 u32 irqstatus;
258
259 /* message ram configuration */
260 void __iomem *mram_base;
261 struct mram_cfg mcfg[MRAM_CFG_NUM];
262};
263
264static inline u32 m_can_read(const struct m_can_priv *priv, enum m_can_reg reg)
265{
266 return readl(priv->base + reg);
267}
268
269static inline void m_can_write(const struct m_can_priv *priv,
270 enum m_can_reg reg, u32 val)
271{
272 writel(val, priv->base + reg);
273}
274
275static inline u32 m_can_fifo_read(const struct m_can_priv *priv,
276 u32 fgi, unsigned int offset)
277{
278 return readl(priv->mram_base + priv->mcfg[MRAM_RXF0].off +
279 fgi * RXF0_ELEMENT_SIZE + offset);
280}
281
282static inline void m_can_fifo_write(const struct m_can_priv *priv,
283 u32 fpi, unsigned int offset, u32 val)
284{
285 return writel(val, priv->mram_base + priv->mcfg[MRAM_TXB].off +
286 fpi * TXB_ELEMENT_SIZE + offset);
287}
288
289static inline void m_can_config_endisable(const struct m_can_priv *priv,
290 bool enable)
291{
292 u32 cccr = m_can_read(priv, M_CAN_CCCR);
293 u32 timeout = 10;
294 u32 val = 0;
295
296 if (enable) {
297 /* enable m_can configuration */
298 m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT);
299 /* CCCR.CCE can only be set/reset while CCCR.INIT = '1' */
300 m_can_write(priv, M_CAN_CCCR, cccr | CCCR_INIT | CCCR_CCE);
301 } else {
302 m_can_write(priv, M_CAN_CCCR, cccr & ~(CCCR_INIT | CCCR_CCE));
303 }
304
305 /* there's a delay for module initialization */
306 if (enable)
307 val = CCCR_INIT | CCCR_CCE;
308
309 while ((m_can_read(priv, M_CAN_CCCR) & (CCCR_INIT | CCCR_CCE)) != val) {
310 if (timeout == 0) {
311 netdev_warn(priv->dev, "Failed to init module\n");
312 return;
313 }
314 timeout--;
315 udelay(1);
316 }
317}
318
319static inline void m_can_enable_all_interrupts(const struct m_can_priv *priv)
320{
321 m_can_write(priv, M_CAN_ILE, ILE_EINT0 | ILE_EINT1);
322}
323
324static inline void m_can_disable_all_interrupts(const struct m_can_priv *priv)
325{
326 m_can_write(priv, M_CAN_ILE, 0x0);
327}
328
329static void m_can_read_fifo(const struct net_device *dev, struct can_frame *cf,
330 u32 rxfs)
331{
332 struct m_can_priv *priv = netdev_priv(dev);
333 u32 id, fgi;
334
335 /* calculate the fifo get index for where to read data */
336 fgi = (rxfs & RXFS_FGI_MASK) >> RXFS_FGI_OFF;
337 id = m_can_fifo_read(priv, fgi, M_CAN_FIFO_ID);
338 if (id & RX_BUF_XTD)
339 cf->can_id = (id & CAN_EFF_MASK) | CAN_EFF_FLAG;
340 else
341 cf->can_id = (id >> 18) & CAN_SFF_MASK;
342
343 if (id & RX_BUF_RTR) {
344 cf->can_id |= CAN_RTR_FLAG;
345 } else {
346 id = m_can_fifo_read(priv, fgi, M_CAN_FIFO_DLC);
347 cf->can_dlc = get_can_dlc((id >> 16) & 0x0F);
348 *(u32 *)(cf->data + 0) = m_can_fifo_read(priv, fgi,
349 M_CAN_FIFO_DATA(0));
350 *(u32 *)(cf->data + 4) = m_can_fifo_read(priv, fgi,
351 M_CAN_FIFO_DATA(1));
352 }
353
354 /* acknowledge rx fifo 0 */
355 m_can_write(priv, M_CAN_RXF0A, fgi);
356}
357
358static int m_can_do_rx_poll(struct net_device *dev, int quota)
359{
360 struct m_can_priv *priv = netdev_priv(dev);
361 struct net_device_stats *stats = &dev->stats;
362 struct sk_buff *skb;
363 struct can_frame *frame;
364 u32 pkts = 0;
365 u32 rxfs;
366
367 rxfs = m_can_read(priv, M_CAN_RXF0S);
368 if (!(rxfs & RXFS_FFL_MASK)) {
369 netdev_dbg(dev, "no messages in fifo0\n");
370 return 0;
371 }
372
373 while ((rxfs & RXFS_FFL_MASK) && (quota > 0)) {
374 if (rxfs & RXFS_RFL)
375 netdev_warn(dev, "Rx FIFO 0 Message Lost\n");
376
377 skb = alloc_can_skb(dev, &frame);
378 if (!skb) {
379 stats->rx_dropped++;
380 return pkts;
381 }
382
383 m_can_read_fifo(dev, frame, rxfs);
384
385 stats->rx_packets++;
386 stats->rx_bytes += frame->can_dlc;
387
388 netif_receive_skb(skb);
389
390 quota--;
391 pkts++;
392 rxfs = m_can_read(priv, M_CAN_RXF0S);
393 }
394
395 if (pkts)
396 can_led_event(dev, CAN_LED_EVENT_RX);
397
398 return pkts;
399}
400
401static int m_can_handle_lost_msg(struct net_device *dev)
402{
403 struct net_device_stats *stats = &dev->stats;
404 struct sk_buff *skb;
405 struct can_frame *frame;
406
407 netdev_err(dev, "msg lost in rxf0\n");
408
409 stats->rx_errors++;
410 stats->rx_over_errors++;
411
412 skb = alloc_can_err_skb(dev, &frame);
413 if (unlikely(!skb))
414 return 0;
415
416 frame->can_id |= CAN_ERR_CRTL;
417 frame->data[1] = CAN_ERR_CRTL_RX_OVERFLOW;
418
419 netif_receive_skb(skb);
420
421 return 1;
422}
423
424static int m_can_handle_lec_err(struct net_device *dev,
425 enum m_can_lec_type lec_type)
426{
427 struct m_can_priv *priv = netdev_priv(dev);
428 struct net_device_stats *stats = &dev->stats;
429 struct can_frame *cf;
430 struct sk_buff *skb;
431
432 priv->can.can_stats.bus_error++;
433 stats->rx_errors++;
434
435 /* propagate the error condition to the CAN stack */
436 skb = alloc_can_err_skb(dev, &cf);
437 if (unlikely(!skb))
438 return 0;
439
440 /* check for 'last error code' which tells us the
441 * type of the last error to occur on the CAN bus
442 */
443 cf->can_id |= CAN_ERR_PROT | CAN_ERR_BUSERROR;
444 cf->data[2] |= CAN_ERR_PROT_UNSPEC;
445
446 switch (lec_type) {
447 case LEC_STUFF_ERROR:
448 netdev_dbg(dev, "stuff error\n");
449 cf->data[2] |= CAN_ERR_PROT_STUFF;
450 break;
451 case LEC_FORM_ERROR:
452 netdev_dbg(dev, "form error\n");
453 cf->data[2] |= CAN_ERR_PROT_FORM;
454 break;
455 case LEC_ACK_ERROR:
456 netdev_dbg(dev, "ack error\n");
457 cf->data[3] |= (CAN_ERR_PROT_LOC_ACK |
458 CAN_ERR_PROT_LOC_ACK_DEL);
459 break;
460 case LEC_BIT1_ERROR:
461 netdev_dbg(dev, "bit1 error\n");
462 cf->data[2] |= CAN_ERR_PROT_BIT1;
463 break;
464 case LEC_BIT0_ERROR:
465 netdev_dbg(dev, "bit0 error\n");
466 cf->data[2] |= CAN_ERR_PROT_BIT0;
467 break;
468 case LEC_CRC_ERROR:
469 netdev_dbg(dev, "CRC error\n");
470 cf->data[3] |= (CAN_ERR_PROT_LOC_CRC_SEQ |
471 CAN_ERR_PROT_LOC_CRC_DEL);
472 break;
473 default:
474 break;
475 }
476
477 stats->rx_packets++;
478 stats->rx_bytes += cf->can_dlc;
479 netif_receive_skb(skb);
480
481 return 1;
482}
483
484static int m_can_get_berr_counter(const struct net_device *dev,
485 struct can_berr_counter *bec)
486{
487 struct m_can_priv *priv = netdev_priv(dev);
488 unsigned int ecr;
489 int err;
490
491 err = clk_prepare_enable(priv->hclk);
492 if (err)
493 return err;
494
495 err = clk_prepare_enable(priv->cclk);
496 if (err) {
497 clk_disable_unprepare(priv->hclk);
498 return err;
499 }
500
501 ecr = m_can_read(priv, M_CAN_ECR);
502 bec->rxerr = (ecr & ECR_REC_MASK) >> ECR_REC_SHIFT;
503 bec->txerr = ecr & ECR_TEC_MASK;
504
505 clk_disable_unprepare(priv->cclk);
506 clk_disable_unprepare(priv->hclk);
507
508 return 0;
509}
510
511static int m_can_handle_state_change(struct net_device *dev,
512 enum can_state new_state)
513{
514 struct m_can_priv *priv = netdev_priv(dev);
515 struct net_device_stats *stats = &dev->stats;
516 struct can_frame *cf;
517 struct sk_buff *skb;
518 struct can_berr_counter bec;
519 unsigned int ecr;
520
521 switch (new_state) {
522 case CAN_STATE_ERROR_ACTIVE:
523 /* error warning state */
524 priv->can.can_stats.error_warning++;
525 priv->can.state = CAN_STATE_ERROR_WARNING;
526 break;
527 case CAN_STATE_ERROR_PASSIVE:
528 /* error passive state */
529 priv->can.can_stats.error_passive++;
530 priv->can.state = CAN_STATE_ERROR_PASSIVE;
531 break;
532 case CAN_STATE_BUS_OFF:
533 /* bus-off state */
534 priv->can.state = CAN_STATE_BUS_OFF;
535 m_can_disable_all_interrupts(priv);
536 can_bus_off(dev);
537 break;
538 default:
539 break;
540 }
541
542 /* propagate the error condition to the CAN stack */
543 skb = alloc_can_err_skb(dev, &cf);
544 if (unlikely(!skb))
545 return 0;
546
547 m_can_get_berr_counter(dev, &bec);
548
549 switch (new_state) {
550 case CAN_STATE_ERROR_ACTIVE:
551 /* error warning state */
552 cf->can_id |= CAN_ERR_CRTL;
553 cf->data[1] = (bec.txerr > bec.rxerr) ?
554 CAN_ERR_CRTL_TX_WARNING :
555 CAN_ERR_CRTL_RX_WARNING;
556 cf->data[6] = bec.txerr;
557 cf->data[7] = bec.rxerr;
558 break;
559 case CAN_STATE_ERROR_PASSIVE:
560 /* error passive state */
561 cf->can_id |= CAN_ERR_CRTL;
562 ecr = m_can_read(priv, M_CAN_ECR);
563 if (ecr & ECR_RP)
564 cf->data[1] |= CAN_ERR_CRTL_RX_PASSIVE;
565 if (bec.txerr > 127)
566 cf->data[1] |= CAN_ERR_CRTL_TX_PASSIVE;
567 cf->data[6] = bec.txerr;
568 cf->data[7] = bec.rxerr;
569 break;
570 case CAN_STATE_BUS_OFF:
571 /* bus-off state */
572 cf->can_id |= CAN_ERR_BUSOFF;
573 break;
574 default:
575 break;
576 }
577
578 stats->rx_packets++;
579 stats->rx_bytes += cf->can_dlc;
580 netif_receive_skb(skb);
581
582 return 1;
583}
584
585static int m_can_handle_state_errors(struct net_device *dev, u32 psr)
586{
587 struct m_can_priv *priv = netdev_priv(dev);
588 int work_done = 0;
589
590 if ((psr & PSR_EW) &&
591 (priv->can.state != CAN_STATE_ERROR_WARNING)) {
592 netdev_dbg(dev, "entered error warning state\n");
593 work_done += m_can_handle_state_change(dev,
594 CAN_STATE_ERROR_WARNING);
595 }
596
597 if ((psr & PSR_EP) &&
598 (priv->can.state != CAN_STATE_ERROR_PASSIVE)) {
599 netdev_dbg(dev, "entered error warning state\n");
600 work_done += m_can_handle_state_change(dev,
601 CAN_STATE_ERROR_PASSIVE);
602 }
603
604 if ((psr & PSR_BO) &&
605 (priv->can.state != CAN_STATE_BUS_OFF)) {
606 netdev_dbg(dev, "entered error warning state\n");
607 work_done += m_can_handle_state_change(dev,
608 CAN_STATE_BUS_OFF);
609 }
610
611 return work_done;
612}
613
614static void m_can_handle_other_err(struct net_device *dev, u32 irqstatus)
615{
616 if (irqstatus & IR_WDI)
617 netdev_err(dev, "Message RAM Watchdog event due to missing READY\n");
618 if (irqstatus & IR_BEU)
619 netdev_err(dev, "Error Logging Overflow\n");
620 if (irqstatus & IR_BEU)
621 netdev_err(dev, "Bit Error Uncorrected\n");
622 if (irqstatus & IR_BEC)
623 netdev_err(dev, "Bit Error Corrected\n");
624 if (irqstatus & IR_TOO)
625 netdev_err(dev, "Timeout reached\n");
626 if (irqstatus & IR_MRAF)
627 netdev_err(dev, "Message RAM access failure occurred\n");
628}
629
630static inline bool is_lec_err(u32 psr)
631{
632 psr &= LEC_UNUSED;
633
634 return psr && (psr != LEC_UNUSED);
635}
636
637static int m_can_handle_bus_errors(struct net_device *dev, u32 irqstatus,
638 u32 psr)
639{
640 struct m_can_priv *priv = netdev_priv(dev);
641 int work_done = 0;
642
643 if (irqstatus & IR_RF0L)
644 work_done += m_can_handle_lost_msg(dev);
645
646 /* handle lec errors on the bus */
647 if ((priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING) &&
648 is_lec_err(psr))
649 work_done += m_can_handle_lec_err(dev, psr & LEC_UNUSED);
650
651 /* other unproccessed error interrupts */
652 m_can_handle_other_err(dev, irqstatus);
653
654 return work_done;
655}
656
657static int m_can_poll(struct napi_struct *napi, int quota)
658{
659 struct net_device *dev = napi->dev;
660 struct m_can_priv *priv = netdev_priv(dev);
661 int work_done = 0;
662 u32 irqstatus, psr;
663
664 irqstatus = priv->irqstatus | m_can_read(priv, M_CAN_IR);
665 if (!irqstatus)
666 goto end;
667
668 psr = m_can_read(priv, M_CAN_PSR);
669 if (irqstatus & IR_ERR_STATE)
670 work_done += m_can_handle_state_errors(dev, psr);
671
672 if (irqstatus & IR_ERR_BUS)
673 work_done += m_can_handle_bus_errors(dev, irqstatus, psr);
674
675 if (irqstatus & IR_RF0N)
676 work_done += m_can_do_rx_poll(dev, (quota - work_done));
677
678 if (work_done < quota) {
679 napi_complete(napi);
680 m_can_enable_all_interrupts(priv);
681 }
682
683end:
684 return work_done;
685}
686
687static irqreturn_t m_can_isr(int irq, void *dev_id)
688{
689 struct net_device *dev = (struct net_device *)dev_id;
690 struct m_can_priv *priv = netdev_priv(dev);
691 struct net_device_stats *stats = &dev->stats;
692 u32 ir;
693
694 ir = m_can_read(priv, M_CAN_IR);
695 if (!ir)
696 return IRQ_NONE;
697
698 /* ACK all irqs */
699 if (ir & IR_ALL_INT)
700 m_can_write(priv, M_CAN_IR, ir);
701
702 /* schedule NAPI in case of
703 * - rx IRQ
704 * - state change IRQ
705 * - bus error IRQ and bus error reporting
706 */
707 if ((ir & IR_RF0N) || (ir & IR_ERR_ALL)) {
708 priv->irqstatus = ir;
709 m_can_disable_all_interrupts(priv);
710 napi_schedule(&priv->napi);
711 }
712
713 /* transmission complete interrupt */
714 if (ir & IR_TC) {
715 stats->tx_bytes += can_get_echo_skb(dev, 0);
716 stats->tx_packets++;
717 can_led_event(dev, CAN_LED_EVENT_TX);
718 netif_wake_queue(dev);
719 }
720
721 return IRQ_HANDLED;
722}
723
724static const struct can_bittiming_const m_can_bittiming_const = {
725 .name = KBUILD_MODNAME,
726 .tseg1_min = 2, /* Time segment 1 = prop_seg + phase_seg1 */
727 .tseg1_max = 64,
728 .tseg2_min = 1, /* Time segment 2 = phase_seg2 */
729 .tseg2_max = 16,
730 .sjw_max = 16,
731 .brp_min = 1,
732 .brp_max = 1024,
733 .brp_inc = 1,
734};
735
736static int m_can_set_bittiming(struct net_device *dev)
737{
738 struct m_can_priv *priv = netdev_priv(dev);
739 const struct can_bittiming *bt = &priv->can.bittiming;
740 u16 brp, sjw, tseg1, tseg2;
741 u32 reg_btp;
742
743 brp = bt->brp - 1;
744 sjw = bt->sjw - 1;
745 tseg1 = bt->prop_seg + bt->phase_seg1 - 1;
746 tseg2 = bt->phase_seg2 - 1;
747 reg_btp = (brp << BTR_BRP_SHIFT) | (sjw << BTR_SJW_SHIFT) |
748 (tseg1 << BTR_TSEG1_SHIFT) | (tseg2 << BTR_TSEG2_SHIFT);
749 m_can_write(priv, M_CAN_BTP, reg_btp);
750 netdev_dbg(dev, "setting BTP 0x%x\n", reg_btp);
751
752 return 0;
753}
754
755/* Configure M_CAN chip:
756 * - set rx buffer/fifo element size
757 * - configure rx fifo
758 * - accept non-matching frame into fifo 0
759 * - configure tx buffer
760 * - configure mode
761 * - setup bittiming
762 */
763static void m_can_chip_config(struct net_device *dev)
764{
765 struct m_can_priv *priv = netdev_priv(dev);
766 u32 cccr, test;
767
768 m_can_config_endisable(priv, true);
769
770 /* RX Buffer/FIFO Element Size 8 bytes data field */
771 m_can_write(priv, M_CAN_RXESC, M_CAN_RXESC_8BYTES);
772
773 /* Accept Non-matching Frames Into FIFO 0 */
774 m_can_write(priv, M_CAN_GFC, 0x0);
775
776 /* only support one Tx Buffer currently */
777 m_can_write(priv, M_CAN_TXBC, (1 << TXBC_NDTB_OFF) |
778 priv->mcfg[MRAM_TXB].off);
779
780 /* only support 8 bytes firstly */
781 m_can_write(priv, M_CAN_TXESC, TXESC_TBDS_8BYTES);
782
783 m_can_write(priv, M_CAN_TXEFC, (1 << TXEFC_EFS_OFF) |
784 priv->mcfg[MRAM_TXE].off);
785
786 /* rx fifo configuration, blocking mode, fifo size 1 */
787 m_can_write(priv, M_CAN_RXF0C,
788 (priv->mcfg[MRAM_RXF0].num << RXFC_FS_OFF) |
789 RXFC_FWM_1 | priv->mcfg[MRAM_RXF0].off);
790
791 m_can_write(priv, M_CAN_RXF1C,
792 (priv->mcfg[MRAM_RXF1].num << RXFC_FS_OFF) |
793 RXFC_FWM_1 | priv->mcfg[MRAM_RXF1].off);
794
795 cccr = m_can_read(priv, M_CAN_CCCR);
796 cccr &= ~(CCCR_TEST | CCCR_MON);
797 test = m_can_read(priv, M_CAN_TEST);
798 test &= ~TEST_LBCK;
799
800 if (priv->can.ctrlmode & CAN_CTRLMODE_LISTENONLY)
801 cccr |= CCCR_MON;
802
803 if (priv->can.ctrlmode & CAN_CTRLMODE_LOOPBACK) {
804 cccr |= CCCR_TEST;
805 test |= TEST_LBCK;
806 }
807
808 m_can_write(priv, M_CAN_CCCR, cccr);
809 m_can_write(priv, M_CAN_TEST, test);
810
811 /* enable interrupts */
812 m_can_write(priv, M_CAN_IR, IR_ALL_INT);
813 if (!(priv->can.ctrlmode & CAN_CTRLMODE_BERR_REPORTING))
814 m_can_write(priv, M_CAN_IE, IR_ALL_INT & ~IR_ERR_LEC);
815 else
816 m_can_write(priv, M_CAN_IE, IR_ALL_INT);
817
818 /* route all interrupts to INT0 */
819 m_can_write(priv, M_CAN_ILS, ILS_ALL_INT0);
820
821 /* set bittiming params */
822 m_can_set_bittiming(dev);
823
824 m_can_config_endisable(priv, false);
825}
826
827static void m_can_start(struct net_device *dev)
828{
829 struct m_can_priv *priv = netdev_priv(dev);
830
831 /* basic m_can configuration */
832 m_can_chip_config(dev);
833
834 priv->can.state = CAN_STATE_ERROR_ACTIVE;
835
836 m_can_enable_all_interrupts(priv);
837}
838
839static int m_can_set_mode(struct net_device *dev, enum can_mode mode)
840{
841 switch (mode) {
842 case CAN_MODE_START:
843 m_can_start(dev);
844 netif_wake_queue(dev);
845 break;
846 default:
847 return -EOPNOTSUPP;
848 }
849
850 return 0;
851}
852
853static void free_m_can_dev(struct net_device *dev)
854{
855 free_candev(dev);
856}
857
858static struct net_device *alloc_m_can_dev(void)
859{
860 struct net_device *dev;
861 struct m_can_priv *priv;
862
863 dev = alloc_candev(sizeof(*priv), 1);
864 if (!dev)
865 return NULL;
866
867 priv = netdev_priv(dev);
868 netif_napi_add(dev, &priv->napi, m_can_poll, M_CAN_NAPI_WEIGHT);
869
870 priv->dev = dev;
871 priv->can.bittiming_const = &m_can_bittiming_const;
872 priv->can.do_set_mode = m_can_set_mode;
873 priv->can.do_get_berr_counter = m_can_get_berr_counter;
874 priv->can.ctrlmode_supported = CAN_CTRLMODE_LOOPBACK |
875 CAN_CTRLMODE_LISTENONLY |
876 CAN_CTRLMODE_BERR_REPORTING;
877
878 return dev;
879}
880
881static int m_can_open(struct net_device *dev)
882{
883 struct m_can_priv *priv = netdev_priv(dev);
884 int err;
885
886 err = clk_prepare_enable(priv->hclk);
887 if (err)
888 return err;
889
890 err = clk_prepare_enable(priv->cclk);
891 if (err)
892 goto exit_disable_hclk;
893
894 /* open the can device */
895 err = open_candev(dev);
896 if (err) {
897 netdev_err(dev, "failed to open can device\n");
898 goto exit_disable_cclk;
899 }
900
901 /* register interrupt handler */
902 err = request_irq(dev->irq, m_can_isr, IRQF_SHARED, dev->name,
903 dev);
904 if (err < 0) {
905 netdev_err(dev, "failed to request interrupt\n");
906 goto exit_irq_fail;
907 }
908
909 /* start the m_can controller */
910 m_can_start(dev);
911
912 can_led_event(dev, CAN_LED_EVENT_OPEN);
913 napi_enable(&priv->napi);
914 netif_start_queue(dev);
915
916 return 0;
917
918exit_irq_fail:
919 close_candev(dev);
920exit_disable_cclk:
921 clk_disable_unprepare(priv->cclk);
922exit_disable_hclk:
923 clk_disable_unprepare(priv->hclk);
924 return err;
925}
926
927static void m_can_stop(struct net_device *dev)
928{
929 struct m_can_priv *priv = netdev_priv(dev);
930
931 /* disable all interrupts */
932 m_can_disable_all_interrupts(priv);
933
934 clk_disable_unprepare(priv->hclk);
935 clk_disable_unprepare(priv->cclk);
936
937 /* set the state as STOPPED */
938 priv->can.state = CAN_STATE_STOPPED;
939}
940
941static int m_can_close(struct net_device *dev)
942{
943 struct m_can_priv *priv = netdev_priv(dev);
944
945 netif_stop_queue(dev);
946 napi_disable(&priv->napi);
947 m_can_stop(dev);
948 free_irq(dev->irq, dev);
949 close_candev(dev);
950 can_led_event(dev, CAN_LED_EVENT_STOP);
951
952 return 0;
953}
954
955static netdev_tx_t m_can_start_xmit(struct sk_buff *skb,
956 struct net_device *dev)
957{
958 struct m_can_priv *priv = netdev_priv(dev);
959 struct can_frame *cf = (struct can_frame *)skb->data;
960 u32 id;
961
962 if (can_dropped_invalid_skb(dev, skb))
963 return NETDEV_TX_OK;
964
965 netif_stop_queue(dev);
966
967 if (cf->can_id & CAN_EFF_FLAG) {
968 id = cf->can_id & CAN_EFF_MASK;
969 id |= TX_BUF_XTD;
970 } else {
971 id = ((cf->can_id & CAN_SFF_MASK) << 18);
972 }
973
974 if (cf->can_id & CAN_RTR_FLAG)
975 id |= TX_BUF_RTR;
976
977 /* message ram configuration */
978 m_can_fifo_write(priv, 0, M_CAN_FIFO_ID, id);
979 m_can_fifo_write(priv, 0, M_CAN_FIFO_DLC, cf->can_dlc << 16);
980 m_can_fifo_write(priv, 0, M_CAN_FIFO_DATA(0), *(u32 *)(cf->data + 0));
981 m_can_fifo_write(priv, 0, M_CAN_FIFO_DATA(1), *(u32 *)(cf->data + 4));
982 can_put_echo_skb(skb, dev, 0);
983
984 /* enable first TX buffer to start transfer */
985 m_can_write(priv, M_CAN_TXBTIE, 0x1);
986 m_can_write(priv, M_CAN_TXBAR, 0x1);
987
988 return NETDEV_TX_OK;
989}
990
991static const struct net_device_ops m_can_netdev_ops = {
992 .ndo_open = m_can_open,
993 .ndo_stop = m_can_close,
994 .ndo_start_xmit = m_can_start_xmit,
995};
996
997static int register_m_can_dev(struct net_device *dev)
998{
999 dev->flags |= IFF_ECHO; /* we support local echo */
1000 dev->netdev_ops = &m_can_netdev_ops;
1001
1002 return register_candev(dev);
1003}
1004
1005static int m_can_of_parse_mram(struct platform_device *pdev,
1006 struct m_can_priv *priv)
1007{
1008 struct device_node *np = pdev->dev.of_node;
1009 struct resource *res;
1010 void __iomem *addr;
1011 u32 out_val[MRAM_CFG_LEN];
1012 int ret;
1013
1014 /* message ram could be shared */
1015 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "message_ram");
1016 if (!res)
1017 return -ENODEV;
1018
1019 addr = devm_ioremap(&pdev->dev, res->start, resource_size(res));
1020 if (!addr)
1021 return -ENOMEM;
1022
1023 /* get message ram configuration */
1024 ret = of_property_read_u32_array(np, "bosch,mram-cfg",
1025 out_val, sizeof(out_val) / 4);
1026 if (ret) {
1027 dev_err(&pdev->dev, "can not get message ram configuration\n");
1028 return -ENODEV;
1029 }
1030
1031 priv->mram_base = addr;
1032 priv->mcfg[MRAM_SIDF].off = out_val[0];
1033 priv->mcfg[MRAM_SIDF].num = out_val[1];
1034 priv->mcfg[MRAM_XIDF].off = priv->mcfg[MRAM_SIDF].off +
1035 priv->mcfg[MRAM_SIDF].num * SIDF_ELEMENT_SIZE;
1036 priv->mcfg[MRAM_XIDF].num = out_val[2];
1037 priv->mcfg[MRAM_RXF0].off = priv->mcfg[MRAM_XIDF].off +
1038 priv->mcfg[MRAM_XIDF].num * XIDF_ELEMENT_SIZE;
1039 priv->mcfg[MRAM_RXF0].num = out_val[3] & RXFC_FS_MASK;
1040 priv->mcfg[MRAM_RXF1].off = priv->mcfg[MRAM_RXF0].off +
1041 priv->mcfg[MRAM_RXF0].num * RXF0_ELEMENT_SIZE;
1042 priv->mcfg[MRAM_RXF1].num = out_val[4] & RXFC_FS_MASK;
1043 priv->mcfg[MRAM_RXB].off = priv->mcfg[MRAM_RXF1].off +
1044 priv->mcfg[MRAM_RXF1].num * RXF1_ELEMENT_SIZE;
1045 priv->mcfg[MRAM_RXB].num = out_val[5];
1046 priv->mcfg[MRAM_TXE].off = priv->mcfg[MRAM_RXB].off +
1047 priv->mcfg[MRAM_RXB].num * RXB_ELEMENT_SIZE;
1048 priv->mcfg[MRAM_TXE].num = out_val[6];
1049 priv->mcfg[MRAM_TXB].off = priv->mcfg[MRAM_TXE].off +
1050 priv->mcfg[MRAM_TXE].num * TXE_ELEMENT_SIZE;
1051 priv->mcfg[MRAM_TXB].num = out_val[7] & TXBC_NDTB_MASK;
1052
1053 dev_dbg(&pdev->dev, "mram_base %p sidf 0x%x %d xidf 0x%x %d rxf0 0x%x %d rxf1 0x%x %d rxb 0x%x %d txe 0x%x %d txb 0x%x %d\n",
1054 priv->mram_base,
1055 priv->mcfg[MRAM_SIDF].off, priv->mcfg[MRAM_SIDF].num,
1056 priv->mcfg[MRAM_XIDF].off, priv->mcfg[MRAM_XIDF].num,
1057 priv->mcfg[MRAM_RXF0].off, priv->mcfg[MRAM_RXF0].num,
1058 priv->mcfg[MRAM_RXF1].off, priv->mcfg[MRAM_RXF1].num,
1059 priv->mcfg[MRAM_RXB].off, priv->mcfg[MRAM_RXB].num,
1060 priv->mcfg[MRAM_TXE].off, priv->mcfg[MRAM_TXE].num,
1061 priv->mcfg[MRAM_TXB].off, priv->mcfg[MRAM_TXB].num);
1062
1063 return 0;
1064}
1065
1066static int m_can_plat_probe(struct platform_device *pdev)
1067{
1068 struct net_device *dev;
1069 struct m_can_priv *priv;
1070 struct resource *res;
1071 void __iomem *addr;
1072 struct clk *hclk, *cclk;
1073 int irq, ret;
1074
1075 hclk = devm_clk_get(&pdev->dev, "hclk");
1076 cclk = devm_clk_get(&pdev->dev, "cclk");
1077 if (IS_ERR(hclk) || IS_ERR(cclk)) {
1078 dev_err(&pdev->dev, "no clock find\n");
1079 return -ENODEV;
1080 }
1081
1082 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "m_can");
1083 addr = devm_ioremap_resource(&pdev->dev, res);
1084 irq = platform_get_irq_byname(pdev, "int0");
1085 if (IS_ERR(addr) || irq < 0)
1086 return -EINVAL;
1087
1088 /* allocate the m_can device */
1089 dev = alloc_m_can_dev();
1090 if (!dev)
1091 return -ENOMEM;
1092
1093 priv = netdev_priv(dev);
1094 dev->irq = irq;
1095 priv->base = addr;
1096 priv->device = &pdev->dev;
1097 priv->hclk = hclk;
1098 priv->cclk = cclk;
1099 priv->can.clock.freq = clk_get_rate(cclk);
1100
1101 ret = m_can_of_parse_mram(pdev, priv);
1102 if (ret)
1103 goto failed_free_dev;
1104
1105 platform_set_drvdata(pdev, dev);
1106 SET_NETDEV_DEV(dev, &pdev->dev);
1107
1108 ret = register_m_can_dev(dev);
1109 if (ret) {
1110 dev_err(&pdev->dev, "registering %s failed (err=%d)\n",
1111 KBUILD_MODNAME, ret);
1112 goto failed_free_dev;
1113 }
1114
1115 devm_can_led_init(dev);
1116
1117 dev_info(&pdev->dev, "%s device registered (regs=%p, irq=%d)\n",
1118 KBUILD_MODNAME, priv->base, dev->irq);
1119
1120 return 0;
1121
1122failed_free_dev:
1123 free_m_can_dev(dev);
1124 return ret;
1125}
1126
1127static __maybe_unused int m_can_suspend(struct device *dev)
1128{
1129 struct net_device *ndev = dev_get_drvdata(dev);
1130 struct m_can_priv *priv = netdev_priv(ndev);
1131
1132 if (netif_running(ndev)) {
1133 netif_stop_queue(ndev);
1134 netif_device_detach(ndev);
1135 }
1136
1137 /* TODO: enter low power */
1138
1139 priv->can.state = CAN_STATE_SLEEPING;
1140
1141 return 0;
1142}
1143
1144static __maybe_unused int m_can_resume(struct device *dev)
1145{
1146 struct net_device *ndev = dev_get_drvdata(dev);
1147 struct m_can_priv *priv = netdev_priv(ndev);
1148
1149 /* TODO: exit low power */
1150
1151 priv->can.state = CAN_STATE_ERROR_ACTIVE;
1152
1153 if (netif_running(ndev)) {
1154 netif_device_attach(ndev);
1155 netif_start_queue(ndev);
1156 }
1157
1158 return 0;
1159}
1160
1161static void unregister_m_can_dev(struct net_device *dev)
1162{
1163 unregister_candev(dev);
1164}
1165
1166static int m_can_plat_remove(struct platform_device *pdev)
1167{
1168 struct net_device *dev = platform_get_drvdata(pdev);
1169
1170 unregister_m_can_dev(dev);
1171 platform_set_drvdata(pdev, NULL);
1172
1173 free_m_can_dev(dev);
1174
1175 return 0;
1176}
1177
1178static const struct dev_pm_ops m_can_pmops = {
1179 SET_SYSTEM_SLEEP_PM_OPS(m_can_suspend, m_can_resume)
1180};
1181
1182static const struct of_device_id m_can_of_table[] = {
1183 { .compatible = "bosch,m_can", .data = NULL },
1184 { /* sentinel */ },
1185};
1186MODULE_DEVICE_TABLE(of, m_can_of_table);
1187
1188static struct platform_driver m_can_plat_driver = {
1189 .driver = {
1190 .name = KBUILD_MODNAME,
1191 .of_match_table = m_can_of_table,
1192 .pm = &m_can_pmops,
1193 },
1194 .probe = m_can_plat_probe,
1195 .remove = m_can_plat_remove,
1196};
1197
1198module_platform_driver(m_can_plat_driver);
1199
1200MODULE_AUTHOR("Dong Aisheng <b29396@freescale.com>");
1201MODULE_LICENSE("GPL v2");
1202MODULE_DESCRIPTION("CAN bus driver for Bosch M_CAN controller");
diff --git a/drivers/net/can/mscan/Makefile b/drivers/net/can/mscan/Makefile
index c9fab17cd8b4..58903b45f5fb 100644
--- a/drivers/net/can/mscan/Makefile
+++ b/drivers/net/can/mscan/Makefile
@@ -1,5 +1,3 @@
1 1
2obj-$(CONFIG_CAN_MPC5XXX) += mscan-mpc5xxx.o 2obj-$(CONFIG_CAN_MPC5XXX) += mscan-mpc5xxx.o
3mscan-mpc5xxx-objs := mscan.o mpc5xxx_can.o 3mscan-mpc5xxx-objs := mscan.o mpc5xxx_can.o
4
5ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/rcar_can.c b/drivers/net/can/rcar_can.c
index 5268d216ecfa..1abe133d1594 100644
--- a/drivers/net/can/rcar_can.c
+++ b/drivers/net/can/rcar_can.c
@@ -20,6 +20,7 @@
20#include <linux/can/dev.h> 20#include <linux/can/dev.h>
21#include <linux/clk.h> 21#include <linux/clk.h>
22#include <linux/can/platform/rcar_can.h> 22#include <linux/can/platform/rcar_can.h>
23#include <linux/of.h>
23 24
24#define RCAR_CAN_DRV_NAME "rcar_can" 25#define RCAR_CAN_DRV_NAME "rcar_can"
25 26
@@ -87,6 +88,7 @@ struct rcar_can_priv {
87 struct napi_struct napi; 88 struct napi_struct napi;
88 struct rcar_can_regs __iomem *regs; 89 struct rcar_can_regs __iomem *regs;
89 struct clk *clk; 90 struct clk *clk;
91 struct clk *can_clk;
90 u8 tx_dlc[RCAR_CAN_FIFO_DEPTH]; 92 u8 tx_dlc[RCAR_CAN_FIFO_DEPTH];
91 u32 tx_head; 93 u32 tx_head;
92 u32 tx_tail; 94 u32 tx_tail;
@@ -505,14 +507,20 @@ static int rcar_can_open(struct net_device *ndev)
505 507
506 err = clk_prepare_enable(priv->clk); 508 err = clk_prepare_enable(priv->clk);
507 if (err) { 509 if (err) {
508 netdev_err(ndev, "clk_prepare_enable() failed, error %d\n", 510 netdev_err(ndev, "failed to enable periperal clock, error %d\n",
509 err); 511 err);
510 goto out; 512 goto out;
511 } 513 }
514 err = clk_prepare_enable(priv->can_clk);
515 if (err) {
516 netdev_err(ndev, "failed to enable CAN clock, error %d\n",
517 err);
518 goto out_clock;
519 }
512 err = open_candev(ndev); 520 err = open_candev(ndev);
513 if (err) { 521 if (err) {
514 netdev_err(ndev, "open_candev() failed, error %d\n", err); 522 netdev_err(ndev, "open_candev() failed, error %d\n", err);
515 goto out_clock; 523 goto out_can_clock;
516 } 524 }
517 napi_enable(&priv->napi); 525 napi_enable(&priv->napi);
518 err = request_irq(ndev->irq, rcar_can_interrupt, 0, ndev->name, ndev); 526 err = request_irq(ndev->irq, rcar_can_interrupt, 0, ndev->name, ndev);
@@ -527,6 +535,8 @@ static int rcar_can_open(struct net_device *ndev)
527out_close: 535out_close:
528 napi_disable(&priv->napi); 536 napi_disable(&priv->napi);
529 close_candev(ndev); 537 close_candev(ndev);
538out_can_clock:
539 clk_disable_unprepare(priv->can_clk);
530out_clock: 540out_clock:
531 clk_disable_unprepare(priv->clk); 541 clk_disable_unprepare(priv->clk);
532out: 542out:
@@ -565,6 +575,7 @@ static int rcar_can_close(struct net_device *ndev)
565 rcar_can_stop(ndev); 575 rcar_can_stop(ndev);
566 free_irq(ndev->irq, ndev); 576 free_irq(ndev->irq, ndev);
567 napi_disable(&priv->napi); 577 napi_disable(&priv->napi);
578 clk_disable_unprepare(priv->can_clk);
568 clk_disable_unprepare(priv->clk); 579 clk_disable_unprepare(priv->clk);
569 close_candev(ndev); 580 close_candev(ndev);
570 can_led_event(ndev, CAN_LED_EVENT_STOP); 581 can_led_event(ndev, CAN_LED_EVENT_STOP);
@@ -715,6 +726,12 @@ static int rcar_can_get_berr_counter(const struct net_device *dev,
715 return 0; 726 return 0;
716} 727}
717 728
729static const char * const clock_names[] = {
730 [CLKR_CLKP1] = "clkp1",
731 [CLKR_CLKP2] = "clkp2",
732 [CLKR_CLKEXT] = "can_clk",
733};
734
718static int rcar_can_probe(struct platform_device *pdev) 735static int rcar_can_probe(struct platform_device *pdev)
719{ 736{
720 struct rcar_can_platform_data *pdata; 737 struct rcar_can_platform_data *pdata;
@@ -722,13 +739,20 @@ static int rcar_can_probe(struct platform_device *pdev)
722 struct net_device *ndev; 739 struct net_device *ndev;
723 struct resource *mem; 740 struct resource *mem;
724 void __iomem *addr; 741 void __iomem *addr;
742 u32 clock_select = CLKR_CLKP1;
725 int err = -ENODEV; 743 int err = -ENODEV;
726 int irq; 744 int irq;
727 745
728 pdata = dev_get_platdata(&pdev->dev); 746 if (pdev->dev.of_node) {
729 if (!pdata) { 747 of_property_read_u32(pdev->dev.of_node,
730 dev_err(&pdev->dev, "No platform data provided!\n"); 748 "renesas,can-clock-select", &clock_select);
731 goto fail; 749 } else {
750 pdata = dev_get_platdata(&pdev->dev);
751 if (!pdata) {
752 dev_err(&pdev->dev, "No platform data provided!\n");
753 goto fail;
754 }
755 clock_select = pdata->clock_select;
732 } 756 }
733 757
734 irq = platform_get_irq(pdev, 0); 758 irq = platform_get_irq(pdev, 0);
@@ -753,10 +777,22 @@ static int rcar_can_probe(struct platform_device *pdev)
753 777
754 priv = netdev_priv(ndev); 778 priv = netdev_priv(ndev);
755 779
756 priv->clk = devm_clk_get(&pdev->dev, NULL); 780 priv->clk = devm_clk_get(&pdev->dev, "clkp1");
757 if (IS_ERR(priv->clk)) { 781 if (IS_ERR(priv->clk)) {
758 err = PTR_ERR(priv->clk); 782 err = PTR_ERR(priv->clk);
759 dev_err(&pdev->dev, "cannot get clock: %d\n", err); 783 dev_err(&pdev->dev, "cannot get peripheral clock: %d\n", err);
784 goto fail_clk;
785 }
786
787 if (clock_select >= ARRAY_SIZE(clock_names)) {
788 err = -EINVAL;
789 dev_err(&pdev->dev, "invalid CAN clock selected\n");
790 goto fail_clk;
791 }
792 priv->can_clk = devm_clk_get(&pdev->dev, clock_names[clock_select]);
793 if (IS_ERR(priv->can_clk)) {
794 err = PTR_ERR(priv->can_clk);
795 dev_err(&pdev->dev, "cannot get CAN clock: %d\n", err);
760 goto fail_clk; 796 goto fail_clk;
761 } 797 }
762 798
@@ -765,8 +801,8 @@ static int rcar_can_probe(struct platform_device *pdev)
765 ndev->flags |= IFF_ECHO; 801 ndev->flags |= IFF_ECHO;
766 priv->ndev = ndev; 802 priv->ndev = ndev;
767 priv->regs = addr; 803 priv->regs = addr;
768 priv->clock_select = pdata->clock_select; 804 priv->clock_select = clock_select;
769 priv->can.clock.freq = clk_get_rate(priv->clk); 805 priv->can.clock.freq = clk_get_rate(priv->can_clk);
770 priv->can.bittiming_const = &rcar_can_bittiming_const; 806 priv->can.bittiming_const = &rcar_can_bittiming_const;
771 priv->can.do_set_mode = rcar_can_do_set_mode; 807 priv->can.do_set_mode = rcar_can_do_set_mode;
772 priv->can.do_get_berr_counter = rcar_can_get_berr_counter; 808 priv->can.do_get_berr_counter = rcar_can_get_berr_counter;
@@ -858,10 +894,20 @@ static int __maybe_unused rcar_can_resume(struct device *dev)
858 894
859static SIMPLE_DEV_PM_OPS(rcar_can_pm_ops, rcar_can_suspend, rcar_can_resume); 895static SIMPLE_DEV_PM_OPS(rcar_can_pm_ops, rcar_can_suspend, rcar_can_resume);
860 896
897static const struct of_device_id rcar_can_of_table[] __maybe_unused = {
898 { .compatible = "renesas,can-r8a7778" },
899 { .compatible = "renesas,can-r8a7779" },
900 { .compatible = "renesas,can-r8a7790" },
901 { .compatible = "renesas,can-r8a7791" },
902 { }
903};
904MODULE_DEVICE_TABLE(of, rcar_can_of_table);
905
861static struct platform_driver rcar_can_driver = { 906static struct platform_driver rcar_can_driver = {
862 .driver = { 907 .driver = {
863 .name = RCAR_CAN_DRV_NAME, 908 .name = RCAR_CAN_DRV_NAME,
864 .owner = THIS_MODULE, 909 .owner = THIS_MODULE,
910 .of_match_table = of_match_ptr(rcar_can_of_table),
865 .pm = &rcar_can_pm_ops, 911 .pm = &rcar_can_pm_ops,
866 }, 912 },
867 .probe = rcar_can_probe, 913 .probe = rcar_can_probe,
diff --git a/drivers/net/can/sja1000/Makefile b/drivers/net/can/sja1000/Makefile
index 531d5fcc97e5..be11ddd11b87 100644
--- a/drivers/net/can/sja1000/Makefile
+++ b/drivers/net/can/sja1000/Makefile
@@ -12,5 +12,3 @@ obj-$(CONFIG_CAN_PEAK_PCMCIA) += peak_pcmcia.o
12obj-$(CONFIG_CAN_PEAK_PCI) += peak_pci.o 12obj-$(CONFIG_CAN_PEAK_PCI) += peak_pci.o
13obj-$(CONFIG_CAN_PLX_PCI) += plx_pci.o 13obj-$(CONFIG_CAN_PLX_PCI) += plx_pci.o
14obj-$(CONFIG_CAN_TSCAN1) += tscan1.o 14obj-$(CONFIG_CAN_TSCAN1) += tscan1.o
15
16ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/softing/Makefile b/drivers/net/can/softing/Makefile
index c5e5016c742e..a23da492dad5 100644
--- a/drivers/net/can/softing/Makefile
+++ b/drivers/net/can/softing/Makefile
@@ -2,5 +2,3 @@
2softing-y := softing_main.o softing_fw.o 2softing-y := softing_main.o softing_fw.o
3obj-$(CONFIG_CAN_SOFTING) += softing.o 3obj-$(CONFIG_CAN_SOFTING) += softing.o
4obj-$(CONFIG_CAN_SOFTING_CS) += softing_cs.o 4obj-$(CONFIG_CAN_SOFTING_CS) += softing_cs.o
5
6ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/spi/Makefile b/drivers/net/can/spi/Makefile
index 90bcacffbc65..0e86040cdd8c 100644
--- a/drivers/net/can/spi/Makefile
+++ b/drivers/net/can/spi/Makefile
@@ -4,5 +4,3 @@
4 4
5 5
6obj-$(CONFIG_CAN_MCP251X) += mcp251x.o 6obj-$(CONFIG_CAN_MCP251X) += mcp251x.o
7
8ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
diff --git a/drivers/net/can/spi/mcp251x.c b/drivers/net/can/spi/mcp251x.c
index 5df239e68812..c66d699640a9 100644
--- a/drivers/net/can/spi/mcp251x.c
+++ b/drivers/net/can/spi/mcp251x.c
@@ -1107,10 +1107,10 @@ static int mcp251x_can_probe(struct spi_device *spi)
1107 * Minimum coherent DMA allocation is PAGE_SIZE, so allocate 1107 * Minimum coherent DMA allocation is PAGE_SIZE, so allocate
1108 * that much and share it between Tx and Rx DMA buffers. 1108 * that much and share it between Tx and Rx DMA buffers.
1109 */ 1109 */
1110 priv->spi_tx_buf = dma_alloc_coherent(&spi->dev, 1110 priv->spi_tx_buf = dmam_alloc_coherent(&spi->dev,
1111 PAGE_SIZE, 1111 PAGE_SIZE,
1112 &priv->spi_tx_dma, 1112 &priv->spi_tx_dma,
1113 GFP_DMA); 1113 GFP_DMA);
1114 1114
1115 if (priv->spi_tx_buf) { 1115 if (priv->spi_tx_buf) {
1116 priv->spi_rx_buf = (priv->spi_tx_buf + (PAGE_SIZE / 2)); 1116 priv->spi_rx_buf = (priv->spi_tx_buf + (PAGE_SIZE / 2));
@@ -1156,9 +1156,6 @@ static int mcp251x_can_probe(struct spi_device *spi)
1156 return 0; 1156 return 0;
1157 1157
1158error_probe: 1158error_probe:
1159 if (mcp251x_enable_dma)
1160 dma_free_coherent(&spi->dev, PAGE_SIZE,
1161 priv->spi_tx_buf, priv->spi_tx_dma);
1162 mcp251x_power_enable(priv->power, 0); 1159 mcp251x_power_enable(priv->power, 0);
1163 1160
1164out_clk: 1161out_clk:
@@ -1178,11 +1175,6 @@ static int mcp251x_can_remove(struct spi_device *spi)
1178 1175
1179 unregister_candev(net); 1176 unregister_candev(net);
1180 1177
1181 if (mcp251x_enable_dma) {
1182 dma_free_coherent(&spi->dev, PAGE_SIZE,
1183 priv->spi_tx_buf, priv->spi_tx_dma);
1184 }
1185
1186 mcp251x_power_enable(priv->power, 0); 1178 mcp251x_power_enable(priv->power, 0);
1187 1179
1188 if (!IS_ERR(priv->clk)) 1180 if (!IS_ERR(priv->clk))
diff --git a/drivers/net/can/usb/Makefile b/drivers/net/can/usb/Makefile
index 7b9a393b1ac8..a64cf983fb87 100644
--- a/drivers/net/can/usb/Makefile
+++ b/drivers/net/can/usb/Makefile
@@ -8,5 +8,3 @@ obj-$(CONFIG_CAN_GS_USB) += gs_usb.o
8obj-$(CONFIG_CAN_KVASER_USB) += kvaser_usb.o 8obj-$(CONFIG_CAN_KVASER_USB) += kvaser_usb.o
9obj-$(CONFIG_CAN_PEAK_USB) += peak_usb/ 9obj-$(CONFIG_CAN_PEAK_USB) += peak_usb/
10obj-$(CONFIG_CAN_8DEV_USB) += usb_8dev.o 10obj-$(CONFIG_CAN_8DEV_USB) += usb_8dev.o
11
12ccflags-$(CONFIG_CAN_DEBUG_DEVICES) := -DDEBUG
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-30 15:13:10 -0400