diff options
author | Vivien Didelot <vivien.didelot@savoirfairelinux.com> | 2017-10-13 13:39:22 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2017-10-14 21:40:03 -0400 |
commit | 3efc93c2bc243f940beb3324f67aa14e223abdd1 (patch) | |
tree | 35e4857123ca73d7cb7fde24d3dcf9580c08bfe9 | |
parent | 5903f594935a3841137c86b9d5b75143a5b7121c (diff) |
net: dsa: mv88e6060: fix switch MAC address
The 88E6060 Ethernet switch always transmits the multicast bit of the
switch MAC address as a zero. It re-uses the corresponding bit 8 of the
register "Switch MAC Address Register Bytes 0 & 1" for "DiffAddr".
If the "DiffAddr" bit is 0, then all ports transmit the same source
address. If it is set to 1, then bit 2:0 are used for the port number.
The mv88e6060 driver is currently wrongly shifting the MAC address byte
0 by 9. To fix this, shift it by 8 as usual and clear its bit 0.
Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com>
Reviewed-by: Woojung Huh <woojung.huh@microchip.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/dsa/mv88e6060.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/drivers/net/dsa/mv88e6060.c b/drivers/net/dsa/mv88e6060.c index dce7fa57eb55..f123ed57630d 100644 --- a/drivers/net/dsa/mv88e6060.c +++ b/drivers/net/dsa/mv88e6060.c | |||
@@ -214,8 +214,14 @@ static int mv88e6060_setup(struct dsa_switch *ds) | |||
214 | 214 | ||
215 | static int mv88e6060_set_addr(struct dsa_switch *ds, u8 *addr) | 215 | static int mv88e6060_set_addr(struct dsa_switch *ds, u8 *addr) |
216 | { | 216 | { |
217 | /* Use the same MAC Address as FD Pause frames for all ports */ | 217 | u16 val = addr[0] << 8 | addr[1]; |
218 | REG_WRITE(REG_GLOBAL, GLOBAL_MAC_01, (addr[0] << 9) | addr[1]); | 218 | |
219 | /* The multicast bit is always transmitted as a zero, so the switch uses | ||
220 | * bit 8 for "DiffAddr", where 0 means all ports transmit the same SA. | ||
221 | */ | ||
222 | val &= 0xfeff; | ||
223 | |||
224 | REG_WRITE(REG_GLOBAL, GLOBAL_MAC_01, val); | ||
219 | REG_WRITE(REG_GLOBAL, GLOBAL_MAC_23, (addr[2] << 8) | addr[3]); | 225 | REG_WRITE(REG_GLOBAL, GLOBAL_MAC_23, (addr[2] << 8) | addr[3]); |
220 | REG_WRITE(REG_GLOBAL, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]); | 226 | REG_WRITE(REG_GLOBAL, GLOBAL_MAC_45, (addr[4] << 8) | addr[5]); |
221 | 227 | ||