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authorLinus Torvalds <torvalds@linux-foundation.org>2016-12-15 18:15:13 -0500
committerLinus Torvalds <torvalds@linux-foundation.org>2016-12-15 18:15:13 -0500
commit3ec5e8d82b1a4ee42c8956099d89b87917dd3ba5 (patch)
treeb9a4ffdae9a92538f5bb2cf138e3025fb04e7aa8
parent09dee2a608a4a7d42f021f83084ade7de2415d7e (diff)
parent816c60c131d95d6b0c7e119f89a1f1cb8d232fd8 (diff)
Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC non-urgent fixes from Arnd Bergmann: "As usual, we queue up a few fixes that don't seem urgent enough to go in through -rc, or that just came a little too late given their size. The zx fixes make the platform finally boot on real hardware, the davinci and imx31 get the DT support working better for some of the machines that are still normally used with classic board files. One tegra fix is important for new bootloader versions, but the bug has been around for a while without anyone noticing. The other changes are mostly cosmetic" * tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (22 commits) arm64: tegra: Add missing Smaug revision arm64: tegra: Add VDD_GPU regulator to Jetson TX1 arm64: dts: zte: clean up gic-v3 redistributor properties arm64: dts: zx: Fix gic GICR property bus: vexpress-config: fix device reference leak soc: ti: qmss: fix the case when !SMP ARM: lpc32xx: drop duplicate header device.h ARM: ixp4xx: drop duplicate header gpio.h ARM: socfpga: fix spelling mistake in error message ARM: dts: imx6q-cm-fx6: fix fec pinctrl ARM: dts: imx7d-pinfunc: fix UART pinmux defines ARM: dts: imx6qp: correct LDB clock inputs ARM: OMAP2+: pm-debug: Use seq_putc() in two functions ARM: OMAP2+: Remove the omapdss_early_init_of() function mfd: tps65217: Fix mismatched interrupt number ARM: zx: Fix error handling ARM: spear: Fix error handling ARM: davinci: da850: Fix pwm name matching ARM: clk: imx31: properly init clocks for machines with DT clk: imx31: fix rewritten input argument of mx31_clocks_init() ...
-rw-r--r--Documentation/devicetree/bindings/clock/imx31-clock.txt2
-rw-r--r--arch/arm/boot/dts/imx31.dtsi14
-rw-r--r--arch/arm/boot/dts/imx6q-cm-fx6.dts1
-rw-r--r--arch/arm/boot/dts/imx6qp.dtsi10
-rw-r--r--arch/arm/boot/dts/imx7d-pinfunc.h12
-rw-r--r--arch/arm/mach-davinci/da850.c48
-rw-r--r--arch/arm/mach-davinci/da8xx-dt.c10
-rw-r--r--arch/arm/mach-imx/common.h1
-rw-r--r--arch/arm/mach-imx/imx31-dt.c6
-rw-r--r--arch/arm/mach-ixp4xx/dsmg600-setup.c1
-rw-r--r--arch/arm/mach-lpc32xx/phy3250.c1
-rw-r--r--arch/arm/mach-omap2/board-generic.c2
-rw-r--r--arch/arm/mach-omap2/common.h1
-rw-r--r--arch/arm/mach-omap2/display.c5
-rw-r--r--arch/arm/mach-omap2/pm-debug.c5
-rw-r--r--arch/arm/mach-socfpga/l2_cache.c2
-rw-r--r--arch/arm/mach-spear/time.c2
-rw-r--r--arch/arm/mach-zx/zx296702-pm-domain.c2
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi18
-rw-r--r--arch/arm64/boot/dts/nvidia/tegra210-smaug.dts3
-rw-r--r--arch/arm64/boot/dts/zte/zx296718.dtsi9
-rw-r--r--drivers/bus/vexpress-config.c7
-rw-r--r--drivers/clk/imx/clk-imx31.c52
-rw-r--r--drivers/soc/ti/knav_qmss_queue.c2
-rw-r--r--include/linux/mfd/tps65217.h11
25 files changed, 140 insertions, 87 deletions
diff --git a/Documentation/devicetree/bindings/clock/imx31-clock.txt b/Documentation/devicetree/bindings/clock/imx31-clock.txt
index 19df842c694f..8163d565f697 100644
--- a/Documentation/devicetree/bindings/clock/imx31-clock.txt
+++ b/Documentation/devicetree/bindings/clock/imx31-clock.txt
@@ -77,7 +77,7 @@ Examples:
77clks: ccm@53f80000{ 77clks: ccm@53f80000{
78 compatible = "fsl,imx31-ccm"; 78 compatible = "fsl,imx31-ccm";
79 reg = <0x53f80000 0x4000>; 79 reg = <0x53f80000 0x4000>;
80 interrupts = <0 31 0x04 0 53 0x04>; 80 interrupts = <31>, <53>;
81 #clock-cells = <1>; 81 #clock-cells = <1>;
82}; 82};
83 83
diff --git a/arch/arm/boot/dts/imx31.dtsi b/arch/arm/boot/dts/imx31.dtsi
index 1ce7ae94e7ad..8d4c0e3533fa 100644
--- a/arch/arm/boot/dts/imx31.dtsi
+++ b/arch/arm/boot/dts/imx31.dtsi
@@ -118,13 +118,6 @@
118 interrupts = <19>; 118 interrupts = <19>;
119 clocks = <&clks 25>; 119 clocks = <&clks 25>;
120 }; 120 };
121
122 clks: ccm@53f80000{
123 compatible = "fsl,imx31-ccm";
124 reg = <0x53f80000 0x4000>;
125 interrupts = <0 31 0x04 0 53 0x04>;
126 #clock-cells = <1>;
127 };
128 }; 121 };
129 122
130 aips@53f00000 { /* AIPS2 */ 123 aips@53f00000 { /* AIPS2 */
@@ -134,6 +127,13 @@
134 reg = <0x53f00000 0x100000>; 127 reg = <0x53f00000 0x100000>;
135 ranges; 128 ranges;
136 129
130 clks: ccm@53f80000{
131 compatible = "fsl,imx31-ccm";
132 reg = <0x53f80000 0x4000>;
133 interrupts = <31>, <53>;
134 #clock-cells = <1>;
135 };
136
137 gpt: timer@53f90000 { 137 gpt: timer@53f90000 {
138 compatible = "fsl,imx31-gpt"; 138 compatible = "fsl,imx31-gpt";
139 reg = <0x53f90000 0x4000>; 139 reg = <0x53f90000 0x4000>;
diff --git a/arch/arm/boot/dts/imx6q-cm-fx6.dts b/arch/arm/boot/dts/imx6q-cm-fx6.dts
index 59bc5a4dce17..a150bca84daa 100644
--- a/arch/arm/boot/dts/imx6q-cm-fx6.dts
+++ b/arch/arm/boot/dts/imx6q-cm-fx6.dts
@@ -183,7 +183,6 @@
183 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0 183 MX6QDL_PAD_ENET_REF_CLK__ENET_TX_CLK 0x1b0b0
184 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0 184 MX6QDL_PAD_ENET_MDIO__ENET_MDIO 0x1b0b0
185 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0 185 MX6QDL_PAD_ENET_MDC__ENET_MDC 0x1b0b0
186 MX6QDL_PAD_GPIO_16__ENET_REF_CLK 0x4001b0a8
187 >; 186 >;
188 }; 187 };
189 188
diff --git a/arch/arm/boot/dts/imx6qp.dtsi b/arch/arm/boot/dts/imx6qp.dtsi
index 886dbf2eca49..caaa04036c8a 100644
--- a/arch/arm/boot/dts/imx6qp.dtsi
+++ b/arch/arm/boot/dts/imx6qp.dtsi
@@ -87,3 +87,13 @@
87 }; 87 };
88 }; 88 };
89}; 89};
90
91&ldb {
92 clocks = <&clks IMX6QDL_CLK_LDB_DI0_SEL>, <&clks IMX6QDL_CLK_LDB_DI1_SEL>,
93 <&clks IMX6QDL_CLK_IPU1_DI0_SEL>, <&clks IMX6QDL_CLK_IPU1_DI1_SEL>,
94 <&clks IMX6QDL_CLK_IPU2_DI0_SEL>, <&clks IMX6QDL_CLK_IPU2_DI1_SEL>,
95 <&clks IMX6QDL_CLK_LDB_DI0_PODF>, <&clks IMX6QDL_CLK_LDB_DI1_PODF>;
96 clock-names = "di0_pll", "di1_pll",
97 "di0_sel", "di1_sel", "di2_sel", "di3_sel",
98 "di0", "di1";
99};
diff --git a/arch/arm/boot/dts/imx7d-pinfunc.h b/arch/arm/boot/dts/imx7d-pinfunc.h
index 3f9f0d9c8094..7bc3c00e56c6 100644
--- a/arch/arm/boot/dts/imx7d-pinfunc.h
+++ b/arch/arm/boot/dts/imx7d-pinfunc.h
@@ -43,26 +43,30 @@
43#define MX7D_PAD_GPIO1_IO04__GPIO1_IO4 0x0010 0x0040 0x0000 0x0 0x0 43#define MX7D_PAD_GPIO1_IO04__GPIO1_IO4 0x0010 0x0040 0x0000 0x0 0x0
44#define MX7D_PAD_GPIO1_IO04__USB_OTG1_OC 0x0010 0x0040 0x072C 0x1 0x1 44#define MX7D_PAD_GPIO1_IO04__USB_OTG1_OC 0x0010 0x0040 0x072C 0x1 0x1
45#define MX7D_PAD_GPIO1_IO04__FLEXTIMER1_CH4 0x0010 0x0040 0x0594 0x2 0x1 45#define MX7D_PAD_GPIO1_IO04__FLEXTIMER1_CH4 0x0010 0x0040 0x0594 0x2 0x1
46#define MX7D_PAD_GPIO1_IO04__UART5_CTS_B 0x0010 0x0040 0x0710 0x3 0x4 46#define MX7D_PAD_GPIO1_IO04__UART5_DCE_CTS 0x0010 0x0040 0x0000 0x3 0x0
47#define MX7D_PAD_GPIO1_IO04__UART5_DTE_RTS 0x0010 0x0040 0x0710 0x3 0x4
47#define MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x0010 0x0040 0x05D4 0x4 0x2 48#define MX7D_PAD_GPIO1_IO04__I2C1_SCL 0x0010 0x0040 0x05D4 0x4 0x2
48#define MX7D_PAD_GPIO1_IO04__OBSERVE3_OUT 0x0010 0x0040 0x0000 0x6 0x0 49#define MX7D_PAD_GPIO1_IO04__OBSERVE3_OUT 0x0010 0x0040 0x0000 0x6 0x0
49#define MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x0014 0x0044 0x0000 0x0 0x0 50#define MX7D_PAD_GPIO1_IO05__GPIO1_IO5 0x0014 0x0044 0x0000 0x0 0x0
50#define MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR 0x0014 0x0044 0x0000 0x1 0x0 51#define MX7D_PAD_GPIO1_IO05__USB_OTG1_PWR 0x0014 0x0044 0x0000 0x1 0x0
51#define MX7D_PAD_GPIO1_IO05__FLEXTIMER1_CH5 0x0014 0x0044 0x0598 0x2 0x1 52#define MX7D_PAD_GPIO1_IO05__FLEXTIMER1_CH5 0x0014 0x0044 0x0598 0x2 0x1
52#define MX7D_PAD_GPIO1_IO05__UART5_RTS_B 0x0014 0x0044 0x0710 0x3 0x5 53#define MX7D_PAD_GPIO1_IO05__UART5_DCE_RTS 0x0014 0x0044 0x0710 0x3 0x5
54#define MX7D_PAD_GPIO1_IO05__UART5_DTE_CTS 0x0014 0x0044 0x0000 0x3 0x0
53#define MX7D_PAD_GPIO1_IO05__I2C1_SDA 0x0014 0x0044 0x05D8 0x4 0x2 55#define MX7D_PAD_GPIO1_IO05__I2C1_SDA 0x0014 0x0044 0x05D8 0x4 0x2
54#define MX7D_PAD_GPIO1_IO05__OBSERVE4_OUT 0x0014 0x0044 0x0000 0x6 0x0 56#define MX7D_PAD_GPIO1_IO05__OBSERVE4_OUT 0x0014 0x0044 0x0000 0x6 0x0
55#define MX7D_PAD_GPIO1_IO06__GPIO1_IO6 0x0018 0x0048 0x0000 0x0 0x0 57#define MX7D_PAD_GPIO1_IO06__GPIO1_IO6 0x0018 0x0048 0x0000 0x0 0x0
56#define MX7D_PAD_GPIO1_IO06__USB_OTG2_OC 0x0018 0x0048 0x0728 0x1 0x1 58#define MX7D_PAD_GPIO1_IO06__USB_OTG2_OC 0x0018 0x0048 0x0728 0x1 0x1
57#define MX7D_PAD_GPIO1_IO06__FLEXTIMER1_CH6 0x0018 0x0048 0x059C 0x2 0x1 59#define MX7D_PAD_GPIO1_IO06__FLEXTIMER1_CH6 0x0018 0x0048 0x059C 0x2 0x1
58#define MX7D_PAD_GPIO1_IO06__UART5_RX_DATA 0x0018 0x0048 0x0714 0x3 0x4 60#define MX7D_PAD_GPIO1_IO06__UART5_DCE_RX 0x0018 0x0048 0x0714 0x3 0x4
61#define MX7D_PAD_GPIO1_IO06__UART5_DTE_TX 0x0018 0x0048 0x0000 0x3 0x0
59#define MX7D_PAD_GPIO1_IO06__I2C2_SCL 0x0018 0x0048 0x05DC 0x4 0x2 62#define MX7D_PAD_GPIO1_IO06__I2C2_SCL 0x0018 0x0048 0x05DC 0x4 0x2
60#define MX7D_PAD_GPIO1_IO06__CCM_WAIT 0x0018 0x0048 0x0000 0x5 0x0 63#define MX7D_PAD_GPIO1_IO06__CCM_WAIT 0x0018 0x0048 0x0000 0x5 0x0
61#define MX7D_PAD_GPIO1_IO06__KPP_ROW4 0x0018 0x0048 0x0624 0x6 0x1 64#define MX7D_PAD_GPIO1_IO06__KPP_ROW4 0x0018 0x0048 0x0624 0x6 0x1
62#define MX7D_PAD_GPIO1_IO07__GPIO1_IO7 0x001C 0x004C 0x0000 0x0 0x0 65#define MX7D_PAD_GPIO1_IO07__GPIO1_IO7 0x001C 0x004C 0x0000 0x0 0x0
63#define MX7D_PAD_GPIO1_IO07__USB_OTG2_PWR 0x001C 0x004C 0x0000 0x1 0x0 66#define MX7D_PAD_GPIO1_IO07__USB_OTG2_PWR 0x001C 0x004C 0x0000 0x1 0x0
64#define MX7D_PAD_GPIO1_IO07__FLEXTIMER1_CH7 0x001C 0x004C 0x05A0 0x2 0x1 67#define MX7D_PAD_GPIO1_IO07__FLEXTIMER1_CH7 0x001C 0x004C 0x05A0 0x2 0x1
65#define MX7D_PAD_GPIO1_IO07__UART5_TX_DATA 0x001C 0x004C 0x0714 0x3 0x5 68#define MX7D_PAD_GPIO1_IO07__UART5_DCE_TX 0x001C 0x004C 0x0000 0x3 0x0
69#define MX7D_PAD_GPIO1_IO07__UART5_DTE_RX 0x001C 0x004C 0x0714 0x3 0x5
66#define MX7D_PAD_GPIO1_IO07__I2C2_SDA 0x001C 0x004C 0x05E0 0x4 0x2 70#define MX7D_PAD_GPIO1_IO07__I2C2_SDA 0x001C 0x004C 0x05E0 0x4 0x2
67#define MX7D_PAD_GPIO1_IO07__CCM_STOP 0x001C 0x004C 0x0000 0x5 0x0 71#define MX7D_PAD_GPIO1_IO07__CCM_STOP 0x001C 0x004C 0x0000 0x5 0x0
68#define MX7D_PAD_GPIO1_IO07__KPP_COL4 0x001C 0x004C 0x0604 0x6 0x1 72#define MX7D_PAD_GPIO1_IO07__KPP_COL4 0x001C 0x004C 0x0604 0x6 0x1
diff --git a/arch/arm/mach-davinci/da850.c b/arch/arm/mach-davinci/da850.c
index ed3d0e9f72ac..6d8c8fa75ff1 100644
--- a/arch/arm/mach-davinci/da850.c
+++ b/arch/arm/mach-davinci/da850.c
@@ -424,6 +424,16 @@ static struct clk ehrpwm_clk = {
424 .gpsc = 1, 424 .gpsc = 1,
425}; 425};
426 426
427static struct clk ehrpwm0_clk = {
428 .name = "ehrpwm0",
429 .parent = &ehrpwm_clk,
430};
431
432static struct clk ehrpwm1_clk = {
433 .name = "ehrpwm1",
434 .parent = &ehrpwm_clk,
435};
436
427#define DA8XX_EHRPWM_TBCLKSYNC BIT(12) 437#define DA8XX_EHRPWM_TBCLKSYNC BIT(12)
428 438
429static void ehrpwm_tblck_enable(struct clk *clk) 439static void ehrpwm_tblck_enable(struct clk *clk)
@@ -451,6 +461,16 @@ static struct clk ehrpwm_tbclk = {
451 .clk_disable = ehrpwm_tblck_disable, 461 .clk_disable = ehrpwm_tblck_disable,
452}; 462};
453 463
464static struct clk ehrpwm0_tbclk = {
465 .name = "ehrpwm0_tbclk",
466 .parent = &ehrpwm_tbclk,
467};
468
469static struct clk ehrpwm1_tbclk = {
470 .name = "ehrpwm1_tbclk",
471 .parent = &ehrpwm_tbclk,
472};
473
454static struct clk ecap_clk = { 474static struct clk ecap_clk = {
455 .name = "ecap", 475 .name = "ecap",
456 .parent = &async3_clk, 476 .parent = &async3_clk,
@@ -458,6 +478,21 @@ static struct clk ecap_clk = {
458 .gpsc = 1, 478 .gpsc = 1,
459}; 479};
460 480
481static struct clk ecap0_clk = {
482 .name = "ecap0_clk",
483 .parent = &ecap_clk,
484};
485
486static struct clk ecap1_clk = {
487 .name = "ecap1_clk",
488 .parent = &ecap_clk,
489};
490
491static struct clk ecap2_clk = {
492 .name = "ecap2_clk",
493 .parent = &ecap_clk,
494};
495
461static struct clk_lookup da850_clks[] = { 496static struct clk_lookup da850_clks[] = {
462 CLK(NULL, "ref", &ref_clk), 497 CLK(NULL, "ref", &ref_clk),
463 CLK(NULL, "pll0", &pll0_clk), 498 CLK(NULL, "pll0", &pll0_clk),
@@ -510,9 +545,16 @@ static struct clk_lookup da850_clks[] = {
510 CLK("vpif", NULL, &vpif_clk), 545 CLK("vpif", NULL, &vpif_clk),
511 CLK("ahci_da850", NULL, &sata_clk), 546 CLK("ahci_da850", NULL, &sata_clk),
512 CLK("davinci-rproc.0", NULL, &dsp_clk), 547 CLK("davinci-rproc.0", NULL, &dsp_clk),
513 CLK("ehrpwm", "fck", &ehrpwm_clk), 548 CLK(NULL, NULL, &ehrpwm_clk),
514 CLK("ehrpwm", "tbclk", &ehrpwm_tbclk), 549 CLK("ehrpwm.0", "fck", &ehrpwm0_clk),
515 CLK("ecap", "fck", &ecap_clk), 550 CLK("ehrpwm.1", "fck", &ehrpwm1_clk),
551 CLK(NULL, NULL, &ehrpwm_tbclk),
552 CLK("ehrpwm.0", "tbclk", &ehrpwm0_tbclk),
553 CLK("ehrpwm.1", "tbclk", &ehrpwm1_tbclk),
554 CLK(NULL, NULL, &ecap_clk),
555 CLK("ecap.0", "fck", &ecap0_clk),
556 CLK("ecap.1", "fck", &ecap1_clk),
557 CLK("ecap.2", "fck", &ecap2_clk),
516 CLK(NULL, NULL, NULL), 558 CLK(NULL, NULL, NULL),
517}; 559};
518 560
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index c9f7e9274aa8..cd97f783ecf2 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -23,11 +23,11 @@ static struct of_dev_auxdata da850_auxdata_lookup[] __initdata = {
23 OF_DEV_AUXDATA("ti,davinci-i2c", 0x01e28000, "i2c_davinci.2", NULL), 23 OF_DEV_AUXDATA("ti,davinci-i2c", 0x01e28000, "i2c_davinci.2", NULL),
24 OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "davinci-wdt", NULL), 24 OF_DEV_AUXDATA("ti,davinci-wdt", 0x01c21000, "davinci-wdt", NULL),
25 OF_DEV_AUXDATA("ti,da830-mmc", 0x01c40000, "da830-mmc.0", NULL), 25 OF_DEV_AUXDATA("ti,da830-mmc", 0x01c40000, "da830-mmc.0", NULL),
26 OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f00000, "ehrpwm", NULL), 26 OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f00000, "ehrpwm.0", NULL),
27 OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f02000, "ehrpwm", NULL), 27 OF_DEV_AUXDATA("ti,da850-ehrpwm", 0x01f02000, "ehrpwm.1", NULL),
28 OF_DEV_AUXDATA("ti,da850-ecap", 0x01f06000, "ecap", NULL), 28 OF_DEV_AUXDATA("ti,da850-ecap", 0x01f06000, "ecap.0", NULL),
29 OF_DEV_AUXDATA("ti,da850-ecap", 0x01f07000, "ecap", NULL), 29 OF_DEV_AUXDATA("ti,da850-ecap", 0x01f07000, "ecap.1", NULL),
30 OF_DEV_AUXDATA("ti,da850-ecap", 0x01f08000, "ecap", NULL), 30 OF_DEV_AUXDATA("ti,da850-ecap", 0x01f08000, "ecap.2", NULL),
31 OF_DEV_AUXDATA("ti,da830-spi", 0x01c41000, "spi_davinci.0", NULL), 31 OF_DEV_AUXDATA("ti,da830-spi", 0x01c41000, "spi_davinci.0", NULL),
32 OF_DEV_AUXDATA("ti,da830-spi", 0x01f0e000, "spi_davinci.1", NULL), 32 OF_DEV_AUXDATA("ti,da830-spi", 0x01f0e000, "spi_davinci.1", NULL),
33 OF_DEV_AUXDATA("ns16550a", 0x01c42000, "serial8250.0", NULL), 33 OF_DEV_AUXDATA("ns16550a", 0x01c42000, "serial8250.0", NULL),
diff --git a/arch/arm/mach-imx/common.h b/arch/arm/mach-imx/common.h
index c4436d9c52ff..b09a2ec19267 100644
--- a/arch/arm/mach-imx/common.h
+++ b/arch/arm/mach-imx/common.h
@@ -43,7 +43,6 @@ int mx21_clocks_init(unsigned long lref, unsigned long fref);
43int mx27_clocks_init(unsigned long fref); 43int mx27_clocks_init(unsigned long fref);
44int mx31_clocks_init(unsigned long fref); 44int mx31_clocks_init(unsigned long fref);
45int mx35_clocks_init(void); 45int mx35_clocks_init(void);
46int mx31_clocks_init_dt(void);
47struct platform_device *mxc_register_gpio(char *name, int id, 46struct platform_device *mxc_register_gpio(char *name, int id,
48 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high); 47 resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
49void mxc_set_cpu_type(unsigned int type); 48void mxc_set_cpu_type(unsigned int type);
diff --git a/arch/arm/mach-imx/imx31-dt.c b/arch/arm/mach-imx/imx31-dt.c
index 62e6b4fb5370..668d74b72511 100644
--- a/arch/arm/mach-imx/imx31-dt.c
+++ b/arch/arm/mach-imx/imx31-dt.c
@@ -23,11 +23,6 @@ static const char * const imx31_dt_board_compat[] __initconst = {
23 NULL 23 NULL
24}; 24};
25 25
26static void __init imx31_dt_timer_init(void)
27{
28 mx31_clocks_init_dt();
29}
30
31/* FIXME: replace with DT binding */ 26/* FIXME: replace with DT binding */
32static const struct resource imx31_rnga_res[] __initconst = { 27static const struct resource imx31_rnga_res[] __initconst = {
33 DEFINE_RES_MEM(MX31_RNGA_BASE_ADDR, SZ_16K), 28 DEFINE_RES_MEM(MX31_RNGA_BASE_ADDR, SZ_16K),
@@ -43,7 +38,6 @@ DT_MACHINE_START(IMX31_DT, "Freescale i.MX31 (Device Tree Support)")
43 .map_io = mx31_map_io, 38 .map_io = mx31_map_io,
44 .init_early = imx31_init_early, 39 .init_early = imx31_init_early,
45 .init_irq = mx31_init_irq, 40 .init_irq = mx31_init_irq,
46 .init_time = imx31_dt_timer_init,
47 .init_machine = imx31_dt_mach_init, 41 .init_machine = imx31_dt_mach_init,
48 .dt_compat = imx31_dt_board_compat, 42 .dt_compat = imx31_dt_board_compat,
49MACHINE_END 43MACHINE_END
diff --git a/arch/arm/mach-ixp4xx/dsmg600-setup.c b/arch/arm/mach-ixp4xx/dsmg600-setup.c
index 43ee06d3abe5..b3bd0e137f6d 100644
--- a/arch/arm/mach-ixp4xx/dsmg600-setup.c
+++ b/arch/arm/mach-ixp4xx/dsmg600-setup.c
@@ -26,7 +26,6 @@
26#include <linux/reboot.h> 26#include <linux/reboot.h>
27#include <linux/i2c.h> 27#include <linux/i2c.h>
28#include <linux/i2c-gpio.h> 28#include <linux/i2c-gpio.h>
29#include <linux/gpio.h>
30 29
31#include <mach/hardware.h> 30#include <mach/hardware.h>
32 31
diff --git a/arch/arm/mach-lpc32xx/phy3250.c b/arch/arm/mach-lpc32xx/phy3250.c
index 0e4cbbe980eb..6c52bd32610e 100644
--- a/arch/arm/mach-lpc32xx/phy3250.c
+++ b/arch/arm/mach-lpc32xx/phy3250.c
@@ -23,7 +23,6 @@
23#include <linux/interrupt.h> 23#include <linux/interrupt.h>
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <linux/dma-mapping.h> 25#include <linux/dma-mapping.h>
26#include <linux/device.h>
27#include <linux/gpio.h> 26#include <linux/gpio.h>
28#include <linux/amba/bus.h> 27#include <linux/amba/bus.h>
29#include <linux/amba/clcd.h> 28#include <linux/amba/clcd.h>
diff --git a/arch/arm/mach-omap2/board-generic.c b/arch/arm/mach-omap2/board-generic.c
index bab814d2f37d..714cfa217605 100644
--- a/arch/arm/mach-omap2/board-generic.c
+++ b/arch/arm/mach-omap2/board-generic.c
@@ -30,8 +30,6 @@ static const struct of_device_id omap_dt_match_table[] __initconst = {
30 30
31static void __init omap_generic_init(void) 31static void __init omap_generic_init(void)
32{ 32{
33 omapdss_early_init_of();
34
35 pdata_quirks_init(omap_dt_match_table); 33 pdata_quirks_init(omap_dt_match_table);
36 34
37 omapdss_init_of(); 35 omapdss_init_of();
diff --git a/arch/arm/mach-omap2/common.h b/arch/arm/mach-omap2/common.h
index deed42e1dd9c..cd5b760f961d 100644
--- a/arch/arm/mach-omap2/common.h
+++ b/arch/arm/mach-omap2/common.h
@@ -332,7 +332,6 @@ extern int omap_dss_reset(struct omap_hwmod *);
332int omap_clk_init(void); 332int omap_clk_init(void);
333 333
334int __init omapdss_init_of(void); 334int __init omapdss_init_of(void);
335void __init omapdss_early_init_of(void);
336 335
337#endif /* __ASSEMBLER__ */ 336#endif /* __ASSEMBLER__ */
338#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */ 337#endif /* __ARCH_ARM_MACH_OMAP2PLUS_COMMON_H */
diff --git a/arch/arm/mach-omap2/display.c b/arch/arm/mach-omap2/display.c
index 70b3eaf085e4..e71cca0950e9 100644
--- a/arch/arm/mach-omap2/display.c
+++ b/arch/arm/mach-omap2/display.c
@@ -565,11 +565,6 @@ int omap_dss_reset(struct omap_hwmod *oh)
565 return r; 565 return r;
566} 566}
567 567
568void __init omapdss_early_init_of(void)
569{
570
571}
572
573static const char * const omapdss_compat_names[] __initconst = { 568static const char * const omapdss_compat_names[] __initconst = {
574 "ti,omap2-dss", 569 "ti,omap2-dss",
575 "ti,omap3-dss", 570 "ti,omap3-dss",
diff --git a/arch/arm/mach-omap2/pm-debug.c b/arch/arm/mach-omap2/pm-debug.c
index 0b339861d751..003a6cb248be 100644
--- a/arch/arm/mach-omap2/pm-debug.c
+++ b/arch/arm/mach-omap2/pm-debug.c
@@ -114,8 +114,7 @@ static int pwrdm_dbg_show_counter(struct powerdomain *pwrdm, void *user)
114 seq_printf(s, ",RET-MEMBANK%d-OFF:%d", i + 1, 114 seq_printf(s, ",RET-MEMBANK%d-OFF:%d", i + 1,
115 pwrdm->ret_mem_off_counter[i]); 115 pwrdm->ret_mem_off_counter[i]);
116 116
117 seq_printf(s, "\n"); 117 seq_putc(s, '\n');
118
119 return 0; 118 return 0;
120} 119}
121 120
@@ -138,7 +137,7 @@ static int pwrdm_dbg_show_timer(struct powerdomain *pwrdm, void *user)
138 seq_printf(s, ",%s:%lld", pwrdm_state_names[i], 137 seq_printf(s, ",%s:%lld", pwrdm_state_names[i],
139 pwrdm->state_timer[i]); 138 pwrdm->state_timer[i]);
140 139
141 seq_printf(s, "\n"); 140 seq_putc(s, '\n');
142 return 0; 141 return 0;
143} 142}
144 143
diff --git a/arch/arm/mach-socfpga/l2_cache.c b/arch/arm/mach-socfpga/l2_cache.c
index 4267c95f2158..bb359d727b34 100644
--- a/arch/arm/mach-socfpga/l2_cache.c
+++ b/arch/arm/mach-socfpga/l2_cache.c
@@ -74,7 +74,7 @@ void socfpga_init_arria10_l2_ecc(void)
74 } 74 }
75 75
76 if (!sys_manager_base_addr) { 76 if (!sys_manager_base_addr) {
77 pr_err("System Mananger not mapped for L2 ECC\n"); 77 pr_err("System Manager not mapped for L2 ECC\n");
78 goto exit; 78 goto exit;
79 } 79 }
80 /* Clear any pending IRQs */ 80 /* Clear any pending IRQs */
diff --git a/arch/arm/mach-spear/time.c b/arch/arm/mach-spear/time.c
index 9ccffc1d0f28..4878ba90026d 100644
--- a/arch/arm/mach-spear/time.c
+++ b/arch/arm/mach-spear/time.c
@@ -233,7 +233,7 @@ void __init spear_setup_of_timer(void)
233 } 233 }
234 234
235 gpt_clk = clk_get_sys("gpt0", NULL); 235 gpt_clk = clk_get_sys("gpt0", NULL);
236 if (!gpt_clk) { 236 if (IS_ERR(gpt_clk)) {
237 pr_err("%s:couldn't get clk for gpt\n", __func__); 237 pr_err("%s:couldn't get clk for gpt\n", __func__);
238 goto err_iomap; 238 goto err_iomap;
239 } 239 }
diff --git a/arch/arm/mach-zx/zx296702-pm-domain.c b/arch/arm/mach-zx/zx296702-pm-domain.c
index e08574d4e2ca..79dcf2549267 100644
--- a/arch/arm/mach-zx/zx296702-pm-domain.c
+++ b/arch/arm/mach-zx/zx296702-pm-domain.c
@@ -169,7 +169,7 @@ static int zx296702_pd_probe(struct platform_device *pdev)
169 } 169 }
170 170
171 pcubase = devm_ioremap_resource(&pdev->dev, res); 171 pcubase = devm_ioremap_resource(&pdev->dev, res);
172 if (!pcubase) { 172 if (IS_ERR(pcubase)) {
173 dev_err(&pdev->dev, "ioremap fail.\n"); 173 dev_err(&pdev->dev, "ioremap fail.\n");
174 return -EIO; 174 return -EIO;
175 } 175 }
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
index 5fda583351d7..906fb836d241 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
+++ b/arch/arm64/boot/dts/nvidia/tegra210-p2180.dtsi
@@ -21,6 +21,10 @@
21 reg = <0x0 0x80000000 0x1 0x0>; 21 reg = <0x0 0x80000000 0x1 0x0>;
22 }; 22 };
23 23
24 gpu@57000000 {
25 vdd-supply = <&vdd_gpu>;
26 };
27
24 /* debug port */ 28 /* debug port */
25 serial@70006000 { 29 serial@70006000 {
26 status = "okay"; 30 status = "okay";
@@ -291,4 +295,18 @@
291 clock-frequency = <32768>; 295 clock-frequency = <32768>;
292 }; 296 };
293 }; 297 };
298
299 regulators {
300 vdd_gpu: regulator@100 {
301 compatible = "pwm-regulator";
302 reg = <100>;
303 pwms = <&pwm 1 4880>;
304 regulator-name = "VDD_GPU";
305 regulator-min-microvolt = <710000>;
306 regulator-max-microvolt = <1320000>;
307 enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>;
308 regulator-ramp-delay = <80>;
309 regulator-enable-ramp-delay = <1000>;
310 };
311 };
294}; 312};
diff --git a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
index c2becb603e11..7703227f5d1a 100644
--- a/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
+++ b/arch/arm64/boot/dts/nvidia/tegra210-smaug.dts
@@ -11,7 +11,8 @@
11 compatible = "google,smaug-rev8", "google,smaug-rev7", 11 compatible = "google,smaug-rev8", "google,smaug-rev7",
12 "google,smaug-rev6", "google,smaug-rev5", 12 "google,smaug-rev6", "google,smaug-rev5",
13 "google,smaug-rev4", "google,smaug-rev3", 13 "google,smaug-rev4", "google,smaug-rev3",
14 "google,smaug-rev1", "google,smaug", "nvidia,tegra210"; 14 "google,smaug-rev2", "google,smaug-rev1",
15 "google,smaug", "nvidia,tegra210";
15 16
16 aliases { 17 aliases {
17 serial0 = &uarta; 18 serial0 = &uarta;
diff --git a/arch/arm64/boot/dts/zte/zx296718.dtsi b/arch/arm64/boot/dts/zte/zx296718.dtsi
index a223066f24ce..dd2cd73c774c 100644
--- a/arch/arm64/boot/dts/zte/zx296718.dtsi
+++ b/arch/arm64/boot/dts/zte/zx296718.dtsi
@@ -239,16 +239,9 @@
239 compatible = "arm,gic-v3"; 239 compatible = "arm,gic-v3";
240 #interrupt-cells = <3>; 240 #interrupt-cells = <3>;
241 #address-cells = <0>; 241 #address-cells = <0>;
242 #redistributor-regions = <6>;
243 redistributor-stride = <0x0 0x40000>;
244 interrupt-controller; 242 interrupt-controller;
245 reg = <0x02a00000 0x10000>, 243 reg = <0x02a00000 0x10000>,
246 <0x02b00000 0x20000>, 244 <0x02b00000 0xc0000>;
247 <0x02b20000 0x20000>,
248 <0x02b40000 0x20000>,
249 <0x02b60000 0x20000>,
250 <0x02b80000 0x20000>,
251 <0x02ba0000 0x20000>;
252 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; 245 interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
253 }; 246 };
254 247
diff --git a/drivers/bus/vexpress-config.c b/drivers/bus/vexpress-config.c
index 9efdf1de4035..493e7b9fc813 100644
--- a/drivers/bus/vexpress-config.c
+++ b/drivers/bus/vexpress-config.c
@@ -171,6 +171,7 @@ static int vexpress_config_populate(struct device_node *node)
171{ 171{
172 struct device_node *bridge; 172 struct device_node *bridge;
173 struct device *parent; 173 struct device *parent;
174 int ret;
174 175
175 bridge = of_parse_phandle(node, "arm,vexpress,config-bridge", 0); 176 bridge = of_parse_phandle(node, "arm,vexpress,config-bridge", 0);
176 if (!bridge) 177 if (!bridge)
@@ -182,7 +183,11 @@ static int vexpress_config_populate(struct device_node *node)
182 if (WARN_ON(!parent)) 183 if (WARN_ON(!parent))
183 return -ENODEV; 184 return -ENODEV;
184 185
185 return of_platform_populate(node, NULL, NULL, parent); 186 ret = of_platform_populate(node, NULL, NULL, parent);
187
188 put_device(parent);
189
190 return ret;
186} 191}
187 192
188static int __init vexpress_config_init(void) 193static int __init vexpress_config_init(void)
diff --git a/drivers/clk/imx/clk-imx31.c b/drivers/clk/imx/clk-imx31.c
index 6a964144a5b5..cbce308aad04 100644
--- a/drivers/clk/imx/clk-imx31.c
+++ b/drivers/clk/imx/clk-imx31.c
@@ -21,6 +21,7 @@
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/of.h> 23#include <linux/of.h>
24#include <linux/of_address.h>
24#include <soc/imx/revision.h> 25#include <soc/imx/revision.h>
25#include <soc/imx/timer.h> 26#include <soc/imx/timer.h>
26#include <asm/irq.h> 27#include <asm/irq.h>
@@ -72,14 +73,8 @@ static struct clk ** const uart_clks[] __initconst = {
72 NULL 73 NULL
73}; 74};
74 75
75static void __init _mx31_clocks_init(unsigned long fref) 76static void __init _mx31_clocks_init(void __iomem *base, unsigned long fref)
76{ 77{
77 void __iomem *base;
78 struct device_node *np;
79
80 base = ioremap(MX31_CCM_BASE_ADDR, SZ_4K);
81 BUG_ON(!base);
82
83 clk[dummy] = imx_clk_fixed("dummy", 0); 78 clk[dummy] = imx_clk_fixed("dummy", 0);
84 clk[ckih] = imx_clk_fixed("ckih", fref); 79 clk[ckih] = imx_clk_fixed("ckih", fref);
85 clk[ckil] = imx_clk_fixed("ckil", 32768); 80 clk[ckil] = imx_clk_fixed("ckil", 32768);
@@ -147,21 +142,17 @@ static void __init _mx31_clocks_init(unsigned long fref)
147 clk_prepare_enable(clk[iim_gate]); 142 clk_prepare_enable(clk[iim_gate]);
148 mx31_revision(); 143 mx31_revision();
149 clk_disable_unprepare(clk[iim_gate]); 144 clk_disable_unprepare(clk[iim_gate]);
150
151 np = of_find_compatible_node(NULL, NULL, "fsl,imx31-ccm");
152
153 if (np) {
154 clk_data.clks = clk;
155 clk_data.clk_num = ARRAY_SIZE(clk);
156 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
157 }
158} 145}
159 146
160int __init mx31_clocks_init(void) 147int __init mx31_clocks_init(unsigned long fref)
161{ 148{
162 u32 fref = 26000000; /* default */ 149 void __iomem *base;
150
151 base = ioremap(MX31_CCM_BASE_ADDR, SZ_4K);
152 if (!base)
153 panic("%s: failed to map registers\n", __func__);
163 154
164 _mx31_clocks_init(fref); 155 _mx31_clocks_init(base, fref);
165 156
166 clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0"); 157 clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");
167 clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0"); 158 clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
@@ -224,22 +215,31 @@ int __init mx31_clocks_init(void)
224 return 0; 215 return 0;
225} 216}
226 217
227int __init mx31_clocks_init_dt(void) 218static void __init mx31_clocks_init_dt(struct device_node *np)
228{ 219{
229 struct device_node *np; 220 struct device_node *osc_np;
230 u32 fref = 26000000; /* default */ 221 u32 fref = 26000000; /* default */
222 void __iomem *ccm;
231 223
232 for_each_compatible_node(np, NULL, "fixed-clock") { 224 for_each_compatible_node(osc_np, NULL, "fixed-clock") {
233 if (!of_device_is_compatible(np, "fsl,imx-osc26m")) 225 if (!of_device_is_compatible(osc_np, "fsl,imx-osc26m"))
234 continue; 226 continue;
235 227
236 if (!of_property_read_u32(np, "clock-frequency", &fref)) { 228 if (!of_property_read_u32(osc_np, "clock-frequency", &fref)) {
237 of_node_put(np); 229 of_node_put(osc_np);
238 break; 230 break;
239 } 231 }
240 } 232 }
241 233
242 _mx31_clocks_init(fref); 234 ccm = of_iomap(np, 0);
235 if (!ccm)
236 panic("%s: failed to map registers\n", __func__);
243 237
244 return 0; 238 _mx31_clocks_init(ccm, fref);
239
240 clk_data.clks = clk;
241 clk_data.clk_num = ARRAY_SIZE(clk);
242 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
245} 243}
244
245CLK_OF_DECLARE(imx31_ccm, "fsl,imx31-ccm", mx31_clocks_init_dt);
diff --git a/drivers/soc/ti/knav_qmss_queue.c b/drivers/soc/ti/knav_qmss_queue.c
index b73e3534f67b..eacad57f2977 100644
--- a/drivers/soc/ti/knav_qmss_queue.c
+++ b/drivers/soc/ti/knav_qmss_queue.c
@@ -1228,7 +1228,7 @@ static int knav_setup_queue_range(struct knav_device *kdev,
1228 1228
1229 range->num_irqs++; 1229 range->num_irqs++;
1230 1230
1231 if (oirq.args_count == 3) 1231 if (IS_ENABLED(CONFIG_SMP) && oirq.args_count == 3)
1232 range->irqs[i].cpu_map = 1232 range->irqs[i].cpu_map =
1233 (oirq.args[2] & 0x0000ff00) >> 8; 1233 (oirq.args[2] & 0x0000ff00) >> 8;
1234 } 1234 }
diff --git a/include/linux/mfd/tps65217.h b/include/linux/mfd/tps65217.h
index 4ccda8969639..3cbec4b2496a 100644
--- a/include/linux/mfd/tps65217.h
+++ b/include/linux/mfd/tps65217.h
@@ -234,12 +234,11 @@ struct tps65217_bl_pdata {
234 int dft_brightness; 234 int dft_brightness;
235}; 235};
236 236
237enum tps65217_irq_type { 237/* Interrupt numbers */
238 TPS65217_IRQ_PB, 238#define TPS65217_IRQ_USB 0
239 TPS65217_IRQ_AC, 239#define TPS65217_IRQ_AC 1
240 TPS65217_IRQ_USB, 240#define TPS65217_IRQ_PB 2
241 TPS65217_NUM_IRQ 241#define TPS65217_NUM_IRQ 3
242};
243 242
244/** 243/**
245 * struct tps65217_board - packages regulator init data 244 * struct tps65217_board - packages regulator init data