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authorChris Paterson <chris.paterson2@renesas.com>2016-11-22 08:49:03 -0500
committerGeert Uytterhoeven <geert+renesas@glider.be>2016-12-27 04:57:38 -0500
commit3dc93dcea67c967308db8ba00bac1334cf43a083 (patch)
treed9fc4e432e21900bd96fc1caa3c4727bbbfc0c7e
parentcf75341accab1a90895936cff380c38f6d0777f5 (diff)
pinctrl: sh-pfc: r8a7796: Add CAN FD support
This patch adds CAN FD[0-1] pinmux support to r8a7796 SoC. Based on a patch for r8a7795 by Ramesh Shanmugasundaram. Signed-off-by: Chris Paterson <chris.paterson2@renesas.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
-rw-r--r--drivers/pinctrl/sh-pfc/pfc-r8a7796.c37
1 files changed, 37 insertions, 0 deletions
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
index cd7157a8543f..30cbc0d20b08 100644
--- a/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
+++ b/drivers/pinctrl/sh-pfc/pfc-r8a7796.c
@@ -1679,6 +1679,29 @@ static const unsigned int can_clk_mux[] = {
1679 CAN_CLK_MARK, 1679 CAN_CLK_MARK,
1680}; 1680};
1681 1681
1682/* - CAN FD --------------------------------------------------------------- */
1683static const unsigned int canfd0_data_a_pins[] = {
1684 /* TX, RX */
1685 RCAR_GP_PIN(1, 23), RCAR_GP_PIN(1, 24),
1686};
1687static const unsigned int canfd0_data_a_mux[] = {
1688 CANFD0_TX_A_MARK, CANFD0_RX_A_MARK,
1689};
1690static const unsigned int canfd0_data_b_pins[] = {
1691 /* TX, RX */
1692 RCAR_GP_PIN(2, 0), RCAR_GP_PIN(2, 1),
1693};
1694static const unsigned int canfd0_data_b_mux[] = {
1695 CANFD0_TX_B_MARK, CANFD0_RX_B_MARK,
1696};
1697static const unsigned int canfd1_data_pins[] = {
1698 /* TX, RX */
1699 RCAR_GP_PIN(1, 22), RCAR_GP_PIN(1, 26),
1700};
1701static const unsigned int canfd1_data_mux[] = {
1702 CANFD1_TX_MARK, CANFD1_RX_MARK,
1703};
1704
1682/* - DRIF0 --------------------------------------------------------------- */ 1705/* - DRIF0 --------------------------------------------------------------- */
1683static const unsigned int drif0_ctrl_a_pins[] = { 1706static const unsigned int drif0_ctrl_a_pins[] = {
1684 /* CLK, SYNC */ 1707 /* CLK, SYNC */
@@ -2461,6 +2484,9 @@ static const struct sh_pfc_pin_group pinmux_groups[] = {
2461 SH_PFC_PIN_GROUP(can0_data_b), 2484 SH_PFC_PIN_GROUP(can0_data_b),
2462 SH_PFC_PIN_GROUP(can1_data), 2485 SH_PFC_PIN_GROUP(can1_data),
2463 SH_PFC_PIN_GROUP(can_clk), 2486 SH_PFC_PIN_GROUP(can_clk),
2487 SH_PFC_PIN_GROUP(canfd0_data_a),
2488 SH_PFC_PIN_GROUP(canfd0_data_b),
2489 SH_PFC_PIN_GROUP(canfd1_data),
2464 SH_PFC_PIN_GROUP(drif0_ctrl_a), 2490 SH_PFC_PIN_GROUP(drif0_ctrl_a),
2465 SH_PFC_PIN_GROUP(drif0_data0_a), 2491 SH_PFC_PIN_GROUP(drif0_data0_a),
2466 SH_PFC_PIN_GROUP(drif0_data1_a), 2492 SH_PFC_PIN_GROUP(drif0_data1_a),
@@ -2588,6 +2614,15 @@ static const char * const can_clk_groups[] = {
2588 "can_clk", 2614 "can_clk",
2589}; 2615};
2590 2616
2617static const char * const canfd0_groups[] = {
2618 "canfd0_data_a",
2619 "canfd0_data_b",
2620};
2621
2622static const char * const canfd1_groups[] = {
2623 "canfd1_data",
2624};
2625
2591static const char * const drif0_groups[] = { 2626static const char * const drif0_groups[] = {
2592 "drif0_ctrl_a", 2627 "drif0_ctrl_a",
2593 "drif0_data0_a", 2628 "drif0_data0_a",
@@ -2750,6 +2785,8 @@ static const struct sh_pfc_function pinmux_functions[] = {
2750 SH_PFC_FUNCTION(can0), 2785 SH_PFC_FUNCTION(can0),
2751 SH_PFC_FUNCTION(can1), 2786 SH_PFC_FUNCTION(can1),
2752 SH_PFC_FUNCTION(can_clk), 2787 SH_PFC_FUNCTION(can_clk),
2788 SH_PFC_FUNCTION(canfd0),
2789 SH_PFC_FUNCTION(canfd1),
2753 SH_PFC_FUNCTION(drif0), 2790 SH_PFC_FUNCTION(drif0),
2754 SH_PFC_FUNCTION(drif1), 2791 SH_PFC_FUNCTION(drif1),
2755 SH_PFC_FUNCTION(drif2), 2792 SH_PFC_FUNCTION(drif2),