Merge tag 'drm-fixes-for-v4.10-rc8' of git://people.freedesktop.org/~airlied/linux

Pull drm fixes from Dave Airlie:
 "This should be the final set of drm fixes for 4.10: one vmwgfx boot
  fix, one vc4 fix, and a few i915 fixes:

* tag 'drm-fixes-for-v4.10-rc8' of git://people.freedesktop.org/~airlied/linux:
  drm: vc4: adapt to new behaviour of drm_crtc.c
  drm/i915: Always convert incoming exec offsets to non-canonical
  drm/i915: Remove overzealous fence warn on runtime suspend
  drm/i915/bxt: Add MST support when do DPLL calculation
  drm/i915: don't warn about Skylake CPU - KabyPoint PCH combo
  drm/i915: fix i915 running as dom0 under Xen
  drm/i915: Flush untouched framebuffers before display on !llc
  drm/i915: fix use-after-free in page_flip_completed()
  drm/vmwgfx: Fix depth input into drm_mode_legacy_fb_format

8 files changed, 36 insertions, 18 deletions

diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index b2c4a0b8a627..728ca3ea74d2 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -213,7 +213,8 @@ static void intel_detect_pch(struct drm_device *dev)
                         } else if (id == INTEL_PCH_KBP_DEVICE_ID_TYPE) {
                                 dev_priv->pch_type = PCH_KBP;
                                 DRM_DEBUG_KMS("Found KabyPoint PCH\n");
-                                WARN_ON(!IS_KABYLAKE(dev_priv));
+                                WARN_ON(!IS_SKYLAKE(dev_priv) &&
+                                        !IS_KABYLAKE(dev_priv));
                         } else if ((id == INTEL_PCH_P2X_DEVICE_ID_TYPE) ||
                                    (id == INTEL_PCH_P3X_DEVICE_ID_TYPE) ||
                                    ((id == INTEL_PCH_QEMU_DEVICE_ID_TYPE) &&
@@ -2427,6 +2428,7 @@ static int intel_runtime_resume(struct device *kdev)
          * we can do is to hope that things will still work (and disable RPM).
          */
         i915_gem_init_swizzling(dev_priv);
+        i915_gem_restore_fences(dev_priv);
 
         intel_runtime_pm_enable_interrupts(dev_priv);
 
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 4b23a7814713..24b5b046754b 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2010,8 +2010,16 @@ void i915_gem_runtime_suspend(struct drm_i915_private *dev_priv)
         for (i = 0; i < dev_priv->num_fence_regs; i++) {
                 struct drm_i915_fence_reg *reg = &dev_priv->fence_regs[i];
 
-                if (WARN_ON(reg->pin_count))
-                        continue;
+                /* Ideally we want to assert that the fence register is not
+                 * live at this point (i.e. that no piece of code will be
+                 * trying to write through fence + GTT, as that both violates
+                 * our tracking of activity and associated locking/barriers,
+                 * but also is illegal given that the hw is powered down).
+                 *
+                 * Previously we used reg->pin_count as a "liveness" indicator.
+                 * That is not sufficient, and we need a more fine-grained
+                 * tool if we want to have a sanity check here.
+                 */
 
                 if (!reg->vma)
                         continue;
@@ -3478,7 +3486,7 @@ i915_gem_object_pin_to_display_plane(struct drm_i915_gem_object *obj,
         vma->display_alignment = max_t(u64, vma->display_alignment, alignment);
 
         /* Treat this as an end-of-frame, like intel_user_framebuffer_dirty() */
-        if (obj->cache_dirty) {
+        if (obj->cache_dirty || obj->base.write_domain == I915_GEM_DOMAIN_CPU) {
                 i915_gem_clflush_object(obj, true);
                 intel_fb_obj_flush(obj, false, ORIGIN_DIRTYFB);
         }
diff --git a/drivers/gpu/drm/i915/i915_gem_execbuffer.c b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
index 097d9d8c2315..b8b877c91b0a 100644
--- a/drivers/gpu/drm/i915/i915_gem_execbuffer.c
+++ b/drivers/gpu/drm/i915/i915_gem_execbuffer.c
@@ -1181,14 +1181,14 @@ validate_exec_list(struct drm_device *dev,
                         if (exec[i].offset !=
                             gen8_canonical_addr(exec[i].offset & PAGE_MASK))
                                 return -EINVAL;
-
-                        /* From drm_mm perspective address space is continuous,
-                         * so from this point we're always using non-canonical
-                         * form internally.
-                         */
-                        exec[i].offset = gen8_noncanonical_addr(exec[i].offset);
                 }
 
+                /* From drm_mm perspective address space is continuous,
+                 * so from this point we're always using non-canonical
+                 * form internally.
+                 */
+                exec[i].offset = gen8_noncanonical_addr(exec[i].offset);
+
                 if (exec[i].alignment && !is_power_of_2(exec[i].alignment))
                         return -EINVAL;
 
diff --git a/drivers/gpu/drm/i915/i915_gem_internal.c b/drivers/gpu/drm/i915/i915_gem_internal.c
index 4b3ff3e5b911..d09c74973cb3 100644
--- a/drivers/gpu/drm/i915/i915_gem_internal.c
+++ b/drivers/gpu/drm/i915/i915_gem_internal.c
@@ -66,8 +66,16 @@ i915_gem_object_get_pages_internal(struct drm_i915_gem_object *obj)
 
         max_order = MAX_ORDER;
 #ifdef CONFIG_SWIOTLB
-        if (swiotlb_nr_tbl()) /* minimum max swiotlb size is IO_TLB_SEGSIZE */
-                max_order = min(max_order, ilog2(IO_TLB_SEGPAGES));
+        if (swiotlb_nr_tbl()) {
+                unsigned int max_segment;
+
+                max_segment = swiotlb_max_segment();
+                if (max_segment) {
+                        max_segment = max_t(unsigned int, max_segment,
+                                            PAGE_SIZE) >> PAGE_SHIFT;
+                        max_order = min(max_order, ilog2(max_segment));
+                }
+        }
 #endif
 
         gfp = GFP_KERNEL | __GFP_HIGHMEM | __GFP_RECLAIMABLE;
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index f1e4a21d4664..891c86aef99d 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -4262,10 +4262,10 @@ static void page_flip_completed(struct intel_crtc *intel_crtc)
         drm_crtc_vblank_put(&intel_crtc->base);
 
         wake_up_all(&dev_priv->pending_flip_queue);
-        queue_work(dev_priv->wq, &work->unpin_work);
-
         trace_i915_flip_complete(intel_crtc->plane,
                                  work->pending_flip_obj);
+
+        queue_work(dev_priv->wq, &work->unpin_work);
 }
 
 static int intel_crtc_wait_for_pending_flips(struct drm_crtc *crtc)
diff --git a/drivers/gpu/drm/i915/intel_dpll_mgr.c b/drivers/gpu/drm/i915/intel_dpll_mgr.c
index 58a756f2f224..a2f0e070d38d 100644
--- a/drivers/gpu/drm/i915/intel_dpll_mgr.c
+++ b/drivers/gpu/drm/i915/intel_dpll_mgr.c
@@ -1730,7 +1730,8 @@ bxt_get_dpll(struct intel_crtc *crtc,
                 return NULL;
 
         if ((encoder->type == INTEL_OUTPUT_DP ||
-             encoder->type == INTEL_OUTPUT_EDP) &&
+             encoder->type == INTEL_OUTPUT_EDP ||
+             encoder->type == INTEL_OUTPUT_DP_MST) &&
             !bxt_ddi_dp_set_dpll_hw_state(clock, &dpll_hw_state))
                 return NULL;
 
diff --git a/drivers/gpu/drm/vc4/vc4_plane.c b/drivers/gpu/drm/vc4/vc4_plane.c
index 881bf489478b..686cdd3c86f2 100644
--- a/drivers/gpu/drm/vc4/vc4_plane.c
+++ b/drivers/gpu/drm/vc4/vc4_plane.c
@@ -858,7 +858,7 @@ struct drm_plane *vc4_plane_init(struct drm_device *dev,
                 }
         }
         plane = &vc4_plane->base;
-        ret = drm_universal_plane_init(dev, plane, 0xff,
+        ret = drm_universal_plane_init(dev, plane, 0,
                                        &vc4_plane_funcs,
                                        formats, num_formats,
                                        type, NULL);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
index 723fd763da8e..7a96798b9c0a 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_fb.c
@@ -481,8 +481,7 @@ static int vmw_fb_kms_framebuffer(struct fb_info *info)
         mode_cmd.height = var->yres;
         mode_cmd.pitches[0] = ((var->bits_per_pixel + 7) / 8) * mode_cmd.width;
         mode_cmd.pixel_format =
-                drm_mode_legacy_fb_format(var->bits_per_pixel,
-                        ((var->bits_per_pixel + 7) / 8) * mode_cmd.width);
+                drm_mode_legacy_fb_format(var->bits_per_pixel, depth);
 
         cur_fb = par->set_fb;
         if (cur_fb && cur_fb->width == mode_cmd.width &&