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authorVivien Didelot <vivien.didelot@savoirfairelinux.com>2017-05-01 14:05:10 -0400
committerDavid S. Miller <davem@davemloft.net>2017-05-01 15:03:09 -0400
commit3cf3c8469f70d18f8bbcdf8361e62812ebc571cd (patch)
treecfbd12bbb9d50526dc301df669e48a1d01ea3cbb
parent152afb9b45a8af4a93699a15925c392a28182a26 (diff)
net: dsa: mv88e6xxx: add max VID to info
Some chips don't have a VLAN Table Unit, most of them do have a 4K table, some others as the 88E6390 family has a 13th bit for the VID. Add a new max_vid member to the info structure, used to check the presence of a VTU as well as the value used to iterate from in VTU GetNext operations. This makes the MV88E6XXX_FLAG_VTU obsolete, thus remove it. Signed-off-by: Vivien Didelot <vivien.didelot@savoirfairelinux.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r--drivers/net/dsa/mv88e6xxx/chip.c38
-rw-r--r--drivers/net/dsa/mv88e6xxx/mv88e6xxx.h13
2 files changed, 31 insertions, 20 deletions
diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 44ba8cff5631..e45ddf3e90e8 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -1440,7 +1440,7 @@ static int mv88e6xxx_port_vlan_dump(struct dsa_switch *ds, int port,
1440 u16 pvid; 1440 u16 pvid;
1441 int err; 1441 int err;
1442 1442
1443 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_VTU)) 1443 if (!chip->info->max_vid)
1444 return -EOPNOTSUPP; 1444 return -EOPNOTSUPP;
1445 1445
1446 mutex_lock(&chip->reg_lock); 1446 mutex_lock(&chip->reg_lock);
@@ -1478,7 +1478,7 @@ static int mv88e6xxx_port_vlan_dump(struct dsa_switch *ds, int port,
1478 err = cb(&vlan->obj); 1478 err = cb(&vlan->obj);
1479 if (err) 1479 if (err)
1480 break; 1480 break;
1481 } while (next.vid < GLOBAL_VTU_VID_MASK); 1481 } while (next.vid < chip->info->max_vid);
1482 1482
1483unlock: 1483unlock:
1484 mutex_unlock(&chip->reg_lock); 1484 mutex_unlock(&chip->reg_lock);
@@ -1640,7 +1640,7 @@ static int mv88e6xxx_atu_new(struct mv88e6xxx_chip *chip, u16 *fid)
1640 break; 1640 break;
1641 1641
1642 set_bit(vlan.fid, fid_bitmap); 1642 set_bit(vlan.fid, fid_bitmap);
1643 } while (vlan.vid < GLOBAL_VTU_VID_MASK); 1643 } while (vlan.vid < chip->info->max_vid);
1644 1644
1645 /* The reset value 0x000 is used to indicate that multiple address 1645 /* The reset value 0x000 is used to indicate that multiple address
1646 * databases are not needed. Return the next positive available. 1646 * databases are not needed. Return the next positive available.
@@ -1799,7 +1799,7 @@ static int mv88e6xxx_port_vlan_filtering(struct dsa_switch *ds, int port,
1799 PORT_CONTROL_2_8021Q_DISABLED; 1799 PORT_CONTROL_2_8021Q_DISABLED;
1800 int err; 1800 int err;
1801 1801
1802 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_VTU)) 1802 if (!chip->info->max_vid)
1803 return -EOPNOTSUPP; 1803 return -EOPNOTSUPP;
1804 1804
1805 mutex_lock(&chip->reg_lock); 1805 mutex_lock(&chip->reg_lock);
@@ -1817,7 +1817,7 @@ mv88e6xxx_port_vlan_prepare(struct dsa_switch *ds, int port,
1817 struct mv88e6xxx_chip *chip = ds->priv; 1817 struct mv88e6xxx_chip *chip = ds->priv;
1818 int err; 1818 int err;
1819 1819
1820 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_VTU)) 1820 if (!chip->info->max_vid)
1821 return -EOPNOTSUPP; 1821 return -EOPNOTSUPP;
1822 1822
1823 /* If the requested port doesn't belong to the same bridge as the VLAN 1823 /* If the requested port doesn't belong to the same bridge as the VLAN
@@ -1860,7 +1860,7 @@ static void mv88e6xxx_port_vlan_add(struct dsa_switch *ds, int port,
1860 bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID; 1860 bool pvid = vlan->flags & BRIDGE_VLAN_INFO_PVID;
1861 u16 vid; 1861 u16 vid;
1862 1862
1863 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_VTU)) 1863 if (!chip->info->max_vid)
1864 return; 1864 return;
1865 1865
1866 mutex_lock(&chip->reg_lock); 1866 mutex_lock(&chip->reg_lock);
@@ -1921,7 +1921,7 @@ static int mv88e6xxx_port_vlan_del(struct dsa_switch *ds, int port,
1921 u16 pvid, vid; 1921 u16 pvid, vid;
1922 int err = 0; 1922 int err = 0;
1923 1923
1924 if (!mv88e6xxx_has(chip, MV88E6XXX_FLAG_VTU)) 1924 if (!chip->info->max_vid)
1925 return -EOPNOTSUPP; 1925 return -EOPNOTSUPP;
1926 1926
1927 mutex_lock(&chip->reg_lock); 1927 mutex_lock(&chip->reg_lock);
@@ -2090,7 +2090,7 @@ static int mv88e6xxx_port_db_dump(struct mv88e6xxx_chip *chip, int port,
2090 int (*cb)(struct switchdev_obj *obj)) 2090 int (*cb)(struct switchdev_obj *obj))
2091{ 2091{
2092 struct mv88e6xxx_vtu_entry vlan = { 2092 struct mv88e6xxx_vtu_entry vlan = {
2093 .vid = GLOBAL_VTU_VID_MASK, /* all ones */ 2093 .vid = chip->info->max_vid,
2094 }; 2094 };
2095 u16 fid; 2095 u16 fid;
2096 int err; 2096 int err;
@@ -2121,7 +2121,7 @@ static int mv88e6xxx_port_db_dump(struct mv88e6xxx_chip *chip, int port,
2121 obj, cb); 2121 obj, cb);
2122 if (err) 2122 if (err)
2123 return err; 2123 return err;
2124 } while (vlan.vid < GLOBAL_VTU_VID_MASK); 2124 } while (vlan.vid < chip->info->max_vid);
2125 2125
2126 return err; 2126 return err;
2127} 2127}
@@ -3685,6 +3685,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3685 .name = "Marvell 88E6085", 3685 .name = "Marvell 88E6085",
3686 .num_databases = 4096, 3686 .num_databases = 4096,
3687 .num_ports = 10, 3687 .num_ports = 10,
3688 .max_vid = 4095,
3688 .port_base_addr = 0x10, 3689 .port_base_addr = 0x10,
3689 .global1_addr = 0x1b, 3690 .global1_addr = 0x1b,
3690 .age_time_coeff = 15000, 3691 .age_time_coeff = 15000,
@@ -3702,6 +3703,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3702 .name = "Marvell 88E6095/88E6095F", 3703 .name = "Marvell 88E6095/88E6095F",
3703 .num_databases = 256, 3704 .num_databases = 256,
3704 .num_ports = 11, 3705 .num_ports = 11,
3706 .max_vid = 4095,
3705 .port_base_addr = 0x10, 3707 .port_base_addr = 0x10,
3706 .global1_addr = 0x1b, 3708 .global1_addr = 0x1b,
3707 .age_time_coeff = 15000, 3709 .age_time_coeff = 15000,
@@ -3718,6 +3720,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3718 .name = "Marvell 88E6097/88E6097F", 3720 .name = "Marvell 88E6097/88E6097F",
3719 .num_databases = 4096, 3721 .num_databases = 4096,
3720 .num_ports = 11, 3722 .num_ports = 11,
3723 .max_vid = 4095,
3721 .port_base_addr = 0x10, 3724 .port_base_addr = 0x10,
3722 .global1_addr = 0x1b, 3725 .global1_addr = 0x1b,
3723 .age_time_coeff = 15000, 3726 .age_time_coeff = 15000,
@@ -3735,6 +3738,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3735 .name = "Marvell 88E6123", 3738 .name = "Marvell 88E6123",
3736 .num_databases = 4096, 3739 .num_databases = 4096,
3737 .num_ports = 3, 3740 .num_ports = 3,
3741 .max_vid = 4095,
3738 .port_base_addr = 0x10, 3742 .port_base_addr = 0x10,
3739 .global1_addr = 0x1b, 3743 .global1_addr = 0x1b,
3740 .age_time_coeff = 15000, 3744 .age_time_coeff = 15000,
@@ -3752,6 +3756,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3752 .name = "Marvell 88E6131", 3756 .name = "Marvell 88E6131",
3753 .num_databases = 256, 3757 .num_databases = 256,
3754 .num_ports = 8, 3758 .num_ports = 8,
3759 .max_vid = 4095,
3755 .port_base_addr = 0x10, 3760 .port_base_addr = 0x10,
3756 .global1_addr = 0x1b, 3761 .global1_addr = 0x1b,
3757 .age_time_coeff = 15000, 3762 .age_time_coeff = 15000,
@@ -3768,6 +3773,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3768 .name = "Marvell 88E6341", 3773 .name = "Marvell 88E6341",
3769 .num_databases = 4096, 3774 .num_databases = 4096,
3770 .num_ports = 6, 3775 .num_ports = 6,
3776 .max_vid = 4095,
3771 .port_base_addr = 0x10, 3777 .port_base_addr = 0x10,
3772 .global1_addr = 0x1b, 3778 .global1_addr = 0x1b,
3773 .age_time_coeff = 3750, 3779 .age_time_coeff = 3750,
@@ -3784,6 +3790,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3784 .name = "Marvell 88E6161", 3790 .name = "Marvell 88E6161",
3785 .num_databases = 4096, 3791 .num_databases = 4096,
3786 .num_ports = 6, 3792 .num_ports = 6,
3793 .max_vid = 4095,
3787 .port_base_addr = 0x10, 3794 .port_base_addr = 0x10,
3788 .global1_addr = 0x1b, 3795 .global1_addr = 0x1b,
3789 .age_time_coeff = 15000, 3796 .age_time_coeff = 15000,
@@ -3801,6 +3808,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3801 .name = "Marvell 88E6165", 3808 .name = "Marvell 88E6165",
3802 .num_databases = 4096, 3809 .num_databases = 4096,
3803 .num_ports = 6, 3810 .num_ports = 6,
3811 .max_vid = 4095,
3804 .port_base_addr = 0x10, 3812 .port_base_addr = 0x10,
3805 .global1_addr = 0x1b, 3813 .global1_addr = 0x1b,
3806 .age_time_coeff = 15000, 3814 .age_time_coeff = 15000,
@@ -3818,6 +3826,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3818 .name = "Marvell 88E6171", 3826 .name = "Marvell 88E6171",
3819 .num_databases = 4096, 3827 .num_databases = 4096,
3820 .num_ports = 7, 3828 .num_ports = 7,
3829 .max_vid = 4095,
3821 .port_base_addr = 0x10, 3830 .port_base_addr = 0x10,
3822 .global1_addr = 0x1b, 3831 .global1_addr = 0x1b,
3823 .age_time_coeff = 15000, 3832 .age_time_coeff = 15000,
@@ -3835,6 +3844,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3835 .name = "Marvell 88E6172", 3844 .name = "Marvell 88E6172",
3836 .num_databases = 4096, 3845 .num_databases = 4096,
3837 .num_ports = 7, 3846 .num_ports = 7,
3847 .max_vid = 4095,
3838 .port_base_addr = 0x10, 3848 .port_base_addr = 0x10,
3839 .global1_addr = 0x1b, 3849 .global1_addr = 0x1b,
3840 .age_time_coeff = 15000, 3850 .age_time_coeff = 15000,
@@ -3852,6 +3862,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3852 .name = "Marvell 88E6175", 3862 .name = "Marvell 88E6175",
3853 .num_databases = 4096, 3863 .num_databases = 4096,
3854 .num_ports = 7, 3864 .num_ports = 7,
3865 .max_vid = 4095,
3855 .port_base_addr = 0x10, 3866 .port_base_addr = 0x10,
3856 .global1_addr = 0x1b, 3867 .global1_addr = 0x1b,
3857 .age_time_coeff = 15000, 3868 .age_time_coeff = 15000,
@@ -3869,6 +3880,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3869 .name = "Marvell 88E6176", 3880 .name = "Marvell 88E6176",
3870 .num_databases = 4096, 3881 .num_databases = 4096,
3871 .num_ports = 7, 3882 .num_ports = 7,
3883 .max_vid = 4095,
3872 .port_base_addr = 0x10, 3884 .port_base_addr = 0x10,
3873 .global1_addr = 0x1b, 3885 .global1_addr = 0x1b,
3874 .age_time_coeff = 15000, 3886 .age_time_coeff = 15000,
@@ -3886,6 +3898,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3886 .name = "Marvell 88E6185", 3898 .name = "Marvell 88E6185",
3887 .num_databases = 256, 3899 .num_databases = 256,
3888 .num_ports = 10, 3900 .num_ports = 10,
3901 .max_vid = 4095,
3889 .port_base_addr = 0x10, 3902 .port_base_addr = 0x10,
3890 .global1_addr = 0x1b, 3903 .global1_addr = 0x1b,
3891 .age_time_coeff = 15000, 3904 .age_time_coeff = 15000,
@@ -3953,6 +3966,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3953 .name = "Marvell 88E6240", 3966 .name = "Marvell 88E6240",
3954 .num_databases = 4096, 3967 .num_databases = 4096,
3955 .num_ports = 7, 3968 .num_ports = 7,
3969 .max_vid = 4095,
3956 .port_base_addr = 0x10, 3970 .port_base_addr = 0x10,
3957 .global1_addr = 0x1b, 3971 .global1_addr = 0x1b,
3958 .age_time_coeff = 15000, 3972 .age_time_coeff = 15000,
@@ -3987,6 +4001,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
3987 .name = "Marvell 88E6320", 4001 .name = "Marvell 88E6320",
3988 .num_databases = 4096, 4002 .num_databases = 4096,
3989 .num_ports = 7, 4003 .num_ports = 7,
4004 .max_vid = 4095,
3990 .port_base_addr = 0x10, 4005 .port_base_addr = 0x10,
3991 .global1_addr = 0x1b, 4006 .global1_addr = 0x1b,
3992 .age_time_coeff = 15000, 4007 .age_time_coeff = 15000,
@@ -4004,6 +4019,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
4004 .name = "Marvell 88E6321", 4019 .name = "Marvell 88E6321",
4005 .num_databases = 4096, 4020 .num_databases = 4096,
4006 .num_ports = 7, 4021 .num_ports = 7,
4022 .max_vid = 4095,
4007 .port_base_addr = 0x10, 4023 .port_base_addr = 0x10,
4008 .global1_addr = 0x1b, 4024 .global1_addr = 0x1b,
4009 .age_time_coeff = 15000, 4025 .age_time_coeff = 15000,
@@ -4020,6 +4036,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
4020 .name = "Marvell 88E6341", 4036 .name = "Marvell 88E6341",
4021 .num_databases = 4096, 4037 .num_databases = 4096,
4022 .num_ports = 6, 4038 .num_ports = 6,
4039 .max_vid = 4095,
4023 .port_base_addr = 0x10, 4040 .port_base_addr = 0x10,
4024 .global1_addr = 0x1b, 4041 .global1_addr = 0x1b,
4025 .age_time_coeff = 3750, 4042 .age_time_coeff = 3750,
@@ -4036,6 +4053,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
4036 .name = "Marvell 88E6350", 4053 .name = "Marvell 88E6350",
4037 .num_databases = 4096, 4054 .num_databases = 4096,
4038 .num_ports = 7, 4055 .num_ports = 7,
4056 .max_vid = 4095,
4039 .port_base_addr = 0x10, 4057 .port_base_addr = 0x10,
4040 .global1_addr = 0x1b, 4058 .global1_addr = 0x1b,
4041 .age_time_coeff = 15000, 4059 .age_time_coeff = 15000,
@@ -4053,6 +4071,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
4053 .name = "Marvell 88E6351", 4071 .name = "Marvell 88E6351",
4054 .num_databases = 4096, 4072 .num_databases = 4096,
4055 .num_ports = 7, 4073 .num_ports = 7,
4074 .max_vid = 4095,
4056 .port_base_addr = 0x10, 4075 .port_base_addr = 0x10,
4057 .global1_addr = 0x1b, 4076 .global1_addr = 0x1b,
4058 .age_time_coeff = 15000, 4077 .age_time_coeff = 15000,
@@ -4070,6 +4089,7 @@ static const struct mv88e6xxx_info mv88e6xxx_table[] = {
4070 .name = "Marvell 88E6352", 4089 .name = "Marvell 88E6352",
4071 .num_databases = 4096, 4090 .num_databases = 4096,
4072 .num_ports = 7, 4091 .num_ports = 7,
4092 .max_vid = 4095,
4073 .port_base_addr = 0x10, 4093 .port_base_addr = 0x10,
4074 .global1_addr = 0x1b, 4094 .global1_addr = 0x1b,
4075 .age_time_coeff = 15000, 4095 .age_time_coeff = 15000,
diff --git a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h
index c8f54986996b..5695ca206620 100644
--- a/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h
+++ b/drivers/net/dsa/mv88e6xxx/mv88e6xxx.h
@@ -567,7 +567,6 @@ enum mv88e6xxx_cap {
567#define MV88E6XXX_FLAG_G2_POT BIT_ULL(MV88E6XXX_CAP_G2_POT) 567#define MV88E6XXX_FLAG_G2_POT BIT_ULL(MV88E6XXX_CAP_G2_POT)
568 568
569#define MV88E6XXX_FLAG_STU BIT_ULL(MV88E6XXX_CAP_STU) 569#define MV88E6XXX_FLAG_STU BIT_ULL(MV88E6XXX_CAP_STU)
570#define MV88E6XXX_FLAG_VTU BIT_ULL(MV88E6XXX_CAP_VTU)
571 570
572/* Ingress Rate Limit unit */ 571/* Ingress Rate Limit unit */
573#define MV88E6XXX_FLAGS_IRL \ 572#define MV88E6XXX_FLAGS_IRL \
@@ -587,7 +586,6 @@ enum mv88e6xxx_cap {
587#define MV88E6XXX_FLAGS_FAMILY_6095 \ 586#define MV88E6XXX_FLAGS_FAMILY_6095 \
588 (MV88E6XXX_FLAG_GLOBAL2 | \ 587 (MV88E6XXX_FLAG_GLOBAL2 | \
589 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ 588 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
590 MV88E6XXX_FLAG_VTU | \
591 MV88E6XXX_FLAGS_MULTI_CHIP) 589 MV88E6XXX_FLAGS_MULTI_CHIP)
592 590
593#define MV88E6XXX_FLAGS_FAMILY_6097 \ 591#define MV88E6XXX_FLAGS_FAMILY_6097 \
@@ -598,7 +596,6 @@ enum mv88e6xxx_cap {
598 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ 596 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
599 MV88E6XXX_FLAG_G2_POT | \ 597 MV88E6XXX_FLAG_G2_POT | \
600 MV88E6XXX_FLAG_STU | \ 598 MV88E6XXX_FLAG_STU | \
601 MV88E6XXX_FLAG_VTU | \
602 MV88E6XXX_FLAGS_IRL | \ 599 MV88E6XXX_FLAGS_IRL | \
603 MV88E6XXX_FLAGS_MULTI_CHIP) 600 MV88E6XXX_FLAGS_MULTI_CHIP)
604 601
@@ -610,7 +607,6 @@ enum mv88e6xxx_cap {
610 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ 607 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
611 MV88E6XXX_FLAG_G2_POT | \ 608 MV88E6XXX_FLAG_G2_POT | \
612 MV88E6XXX_FLAG_STU | \ 609 MV88E6XXX_FLAG_STU | \
613 MV88E6XXX_FLAG_VTU | \
614 MV88E6XXX_FLAGS_IRL | \ 610 MV88E6XXX_FLAGS_IRL | \
615 MV88E6XXX_FLAGS_MULTI_CHIP) 611 MV88E6XXX_FLAGS_MULTI_CHIP)
616 612
@@ -618,8 +614,7 @@ enum mv88e6xxx_cap {
618 (MV88E6XXX_FLAG_GLOBAL2 | \ 614 (MV88E6XXX_FLAG_GLOBAL2 | \
619 MV88E6XXX_FLAG_G2_INT | \ 615 MV88E6XXX_FLAG_G2_INT | \
620 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ 616 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
621 MV88E6XXX_FLAGS_MULTI_CHIP | \ 617 MV88E6XXX_FLAGS_MULTI_CHIP)
622 MV88E6XXX_FLAG_VTU)
623 618
624#define MV88E6XXX_FLAGS_FAMILY_6320 \ 619#define MV88E6XXX_FLAGS_FAMILY_6320 \
625 (MV88E6XXX_FLAG_EEE | \ 620 (MV88E6XXX_FLAG_EEE | \
@@ -627,7 +622,6 @@ enum mv88e6xxx_cap {
627 MV88E6XXX_FLAG_G2_MGMT_EN_2X | \ 622 MV88E6XXX_FLAG_G2_MGMT_EN_2X | \
628 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ 623 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
629 MV88E6XXX_FLAG_G2_POT | \ 624 MV88E6XXX_FLAG_G2_POT | \
630 MV88E6XXX_FLAG_VTU | \
631 MV88E6XXX_FLAGS_IRL | \ 625 MV88E6XXX_FLAGS_IRL | \
632 MV88E6XXX_FLAGS_MULTI_CHIP) 626 MV88E6XXX_FLAGS_MULTI_CHIP)
633 627
@@ -638,7 +632,6 @@ enum mv88e6xxx_cap {
638 MV88E6XXX_FLAG_G2_INT | \ 632 MV88E6XXX_FLAG_G2_INT | \
639 MV88E6XXX_FLAG_G2_POT | \ 633 MV88E6XXX_FLAG_G2_POT | \
640 MV88E6XXX_FLAG_STU | \ 634 MV88E6XXX_FLAG_STU | \
641 MV88E6XXX_FLAG_VTU | \
642 MV88E6XXX_FLAGS_IRL | \ 635 MV88E6XXX_FLAGS_IRL | \
643 MV88E6XXX_FLAGS_MULTI_CHIP | \ 636 MV88E6XXX_FLAGS_MULTI_CHIP | \
644 MV88E6XXX_FLAGS_SERDES) 637 MV88E6XXX_FLAGS_SERDES)
@@ -651,7 +644,6 @@ enum mv88e6xxx_cap {
651 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ 644 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
652 MV88E6XXX_FLAG_G2_POT | \ 645 MV88E6XXX_FLAG_G2_POT | \
653 MV88E6XXX_FLAG_STU | \ 646 MV88E6XXX_FLAG_STU | \
654 MV88E6XXX_FLAG_VTU | \
655 MV88E6XXX_FLAGS_IRL | \ 647 MV88E6XXX_FLAGS_IRL | \
656 MV88E6XXX_FLAGS_MULTI_CHIP) 648 MV88E6XXX_FLAGS_MULTI_CHIP)
657 649
@@ -664,7 +656,6 @@ enum mv88e6xxx_cap {
664 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \ 656 MV88E6XXX_FLAG_G2_MGMT_EN_0X | \
665 MV88E6XXX_FLAG_G2_POT | \ 657 MV88E6XXX_FLAG_G2_POT | \
666 MV88E6XXX_FLAG_STU | \ 658 MV88E6XXX_FLAG_STU | \
667 MV88E6XXX_FLAG_VTU | \
668 MV88E6XXX_FLAGS_IRL | \ 659 MV88E6XXX_FLAGS_IRL | \
669 MV88E6XXX_FLAGS_MULTI_CHIP | \ 660 MV88E6XXX_FLAGS_MULTI_CHIP | \
670 MV88E6XXX_FLAGS_SERDES) 661 MV88E6XXX_FLAGS_SERDES)
@@ -674,7 +665,6 @@ enum mv88e6xxx_cap {
674 MV88E6XXX_FLAG_GLOBAL2 | \ 665 MV88E6XXX_FLAG_GLOBAL2 | \
675 MV88E6XXX_FLAG_G2_INT | \ 666 MV88E6XXX_FLAG_G2_INT | \
676 MV88E6XXX_FLAG_STU | \ 667 MV88E6XXX_FLAG_STU | \
677 MV88E6XXX_FLAG_VTU | \
678 MV88E6XXX_FLAGS_IRL | \ 668 MV88E6XXX_FLAGS_IRL | \
679 MV88E6XXX_FLAGS_MULTI_CHIP) 669 MV88E6XXX_FLAGS_MULTI_CHIP)
680 670
@@ -686,6 +676,7 @@ struct mv88e6xxx_info {
686 const char *name; 676 const char *name;
687 unsigned int num_databases; 677 unsigned int num_databases;
688 unsigned int num_ports; 678 unsigned int num_ports;
679 unsigned int max_vid;
689 unsigned int port_base_addr; 680 unsigned int port_base_addr;
690 unsigned int global1_addr; 681 unsigned int global1_addr;
691 unsigned int age_time_coeff; 682 unsigned int age_time_coeff;