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authorMitchel Humpherys <mitchelh@codeaurora.org>2014-12-23 12:39:22 -0500
committerWill Deacon <will.deacon@arm.com>2015-01-19 09:46:54 -0500
commit3c8567d1cac0fa4c44ddcf0a956cae0bf2a348f3 (patch)
tree82a63211a7b77fd5ca19d0c1c300fb96603af438
parent518f7136244c167538f732691be589959310b295 (diff)
iommu/arm-smmu: don't touch the secure STLBIALL register
Currently we do a STLBIALL when we initialize the SMMU. However, in some configurations that register is not supposed to be touched and is marked as "Secure only" in the spec. Rip it out. Signed-off-by: Mitchel Humpherys <mitchelh@codeaurora.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
-rw-r--r--drivers/iommu/arm-smmu.c2
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index 919ba433d219..006f006c35e9 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -127,7 +127,6 @@
127#define ID2_PTFS_64K (1 << 14) 127#define ID2_PTFS_64K (1 << 14)
128 128
129/* Global TLB invalidation */ 129/* Global TLB invalidation */
130#define ARM_SMMU_GR0_STLBIALL 0x60
131#define ARM_SMMU_GR0_TLBIVMID 0x64 130#define ARM_SMMU_GR0_TLBIVMID 0x64
132#define ARM_SMMU_GR0_TLBIALLNSNH 0x68 131#define ARM_SMMU_GR0_TLBIALLNSNH 0x68
133#define ARM_SMMU_GR0_TLBIALLH 0x6c 132#define ARM_SMMU_GR0_TLBIALLH 0x6c
@@ -1414,7 +1413,6 @@ static void arm_smmu_device_reset(struct arm_smmu_device *smmu)
1414 } 1413 }
1415 1414
1416 /* Invalidate the TLB, just in case */ 1415 /* Invalidate the TLB, just in case */
1417 writel_relaxed(0, gr0_base + ARM_SMMU_GR0_STLBIALL);
1418 writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLH); 1416 writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLH);
1419 writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLNSNH); 1417 writel_relaxed(0, gr0_base + ARM_SMMU_GR0_TLBIALLNSNH);
1420 1418