diff options
author | Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com> | 2016-02-10 13:46:53 -0500 |
---|---|---|
committer | Marc Zyngier <marc.zyngier@arm.com> | 2016-02-11 08:16:47 -0500 |
commit | 3c5b1d92b3b02be07873d611a27950addff544d3 (patch) | |
tree | 0455ab148d85fee4bd8700315bc606d8e7f568fb | |
parent | b3aff6ccbb1d25e506b60ccd9c559013903f3464 (diff) |
arm64: KVM: Configure TCR_EL2.PS at runtime
Setting TCR_EL2.PS to 40 bits is wrong on systems with less that
less than 40 bits of physical addresses. and breaks KVM on systems
where the RAM is above 40 bits.
This patch uses ID_AA64MMFR0_EL1.PARange to set TCR_EL2.PS dynamically,
just like we already do for VTCR_EL2.PS.
[Marc: rewrote commit message, patch tidy up]
Reviewed-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Tirumalesh Chalamarla <tchalamarla@caviumnetworks.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
-rw-r--r-- | arch/arm64/include/asm/kvm_arm.h | 2 | ||||
-rw-r--r-- | arch/arm64/kvm/hyp-init.S | 12 |
2 files changed, 7 insertions, 7 deletions
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h index bef6e9243c63..d201d4b396d1 100644 --- a/arch/arm64/include/asm/kvm_arm.h +++ b/arch/arm64/include/asm/kvm_arm.h | |||
@@ -107,8 +107,6 @@ | |||
107 | #define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \ | 107 | #define TCR_EL2_MASK (TCR_EL2_TG0 | TCR_EL2_SH0 | \ |
108 | TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ) | 108 | TCR_EL2_ORGN0 | TCR_EL2_IRGN0 | TCR_EL2_T0SZ) |
109 | 109 | ||
110 | #define TCR_EL2_FLAGS (TCR_EL2_RES1 | TCR_EL2_PS_40B) | ||
111 | |||
112 | /* VTCR_EL2 Registers bits */ | 110 | /* VTCR_EL2 Registers bits */ |
113 | #define VTCR_EL2_RES1 (1 << 31) | 111 | #define VTCR_EL2_RES1 (1 << 31) |
114 | #define VTCR_EL2_PS_MASK (7 << 16) | 112 | #define VTCR_EL2_PS_MASK (7 << 16) |
diff --git a/arch/arm64/kvm/hyp-init.S b/arch/arm64/kvm/hyp-init.S index 3e568dcd907b..d073b5a216f7 100644 --- a/arch/arm64/kvm/hyp-init.S +++ b/arch/arm64/kvm/hyp-init.S | |||
@@ -64,7 +64,7 @@ __do_hyp_init: | |||
64 | mrs x4, tcr_el1 | 64 | mrs x4, tcr_el1 |
65 | ldr x5, =TCR_EL2_MASK | 65 | ldr x5, =TCR_EL2_MASK |
66 | and x4, x4, x5 | 66 | and x4, x4, x5 |
67 | ldr x5, =TCR_EL2_FLAGS | 67 | mov x5, #TCR_EL2_RES1 |
68 | orr x4, x4, x5 | 68 | orr x4, x4, x5 |
69 | 69 | ||
70 | #ifndef CONFIG_ARM64_VA_BITS_48 | 70 | #ifndef CONFIG_ARM64_VA_BITS_48 |
@@ -85,15 +85,17 @@ __do_hyp_init: | |||
85 | ldr_l x5, idmap_t0sz | 85 | ldr_l x5, idmap_t0sz |
86 | bfi x4, x5, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH | 86 | bfi x4, x5, TCR_T0SZ_OFFSET, TCR_TxSZ_WIDTH |
87 | #endif | 87 | #endif |
88 | msr tcr_el2, x4 | ||
89 | |||
90 | ldr x4, =VTCR_EL2_FLAGS | ||
91 | /* | 88 | /* |
92 | * Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS bits in | 89 | * Read the PARange bits from ID_AA64MMFR0_EL1 and set the PS bits in |
93 | * VTCR_EL2. | 90 | * TCR_EL2 and VTCR_EL2. |
94 | */ | 91 | */ |
95 | mrs x5, ID_AA64MMFR0_EL1 | 92 | mrs x5, ID_AA64MMFR0_EL1 |
96 | bfi x4, x5, #16, #3 | 93 | bfi x4, x5, #16, #3 |
94 | |||
95 | msr tcr_el2, x4 | ||
96 | |||
97 | ldr x4, =VTCR_EL2_FLAGS | ||
98 | bfi x4, x5, #16, #3 | ||
97 | /* | 99 | /* |
98 | * Read the VMIDBits bits from ID_AA64MMFR1_EL1 and set the VS bit in | 100 | * Read the VMIDBits bits from ID_AA64MMFR1_EL1 and set the VS bit in |
99 | * VTCR_EL2. | 101 | * VTCR_EL2. |