Merge tag 'sunxi-dt-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux into next/dt

Pull "Allwinner DT changes for 4.11, part 2" from Maxime Ripard:

Support for the audio codec and Mali GPU for the A33

* tag 'sunxi-dt-for-4.11-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux:
  ARM: dts: sun8i: sinlinx: Enable audio nodes
  ARM: dts: sun8i: parrot: Enable audio nodes
  ARM: dts: sun8i: Add audio codec, dai and card for A33
  ARM: sun8i: dt: Add mali node
  dt-bindings: gpu: Add Mali Utgard bindings

5 files changed, 176 insertions, 0 deletions

diff --git a/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
new file mode 100644
index 000000000000..476f5ea6c627
--- /dev/null
+++ b/Documentation/devicetree/bindings/gpu/arm,mali-utgard.txt
@@ -0,0 +1,81 @@
+ARM Mali Utgard GPU
+===================
+
+Required properties:
+  - compatible
+    * Must be one of the following:
+      + "arm,mali-300"
+      + "arm,mali-400"
+      + "arm,mali-450"
+    * And, optionally, one of the vendor specific compatible:
+      + allwinner,sun4i-a10-mali
+      + allwinner,sun7i-a20-mali
+      + amlogic,meson-gxbb-mali
+      + amlogic,meson-gxl-mali
+      + stericsson,db8500-mali
+
+  - reg: Physical base address and length of the GPU registers
+
+  - interrupts: an entry for each entry in interrupt-names.
+    See ../interrupt-controller/interrupts.txt for details.
+
+  - interrupt-names:
+    * ppX: Pixel Processor X interrupt (X from 0 to 7)
+    * ppmmuX: Pixel Processor X MMU interrupt (X from 0 to 7)
+    * pp: Pixel Processor broadcast interrupt (mali-450 only)
+    * gp: Geometry Processor interrupt
+    * gpmmu: Geometry Processor MMU interrupt
+
+  - clocks: an entry for each entry in clock-names
+  - clock-names:
+    * bus: bus clock for the GPU
+    * core: clock driving the GPU itself
+
+Optional properties:
+  - interrupt-names and interrupts:
+    * pmu: Power Management Unit interrupt, if implemented in hardware
+
+Vendor-specific bindings
+------------------------
+
+The Mali GPU is integrated very differently from one SoC to
+another. In order to accomodate those differences, you have the option
+to specify one more vendor-specific compatible, among:
+
+  - allwinner,sun4i-a10-mali
+    Required properties:
+      * resets: phandle to the reset line for the GPU
+
+  - allwinner,sun7i-a20-mali
+    Required properties:
+      * resets: phandle to the reset line for the GPU
+
+  - stericsson,db8500-mali
+    Required properties:
+      * interrupt-names and interrupts:
+        + combined: combined interrupt of all of the above lines
+
+Example:
+
+mali: gpu@1c40000 {
+        compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
+        reg = <0x01c40000 0x10000>;
+        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+        interrupt-names = "gp",
+                          "gpmmu",
+                          "pp0",
+                          "ppmmu0",
+                          "pp1",
+                          "ppmmu1",
+                          "pmu";
+        clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+        clock-names = "bus", "core";
+        resets = <&ccu RST_BUS_GPU>;
+};
+
diff --git a/arch/arm/boot/dts/sun8i-a23-a33.dtsi b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
index 9f9bc2c5ac97..a952cc0703cc 100644
--- a/arch/arm/boot/dts/sun8i-a23-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23-a33.dtsi
@@ -472,6 +472,32 @@
                         #size-cells = <0>;
                 };
 
+                mali: gpu@1c40000 {
+                        compatible = "allwinner,sun8i-a23-mali",
+                                     "allwinner,sun7i-a20-mali", "arm,mali-400";
+                        reg = <0x01c40000 0x10000>;
+                        interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
+                                     <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
+                        interrupt-names = "gp",
+                                          "gpmmu",
+                                          "pp0",
+                                          "ppmmu0",
+                                          "pp1",
+                                          "ppmmu1",
+                                          "pmu";
+                        clocks = <&ccu CLK_BUS_GPU>, <&ccu CLK_GPU>;
+                        clock-names = "bus", "core";
+                        resets = <&ccu RST_BUS_GPU>;
+
+                        assigned-clocks = <&ccu CLK_GPU>;
+                        assigned-clock-rates = <408000000>;
+                };
+
                 gic: interrupt-controller@01c81000 {
                         compatible = "arm,cortex-a7-gic", "arm,cortex-a15-gic";
                         reg = <0x01c81000 0x1000>,
diff --git a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
index c206ed693aa2..03b89bdd55ba 100644
--- a/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
+++ b/arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts
@@ -80,10 +80,18 @@
         };
 };
 
+&codec {
+        status = "okay";
+};
+
 &de {
         status = "okay";
 };
 
+&dai {
+        status = "okay";
+};
+
 &ehci0 {
         status = "okay";
 };
@@ -227,6 +235,10 @@
         regulator-name = "vcc-rtc";
 };
 
+&sound {
+        status = "okay";
+};
+
 &tcon0 {
         pinctrl-names = "default";
         pinctrl-0 = <&lcd_rgb666_pins>;
diff --git a/arch/arm/boot/dts/sun8i-a33.dtsi b/arch/arm/boot/dts/sun8i-a33.dtsi
index 5a9ba43ccb07..18c174fef84f 100644
--- a/arch/arm/boot/dts/sun8i-a33.dtsi
+++ b/arch/arm/boot/dts/sun8i-a33.dtsi
@@ -104,6 +104,28 @@
                 reg = <0x40000000 0x80000000>;
         };
 
+        sound: sound {
+                compatible = "simple-audio-card";
+                simple-audio-card,name = "sun8i-a33-audio";
+                simple-audio-card,format = "i2s";
+                simple-audio-card,frame-master = <&link_codec>;
+                simple-audio-card,bitclock-master = <&link_codec>;
+                simple-audio-card,mclk-fs = <512>;
+                simple-audio-card,aux-devs = <&codec_analog>;
+                simple-audio-card,routing =
+                        "Left DAC", "Digital Left DAC",
+                        "Right DAC", "Digital Right DAC";
+                status = "disabled";
+
+                simple-audio-card,cpu {
+                        sound-dai = <&dai>;
+                };
+
+                link_codec: simple-audio-card,codec {
+                        sound-dai = <&codec>;
+                };
+        };
+
         soc@01c00000 {
                 tcon0: lcd-controller@01c0c000 {
                         compatible = "allwinner,sun8i-a33-tcon";
@@ -151,6 +173,29 @@
                         reset-names = "ahb";
                 };
 
+                dai: dai@01c22c00 {
+                        #sound-dai-cells = <0>;
+                        compatible = "allwinner,sun6i-a31-i2s";
+                        reg = <0x01c22c00 0x200>;
+                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+                        clock-names = "apb", "mod";
+                        resets = <&ccu RST_BUS_CODEC>;
+                        dmas = <&dma 15>, <&dma 15>;
+                        dma-names = "rx", "tx";
+                        status = "disabled";
+                };
+
+                codec: codec@01c22e00 {
+                        #sound-dai-cells = <0>;
+                        compatible = "allwinner,sun8i-a33-codec";
+                        reg = <0x01c22e00 0x400>;
+                        interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
+                        clocks = <&ccu CLK_BUS_CODEC>, <&ccu CLK_AC_DIG>;
+                        clock-names = "bus", "mod";
+                        status = "disabled";
+                };
+
                 fe0: display-frontend@01e00000 {
                         compatible = "allwinner,sun8i-a33-display-frontend";
                         reg = <0x01e00000 0x20000>;
diff --git a/arch/arm/boot/dts/sun8i-r16-parrot.dts b/arch/arm/boot/dts/sun8i-r16-parrot.dts
index e4da572427b1..472c03b7aeab 100644
--- a/arch/arm/boot/dts/sun8i-r16-parrot.dts
+++ b/arch/arm/boot/dts/sun8i-r16-parrot.dts
@@ -84,6 +84,14 @@
 
 };
 
+&codec {
+        status = "okay";
+};
+
+&dai {
+        status = "okay";
+};
+
 &ehci0 {
         status = "okay";
 };
@@ -317,6 +325,10 @@
         status = "okay";
 };
 
+&sound {
+        status = "okay";
+};
+
 &uart0 {
         pinctrl-names = "default";
         pinctrl-0 = <&uart0_pins_b>;