diff options
author | Bruce Allan <bruce.w.allan@intel.com> | 2018-08-09 09:28:59 -0400 |
---|---|---|
committer | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2018-08-23 14:26:47 -0400 |
commit | 3bcd7fa37f33cda8c5639a908e9eb42d856e5d8b (patch) | |
tree | c34706bd15e64dbaf40d757ebebb2339408e7ac8 | |
parent | 5d8778d803e21f235e9bc727b5bd619f02abb88b (diff) |
ice: Update to interrupts enabled in OICR
Remove the following interrupt causes that are not applicable or not
handled:
- PFINT_OICR_HLP_RDY_M
- PFINT_OICR_CPM_RDY_M
- PFINT_OICR_GPIO_M
- PFINT_OICR_STORM_DETECT_M
Add the following interrupt cause that's actually handled in ice_misc_intr:
- PFINT_OICR_PE_CRITERR_M
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Anirudh Venkataramanan <anirudh.venkataramanan@intel.com>
Tested-by: Tony Brelinski <tonyx.brelinski@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
-rw-r--r-- | drivers/net/ethernet/intel/ice/ice_hw_autogen.h | 8 | ||||
-rw-r--r-- | drivers/net/ethernet/intel/ice/ice_main.c | 9 |
2 files changed, 3 insertions, 14 deletions
diff --git a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h index 499904874b3f..6076fc87df9d 100644 --- a/drivers/net/ethernet/intel/ice/ice_hw_autogen.h +++ b/drivers/net/ethernet/intel/ice/ice_hw_autogen.h | |||
@@ -121,10 +121,6 @@ | |||
121 | #define PFINT_FW_CTL_CAUSE_ENA_S 30 | 121 | #define PFINT_FW_CTL_CAUSE_ENA_S 30 |
122 | #define PFINT_FW_CTL_CAUSE_ENA_M BIT(PFINT_FW_CTL_CAUSE_ENA_S) | 122 | #define PFINT_FW_CTL_CAUSE_ENA_M BIT(PFINT_FW_CTL_CAUSE_ENA_S) |
123 | #define PFINT_OICR 0x0016CA00 | 123 | #define PFINT_OICR 0x0016CA00 |
124 | #define PFINT_OICR_HLP_RDY_S 14 | ||
125 | #define PFINT_OICR_HLP_RDY_M BIT(PFINT_OICR_HLP_RDY_S) | ||
126 | #define PFINT_OICR_CPM_RDY_S 15 | ||
127 | #define PFINT_OICR_CPM_RDY_M BIT(PFINT_OICR_CPM_RDY_S) | ||
128 | #define PFINT_OICR_ECC_ERR_S 16 | 124 | #define PFINT_OICR_ECC_ERR_S 16 |
129 | #define PFINT_OICR_ECC_ERR_M BIT(PFINT_OICR_ECC_ERR_S) | 125 | #define PFINT_OICR_ECC_ERR_M BIT(PFINT_OICR_ECC_ERR_S) |
130 | #define PFINT_OICR_MAL_DETECT_S 19 | 126 | #define PFINT_OICR_MAL_DETECT_S 19 |
@@ -133,10 +129,6 @@ | |||
133 | #define PFINT_OICR_GRST_M BIT(PFINT_OICR_GRST_S) | 129 | #define PFINT_OICR_GRST_M BIT(PFINT_OICR_GRST_S) |
134 | #define PFINT_OICR_PCI_EXCEPTION_S 21 | 130 | #define PFINT_OICR_PCI_EXCEPTION_S 21 |
135 | #define PFINT_OICR_PCI_EXCEPTION_M BIT(PFINT_OICR_PCI_EXCEPTION_S) | 131 | #define PFINT_OICR_PCI_EXCEPTION_M BIT(PFINT_OICR_PCI_EXCEPTION_S) |
136 | #define PFINT_OICR_GPIO_S 22 | ||
137 | #define PFINT_OICR_GPIO_M BIT(PFINT_OICR_GPIO_S) | ||
138 | #define PFINT_OICR_STORM_DETECT_S 24 | ||
139 | #define PFINT_OICR_STORM_DETECT_M BIT(PFINT_OICR_STORM_DETECT_S) | ||
140 | #define PFINT_OICR_HMC_ERR_S 26 | 132 | #define PFINT_OICR_HMC_ERR_S 26 |
141 | #define PFINT_OICR_HMC_ERR_M BIT(PFINT_OICR_HMC_ERR_S) | 133 | #define PFINT_OICR_HMC_ERR_M BIT(PFINT_OICR_HMC_ERR_S) |
142 | #define PFINT_OICR_PE_CRITERR_S 28 | 134 | #define PFINT_OICR_PE_CRITERR_S 28 |
diff --git a/drivers/net/ethernet/intel/ice/ice_main.c b/drivers/net/ethernet/intel/ice/ice_main.c index 68003fad33d1..34be94a30a60 100644 --- a/drivers/net/ethernet/intel/ice/ice_main.c +++ b/drivers/net/ethernet/intel/ice/ice_main.c | |||
@@ -1704,15 +1704,12 @@ static void ice_ena_misc_vector(struct ice_pf *pf) | |||
1704 | wr32(hw, PFINT_OICR_ENA, 0); /* disable all */ | 1704 | wr32(hw, PFINT_OICR_ENA, 0); /* disable all */ |
1705 | rd32(hw, PFINT_OICR); /* read to clear */ | 1705 | rd32(hw, PFINT_OICR); /* read to clear */ |
1706 | 1706 | ||
1707 | val = (PFINT_OICR_HLP_RDY_M | | 1707 | val = (PFINT_OICR_ECC_ERR_M | |
1708 | PFINT_OICR_CPM_RDY_M | | ||
1709 | PFINT_OICR_ECC_ERR_M | | ||
1710 | PFINT_OICR_MAL_DETECT_M | | 1708 | PFINT_OICR_MAL_DETECT_M | |
1711 | PFINT_OICR_GRST_M | | 1709 | PFINT_OICR_GRST_M | |
1712 | PFINT_OICR_PCI_EXCEPTION_M | | 1710 | PFINT_OICR_PCI_EXCEPTION_M | |
1713 | PFINT_OICR_GPIO_M | | 1711 | PFINT_OICR_HMC_ERR_M | |
1714 | PFINT_OICR_STORM_DETECT_M | | 1712 | PFINT_OICR_PE_CRITERR_M); |
1715 | PFINT_OICR_HMC_ERR_M); | ||
1716 | 1713 | ||
1717 | wr32(hw, PFINT_OICR_ENA, val); | 1714 | wr32(hw, PFINT_OICR_ENA, val); |
1718 | 1715 | ||