diff options
author | Thomas Gleixner <tglx@linutronix.de> | 2017-02-16 09:12:04 -0500 |
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committer | Thomas Gleixner <tglx@linutronix.de> | 2017-02-16 09:14:30 -0500 |
commit | 3bba73b1b7a88d88c3ea16b7914c13d475e4a87b (patch) | |
tree | 5ad5713283dce014c0d5df7ccf3388989f5fe544 | |
parent | 4d8bb00604b182b62e7786bae0e58e0befeeff85 (diff) |
x86/cpufeature: Move RING3MWAIT feature to avoid conflicts
The original feature bit is used in a different branch already. Move it to
scattered bits.
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
-rw-r--r-- | arch/x86/include/asm/cpufeatures.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h index 56e5184514c6..43c4ea9cd907 100644 --- a/arch/x86/include/asm/cpufeatures.h +++ b/arch/x86/include/asm/cpufeatures.h | |||
@@ -100,7 +100,7 @@ | |||
100 | #define X86_FEATURE_XTOPOLOGY ( 3*32+22) /* cpu topology enum extensions */ | 100 | #define X86_FEATURE_XTOPOLOGY ( 3*32+22) /* cpu topology enum extensions */ |
101 | #define X86_FEATURE_TSC_RELIABLE ( 3*32+23) /* TSC is known to be reliable */ | 101 | #define X86_FEATURE_TSC_RELIABLE ( 3*32+23) /* TSC is known to be reliable */ |
102 | #define X86_FEATURE_NONSTOP_TSC ( 3*32+24) /* TSC does not stop in C states */ | 102 | #define X86_FEATURE_NONSTOP_TSC ( 3*32+24) /* TSC does not stop in C states */ |
103 | #define X86_FEATURE_RING3MWAIT ( 3*32+25) /* ring 3 MONITOR/MWAIT */ | 103 | /* free, was #define X86_FEATURE_CLFLUSH_MONITOR ( 3*32+25) * "" clflush reqd with monitor */ |
104 | #define X86_FEATURE_EXTD_APICID ( 3*32+26) /* has extended APICID (8 bits) */ | 104 | #define X86_FEATURE_EXTD_APICID ( 3*32+26) /* has extended APICID (8 bits) */ |
105 | #define X86_FEATURE_AMD_DCM ( 3*32+27) /* multi-node processor */ | 105 | #define X86_FEATURE_AMD_DCM ( 3*32+27) /* multi-node processor */ |
106 | #define X86_FEATURE_APERFMPERF ( 3*32+28) /* APERFMPERF */ | 106 | #define X86_FEATURE_APERFMPERF ( 3*32+28) /* APERFMPERF */ |
@@ -186,7 +186,7 @@ | |||
186 | * | 186 | * |
187 | * Reuse free bits when adding new feature flags! | 187 | * Reuse free bits when adding new feature flags! |
188 | */ | 188 | */ |
189 | 189 | #define X86_FEATURE_RING3MWAIT ( 7*32+ 0) /* Ring 3 MONITOR/MWAIT */ | |
190 | #define X86_FEATURE_CPB ( 7*32+ 2) /* AMD Core Performance Boost */ | 190 | #define X86_FEATURE_CPB ( 7*32+ 2) /* AMD Core Performance Boost */ |
191 | #define X86_FEATURE_EPB ( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */ | 191 | #define X86_FEATURE_EPB ( 7*32+ 3) /* IA32_ENERGY_PERF_BIAS support */ |
192 | #define X86_FEATURE_CAT_L3 ( 7*32+ 4) /* Cache Allocation Technology L3 */ | 192 | #define X86_FEATURE_CAT_L3 ( 7*32+ 4) /* Cache Allocation Technology L3 */ |