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authorAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>2017-02-17 07:06:29 -0500
committerAnder Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>2017-02-17 10:15:01 -0500
commit3bb56da78153150d72c67ceb8b7df49f36ae269c (patch)
tree5e0757073783ee47718c2dcb9f1217af52177083
parent8d371db4b0a7aa919df9be2be430187fe3e70399 (diff)
drm/i915/glk: Enable pipe CSC
Now that the pre-csc degamma table is set up correctly in Geminilake, pipe CSC can be enabled without causing a black screen. v2: Rebase. Signed-off-by: Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170217120630.6143-3-ander.conselvan.de.oliveira@intel.com
-rw-r--r--drivers/gpu/drm/i915/intel_display.c1
-rw-r--r--drivers/gpu/drm/i915/intel_sprite.c1
2 files changed, 2 insertions, 0 deletions
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 5443ba8430da..b60373812d34 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -3327,6 +3327,7 @@ static void skylake_update_primary_plane(struct drm_plane *plane,
3327 if (IS_GEMINILAKE(dev_priv)) { 3327 if (IS_GEMINILAKE(dev_priv)) {
3328 I915_WRITE(PLANE_COLOR_CTL(pipe, plane_id), 3328 I915_WRITE(PLANE_COLOR_CTL(pipe, plane_id),
3329 PLANE_COLOR_PIPE_GAMMA_ENABLE | 3329 PLANE_COLOR_PIPE_GAMMA_ENABLE |
3330 PLANE_COLOR_PIPE_CSC_ENABLE |
3330 PLANE_COLOR_PLANE_GAMMA_DISABLE); 3331 PLANE_COLOR_PLANE_GAMMA_DISABLE);
3331 } else { 3332 } else {
3332 plane_ctl |= 3333 plane_ctl |=
diff --git a/drivers/gpu/drm/i915/intel_sprite.c b/drivers/gpu/drm/i915/intel_sprite.c
index b16a29591803..27e0752d1578 100644
--- a/drivers/gpu/drm/i915/intel_sprite.c
+++ b/drivers/gpu/drm/i915/intel_sprite.c
@@ -224,6 +224,7 @@ skl_update_plane(struct drm_plane *drm_plane,
224 if (IS_GEMINILAKE(dev_priv)) { 224 if (IS_GEMINILAKE(dev_priv)) {
225 I915_WRITE(PLANE_COLOR_CTL(pipe, plane_id), 225 I915_WRITE(PLANE_COLOR_CTL(pipe, plane_id),
226 PLANE_COLOR_PIPE_GAMMA_ENABLE | 226 PLANE_COLOR_PIPE_GAMMA_ENABLE |
227 PLANE_COLOR_PIPE_CSC_ENABLE |
227 PLANE_COLOR_PLANE_GAMMA_DISABLE); 228 PLANE_COLOR_PLANE_GAMMA_DISABLE);
228 } else { 229 } else {
229 plane_ctl |= 230 plane_ctl |=