diff options
author | Axel Lin <axel.lin@ingics.com> | 2014-01-12 01:40:22 -0500 |
---|---|---|
committer | Mark Brown <broonie@linaro.org> | 2014-01-13 05:15:13 -0500 |
commit | 3ab546205411a245ef0f60ec708467a072855c6f (patch) | |
tree | 70c1b063182a1a8d28819318d525e8eab6ada0fa | |
parent | 52690a6a868719d1d2f9e12b039c05d966600d41 (diff) |
spi: ti-qspi: Simplify qspi_write_msg and qspi_read_msg implementation
Make the unit of wlen to be byte, and simplify the code to avoid duplicate
code for different wlen cases.
Signed-off-by: Axel Lin <axel.lin@ingics.com>
Acked-by: Sourav Poddar <sourav.poddar@ti.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r-- | drivers/spi/spi-ti-qspi.c | 61 |
1 files changed, 20 insertions, 41 deletions
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c index 1211b663c814..a850b403b51b 100644 --- a/drivers/spi/spi-ti-qspi.c +++ b/drivers/spi/spi-ti-qspi.c | |||
@@ -208,53 +208,36 @@ static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t) | |||
208 | txbuf = t->tx_buf; | 208 | txbuf = t->tx_buf; |
209 | cmd = qspi->cmd | QSPI_WR_SNGL; | 209 | cmd = qspi->cmd | QSPI_WR_SNGL; |
210 | count = t->len; | 210 | count = t->len; |
211 | wlen = t->bits_per_word; | 211 | wlen = t->bits_per_word >> 3; /* in bytes */ |
212 | 212 | ||
213 | while (count) { | 213 | while (count) { |
214 | switch (wlen) { | 214 | switch (wlen) { |
215 | case 8: | 215 | case 1: |
216 | dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %02x\n", | 216 | dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %02x\n", |
217 | cmd, qspi->dc, *txbuf); | 217 | cmd, qspi->dc, *txbuf); |
218 | writeb(*txbuf, qspi->base + QSPI_SPI_DATA_REG); | 218 | writeb(*txbuf, qspi->base + QSPI_SPI_DATA_REG); |
219 | ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); | ||
220 | ret = wait_for_completion_timeout(&qspi->transfer_complete, | ||
221 | QSPI_COMPLETION_TIMEOUT); | ||
222 | if (ret == 0) { | ||
223 | dev_err(qspi->dev, "write timed out\n"); | ||
224 | return -ETIMEDOUT; | ||
225 | } | ||
226 | txbuf += 1; | ||
227 | count -= 1; | ||
228 | break; | 219 | break; |
229 | case 16: | 220 | case 2: |
230 | dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %04x\n", | 221 | dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %04x\n", |
231 | cmd, qspi->dc, *txbuf); | 222 | cmd, qspi->dc, *txbuf); |
232 | writew(*((u16 *)txbuf), qspi->base + QSPI_SPI_DATA_REG); | 223 | writew(*((u16 *)txbuf), qspi->base + QSPI_SPI_DATA_REG); |
233 | ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); | ||
234 | ret = wait_for_completion_timeout(&qspi->transfer_complete, | ||
235 | QSPI_COMPLETION_TIMEOUT); | ||
236 | if (ret == 0) { | ||
237 | dev_err(qspi->dev, "write timed out\n"); | ||
238 | return -ETIMEDOUT; | ||
239 | } | ||
240 | txbuf += 2; | ||
241 | count -= 2; | ||
242 | break; | 224 | break; |
243 | case 32: | 225 | case 4: |
244 | dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %08x\n", | 226 | dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %08x\n", |
245 | cmd, qspi->dc, *txbuf); | 227 | cmd, qspi->dc, *txbuf); |
246 | writel(*((u32 *)txbuf), qspi->base + QSPI_SPI_DATA_REG); | 228 | writel(*((u32 *)txbuf), qspi->base + QSPI_SPI_DATA_REG); |
247 | ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); | ||
248 | ret = wait_for_completion_timeout(&qspi->transfer_complete, | ||
249 | QSPI_COMPLETION_TIMEOUT); | ||
250 | if (ret == 0) { | ||
251 | dev_err(qspi->dev, "write timed out\n"); | ||
252 | return -ETIMEDOUT; | ||
253 | } | ||
254 | txbuf += 4; | ||
255 | count -= 4; | ||
256 | break; | 229 | break; |
257 | } | 230 | } |
231 | |||
232 | ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); | ||
233 | ret = wait_for_completion_timeout(&qspi->transfer_complete, | ||
234 | QSPI_COMPLETION_TIMEOUT); | ||
235 | if (ret == 0) { | ||
236 | dev_err(qspi->dev, "write timed out\n"); | ||
237 | return -ETIMEDOUT; | ||
238 | } | ||
239 | txbuf += wlen; | ||
240 | count -= wlen; | ||
258 | } | 241 | } |
259 | 242 | ||
260 | return 0; | 243 | return 0; |
@@ -280,7 +263,7 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) | |||
280 | break; | 263 | break; |
281 | } | 264 | } |
282 | count = t->len; | 265 | count = t->len; |
283 | wlen = t->bits_per_word; | 266 | wlen = t->bits_per_word >> 3; /* in bytes */ |
284 | 267 | ||
285 | while (count) { | 268 | while (count) { |
286 | dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", cmd, qspi->dc); | 269 | dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", cmd, qspi->dc); |
@@ -292,22 +275,18 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t) | |||
292 | return -ETIMEDOUT; | 275 | return -ETIMEDOUT; |
293 | } | 276 | } |
294 | switch (wlen) { | 277 | switch (wlen) { |
295 | case 8: | 278 | case 1: |
296 | *rxbuf = readb(qspi->base + QSPI_SPI_DATA_REG); | 279 | *rxbuf = readb(qspi->base + QSPI_SPI_DATA_REG); |
297 | rxbuf += 1; | ||
298 | count -= 1; | ||
299 | break; | 280 | break; |
300 | case 16: | 281 | case 2: |
301 | *((u16 *)rxbuf) = readw(qspi->base + QSPI_SPI_DATA_REG); | 282 | *((u16 *)rxbuf) = readw(qspi->base + QSPI_SPI_DATA_REG); |
302 | rxbuf += 2; | ||
303 | count -= 2; | ||
304 | break; | 283 | break; |
305 | case 32: | 284 | case 4: |
306 | *((u32 *)rxbuf) = readl(qspi->base + QSPI_SPI_DATA_REG); | 285 | *((u32 *)rxbuf) = readl(qspi->base + QSPI_SPI_DATA_REG); |
307 | rxbuf += 4; | ||
308 | count -= 4; | ||
309 | break; | 286 | break; |
310 | } | 287 | } |
288 | rxbuf += wlen; | ||
289 | count -= wlen; | ||
311 | } | 290 | } |
312 | 291 | ||
313 | return 0; | 292 | return 0; |