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authorArnd Bergmann <arnd@arndb.de>2016-05-10 16:14:52 -0400
committerArnd Bergmann <arnd@arndb.de>2016-05-10 16:14:52 -0400
commit3a005c1d59057ef290f44b560c362faf4d164ced (patch)
treea570ba9be77fe649450dc16125f28d0542708bfd
parentf1c09c3e9644fec5571cca1287730868d0809f97 (diff)
parent19b67d5c8b2dbef9a10bc1aeb96a861c57a0bdf8 (diff)
Merge tag 'mvebu-dt64-4.7-1' of git://git.infradead.org/linux-mvebu into next/dt64
Merge "mvebu dt64 for 4.7" from Gregory CLEMENT: - switch to label in the mvebu arm64 device tree - use new clock binding on Armada 7K/8K - improve SPI and I2C description on Armada 7K/8k - add CP110 block adding PCIe, SATA and USB3 - add XOR support on Armada 3700 - few more little fix * tag 'mvebu-dt64-4.7-1' of git://git.infradead.org/linux-mvebu: arm64: dts: marvell: add XOR node for Armada 3700 SoC arm64: dts: marvell: Use a SoC-specific compatible for xHCI on Armada37xx arm64: dts: marvell: Rename armada-37xx USB node arm64: dts: marvell: Clean up armada-3720-db arm64: dts: marvell: enable several CP interfaces on Armada 7040-DB arm64: dts: marvell: initial DT description of Armada 7K/8K CP110 master arm64: dts: marvell: use the proper I2C controller compatible string for 7K/8K arm64: dts: marvell: improve SPI flash description on Armada 7040-DB arm64: dts: marvell: use new clock binding on Armada AP806 arm64: dts: marvell: add UART aliases and define stdout-path arm64: dts: marvell: rename armada-ap806 XOR nodes arm64: dts: marvell: clean up armada-7040-db
Diffstat
-rw-r--r--Documentation/devicetree/bindings/usb/usb-xhci.txt1
-rw-r--r--arch/arm64/boot/dts/marvell/armada-3720-db.dts32
-rw-r--r--arch/arm64/boot/dts/marvell/armada-372x.dtsi1
-rw-r--r--arch/arm64/boot/dts/marvell/armada-37xx.dtsi20
-rw-r--r--arch/arm64/boot/dts/marvell/armada-7020.dtsi1
-rw-r--r--arch/arm64/boot/dts/marvell/armada-7040-db.dts108
-rw-r--r--arch/arm64/boot/dts/marvell/armada-7040.dtsi1
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8020.dtsi1
-rw-r--r--arch/arm64/boot/dts/marvell/armada-8040.dtsi1
-rw-r--r--arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi1
-rw-r--r--arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi2
-rw-r--r--arch/arm64/boot/dts/marvell/armada-ap806.dtsi56
-rw-r--r--arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi228
13 files changed, 368 insertions, 85 deletions
diff --git a/Documentation/devicetree/bindings/usb/usb-xhci.txt b/Documentation/devicetree/bindings/usb/usb-xhci.txt
index 6a17aa85c4d5..966885c636d0 100644
--- a/Documentation/devicetree/bindings/usb/usb-xhci.txt
+++ b/Documentation/devicetree/bindings/usb/usb-xhci.txt
@@ -4,6 +4,7 @@ Required properties:
4 - compatible: should be one or more of 4 - compatible: should be one or more of
5 5
6 - "generic-xhci" for generic XHCI device 6 - "generic-xhci" for generic XHCI device
7 - "marvell,armada3700-xhci" for Armada 37xx SoCs
7 - "marvell,armada-375-xhci" for Armada 375 SoCs 8 - "marvell,armada-375-xhci" for Armada 375 SoCs
8 - "marvell,armada-380-xhci" for Armada 38x SoCs 9 - "marvell,armada-380-xhci" for Armada 38x SoCs
9 - "renesas,xhci-r8a7790" for r8a7790 SoC 10 - "renesas,xhci-r8a7790" for r8a7790 SoC
diff --git a/arch/arm64/boot/dts/marvell/armada-3720-db.dts b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
index 359050154511..86110a6ae330 100644
--- a/arch/arm64/boot/dts/marvell/armada-3720-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-3720-db.dts
@@ -60,27 +60,19 @@
60 device_type = "memory"; 60 device_type = "memory";
61 reg = <0x00000000 0x00000000 0x00000000 0x20000000>; 61 reg = <0x00000000 0x00000000 0x00000000 0x20000000>;
62 }; 62 };
63};
63 64
64 soc { 65/* CON3 */
65 internal-regs { 66&sata {
66 /* 67 status = "okay";
67 * Exported on the micro USB connector CON32 68};
68 * through an FTDI
69 */
70 uart0: serial@12000 {
71 status = "okay";
72 };
73
74 /* CON31 */
75 usb3@58000 {
76 status = "okay";
77 };
78 69
79 /* CON3 */ 70/* Exported on the micro USB connector CON32 through an FTDI */
80 sata@e0000 { 71&uart0 {
81 status = "okay"; 72 status = "okay";
82 };
83 };
84 };
85}; 73};
86 74
75/* CON31 */
76&usb3 {
77 status = "okay";
78};
diff --git a/arch/arm64/boot/dts/marvell/armada-372x.dtsi b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
index f292a00ce97c..5120296596c2 100644
--- a/arch/arm64/boot/dts/marvell/armada-372x.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-372x.dtsi
@@ -59,5 +59,4 @@
59 enable-method = "psci"; 59 enable-method = "psci";
60 }; 60 };
61 }; 61 };
62
63}; 62};
diff --git a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
index ba9df7ff2a72..9e2efb882983 100644
--- a/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-37xx.dtsi
@@ -105,14 +105,28 @@
105 status = "disabled"; 105 status = "disabled";
106 }; 106 };
107 107
108 usb3@58000 { 108 usb3: usb@58000 {
109 compatible = "generic-xhci"; 109 compatible = "marvell,armada3700-xhci",
110 "generic-xhci";
110 reg = <0x58000 0x4000>; 111 reg = <0x58000 0x4000>;
111 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 112 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
112 status = "disabled"; 113 status = "disabled";
113 }; 114 };
114 115
115 sata@e0000 { 116 xor@60900 {
117 compatible = "marvell,armada-3700-xor";
118 reg = <0x60900 0x100
119 0x60b00 0x100>;
120
121 xor10 {
122 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
123 };
124 xor11 {
125 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
126 };
127 };
128
129 sata: sata@e0000 {
116 compatible = "marvell,armada-3700-ahci"; 130 compatible = "marvell,armada-3700-ahci";
117 reg = <0xe0000 0x2000>; 131 reg = <0xe0000 0x2000>;
118 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 132 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm64/boot/dts/marvell/armada-7020.dtsi b/arch/arm64/boot/dts/marvell/armada-7020.dtsi
index 52575756d0be..975e73302753 100644
--- a/arch/arm64/boot/dts/marvell/armada-7020.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-7020.dtsi
@@ -46,6 +46,7 @@
46 */ 46 */
47 47
48#include "armada-ap806-dual.dtsi" 48#include "armada-ap806-dual.dtsi"
49#include "armada-cp110-master.dtsi"
49 50
50/ { 51/ {
51 model = "Marvell Armada 7020"; 52 model = "Marvell Armada 7020";
diff --git a/arch/arm64/boot/dts/marvell/armada-7040-db.dts b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
index 064a251346dd..070b589680c5 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040-db.dts
+++ b/arch/arm64/boot/dts/marvell/armada-7040-db.dts
@@ -51,42 +51,98 @@
51 compatible = "marvell,armada7040-db", "marvell,armada7040", 51 compatible = "marvell,armada7040-db", "marvell,armada7040",
52 "marvell,armada-ap806-quad", "marvell,armada-ap806"; 52 "marvell,armada-ap806-quad", "marvell,armada-ap806";
53 53
54 chosen {
55 stdout-path = "serial0:115200n8";
56 };
57
54 memory@00000000 { 58 memory@00000000 {
55 device_type = "memory"; 59 device_type = "memory";
56 reg = <0x0 0x0 0x0 0x80000000>; 60 reg = <0x0 0x0 0x0 0x80000000>;
57 }; 61 };
62};
63
64&i2c0 {
65 status = "okay";
66 clock-frequency = <100000>;
67};
68
69&spi0 {
70 status = "okay";
71
72 spi-flash@0 {
73 #address-cells = <1>;
74 #size-cells = <1>;
75 compatible = "jedec,spi-nor";
76 reg = <0>;
77 spi-max-frequency = <10000000>;
58 78
59 ap806 { 79 partitions {
60 config-space { 80 compatible = "fixed-partitions";
61 spi@510600 { 81 #address-cells = <1>;
62 status = "okay"; 82 #size-cells = <1>;
63 83
64 spi-flash@0 { 84 partition@0 {
65 #address-cells = <1>; 85 label = "U-Boot";
66 #size-cells = <1>; 86 reg = <0 0x200000>;
67 compatible = "n25q128a13"; 87 };
68 reg = <0>; /* Chip select 0 */ 88 partition@400000 {
69 spi-max-frequency = <10000000>; 89 label = "Filesystem";
70 90 reg = <0x200000 0xce0000>;
71 partition@0 {
72 label = "U-Boot";
73 reg = <0 0x200000>;
74 };
75 partition@400000 {
76 label = "Filesystem";
77 reg = <0x200000 0xce0000>;
78 };
79 };
80 }; 91 };
92 };
93 };
94};
95
96&uart0 {
97 status = "okay";
98};
81 99
82 i2c@511000 { 100
83 status = "okay"; 101&cpm_pcie2 {
84 clock-frequency = <100000>; 102 status = "okay";
103};
104
105&cpm_i2c0 {
106 status = "okay";
107 clock-frequency = <100000>;
108};
109
110&cpm_spi1 {
111 status = "okay";
112
113 spi-flash@0 {
114 #address-cells = <0x1>;
115 #size-cells = <0x1>;
116 compatible = "jedec,spi-nor";
117 reg = <0x0>;
118 spi-max-frequency = <20000000>;
119
120 partitions {
121 compatible = "fixed-partitions";
122 #address-cells = <1>;
123 #size-cells = <1>;
124
125 partition@0 {
126 label = "U-Boot";
127 reg = <0x0 0x200000>;
85 }; 128 };
86 129
87 serial@512000 { 130 partition@400000 {
88 status = "okay"; 131 label = "Filesystem";
132 reg = <0x200000 0xe00000>;
89 }; 133 };
90 }; 134 };
91 }; 135 };
92}; 136};
137
138&cpm_sata0 {
139 status = "okay";
140};
141
142&cpm_usb3_0 {
143 status = "okay";
144};
145
146&cpm_usb3_1 {
147 status = "okay";
148};
diff --git a/arch/arm64/boot/dts/marvell/armada-7040.dtsi b/arch/arm64/boot/dts/marvell/armada-7040.dtsi
index 7a2de8bf7907..78d995d62707 100644
--- a/arch/arm64/boot/dts/marvell/armada-7040.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-7040.dtsi
@@ -46,6 +46,7 @@
46 */ 46 */
47 47
48#include "armada-ap806-quad.dtsi" 48#include "armada-ap806-quad.dtsi"
49#include "armada-cp110-master.dtsi"
49 50
50/ { 51/ {
51 model = "Marvell Armada 7040"; 52 model = "Marvell Armada 7040";
diff --git a/arch/arm64/boot/dts/marvell/armada-8020.dtsi b/arch/arm64/boot/dts/marvell/armada-8020.dtsi
index 73d69d99513f..3753c1c6d54d 100644
--- a/arch/arm64/boot/dts/marvell/armada-8020.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-8020.dtsi
@@ -46,6 +46,7 @@
46 */ 46 */
47 47
48#include "armada-ap806-dual.dtsi" 48#include "armada-ap806-dual.dtsi"
49#include "armada-cp110-master.dtsi"
49 50
50/ { 51/ {
51 model = "Marvell Armada 8020"; 52 model = "Marvell Armada 8020";
diff --git a/arch/arm64/boot/dts/marvell/armada-8040.dtsi b/arch/arm64/boot/dts/marvell/armada-8040.dtsi
index a1406a40959e..8bd0d8f8ad4c 100644
--- a/arch/arm64/boot/dts/marvell/armada-8040.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-8040.dtsi
@@ -46,6 +46,7 @@
46 */ 46 */
47 47
48#include "armada-ap806-quad.dtsi" 48#include "armada-ap806-quad.dtsi"
49#include "armada-cp110-master.dtsi"
49 50
50/ { 51/ {
51 model = "Marvell Armada 8040"; 52 model = "Marvell Armada 8040";
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
index f25c5c17fad7..95a1ff60f6c1 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806-dual.dtsi
@@ -68,4 +68,3 @@
68 }; 68 };
69 }; 69 };
70}; 70};
71
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
index baa7d9a516b3..ba43a4357b89 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806-quad.dtsi
@@ -79,6 +79,4 @@
79 enable-method = "psci"; 79 enable-method = "psci";
80 }; 80 };
81 }; 81 };
82
83}; 82};
84
diff --git a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
index 556a92bcc2f6..20d256b32670 100644
--- a/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
+++ b/arch/arm64/boot/dts/marvell/armada-ap806.dtsi
@@ -54,12 +54,16 @@
54 #address-cells = <2>; 54 #address-cells = <2>;
55 #size-cells = <2>; 55 #size-cells = <2>;
56 56
57 aliases {
58 serial0 = &uart0;
59 serial1 = &uart1;
60 };
61
57 psci { 62 psci {
58 compatible = "arm,psci-0.2"; 63 compatible = "arm,psci-0.2";
59 method = "smc"; 64 method = "smc";
60 }; 65 };
61 66
62
63 ap806 { 67 ap806 {
64 #address-cells = <2>; 68 #address-cells = <2>;
65 #size-cells = <2>; 69 #size-cells = <2>;
@@ -136,7 +140,7 @@
136 marvell,spi-base = <128>, <136>, <144>, <152>; 140 marvell,spi-base = <128>, <136>, <144>, <152>;
137 }; 141 };
138 142
139 xor0@400000 { 143 xor@400000 {
140 compatible = "marvell,mv-xor-v2"; 144 compatible = "marvell,mv-xor-v2";
141 reg = <0x400000 0x1000>, 145 reg = <0x400000 0x1000>,
142 <0x410000 0x1000>; 146 <0x410000 0x1000>;
@@ -144,7 +148,7 @@
144 dma-coherent; 148 dma-coherent;
145 }; 149 };
146 150
147 xor1@420000 { 151 xor@420000 {
148 compatible = "marvell,mv-xor-v2"; 152 compatible = "marvell,mv-xor-v2";
149 reg = <0x420000 0x1000>, 153 reg = <0x420000 0x1000>,
150 <0x430000 0x1000>; 154 <0x430000 0x1000>;
@@ -152,7 +156,7 @@
152 dma-coherent; 156 dma-coherent;
153 }; 157 };
154 158
155 xor2@440000 { 159 xor@440000 {
156 compatible = "marvell,mv-xor-v2"; 160 compatible = "marvell,mv-xor-v2";
157 reg = <0x440000 0x1000>, 161 reg = <0x440000 0x1000>,
158 <0x450000 0x1000>; 162 <0x450000 0x1000>;
@@ -160,7 +164,7 @@
160 dma-coherent; 164 dma-coherent;
161 }; 165 };
162 166
163 xor3@460000 { 167 xor@460000 {
164 compatible = "marvell,mv-xor-v2"; 168 compatible = "marvell,mv-xor-v2";
165 reg = <0x460000 0x1000>, 169 reg = <0x460000 0x1000>,
166 <0x470000 0x1000>; 170 <0x470000 0x1000>;
@@ -175,63 +179,51 @@
175 #size-cells = <0>; 179 #size-cells = <0>;
176 cell-index = <0>; 180 cell-index = <0>;
177 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>; 181 interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
178 clocks = <&ringclk 2>; 182 clocks = <&ap_syscon 3>;
179 status = "disabled"; 183 status = "disabled";
180 }; 184 };
181 185
182 i2c0: i2c@511000 { 186 i2c0: i2c@511000 {
183 compatible = "marvell,mv64xxx-i2c"; 187 compatible = "marvell,mv78230-i2c";
184 reg = <0x511000 0x20>; 188 reg = <0x511000 0x20>;
185 #address-cells = <1>; 189 #address-cells = <1>;
186 #size-cells = <0>; 190 #size-cells = <0>;
187 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 191 interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
188 timeout-ms = <1000>; 192 timeout-ms = <1000>;
189 clocks = <&ringclk 2>; 193 clocks = <&ap_syscon 3>;
190 status = "disabled"; 194 status = "disabled";
191 }; 195 };
192 196
193 serial@512000 { 197 uart0: serial@512000 {
194 compatible = "snps,dw-apb-uart"; 198 compatible = "snps,dw-apb-uart";
195 reg = <0x512000 0x100>; 199 reg = <0x512000 0x100>;
196 reg-shift = <2>; 200 reg-shift = <2>;
197 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 201 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
198 reg-io-width = <1>; 202 reg-io-width = <1>;
199 clocks = <&ringclk 2>; 203 clocks = <&ap_syscon 3>;
200 status = "disabled"; 204 status = "disabled";
201 }; 205 };
202 206
203 serial@512100 { 207 uart1: serial@512100 {
204 compatible = "snps,dw-apb-uart"; 208 compatible = "snps,dw-apb-uart";
205 reg = <0x512100 0x100>; 209 reg = <0x512100 0x100>;
206 reg-shift = <2>; 210 reg-shift = <2>;
207 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>; 211 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
208 reg-io-width = <1>; 212 reg-io-width = <1>;
209 clocks = <&ringclk 2>; 213 clocks = <&ap_syscon 3>;
210 status = "disabled"; 214 status = "disabled";
211 215
212 }; 216 };
213 217
214 dfx-server@6f8000 { 218 ap_syscon: system-controller@6f4000 {
215 compatible = "simple-mfd", "syscon"; 219 compatible = "marvell,ap806-system-controller",
216 reg = <0x6f8000 0x70000>; 220 "syscon";
217 221 #clock-cells = <1>;
218 coreclk: clk@204 { 222 clock-output-names = "ap-cpu-cluster-0",
219 compatible = "marvell,armada-ap806-core-clock"; 223 "ap-cpu-cluster-1",
220 #clock-cells = <1>; 224 "ap-fixed", "ap-mss";
221 clock-output-names = "ddr", "ring", "cpu"; 225 reg = <0x6f4000 0x1000>;
222 };
223
224 ringclk: clk@250 {
225 compatible = "marvell,armada-ap806-ring-clock";
226 #clock-cells = <1>;
227 clock-output-names = "ring-0", "ring-2",
228 "ring-3", "ring-4",
229 "ring-5";
230 clocks = <&coreclk 1>;
231 };
232 }; 226 };
233 }; 227 };
234 }; 228 };
235
236}; 229};
237
diff --git a/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
new file mode 100644
index 000000000000..367138bae3e0
--- /dev/null
+++ b/arch/arm64/boot/dts/marvell/armada-cp110-master.dtsi
@@ -0,0 +1,228 @@
1/*
2 * Copyright (C) 2016 Marvell Technology Group Ltd.
3 *
4 * This file is dual-licensed: you can use it either under the terms
5 * of the GPLv2 or the X11 license, at your option. Note that this dual
6 * licensing only applies to this file, and not this project as a
7 * whole.
8 *
9 * a) This library is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of the
12 * License, or (at your option) any later version.
13 *
14 * This library is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * Or, alternatively,
20 *
21 * b) Permission is hereby granted, free of charge, to any person
22 * obtaining a copy of this software and associated documentation
23 * files (the "Software"), to deal in the Software without
24 * restriction, including without limitation the rights to use,
25 * copy, modify, merge, publish, distribute, sublicense, and/or
26 * sell copies of the Software, and to permit persons to whom the
27 * Software is furnished to do so, subject to the following
28 * conditions:
29 *
30 * The above copyright notice and this permission notice shall be
31 * included in all copies or substantial portions of the Software.
32 *
33 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
34 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
35 * OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
36 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
37 * HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
38 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
39 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
40 * OTHER DEALINGS IN THE SOFTWARE.
41 */
42
43/*
44 * Device Tree file for Marvell Armada CP110 Master.
45 */
46
47/ {
48 cp110-master {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 compatible = "simple-bus";
52 interrupt-parent = <&gic>;
53 ranges;
54
55 config-space {
56 #address-cells = <1>;
57 #size-cells = <1>;
58 compatible = "simple-bus";
59 interrupt-parent = <&gic>;
60 ranges = <0x0 0x0 0xf2000000 0x2000000>;
61
62 cpm_syscon0: system-controller@440000 {
63 compatible = "marvell,cp110-system-controller0",
64 "syscon";
65 reg = <0x440000 0x1000>;
66 #clock-cells = <2>;
67 core-clock-output-names =
68 "cpm-apll", "cpm-ppv2-core", "cpm-eip",
69 "cpm-core", "cpm-nand-core";
70 gate-clock-output-names =
71 "cpm-audio", "cpm-communit", "cpm-nand",
72 "cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
73 "cpm-mg-core", "cpm-xor1", "cpm-xor0",
74 "cpm-gop-dp", "none", "cpm-pcie_x10",
75 "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
76 "cpm-sata", "cpm-sata-usb", "cpm-main",
77 "cpm-sd-mmc", "none", "none",
78 "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
79 "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
80 };
81
82 cpm_sata0: sata@540000 {
83 compatible = "marvell,armada-8k-ahci";
84 reg = <0x540000 0x30000>;
85 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
86 clocks = <&cpm_syscon0 1 15>;
87 status = "disabled";
88 };
89
90 cpm_usb3_0: usb3@500000 {
91 compatible = "marvell,armada-8k-xhci",
92 "generic-xhci";
93 reg = <0x500000 0x4000>;
94 dma-coherent;
95 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
96 clocks = <&cpm_syscon0 1 22>;
97 status = "disabled";
98 };
99
100 cpm_usb3_1: usb3@510000 {
101 compatible = "marvell,armada-8k-xhci",
102 "generic-xhci";
103 reg = <0x510000 0x4000>;
104 dma-coherent;
105 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
106 clocks = <&cpm_syscon0 1 23>;
107 status = "disabled";
108 };
109
110 cpm_spi0: spi@700600 {
111 compatible = "marvell,armada-380-spi";
112 reg = <0x700600 0x50>;
113 #address-cells = <0x1>;
114 #size-cells = <0x0>;
115 cell-index = <1>;
116 clocks = <&cpm_syscon0 0 3>;
117 status = "disabled";
118 };
119
120 cpm_spi1: spi@700680 {
121 compatible = "marvell,armada-380-spi";
122 reg = <0x700680 0x50>;
123 #address-cells = <1>;
124 #size-cells = <0>;
125 cell-index = <2>;
126 clocks = <&cpm_syscon0 1 21>;
127 status = "disabled";
128 };
129
130 cpm_i2c0: i2c@701000 {
131 compatible = "marvell,mv78230-i2c";
132 reg = <0x701000 0x20>;
133 #address-cells = <1>;
134 #size-cells = <0>;
135 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
136 clocks = <&cpm_syscon0 1 21>;
137 status = "disabled";
138 };
139
140 cpm_i2c1: i2c@701100 {
141 compatible = "marvell,mv78230-i2c";
142 reg = <0x701100 0x20>;
143 #address-cells = <1>;
144 #size-cells = <0>;
145 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
146 clocks = <&cpm_syscon0 1 21>;
147 status = "disabled";
148 };
149 };
150
151 cpm_pcie0: pcie@f2600000 {
152 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
153 reg = <0 0xf2600000 0 0x10000>,
154 <0 0xf6f00000 0 0x80000>;
155 reg-names = "ctrl", "config";
156 #address-cells = <3>;
157 #size-cells = <2>;
158 #interrupt-cells = <1>;
159 device_type = "pci";
160 dma-coherent;
161
162 bus-range = <0 0xff>;
163 ranges =
164 /* downstream I/O */
165 <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000
166 /* non-prefetchable memory */
167 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>;
168 interrupt-map-mask = <0 0 0 0>;
169 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
170 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
171 num-lanes = <1>;
172 clocks = <&cpm_syscon0 1 13>;
173 status = "disabled";
174 };
175
176 cpm_pcie1: pcie@f2620000 {
177 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
178 reg = <0 0xf2620000 0 0x10000>,
179 <0 0xf7f00000 0 0x80000>;
180 reg-names = "ctrl", "config";
181 #address-cells = <3>;
182 #size-cells = <2>;
183 #interrupt-cells = <1>;
184 device_type = "pci";
185 dma-coherent;
186
187 bus-range = <0 0xff>;
188 ranges =
189 /* downstream I/O */
190 <0x81000000 0 0xf9010000 0 0xf9010000 0 0x10000
191 /* non-prefetchable memory */
192 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>;
193 interrupt-map-mask = <0 0 0 0>;
194 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
195 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
196
197 num-lanes = <1>;
198 clocks = <&cpm_syscon0 1 11>;
199 status = "disabled";
200 };
201
202 cpm_pcie2: pcie@f2640000 {
203 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
204 reg = <0 0xf2640000 0 0x10000>,
205 <0 0xf8f00000 0 0x80000>;
206 reg-names = "ctrl", "config";
207 #address-cells = <3>;
208 #size-cells = <2>;
209 #interrupt-cells = <1>;
210 device_type = "pci";
211 dma-coherent;
212
213 bus-range = <0 0xff>;
214 ranges =
215 /* downstream I/O */
216 <0x81000000 0 0xf9020000 0 0xf9020000 0 0x10000
217 /* non-prefetchable memory */
218 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>;
219 interrupt-map-mask = <0 0 0 0>;
220 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
221 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
222
223 num-lanes = <1>;
224 clocks = <&cpm_syscon0 1 12>;
225 status = "disabled";
226 };
227 };
228};
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-15 10:14:36 -0400