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authorHeiko Stuebner <heiko@sntech.de>2015-01-20 15:12:16 -0500
committerHeiko Stuebner <heiko@sntech.de>2015-01-28 05:02:07 -0500
commit39d05162a530b8e58119952dd60c7204e8512f0d (patch)
tree2d53652603c699f7437899f774561a66c8631915
parentd052c329d3c022699c0d5b7550149277611ca5f6 (diff)
ARM: dts: rockchip: add rk3288 watchdog clock
Add the clock property for the watchdog on rk3288 socs. Signed-off-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Doug Anderson <dianders@chromium.org> Tested-by: Doug Anderson <dianders@chromium.org>
-rw-r--r--arch/arm/boot/dts/rk3288.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi
index 37847c14b449..1e75a0f556d4 100644
--- a/arch/arm/boot/dts/rk3288.dtsi
+++ b/arch/arm/boot/dts/rk3288.dtsi
@@ -560,6 +560,7 @@
560 wdt: watchdog@ff800000 { 560 wdt: watchdog@ff800000 {
561 compatible = "rockchip,rk3288-wdt", "snps,dw-wdt"; 561 compatible = "rockchip,rk3288-wdt", "snps,dw-wdt";
562 reg = <0xff800000 0x100>; 562 reg = <0xff800000 0x100>;
563 clocks = <&cru PCLK_WDT>;
563 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>; 564 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
564 status = "disabled"; 565 status = "disabled";
565 }; 566 };