diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2017-02-06 17:16:23 -0500 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2017-02-06 17:16:23 -0500 |
commit | 396bf4cd835e62d70fad4a03a8963e61f19021f2 (patch) | |
tree | 79ac8f33554260fea1a8d43e6f8c4c5460115f45 | |
parent | d5adbfcd5f7bcc6fa58a41c5c5ada0e5c826ce2c (diff) | |
parent | 7c2cf1c4615cc2f576d0604406cdf0065f00b83b (diff) |
Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6
Pull crypto fixes from Herbert Xu:
- use-after-free in algif_aead
- modular aesni regression when pcbc is modular but absent
- bug causing IO page faults in ccp
- double list add in ccp
- NULL pointer dereference in qat (two patches)
- panic in chcr
- NULL pointer dereference in chcr
- out-of-bound access in chcr
* 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6:
crypto: chcr - Fix key length for RFC4106
crypto: algif_aead - Fix kernel panic on list_del
crypto: aesni - Fix failure when pcbc module is absent
crypto: ccp - Fix double add when creating new DMA command
crypto: ccp - Fix DMA operations when IOMMU is enabled
crypto: chcr - Check device is allocated before use
crypto: chcr - Fix panic on dma_unmap_sg
crypto: qat - zero esram only for DH85x devices
crypto: qat - fix bar discovery for c62x
-rw-r--r-- | arch/x86/crypto/aesni-intel_glue.c | 8 | ||||
-rw-r--r-- | crypto/algif_aead.c | 2 | ||||
-rw-r--r-- | drivers/crypto/ccp/ccp-dev-v5.c | 2 | ||||
-rw-r--r-- | drivers/crypto/ccp/ccp-dev.h | 1 | ||||
-rw-r--r-- | drivers/crypto/ccp/ccp-dmaengine.c | 6 | ||||
-rw-r--r-- | drivers/crypto/chelsio/chcr_algo.c | 53 | ||||
-rw-r--r-- | drivers/crypto/chelsio/chcr_core.c | 18 | ||||
-rw-r--r-- | drivers/crypto/chelsio/chcr_crypto.h | 3 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_c62x/adf_drv.c | 2 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/adf_accel_devices.h | 1 | ||||
-rw-r--r-- | drivers/crypto/qat/qat_common/qat_hal.c | 4 |
11 files changed, 55 insertions, 45 deletions
diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c index 6ef688a1ef3e..7ff1b0c86a8e 100644 --- a/arch/x86/crypto/aesni-intel_glue.c +++ b/arch/x86/crypto/aesni-intel_glue.c | |||
@@ -1085,9 +1085,9 @@ static void aesni_free_simds(void) | |||
1085 | aesni_simd_skciphers[i]; i++) | 1085 | aesni_simd_skciphers[i]; i++) |
1086 | simd_skcipher_free(aesni_simd_skciphers[i]); | 1086 | simd_skcipher_free(aesni_simd_skciphers[i]); |
1087 | 1087 | ||
1088 | for (i = 0; i < ARRAY_SIZE(aesni_simd_skciphers2) && | 1088 | for (i = 0; i < ARRAY_SIZE(aesni_simd_skciphers2); i++) |
1089 | aesni_simd_skciphers2[i].simd; i++) | 1089 | if (aesni_simd_skciphers2[i].simd) |
1090 | simd_skcipher_free(aesni_simd_skciphers2[i].simd); | 1090 | simd_skcipher_free(aesni_simd_skciphers2[i].simd); |
1091 | } | 1091 | } |
1092 | 1092 | ||
1093 | static int __init aesni_init(void) | 1093 | static int __init aesni_init(void) |
@@ -1168,7 +1168,7 @@ static int __init aesni_init(void) | |||
1168 | simd = simd_skcipher_create_compat(algname, drvname, basename); | 1168 | simd = simd_skcipher_create_compat(algname, drvname, basename); |
1169 | err = PTR_ERR(simd); | 1169 | err = PTR_ERR(simd); |
1170 | if (IS_ERR(simd)) | 1170 | if (IS_ERR(simd)) |
1171 | goto unregister_simds; | 1171 | continue; |
1172 | 1172 | ||
1173 | aesni_simd_skciphers2[i].simd = simd; | 1173 | aesni_simd_skciphers2[i].simd = simd; |
1174 | } | 1174 | } |
diff --git a/crypto/algif_aead.c b/crypto/algif_aead.c index f849311e9fd4..533265f110e0 100644 --- a/crypto/algif_aead.c +++ b/crypto/algif_aead.c | |||
@@ -661,9 +661,9 @@ static int aead_recvmsg_sync(struct socket *sock, struct msghdr *msg, int flags) | |||
661 | unlock: | 661 | unlock: |
662 | list_for_each_entry_safe(rsgl, tmp, &ctx->list, list) { | 662 | list_for_each_entry_safe(rsgl, tmp, &ctx->list, list) { |
663 | af_alg_free_sg(&rsgl->sgl); | 663 | af_alg_free_sg(&rsgl->sgl); |
664 | list_del(&rsgl->list); | ||
664 | if (rsgl != &ctx->first_rsgl) | 665 | if (rsgl != &ctx->first_rsgl) |
665 | sock_kfree_s(sk, rsgl, sizeof(*rsgl)); | 666 | sock_kfree_s(sk, rsgl, sizeof(*rsgl)); |
666 | list_del(&rsgl->list); | ||
667 | } | 667 | } |
668 | INIT_LIST_HEAD(&ctx->list); | 668 | INIT_LIST_HEAD(&ctx->list); |
669 | aead_wmem_wakeup(sk); | 669 | aead_wmem_wakeup(sk); |
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/drivers/crypto/ccp/ccp-dev-v5.c index e2ce8190ecc9..612898b4aaad 100644 --- a/drivers/crypto/ccp/ccp-dev-v5.c +++ b/drivers/crypto/ccp/ccp-dev-v5.c | |||
@@ -959,7 +959,7 @@ static irqreturn_t ccp5_irq_handler(int irq, void *data) | |||
959 | static void ccp5_config(struct ccp_device *ccp) | 959 | static void ccp5_config(struct ccp_device *ccp) |
960 | { | 960 | { |
961 | /* Public side */ | 961 | /* Public side */ |
962 | iowrite32(0x00001249, ccp->io_regs + CMD5_REQID_CONFIG_OFFSET); | 962 | iowrite32(0x0, ccp->io_regs + CMD5_REQID_CONFIG_OFFSET); |
963 | } | 963 | } |
964 | 964 | ||
965 | static void ccp5other_config(struct ccp_device *ccp) | 965 | static void ccp5other_config(struct ccp_device *ccp) |
diff --git a/drivers/crypto/ccp/ccp-dev.h b/drivers/crypto/ccp/ccp-dev.h index 830f35e6005f..649e5610a5ce 100644 --- a/drivers/crypto/ccp/ccp-dev.h +++ b/drivers/crypto/ccp/ccp-dev.h | |||
@@ -238,6 +238,7 @@ struct ccp_dma_chan { | |||
238 | struct ccp_device *ccp; | 238 | struct ccp_device *ccp; |
239 | 239 | ||
240 | spinlock_t lock; | 240 | spinlock_t lock; |
241 | struct list_head created; | ||
241 | struct list_head pending; | 242 | struct list_head pending; |
242 | struct list_head active; | 243 | struct list_head active; |
243 | struct list_head complete; | 244 | struct list_head complete; |
diff --git a/drivers/crypto/ccp/ccp-dmaengine.c b/drivers/crypto/ccp/ccp-dmaengine.c index 6553912804f7..e5d9278f4019 100644 --- a/drivers/crypto/ccp/ccp-dmaengine.c +++ b/drivers/crypto/ccp/ccp-dmaengine.c | |||
@@ -63,6 +63,7 @@ static void ccp_free_chan_resources(struct dma_chan *dma_chan) | |||
63 | ccp_free_desc_resources(chan->ccp, &chan->complete); | 63 | ccp_free_desc_resources(chan->ccp, &chan->complete); |
64 | ccp_free_desc_resources(chan->ccp, &chan->active); | 64 | ccp_free_desc_resources(chan->ccp, &chan->active); |
65 | ccp_free_desc_resources(chan->ccp, &chan->pending); | 65 | ccp_free_desc_resources(chan->ccp, &chan->pending); |
66 | ccp_free_desc_resources(chan->ccp, &chan->created); | ||
66 | 67 | ||
67 | spin_unlock_irqrestore(&chan->lock, flags); | 68 | spin_unlock_irqrestore(&chan->lock, flags); |
68 | } | 69 | } |
@@ -273,6 +274,7 @@ static dma_cookie_t ccp_tx_submit(struct dma_async_tx_descriptor *tx_desc) | |||
273 | spin_lock_irqsave(&chan->lock, flags); | 274 | spin_lock_irqsave(&chan->lock, flags); |
274 | 275 | ||
275 | cookie = dma_cookie_assign(tx_desc); | 276 | cookie = dma_cookie_assign(tx_desc); |
277 | list_del(&desc->entry); | ||
276 | list_add_tail(&desc->entry, &chan->pending); | 278 | list_add_tail(&desc->entry, &chan->pending); |
277 | 279 | ||
278 | spin_unlock_irqrestore(&chan->lock, flags); | 280 | spin_unlock_irqrestore(&chan->lock, flags); |
@@ -426,7 +428,7 @@ static struct ccp_dma_desc *ccp_create_desc(struct dma_chan *dma_chan, | |||
426 | 428 | ||
427 | spin_lock_irqsave(&chan->lock, sflags); | 429 | spin_lock_irqsave(&chan->lock, sflags); |
428 | 430 | ||
429 | list_add_tail(&desc->entry, &chan->pending); | 431 | list_add_tail(&desc->entry, &chan->created); |
430 | 432 | ||
431 | spin_unlock_irqrestore(&chan->lock, sflags); | 433 | spin_unlock_irqrestore(&chan->lock, sflags); |
432 | 434 | ||
@@ -610,6 +612,7 @@ static int ccp_terminate_all(struct dma_chan *dma_chan) | |||
610 | /*TODO: Purge the complete list? */ | 612 | /*TODO: Purge the complete list? */ |
611 | ccp_free_desc_resources(chan->ccp, &chan->active); | 613 | ccp_free_desc_resources(chan->ccp, &chan->active); |
612 | ccp_free_desc_resources(chan->ccp, &chan->pending); | 614 | ccp_free_desc_resources(chan->ccp, &chan->pending); |
615 | ccp_free_desc_resources(chan->ccp, &chan->created); | ||
613 | 616 | ||
614 | spin_unlock_irqrestore(&chan->lock, flags); | 617 | spin_unlock_irqrestore(&chan->lock, flags); |
615 | 618 | ||
@@ -679,6 +682,7 @@ int ccp_dmaengine_register(struct ccp_device *ccp) | |||
679 | chan->ccp = ccp; | 682 | chan->ccp = ccp; |
680 | 683 | ||
681 | spin_lock_init(&chan->lock); | 684 | spin_lock_init(&chan->lock); |
685 | INIT_LIST_HEAD(&chan->created); | ||
682 | INIT_LIST_HEAD(&chan->pending); | 686 | INIT_LIST_HEAD(&chan->pending); |
683 | INIT_LIST_HEAD(&chan->active); | 687 | INIT_LIST_HEAD(&chan->active); |
684 | INIT_LIST_HEAD(&chan->complete); | 688 | INIT_LIST_HEAD(&chan->complete); |
diff --git a/drivers/crypto/chelsio/chcr_algo.c b/drivers/crypto/chelsio/chcr_algo.c index 2ed1e24b44a8..b4b78b37f8a6 100644 --- a/drivers/crypto/chelsio/chcr_algo.c +++ b/drivers/crypto/chelsio/chcr_algo.c | |||
@@ -158,7 +158,7 @@ int chcr_handle_resp(struct crypto_async_request *req, unsigned char *input, | |||
158 | case CRYPTO_ALG_TYPE_AEAD: | 158 | case CRYPTO_ALG_TYPE_AEAD: |
159 | ctx_req.req.aead_req = (struct aead_request *)req; | 159 | ctx_req.req.aead_req = (struct aead_request *)req; |
160 | ctx_req.ctx.reqctx = aead_request_ctx(ctx_req.req.aead_req); | 160 | ctx_req.ctx.reqctx = aead_request_ctx(ctx_req.req.aead_req); |
161 | dma_unmap_sg(&u_ctx->lldi.pdev->dev, ctx_req.req.aead_req->dst, | 161 | dma_unmap_sg(&u_ctx->lldi.pdev->dev, ctx_req.ctx.reqctx->dst, |
162 | ctx_req.ctx.reqctx->dst_nents, DMA_FROM_DEVICE); | 162 | ctx_req.ctx.reqctx->dst_nents, DMA_FROM_DEVICE); |
163 | if (ctx_req.ctx.reqctx->skb) { | 163 | if (ctx_req.ctx.reqctx->skb) { |
164 | kfree_skb(ctx_req.ctx.reqctx->skb); | 164 | kfree_skb(ctx_req.ctx.reqctx->skb); |
@@ -1362,8 +1362,7 @@ static struct sk_buff *create_authenc_wr(struct aead_request *req, | |||
1362 | struct chcr_wr *chcr_req; | 1362 | struct chcr_wr *chcr_req; |
1363 | struct cpl_rx_phys_dsgl *phys_cpl; | 1363 | struct cpl_rx_phys_dsgl *phys_cpl; |
1364 | struct phys_sge_parm sg_param; | 1364 | struct phys_sge_parm sg_param; |
1365 | struct scatterlist *src, *dst; | 1365 | struct scatterlist *src; |
1366 | struct scatterlist src_sg[2], dst_sg[2]; | ||
1367 | unsigned int frags = 0, transhdr_len; | 1366 | unsigned int frags = 0, transhdr_len; |
1368 | unsigned int ivsize = crypto_aead_ivsize(tfm), dst_size = 0; | 1367 | unsigned int ivsize = crypto_aead_ivsize(tfm), dst_size = 0; |
1369 | unsigned int kctx_len = 0; | 1368 | unsigned int kctx_len = 0; |
@@ -1383,19 +1382,21 @@ static struct sk_buff *create_authenc_wr(struct aead_request *req, | |||
1383 | 1382 | ||
1384 | if (sg_nents_for_len(req->src, req->assoclen + req->cryptlen) < 0) | 1383 | if (sg_nents_for_len(req->src, req->assoclen + req->cryptlen) < 0) |
1385 | goto err; | 1384 | goto err; |
1386 | src = scatterwalk_ffwd(src_sg, req->src, req->assoclen); | 1385 | src = scatterwalk_ffwd(reqctx->srcffwd, req->src, req->assoclen); |
1387 | dst = src; | 1386 | reqctx->dst = src; |
1387 | |||
1388 | if (req->src != req->dst) { | 1388 | if (req->src != req->dst) { |
1389 | err = chcr_copy_assoc(req, aeadctx); | 1389 | err = chcr_copy_assoc(req, aeadctx); |
1390 | if (err) | 1390 | if (err) |
1391 | return ERR_PTR(err); | 1391 | return ERR_PTR(err); |
1392 | dst = scatterwalk_ffwd(dst_sg, req->dst, req->assoclen); | 1392 | reqctx->dst = scatterwalk_ffwd(reqctx->dstffwd, req->dst, |
1393 | req->assoclen); | ||
1393 | } | 1394 | } |
1394 | if (get_aead_subtype(tfm) == CRYPTO_ALG_SUB_TYPE_AEAD_NULL) { | 1395 | if (get_aead_subtype(tfm) == CRYPTO_ALG_SUB_TYPE_AEAD_NULL) { |
1395 | null = 1; | 1396 | null = 1; |
1396 | assoclen = 0; | 1397 | assoclen = 0; |
1397 | } | 1398 | } |
1398 | reqctx->dst_nents = sg_nents_for_len(dst, req->cryptlen + | 1399 | reqctx->dst_nents = sg_nents_for_len(reqctx->dst, req->cryptlen + |
1399 | (op_type ? -authsize : authsize)); | 1400 | (op_type ? -authsize : authsize)); |
1400 | if (reqctx->dst_nents <= 0) { | 1401 | if (reqctx->dst_nents <= 0) { |
1401 | pr_err("AUTHENC:Invalid Destination sg entries\n"); | 1402 | pr_err("AUTHENC:Invalid Destination sg entries\n"); |
@@ -1460,7 +1461,7 @@ static struct sk_buff *create_authenc_wr(struct aead_request *req, | |||
1460 | sg_param.obsize = req->cryptlen + (op_type ? -authsize : authsize); | 1461 | sg_param.obsize = req->cryptlen + (op_type ? -authsize : authsize); |
1461 | sg_param.qid = qid; | 1462 | sg_param.qid = qid; |
1462 | sg_param.align = 0; | 1463 | sg_param.align = 0; |
1463 | if (map_writesg_phys_cpl(&u_ctx->lldi.pdev->dev, phys_cpl, dst, | 1464 | if (map_writesg_phys_cpl(&u_ctx->lldi.pdev->dev, phys_cpl, reqctx->dst, |
1464 | &sg_param)) | 1465 | &sg_param)) |
1465 | goto dstmap_fail; | 1466 | goto dstmap_fail; |
1466 | 1467 | ||
@@ -1711,8 +1712,7 @@ static struct sk_buff *create_aead_ccm_wr(struct aead_request *req, | |||
1711 | struct chcr_wr *chcr_req; | 1712 | struct chcr_wr *chcr_req; |
1712 | struct cpl_rx_phys_dsgl *phys_cpl; | 1713 | struct cpl_rx_phys_dsgl *phys_cpl; |
1713 | struct phys_sge_parm sg_param; | 1714 | struct phys_sge_parm sg_param; |
1714 | struct scatterlist *src, *dst; | 1715 | struct scatterlist *src; |
1715 | struct scatterlist src_sg[2], dst_sg[2]; | ||
1716 | unsigned int frags = 0, transhdr_len, ivsize = AES_BLOCK_SIZE; | 1716 | unsigned int frags = 0, transhdr_len, ivsize = AES_BLOCK_SIZE; |
1717 | unsigned int dst_size = 0, kctx_len; | 1717 | unsigned int dst_size = 0, kctx_len; |
1718 | unsigned int sub_type; | 1718 | unsigned int sub_type; |
@@ -1728,17 +1728,19 @@ static struct sk_buff *create_aead_ccm_wr(struct aead_request *req, | |||
1728 | if (sg_nents_for_len(req->src, req->assoclen + req->cryptlen) < 0) | 1728 | if (sg_nents_for_len(req->src, req->assoclen + req->cryptlen) < 0) |
1729 | goto err; | 1729 | goto err; |
1730 | sub_type = get_aead_subtype(tfm); | 1730 | sub_type = get_aead_subtype(tfm); |
1731 | src = scatterwalk_ffwd(src_sg, req->src, req->assoclen); | 1731 | src = scatterwalk_ffwd(reqctx->srcffwd, req->src, req->assoclen); |
1732 | dst = src; | 1732 | reqctx->dst = src; |
1733 | |||
1733 | if (req->src != req->dst) { | 1734 | if (req->src != req->dst) { |
1734 | err = chcr_copy_assoc(req, aeadctx); | 1735 | err = chcr_copy_assoc(req, aeadctx); |
1735 | if (err) { | 1736 | if (err) { |
1736 | pr_err("AAD copy to destination buffer fails\n"); | 1737 | pr_err("AAD copy to destination buffer fails\n"); |
1737 | return ERR_PTR(err); | 1738 | return ERR_PTR(err); |
1738 | } | 1739 | } |
1739 | dst = scatterwalk_ffwd(dst_sg, req->dst, req->assoclen); | 1740 | reqctx->dst = scatterwalk_ffwd(reqctx->dstffwd, req->dst, |
1741 | req->assoclen); | ||
1740 | } | 1742 | } |
1741 | reqctx->dst_nents = sg_nents_for_len(dst, req->cryptlen + | 1743 | reqctx->dst_nents = sg_nents_for_len(reqctx->dst, req->cryptlen + |
1742 | (op_type ? -authsize : authsize)); | 1744 | (op_type ? -authsize : authsize)); |
1743 | if (reqctx->dst_nents <= 0) { | 1745 | if (reqctx->dst_nents <= 0) { |
1744 | pr_err("CCM:Invalid Destination sg entries\n"); | 1746 | pr_err("CCM:Invalid Destination sg entries\n"); |
@@ -1777,7 +1779,7 @@ static struct sk_buff *create_aead_ccm_wr(struct aead_request *req, | |||
1777 | sg_param.obsize = req->cryptlen + (op_type ? -authsize : authsize); | 1779 | sg_param.obsize = req->cryptlen + (op_type ? -authsize : authsize); |
1778 | sg_param.qid = qid; | 1780 | sg_param.qid = qid; |
1779 | sg_param.align = 0; | 1781 | sg_param.align = 0; |
1780 | if (map_writesg_phys_cpl(&u_ctx->lldi.pdev->dev, phys_cpl, dst, | 1782 | if (map_writesg_phys_cpl(&u_ctx->lldi.pdev->dev, phys_cpl, reqctx->dst, |
1781 | &sg_param)) | 1783 | &sg_param)) |
1782 | goto dstmap_fail; | 1784 | goto dstmap_fail; |
1783 | 1785 | ||
@@ -1809,8 +1811,7 @@ static struct sk_buff *create_gcm_wr(struct aead_request *req, | |||
1809 | struct chcr_wr *chcr_req; | 1811 | struct chcr_wr *chcr_req; |
1810 | struct cpl_rx_phys_dsgl *phys_cpl; | 1812 | struct cpl_rx_phys_dsgl *phys_cpl; |
1811 | struct phys_sge_parm sg_param; | 1813 | struct phys_sge_parm sg_param; |
1812 | struct scatterlist *src, *dst; | 1814 | struct scatterlist *src; |
1813 | struct scatterlist src_sg[2], dst_sg[2]; | ||
1814 | unsigned int frags = 0, transhdr_len; | 1815 | unsigned int frags = 0, transhdr_len; |
1815 | unsigned int ivsize = AES_BLOCK_SIZE; | 1816 | unsigned int ivsize = AES_BLOCK_SIZE; |
1816 | unsigned int dst_size = 0, kctx_len; | 1817 | unsigned int dst_size = 0, kctx_len; |
@@ -1832,13 +1833,14 @@ static struct sk_buff *create_gcm_wr(struct aead_request *req, | |||
1832 | if (sg_nents_for_len(req->src, req->assoclen + req->cryptlen) < 0) | 1833 | if (sg_nents_for_len(req->src, req->assoclen + req->cryptlen) < 0) |
1833 | goto err; | 1834 | goto err; |
1834 | 1835 | ||
1835 | src = scatterwalk_ffwd(src_sg, req->src, req->assoclen); | 1836 | src = scatterwalk_ffwd(reqctx->srcffwd, req->src, req->assoclen); |
1836 | dst = src; | 1837 | reqctx->dst = src; |
1837 | if (req->src != req->dst) { | 1838 | if (req->src != req->dst) { |
1838 | err = chcr_copy_assoc(req, aeadctx); | 1839 | err = chcr_copy_assoc(req, aeadctx); |
1839 | if (err) | 1840 | if (err) |
1840 | return ERR_PTR(err); | 1841 | return ERR_PTR(err); |
1841 | dst = scatterwalk_ffwd(dst_sg, req->dst, req->assoclen); | 1842 | reqctx->dst = scatterwalk_ffwd(reqctx->dstffwd, req->dst, |
1843 | req->assoclen); | ||
1842 | } | 1844 | } |
1843 | 1845 | ||
1844 | if (!req->cryptlen) | 1846 | if (!req->cryptlen) |
@@ -1848,7 +1850,7 @@ static struct sk_buff *create_gcm_wr(struct aead_request *req, | |||
1848 | crypt_len = AES_BLOCK_SIZE; | 1850 | crypt_len = AES_BLOCK_SIZE; |
1849 | else | 1851 | else |
1850 | crypt_len = req->cryptlen; | 1852 | crypt_len = req->cryptlen; |
1851 | reqctx->dst_nents = sg_nents_for_len(dst, req->cryptlen + | 1853 | reqctx->dst_nents = sg_nents_for_len(reqctx->dst, req->cryptlen + |
1852 | (op_type ? -authsize : authsize)); | 1854 | (op_type ? -authsize : authsize)); |
1853 | if (reqctx->dst_nents <= 0) { | 1855 | if (reqctx->dst_nents <= 0) { |
1854 | pr_err("GCM:Invalid Destination sg entries\n"); | 1856 | pr_err("GCM:Invalid Destination sg entries\n"); |
@@ -1923,7 +1925,7 @@ static struct sk_buff *create_gcm_wr(struct aead_request *req, | |||
1923 | sg_param.obsize = req->cryptlen + (op_type ? -authsize : authsize); | 1925 | sg_param.obsize = req->cryptlen + (op_type ? -authsize : authsize); |
1924 | sg_param.qid = qid; | 1926 | sg_param.qid = qid; |
1925 | sg_param.align = 0; | 1927 | sg_param.align = 0; |
1926 | if (map_writesg_phys_cpl(&u_ctx->lldi.pdev->dev, phys_cpl, dst, | 1928 | if (map_writesg_phys_cpl(&u_ctx->lldi.pdev->dev, phys_cpl, reqctx->dst, |
1927 | &sg_param)) | 1929 | &sg_param)) |
1928 | goto dstmap_fail; | 1930 | goto dstmap_fail; |
1929 | 1931 | ||
@@ -1937,7 +1939,8 @@ static struct sk_buff *create_gcm_wr(struct aead_request *req, | |||
1937 | write_sg_to_skb(skb, &frags, src, req->cryptlen); | 1939 | write_sg_to_skb(skb, &frags, src, req->cryptlen); |
1938 | } else { | 1940 | } else { |
1939 | aes_gcm_empty_pld_pad(req->dst, authsize - 1); | 1941 | aes_gcm_empty_pld_pad(req->dst, authsize - 1); |
1940 | write_sg_to_skb(skb, &frags, dst, crypt_len); | 1942 | write_sg_to_skb(skb, &frags, reqctx->dst, crypt_len); |
1943 | |||
1941 | } | 1944 | } |
1942 | 1945 | ||
1943 | create_wreq(ctx, chcr_req, req, skb, kctx_len, size, 1, | 1946 | create_wreq(ctx, chcr_req, req, skb, kctx_len, size, 1, |
@@ -2189,8 +2192,8 @@ static int chcr_gcm_setkey(struct crypto_aead *aead, const u8 *key, | |||
2189 | unsigned int ck_size; | 2192 | unsigned int ck_size; |
2190 | int ret = 0, key_ctx_size = 0; | 2193 | int ret = 0, key_ctx_size = 0; |
2191 | 2194 | ||
2192 | if (get_aead_subtype(aead) == | 2195 | if (get_aead_subtype(aead) == CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106 && |
2193 | CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106) { | 2196 | keylen > 3) { |
2194 | keylen -= 4; /* nonce/salt is present in the last 4 bytes */ | 2197 | keylen -= 4; /* nonce/salt is present in the last 4 bytes */ |
2195 | memcpy(aeadctx->salt, key + keylen, 4); | 2198 | memcpy(aeadctx->salt, key + keylen, 4); |
2196 | } | 2199 | } |
diff --git a/drivers/crypto/chelsio/chcr_core.c b/drivers/crypto/chelsio/chcr_core.c index 918da8e6e2d8..1c65f07e1cc9 100644 --- a/drivers/crypto/chelsio/chcr_core.c +++ b/drivers/crypto/chelsio/chcr_core.c | |||
@@ -52,6 +52,7 @@ static struct cxgb4_uld_info chcr_uld_info = { | |||
52 | int assign_chcr_device(struct chcr_dev **dev) | 52 | int assign_chcr_device(struct chcr_dev **dev) |
53 | { | 53 | { |
54 | struct uld_ctx *u_ctx; | 54 | struct uld_ctx *u_ctx; |
55 | int ret = -ENXIO; | ||
55 | 56 | ||
56 | /* | 57 | /* |
57 | * Which device to use if multiple devices are available TODO | 58 | * Which device to use if multiple devices are available TODO |
@@ -59,15 +60,14 @@ int assign_chcr_device(struct chcr_dev **dev) | |||
59 | * must go to the same device to maintain the ordering. | 60 | * must go to the same device to maintain the ordering. |
60 | */ | 61 | */ |
61 | mutex_lock(&dev_mutex); /* TODO ? */ | 62 | mutex_lock(&dev_mutex); /* TODO ? */ |
62 | u_ctx = list_first_entry(&uld_ctx_list, struct uld_ctx, entry); | 63 | list_for_each_entry(u_ctx, &uld_ctx_list, entry) |
63 | if (!u_ctx) { | 64 | if (u_ctx && u_ctx->dev) { |
64 | mutex_unlock(&dev_mutex); | 65 | *dev = u_ctx->dev; |
65 | return -ENXIO; | 66 | ret = 0; |
67 | break; | ||
66 | } | 68 | } |
67 | |||
68 | *dev = u_ctx->dev; | ||
69 | mutex_unlock(&dev_mutex); | 69 | mutex_unlock(&dev_mutex); |
70 | return 0; | 70 | return ret; |
71 | } | 71 | } |
72 | 72 | ||
73 | static int chcr_dev_add(struct uld_ctx *u_ctx) | 73 | static int chcr_dev_add(struct uld_ctx *u_ctx) |
@@ -202,10 +202,8 @@ static int chcr_uld_state_change(void *handle, enum cxgb4_state state) | |||
202 | 202 | ||
203 | static int __init chcr_crypto_init(void) | 203 | static int __init chcr_crypto_init(void) |
204 | { | 204 | { |
205 | if (cxgb4_register_uld(CXGB4_ULD_CRYPTO, &chcr_uld_info)) { | 205 | if (cxgb4_register_uld(CXGB4_ULD_CRYPTO, &chcr_uld_info)) |
206 | pr_err("ULD register fail: No chcr crypto support in cxgb4"); | 206 | pr_err("ULD register fail: No chcr crypto support in cxgb4"); |
207 | return -1; | ||
208 | } | ||
209 | 207 | ||
210 | return 0; | 208 | return 0; |
211 | } | 209 | } |
diff --git a/drivers/crypto/chelsio/chcr_crypto.h b/drivers/crypto/chelsio/chcr_crypto.h index d5af7d64a763..7ec0a8f12475 100644 --- a/drivers/crypto/chelsio/chcr_crypto.h +++ b/drivers/crypto/chelsio/chcr_crypto.h | |||
@@ -158,6 +158,9 @@ struct ablk_ctx { | |||
158 | }; | 158 | }; |
159 | struct chcr_aead_reqctx { | 159 | struct chcr_aead_reqctx { |
160 | struct sk_buff *skb; | 160 | struct sk_buff *skb; |
161 | struct scatterlist *dst; | ||
162 | struct scatterlist srcffwd[2]; | ||
163 | struct scatterlist dstffwd[2]; | ||
161 | short int dst_nents; | 164 | short int dst_nents; |
162 | u16 verify; | 165 | u16 verify; |
163 | u8 iv[CHCR_MAX_CRYPTO_IV_LEN]; | 166 | u8 iv[CHCR_MAX_CRYPTO_IV_LEN]; |
diff --git a/drivers/crypto/qat/qat_c62x/adf_drv.c b/drivers/crypto/qat/qat_c62x/adf_drv.c index bc5cbc193aae..5b2d78a5b5aa 100644 --- a/drivers/crypto/qat/qat_c62x/adf_drv.c +++ b/drivers/crypto/qat/qat_c62x/adf_drv.c | |||
@@ -233,7 +233,7 @@ static int adf_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |||
233 | &hw_data->accel_capabilities_mask); | 233 | &hw_data->accel_capabilities_mask); |
234 | 234 | ||
235 | /* Find and map all the device's BARS */ | 235 | /* Find and map all the device's BARS */ |
236 | i = 0; | 236 | i = (hw_data->fuses & ADF_DEVICE_FUSECTL_MASK) ? 1 : 0; |
237 | bar_mask = pci_select_bars(pdev, IORESOURCE_MEM); | 237 | bar_mask = pci_select_bars(pdev, IORESOURCE_MEM); |
238 | for_each_set_bit(bar_nr, (const unsigned long *)&bar_mask, | 238 | for_each_set_bit(bar_nr, (const unsigned long *)&bar_mask, |
239 | ADF_PCI_MAX_BARS * 2) { | 239 | ADF_PCI_MAX_BARS * 2) { |
diff --git a/drivers/crypto/qat/qat_common/adf_accel_devices.h b/drivers/crypto/qat/qat_common/adf_accel_devices.h index e8822536530b..33f0a6251e38 100644 --- a/drivers/crypto/qat/qat_common/adf_accel_devices.h +++ b/drivers/crypto/qat/qat_common/adf_accel_devices.h | |||
@@ -69,6 +69,7 @@ | |||
69 | #define ADF_ERRSOU5 (0x3A000 + 0xD8) | 69 | #define ADF_ERRSOU5 (0x3A000 + 0xD8) |
70 | #define ADF_DEVICE_FUSECTL_OFFSET 0x40 | 70 | #define ADF_DEVICE_FUSECTL_OFFSET 0x40 |
71 | #define ADF_DEVICE_LEGFUSE_OFFSET 0x4C | 71 | #define ADF_DEVICE_LEGFUSE_OFFSET 0x4C |
72 | #define ADF_DEVICE_FUSECTL_MASK 0x80000000 | ||
72 | #define ADF_PCI_MAX_BARS 3 | 73 | #define ADF_PCI_MAX_BARS 3 |
73 | #define ADF_DEVICE_NAME_LENGTH 32 | 74 | #define ADF_DEVICE_NAME_LENGTH 32 |
74 | #define ADF_ETR_MAX_RINGS_PER_BANK 16 | 75 | #define ADF_ETR_MAX_RINGS_PER_BANK 16 |
diff --git a/drivers/crypto/qat/qat_common/qat_hal.c b/drivers/crypto/qat/qat_common/qat_hal.c index 1e480f140663..8c4fd255a601 100644 --- a/drivers/crypto/qat/qat_common/qat_hal.c +++ b/drivers/crypto/qat/qat_common/qat_hal.c | |||
@@ -456,7 +456,7 @@ static int qat_hal_init_esram(struct icp_qat_fw_loader_handle *handle) | |||
456 | unsigned int csr_val; | 456 | unsigned int csr_val; |
457 | int times = 30; | 457 | int times = 30; |
458 | 458 | ||
459 | if (handle->pci_dev->device == ADF_C3XXX_PCI_DEVICE_ID) | 459 | if (handle->pci_dev->device != ADF_DH895XCC_PCI_DEVICE_ID) |
460 | return 0; | 460 | return 0; |
461 | 461 | ||
462 | csr_val = ADF_CSR_RD(csr_addr, 0); | 462 | csr_val = ADF_CSR_RD(csr_addr, 0); |
@@ -716,7 +716,7 @@ int qat_hal_init(struct adf_accel_dev *accel_dev) | |||
716 | (void __iomem *)((uintptr_t)handle->hal_cap_ae_xfer_csr_addr_v + | 716 | (void __iomem *)((uintptr_t)handle->hal_cap_ae_xfer_csr_addr_v + |
717 | LOCAL_TO_XFER_REG_OFFSET); | 717 | LOCAL_TO_XFER_REG_OFFSET); |
718 | handle->pci_dev = pci_info->pci_dev; | 718 | handle->pci_dev = pci_info->pci_dev; |
719 | if (handle->pci_dev->device != ADF_C3XXX_PCI_DEVICE_ID) { | 719 | if (handle->pci_dev->device == ADF_DH895XCC_PCI_DEVICE_ID) { |
720 | sram_bar = | 720 | sram_bar = |
721 | &pci_info->pci_bars[hw_data->get_sram_bar_id(hw_data)]; | 721 | &pci_info->pci_bars[hw_data->get_sram_bar_id(hw_data)]; |
722 | handle->hal_sram_addr_v = sram_bar->virt_addr; | 722 | handle->hal_sram_addr_v = sram_bar->virt_addr; |