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authorAndy Shevchenko <andriy.shevchenko@linux.intel.com>2015-09-28 11:57:04 -0400
committerVinod Koul <vinod.koul@intel.com>2015-09-30 04:13:09 -0400
commit39416677b95bf1ab8bbfa229ec7e511c96ad5d0c (patch)
treeaffa045afd429e807ea61778fb1e1aa05bd5f991
parent6ff33f3902c3b1c5d0db6b1e2c70b6d76fba357f (diff)
dmaengine: dw: convert to __ffs()
We replace __fls() by __ffs() since we have to find a *minimum* data width that satisfies both source and destination. While here, rename dwc_fast_fls() to dwc_fast_ffs() which it really is. Fixes: 4c2d56c574db (dw_dmac: introduce dwc_fast_fls()) Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-rw-r--r--drivers/dma/dw/core.c12
1 files changed, 6 insertions, 6 deletions
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index cf1c87fa1edd..46859f738fcf 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -163,7 +163,7 @@ static void dwc_initialize(struct dw_dma_chan *dwc)
163 163
164/*----------------------------------------------------------------------*/ 164/*----------------------------------------------------------------------*/
165 165
166static inline unsigned int dwc_fast_fls(unsigned long long v) 166static inline unsigned int dwc_fast_ffs(unsigned long long v)
167{ 167{
168 /* 168 /*
169 * We can be a lot more clever here, but this should take care 169 * We can be a lot more clever here, but this should take care
@@ -712,7 +712,7 @@ dwc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
712 dw->data_width[dwc->dst_master]); 712 dw->data_width[dwc->dst_master]);
713 713
714 src_width = dst_width = min_t(unsigned int, data_width, 714 src_width = dst_width = min_t(unsigned int, data_width,
715 dwc_fast_fls(src | dest | len)); 715 dwc_fast_ffs(src | dest | len));
716 716
717 ctllo = DWC_DEFAULT_CTLLO(chan) 717 ctllo = DWC_DEFAULT_CTLLO(chan)
718 | DWC_CTLL_DST_WIDTH(dst_width) 718 | DWC_CTLL_DST_WIDTH(dst_width)
@@ -791,7 +791,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
791 791
792 switch (direction) { 792 switch (direction) {
793 case DMA_MEM_TO_DEV: 793 case DMA_MEM_TO_DEV:
794 reg_width = __fls(sconfig->dst_addr_width); 794 reg_width = __ffs(sconfig->dst_addr_width);
795 reg = sconfig->dst_addr; 795 reg = sconfig->dst_addr;
796 ctllo = (DWC_DEFAULT_CTLLO(chan) 796 ctllo = (DWC_DEFAULT_CTLLO(chan)
797 | DWC_CTLL_DST_WIDTH(reg_width) 797 | DWC_CTLL_DST_WIDTH(reg_width)
@@ -811,7 +811,7 @@ dwc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
811 len = sg_dma_len(sg); 811 len = sg_dma_len(sg);
812 812
813 mem_width = min_t(unsigned int, 813 mem_width = min_t(unsigned int,
814 data_width, dwc_fast_fls(mem | len)); 814 data_width, dwc_fast_ffs(mem | len));
815 815
816slave_sg_todev_fill_desc: 816slave_sg_todev_fill_desc:
817 desc = dwc_desc_get(dwc); 817 desc = dwc_desc_get(dwc);
@@ -848,7 +848,7 @@ slave_sg_todev_fill_desc:
848 } 848 }
849 break; 849 break;
850 case DMA_DEV_TO_MEM: 850 case DMA_DEV_TO_MEM:
851 reg_width = __fls(sconfig->src_addr_width); 851 reg_width = __ffs(sconfig->src_addr_width);
852 reg = sconfig->src_addr; 852 reg = sconfig->src_addr;
853 ctllo = (DWC_DEFAULT_CTLLO(chan) 853 ctllo = (DWC_DEFAULT_CTLLO(chan)
854 | DWC_CTLL_SRC_WIDTH(reg_width) 854 | DWC_CTLL_SRC_WIDTH(reg_width)
@@ -868,7 +868,7 @@ slave_sg_todev_fill_desc:
868 len = sg_dma_len(sg); 868 len = sg_dma_len(sg);
869 869
870 mem_width = min_t(unsigned int, 870 mem_width = min_t(unsigned int,
871 data_width, dwc_fast_fls(mem | len)); 871 data_width, dwc_fast_ffs(mem | len));
872 872
873slave_sg_fromdev_fill_desc: 873slave_sg_fromdev_fill_desc:
874 desc = dwc_desc_get(dwc); 874 desc = dwc_desc_get(dwc);