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authorAndrzej Hajda <a.hajda@samsung.com>2017-12-01 06:33:51 -0500
committerKrzysztof Kozlowski <krzk@kernel.org>2017-12-04 11:51:10 -0500
commit3808354701090723b53c73afaccfcafdeb8a5bfe (patch)
tree0e367b2cd216f25140cc39cd33d926f01a52befa
parent3b94d24dea6c1253a3bcec390401ddbf568125cd (diff)
arm64: dts: exynos: Increase bus frequency for MHL chip
sii8620 supports 1 MHz clock, it allows faster transmissions and according to extensive tests allows to mitigate some obscure bugs in I2C client logic of the chip. Signed-off-by: Andrzej Hajda <a.hajda@samsung.com> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
-rw-r--r--arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi1
1 files changed, 1 insertions, 0 deletions
diff --git a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
index 5028d7352856..2e4bc94e9b8b 100644
--- a/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
+++ b/arch/arm64/boot/dts/exynos/exynos5433-tm2-common.dtsi
@@ -769,6 +769,7 @@
769 769
770&hsi2c_7 { 770&hsi2c_7 {
771 status = "okay"; 771 status = "okay";
772 clock-frequency = <1000000>;
772 773
773 sii8620@39 { 774 sii8620@39 {
774 reg = <0x39>; 775 reg = <0x39>;