diff options
| author | Jordan Crouse <jcrouse@codeaurora.org> | 2018-12-03 17:47:22 -0500 |
|---|---|---|
| committer | Rob Clark <robdclark@gmail.com> | 2018-12-11 13:10:18 -0500 |
| commit | 3804a9824186af7c10f36fd4262b4e97326f1ef1 (patch) | |
| tree | 7afb16a7fd75f8ce5d9564edece96e9463525175 | |
| parent | 3d688410e6419d3d9cffa160506fe954039e0cc7 (diff) | |
drm/msm/dpu: Further cleanups for static inline functions
Remove more static inline functions that are lightly used and/or
very simple and easy to build into the calling functions.
v3: Fix a nit from Sean Paul
v2: Removed another unused function from dpu_hw_lm.c and add back
dpu_crtc_get_client_type() since there was a question regarding
its usefulness.
Reviewed-by: Sean Paul <sean@poorly.run>
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
Signed-off-by: Sean Paul <seanpaul@chromium.org>
Signed-off-by: Rob Clark <robdclark@gmail.com>
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | 12 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | 10 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | 2 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | 11 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | 9 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | 5 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 3 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | 18 |
10 files changed, 13 insertions, 71 deletions
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c index 3090854a8575..a6f0c38a0a95 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c | |||
| @@ -46,12 +46,6 @@ | |||
| 46 | #define LEFT_MIXER 0 | 46 | #define LEFT_MIXER 0 |
| 47 | #define RIGHT_MIXER 1 | 47 | #define RIGHT_MIXER 1 |
| 48 | 48 | ||
| 49 | static inline int _dpu_crtc_get_mixer_width(struct dpu_crtc_state *cstate, | ||
| 50 | struct drm_display_mode *mode) | ||
| 51 | { | ||
| 52 | return mode->hdisplay / cstate->num_mixers; | ||
| 53 | } | ||
| 54 | |||
| 55 | static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc) | 49 | static struct dpu_kms *_dpu_crtc_get_kms(struct drm_crtc *crtc) |
| 56 | { | 50 | { |
| 57 | struct msm_drm_private *priv = crtc->dev->dev_private; | 51 | struct msm_drm_private *priv = crtc->dev->dev_private; |
| @@ -497,7 +491,7 @@ static void _dpu_crtc_setup_lm_bounds(struct drm_crtc *crtc, | |||
| 497 | { | 491 | { |
| 498 | struct dpu_crtc_state *cstate = to_dpu_crtc_state(state); | 492 | struct dpu_crtc_state *cstate = to_dpu_crtc_state(state); |
| 499 | struct drm_display_mode *adj_mode = &state->adjusted_mode; | 493 | struct drm_display_mode *adj_mode = &state->adjusted_mode; |
| 500 | u32 crtc_split_width = _dpu_crtc_get_mixer_width(cstate, adj_mode); | 494 | u32 crtc_split_width = adj_mode->hdisplay / cstate->num_mixers; |
| 501 | int i; | 495 | int i; |
| 502 | 496 | ||
| 503 | for (i = 0; i < cstate->num_mixers; i++) { | 497 | for (i = 0; i < cstate->num_mixers; i++) { |
| @@ -952,7 +946,7 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc, | |||
| 952 | 946 | ||
| 953 | memset(pipe_staged, 0, sizeof(pipe_staged)); | 947 | memset(pipe_staged, 0, sizeof(pipe_staged)); |
| 954 | 948 | ||
| 955 | mixer_width = _dpu_crtc_get_mixer_width(cstate, mode); | 949 | mixer_width = mode->hdisplay / cstate->num_mixers; |
| 956 | 950 | ||
| 957 | _dpu_crtc_setup_lm_bounds(crtc, state); | 951 | _dpu_crtc_setup_lm_bounds(crtc, state); |
| 958 | 952 | ||
| @@ -1193,7 +1187,7 @@ static int _dpu_debugfs_status_show(struct seq_file *s, void *data) | |||
| 1193 | cstate = to_dpu_crtc_state(crtc->state); | 1187 | cstate = to_dpu_crtc_state(crtc->state); |
| 1194 | 1188 | ||
| 1195 | mode = &crtc->state->adjusted_mode; | 1189 | mode = &crtc->state->adjusted_mode; |
| 1196 | out_width = _dpu_crtc_get_mixer_width(cstate, mode); | 1190 | out_width = mode->hdisplay / cstate->num_mixers; |
| 1197 | 1191 | ||
| 1198 | seq_printf(s, "crtc:%d width:%d height:%d\n", crtc->base.id, | 1192 | seq_printf(s, "crtc:%d width:%d height:%d\n", crtc->base.id, |
| 1199 | mode->hdisplay, mode->vdisplay); | 1193 | mode->hdisplay, mode->vdisplay); |
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h index 94f5cea4e0d2..dbfb38a1986c 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.h | |||
| @@ -227,16 +227,6 @@ struct dpu_crtc_state { | |||
| 227 | container_of(x, struct dpu_crtc_state, base) | 227 | container_of(x, struct dpu_crtc_state, base) |
| 228 | 228 | ||
| 229 | /** | 229 | /** |
| 230 | * dpu_crtc_state_is_stereo - Is crtc virtualized with two mixers? | ||
| 231 | * @cstate: Pointer to dpu crtc state | ||
| 232 | * @Return: true - has two mixers, false - has one mixer | ||
| 233 | */ | ||
| 234 | static inline bool dpu_crtc_state_is_stereo(struct dpu_crtc_state *cstate) | ||
| 235 | { | ||
| 236 | return cstate->num_mixers == CRTC_DUAL_MIXERS; | ||
| 237 | } | ||
| 238 | |||
| 239 | /** | ||
| 240 | * dpu_crtc_frame_pending - retun the number of pending frames | 230 | * dpu_crtc_frame_pending - retun the number of pending frames |
| 241 | * @crtc: Pointer to drm crtc object | 231 | * @crtc: Pointer to drm crtc object |
| 242 | */ | 232 | */ |
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h index 3a67bb9f9d9d..44e6f8b68e70 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys.h | |||
| @@ -350,7 +350,7 @@ static inline enum dpu_3d_blend_mode dpu_encoder_helper_get_3d_blend_mode( | |||
| 350 | dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state); | 350 | dpu_cstate = to_dpu_crtc_state(phys_enc->parent->crtc->state); |
| 351 | 351 | ||
| 352 | if (phys_enc->split_role == ENC_ROLE_SOLO && | 352 | if (phys_enc->split_role == ENC_ROLE_SOLO && |
| 353 | dpu_crtc_state_is_stereo(dpu_cstate)) | 353 | dpu_cstate->num_mixers == CRTC_DUAL_MIXERS) |
| 354 | return BLEND_3D_H_ROW_INT; | 354 | return BLEND_3D_H_ROW_INT; |
| 355 | 355 | ||
| 356 | return BLEND_3D_NONE; | 356 | return BLEND_3D_NONE; |
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c index b37a0992e326..99ab5ca9bed3 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_encoder_phys_cmd.c | |||
| @@ -44,14 +44,7 @@ | |||
| 44 | 44 | ||
| 45 | #define DPU_ENC_WR_PTR_START_TIMEOUT_US 20000 | 45 | #define DPU_ENC_WR_PTR_START_TIMEOUT_US 20000 |
| 46 | 46 | ||
| 47 | static inline int _dpu_encoder_phys_cmd_get_idle_timeout( | 47 | static bool dpu_encoder_phys_cmd_is_master(struct dpu_encoder_phys *phys_enc) |
| 48 | struct dpu_encoder_phys_cmd *cmd_enc) | ||
| 49 | { | ||
| 50 | return KICKOFF_TIMEOUT_MS; | ||
| 51 | } | ||
| 52 | |||
| 53 | static inline bool dpu_encoder_phys_cmd_is_master( | ||
| 54 | struct dpu_encoder_phys *phys_enc) | ||
| 55 | { | 48 | { |
| 56 | return (phys_enc->split_role != ENC_ROLE_SLAVE) ? true : false; | 49 | return (phys_enc->split_role != ENC_ROLE_SLAVE) ? true : false; |
| 57 | } | 50 | } |
| @@ -723,7 +716,7 @@ static int dpu_encoder_phys_cmd_wait_for_vblank( | |||
| 723 | 716 | ||
| 724 | wait_info.wq = &cmd_enc->pending_vblank_wq; | 717 | wait_info.wq = &cmd_enc->pending_vblank_wq; |
| 725 | wait_info.atomic_cnt = &cmd_enc->pending_vblank_cnt; | 718 | wait_info.atomic_cnt = &cmd_enc->pending_vblank_cnt; |
| 726 | wait_info.timeout_ms = _dpu_encoder_phys_cmd_get_idle_timeout(cmd_enc); | 719 | wait_info.timeout_ms = KICKOFF_TIMEOUT_MS; |
| 727 | 720 | ||
| 728 | atomic_inc(&cmd_enc->pending_vblank_cnt); | 721 | atomic_inc(&cmd_enc->pending_vblank_cnt); |
| 729 | 722 | ||
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h index dc060e7358e4..144358a3d0fb 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.h | |||
| @@ -736,13 +736,4 @@ struct dpu_mdss_cfg *dpu_hw_catalog_init(u32 hw_rev); | |||
| 736 | */ | 736 | */ |
| 737 | void dpu_hw_catalog_deinit(struct dpu_mdss_cfg *dpu_cfg); | 737 | void dpu_hw_catalog_deinit(struct dpu_mdss_cfg *dpu_cfg); |
| 738 | 738 | ||
| 739 | /** | ||
| 740 | * dpu_hw_sspp_multirect_enabled - check multirect enabled for the sspp | ||
| 741 | * @cfg: pointer to sspp cfg | ||
| 742 | */ | ||
| 743 | static inline bool dpu_hw_sspp_multirect_enabled(const struct dpu_sspp_cfg *cfg) | ||
| 744 | { | ||
| 745 | return test_bit(DPU_SSPP_SMART_DMA_V1, &cfg->features) || | ||
| 746 | test_bit(DPU_SSPP_SMART_DMA_V2, &cfg->features); | ||
| 747 | } | ||
| 748 | #endif /* _DPU_HW_CATALOG_H */ | 739 | #endif /* _DPU_HW_CATALOG_H */ |
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c index 9f342af2aba7..018df2c3b7ed 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.c | |||
| @@ -156,11 +156,6 @@ static void dpu_hw_lm_setup_color3(struct dpu_hw_mixer *ctx, | |||
| 156 | DPU_REG_WRITE(c, LM_OP_MODE, op_mode); | 156 | DPU_REG_WRITE(c, LM_OP_MODE, op_mode); |
| 157 | } | 157 | } |
| 158 | 158 | ||
| 159 | static void dpu_hw_lm_gc(struct dpu_hw_mixer *mixer, | ||
| 160 | void *cfg) | ||
| 161 | { | ||
| 162 | } | ||
| 163 | |||
| 164 | static void _setup_mixer_ops(struct dpu_mdss_cfg *m, | 159 | static void _setup_mixer_ops(struct dpu_mdss_cfg *m, |
| 165 | struct dpu_hw_lm_ops *ops, | 160 | struct dpu_hw_lm_ops *ops, |
| 166 | unsigned long features) | 161 | unsigned long features) |
| @@ -172,7 +167,6 @@ static void _setup_mixer_ops(struct dpu_mdss_cfg *m, | |||
| 172 | ops->setup_blend_config = dpu_hw_lm_setup_blend_config; | 167 | ops->setup_blend_config = dpu_hw_lm_setup_blend_config; |
| 173 | ops->setup_alpha_out = dpu_hw_lm_setup_color3; | 168 | ops->setup_alpha_out = dpu_hw_lm_setup_color3; |
| 174 | ops->setup_border_color = dpu_hw_lm_setup_border_color; | 169 | ops->setup_border_color = dpu_hw_lm_setup_border_color; |
| 175 | ops->setup_gc = dpu_hw_lm_gc; | ||
| 176 | }; | 170 | }; |
| 177 | 171 | ||
| 178 | static struct dpu_hw_blk_ops dpu_hw_ops; | 172 | static struct dpu_hw_blk_ops dpu_hw_ops; |
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h index 5b036aca8340..6aee839a6a23 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_lm.h | |||
| @@ -61,11 +61,6 @@ struct dpu_hw_lm_ops { | |||
| 61 | void (*setup_border_color)(struct dpu_hw_mixer *ctx, | 61 | void (*setup_border_color)(struct dpu_hw_mixer *ctx, |
| 62 | struct dpu_mdss_color *color, | 62 | struct dpu_mdss_color *color, |
| 63 | u8 border_en); | 63 | u8 border_en); |
| 64 | /** | ||
| 65 | * setup_gc : enable/disable gamma correction feature | ||
| 66 | */ | ||
| 67 | void (*setup_gc)(struct dpu_hw_mixer *mixer, | ||
| 68 | void *cfg); | ||
| 69 | }; | 64 | }; |
| 70 | 65 | ||
| 71 | struct dpu_hw_mixer { | 66 | struct dpu_hw_mixer { |
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c index 3ebdf292d8f2..e9132bf5166b 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | |||
| @@ -661,7 +661,8 @@ static void _setup_layer_ops(struct dpu_hw_pipe *c, | |||
| 661 | test_bit(DPU_SSPP_CSC_10BIT, &features)) | 661 | test_bit(DPU_SSPP_CSC_10BIT, &features)) |
| 662 | c->ops.setup_csc = dpu_hw_sspp_setup_csc; | 662 | c->ops.setup_csc = dpu_hw_sspp_setup_csc; |
| 663 | 663 | ||
| 664 | if (dpu_hw_sspp_multirect_enabled(c->cap)) | 664 | if (test_bit(DPU_SSPP_SMART_DMA_V1, &c->cap->features) || |
| 665 | test_bit(DPU_SSPP_SMART_DMA_V2, &c->cap->features)) | ||
| 665 | c->ops.setup_multirect = dpu_hw_sspp_setup_multirect; | 666 | c->ops.setup_multirect = dpu_hw_sspp_setup_multirect; |
| 666 | 667 | ||
| 667 | if (test_bit(DPU_SSPP_SCALER_QSEED3, &features)) { | 668 | if (test_bit(DPU_SSPP_SCALER_QSEED3, &features)) { |
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c index 51a4a5f7c7f9..4d67b3c96702 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_kms.c | |||
| @@ -716,12 +716,6 @@ static const struct msm_kms_funcs kms_funcs = { | |||
| 716 | #endif | 716 | #endif |
| 717 | }; | 717 | }; |
| 718 | 718 | ||
| 719 | /* the caller api needs to turn on clock before calling it */ | ||
| 720 | static inline void _dpu_kms_core_hw_rev_init(struct dpu_kms *dpu_kms) | ||
| 721 | { | ||
| 722 | dpu_kms->core_rev = readl_relaxed(dpu_kms->mmio + 0x0); | ||
| 723 | } | ||
| 724 | |||
| 725 | static int _dpu_kms_mmu_destroy(struct dpu_kms *dpu_kms) | 719 | static int _dpu_kms_mmu_destroy(struct dpu_kms *dpu_kms) |
| 726 | { | 720 | { |
| 727 | struct msm_mmu *mmu; | 721 | struct msm_mmu *mmu; |
| @@ -859,7 +853,7 @@ static int dpu_kms_hw_init(struct msm_kms *kms) | |||
| 859 | 853 | ||
| 860 | pm_runtime_get_sync(&dpu_kms->pdev->dev); | 854 | pm_runtime_get_sync(&dpu_kms->pdev->dev); |
| 861 | 855 | ||
| 862 | _dpu_kms_core_hw_rev_init(dpu_kms); | 856 | dpu_kms->core_rev = readl_relaxed(dpu_kms->mmio + 0x0); |
| 863 | 857 | ||
| 864 | pr_info("dpu hardware revision:0x%x\n", dpu_kms->core_rev); | 858 | pr_info("dpu hardware revision:0x%x\n", dpu_kms->core_rev); |
| 865 | 859 | ||
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c index 278d0edb41a9..fd75870eb17f 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c | |||
| @@ -430,24 +430,14 @@ static void _dpu_plane_set_qos_remap(struct drm_plane *plane) | |||
| 430 | dpu_vbif_set_qos_remap(dpu_kms, &qos_params); | 430 | dpu_vbif_set_qos_remap(dpu_kms, &qos_params); |
| 431 | } | 431 | } |
| 432 | 432 | ||
| 433 | /** | ||
| 434 | * _dpu_plane_get_aspace: gets the address space | ||
| 435 | */ | ||
| 436 | static inline struct msm_gem_address_space *_dpu_plane_get_aspace( | ||
| 437 | struct dpu_plane *pdpu) | ||
| 438 | { | ||
| 439 | struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base); | ||
| 440 | |||
| 441 | return kms->base.aspace; | ||
| 442 | } | ||
| 443 | |||
| 444 | static void _dpu_plane_set_scanout(struct drm_plane *plane, | 433 | static void _dpu_plane_set_scanout(struct drm_plane *plane, |
| 445 | struct dpu_plane_state *pstate, | 434 | struct dpu_plane_state *pstate, |
| 446 | struct dpu_hw_pipe_cfg *pipe_cfg, | 435 | struct dpu_hw_pipe_cfg *pipe_cfg, |
| 447 | struct drm_framebuffer *fb) | 436 | struct drm_framebuffer *fb) |
| 448 | { | 437 | { |
| 449 | struct dpu_plane *pdpu = to_dpu_plane(plane); | 438 | struct dpu_plane *pdpu = to_dpu_plane(plane); |
| 450 | struct msm_gem_address_space *aspace = _dpu_plane_get_aspace(pdpu); | 439 | struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base); |
| 440 | struct msm_gem_address_space *aspace = kms->base.aspace; | ||
| 451 | int ret; | 441 | int ret; |
| 452 | 442 | ||
| 453 | ret = dpu_format_populate_layout(aspace, fb, &pipe_cfg->layout); | 443 | ret = dpu_format_populate_layout(aspace, fb, &pipe_cfg->layout); |
| @@ -801,7 +791,7 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane, | |||
| 801 | struct drm_gem_object *obj; | 791 | struct drm_gem_object *obj; |
| 802 | struct msm_gem_object *msm_obj; | 792 | struct msm_gem_object *msm_obj; |
| 803 | struct dma_fence *fence; | 793 | struct dma_fence *fence; |
| 804 | struct msm_gem_address_space *aspace = _dpu_plane_get_aspace(pdpu); | 794 | struct dpu_kms *kms = _dpu_plane_get_kms(&pdpu->base); |
| 805 | int ret; | 795 | int ret; |
| 806 | 796 | ||
| 807 | if (!new_state->fb) | 797 | if (!new_state->fb) |
| @@ -810,7 +800,7 @@ static int dpu_plane_prepare_fb(struct drm_plane *plane, | |||
| 810 | DPU_DEBUG_PLANE(pdpu, "FB[%u]\n", fb->base.id); | 800 | DPU_DEBUG_PLANE(pdpu, "FB[%u]\n", fb->base.id); |
| 811 | 801 | ||
| 812 | /* cache aspace */ | 802 | /* cache aspace */ |
| 813 | pstate->aspace = aspace; | 803 | pstate->aspace = kms->base.aspace; |
| 814 | 804 | ||
| 815 | /* | 805 | /* |
| 816 | * TODO: Need to sort out the msm_framebuffer_prepare() call below so | 806 | * TODO: Need to sort out the msm_framebuffer_prepare() call below so |
