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authorNicolin Chen <nicoleotsuka@gmail.com>2014-08-05 05:20:21 -0400
committerMark Brown <broonie@linaro.org>2014-08-16 18:06:23 -0400
commit376d1a92ca587d3974d4791cdb99baa8b8e7f0dd (patch)
treee5cf7277cc41ddc3f50bdb282bc19e846a465d45
parent7d1311b93e58ed55f3a31cc8f94c4b8fe988a2b9 (diff)
ASoC: fsl_sai: Initialize with software reset
This patch adds software reset code in dai_probe() so as to make a true init by clearing SAI's internal logic, including the bit clock generation, status flags, and FIFO pointers. Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com> Signed-off-by: Mark Brown <broonie@linaro.org>
-rw-r--r--sound/soc/fsl/fsl_sai.c9
-rw-r--r--sound/soc/fsl/fsl_sai.h1
2 files changed, 8 insertions, 2 deletions
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index faa049797897..7b1eecbc4f60 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -437,8 +437,13 @@ static int fsl_sai_dai_probe(struct snd_soc_dai *cpu_dai)
437{ 437{
438 struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev); 438 struct fsl_sai *sai = dev_get_drvdata(cpu_dai->dev);
439 439
440 regmap_update_bits(sai->regmap, FSL_SAI_TCSR, 0xffffffff, 0x0); 440 /* Software Reset for both Tx and Rx */
441 regmap_update_bits(sai->regmap, FSL_SAI_RCSR, 0xffffffff, 0x0); 441 regmap_write(sai->regmap, FSL_SAI_TCSR, FSL_SAI_CSR_SR);
442 regmap_write(sai->regmap, FSL_SAI_RCSR, FSL_SAI_CSR_SR);
443 /* Clear SR bit to finish the reset */
444 regmap_write(sai->regmap, FSL_SAI_TCSR, 0);
445 regmap_write(sai->regmap, FSL_SAI_RCSR, 0);
446
442 regmap_update_bits(sai->regmap, FSL_SAI_TCR1, FSL_SAI_CR1_RFW_MASK, 447 regmap_update_bits(sai->regmap, FSL_SAI_TCR1, FSL_SAI_CR1_RFW_MASK,
443 FSL_SAI_MAXBURST_TX * 2); 448 FSL_SAI_MAXBURST_TX * 2);
444 regmap_update_bits(sai->regmap, FSL_SAI_RCR1, FSL_SAI_CR1_RFW_MASK, 449 regmap_update_bits(sai->regmap, FSL_SAI_RCR1, FSL_SAI_CR1_RFW_MASK,
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h
index 0e6c9f595d75..8e1feab7c2a0 100644
--- a/sound/soc/fsl/fsl_sai.h
+++ b/sound/soc/fsl/fsl_sai.h
@@ -48,6 +48,7 @@
48/* SAI Transmit/Recieve Control Register */ 48/* SAI Transmit/Recieve Control Register */
49#define FSL_SAI_CSR_TERE BIT(31) 49#define FSL_SAI_CSR_TERE BIT(31)
50#define FSL_SAI_CSR_FR BIT(25) 50#define FSL_SAI_CSR_FR BIT(25)
51#define FSL_SAI_CSR_SR BIT(24)
51#define FSL_SAI_CSR_xF_SHIFT 16 52#define FSL_SAI_CSR_xF_SHIFT 16
52#define FSL_SAI_CSR_xF_W_SHIFT 18 53#define FSL_SAI_CSR_xF_W_SHIFT 18
53#define FSL_SAI_CSR_xF_MASK (0x1f << FSL_SAI_CSR_xF_SHIFT) 54#define FSL_SAI_CSR_xF_MASK (0x1f << FSL_SAI_CSR_xF_SHIFT)