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authorEzequiel Garcia <ezequiel.garcia@free-electrons.com>2014-08-27 09:52:54 -0400
committerVinod Koul <vinod.koul@intel.com>2014-09-23 10:47:01 -0400
commit37380b980e2db2e0dfdb920140c75f3cf2e98a27 (patch)
tree011d1895d4a2602e26ba75f874b8857bd2a81ac3
parentba87d13721b6fe4a2479871dc4f77c5bd8db3c32 (diff)
dma: mv_xor: Remove dead code
The driver currently defines the USE_TIMER macro, but the timer-feature is never used in the code. The XOR and CRC32 results are never used. The 'unmap_xxx' fields are no longer needed, they were made obsolete in commit: 54f8d501e842 dmaengine: remove DMA unmap from drivers. Let's remove all this dead code. Signed-off-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com>
-rw-r--r--drivers/dma/mv_xor.c2
-rw-r--r--drivers/dma/mv_xor.h20
2 files changed, 0 insertions, 22 deletions
diff --git a/drivers/dma/mv_xor.c b/drivers/dma/mv_xor.c
index cbc90e5df7ff..744a0077e5aa 100644
--- a/drivers/dma/mv_xor.c
+++ b/drivers/dma/mv_xor.c
@@ -517,8 +517,6 @@ mv_xor_prep_dma_xor(struct dma_chan *chan, dma_addr_t dest, dma_addr_t *src,
517 sw_desc->type = DMA_XOR; 517 sw_desc->type = DMA_XOR;
518 sw_desc->async_tx.flags = flags; 518 sw_desc->async_tx.flags = flags;
519 mv_desc_init(sw_desc, dest, len, flags); 519 mv_desc_init(sw_desc, dest, len, flags);
520 sw_desc->unmap_src_cnt = src_cnt;
521 sw_desc->unmap_len = len;
522 while (src_cnt--) 520 while (src_cnt--)
523 mv_desc_set_src_addr(sw_desc, src_cnt, src[src_cnt]); 521 mv_desc_set_src_addr(sw_desc, src_cnt, src[src_cnt]);
524 } 522 }
diff --git a/drivers/dma/mv_xor.h b/drivers/dma/mv_xor.h
index 21b0828f9697..de400365bc49 100644
--- a/drivers/dma/mv_xor.h
+++ b/drivers/dma/mv_xor.h
@@ -23,7 +23,6 @@
23#include <linux/dmaengine.h> 23#include <linux/dmaengine.h>
24#include <linux/interrupt.h> 24#include <linux/interrupt.h>
25 25
26#define USE_TIMER
27#define MV_XOR_POOL_SIZE PAGE_SIZE 26#define MV_XOR_POOL_SIZE PAGE_SIZE
28#define MV_XOR_SLOT_SIZE 64 27#define MV_XOR_SLOT_SIZE 64
29#define MV_XOR_THRESHOLD 1 28#define MV_XOR_THRESHOLD 1
@@ -117,10 +116,6 @@ struct mv_xor_chan {
117 struct list_head all_slots; 116 struct list_head all_slots;
118 int slots_allocated; 117 int slots_allocated;
119 struct tasklet_struct irq_tasklet; 118 struct tasklet_struct irq_tasklet;
120#ifdef USE_TIMER
121 unsigned long cleanup_time;
122 u32 current_on_last_cleanup;
123#endif
124}; 119};
125 120
126/** 121/**
@@ -132,12 +127,8 @@ struct mv_xor_chan {
132 * @phys: hardware address of the hardware descriptor chain 127 * @phys: hardware address of the hardware descriptor chain
133 * @slot_used: slot in use or not 128 * @slot_used: slot in use or not
134 * @idx: pool index 129 * @idx: pool index
135 * @unmap_src_cnt: number of xor sources
136 * @unmap_len: transaction bytecount
137 * @tx_list: list of slots that make up a multi-descriptor transaction 130 * @tx_list: list of slots that make up a multi-descriptor transaction
138 * @async_tx: support for the async_tx api 131 * @async_tx: support for the async_tx api
139 * @xor_check_result: result of zero sum
140 * @crc32_result: result crc calculation
141 */ 132 */
142struct mv_xor_desc_slot { 133struct mv_xor_desc_slot {
143 struct list_head slot_node; 134 struct list_head slot_node;
@@ -147,18 +138,7 @@ struct mv_xor_desc_slot {
147 void *hw_desc; 138 void *hw_desc;
148 u16 slot_used; 139 u16 slot_used;
149 u16 idx; 140 u16 idx;
150 u16 unmap_src_cnt;
151 u32 value;
152 size_t unmap_len;
153 struct dma_async_tx_descriptor async_tx; 141 struct dma_async_tx_descriptor async_tx;
154 union {
155 u32 *xor_check_result;
156 u32 *crc32_result;
157 };
158#ifdef USE_TIMER
159 unsigned long arrival_time;
160 struct timer_list timeout;
161#endif
162}; 142};
163 143
164/* 144/*