diff options
author | Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com> | 2017-06-09 17:47:27 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-06-15 11:50:35 -0400 |
commit | 370f092f30ee6fa0be6eb14d2ddb66ef861c6a3f (patch) | |
tree | f0212573ff8e3757e1ec1338c5bd8badcef8aeb0 | |
parent | 0ad6f0d387dad93c1a9fdd191e06326441b701ae (diff) |
drm/amdgpu: vm_update_ptes remove code duplication
CPU and GPU paths were mostly the same.
Acked-by: Christian König <christian.koenig@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Harish Kasiviswanathan <Harish.Kasiviswanathan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | 73 |
1 files changed, 16 insertions, 57 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c index c4f1a305c68c..c308047bfb13 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_vm.c | |||
@@ -1264,59 +1264,6 @@ static struct amdgpu_bo *amdgpu_vm_get_pt(struct amdgpu_pte_update_params *p, | |||
1264 | } | 1264 | } |
1265 | 1265 | ||
1266 | /** | 1266 | /** |
1267 | * amdgpu_vm_update_ptes_cpu - Update the page tables in the range | ||
1268 | * start - @end using CPU. | ||
1269 | * See amdgpu_vm_update_ptes for parameter description. | ||
1270 | * | ||
1271 | */ | ||
1272 | static int amdgpu_vm_update_ptes_cpu(struct amdgpu_pte_update_params *params, | ||
1273 | uint64_t start, uint64_t end, | ||
1274 | uint64_t dst, uint64_t flags) | ||
1275 | { | ||
1276 | struct amdgpu_device *adev = params->adev; | ||
1277 | const uint64_t mask = AMDGPU_VM_PTE_COUNT(adev) - 1; | ||
1278 | void *pe_ptr; | ||
1279 | uint64_t addr; | ||
1280 | struct amdgpu_bo *pt; | ||
1281 | unsigned int nptes; | ||
1282 | int r; | ||
1283 | |||
1284 | /* initialize the variables */ | ||
1285 | addr = start; | ||
1286 | |||
1287 | /* walk over the address space and update the page tables */ | ||
1288 | while (addr < end) { | ||
1289 | pt = amdgpu_vm_get_pt(params, addr); | ||
1290 | if (!pt) { | ||
1291 | pr_err("PT not found, aborting update_ptes\n"); | ||
1292 | return -EINVAL; | ||
1293 | } | ||
1294 | |||
1295 | WARN_ON(params->shadow); | ||
1296 | |||
1297 | r = amdgpu_bo_kmap(pt, &pe_ptr); | ||
1298 | if (r) | ||
1299 | return r; | ||
1300 | |||
1301 | pe_ptr += (addr & mask) * 8; | ||
1302 | |||
1303 | if ((addr & ~mask) == (end & ~mask)) | ||
1304 | nptes = end - addr; | ||
1305 | else | ||
1306 | nptes = AMDGPU_VM_PTE_COUNT(adev) - (addr & mask); | ||
1307 | |||
1308 | params->func(params, (uint64_t)pe_ptr, dst, nptes, | ||
1309 | AMDGPU_GPU_PAGE_SIZE, flags); | ||
1310 | |||
1311 | amdgpu_bo_kunmap(pt); | ||
1312 | addr += nptes; | ||
1313 | dst += nptes * AMDGPU_GPU_PAGE_SIZE; | ||
1314 | } | ||
1315 | |||
1316 | return 0; | ||
1317 | } | ||
1318 | |||
1319 | /** | ||
1320 | * amdgpu_vm_update_ptes - make sure that page tables are valid | 1267 | * amdgpu_vm_update_ptes - make sure that page tables are valid |
1321 | * | 1268 | * |
1322 | * @params: see amdgpu_pte_update_params definition | 1269 | * @params: see amdgpu_pte_update_params definition |
@@ -1339,10 +1286,9 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params, | |||
1339 | uint64_t addr, pe_start; | 1286 | uint64_t addr, pe_start; |
1340 | struct amdgpu_bo *pt; | 1287 | struct amdgpu_bo *pt; |
1341 | unsigned nptes; | 1288 | unsigned nptes; |
1289 | int r; | ||
1290 | bool use_cpu_update = (params->func == amdgpu_vm_cpu_set_ptes); | ||
1342 | 1291 | ||
1343 | if (params->func == amdgpu_vm_cpu_set_ptes) | ||
1344 | return amdgpu_vm_update_ptes_cpu(params, start, end, | ||
1345 | dst, flags); | ||
1346 | 1292 | ||
1347 | /* walk over the address space and update the page tables */ | 1293 | /* walk over the address space and update the page tables */ |
1348 | for (addr = start; addr < end; addr += nptes) { | 1294 | for (addr = start; addr < end; addr += nptes) { |
@@ -1353,6 +1299,10 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params, | |||
1353 | } | 1299 | } |
1354 | 1300 | ||
1355 | if (params->shadow) { | 1301 | if (params->shadow) { |
1302 | if (WARN_ONCE(use_cpu_update, | ||
1303 | "CPU VM update doesn't suuport shadow pages")) | ||
1304 | return 0; | ||
1305 | |||
1356 | if (!pt->shadow) | 1306 | if (!pt->shadow) |
1357 | return 0; | 1307 | return 0; |
1358 | pt = pt->shadow; | 1308 | pt = pt->shadow; |
@@ -1363,13 +1313,22 @@ static int amdgpu_vm_update_ptes(struct amdgpu_pte_update_params *params, | |||
1363 | else | 1313 | else |
1364 | nptes = AMDGPU_VM_PTE_COUNT(adev) - (addr & mask); | 1314 | nptes = AMDGPU_VM_PTE_COUNT(adev) - (addr & mask); |
1365 | 1315 | ||
1366 | pe_start = amdgpu_bo_gpu_offset(pt); | 1316 | if (use_cpu_update) { |
1317 | r = amdgpu_bo_kmap(pt, (void *)&pe_start); | ||
1318 | if (r) | ||
1319 | return r; | ||
1320 | } else | ||
1321 | pe_start = amdgpu_bo_gpu_offset(pt); | ||
1322 | |||
1367 | pe_start += (addr & mask) * 8; | 1323 | pe_start += (addr & mask) * 8; |
1368 | 1324 | ||
1369 | params->func(params, pe_start, dst, nptes, | 1325 | params->func(params, pe_start, dst, nptes, |
1370 | AMDGPU_GPU_PAGE_SIZE, flags); | 1326 | AMDGPU_GPU_PAGE_SIZE, flags); |
1371 | 1327 | ||
1372 | dst += nptes * AMDGPU_GPU_PAGE_SIZE; | 1328 | dst += nptes * AMDGPU_GPU_PAGE_SIZE; |
1329 | |||
1330 | if (use_cpu_update) | ||
1331 | amdgpu_bo_kunmap(pt); | ||
1373 | } | 1332 | } |
1374 | 1333 | ||
1375 | return 0; | 1334 | return 0; |