diff options
author | Gary R Hook <gary.hook@amd.com> | 2017-04-20 16:24:09 -0400 |
---|---|---|
committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2017-05-20 08:28:37 -0400 |
commit | 36dffff240d937d626bea9196c027df076fbff34 (patch) | |
tree | 900e5d0a42e28d2c428521699de5f77ec7062f16 | |
parent | bcc70358396abb905f448a5c43f54dda457a0959 (diff) |
crypto: ccp - Use only the relevant interrupt bits
commit 56467cb11cf8ae4db9003f54b3d3425b5f07a10a upstream.
Each CCP queue can product interrupts for 4 conditions:
operation complete, queue empty, error, and queue stopped.
This driver only works with completion and error events.
Signed-off-by: Gary R Hook <gary.hook@amd.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
-rw-r--r-- | drivers/crypto/ccp/ccp-dev-v5.c | 9 | ||||
-rw-r--r-- | drivers/crypto/ccp/ccp-dev.h | 5 |
2 files changed, 7 insertions, 7 deletions
diff --git a/drivers/crypto/ccp/ccp-dev-v5.c b/drivers/crypto/ccp/ccp-dev-v5.c index a388bf2d67f4..c85af39cc84d 100644 --- a/drivers/crypto/ccp/ccp-dev-v5.c +++ b/drivers/crypto/ccp/ccp-dev-v5.c | |||
@@ -740,7 +740,7 @@ static int ccp5_init(struct ccp_device *ccp) | |||
740 | ioread32(cmd_q->reg_status); | 740 | ioread32(cmd_q->reg_status); |
741 | 741 | ||
742 | /* Clear the interrupts */ | 742 | /* Clear the interrupts */ |
743 | iowrite32(ALL_INTERRUPTS, cmd_q->reg_interrupt_status); | 743 | iowrite32(SUPPORTED_INTERRUPTS, cmd_q->reg_interrupt_status); |
744 | } | 744 | } |
745 | 745 | ||
746 | dev_dbg(dev, "Requesting an IRQ...\n"); | 746 | dev_dbg(dev, "Requesting an IRQ...\n"); |
@@ -824,7 +824,7 @@ static int ccp5_init(struct ccp_device *ccp) | |||
824 | /* Enable interrupts */ | 824 | /* Enable interrupts */ |
825 | for (i = 0; i < ccp->cmd_q_count; i++) { | 825 | for (i = 0; i < ccp->cmd_q_count; i++) { |
826 | cmd_q = &ccp->cmd_q[i]; | 826 | cmd_q = &ccp->cmd_q[i]; |
827 | iowrite32(ALL_INTERRUPTS, cmd_q->reg_int_enable); | 827 | iowrite32(SUPPORTED_INTERRUPTS, cmd_q->reg_int_enable); |
828 | } | 828 | } |
829 | 829 | ||
830 | dev_dbg(dev, "Registering device...\n"); | 830 | dev_dbg(dev, "Registering device...\n"); |
@@ -884,7 +884,7 @@ static void ccp5_destroy(struct ccp_device *ccp) | |||
884 | iowrite32(cmd_q->qcontrol & ~CMD5_Q_RUN, cmd_q->reg_control); | 884 | iowrite32(cmd_q->qcontrol & ~CMD5_Q_RUN, cmd_q->reg_control); |
885 | 885 | ||
886 | /* Disable the interrupts */ | 886 | /* Disable the interrupts */ |
887 | iowrite32(ALL_INTERRUPTS, cmd_q->reg_interrupt_status); | 887 | iowrite32(SUPPORTED_INTERRUPTS, cmd_q->reg_interrupt_status); |
888 | 888 | ||
889 | /* Clear the interrupt status */ | 889 | /* Clear the interrupt status */ |
890 | iowrite32(0x00, cmd_q->reg_int_enable); | 890 | iowrite32(0x00, cmd_q->reg_int_enable); |
@@ -944,7 +944,8 @@ static irqreturn_t ccp5_irq_handler(int irq, void *data) | |||
944 | cmd_q->int_rcvd = 1; | 944 | cmd_q->int_rcvd = 1; |
945 | 945 | ||
946 | /* Acknowledge the interrupt and wake the kthread */ | 946 | /* Acknowledge the interrupt and wake the kthread */ |
947 | iowrite32(ALL_INTERRUPTS, cmd_q->reg_interrupt_status); | 947 | iowrite32(SUPPORTED_INTERRUPTS, |
948 | cmd_q->reg_interrupt_status); | ||
948 | wake_up_interruptible(&cmd_q->int_queue); | 949 | wake_up_interruptible(&cmd_q->int_queue); |
949 | } | 950 | } |
950 | } | 951 | } |
diff --git a/drivers/crypto/ccp/ccp-dev.h b/drivers/crypto/ccp/ccp-dev.h index 340aef14d616..a0d7979836a5 100644 --- a/drivers/crypto/ccp/ccp-dev.h +++ b/drivers/crypto/ccp/ccp-dev.h | |||
@@ -109,9 +109,8 @@ | |||
109 | #define INT_COMPLETION 0x1 | 109 | #define INT_COMPLETION 0x1 |
110 | #define INT_ERROR 0x2 | 110 | #define INT_ERROR 0x2 |
111 | #define INT_QUEUE_STOPPED 0x4 | 111 | #define INT_QUEUE_STOPPED 0x4 |
112 | #define ALL_INTERRUPTS (INT_COMPLETION| \ | 112 | #define INT_EMPTY_QUEUE 0x8 |
113 | INT_ERROR| \ | 113 | #define SUPPORTED_INTERRUPTS (INT_COMPLETION | INT_ERROR) |
114 | INT_QUEUE_STOPPED) | ||
115 | 114 | ||
116 | #define LSB_REGION_WIDTH 5 | 115 | #define LSB_REGION_WIDTH 5 |
117 | #define MAX_LSB_CNT 8 | 116 | #define MAX_LSB_CNT 8 |