drm/amdgpu: add new gttsize module parameter v2

This allows setting the gtt size independent of the gart size.

v2: fix copy and paste typo

Signed-off-by: Christian König <christian.koenig@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

4 files changed, 21 insertions, 3 deletions

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index b19557b8c683..c7436ea425b4 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -76,6 +76,7 @@
 extern int amdgpu_modeset;
 extern int amdgpu_vram_limit;
 extern int amdgpu_gart_size;
+extern int amdgpu_gtt_size;
 extern int amdgpu_moverate;
 extern int amdgpu_benchmarking;
 extern int amdgpu_testing;
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 84ff824ea260..49dd8e0ddd17 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -1141,6 +1141,13 @@ static void amdgpu_check_arguments(struct amdgpu_device *adev)
                 }
         }
 
+        if (amdgpu_gtt_size != -1 && amdgpu_gtt_size < 32) {
+                /* gtt size must be greater or equal to 32M */
+                dev_warn(adev->dev, "gtt size (%d) too small\n",
+                                 amdgpu_gtt_size);
+                amdgpu_gtt_size = -1;
+        }
+
         amdgpu_check_vm_size(adev);
 
         amdgpu_check_block_size(adev);
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index d90dc426ee5b..b83e87fef6a8 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -75,6 +75,7 @@
 
 int amdgpu_vram_limit = 0;
 int amdgpu_gart_size = -1; /* auto */
+int amdgpu_gtt_size = -1; /* auto */
 int amdgpu_moverate = -1; /* auto */
 int amdgpu_benchmarking = 0;
 int amdgpu_testing = 0;
@@ -123,6 +124,9 @@ module_param_named(vramlimit, amdgpu_vram_limit, int, 0600);
 MODULE_PARM_DESC(gartsize, "Size of PCIE/IGP gart to setup in megabytes (32, 64, etc., -1 = auto)");
 module_param_named(gartsize, amdgpu_gart_size, int, 0600);
 
+MODULE_PARM_DESC(gttsize, "Size of the GTT domain in megabytes (-1 = auto)");
+module_param_named(gttsize, amdgpu_gtt_size, int, 0600);
+
 MODULE_PARM_DESC(moverate, "Maximum buffer migration rate in MB/s. (32, 64, etc., -1=auto, 0=1=disabled)");
 module_param_named(moverate, amdgpu_moverate, int, 0600);
 
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
index 4e711d9af67c..b5420b20c2f5 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c
@@ -1097,6 +1097,7 @@ static struct ttm_bo_driver amdgpu_bo_driver = {
 
 int amdgpu_ttm_init(struct amdgpu_device *adev)
 {
+        uint64_t gtt_size;
         int r;
 
         r = amdgpu_ttm_global_init(adev);
@@ -1143,14 +1144,19 @@ int amdgpu_ttm_init(struct amdgpu_device *adev)
         }
         DRM_INFO("amdgpu: %uM of VRAM memory ready\n",
                  (unsigned) (adev->mc.real_vram_size / (1024 * 1024)));
-        r = ttm_bo_init_mm(&adev->mman.bdev, TTM_PL_TT,
-                                adev->mc.gart_size >> PAGE_SHIFT);
+
+        if (amdgpu_gtt_size == -1)
+                gtt_size = max((AMDGPU_DEFAULT_GTT_SIZE_MB << 20),
+                               adev->mc.mc_vram_size);
+        else
+                gtt_size = (uint64_t)amdgpu_gtt_size << 20;
+        r = ttm_bo_init_mm(&adev->mman.bdev, TTM_PL_TT, gtt_size >> PAGE_SHIFT);
         if (r) {
                 DRM_ERROR("Failed initializing GTT heap.\n");
                 return r;
         }
         DRM_INFO("amdgpu: %uM of GTT memory ready.\n",
-                 (unsigned)(adev->mc.gart_size / (1024 * 1024)));
+                 (unsigned)(gtt_size / (1024 * 1024)));
 
         adev->gds.mem.total_size = adev->gds.mem.total_size << AMDGPU_GDS_SHIFT;
         adev->gds.mem.gfx_partition_size = adev->gds.mem.gfx_partition_size << AMDGPU_GDS_SHIFT;