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authorChen-Yu Tsai <wens@csie.org>2015-07-31 10:40:59 -0400
committerMaxime Ripard <maxime.ripard@free-electrons.com>2015-07-31 12:59:51 -0400
commit36d16154fd0c5cc4f61831c482379acfb3d800f4 (patch)
treefb84ede9938366ce45ad450d3c163cd562613537
parentd747af013db7d0a0d3c5054d3856ad941f2b715c (diff)
ARM: dts: sun5i: hsg-h702: Enable USB OTG controller
This tablet has proper USB OTG support, using 3 GPIO pins for ID and VBUS detection, and also VBUS control. Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
-rw-r--r--arch/arm/boot/dts/sun5i-a13-hsg-h702.dts38
1 files changed, 38 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
index 4b8808ab9711..3724b988064e 100644
--- a/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
+++ b/arch/arm/boot/dts/sun5i-a13-hsg-h702.dts
@@ -130,6 +130,10 @@
130 status = "okay"; 130 status = "okay";
131}; 131};
132 132
133&otg_sram {
134 status = "okay";
135};
136
133&pio { 137&pio {
134 mmc0_cd_pin_h702: mmc0_cd_pin@0 { 138 mmc0_cd_pin_h702: mmc0_cd_pin@0 {
135 allwinner,pins = "PG0"; 139 allwinner,pins = "PG0";
@@ -137,6 +141,20 @@
137 allwinner,drive = <SUN4I_PINCTRL_10_MA>; 141 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
138 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>; 142 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
139 }; 143 };
144
145 usb0_id_detect_pin: usb0_id_detect_pin@0 {
146 allwinner,pins = "PG2";
147 allwinner,function = "gpio_in";
148 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
149 allwinner,pull = <SUN4I_PINCTRL_PULL_UP>;
150 };
151
152 usb0_vbus_detect_pin: usb0_vbus_detect_pin@0 {
153 allwinner,pins = "PG1";
154 allwinner,function = "gpio_in";
155 allwinner,drive = <SUN4I_PINCTRL_10_MA>;
156 allwinner,pull = <SUN4I_PINCTRL_NO_PULL>;
157 };
140}; 158};
141 159
142#include "axp209.dtsi" 160#include "axp209.dtsi"
@@ -172,13 +190,33 @@
172 regulator-name = "vcc-wifi"; 190 regulator-name = "vcc-wifi";
173}; 191};
174 192
193&reg_usb0_vbus {
194 pinctrl-0 = <&usb0_vbus_pin_a>;
195 gpio = <&pio 6 12 GPIO_ACTIVE_HIGH>; /* PG12 */
196 status = "okay";
197};
198
175&uart1 { 199&uart1 {
176 pinctrl-names = "default"; 200 pinctrl-names = "default";
177 pinctrl-0 = <&uart1_pins_b>; 201 pinctrl-0 = <&uart1_pins_b>;
178 status = "okay"; 202 status = "okay";
179}; 203};
180 204
205&usb_otg {
206 dr_mode = "otg";
207 status = "okay";
208};
209
210&usb0_vbus_pin_a {
211 allwinner,pins = "PG12";
212};
213
181&usbphy { 214&usbphy {
215 pinctrl-names = "default";
216 pinctrl-0 = <&usb0_id_detect_pin>, <&usb0_vbus_detect_pin>;
217 usb0_id_det-gpios = <&pio 6 2 GPIO_ACTIVE_HIGH>; /* PG2 */
218 usb0_vbus_det-gpios = <&pio 6 1 GPIO_ACTIVE_HIGH>; /* PG1 */
219 usb0_vbus-supply = <&reg_usb0_vbus>;
182 usb1_vbus-supply = <&reg_ldo3>; 220 usb1_vbus-supply = <&reg_ldo3>;
183 status = "okay"; 221 status = "okay";
184}; 222};