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authorPaul Cercueil <paul@crapouillou.net>2019-07-25 18:02:05 -0400
committerPaul Burton <paul.burton@mips.com>2019-07-30 13:29:15 -0400
commit36ba3eae036242fdc36eb8e89d5001a219a7fb1d (patch)
treed87c998bea86d9777fde5f48e48924f2c777ebf4
parentf066fa60640130eed62f628e382ad28f92d442a5 (diff)
MIPS: DTS: jz4740: Add missing nodes
Add nodes for the MMC, AIC, ADC, CODEC, MUSB, LCD, memory, and BCH controllers. Signed-off-by: Paul Cercueil <paul@crapouillou.net> Tested-by: Artur Rojek <contact@artur-rojek.eu> Signed-off-by: Paul Burton <paul.burton@mips.com>
-rw-r--r--arch/mips/boot/dts/ingenic/jz4740.dtsi84
1 files changed, 84 insertions, 0 deletions
diff --git a/arch/mips/boot/dts/ingenic/jz4740.dtsi b/arch/mips/boot/dts/ingenic/jz4740.dtsi
index 3ffaf63f22dd..bceabf494af5 100644
--- a/arch/mips/boot/dts/ingenic/jz4740.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4740.dtsi
@@ -132,6 +132,35 @@
132 }; 132 };
133 }; 133 };
134 134
135 aic: audio-controller@10020000 {
136 compatible = "ingenic,jz4740-i2s";
137 reg = <0x10020000 0x38>;
138
139 #sound-dai-cells = <0>;
140
141 interrupt-parent = <&intc>;
142 interrupts = <18>;
143
144 clocks = <&cgu JZ4740_CLK_AIC>,
145 <&cgu JZ4740_CLK_I2S>,
146 <&cgu JZ4740_CLK_EXT>,
147 <&cgu JZ4740_CLK_PLL_HALF>;
148 clock-names = "aic", "i2s", "ext", "pll half";
149
150 dmas = <&dmac 25 0xffffffff>, <&dmac 24 0xffffffff>;
151 dma-names = "rx", "tx";
152 };
153
154 codec: audio-codec@100200a4 {
155 compatible = "ingenic,jz4740-codec";
156 reg = <0x10020080 0x8>;
157
158 #sound-dai-cells = <0>;
159
160 clocks = <&cgu JZ4740_CLK_AIC>;
161 clock-names = "aic";
162 };
163
135 mmc: mmc@10021000 { 164 mmc: mmc@10021000 {
136 compatible = "ingenic,jz4740-mmc"; 165 compatible = "ingenic,jz4740-mmc";
137 reg = <0x10021000 0x1000>; 166 reg = <0x10021000 0x1000>;
@@ -172,6 +201,38 @@
172 clock-names = "baud", "module"; 201 clock-names = "baud", "module";
173 }; 202 };
174 203
204 adc: adc@10070000 {
205 compatible = "ingenic,jz4740-adc";
206 reg = <0x10070000 0x30>;
207 #io-channel-cells = <1>;
208
209 clocks = <&cgu JZ4740_CLK_ADC>;
210 clock-names = "adc";
211
212 interrupt-parent = <&intc>;
213 interrupts = <12>;
214 };
215
216 nemc: memory-controller@13010000 {
217 compatible = "ingenic,jz4740-nemc";
218 reg = <0x13010000 0x54>;
219 #address-cells = <2>;
220 #size-cells = <1>;
221 ranges = <1 0 0x18000000 0x4000000
222 2 0 0x14000000 0x4000000
223 3 0 0x0c000000 0x4000000
224 4 0 0x08000000 0x4000000>;
225
226 clocks = <&cgu JZ4740_CLK_MCLK>;
227 };
228
229 ecc: ecc-controller@13010100 {
230 compatible = "ingenic,jz4740-ecc";
231 reg = <0x13010100 0x2C>;
232
233 clocks = <&cgu JZ4740_CLK_MCLK>;
234 };
235
175 dmac: dma-controller@13020000 { 236 dmac: dma-controller@13020000 {
176 compatible = "ingenic,jz4740-dma"; 237 compatible = "ingenic,jz4740-dma";
177 reg = <0x13020000 0xbc 238 reg = <0x13020000 0xbc
@@ -197,4 +258,27 @@
197 258
198 status = "disabled"; 259 status = "disabled";
199 }; 260 };
261
262 udc: usb@13040000 {
263 compatible = "ingenic,jz4740-musb";
264 reg = <0x13040000 0x10000>;
265
266 interrupt-parent = <&intc>;
267 interrupts = <24>;
268 interrupt-names = "mc";
269
270 clocks = <&cgu JZ4740_CLK_UDC>;
271 clock-names = "udc";
272 };
273
274 lcd: lcd-controller@13050000 {
275 compatible = "ingenic,jz4740-lcd";
276 reg = <0x13050000 0x1000>;
277
278 interrupt-parent = <&intc>;
279 interrupts = <30>;
280
281 clocks = <&cgu JZ4740_CLK_LCD_PCLK>, <&cgu JZ4740_CLK_LCD>;
282 clock-names = "lcd_pclk", "lcd";
283 };
200}; 284};