diff options
author | Andrzej Hajda <a.hajda@samsung.com> | 2017-04-05 03:28:34 -0400 |
---|---|---|
committer | Inki Dae <inki.dae@samsung.com> | 2017-06-01 03:21:38 -0400 |
commit | 3643e758744dc2c336387fb2cb79c93c3242f18f (patch) | |
tree | a15769d27f7a6442df433654d8f0c75bb7bd5e9a | |
parent | 358eccc0eec8d76db7221f6d51d7d528c656ef46 (diff) |
drm/exynos/decon5433: kill BIT_CLKS_ENABLED flag
The flag was used to check if IRQ handlers can touch HW. Since driver
enables IRQs only if hardware is enabled the flag becomes redundant.
Signed-off-by: Andrzej Hajda <a.hajda@samsung.com>
Signed-off-by: Inki Dae <inki.dae@samsung.com>
-rw-r--r-- | drivers/gpu/drm/exynos/exynos5433_drm_decon.c | 12 |
1 files changed, 1 insertions, 11 deletions
diff --git a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c index dc2e69a9cf13..2629a59fc7bb 100644 --- a/drivers/gpu/drm/exynos/exynos5433_drm_decon.c +++ b/drivers/gpu/drm/exynos/exynos5433_drm_decon.c | |||
@@ -48,7 +48,6 @@ static const char * const decon_clks_name[] = { | |||
48 | }; | 48 | }; |
49 | 49 | ||
50 | enum decon_flag_bits { | 50 | enum decon_flag_bits { |
51 | BIT_CLKS_ENABLED, | ||
52 | BIT_WIN_UPDATED, | 51 | BIT_WIN_UPDATED, |
53 | BIT_SUSPENDED | 52 | BIT_SUSPENDED |
54 | }; | 53 | }; |
@@ -486,8 +485,6 @@ static void decon_enable(struct exynos_drm_crtc *crtc) | |||
486 | 485 | ||
487 | exynos_drm_pipe_clk_enable(crtc, true); | 486 | exynos_drm_pipe_clk_enable(crtc, true); |
488 | 487 | ||
489 | set_bit(BIT_CLKS_ENABLED, &ctx->flags); | ||
490 | |||
491 | decon_swreset(ctx); | 488 | decon_swreset(ctx); |
492 | 489 | ||
493 | decon_commit(ctx->crtc); | 490 | decon_commit(ctx->crtc); |
@@ -515,8 +512,6 @@ static void decon_disable(struct exynos_drm_crtc *crtc) | |||
515 | 512 | ||
516 | decon_swreset(ctx); | 513 | decon_swreset(ctx); |
517 | 514 | ||
518 | clear_bit(BIT_CLKS_ENABLED, &ctx->flags); | ||
519 | |||
520 | exynos_drm_pipe_clk_enable(crtc, false); | 515 | exynos_drm_pipe_clk_enable(crtc, false); |
521 | 516 | ||
522 | pm_runtime_put_sync(ctx->dev); | 517 | pm_runtime_put_sync(ctx->dev); |
@@ -528,8 +523,7 @@ static irqreturn_t decon_te_irq_handler(int irq, void *dev_id) | |||
528 | { | 523 | { |
529 | struct decon_context *ctx = dev_id; | 524 | struct decon_context *ctx = dev_id; |
530 | 525 | ||
531 | if (!test_bit(BIT_CLKS_ENABLED, &ctx->flags) || | 526 | if (ctx->out_type & I80_HW_TRG) |
532 | (ctx->out_type & I80_HW_TRG)) | ||
533 | return IRQ_HANDLED; | 527 | return IRQ_HANDLED; |
534 | 528 | ||
535 | decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0); | 529 | decon_set_bits(ctx, DECON_TRIGCON, TRIGCON_SWTRIGCMD, ~0); |
@@ -654,9 +648,6 @@ static irqreturn_t decon_irq_handler(int irq, void *dev_id) | |||
654 | struct decon_context *ctx = dev_id; | 648 | struct decon_context *ctx = dev_id; |
655 | u32 val; | 649 | u32 val; |
656 | 650 | ||
657 | if (!test_bit(BIT_CLKS_ENABLED, &ctx->flags)) | ||
658 | goto out; | ||
659 | |||
660 | val = readl(ctx->addr + DECON_VIDINTCON1); | 651 | val = readl(ctx->addr + DECON_VIDINTCON1); |
661 | val &= VIDINTCON1_INTFRMDONEPEND | VIDINTCON1_INTFRMPEND; | 652 | val &= VIDINTCON1_INTFRMDONEPEND | VIDINTCON1_INTFRMPEND; |
662 | 653 | ||
@@ -672,7 +663,6 @@ static irqreturn_t decon_irq_handler(int irq, void *dev_id) | |||
672 | decon_handle_vblank(ctx); | 663 | decon_handle_vblank(ctx); |
673 | } | 664 | } |
674 | 665 | ||
675 | out: | ||
676 | return IRQ_HANDLED; | 666 | return IRQ_HANDLED; |
677 | } | 667 | } |
678 | 668 | ||