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authorStephen Boyd <sboyd@codeaurora.org>2017-11-15 11:16:13 -0500
committerStephen Boyd <sboyd@codeaurora.org>2017-11-15 11:16:13 -0500
commit36331641eb4296f0c62f4bf1e320d8c30bc6a863 (patch)
tree301cb332c2394a9c5b7066065accd8f1194fde13
parentc1ea839c41d049604a3f64ef72712d1c7c6639d0 (diff)
parent98c58f7d176a025365219bf51079a004cb70cc7c (diff)
Merge branch 'clk-cleanup' into clk-next
* clk-cleanup: clk: kona-setup: Delete error messages for failed memory allocations ARC: clk: fix spelling mistake: "configurarion" -> "configuration" clk: cdce925: remove redundant check for non-null parent_name clk: versatile: Improve sizeof() usage clk: versatile: Delete error messages for failed memory allocations clk: ux500: Improve sizeof() usage clk: ux500: Delete error messages for failed memory allocations clk: spear: Delete error messages for failed memory allocations clk: ti: Delete error messages for failed memory allocations clk: mmp: Adjust checks for NULL pointers clk: mmp: Use common error handling code in mmp_clk_register_mix() clk: mmp: Delete error messages for failed memory allocations clk: clk-xgene: Adjust six checks for null pointers clk: clk-xgene: Delete error messages for failed memory allocations clk: clk-u300: Fix a typo in two comment lines clk: clk-u300: Add some spaces for better code readability clk: clk-u300: Improve sizeof() usage clk: clk-u300: Delete error messages for failed memory allocations clk: clk-mux: Improve a size determination in clk_hw_register_mux_table() clk: clk-mux: Delete an error message for a failed memory allocation
Diffstat
-rw-r--r--drivers/clk/bcm/clk-kona-setup.c7
-rw-r--r--drivers/clk/clk-cdce925.c2
-rw-r--r--drivers/clk/clk-hsdk-pll.c4
-rw-r--r--drivers/clk/clk-mux.c6
-rw-r--r--drivers/clk/clk-u300.c84
-rw-r--r--drivers/clk/clk-xgene.c20
-rw-r--r--drivers/clk/mmp/clk-frac.c4
-rw-r--r--drivers/clk/mmp/clk-gate.c4
-rw-r--r--drivers/clk/mmp/clk-mix.c27
-rw-r--r--drivers/clk/mmp/clk-mmp2.c6
-rw-r--r--drivers/clk/mmp/clk-pxa168.c6
-rw-r--r--drivers/clk/mmp/clk-pxa910.c8
-rw-r--r--drivers/clk/spear/clk-aux-synth.c4
-rw-r--r--drivers/clk/spear/clk-frac-synth.c4
-rw-r--r--drivers/clk/spear/clk-gpt-synth.c4
-rw-r--r--drivers/clk/spear/clk-vco-pll.c8
-rw-r--r--drivers/clk/ti/divider.c4
-rw-r--r--drivers/clk/ti/mux.c4
-rw-r--r--drivers/clk/ux500/clk-prcc.c6
-rw-r--r--drivers/clk/ux500/clk-prcmu.c6
-rw-r--r--drivers/clk/ux500/clk-sysctrl.c6
-rw-r--r--drivers/clk/versatile/clk-icst.c7
22 files changed, 92 insertions, 139 deletions
diff --git a/drivers/clk/bcm/clk-kona-setup.c b/drivers/clk/bcm/clk-kona-setup.c
index c37a7f0e83aa..281f4322355c 100644
--- a/drivers/clk/bcm/clk-kona-setup.c
+++ b/drivers/clk/bcm/clk-kona-setup.c
@@ -579,18 +579,13 @@ static u32 *parent_process(const char *clocks[],
579 */ 579 */
580 parent_names = kmalloc_array(parent_count, sizeof(*parent_names), 580 parent_names = kmalloc_array(parent_count, sizeof(*parent_names),
581 GFP_KERNEL); 581 GFP_KERNEL);
582 if (!parent_names) { 582 if (!parent_names)
583 pr_err("%s: error allocating %u parent names\n", __func__,
584 parent_count);
585 return ERR_PTR(-ENOMEM); 583 return ERR_PTR(-ENOMEM);
586 }
587 584
588 /* There is at least one parent, so allocate a selector array */ 585 /* There is at least one parent, so allocate a selector array */
589 parent_sel = kmalloc_array(parent_count, sizeof(*parent_sel), 586 parent_sel = kmalloc_array(parent_count, sizeof(*parent_sel),
590 GFP_KERNEL); 587 GFP_KERNEL);
591 if (!parent_sel) { 588 if (!parent_sel) {
592 pr_err("%s: error allocating %u parent selectors\n", __func__,
593 parent_count);
594 kfree(parent_names); 589 kfree(parent_names);
595 590
596 return ERR_PTR(-ENOMEM); 591 return ERR_PTR(-ENOMEM);
diff --git a/drivers/clk/clk-cdce925.c b/drivers/clk/clk-cdce925.c
index c933be01c7db..0a7e7d5a7506 100644
--- a/drivers/clk/clk-cdce925.c
+++ b/drivers/clk/clk-cdce925.c
@@ -665,7 +665,7 @@ static int cdce925_probe(struct i2c_client *client,
665 init.ops = &cdce925_pll_ops; 665 init.ops = &cdce925_pll_ops;
666 init.flags = 0; 666 init.flags = 0;
667 init.parent_names = &parent_name; 667 init.parent_names = &parent_name;
668 init.num_parents = parent_name ? 1 : 0; 668 init.num_parents = 1;
669 669
670 /* Register PLL clocks */ 670 /* Register PLL clocks */
671 for (i = 0; i < data->chip_info->num_plls; ++i) { 671 for (i = 0; i < data->chip_info->num_plls; ++i) {
diff --git a/drivers/clk/clk-hsdk-pll.c b/drivers/clk/clk-hsdk-pll.c
index bbf237173b37..c4ee280f454d 100644
--- a/drivers/clk/clk-hsdk-pll.c
+++ b/drivers/clk/clk-hsdk-pll.c
@@ -139,7 +139,7 @@ static inline void hsdk_pll_set_cfg(struct hsdk_pll_clk *clk,
139 val |= cfg->odiv << CGU_PLL_CTRL_ODIV_SHIFT; 139 val |= cfg->odiv << CGU_PLL_CTRL_ODIV_SHIFT;
140 val |= cfg->band << CGU_PLL_CTRL_BAND_SHIFT; 140 val |= cfg->band << CGU_PLL_CTRL_BAND_SHIFT;
141 141
142 dev_dbg(clk->dev, "write configurarion: %#x\n", val); 142 dev_dbg(clk->dev, "write configuration: %#x\n", val);
143 143
144 hsdk_pll_write(clk, CGU_PLL_CTRL, val); 144 hsdk_pll_write(clk, CGU_PLL_CTRL, val);
145} 145}
@@ -169,7 +169,7 @@ static unsigned long hsdk_pll_recalc_rate(struct clk_hw *hw,
169 169
170 val = hsdk_pll_read(clk, CGU_PLL_CTRL); 170 val = hsdk_pll_read(clk, CGU_PLL_CTRL);
171 171
172 dev_dbg(clk->dev, "current configurarion: %#x\n", val); 172 dev_dbg(clk->dev, "current configuration: %#x\n", val);
173 173
174 /* Check if PLL is disabled */ 174 /* Check if PLL is disabled */
175 if (val & CGU_PLL_CTRL_PD) 175 if (val & CGU_PLL_CTRL_PD)
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 16a3d5717f4e..39cabe157163 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -134,11 +134,9 @@ struct clk_hw *clk_hw_register_mux_table(struct device *dev, const char *name,
134 } 134 }
135 135
136 /* allocate the mux */ 136 /* allocate the mux */
137 mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL); 137 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
138 if (!mux) { 138 if (!mux)
139 pr_err("%s: could not allocate mux clk\n", __func__);
140 return ERR_PTR(-ENOMEM); 139 return ERR_PTR(-ENOMEM);
141 }
142 140
143 init.name = name; 141 init.name = name;
144 if (clk_mux_flags & CLK_MUX_READ_ONLY) 142 if (clk_mux_flags & CLK_MUX_READ_ONLY)
diff --git a/drivers/clk/clk-u300.c b/drivers/clk/clk-u300.c
index ec8aafda6e24..7b3e1921771f 100644
--- a/drivers/clk/clk-u300.c
+++ b/drivers/clk/clk-u300.c
@@ -229,15 +229,15 @@
229#define U300_SYSCON_S0CCR_CLOCK_FREQ_MASK (0x01E0) 229#define U300_SYSCON_S0CCR_CLOCK_FREQ_MASK (0x01E0)
230#define U300_SYSCON_S0CCR_CLOCK_SELECT_MASK (0x001E) 230#define U300_SYSCON_S0CCR_CLOCK_SELECT_MASK (0x001E)
231#define U300_SYSCON_S0CCR_CLOCK_ENABLE (0x0001) 231#define U300_SYSCON_S0CCR_CLOCK_ENABLE (0x0001)
232#define U300_SYSCON_S0CCR_SEL_MCLK (0x8<<1) 232#define U300_SYSCON_S0CCR_SEL_MCLK (0x8 << 1)
233#define U300_SYSCON_S0CCR_SEL_ACC_FSM_CLK (0xA<<1) 233#define U300_SYSCON_S0CCR_SEL_ACC_FSM_CLK (0xA << 1)
234#define U300_SYSCON_S0CCR_SEL_PLL60_48_CLK (0xC<<1) 234#define U300_SYSCON_S0CCR_SEL_PLL60_48_CLK (0xC << 1)
235#define U300_SYSCON_S0CCR_SEL_PLL60_60_CLK (0xD<<1) 235#define U300_SYSCON_S0CCR_SEL_PLL60_60_CLK (0xD << 1)
236#define U300_SYSCON_S0CCR_SEL_ACC_PLL208_CLK (0xE<<1) 236#define U300_SYSCON_S0CCR_SEL_ACC_PLL208_CLK (0xE << 1)
237#define U300_SYSCON_S0CCR_SEL_APP_PLL13_CLK (0x0<<1) 237#define U300_SYSCON_S0CCR_SEL_APP_PLL13_CLK (0x0 << 1)
238#define U300_SYSCON_S0CCR_SEL_APP_FSM_CLK (0x2<<1) 238#define U300_SYSCON_S0CCR_SEL_APP_FSM_CLK (0x2 << 1)
239#define U300_SYSCON_S0CCR_SEL_RTC_CLK (0x4<<1) 239#define U300_SYSCON_S0CCR_SEL_RTC_CLK (0x4 << 1)
240#define U300_SYSCON_S0CCR_SEL_APP_PLL208_CLK (0x6<<1) 240#define U300_SYSCON_S0CCR_SEL_APP_PLL208_CLK (0x6 << 1)
241/* SYS_1_CLK_CONTROL second clock control 16 bit (R/W) */ 241/* SYS_1_CLK_CONTROL second clock control 16 bit (R/W) */
242#define U300_SYSCON_S1CCR (0x124) 242#define U300_SYSCON_S1CCR (0x124)
243#define U300_SYSCON_S1CCR_FIELD_MASK (0x43FF) 243#define U300_SYSCON_S1CCR_FIELD_MASK (0x43FF)
@@ -247,16 +247,16 @@
247#define U300_SYSCON_S1CCR_CLOCK_FREQ_MASK (0x01E0) 247#define U300_SYSCON_S1CCR_CLOCK_FREQ_MASK (0x01E0)
248#define U300_SYSCON_S1CCR_CLOCK_SELECT_MASK (0x001E) 248#define U300_SYSCON_S1CCR_CLOCK_SELECT_MASK (0x001E)
249#define U300_SYSCON_S1CCR_CLOCK_ENABLE (0x0001) 249#define U300_SYSCON_S1CCR_CLOCK_ENABLE (0x0001)
250#define U300_SYSCON_S1CCR_SEL_MCLK (0x8<<1) 250#define U300_SYSCON_S1CCR_SEL_MCLK (0x8 << 1)
251#define U300_SYSCON_S1CCR_SEL_ACC_FSM_CLK (0xA<<1) 251#define U300_SYSCON_S1CCR_SEL_ACC_FSM_CLK (0xA << 1)
252#define U300_SYSCON_S1CCR_SEL_PLL60_48_CLK (0xC<<1) 252#define U300_SYSCON_S1CCR_SEL_PLL60_48_CLK (0xC << 1)
253#define U300_SYSCON_S1CCR_SEL_PLL60_60_CLK (0xD<<1) 253#define U300_SYSCON_S1CCR_SEL_PLL60_60_CLK (0xD << 1)
254#define U300_SYSCON_S1CCR_SEL_ACC_PLL208_CLK (0xE<<1) 254#define U300_SYSCON_S1CCR_SEL_ACC_PLL208_CLK (0xE << 1)
255#define U300_SYSCON_S1CCR_SEL_ACC_PLL13_CLK (0x0<<1) 255#define U300_SYSCON_S1CCR_SEL_ACC_PLL13_CLK (0x0 << 1)
256#define U300_SYSCON_S1CCR_SEL_APP_FSM_CLK (0x2<<1) 256#define U300_SYSCON_S1CCR_SEL_APP_FSM_CLK (0x2 << 1)
257#define U300_SYSCON_S1CCR_SEL_RTC_CLK (0x4<<1) 257#define U300_SYSCON_S1CCR_SEL_RTC_CLK (0x4 << 1)
258#define U300_SYSCON_S1CCR_SEL_APP_PLL208_CLK (0x6<<1) 258#define U300_SYSCON_S1CCR_SEL_APP_PLL208_CLK (0x6 << 1)
259/* SYS_2_CLK_CONTROL third clock contol 16 bit (R/W) */ 259/* SYS_2_CLK_CONTROL third clock control 16 bit (R/W) */
260#define U300_SYSCON_S2CCR (0x128) 260#define U300_SYSCON_S2CCR (0x128)
261#define U300_SYSCON_S2CCR_FIELD_MASK (0xC3FF) 261#define U300_SYSCON_S2CCR_FIELD_MASK (0xC3FF)
262#define U300_SYSCON_S2CCR_CLK_STEAL (0x8000) 262#define U300_SYSCON_S2CCR_CLK_STEAL (0x8000)
@@ -266,15 +266,15 @@
266#define U300_SYSCON_S2CCR_CLOCK_FREQ_MASK (0x01E0) 266#define U300_SYSCON_S2CCR_CLOCK_FREQ_MASK (0x01E0)
267#define U300_SYSCON_S2CCR_CLOCK_SELECT_MASK (0x001E) 267#define U300_SYSCON_S2CCR_CLOCK_SELECT_MASK (0x001E)
268#define U300_SYSCON_S2CCR_CLOCK_ENABLE (0x0001) 268#define U300_SYSCON_S2CCR_CLOCK_ENABLE (0x0001)
269#define U300_SYSCON_S2CCR_SEL_MCLK (0x8<<1) 269#define U300_SYSCON_S2CCR_SEL_MCLK (0x8 << 1)
270#define U300_SYSCON_S2CCR_SEL_ACC_FSM_CLK (0xA<<1) 270#define U300_SYSCON_S2CCR_SEL_ACC_FSM_CLK (0xA << 1)
271#define U300_SYSCON_S2CCR_SEL_PLL60_48_CLK (0xC<<1) 271#define U300_SYSCON_S2CCR_SEL_PLL60_48_CLK (0xC << 1)
272#define U300_SYSCON_S2CCR_SEL_PLL60_60_CLK (0xD<<1) 272#define U300_SYSCON_S2CCR_SEL_PLL60_60_CLK (0xD << 1)
273#define U300_SYSCON_S2CCR_SEL_ACC_PLL208_CLK (0xE<<1) 273#define U300_SYSCON_S2CCR_SEL_ACC_PLL208_CLK (0xE << 1)
274#define U300_SYSCON_S2CCR_SEL_ACC_PLL13_CLK (0x0<<1) 274#define U300_SYSCON_S2CCR_SEL_ACC_PLL13_CLK (0x0 << 1)
275#define U300_SYSCON_S2CCR_SEL_APP_FSM_CLK (0x2<<1) 275#define U300_SYSCON_S2CCR_SEL_APP_FSM_CLK (0x2 << 1)
276#define U300_SYSCON_S2CCR_SEL_RTC_CLK (0x4<<1) 276#define U300_SYSCON_S2CCR_SEL_RTC_CLK (0x4 << 1)
277#define U300_SYSCON_S2CCR_SEL_APP_PLL208_CLK (0x6<<1) 277#define U300_SYSCON_S2CCR_SEL_APP_PLL208_CLK (0x6 << 1)
278/* SC_PLL_IRQ_CONTROL 16bit (R/W) */ 278/* SC_PLL_IRQ_CONTROL 16bit (R/W) */
279#define U300_SYSCON_PICR (0x0130) 279#define U300_SYSCON_PICR (0x0130)
280#define U300_SYSCON_PICR_MASK (0x00FF) 280#define U300_SYSCON_PICR_MASK (0x00FF)
@@ -378,7 +378,7 @@
378 * +- ISP Image Signal Processor (U335 only) 378 * +- ISP Image Signal Processor (U335 only)
379 * +- CDS (U335 only) 379 * +- CDS (U335 only)
380 * +- DMA Direct Memory Access Controller 380 * +- DMA Direct Memory Access Controller
381 * +- AAIF APP/ACC Inteface (Mobile Scalable Link, MSL) 381 * +- AAIF APP/ACC Interface (Mobile Scalable Link, MSL)
382 * +- APEX 382 * +- APEX
383 * +- VIDEO_ENC AVE2/3 Video Encoder 383 * +- VIDEO_ENC AVE2/3 Video Encoder
384 * +- XGAM Graphics Accelerator Controller 384 * +- XGAM Graphics Accelerator Controller
@@ -568,14 +568,14 @@ syscon_clk_recalc_rate(struct clk_hw *hw,
568 struct clk_syscon *sclk = to_syscon(hw); 568 struct clk_syscon *sclk = to_syscon(hw);
569 u16 perf = syscon_get_perf(); 569 u16 perf = syscon_get_perf();
570 570
571 switch(sclk->clk_val) { 571 switch (sclk->clk_val) {
572 case U300_SYSCON_SBCER_FAST_BRIDGE_CLK_EN: 572 case U300_SYSCON_SBCER_FAST_BRIDGE_CLK_EN:
573 case U300_SYSCON_SBCER_I2C0_CLK_EN: 573 case U300_SYSCON_SBCER_I2C0_CLK_EN:
574 case U300_SYSCON_SBCER_I2C1_CLK_EN: 574 case U300_SYSCON_SBCER_I2C1_CLK_EN:
575 case U300_SYSCON_SBCER_MMC_CLK_EN: 575 case U300_SYSCON_SBCER_MMC_CLK_EN:
576 case U300_SYSCON_SBCER_SPI_CLK_EN: 576 case U300_SYSCON_SBCER_SPI_CLK_EN:
577 /* The FAST clocks have one progression */ 577 /* The FAST clocks have one progression */
578 switch(perf) { 578 switch (perf) {
579 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER: 579 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER:
580 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW: 580 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW:
581 return 13000000; 581 return 13000000;
@@ -586,7 +586,7 @@ syscon_clk_recalc_rate(struct clk_hw *hw,
586 case U300_SYSCON_SBCER_NANDIF_CLK_EN: 586 case U300_SYSCON_SBCER_NANDIF_CLK_EN:
587 case U300_SYSCON_SBCER_XGAM_CLK_EN: 587 case U300_SYSCON_SBCER_XGAM_CLK_EN:
588 /* AMBA interconnect peripherals */ 588 /* AMBA interconnect peripherals */
589 switch(perf) { 589 switch (perf) {
590 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER: 590 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER:
591 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW: 591 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW:
592 return 6500000; 592 return 6500000;
@@ -598,7 +598,7 @@ syscon_clk_recalc_rate(struct clk_hw *hw,
598 case U300_SYSCON_SBCER_SEMI_CLK_EN: 598 case U300_SYSCON_SBCER_SEMI_CLK_EN:
599 case U300_SYSCON_SBCER_EMIF_CLK_EN: 599 case U300_SYSCON_SBCER_EMIF_CLK_EN:
600 /* EMIF speeds */ 600 /* EMIF speeds */
601 switch(perf) { 601 switch (perf) {
602 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER: 602 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER:
603 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW: 603 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW:
604 return 13000000; 604 return 13000000;
@@ -609,7 +609,7 @@ syscon_clk_recalc_rate(struct clk_hw *hw,
609 } 609 }
610 case U300_SYSCON_SBCER_CPU_CLK_EN: 610 case U300_SYSCON_SBCER_CPU_CLK_EN:
611 /* And the fast CPU clock */ 611 /* And the fast CPU clock */
612 switch(perf) { 612 switch (perf) {
613 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER: 613 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW_POWER:
614 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW: 614 case U300_SYSCON_CCR_CLKING_PERFORMANCE_LOW:
615 return 13000000; 615 return 13000000;
@@ -702,12 +702,10 @@ syscon_clk_register(struct device *dev, const char *name,
702 struct clk_init_data init; 702 struct clk_init_data init;
703 int ret; 703 int ret;
704 704
705 sclk = kzalloc(sizeof(struct clk_syscon), GFP_KERNEL); 705 sclk = kzalloc(sizeof(*sclk), GFP_KERNEL);
706 if (!sclk) { 706 if (!sclk)
707 pr_err("could not allocate syscon clock %s\n",
708 name);
709 return ERR_PTR(-ENOMEM); 707 return ERR_PTR(-ENOMEM);
710 } 708
711 init.name = name; 709 init.name = name;
712 init.ops = &syscon_clk_ops; 710 init.ops = &syscon_clk_ops;
713 init.flags = flags; 711 init.flags = flags;
@@ -1123,12 +1121,10 @@ mclk_clk_register(struct device *dev, const char *name,
1123 struct clk_init_data init; 1121 struct clk_init_data init;
1124 int ret; 1122 int ret;
1125 1123
1126 mclk = kzalloc(sizeof(struct clk_mclk), GFP_KERNEL); 1124 mclk = kzalloc(sizeof(*mclk), GFP_KERNEL);
1127 if (!mclk) { 1125 if (!mclk)
1128 pr_err("could not allocate MMC/SD clock %s\n",
1129 name);
1130 return ERR_PTR(-ENOMEM); 1126 return ERR_PTR(-ENOMEM);
1131 } 1127
1132 init.name = "mclk"; 1128 init.name = "mclk";
1133 init.ops = &mclk_ops; 1129 init.ops = &mclk_ops;
1134 init.flags = 0; 1130 init.flags = 0;
diff --git a/drivers/clk/clk-xgene.c b/drivers/clk/clk-xgene.c
index 4c75821a3933..531b030d4d4e 100644
--- a/drivers/clk/clk-xgene.c
+++ b/drivers/clk/clk-xgene.c
@@ -146,10 +146,8 @@ static struct clk *xgene_register_clk_pll(struct device *dev,
146 146
147 /* allocate the APM clock structure */ 147 /* allocate the APM clock structure */
148 apmclk = kzalloc(sizeof(*apmclk), GFP_KERNEL); 148 apmclk = kzalloc(sizeof(*apmclk), GFP_KERNEL);
149 if (!apmclk) { 149 if (!apmclk)
150 pr_err("%s: could not allocate APM clk\n", __func__);
151 return ERR_PTR(-ENOMEM); 150 return ERR_PTR(-ENOMEM);
152 }
153 151
154 init.name = name; 152 init.name = name;
155 init.ops = &xgene_clk_pll_ops; 153 init.ops = &xgene_clk_pll_ops;
@@ -191,7 +189,7 @@ static void xgene_pllclk_init(struct device_node *np, enum xgene_pll_type pll_ty
191 int version = xgene_pllclk_version(np); 189 int version = xgene_pllclk_version(np);
192 190
193 reg = of_iomap(np, 0); 191 reg = of_iomap(np, 0);
194 if (reg == NULL) { 192 if (!reg) {
195 pr_err("Unable to map CSR register for %pOF\n", np); 193 pr_err("Unable to map CSR register for %pOF\n", np);
196 return; 194 return;
197 } 195 }
@@ -467,7 +465,7 @@ static int xgene_clk_enable(struct clk_hw *hw)
467 if (pclk->lock) 465 if (pclk->lock)
468 spin_lock_irqsave(pclk->lock, flags); 466 spin_lock_irqsave(pclk->lock, flags);
469 467
470 if (pclk->param.csr_reg != NULL) { 468 if (pclk->param.csr_reg) {
471 pr_debug("%s clock enabled\n", clk_hw_get_name(hw)); 469 pr_debug("%s clock enabled\n", clk_hw_get_name(hw));
472 /* First enable the clock */ 470 /* First enable the clock */
473 data = xgene_clk_read(pclk->param.csr_reg + 471 data = xgene_clk_read(pclk->param.csr_reg +
@@ -507,7 +505,7 @@ static void xgene_clk_disable(struct clk_hw *hw)
507 if (pclk->lock) 505 if (pclk->lock)
508 spin_lock_irqsave(pclk->lock, flags); 506 spin_lock_irqsave(pclk->lock, flags);
509 507
510 if (pclk->param.csr_reg != NULL) { 508 if (pclk->param.csr_reg) {
511 pr_debug("%s clock disabled\n", clk_hw_get_name(hw)); 509 pr_debug("%s clock disabled\n", clk_hw_get_name(hw));
512 /* First put the CSR in reset */ 510 /* First put the CSR in reset */
513 data = xgene_clk_read(pclk->param.csr_reg + 511 data = xgene_clk_read(pclk->param.csr_reg +
@@ -533,7 +531,7 @@ static int xgene_clk_is_enabled(struct clk_hw *hw)
533 struct xgene_clk *pclk = to_xgene_clk(hw); 531 struct xgene_clk *pclk = to_xgene_clk(hw);
534 u32 data = 0; 532 u32 data = 0;
535 533
536 if (pclk->param.csr_reg != NULL) { 534 if (pclk->param.csr_reg) {
537 pr_debug("%s clock checking\n", clk_hw_get_name(hw)); 535 pr_debug("%s clock checking\n", clk_hw_get_name(hw));
538 data = xgene_clk_read(pclk->param.csr_reg + 536 data = xgene_clk_read(pclk->param.csr_reg +
539 pclk->param.reg_clk_offset); 537 pclk->param.reg_clk_offset);
@@ -542,7 +540,7 @@ static int xgene_clk_is_enabled(struct clk_hw *hw)
542 "disabled"); 540 "disabled");
543 } 541 }
544 542
545 if (pclk->param.csr_reg == NULL) 543 if (!pclk->param.csr_reg)
546 return 1; 544 return 1;
547 return data & pclk->param.reg_clk_mask ? 1 : 0; 545 return data & pclk->param.reg_clk_mask ? 1 : 0;
548} 546}
@@ -650,10 +648,8 @@ static struct clk *xgene_register_clk(struct device *dev,
650 648
651 /* allocate the APM clock structure */ 649 /* allocate the APM clock structure */
652 apmclk = kzalloc(sizeof(*apmclk), GFP_KERNEL); 650 apmclk = kzalloc(sizeof(*apmclk), GFP_KERNEL);
653 if (!apmclk) { 651 if (!apmclk)
654 pr_err("%s: could not allocate APM clk\n", __func__);
655 return ERR_PTR(-ENOMEM); 652 return ERR_PTR(-ENOMEM);
656 }
657 653
658 init.name = name; 654 init.name = name;
659 init.ops = &xgene_clk_ops; 655 init.ops = &xgene_clk_ops;
@@ -709,7 +705,7 @@ static void __init xgene_devclk_init(struct device_node *np)
709 break; 705 break;
710 } 706 }
711 map_res = of_iomap(np, i); 707 map_res = of_iomap(np, i);
712 if (map_res == NULL) { 708 if (!map_res) {
713 pr_err("Unable to map resource %d for %pOF\n", i, np); 709 pr_err("Unable to map resource %d for %pOF\n", i, np);
714 goto err; 710 goto err;
715 } 711 }
diff --git a/drivers/clk/mmp/clk-frac.c b/drivers/clk/mmp/clk-frac.c
index ea47a968ad9b..cb43d54735b0 100644
--- a/drivers/clk/mmp/clk-frac.c
+++ b/drivers/clk/mmp/clk-frac.c
@@ -172,10 +172,8 @@ struct clk *mmp_clk_register_factor(const char *name, const char *parent_name,
172 } 172 }
173 173
174 factor = kzalloc(sizeof(*factor), GFP_KERNEL); 174 factor = kzalloc(sizeof(*factor), GFP_KERNEL);
175 if (!factor) { 175 if (!factor)
176 pr_err("%s: could not allocate factor clk\n", __func__);
177 return ERR_PTR(-ENOMEM); 176 return ERR_PTR(-ENOMEM);
178 }
179 177
180 /* struct clk_aux assignments */ 178 /* struct clk_aux assignments */
181 factor->base = base; 179 factor->base = base;
diff --git a/drivers/clk/mmp/clk-gate.c b/drivers/clk/mmp/clk-gate.c
index d20cd3431ac2..7355595c42e2 100644
--- a/drivers/clk/mmp/clk-gate.c
+++ b/drivers/clk/mmp/clk-gate.c
@@ -103,10 +103,8 @@ struct clk *mmp_clk_register_gate(struct device *dev, const char *name,
103 103
104 /* allocate the gate */ 104 /* allocate the gate */
105 gate = kzalloc(sizeof(*gate), GFP_KERNEL); 105 gate = kzalloc(sizeof(*gate), GFP_KERNEL);
106 if (!gate) { 106 if (!gate)
107 pr_err("%s:%s could not allocate gate clk\n", __func__, name);
108 return ERR_PTR(-ENOMEM); 107 return ERR_PTR(-ENOMEM);
109 }
110 108
111 init.name = name; 109 init.name = name;
112 init.ops = &mmp_clk_gate_ops; 110 init.ops = &mmp_clk_gate_ops;
diff --git a/drivers/clk/mmp/clk-mix.c b/drivers/clk/mmp/clk-mix.c
index c554833cffc5..90814b2613c0 100644
--- a/drivers/clk/mmp/clk-mix.c
+++ b/drivers/clk/mmp/clk-mix.c
@@ -229,7 +229,7 @@ static int mmp_clk_mix_determine_rate(struct clk_hw *hw,
229 parent_rate = clk_hw_get_rate(parent); 229 parent_rate = clk_hw_get_rate(parent);
230 mix_rate = parent_rate / item->divisor; 230 mix_rate = parent_rate / item->divisor;
231 gap = abs(mix_rate - req->rate); 231 gap = abs(mix_rate - req->rate);
232 if (parent_best == NULL || gap < gap_best) { 232 if (!parent_best || gap < gap_best) {
233 parent_best = parent; 233 parent_best = parent;
234 parent_rate_best = parent_rate; 234 parent_rate_best = parent_rate;
235 mix_rate_best = mix_rate; 235 mix_rate_best = mix_rate;
@@ -247,7 +247,7 @@ static int mmp_clk_mix_determine_rate(struct clk_hw *hw,
247 div = _get_div(mix, j); 247 div = _get_div(mix, j);
248 mix_rate = parent_rate / div; 248 mix_rate = parent_rate / div;
249 gap = abs(mix_rate - req->rate); 249 gap = abs(mix_rate - req->rate);
250 if (parent_best == NULL || gap < gap_best) { 250 if (!parent_best || gap < gap_best) {
251 parent_best = parent; 251 parent_best = parent;
252 parent_rate_best = parent_rate; 252 parent_rate_best = parent_rate;
253 mix_rate_best = mix_rate; 253 mix_rate_best = mix_rate;
@@ -451,11 +451,8 @@ struct clk *mmp_clk_register_mix(struct device *dev,
451 size_t table_bytes; 451 size_t table_bytes;
452 452
453 mix = kzalloc(sizeof(*mix), GFP_KERNEL); 453 mix = kzalloc(sizeof(*mix), GFP_KERNEL);
454 if (!mix) { 454 if (!mix)
455 pr_err("%s:%s: could not allocate mmp mix clk\n",
456 __func__, name);
457 return ERR_PTR(-ENOMEM); 455 return ERR_PTR(-ENOMEM);
458 }
459 456
460 init.name = name; 457 init.name = name;
461 init.flags = flags | CLK_GET_RATE_NOCACHE; 458 init.flags = flags | CLK_GET_RATE_NOCACHE;
@@ -467,12 +464,9 @@ struct clk *mmp_clk_register_mix(struct device *dev,
467 if (config->table) { 464 if (config->table) {
468 table_bytes = sizeof(*config->table) * config->table_size; 465 table_bytes = sizeof(*config->table) * config->table_size;
469 mix->table = kmemdup(config->table, table_bytes, GFP_KERNEL); 466 mix->table = kmemdup(config->table, table_bytes, GFP_KERNEL);
470 if (!mix->table) { 467 if (!mix->table)
471 pr_err("%s:%s: could not allocate mmp mix table\n", 468 goto free_mix;
472 __func__, name); 469
473 kfree(mix);
474 return ERR_PTR(-ENOMEM);
475 }
476 mix->table_size = config->table_size; 470 mix->table_size = config->table_size;
477 } 471 }
478 472
@@ -481,11 +475,8 @@ struct clk *mmp_clk_register_mix(struct device *dev,
481 mix->mux_table = kmemdup(config->mux_table, table_bytes, 475 mix->mux_table = kmemdup(config->mux_table, table_bytes,
482 GFP_KERNEL); 476 GFP_KERNEL);
483 if (!mix->mux_table) { 477 if (!mix->mux_table) {
484 pr_err("%s:%s: could not allocate mmp mix mux-table\n",
485 __func__, name);
486 kfree(mix->table); 478 kfree(mix->table);
487 kfree(mix); 479 goto free_mix;
488 return ERR_PTR(-ENOMEM);
489 } 480 }
490 } 481 }
491 482
@@ -509,4 +500,8 @@ struct clk *mmp_clk_register_mix(struct device *dev,
509 } 500 }
510 501
511 return clk; 502 return clk;
503
504free_mix:
505 kfree(mix);
506 return ERR_PTR(-ENOMEM);
512} 507}
diff --git a/drivers/clk/mmp/clk-mmp2.c b/drivers/clk/mmp/clk-mmp2.c
index 038023483b98..7460031714da 100644
--- a/drivers/clk/mmp/clk-mmp2.c
+++ b/drivers/clk/mmp/clk-mmp2.c
@@ -83,19 +83,19 @@ void __init mmp2_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
83 void __iomem *apbc_base; 83 void __iomem *apbc_base;
84 84
85 mpmu_base = ioremap(mpmu_phys, SZ_4K); 85 mpmu_base = ioremap(mpmu_phys, SZ_4K);
86 if (mpmu_base == NULL) { 86 if (!mpmu_base) {
87 pr_err("error to ioremap MPMU base\n"); 87 pr_err("error to ioremap MPMU base\n");
88 return; 88 return;
89 } 89 }
90 90
91 apmu_base = ioremap(apmu_phys, SZ_4K); 91 apmu_base = ioremap(apmu_phys, SZ_4K);
92 if (apmu_base == NULL) { 92 if (!apmu_base) {
93 pr_err("error to ioremap APMU base\n"); 93 pr_err("error to ioremap APMU base\n");
94 return; 94 return;
95 } 95 }
96 96
97 apbc_base = ioremap(apbc_phys, SZ_4K); 97 apbc_base = ioremap(apbc_phys, SZ_4K);
98 if (apbc_base == NULL) { 98 if (!apbc_base) {
99 pr_err("error to ioremap APBC base\n"); 99 pr_err("error to ioremap APBC base\n");
100 return; 100 return;
101 } 101 }
diff --git a/drivers/clk/mmp/clk-pxa168.c b/drivers/clk/mmp/clk-pxa168.c
index a9ef9209532a..8e2551ab8462 100644
--- a/drivers/clk/mmp/clk-pxa168.c
+++ b/drivers/clk/mmp/clk-pxa168.c
@@ -75,19 +75,19 @@ void __init pxa168_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
75 void __iomem *apbc_base; 75 void __iomem *apbc_base;
76 76
77 mpmu_base = ioremap(mpmu_phys, SZ_4K); 77 mpmu_base = ioremap(mpmu_phys, SZ_4K);
78 if (mpmu_base == NULL) { 78 if (!mpmu_base) {
79 pr_err("error to ioremap MPMU base\n"); 79 pr_err("error to ioremap MPMU base\n");
80 return; 80 return;
81 } 81 }
82 82
83 apmu_base = ioremap(apmu_phys, SZ_4K); 83 apmu_base = ioremap(apmu_phys, SZ_4K);
84 if (apmu_base == NULL) { 84 if (!apmu_base) {
85 pr_err("error to ioremap APMU base\n"); 85 pr_err("error to ioremap APMU base\n");
86 return; 86 return;
87 } 87 }
88 88
89 apbc_base = ioremap(apbc_phys, SZ_4K); 89 apbc_base = ioremap(apbc_phys, SZ_4K);
90 if (apbc_base == NULL) { 90 if (!apbc_base) {
91 pr_err("error to ioremap APBC base\n"); 91 pr_err("error to ioremap APBC base\n");
92 return; 92 return;
93 } 93 }
diff --git a/drivers/clk/mmp/clk-pxa910.c b/drivers/clk/mmp/clk-pxa910.c
index a520cf7702a1..7a7965141918 100644
--- a/drivers/clk/mmp/clk-pxa910.c
+++ b/drivers/clk/mmp/clk-pxa910.c
@@ -74,25 +74,25 @@ void __init pxa910_clk_init(phys_addr_t mpmu_phys, phys_addr_t apmu_phys,
74 void __iomem *apbc_base; 74 void __iomem *apbc_base;
75 75
76 mpmu_base = ioremap(mpmu_phys, SZ_4K); 76 mpmu_base = ioremap(mpmu_phys, SZ_4K);
77 if (mpmu_base == NULL) { 77 if (!mpmu_base) {
78 pr_err("error to ioremap MPMU base\n"); 78 pr_err("error to ioremap MPMU base\n");
79 return; 79 return;
80 } 80 }
81 81
82 apmu_base = ioremap(apmu_phys, SZ_4K); 82 apmu_base = ioremap(apmu_phys, SZ_4K);
83 if (apmu_base == NULL) { 83 if (!apmu_base) {
84 pr_err("error to ioremap APMU base\n"); 84 pr_err("error to ioremap APMU base\n");
85 return; 85 return;
86 } 86 }
87 87
88 apbcp_base = ioremap(apbcp_phys, SZ_4K); 88 apbcp_base = ioremap(apbcp_phys, SZ_4K);
89 if (apbcp_base == NULL) { 89 if (!apbcp_base) {
90 pr_err("error to ioremap APBC extension base\n"); 90 pr_err("error to ioremap APBC extension base\n");
91 return; 91 return;
92 } 92 }
93 93
94 apbc_base = ioremap(apbc_phys, SZ_4K); 94 apbc_base = ioremap(apbc_phys, SZ_4K);
95 if (apbc_base == NULL) { 95 if (!apbc_base) {
96 pr_err("error to ioremap APBC base\n"); 96 pr_err("error to ioremap APBC base\n");
97 return; 97 return;
98 } 98 }
diff --git a/drivers/clk/spear/clk-aux-synth.c b/drivers/clk/spear/clk-aux-synth.c
index 23a6b10e1d6a..906410413bc1 100644
--- a/drivers/clk/spear/clk-aux-synth.c
+++ b/drivers/clk/spear/clk-aux-synth.c
@@ -149,10 +149,8 @@ struct clk *clk_register_aux(const char *aux_name, const char *gate_name,
149 } 149 }
150 150
151 aux = kzalloc(sizeof(*aux), GFP_KERNEL); 151 aux = kzalloc(sizeof(*aux), GFP_KERNEL);
152 if (!aux) { 152 if (!aux)
153 pr_err("could not allocate aux clk\n");
154 return ERR_PTR(-ENOMEM); 153 return ERR_PTR(-ENOMEM);
155 }
156 154
157 /* struct clk_aux assignments */ 155 /* struct clk_aux assignments */
158 if (!masks) 156 if (!masks)
diff --git a/drivers/clk/spear/clk-frac-synth.c b/drivers/clk/spear/clk-frac-synth.c
index eaf970bda5d9..229c96daece6 100644
--- a/drivers/clk/spear/clk-frac-synth.c
+++ b/drivers/clk/spear/clk-frac-synth.c
@@ -136,10 +136,8 @@ struct clk *clk_register_frac(const char *name, const char *parent_name,
136 } 136 }
137 137
138 frac = kzalloc(sizeof(*frac), GFP_KERNEL); 138 frac = kzalloc(sizeof(*frac), GFP_KERNEL);
139 if (!frac) { 139 if (!frac)
140 pr_err("could not allocate frac clk\n");
141 return ERR_PTR(-ENOMEM); 140 return ERR_PTR(-ENOMEM);
142 }
143 141
144 /* struct clk_frac assignments */ 142 /* struct clk_frac assignments */
145 frac->reg = reg; 143 frac->reg = reg;
diff --git a/drivers/clk/spear/clk-gpt-synth.c b/drivers/clk/spear/clk-gpt-synth.c
index 3641799d4f6f..28262f422562 100644
--- a/drivers/clk/spear/clk-gpt-synth.c
+++ b/drivers/clk/spear/clk-gpt-synth.c
@@ -125,10 +125,8 @@ struct clk *clk_register_gpt(const char *name, const char *parent_name, unsigned
125 } 125 }
126 126
127 gpt = kzalloc(sizeof(*gpt), GFP_KERNEL); 127 gpt = kzalloc(sizeof(*gpt), GFP_KERNEL);
128 if (!gpt) { 128 if (!gpt)
129 pr_err("could not allocate gpt clk\n");
130 return ERR_PTR(-ENOMEM); 129 return ERR_PTR(-ENOMEM);
131 }
132 130
133 /* struct clk_gpt assignments */ 131 /* struct clk_gpt assignments */
134 gpt->reg = reg; 132 gpt->reg = reg;
diff --git a/drivers/clk/spear/clk-vco-pll.c b/drivers/clk/spear/clk-vco-pll.c
index 069b48a44f80..c08dec30bfa6 100644
--- a/drivers/clk/spear/clk-vco-pll.c
+++ b/drivers/clk/spear/clk-vco-pll.c
@@ -292,16 +292,12 @@ struct clk *clk_register_vco_pll(const char *vco_name, const char *pll_name,
292 } 292 }
293 293
294 vco = kzalloc(sizeof(*vco), GFP_KERNEL); 294 vco = kzalloc(sizeof(*vco), GFP_KERNEL);
295 if (!vco) { 295 if (!vco)
296 pr_err("could not allocate vco clk\n");
297 return ERR_PTR(-ENOMEM); 296 return ERR_PTR(-ENOMEM);
298 }
299 297
300 pll = kzalloc(sizeof(*pll), GFP_KERNEL); 298 pll = kzalloc(sizeof(*pll), GFP_KERNEL);
301 if (!pll) { 299 if (!pll)
302 pr_err("could not allocate pll clk\n");
303 goto free_vco; 300 goto free_vco;
304 }
305 301
306 /* struct clk_vco assignments */ 302 /* struct clk_vco assignments */
307 vco->mode_reg = mode_reg; 303 vco->mode_reg = mode_reg;
diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c
index 88f04a4cb890..77f93f6d2806 100644
--- a/drivers/clk/ti/divider.c
+++ b/drivers/clk/ti/divider.c
@@ -292,10 +292,8 @@ static struct clk *_register_divider(struct device *dev, const char *name,
292 292
293 /* allocate the divider */ 293 /* allocate the divider */
294 div = kzalloc(sizeof(*div), GFP_KERNEL); 294 div = kzalloc(sizeof(*div), GFP_KERNEL);
295 if (!div) { 295 if (!div)
296 pr_err("%s: could not allocate divider clk\n", __func__);
297 return ERR_PTR(-ENOMEM); 296 return ERR_PTR(-ENOMEM);
298 }
299 297
300 init.name = name; 298 init.name = name;
301 init.ops = &ti_clk_divider_ops; 299 init.ops = &ti_clk_divider_ops;
diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c
index 18c267b38461..d4705803f3d3 100644
--- a/drivers/clk/ti/mux.c
+++ b/drivers/clk/ti/mux.c
@@ -108,10 +108,8 @@ static struct clk *_register_mux(struct device *dev, const char *name,
108 108
109 /* allocate the mux */ 109 /* allocate the mux */
110 mux = kzalloc(sizeof(*mux), GFP_KERNEL); 110 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
111 if (!mux) { 111 if (!mux)
112 pr_err("%s: could not allocate mux clk\n", __func__);
113 return ERR_PTR(-ENOMEM); 112 return ERR_PTR(-ENOMEM);
114 }
115 113
116 init.name = name; 114 init.name = name;
117 init.ops = &ti_clk_mux_ops; 115 init.ops = &ti_clk_mux_ops;
diff --git a/drivers/clk/ux500/clk-prcc.c b/drivers/clk/ux500/clk-prcc.c
index f50592775c9d..7cfb59c9136d 100644
--- a/drivers/clk/ux500/clk-prcc.c
+++ b/drivers/clk/ux500/clk-prcc.c
@@ -107,11 +107,9 @@ static struct clk *clk_reg_prcc(const char *name,
107 return ERR_PTR(-EINVAL); 107 return ERR_PTR(-EINVAL);
108 } 108 }
109 109
110 clk = kzalloc(sizeof(struct clk_prcc), GFP_KERNEL); 110 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
111 if (!clk) { 111 if (!clk)
112 pr_err("clk_prcc: %s could not allocate clk\n", __func__);
113 return ERR_PTR(-ENOMEM); 112 return ERR_PTR(-ENOMEM);
114 }
115 113
116 clk->base = ioremap(phy_base, SZ_4K); 114 clk->base = ioremap(phy_base, SZ_4K);
117 if (!clk->base) 115 if (!clk->base)
diff --git a/drivers/clk/ux500/clk-prcmu.c b/drivers/clk/ux500/clk-prcmu.c
index 6e3e16b2e5ca..9d1f2d4550ad 100644
--- a/drivers/clk/ux500/clk-prcmu.c
+++ b/drivers/clk/ux500/clk-prcmu.c
@@ -258,11 +258,9 @@ static struct clk *clk_reg_prcmu(const char *name,
258 return ERR_PTR(-EINVAL); 258 return ERR_PTR(-EINVAL);
259 } 259 }
260 260
261 clk = kzalloc(sizeof(struct clk_prcmu), GFP_KERNEL); 261 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
262 if (!clk) { 262 if (!clk)
263 pr_err("clk_prcmu: %s could not allocate clk\n", __func__);
264 return ERR_PTR(-ENOMEM); 263 return ERR_PTR(-ENOMEM);
265 }
266 264
267 clk->cg_sel = cg_sel; 265 clk->cg_sel = cg_sel;
268 clk->is_prepared = 1; 266 clk->is_prepared = 1;
diff --git a/drivers/clk/ux500/clk-sysctrl.c b/drivers/clk/ux500/clk-sysctrl.c
index 8a4e93ce1e42..7c0403b733ae 100644
--- a/drivers/clk/ux500/clk-sysctrl.c
+++ b/drivers/clk/ux500/clk-sysctrl.c
@@ -139,11 +139,9 @@ static struct clk *clk_reg_sysctrl(struct device *dev,
139 return ERR_PTR(-EINVAL); 139 return ERR_PTR(-EINVAL);
140 } 140 }
141 141
142 clk = devm_kzalloc(dev, sizeof(struct clk_sysctrl), GFP_KERNEL); 142 clk = devm_kzalloc(dev, sizeof(*clk), GFP_KERNEL);
143 if (!clk) { 143 if (!clk)
144 dev_err(dev, "clk_sysctrl: could not allocate clk\n");
145 return ERR_PTR(-ENOMEM); 144 return ERR_PTR(-ENOMEM);
146 }
147 145
148 /* set main clock registers */ 146 /* set main clock registers */
149 clk->reg_sel[0] = reg_sel[0]; 147 clk->reg_sel[0] = reg_sel[0];
diff --git a/drivers/clk/versatile/clk-icst.c b/drivers/clk/versatile/clk-icst.c
index 09fbe66f1f11..dafe7a45875d 100644
--- a/drivers/clk/versatile/clk-icst.c
+++ b/drivers/clk/versatile/clk-icst.c
@@ -359,16 +359,13 @@ static struct clk *icst_clk_setup(struct device *dev,
359 struct clk_init_data init; 359 struct clk_init_data init;
360 struct icst_params *pclone; 360 struct icst_params *pclone;
361 361
362 icst = kzalloc(sizeof(struct clk_icst), GFP_KERNEL); 362 icst = kzalloc(sizeof(*icst), GFP_KERNEL);
363 if (!icst) { 363 if (!icst)
364 pr_err("could not allocate ICST clock!\n");
365 return ERR_PTR(-ENOMEM); 364 return ERR_PTR(-ENOMEM);
366 }
367 365
368 pclone = kmemdup(desc->params, sizeof(*pclone), GFP_KERNEL); 366 pclone = kmemdup(desc->params, sizeof(*pclone), GFP_KERNEL);
369 if (!pclone) { 367 if (!pclone) {
370 kfree(icst); 368 kfree(icst);
371 pr_err("could not clone ICST params\n");
372 return ERR_PTR(-ENOMEM); 369 return ERR_PTR(-ENOMEM);
373 } 370 }
374 371
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-15 09:05:28 -0400