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authorEric Bernstein <eric.bernstein@amd.com>2017-12-05 10:51:35 -0500
committerAlex Deucher <alexander.deucher@amd.com>2017-12-20 14:47:04 -0500
commit36192e7e57032e08e8894189d9ec7db4ae2104ad (patch)
tree6d2831acf6bf1dc78c81f71c762a1e29183eea16
parentb01313918202ebb1385d06d2bd27136a7a561e94 (diff)
drm/amd/display: Update HUBP
Signed-off-by: Eric Bernstein <eric.bernstein@amd.com> Reviewed-by: Tony Cheng <Tony.Cheng@amd.com> Acked-by: Harry Wentland <harry.wentland@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c31
-rw-r--r--drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h7
-rw-r--r--drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h15
3 files changed, 32 insertions, 21 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
index 2d843b2d5f86..90c57a503302 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.c
@@ -776,20 +776,7 @@ void hubp1_read_state(struct dcn10_hubp *hubp1,
776 QoS_LEVEL_HIGH_WM, &s->qos_level_high_wm); 776 QoS_LEVEL_HIGH_WM, &s->qos_level_high_wm);
777} 777}
778 778
779enum cursor_pitch { 779bool hubp1_cursor_program_control(
780 CURSOR_PITCH_64_PIXELS = 0,
781 CURSOR_PITCH_128_PIXELS,
782 CURSOR_PITCH_256_PIXELS
783};
784
785enum cursor_lines_per_chunk {
786 CURSOR_LINE_PER_CHUNK_2 = 1,
787 CURSOR_LINE_PER_CHUNK_4,
788 CURSOR_LINE_PER_CHUNK_8,
789 CURSOR_LINE_PER_CHUNK_16
790};
791
792static bool ippn10_cursor_program_control(
793 struct dcn10_hubp *hubp1, 780 struct dcn10_hubp *hubp1,
794 bool pixel_data_invert, 781 bool pixel_data_invert,
795 enum dc_cursor_color_format color_format) 782 enum dc_cursor_color_format color_format)
@@ -810,8 +797,7 @@ static bool ippn10_cursor_program_control(
810 return true; 797 return true;
811} 798}
812 799
813static enum cursor_pitch ippn10_get_cursor_pitch( 800enum cursor_pitch hubp1_get_cursor_pitch(unsigned int pitch)
814 unsigned int pitch)
815{ 801{
816 enum cursor_pitch hw_pitch; 802 enum cursor_pitch hw_pitch;
817 803
@@ -834,7 +820,7 @@ static enum cursor_pitch ippn10_get_cursor_pitch(
834 return hw_pitch; 820 return hw_pitch;
835} 821}
836 822
837static enum cursor_lines_per_chunk ippn10_get_lines_per_chunk( 823static enum cursor_lines_per_chunk hubp1_get_lines_per_chunk(
838 unsigned int cur_width, 824 unsigned int cur_width,
839 enum dc_cursor_color_format format) 825 enum dc_cursor_color_format format)
840{ 826{
@@ -860,8 +846,8 @@ void hubp1_cursor_set_attributes(
860 const struct dc_cursor_attributes *attr) 846 const struct dc_cursor_attributes *attr)
861{ 847{
862 struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp); 848 struct dcn10_hubp *hubp1 = TO_DCN10_HUBP(hubp);
863 enum cursor_pitch hw_pitch = ippn10_get_cursor_pitch(attr->pitch); 849 enum cursor_pitch hw_pitch = hubp1_get_cursor_pitch(attr->pitch);
864 enum cursor_lines_per_chunk lpc = ippn10_get_lines_per_chunk( 850 enum cursor_lines_per_chunk lpc = hubp1_get_lines_per_chunk(
865 attr->width, attr->color_format); 851 attr->width, attr->color_format);
866 852
867 hubp->curs_attr = *attr; 853 hubp->curs_attr = *attr;
@@ -874,11 +860,13 @@ void hubp1_cursor_set_attributes(
874 REG_UPDATE_2(CURSOR_SIZE, 860 REG_UPDATE_2(CURSOR_SIZE,
875 CURSOR_WIDTH, attr->width, 861 CURSOR_WIDTH, attr->width,
876 CURSOR_HEIGHT, attr->height); 862 CURSOR_HEIGHT, attr->height);
863
877 REG_UPDATE_3(CURSOR_CONTROL, 864 REG_UPDATE_3(CURSOR_CONTROL,
878 CURSOR_MODE, attr->color_format, 865 CURSOR_MODE, attr->color_format,
879 CURSOR_PITCH, hw_pitch, 866 CURSOR_PITCH, hw_pitch,
880 CURSOR_LINES_PER_CHUNK, lpc); 867 CURSOR_LINES_PER_CHUNK, lpc);
881 ippn10_cursor_program_control(hubp1, 868
869 hubp1_cursor_program_control(hubp1,
882 attr->attribute_flags.bits.INVERT_PIXEL_DATA, 870 attr->attribute_flags.bits.INVERT_PIXEL_DATA,
883 attr->color_format); 871 attr->color_format);
884} 872}
@@ -920,7 +908,8 @@ void hubp1_cursor_set_position(
920 cur_en = 0; /* not visible beyond left edge*/ 908 cur_en = 0; /* not visible beyond left edge*/
921 909
922 if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0) 910 if (cur_en && REG_READ(CURSOR_SURFACE_ADDRESS) == 0)
923 hubp1_cursor_set_attributes(hubp, &hubp->curs_attr); 911 hubp->funcs->set_cursor_attributes(hubp, &hubp->curs_attr);
912
924 REG_UPDATE(CURSOR_CONTROL, 913 REG_UPDATE(CURSOR_CONTROL,
925 CURSOR_ENABLE, cur_en); 914 CURSOR_ENABLE, cur_en);
926 915
diff --git a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
index a7834dd50716..17a5db0883b9 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/dcn10/dcn10_hubp.h
@@ -681,4 +681,11 @@ struct dcn_hubp_state {
681void hubp1_read_state(struct dcn10_hubp *hubp1, 681void hubp1_read_state(struct dcn10_hubp *hubp1,
682 struct dcn_hubp_state *s); 682 struct dcn_hubp_state *s);
683 683
684enum cursor_pitch hubp1_get_cursor_pitch(unsigned int pitch);
685
686bool hubp1_cursor_program_control(
687 struct dcn10_hubp *hubp1,
688 bool pixel_data_invert,
689 enum dc_cursor_color_format color_format);
690
684#endif 691#endif
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
index 49b12f602e79..6a4685f972e1 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/hubp.h
@@ -28,6 +28,21 @@
28 28
29#include "mem_input.h" 29#include "mem_input.h"
30 30
31
32enum cursor_pitch {
33 CURSOR_PITCH_64_PIXELS = 0,
34 CURSOR_PITCH_128_PIXELS,
35 CURSOR_PITCH_256_PIXELS
36};
37
38enum cursor_lines_per_chunk {
39 CURSOR_LINE_PER_CHUNK_2 = 1,
40 CURSOR_LINE_PER_CHUNK_4,
41 CURSOR_LINE_PER_CHUNK_8,
42 CURSOR_LINE_PER_CHUNK_16
43};
44
45
31struct hubp { 46struct hubp {
32 struct hubp_funcs *funcs; 47 struct hubp_funcs *funcs;
33 struct dc_context *ctx; 48 struct dc_context *ctx;