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authorGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-12-26 20:03:33 -0500
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2015-12-26 20:03:33 -0500
commit35ea984daccc60e6b9dd90074bb2f4f6b57e6309 (patch)
treecb6c0642539e6ab7e236949fc20cb0340ab09e19
parente59ac747946693b1356d576f843ce8ac1e283927 (diff)
parentc34c18195d30aa3b95f5ae1b4349875c45fdb8e4 (diff)
Merge tag 'iio-for-4.5b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23/iio into staging-next
Jonathan writes: Second set of IIO new drivers, functionality and cleanups for the 4.5 cycle. The big one here is the configfs support which has been a long time in the works but should allow for cleaner ways to do instantiation of those elements of IIO that aren't directly connected to specific hardware. Lots of cool new stuff we can use this for in the works! New core stuff (basically all configfs support related) * Configfs support - Core support (was waiting for a configfs patch that went in around 4.4rc2) - A little fixlet to add a configfs.h to contain a reference to the configfs_subsystem structure. * Some infrastructure to simplify handling of software based triggers (i.e. ones with no actual hardware associated with them) * A high resolution timer based trigger. This has been around for years but until the configfs support was ready we didn't have a sensible way of instantiating instances of it (the method used for the sysfs_trigger has never been really satisfactory) New Device Support * AMS iAQ Volatile Organic Compounds sensor support. * Freescale imx7d ADC driver * Maxim MAX30100 oximeter driver (note that for these devices most of the smart stuff will be in userspace - effectively they are just light sensors with some interesting led synchronization as far as the kernel is concerned). * Microchip mcp3421 support added to the mcp3422 driver. * TI adc124s021 support added to the adc128s052 driver. * TI ina219, inda226 power monitors. Note that there is an existing hwmon driver for these parts, the usecase is somewhat different so it is unclear at this point if the hwmon driver will eventually be replaced by a bridge from this driver. In the meantime the Kconfig dependencies should prevent both from being built. New driver functionality * us8152d power management support. Cleanups, fixups * Use list_for_each_entry_safe instead of list_for_each_safe with the entry bit coded longhand. * Select IRQ_WORK for IIO_DUMMY_EVGEN. This is a fix that somehow got lost when the driver was moved so lets do it again. * st-accel - drop an unused define. * vz89x, lidar - optimize i2c transactions by using a single i2c tranfers instead of multiple calls where supported (fall back to smbus calls as before if not). * Use dev_get_platdata() in staging drivers: tsl2x7x, adcs and frequency drivers instead of direct access to the structure element.
Diffstat
-rw-r--r--Documentation/ABI/testing/configfs-iio21
-rw-r--r--Documentation/devicetree/bindings/i2c/trivial-devices.txt1
-rw-r--r--Documentation/devicetree/bindings/iio/adc/imx7d-adc.txt22
-rw-r--r--Documentation/devicetree/bindings/iio/adc/mcp3422.txt3
-rw-r--r--Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt4
-rw-r--r--Documentation/devicetree/bindings/iio/health/max30100.txt21
-rw-r--r--Documentation/devicetree/bindings/iio/light/us5182d.txt11
-rw-r--r--Documentation/iio/iio_configfs.txt93
-rw-r--r--drivers/iio/Kconfig17
-rw-r--r--drivers/iio/Makefile3
-rw-r--r--drivers/iio/adc/Kconfig25
-rw-r--r--drivers/iio/adc/Makefile2
-rw-r--r--drivers/iio/adc/imx7d_adc.c609
-rw-r--r--drivers/iio/adc/ina2xx-adc.c745
-rw-r--r--drivers/iio/adc/mcp3422.c9
-rw-r--r--drivers/iio/adc/ti-adc128s052.c13
-rw-r--r--drivers/iio/chemical/Kconfig8
-rw-r--r--drivers/iio/chemical/Makefile1
-rw-r--r--drivers/iio/chemical/ams-iaq-core.c200
-rw-r--r--drivers/iio/chemical/vz89x.c66
-rw-r--r--drivers/iio/common/st_sensors/st_sensors_core.c3
-rw-r--r--drivers/iio/dummy/Kconfig3
-rw-r--r--drivers/iio/health/Kconfig21
-rw-r--r--drivers/iio/health/Makefile7
-rw-r--r--drivers/iio/health/max30100.c453
-rw-r--r--drivers/iio/industrialio-configfs.c51
-rw-r--r--drivers/iio/industrialio-sw-trigger.c184
-rw-r--r--drivers/iio/inkern.c6
-rw-r--r--drivers/iio/light/us5182d.c243
-rw-r--r--drivers/iio/proximity/pulsedlight-lidar-lite-v2.c95
-rw-r--r--drivers/iio/trigger/Kconfig10
-rw-r--r--drivers/iio/trigger/Makefile2
-rw-r--r--drivers/iio/trigger/iio-trig-hrtimer.c193
-rw-r--r--drivers/staging/iio/adc/ad7192.c2
-rw-r--r--drivers/staging/iio/adc/ad7280a.c2
-rw-r--r--drivers/staging/iio/adc/ad7816.c2
-rw-r--r--drivers/staging/iio/frequency/ad9832.c2
-rw-r--r--drivers/staging/iio/frequency/ad9834.c2
-rw-r--r--drivers/staging/iio/light/tsl2x7x_core.c2
-rw-r--r--include/linux/iio/configfs.h15
-rw-r--r--include/linux/iio/sw_trigger.h70
41 files changed, 3163 insertions, 79 deletions
diff --git a/Documentation/ABI/testing/configfs-iio b/Documentation/ABI/testing/configfs-iio
new file mode 100644
index 000000000000..2483756fccf5
--- /dev/null
+++ b/Documentation/ABI/testing/configfs-iio
@@ -0,0 +1,21 @@
1What: /config/iio
2Date: October 2015
3KernelVersion: 4.4
4Contact: linux-iio@vger.kernel.org
5Description:
6 This represents Industrial IO configuration entry point
7 directory. It contains sub-groups corresponding to IIO
8 objects.
9
10What: /config/iio/triggers
11Date: October 2015
12KernelVersion: 4.4
13Description:
14 Industrial IO software triggers directory.
15
16What: /config/iio/triggers/hrtimers
17Date: October 2015
18KernelVersion: 4.4
19Description:
20 High resolution timers directory. Creating a directory here
21 will result in creating a hrtimer trigger in the IIO subsystem.
diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
index c50cf13c852e..f6fec952d683 100644
--- a/Documentation/devicetree/bindings/i2c/trivial-devices.txt
+++ b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
@@ -20,6 +20,7 @@ adi,adt7476 +/-1C TDM Extended Temp Range I.C
20adi,adt7490 +/-1C TDM Extended Temp Range I.C 20adi,adt7490 +/-1C TDM Extended Temp Range I.C
21adi,adxl345 Three-Axis Digital Accelerometer 21adi,adxl345 Three-Axis Digital Accelerometer
22adi,adxl346 Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too) 22adi,adxl346 Three-Axis Digital Accelerometer (backward-compatibility value "adi,adxl345" must be listed too)
23ams,iaq-core AMS iAQ-Core VOC Sensor
23at,24c08 i2c serial eeprom (24cxx) 24at,24c08 i2c serial eeprom (24cxx)
24atmel,24c00 i2c serial eeprom (24cxx) 25atmel,24c00 i2c serial eeprom (24cxx)
25atmel,24c01 i2c serial eeprom (24cxx) 26atmel,24c01 i2c serial eeprom (24cxx)
diff --git a/Documentation/devicetree/bindings/iio/adc/imx7d-adc.txt b/Documentation/devicetree/bindings/iio/adc/imx7d-adc.txt
new file mode 100644
index 000000000000..5c184b940669
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/adc/imx7d-adc.txt
@@ -0,0 +1,22 @@
1Freescale imx7d ADC bindings
2
3The devicetree bindings are for the ADC driver written for
4imx7d SoC.
5
6Required properties:
7- compatible: Should be "fsl,imx7d-adc"
8- reg: Offset and length of the register set for the ADC device
9- interrupts: The interrupt number for the ADC device
10- clocks: The root clock of the ADC controller
11- clock-names: Must contain "adc", matching entry in the clocks property
12- vref-supply: The regulator supply ADC reference voltage
13
14Example:
15adc1: adc@30610000 {
16 compatible = "fsl,imx7d-adc";
17 reg = <0x30610000 0x10000>;
18 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
19 clocks = <&clks IMX7D_ADC_ROOT_CLK>;
20 clock-names = "adc";
21 vref-supply = <&reg_vcc_3v3_mcu>;
22};
diff --git a/Documentation/devicetree/bindings/iio/adc/mcp3422.txt b/Documentation/devicetree/bindings/iio/adc/mcp3422.txt
index 333139cc0bfb..dcae4ccfcc52 100644
--- a/Documentation/devicetree/bindings/iio/adc/mcp3422.txt
+++ b/Documentation/devicetree/bindings/iio/adc/mcp3422.txt
@@ -1,7 +1,8 @@
1* Microchip mcp3422/3/4/6/7/8 chip family (ADC) 1* Microchip mcp3421/2/3/4/6/7/8 chip family (ADC)
2 2
3Required properties: 3Required properties:
4 - compatible: Should be 4 - compatible: Should be
5 "microchip,mcp3421" or
5 "microchip,mcp3422" or 6 "microchip,mcp3422" or
6 "microchip,mcp3423" or 7 "microchip,mcp3423" or
7 "microchip,mcp3424" or 8 "microchip,mcp3424" or
diff --git a/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt b/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt
index 15ca6b47958e..daa2b2c29428 100644
--- a/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt
+++ b/Documentation/devicetree/bindings/iio/adc/ti-adc128s052.txt
@@ -1,7 +1,7 @@
1* Texas Instruments' ADC128S052 and ADC122S021 ADC chip 1* Texas Instruments' ADC128S052, ADC122S021 and ADC124S021 ADC chip
2 2
3Required properties: 3Required properties:
4 - compatible: Should be "ti,adc128s052" or "ti,adc122s021" 4 - compatible: Should be "ti,adc128s052", "ti,adc122s021" or "ti,adc124s021"
5 - reg: spi chip select number for the device 5 - reg: spi chip select number for the device
6 - vref-supply: The regulator supply for ADC reference voltage 6 - vref-supply: The regulator supply for ADC reference voltage
7 7
diff --git a/Documentation/devicetree/bindings/iio/health/max30100.txt b/Documentation/devicetree/bindings/iio/health/max30100.txt
new file mode 100644
index 000000000000..f6fbac66ad06
--- /dev/null
+++ b/Documentation/devicetree/bindings/iio/health/max30100.txt
@@ -0,0 +1,21 @@
1Maxim MAX30100 heart rate and pulse oximeter sensor
2
3* https://datasheets.maximintegrated.com/en/ds/MAX30100.pdf
4
5Required properties:
6 - compatible: must be "maxim,max30100"
7 - reg: the I2C address of the sensor
8 - interrupt-parent: should be the phandle for the interrupt controller
9 - interrupts: the sole interrupt generated by the device
10
11 Refer to interrupt-controller/interrupts.txt for generic
12 interrupt client node bindings.
13
14Example:
15
16max30100@057 {
17 compatible = "maxim,max30100";
18 reg = <57>;
19 interrupt-parent = <&gpio1>;
20 interrupts = <16 2>;
21};
diff --git a/Documentation/devicetree/bindings/iio/light/us5182d.txt b/Documentation/devicetree/bindings/iio/light/us5182d.txt
index 6f0a530144fd..a61979997f37 100644
--- a/Documentation/devicetree/bindings/iio/light/us5182d.txt
+++ b/Documentation/devicetree/bindings/iio/light/us5182d.txt
@@ -7,13 +7,24 @@ Required properties:
7Optional properties: 7Optional properties:
8- upisemi,glass-coef: glass attenuation factor - compensation factor of 8- upisemi,glass-coef: glass attenuation factor - compensation factor of
9 resolution 1000 for material transmittance. 9 resolution 1000 for material transmittance.
10
10- upisemi,dark-ths: array of 8 elements containing 16-bit thresholds (adc 11- upisemi,dark-ths: array of 8 elements containing 16-bit thresholds (adc
11 counts) corresponding to every scale. 12 counts) corresponding to every scale.
13
12- upisemi,upper-dark-gain: 8-bit dark gain compensation factor(4 int and 4 14- upisemi,upper-dark-gain: 8-bit dark gain compensation factor(4 int and 4
13 fractional bits - Q4.4) applied when light > threshold 15 fractional bits - Q4.4) applied when light > threshold
16
14- upisemi,lower-dark-gain: 8-bit dark gain compensation factor(4 int and 4 17- upisemi,lower-dark-gain: 8-bit dark gain compensation factor(4 int and 4
15 fractional bits - Q4.4) applied when light < threshold 18 fractional bits - Q4.4) applied when light < threshold
16 19
20- upisemi,continuous: This chip has two power modes: one-shot (chip takes one
21 measurement and then shuts itself down) and continuous (
22 chip takes continuous measurements). The one-shot mode is
23 more power-friendly but the continuous mode may be more
24 reliable. If this property is specified the continuous
25 mode will be used instead of the default one-shot one for
26 raw reads.
27
17If the optional properties are not specified these factors will default to the 28If the optional properties are not specified these factors will default to the
18values in the below example. 29values in the below example.
19The glass-coef defaults to no compensation for the covering material. 30The glass-coef defaults to no compensation for the covering material.
diff --git a/Documentation/iio/iio_configfs.txt b/Documentation/iio/iio_configfs.txt
new file mode 100644
index 000000000000..f0add35cd52e
--- /dev/null
+++ b/Documentation/iio/iio_configfs.txt
@@ -0,0 +1,93 @@
1Industrial IIO configfs support
2
31. Overview
4
5Configfs is a filesystem-based manager of kernel objects. IIO uses some
6objects that could be easily configured using configfs (e.g.: devices,
7triggers).
8
9See Documentation/filesystems/configfs/configfs.txt for more information
10about how configfs works.
11
122. Usage
13
14In order to use configfs support in IIO we need to select it at compile
15time via CONFIG_IIO_CONFIGFS config option.
16
17Then, mount the configfs filesystem (usually under /config directory):
18
19$ mkdir /config
20$ mount -t configfs none /config
21
22At this point, all default IIO groups will be created and can be accessed
23under /config/iio. Next chapters will describe available IIO configuration
24objects.
25
263. Software triggers
27
28One of the IIO default configfs groups is the "triggers" group. It is
29automagically accessible when the configfs is mounted and can be found
30under /config/iio/triggers.
31
32IIO software triggers implementation offers support for creating multiple
33trigger types. A new trigger type is usually implemented as a separate
34kernel module following the interface in include/linux/iio/sw_trigger.h:
35
36/*
37 * drivers/iio/trigger/iio-trig-sample.c
38 * sample kernel module implementing a new trigger type
39 */
40#include <linux/iio/sw_trigger.h>
41
42
43static struct iio_sw_trigger *iio_trig_sample_probe(const char *name)
44{
45 /*
46 * This allocates and registers an IIO trigger plus other
47 * trigger type specific initialization.
48 */
49}
50
51static int iio_trig_hrtimer_remove(struct iio_sw_trigger *swt)
52{
53 /*
54 * This undoes the actions in iio_trig_sample_probe
55 */
56}
57
58static const struct iio_sw_trigger_ops iio_trig_sample_ops = {
59 .probe = iio_trig_sample_probe,
60 .remove = iio_trig_sample_remove,
61};
62
63static struct iio_sw_trigger_type iio_trig_sample = {
64 .name = "trig-sample",
65 .owner = THIS_MODULE,
66 .ops = &iio_trig_sample_ops,
67};
68
69module_iio_sw_trigger_driver(iio_trig_sample);
70
71Each trigger type has its own directory under /config/iio/triggers. Loading
72iio-trig-sample module will create 'trig-sample' trigger type directory
73/config/iio/triggers/trig-sample.
74
75We support the following interrupt sources (trigger types):
76 * hrtimer, uses high resolution timers as interrupt source
77
783.1 Hrtimer triggers creation and destruction
79
80Loading iio-trig-hrtimer module will register hrtimer trigger types allowing
81users to create hrtimer triggers under /config/iio/triggers/hrtimer.
82
83e.g:
84
85$ mkdir /config/triggers/hrtimer/instance1
86$ rmdir /config/triggers/hrtimer/instance1
87
88Each trigger can have one or more attributes specific to the trigger type.
89
903.2 "hrtimer" trigger types attributes
91
92"hrtimer" trigger type doesn't have any configurable attribute from /config dir.
93It does introduce the sampling_frequency attribute to trigger directory.
diff --git a/drivers/iio/Kconfig b/drivers/iio/Kconfig
index 6b8c77c97d40..505e921f0b19 100644
--- a/drivers/iio/Kconfig
+++ b/drivers/iio/Kconfig
@@ -22,6 +22,14 @@ if IIO_BUFFER
22 source "drivers/iio/buffer/Kconfig" 22 source "drivers/iio/buffer/Kconfig"
23endif # IIO_BUFFER 23endif # IIO_BUFFER
24 24
25config IIO_CONFIGFS
26 tristate "Enable IIO configuration via configfs"
27 select CONFIGFS_FS
28 help
29 This allows configuring various IIO bits through configfs
30 (e.g. software triggers). For more info see
31 Documentation/iio/iio_configfs.txt.
32
25config IIO_TRIGGER 33config IIO_TRIGGER
26 bool "Enable triggered sampling support" 34 bool "Enable triggered sampling support"
27 help 35 help
@@ -38,6 +46,14 @@ config IIO_CONSUMERS_PER_TRIGGER
38 This value controls the maximum number of consumers that a 46 This value controls the maximum number of consumers that a
39 given trigger may handle. Default is 2. 47 given trigger may handle. Default is 2.
40 48
49config IIO_SW_TRIGGER
50 tristate "Enable software triggers support"
51 select IIO_CONFIGFS
52 help
53 Provides IIO core support for software triggers. A software
54 trigger can be created via configfs or directly by a driver
55 using the API provided.
56
41config IIO_TRIGGERED_EVENT 57config IIO_TRIGGERED_EVENT
42 tristate 58 tristate
43 select IIO_TRIGGER 59 select IIO_TRIGGER
@@ -53,6 +69,7 @@ source "drivers/iio/dac/Kconfig"
53source "drivers/iio/dummy/Kconfig" 69source "drivers/iio/dummy/Kconfig"
54source "drivers/iio/frequency/Kconfig" 70source "drivers/iio/frequency/Kconfig"
55source "drivers/iio/gyro/Kconfig" 71source "drivers/iio/gyro/Kconfig"
72source "drivers/iio/health/Kconfig"
56source "drivers/iio/humidity/Kconfig" 73source "drivers/iio/humidity/Kconfig"
57source "drivers/iio/imu/Kconfig" 74source "drivers/iio/imu/Kconfig"
58source "drivers/iio/light/Kconfig" 75source "drivers/iio/light/Kconfig"
diff --git a/drivers/iio/Makefile b/drivers/iio/Makefile
index 6769f2f43e86..20f649073462 100644
--- a/drivers/iio/Makefile
+++ b/drivers/iio/Makefile
@@ -7,6 +7,8 @@ industrialio-y := industrialio-core.o industrialio-event.o inkern.o
7industrialio-$(CONFIG_IIO_BUFFER) += industrialio-buffer.o 7industrialio-$(CONFIG_IIO_BUFFER) += industrialio-buffer.o
8industrialio-$(CONFIG_IIO_TRIGGER) += industrialio-trigger.o 8industrialio-$(CONFIG_IIO_TRIGGER) += industrialio-trigger.o
9 9
10obj-$(CONFIG_IIO_CONFIGFS) += industrialio-configfs.o
11obj-$(CONFIG_IIO_SW_TRIGGER) += industrialio-sw-trigger.o
10obj-$(CONFIG_IIO_TRIGGERED_EVENT) += industrialio-triggered-event.o 12obj-$(CONFIG_IIO_TRIGGERED_EVENT) += industrialio-triggered-event.o
11 13
12obj-y += accel/ 14obj-y += accel/
@@ -19,6 +21,7 @@ obj-y += dac/
19obj-y += dummy/ 21obj-y += dummy/
20obj-y += gyro/ 22obj-y += gyro/
21obj-y += frequency/ 23obj-y += frequency/
24obj-y += health/
22obj-y += humidity/ 25obj-y += humidity/
23obj-y += imu/ 26obj-y += imu/
24obj-y += light/ 27obj-y += light/
diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig
index 9162dfefff30..605ff42c4631 100644
--- a/drivers/iio/adc/Kconfig
+++ b/drivers/iio/adc/Kconfig
@@ -194,6 +194,25 @@ config HI8435
194 This driver can also be built as a module. If so, the module will be 194 This driver can also be built as a module. If so, the module will be
195 called hi8435. 195 called hi8435.
196 196
197config INA2XX_ADC
198 tristate "Texas Instruments INA2xx Power Monitors IIO driver"
199 depends on I2C && !SENSORS_INA2XX
200 select REGMAP_I2C
201 select IIO_BUFFER
202 select IIO_KFIFO_BUF
203 help
204 Say yes here to build support for TI INA2xx family of Power Monitors.
205 This driver is mutually exclusive with the HWMON version.
206
207config IMX7D_ADC
208 tristate "IMX7D ADC driver"
209 depends on ARCH_MXC || COMPILE_TEST
210 help
211 Say yes here to build support for IMX7D ADC.
212
213 This driver can also be built as a module. If so, the module will be
214 called imx7d_adc.
215
197config LP8788_ADC 216config LP8788_ADC
198 tristate "LP8788 ADC driver" 217 tristate "LP8788 ADC driver"
199 depends on MFD_LP8788 218 depends on MFD_LP8788
@@ -332,11 +351,11 @@ config TI_ADC081C
332 called ti-adc081c. 351 called ti-adc081c.
333 352
334config TI_ADC128S052 353config TI_ADC128S052
335 tristate "Texas Instruments ADC128S052/ADC122S021" 354 tristate "Texas Instruments ADC128S052/ADC122S021/ADC124S021"
336 depends on SPI 355 depends on SPI
337 help 356 help
338 If you say yes here you get support for Texas Instruments ADC128S052 357 If you say yes here you get support for Texas Instruments ADC128S052,
339 and ADC122S021 chips. 358 ADC122S021 and ADC124S021 chips.
340 359
341 This driver can also be built as a module. If so, the module will be 360 This driver can also be built as a module. If so, the module will be
342 called ti-adc128s052. 361 called ti-adc128s052.
diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile
index 91a65bf11c58..6435780e9b71 100644
--- a/drivers/iio/adc/Makefile
+++ b/drivers/iio/adc/Makefile
@@ -20,6 +20,8 @@ obj-$(CONFIG_CC10001_ADC) += cc10001_adc.o
20obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o 20obj-$(CONFIG_DA9150_GPADC) += da9150-gpadc.o
21obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o 21obj-$(CONFIG_EXYNOS_ADC) += exynos_adc.o
22obj-$(CONFIG_HI8435) += hi8435.o 22obj-$(CONFIG_HI8435) += hi8435.o
23obj-$(CONFIG_IMX7D_ADC) += imx7d_adc.o
24obj-$(CONFIG_INA2XX_ADC) += ina2xx-adc.o
23obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o 25obj-$(CONFIG_LP8788_ADC) += lp8788_adc.o
24obj-$(CONFIG_MAX1027) += max1027.o 26obj-$(CONFIG_MAX1027) += max1027.o
25obj-$(CONFIG_MAX1363) += max1363.o 27obj-$(CONFIG_MAX1363) += max1363.o
diff --git a/drivers/iio/adc/imx7d_adc.c b/drivers/iio/adc/imx7d_adc.c
new file mode 100644
index 000000000000..e2241ee94783
--- /dev/null
+++ b/drivers/iio/adc/imx7d_adc.c
@@ -0,0 +1,609 @@
1/*
2 * Freescale i.MX7D ADC driver
3 *
4 * Copyright (C) 2015 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 */
11
12#include <linux/clk.h>
13#include <linux/completion.h>
14#include <linux/err.h>
15#include <linux/interrupt.h>
16#include <linux/io.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/platform_device.h>
20#include <linux/regulator/consumer.h>
21
22#include <linux/iio/iio.h>
23#include <linux/iio/driver.h>
24#include <linux/iio/sysfs.h>
25
26/* ADC register */
27#define IMX7D_REG_ADC_CH_A_CFG1 0x00
28#define IMX7D_REG_ADC_CH_A_CFG2 0x10
29#define IMX7D_REG_ADC_CH_B_CFG1 0x20
30#define IMX7D_REG_ADC_CH_B_CFG2 0x30
31#define IMX7D_REG_ADC_CH_C_CFG1 0x40
32#define IMX7D_REG_ADC_CH_C_CFG2 0x50
33#define IMX7D_REG_ADC_CH_D_CFG1 0x60
34#define IMX7D_REG_ADC_CH_D_CFG2 0x70
35#define IMX7D_REG_ADC_CH_SW_CFG 0x80
36#define IMX7D_REG_ADC_TIMER_UNIT 0x90
37#define IMX7D_REG_ADC_DMA_FIFO 0xa0
38#define IMX7D_REG_ADC_FIFO_STATUS 0xb0
39#define IMX7D_REG_ADC_INT_SIG_EN 0xc0
40#define IMX7D_REG_ADC_INT_EN 0xd0
41#define IMX7D_REG_ADC_INT_STATUS 0xe0
42#define IMX7D_REG_ADC_CHA_B_CNV_RSLT 0xf0
43#define IMX7D_REG_ADC_CHC_D_CNV_RSLT 0x100
44#define IMX7D_REG_ADC_CH_SW_CNV_RSLT 0x110
45#define IMX7D_REG_ADC_DMA_FIFO_DAT 0x120
46#define IMX7D_REG_ADC_ADC_CFG 0x130
47
48#define IMX7D_REG_ADC_CHANNEL_CFG2_BASE 0x10
49#define IMX7D_EACH_CHANNEL_REG_OFFSET 0x20
50
51#define IMX7D_REG_ADC_CH_CFG1_CHANNEL_EN (0x1 << 31)
52#define IMX7D_REG_ADC_CH_CFG1_CHANNEL_SINGLE BIT(30)
53#define IMX7D_REG_ADC_CH_CFG1_CHANNEL_AVG_EN BIT(29)
54#define IMX7D_REG_ADC_CH_CFG1_CHANNEL_SEL(x) ((x) << 24)
55
56#define IMX7D_REG_ADC_CH_CFG2_AVG_NUM_4 (0x0 << 12)
57#define IMX7D_REG_ADC_CH_CFG2_AVG_NUM_8 (0x1 << 12)
58#define IMX7D_REG_ADC_CH_CFG2_AVG_NUM_16 (0x2 << 12)
59#define IMX7D_REG_ADC_CH_CFG2_AVG_NUM_32 (0x3 << 12)
60
61#define IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_4 (0x0 << 29)
62#define IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_8 (0x1 << 29)
63#define IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_16 (0x2 << 29)
64#define IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_32 (0x3 << 29)
65#define IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_64 (0x4 << 29)
66#define IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_128 (0x5 << 29)
67
68#define IMX7D_REG_ADC_ADC_CFG_ADC_CLK_DOWN BIT(31)
69#define IMX7D_REG_ADC_ADC_CFG_ADC_POWER_DOWN BIT(1)
70#define IMX7D_REG_ADC_ADC_CFG_ADC_EN BIT(0)
71
72#define IMX7D_REG_ADC_INT_CHA_COV_INT_EN BIT(8)
73#define IMX7D_REG_ADC_INT_CHB_COV_INT_EN BIT(9)
74#define IMX7D_REG_ADC_INT_CHC_COV_INT_EN BIT(10)
75#define IMX7D_REG_ADC_INT_CHD_COV_INT_EN BIT(11)
76#define IMX7D_REG_ADC_INT_CHANNEL_INT_EN \
77 (IMX7D_REG_ADC_INT_CHA_COV_INT_EN | \
78 IMX7D_REG_ADC_INT_CHB_COV_INT_EN | \
79 IMX7D_REG_ADC_INT_CHC_COV_INT_EN | \
80 IMX7D_REG_ADC_INT_CHD_COV_INT_EN)
81#define IMX7D_REG_ADC_INT_STATUS_CHANNEL_INT_STATUS 0xf00
82#define IMX7D_REG_ADC_INT_STATUS_CHANNEL_CONV_TIME_OUT 0xf0000
83
84#define IMX7D_ADC_TIMEOUT msecs_to_jiffies(100)
85
86enum imx7d_adc_clk_pre_div {
87 IMX7D_ADC_ANALOG_CLK_PRE_DIV_4,
88 IMX7D_ADC_ANALOG_CLK_PRE_DIV_8,
89 IMX7D_ADC_ANALOG_CLK_PRE_DIV_16,
90 IMX7D_ADC_ANALOG_CLK_PRE_DIV_32,
91 IMX7D_ADC_ANALOG_CLK_PRE_DIV_64,
92 IMX7D_ADC_ANALOG_CLK_PRE_DIV_128,
93};
94
95enum imx7d_adc_average_num {
96 IMX7D_ADC_AVERAGE_NUM_4,
97 IMX7D_ADC_AVERAGE_NUM_8,
98 IMX7D_ADC_AVERAGE_NUM_16,
99 IMX7D_ADC_AVERAGE_NUM_32,
100};
101
102struct imx7d_adc_feature {
103 enum imx7d_adc_clk_pre_div clk_pre_div;
104 enum imx7d_adc_average_num avg_num;
105
106 u32 core_time_unit; /* impact the sample rate */
107
108 bool average_en;
109};
110
111struct imx7d_adc {
112 struct device *dev;
113 void __iomem *regs;
114 struct clk *clk;
115
116 u32 vref_uv;
117 u32 value;
118 u32 channel;
119 u32 pre_div_num;
120
121 struct regulator *vref;
122 struct imx7d_adc_feature adc_feature;
123
124 struct completion completion;
125};
126
127struct imx7d_adc_analogue_core_clk {
128 u32 pre_div;
129 u32 reg_config;
130};
131
132#define IMX7D_ADC_ANALOGUE_CLK_CONFIG(_pre_div, _reg_conf) { \
133 .pre_div = (_pre_div), \
134 .reg_config = (_reg_conf), \
135}
136
137static const struct imx7d_adc_analogue_core_clk imx7d_adc_analogue_clk[] = {
138 IMX7D_ADC_ANALOGUE_CLK_CONFIG(4, IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_4),
139 IMX7D_ADC_ANALOGUE_CLK_CONFIG(8, IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_8),
140 IMX7D_ADC_ANALOGUE_CLK_CONFIG(16, IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_16),
141 IMX7D_ADC_ANALOGUE_CLK_CONFIG(32, IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_32),
142 IMX7D_ADC_ANALOGUE_CLK_CONFIG(64, IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_64),
143 IMX7D_ADC_ANALOGUE_CLK_CONFIG(128, IMX7D_REG_ADC_TIMER_UNIT_PRE_DIV_128),
144};
145
146#define IMX7D_ADC_CHAN(_idx) { \
147 .type = IIO_VOLTAGE, \
148 .indexed = 1, \
149 .channel = (_idx), \
150 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
151 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \
152 BIT(IIO_CHAN_INFO_SAMP_FREQ), \
153}
154
155static const struct iio_chan_spec imx7d_adc_iio_channels[] = {
156 IMX7D_ADC_CHAN(0),
157 IMX7D_ADC_CHAN(1),
158 IMX7D_ADC_CHAN(2),
159 IMX7D_ADC_CHAN(3),
160 IMX7D_ADC_CHAN(4),
161 IMX7D_ADC_CHAN(5),
162 IMX7D_ADC_CHAN(6),
163 IMX7D_ADC_CHAN(7),
164 IMX7D_ADC_CHAN(8),
165 IMX7D_ADC_CHAN(9),
166 IMX7D_ADC_CHAN(10),
167 IMX7D_ADC_CHAN(11),
168 IMX7D_ADC_CHAN(12),
169 IMX7D_ADC_CHAN(13),
170 IMX7D_ADC_CHAN(14),
171 IMX7D_ADC_CHAN(15),
172};
173
174static const u32 imx7d_adc_average_num[] = {
175 IMX7D_REG_ADC_CH_CFG2_AVG_NUM_4,
176 IMX7D_REG_ADC_CH_CFG2_AVG_NUM_8,
177 IMX7D_REG_ADC_CH_CFG2_AVG_NUM_16,
178 IMX7D_REG_ADC_CH_CFG2_AVG_NUM_32,
179};
180
181static void imx7d_adc_feature_config(struct imx7d_adc *info)
182{
183 info->adc_feature.clk_pre_div = IMX7D_ADC_ANALOG_CLK_PRE_DIV_4;
184 info->adc_feature.avg_num = IMX7D_ADC_AVERAGE_NUM_32;
185 info->adc_feature.core_time_unit = 1;
186 info->adc_feature.average_en = true;
187}
188
189static void imx7d_adc_sample_rate_set(struct imx7d_adc *info)
190{
191 struct imx7d_adc_feature *adc_feature = &info->adc_feature;
192 struct imx7d_adc_analogue_core_clk adc_analogure_clk;
193 u32 i;
194 u32 tmp_cfg1;
195 u32 sample_rate = 0;
196
197 /*
198 * Before sample set, disable channel A,B,C,D. Here we
199 * clear the bit 31 of register REG_ADC_CH_A\B\C\D_CFG1.
200 */
201 for (i = 0; i < 4; i++) {
202 tmp_cfg1 =
203 readl(info->regs + i * IMX7D_EACH_CHANNEL_REG_OFFSET);
204 tmp_cfg1 &= ~IMX7D_REG_ADC_CH_CFG1_CHANNEL_EN;
205 writel(tmp_cfg1,
206 info->regs + i * IMX7D_EACH_CHANNEL_REG_OFFSET);
207 }
208
209 adc_analogure_clk = imx7d_adc_analogue_clk[adc_feature->clk_pre_div];
210 sample_rate |= adc_analogure_clk.reg_config;
211 info->pre_div_num = adc_analogure_clk.pre_div;
212
213 sample_rate |= adc_feature->core_time_unit;
214 writel(sample_rate, info->regs + IMX7D_REG_ADC_TIMER_UNIT);
215}
216
217static void imx7d_adc_hw_init(struct imx7d_adc *info)
218{
219 u32 cfg;
220
221 /* power up and enable adc analogue core */
222 cfg = readl(info->regs + IMX7D_REG_ADC_ADC_CFG);
223 cfg &= ~(IMX7D_REG_ADC_ADC_CFG_ADC_CLK_DOWN |
224 IMX7D_REG_ADC_ADC_CFG_ADC_POWER_DOWN);
225 cfg |= IMX7D_REG_ADC_ADC_CFG_ADC_EN;
226 writel(cfg, info->regs + IMX7D_REG_ADC_ADC_CFG);
227
228 /* enable channel A,B,C,D interrupt */
229 writel(IMX7D_REG_ADC_INT_CHANNEL_INT_EN,
230 info->regs + IMX7D_REG_ADC_INT_SIG_EN);
231 writel(IMX7D_REG_ADC_INT_CHANNEL_INT_EN,
232 info->regs + IMX7D_REG_ADC_INT_EN);
233
234 imx7d_adc_sample_rate_set(info);
235}
236
237static void imx7d_adc_channel_set(struct imx7d_adc *info)
238{
239 u32 cfg1 = 0;
240 u32 cfg2;
241 u32 channel;
242
243 channel = info->channel;
244
245 /* the channel choose single conversion, and enable average mode */
246 cfg1 |= (IMX7D_REG_ADC_CH_CFG1_CHANNEL_EN |
247 IMX7D_REG_ADC_CH_CFG1_CHANNEL_SINGLE);
248 if (info->adc_feature.average_en)
249 cfg1 |= IMX7D_REG_ADC_CH_CFG1_CHANNEL_AVG_EN;
250
251 /*
252 * physical channel 0 chose logical channel A
253 * physical channel 1 chose logical channel B
254 * physical channel 2 chose logical channel C
255 * physical channel 3 chose logical channel D
256 */
257 cfg1 |= IMX7D_REG_ADC_CH_CFG1_CHANNEL_SEL(channel);
258
259 /*
260 * read register REG_ADC_CH_A\B\C\D_CFG2, according to the
261 * channel chosen
262 */
263 cfg2 = readl(info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel +
264 IMX7D_REG_ADC_CHANNEL_CFG2_BASE);
265
266 cfg2 |= imx7d_adc_average_num[info->adc_feature.avg_num];
267
268 /*
269 * write the register REG_ADC_CH_A\B\C\D_CFG2, according to
270 * the channel chosen
271 */
272 writel(cfg2, info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel +
273 IMX7D_REG_ADC_CHANNEL_CFG2_BASE);
274 writel(cfg1, info->regs + IMX7D_EACH_CHANNEL_REG_OFFSET * channel);
275}
276
277static u32 imx7d_adc_get_sample_rate(struct imx7d_adc *info)
278{
279 /* input clock is always 24MHz */
280 u32 input_clk = 24000000;
281 u32 analogue_core_clk;
282 u32 core_time_unit = info->adc_feature.core_time_unit;
283 u32 tmp;
284
285 analogue_core_clk = input_clk / info->pre_div_num;
286 tmp = (core_time_unit + 1) * 6;
287
288 return analogue_core_clk / tmp;
289}
290
291static int imx7d_adc_read_raw(struct iio_dev *indio_dev,
292 struct iio_chan_spec const *chan,
293 int *val,
294 int *val2,
295 long mask)
296{
297 struct imx7d_adc *info = iio_priv(indio_dev);
298
299 u32 channel;
300 long ret;
301
302 switch (mask) {
303 case IIO_CHAN_INFO_RAW:
304 mutex_lock(&indio_dev->mlock);
305 reinit_completion(&info->completion);
306
307 channel = chan->channel & 0x03;
308 info->channel = channel;
309 imx7d_adc_channel_set(info);
310
311 ret = wait_for_completion_interruptible_timeout
312 (&info->completion, IMX7D_ADC_TIMEOUT);
313 if (ret == 0) {
314 mutex_unlock(&indio_dev->mlock);
315 return -ETIMEDOUT;
316 }
317 if (ret < 0) {
318 mutex_unlock(&indio_dev->mlock);
319 return ret;
320 }
321
322 *val = info->value;
323 mutex_unlock(&indio_dev->mlock);
324 return IIO_VAL_INT;
325
326 case IIO_CHAN_INFO_SCALE:
327 info->vref_uv = regulator_get_voltage(info->vref);
328 *val = info->vref_uv / 1000;
329 *val2 = 12;
330 return IIO_VAL_FRACTIONAL_LOG2;
331
332 case IIO_CHAN_INFO_SAMP_FREQ:
333 *val = imx7d_adc_get_sample_rate(info);
334 return IIO_VAL_INT;
335
336 default:
337 return -EINVAL;
338 }
339}
340
341static int imx7d_adc_read_data(struct imx7d_adc *info)
342{
343 u32 channel;
344 u32 value;
345
346 channel = info->channel & 0x03;
347
348 /*
349 * channel A and B conversion result share one register,
350 * bit[27~16] is the channel B conversion result,
351 * bit[11~0] is the channel A conversion result.
352 * channel C and D is the same.
353 */
354 if (channel < 2)
355 value = readl(info->regs + IMX7D_REG_ADC_CHA_B_CNV_RSLT);
356 else
357 value = readl(info->regs + IMX7D_REG_ADC_CHC_D_CNV_RSLT);
358 if (channel & 0x1) /* channel B or D */
359 value = (value >> 16) & 0xFFF;
360 else /* channel A or C */
361 value &= 0xFFF;
362
363 return value;
364}
365
366static irqreturn_t imx7d_adc_isr(int irq, void *dev_id)
367{
368 struct imx7d_adc *info = (struct imx7d_adc *)dev_id;
369 int status;
370
371 status = readl(info->regs + IMX7D_REG_ADC_INT_STATUS);
372 if (status & IMX7D_REG_ADC_INT_STATUS_CHANNEL_INT_STATUS) {
373 info->value = imx7d_adc_read_data(info);
374 complete(&info->completion);
375
376 /*
377 * The register IMX7D_REG_ADC_INT_STATUS can't clear
378 * itself after read operation, need software to write
379 * 0 to the related bit. Here we clear the channel A/B/C/D
380 * conversion finished flag.
381 */
382 status &= ~IMX7D_REG_ADC_INT_STATUS_CHANNEL_INT_STATUS;
383 writel(status, info->regs + IMX7D_REG_ADC_INT_STATUS);
384 }
385
386 /*
387 * If the channel A/B/C/D conversion timeout, report it and clear these
388 * timeout flags.
389 */
390 if (status & IMX7D_REG_ADC_INT_STATUS_CHANNEL_CONV_TIME_OUT) {
391 pr_err("%s: ADC got conversion time out interrupt: 0x%08x\n",
392 dev_name(info->dev), status);
393 status &= ~IMX7D_REG_ADC_INT_STATUS_CHANNEL_CONV_TIME_OUT;
394 writel(status, info->regs + IMX7D_REG_ADC_INT_STATUS);
395 }
396
397 return IRQ_HANDLED;
398}
399
400static int imx7d_adc_reg_access(struct iio_dev *indio_dev,
401 unsigned reg, unsigned writeval,
402 unsigned *readval)
403{
404 struct imx7d_adc *info = iio_priv(indio_dev);
405
406 if (!readval || reg % 4 || reg > IMX7D_REG_ADC_ADC_CFG)
407 return -EINVAL;
408
409 *readval = readl(info->regs + reg);
410
411 return 0;
412}
413
414static const struct iio_info imx7d_adc_iio_info = {
415 .driver_module = THIS_MODULE,
416 .read_raw = &imx7d_adc_read_raw,
417 .debugfs_reg_access = &imx7d_adc_reg_access,
418};
419
420static const struct of_device_id imx7d_adc_match[] = {
421 { .compatible = "fsl,imx7d-adc", },
422 { /* sentinel */ }
423};
424MODULE_DEVICE_TABLE(of, imx7d_adc_match);
425
426static void imx7d_adc_power_down(struct imx7d_adc *info)
427{
428 u32 adc_cfg;
429
430 adc_cfg = readl(info->regs + IMX7D_REG_ADC_ADC_CFG);
431 adc_cfg |= IMX7D_REG_ADC_ADC_CFG_ADC_CLK_DOWN |
432 IMX7D_REG_ADC_ADC_CFG_ADC_POWER_DOWN;
433 adc_cfg &= ~IMX7D_REG_ADC_ADC_CFG_ADC_EN;
434 writel(adc_cfg, info->regs + IMX7D_REG_ADC_ADC_CFG);
435}
436
437static int imx7d_adc_probe(struct platform_device *pdev)
438{
439 struct imx7d_adc *info;
440 struct iio_dev *indio_dev;
441 struct resource *mem;
442 int irq;
443 int ret;
444
445 indio_dev = devm_iio_device_alloc(&pdev->dev, sizeof(*info));
446 if (!indio_dev) {
447 dev_err(&pdev->dev, "Failed allocating iio device\n");
448 return -ENOMEM;
449 }
450
451 info = iio_priv(indio_dev);
452 info->dev = &pdev->dev;
453
454 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
455 info->regs = devm_ioremap_resource(&pdev->dev, mem);
456 if (IS_ERR(info->regs)) {
457 ret = PTR_ERR(info->regs);
458 dev_err(&pdev->dev,
459 "Failed to remap adc memory, err = %d\n", ret);
460 return ret;
461 }
462
463 irq = platform_get_irq(pdev, 0);
464 if (irq < 0) {
465 dev_err(&pdev->dev, "No irq resource?\n");
466 return irq;
467 }
468
469 info->clk = devm_clk_get(&pdev->dev, "adc");
470 if (IS_ERR(info->clk)) {
471 ret = PTR_ERR(info->clk);
472 dev_err(&pdev->dev, "Failed getting clock, err = %d\n", ret);
473 return ret;
474 }
475
476 info->vref = devm_regulator_get(&pdev->dev, "vref");
477 if (IS_ERR(info->vref)) {
478 ret = PTR_ERR(info->vref);
479 dev_err(&pdev->dev,
480 "Failed getting reference voltage, err = %d\n", ret);
481 return ret;
482 }
483
484 ret = regulator_enable(info->vref);
485 if (ret) {
486 dev_err(&pdev->dev,
487 "Can't enable adc reference top voltage, err = %d\n",
488 ret);
489 return ret;
490 }
491
492 platform_set_drvdata(pdev, indio_dev);
493
494 init_completion(&info->completion);
495
496 indio_dev->name = dev_name(&pdev->dev);
497 indio_dev->dev.parent = &pdev->dev;
498 indio_dev->info = &imx7d_adc_iio_info;
499 indio_dev->modes = INDIO_DIRECT_MODE;
500 indio_dev->channels = imx7d_adc_iio_channels;
501 indio_dev->num_channels = ARRAY_SIZE(imx7d_adc_iio_channels);
502
503 ret = clk_prepare_enable(info->clk);
504 if (ret) {
505 dev_err(&pdev->dev,
506 "Could not prepare or enable the clock.\n");
507 goto error_adc_clk_enable;
508 }
509
510 ret = devm_request_irq(info->dev, irq,
511 imx7d_adc_isr, 0,
512 dev_name(&pdev->dev), info);
513 if (ret < 0) {
514 dev_err(&pdev->dev, "Failed requesting irq, irq = %d\n", irq);
515 goto error_iio_device_register;
516 }
517
518 imx7d_adc_feature_config(info);
519 imx7d_adc_hw_init(info);
520
521 ret = iio_device_register(indio_dev);
522 if (ret) {
523 imx7d_adc_power_down(info);
524 dev_err(&pdev->dev, "Couldn't register the device.\n");
525 goto error_iio_device_register;
526 }
527
528 return 0;
529
530error_iio_device_register:
531 clk_disable_unprepare(info->clk);
532error_adc_clk_enable:
533 regulator_disable(info->vref);
534
535 return ret;
536}
537
538static int imx7d_adc_remove(struct platform_device *pdev)
539{
540 struct iio_dev *indio_dev = platform_get_drvdata(pdev);
541 struct imx7d_adc *info = iio_priv(indio_dev);
542
543 iio_device_unregister(indio_dev);
544
545 imx7d_adc_power_down(info);
546
547 clk_disable_unprepare(info->clk);
548 regulator_disable(info->vref);
549
550 return 0;
551}
552
553static int __maybe_unused imx7d_adc_suspend(struct device *dev)
554{
555 struct iio_dev *indio_dev = dev_get_drvdata(dev);
556 struct imx7d_adc *info = iio_priv(indio_dev);
557
558 imx7d_adc_power_down(info);
559
560 clk_disable_unprepare(info->clk);
561 regulator_disable(info->vref);
562
563 return 0;
564}
565
566static int __maybe_unused imx7d_adc_resume(struct device *dev)
567{
568 struct iio_dev *indio_dev = dev_get_drvdata(dev);
569 struct imx7d_adc *info = iio_priv(indio_dev);
570 int ret;
571
572 ret = regulator_enable(info->vref);
573 if (ret) {
574 dev_err(info->dev,
575 "Can't enable adc reference top voltage, err = %d\n",
576 ret);
577 return ret;
578 }
579
580 ret = clk_prepare_enable(info->clk);
581 if (ret) {
582 dev_err(info->dev,
583 "Could not prepare or enable clock.\n");
584 regulator_disable(info->vref);
585 return ret;
586 }
587
588 imx7d_adc_hw_init(info);
589
590 return 0;
591}
592
593static SIMPLE_DEV_PM_OPS(imx7d_adc_pm_ops, imx7d_adc_suspend, imx7d_adc_resume);
594
595static struct platform_driver imx7d_adc_driver = {
596 .probe = imx7d_adc_probe,
597 .remove = imx7d_adc_remove,
598 .driver = {
599 .name = "imx7d_adc",
600 .of_match_table = imx7d_adc_match,
601 .pm = &imx7d_adc_pm_ops,
602 },
603};
604
605module_platform_driver(imx7d_adc_driver);
606
607MODULE_AUTHOR("Haibo Chen <haibo.chen@freescale.com>");
608MODULE_DESCRIPTION("Freeacale IMX7D ADC driver");
609MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/adc/ina2xx-adc.c b/drivers/iio/adc/ina2xx-adc.c
new file mode 100644
index 000000000000..4c18c4cc8939
--- /dev/null
+++ b/drivers/iio/adc/ina2xx-adc.c
@@ -0,0 +1,745 @@
1/*
2 * INA2XX Current and Power Monitors
3 *
4 * Copyright 2015 Baylibre SAS.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * Based on linux/drivers/iio/adc/ad7291.c
11 * Copyright 2010-2011 Analog Devices Inc.
12 *
13 * Based on linux/drivers/hwmon/ina2xx.c
14 * Copyright 2012 Lothar Felten <l-felten@ti.com>
15 *
16 * Licensed under the GPL-2 or later.
17 *
18 * IIO driver for INA219-220-226-230-231
19 *
20 * Configurable 7-bit I2C slave address from 0x40 to 0x4F
21 */
22#include <linux/module.h>
23#include <linux/kthread.h>
24#include <linux/delay.h>
25#include <linux/iio/kfifo_buf.h>
26#include <linux/iio/sysfs.h>
27#include <linux/i2c.h>
28#include <linux/regmap.h>
29#include <linux/platform_data/ina2xx.h>
30
31#include <linux/util_macros.h>
32
33/* INA2XX registers definition */
34#define INA2XX_CONFIG 0x00
35#define INA2XX_SHUNT_VOLTAGE 0x01 /* readonly */
36#define INA2XX_BUS_VOLTAGE 0x02 /* readonly */
37#define INA2XX_POWER 0x03 /* readonly */
38#define INA2XX_CURRENT 0x04 /* readonly */
39#define INA2XX_CALIBRATION 0x05
40
41#define INA226_ALERT_MASK 0x06
42#define INA266_CVRF BIT(3)
43
44#define INA2XX_MAX_REGISTERS 8
45
46/* settings - depend on use case */
47#define INA219_CONFIG_DEFAULT 0x399F /* PGA=8 */
48#define INA226_CONFIG_DEFAULT 0x4327
49#define INA226_DEFAULT_AVG 4
50#define INA226_DEFAULT_IT 1110
51
52#define INA2XX_RSHUNT_DEFAULT 10000
53
54/*
55 * bit mask for reading the averaging setting in the configuration register
56 * FIXME: use regmap_fields.
57 */
58#define INA2XX_MODE_MASK GENMASK(3, 0)
59
60#define INA226_AVG_MASK GENMASK(11, 9)
61#define INA226_SHIFT_AVG(val) ((val) << 9)
62
63/* Integration time for VBus */
64#define INA226_ITB_MASK GENMASK(8, 6)
65#define INA226_SHIFT_ITB(val) ((val) << 6)
66
67/* Integration time for VShunt */
68#define INA226_ITS_MASK GENMASK(5, 3)
69#define INA226_SHIFT_ITS(val) ((val) << 3)
70
71/* Cosmetic macro giving the sampling period for a full P=UxI cycle */
72#define SAMPLING_PERIOD(c) ((c->int_time_vbus + c->int_time_vshunt) \
73 * c->avg)
74
75static bool ina2xx_is_writeable_reg(struct device *dev, unsigned int reg)
76{
77 return (reg == INA2XX_CONFIG) || (reg > INA2XX_CURRENT);
78}
79
80static bool ina2xx_is_volatile_reg(struct device *dev, unsigned int reg)
81{
82 return (reg != INA2XX_CONFIG);
83}
84
85static inline bool is_signed_reg(unsigned int reg)
86{
87 return (reg == INA2XX_SHUNT_VOLTAGE) || (reg == INA2XX_CURRENT);
88}
89
90static const struct regmap_config ina2xx_regmap_config = {
91 .reg_bits = 8,
92 .val_bits = 16,
93 .max_register = INA2XX_MAX_REGISTERS,
94 .writeable_reg = ina2xx_is_writeable_reg,
95 .volatile_reg = ina2xx_is_volatile_reg,
96};
97
98enum ina2xx_ids { ina219, ina226 };
99
100struct ina2xx_config {
101 u16 config_default;
102 int calibration_factor;
103 int shunt_div;
104 int bus_voltage_shift;
105 int bus_voltage_lsb; /* uV */
106 int power_lsb; /* uW */
107};
108
109struct ina2xx_chip_info {
110 struct regmap *regmap;
111 struct task_struct *task;
112 const struct ina2xx_config *config;
113 struct mutex state_lock;
114 unsigned int shunt_resistor;
115 int avg;
116 s64 prev_ns; /* track buffer capture time, check for underruns*/
117 int int_time_vbus; /* Bus voltage integration time uS */
118 int int_time_vshunt; /* Shunt voltage integration time uS */
119 bool allow_async_readout;
120};
121
122static const struct ina2xx_config ina2xx_config[] = {
123 [ina219] = {
124 .config_default = INA219_CONFIG_DEFAULT,
125 .calibration_factor = 40960000,
126 .shunt_div = 100,
127 .bus_voltage_shift = 3,
128 .bus_voltage_lsb = 4000,
129 .power_lsb = 20000,
130 },
131 [ina226] = {
132 .config_default = INA226_CONFIG_DEFAULT,
133 .calibration_factor = 5120000,
134 .shunt_div = 400,
135 .bus_voltage_shift = 0,
136 .bus_voltage_lsb = 1250,
137 .power_lsb = 25000,
138 },
139};
140
141static int ina2xx_read_raw(struct iio_dev *indio_dev,
142 struct iio_chan_spec const *chan,
143 int *val, int *val2, long mask)
144{
145 int ret;
146 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
147 unsigned int regval;
148
149 switch (mask) {
150 case IIO_CHAN_INFO_RAW:
151 ret = regmap_read(chip->regmap, chan->address, &regval);
152 if (ret < 0)
153 return ret;
154
155 if (is_signed_reg(chan->address))
156 *val = (s16) regval;
157 else
158 *val = regval;
159
160 return IIO_VAL_INT;
161
162 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
163 *val = chip->avg;
164 return IIO_VAL_INT;
165
166 case IIO_CHAN_INFO_INT_TIME:
167 *val = 0;
168 if (chan->address == INA2XX_SHUNT_VOLTAGE)
169 *val2 = chip->int_time_vshunt;
170 else
171 *val2 = chip->int_time_vbus;
172
173 return IIO_VAL_INT_PLUS_MICRO;
174
175 case IIO_CHAN_INFO_SAMP_FREQ:
176 /*
177 * Sample freq is read only, it is a consequence of
178 * 1/AVG*(CT_bus+CT_shunt).
179 */
180 *val = DIV_ROUND_CLOSEST(1000000, SAMPLING_PERIOD(chip));
181
182 return IIO_VAL_INT;
183
184 case IIO_CHAN_INFO_SCALE:
185 switch (chan->address) {
186 case INA2XX_SHUNT_VOLTAGE:
187 /* processed (mV) = raw*1000/shunt_div */
188 *val2 = chip->config->shunt_div;
189 *val = 1000;
190 return IIO_VAL_FRACTIONAL;
191
192 case INA2XX_BUS_VOLTAGE:
193 /* processed (mV) = raw*lsb (uV) / (1000 << shift) */
194 *val = chip->config->bus_voltage_lsb;
195 *val2 = 1000 << chip->config->bus_voltage_shift;
196 return IIO_VAL_FRACTIONAL;
197
198 case INA2XX_POWER:
199 /* processed (mW) = raw*lsb (uW) / 1000 */
200 *val = chip->config->power_lsb;
201 *val2 = 1000;
202 return IIO_VAL_FRACTIONAL;
203
204 case INA2XX_CURRENT:
205 /* processed (mA) = raw (mA) */
206 *val = 1;
207 return IIO_VAL_INT;
208 }
209 }
210
211 return -EINVAL;
212}
213
214/*
215 * Available averaging rates for ina226. The indices correspond with
216 * the bit values expected by the chip (according to the ina226 datasheet,
217 * table 3 AVG bit settings, found at
218 * http://www.ti.com/lit/ds/symlink/ina226.pdf.
219 */
220static const int ina226_avg_tab[] = { 1, 4, 16, 64, 128, 256, 512, 1024 };
221
222static int ina226_set_average(struct ina2xx_chip_info *chip, unsigned int val,
223 unsigned int *config)
224{
225 int bits;
226
227 if (val > 1024 || val < 1)
228 return -EINVAL;
229
230 bits = find_closest(val, ina226_avg_tab,
231 ARRAY_SIZE(ina226_avg_tab));
232
233 chip->avg = ina226_avg_tab[bits];
234
235 *config &= ~INA226_AVG_MASK;
236 *config |= INA226_SHIFT_AVG(bits) & INA226_AVG_MASK;
237
238 return 0;
239}
240
241/* Conversion times in uS */
242static const int ina226_conv_time_tab[] = { 140, 204, 332, 588, 1100,
243 2116, 4156, 8244 };
244
245static int ina226_set_int_time_vbus(struct ina2xx_chip_info *chip,
246 unsigned int val_us, unsigned int *config)
247{
248 int bits;
249
250 if (val_us > 8244 || val_us < 140)
251 return -EINVAL;
252
253 bits = find_closest(val_us, ina226_conv_time_tab,
254 ARRAY_SIZE(ina226_conv_time_tab));
255
256 chip->int_time_vbus = ina226_conv_time_tab[bits];
257
258 *config &= ~INA226_ITB_MASK;
259 *config |= INA226_SHIFT_ITB(bits) & INA226_ITB_MASK;
260
261 return 0;
262}
263
264static int ina226_set_int_time_vshunt(struct ina2xx_chip_info *chip,
265 unsigned int val_us, unsigned int *config)
266{
267 int bits;
268
269 if (val_us > 8244 || val_us < 140)
270 return -EINVAL;
271
272 bits = find_closest(val_us, ina226_conv_time_tab,
273 ARRAY_SIZE(ina226_conv_time_tab));
274
275 chip->int_time_vshunt = ina226_conv_time_tab[bits];
276
277 *config &= ~INA226_ITS_MASK;
278 *config |= INA226_SHIFT_ITS(bits) & INA226_ITS_MASK;
279
280 return 0;
281}
282
283static int ina2xx_write_raw(struct iio_dev *indio_dev,
284 struct iio_chan_spec const *chan,
285 int val, int val2, long mask)
286{
287 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
288 int ret;
289 unsigned int config, tmp;
290
291 if (iio_buffer_enabled(indio_dev))
292 return -EBUSY;
293
294 mutex_lock(&chip->state_lock);
295
296 ret = regmap_read(chip->regmap, INA2XX_CONFIG, &config);
297 if (ret < 0)
298 goto _err;
299
300 tmp = config;
301
302 switch (mask) {
303 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
304 ret = ina226_set_average(chip, val, &tmp);
305 break;
306
307 case IIO_CHAN_INFO_INT_TIME:
308 if (chan->address == INA2XX_SHUNT_VOLTAGE)
309 ret = ina226_set_int_time_vshunt(chip, val2, &tmp);
310 else
311 ret = ina226_set_int_time_vbus(chip, val2, &tmp);
312 break;
313 default:
314 ret = -EINVAL;
315 }
316
317 if (!ret && (tmp != config))
318 ret = regmap_write(chip->regmap, INA2XX_CONFIG, tmp);
319_err:
320 mutex_unlock(&chip->state_lock);
321
322 return ret;
323}
324
325
326static ssize_t ina2xx_allow_async_readout_show(struct device *dev,
327 struct device_attribute *attr,
328 char *buf)
329{
330 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
331
332 return sprintf(buf, "%d\n", chip->allow_async_readout);
333}
334
335static ssize_t ina2xx_allow_async_readout_store(struct device *dev,
336 struct device_attribute *attr,
337 const char *buf, size_t len)
338{
339 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
340 bool val;
341 int ret;
342
343 ret = strtobool((const char *) buf, &val);
344 if (ret)
345 return ret;
346
347 chip->allow_async_readout = val;
348
349 return len;
350}
351
352static int set_shunt_resistor(struct ina2xx_chip_info *chip, unsigned int val)
353{
354 if (val <= 0 || val > chip->config->calibration_factor)
355 return -EINVAL;
356
357 chip->shunt_resistor = val;
358 return 0;
359}
360
361static ssize_t ina2xx_shunt_resistor_show(struct device *dev,
362 struct device_attribute *attr,
363 char *buf)
364{
365 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
366
367 return sprintf(buf, "%d\n", chip->shunt_resistor);
368}
369
370static ssize_t ina2xx_shunt_resistor_store(struct device *dev,
371 struct device_attribute *attr,
372 const char *buf, size_t len)
373{
374 struct ina2xx_chip_info *chip = iio_priv(dev_to_iio_dev(dev));
375 unsigned long val;
376 int ret;
377
378 ret = kstrtoul((const char *) buf, 10, &val);
379 if (ret)
380 return ret;
381
382 ret = set_shunt_resistor(chip, val);
383 if (ret)
384 return ret;
385
386 return len;
387}
388
389#define INA2XX_CHAN(_type, _index, _address) { \
390 .type = (_type), \
391 .address = (_address), \
392 .indexed = 1, \
393 .channel = (_index), \
394 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) \
395 | BIT(IIO_CHAN_INFO_SCALE), \
396 .info_mask_shared_by_dir = BIT(IIO_CHAN_INFO_SAMP_FREQ) | \
397 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
398 .scan_index = (_index), \
399 .scan_type = { \
400 .sign = 'u', \
401 .realbits = 16, \
402 .storagebits = 16, \
403 .endianness = IIO_LE, \
404 } \
405}
406
407/*
408 * Sampling Freq is a consequence of the integration times of
409 * the Voltage channels.
410 */
411#define INA2XX_CHAN_VOLTAGE(_index, _address) { \
412 .type = IIO_VOLTAGE, \
413 .address = (_address), \
414 .indexed = 1, \
415 .channel = (_index), \
416 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \
417 BIT(IIO_CHAN_INFO_SCALE) | \
418 BIT(IIO_CHAN_INFO_INT_TIME), \
419 .scan_index = (_index), \
420 .scan_type = { \
421 .sign = 'u', \
422 .realbits = 16, \
423 .storagebits = 16, \
424 .endianness = IIO_LE, \
425 } \
426}
427
428static const struct iio_chan_spec ina2xx_channels[] = {
429 INA2XX_CHAN_VOLTAGE(0, INA2XX_SHUNT_VOLTAGE),
430 INA2XX_CHAN_VOLTAGE(1, INA2XX_BUS_VOLTAGE),
431 INA2XX_CHAN(IIO_CURRENT, 2, INA2XX_CURRENT),
432 INA2XX_CHAN(IIO_POWER, 3, INA2XX_POWER),
433 IIO_CHAN_SOFT_TIMESTAMP(4),
434};
435
436static int ina2xx_work_buffer(struct iio_dev *indio_dev)
437{
438 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
439 unsigned short data[8];
440 int bit, ret, i = 0;
441 unsigned long buffer_us, elapsed_us;
442 s64 time_a, time_b;
443 unsigned int alert;
444
445 time_a = iio_get_time_ns();
446
447 /*
448 * Because the timer thread and the chip conversion clock
449 * are asynchronous, the period difference will eventually
450 * result in reading V[k-1] again, or skip V[k] at time Tk.
451 * In order to resync the timer with the conversion process
452 * we check the ConVersionReadyFlag.
453 * On hardware that supports using the ALERT pin to toggle a
454 * GPIO a triggered buffer could be used instead.
455 * For now, we pay for that extra read of the ALERT register
456 */
457 if (!chip->allow_async_readout)
458 do {
459 ret = regmap_read(chip->regmap, INA226_ALERT_MASK,
460 &alert);
461 if (ret < 0)
462 return ret;
463
464 alert &= INA266_CVRF;
465 trace_printk("Conversion ready: %d\n", !!alert);
466
467 } while (!alert);
468
469 /*
470 * Single register reads: bulk_read will not work with ina226
471 * as there is no auto-increment of the address register for
472 * data length longer than 16bits.
473 */
474 for_each_set_bit(bit, indio_dev->active_scan_mask,
475 indio_dev->masklength) {
476 unsigned int val;
477
478 ret = regmap_read(chip->regmap,
479 INA2XX_SHUNT_VOLTAGE + bit, &val);
480 if (ret < 0)
481 return ret;
482
483 data[i++] = val;
484 }
485
486 time_b = iio_get_time_ns();
487
488 iio_push_to_buffers_with_timestamp(indio_dev,
489 (unsigned int *)data, time_a);
490
491 buffer_us = (unsigned long)(time_b - time_a) / 1000;
492 elapsed_us = (unsigned long)(time_a - chip->prev_ns) / 1000;
493
494 trace_printk("uS: elapsed: %lu, buf: %lu\n", elapsed_us, buffer_us);
495
496 chip->prev_ns = time_a;
497
498 return buffer_us;
499};
500
501static int ina2xx_capture_thread(void *data)
502{
503 struct iio_dev *indio_dev = (struct iio_dev *)data;
504 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
505 unsigned int sampling_us = SAMPLING_PERIOD(chip);
506 int buffer_us;
507
508 /*
509 * Poll a bit faster than the chip internal Fs, in case
510 * we wish to sync with the conversion ready flag.
511 */
512 if (!chip->allow_async_readout)
513 sampling_us -= 200;
514
515 do {
516 buffer_us = ina2xx_work_buffer(indio_dev);
517 if (buffer_us < 0)
518 return buffer_us;
519
520 if (sampling_us > buffer_us)
521 udelay(sampling_us - buffer_us);
522
523 } while (!kthread_should_stop());
524
525 return 0;
526}
527
528static int ina2xx_buffer_enable(struct iio_dev *indio_dev)
529{
530 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
531 unsigned int sampling_us = SAMPLING_PERIOD(chip);
532
533 trace_printk("Enabling buffer w/ scan_mask %02x, freq = %d, avg =%u\n",
534 (unsigned int)(*indio_dev->active_scan_mask),
535 1000000/sampling_us, chip->avg);
536
537 trace_printk("Expected work period: %u us\n", sampling_us);
538 trace_printk("Async readout mode: %d\n", chip->allow_async_readout);
539
540 chip->prev_ns = iio_get_time_ns();
541
542 chip->task = kthread_run(ina2xx_capture_thread, (void *)indio_dev,
543 "%s:%d-%uus", indio_dev->name, indio_dev->id,
544 sampling_us);
545
546 return PTR_ERR_OR_ZERO(chip->task);
547}
548
549static int ina2xx_buffer_disable(struct iio_dev *indio_dev)
550{
551 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
552
553 if (chip->task) {
554 kthread_stop(chip->task);
555 chip->task = NULL;
556 }
557
558 return 0;
559}
560
561static const struct iio_buffer_setup_ops ina2xx_setup_ops = {
562 .postenable = &ina2xx_buffer_enable,
563 .predisable = &ina2xx_buffer_disable,
564};
565
566static int ina2xx_debug_reg(struct iio_dev *indio_dev,
567 unsigned reg, unsigned writeval, unsigned *readval)
568{
569 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
570
571 if (!readval)
572 return regmap_write(chip->regmap, reg, writeval);
573
574 return regmap_read(chip->regmap, reg, readval);
575}
576
577/* Possible integration times for vshunt and vbus */
578static IIO_CONST_ATTR_INT_TIME_AVAIL \
579 ("0.000140 0.000204 0.000332 0.000588 0.001100 0.002116 0.004156 0.008244");
580
581static IIO_DEVICE_ATTR(in_allow_async_readout, S_IRUGO | S_IWUSR,
582 ina2xx_allow_async_readout_show,
583 ina2xx_allow_async_readout_store, 0);
584
585static IIO_DEVICE_ATTR(in_shunt_resistor, S_IRUGO | S_IWUSR,
586 ina2xx_shunt_resistor_show,
587 ina2xx_shunt_resistor_store, 0);
588
589static struct attribute *ina2xx_attributes[] = {
590 &iio_dev_attr_in_allow_async_readout.dev_attr.attr,
591 &iio_const_attr_integration_time_available.dev_attr.attr,
592 &iio_dev_attr_in_shunt_resistor.dev_attr.attr,
593 NULL,
594};
595
596static const struct attribute_group ina2xx_attribute_group = {
597 .attrs = ina2xx_attributes,
598};
599
600static const struct iio_info ina2xx_info = {
601 .debugfs_reg_access = &ina2xx_debug_reg,
602 .read_raw = &ina2xx_read_raw,
603 .write_raw = &ina2xx_write_raw,
604 .attrs = &ina2xx_attribute_group,
605 .driver_module = THIS_MODULE,
606};
607
608/* Initialize the configuration and calibration registers. */
609static int ina2xx_init(struct ina2xx_chip_info *chip, unsigned int config)
610{
611 u16 regval;
612 int ret = regmap_write(chip->regmap, INA2XX_CONFIG, config);
613
614 if (ret < 0)
615 return ret;
616 /*
617 * Set current LSB to 1mA, shunt is in uOhms
618 * (equation 13 in datasheet). We hardcode a Current_LSB
619 * of 1.0 x10-6. The only remaining parameter is RShunt.
620 * There is no need to expose the CALIBRATION register
621 * to the user for now.
622 */
623 regval = DIV_ROUND_CLOSEST(chip->config->calibration_factor,
624 chip->shunt_resistor);
625
626 return regmap_write(chip->regmap, INA2XX_CALIBRATION, regval);
627}
628
629static int ina2xx_probe(struct i2c_client *client,
630 const struct i2c_device_id *id)
631{
632 struct ina2xx_chip_info *chip;
633 struct iio_dev *indio_dev;
634 struct iio_buffer *buffer;
635 int ret;
636 unsigned int val;
637
638 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*chip));
639 if (!indio_dev)
640 return -ENOMEM;
641
642 chip = iio_priv(indio_dev);
643
644 chip->config = &ina2xx_config[id->driver_data];
645
646 if (of_property_read_u32(client->dev.of_node,
647 "shunt-resistor", &val) < 0) {
648 struct ina2xx_platform_data *pdata =
649 dev_get_platdata(&client->dev);
650
651 if (pdata)
652 val = pdata->shunt_uohms;
653 else
654 val = INA2XX_RSHUNT_DEFAULT;
655 }
656
657 ret = set_shunt_resistor(chip, val);
658 if (ret)
659 return ret;
660
661 mutex_init(&chip->state_lock);
662
663 /* This is only used for device removal purposes. */
664 i2c_set_clientdata(client, indio_dev);
665
666 indio_dev->name = id->name;
667 indio_dev->channels = ina2xx_channels;
668 indio_dev->num_channels = ARRAY_SIZE(ina2xx_channels);
669
670 indio_dev->dev.parent = &client->dev;
671 indio_dev->info = &ina2xx_info;
672 indio_dev->modes = INDIO_DIRECT_MODE | INDIO_BUFFER_SOFTWARE;
673
674 chip->regmap = devm_regmap_init_i2c(client, &ina2xx_regmap_config);
675 if (IS_ERR(chip->regmap)) {
676 dev_err(&client->dev, "failed to allocate register map\n");
677 return PTR_ERR(chip->regmap);
678 }
679
680 /* Patch the current config register with default. */
681 val = chip->config->config_default;
682
683 if (id->driver_data == ina226) {
684 ina226_set_average(chip, INA226_DEFAULT_AVG, &val);
685 ina226_set_int_time_vbus(chip, INA226_DEFAULT_IT, &val);
686 ina226_set_int_time_vshunt(chip, INA226_DEFAULT_IT, &val);
687 }
688
689 ret = ina2xx_init(chip, val);
690 if (ret < 0) {
691 dev_err(&client->dev, "error configuring the device: %d\n",
692 ret);
693 return -ENODEV;
694 }
695
696 buffer = devm_iio_kfifo_allocate(&indio_dev->dev);
697 if (!buffer)
698 return -ENOMEM;
699
700 indio_dev->setup_ops = &ina2xx_setup_ops;
701
702 iio_device_attach_buffer(indio_dev, buffer);
703
704 return iio_device_register(indio_dev);
705}
706
707
708static int ina2xx_remove(struct i2c_client *client)
709{
710 struct iio_dev *indio_dev = i2c_get_clientdata(client);
711 struct ina2xx_chip_info *chip = iio_priv(indio_dev);
712
713 iio_device_unregister(indio_dev);
714
715 /* Powerdown */
716 return regmap_update_bits(chip->regmap, INA2XX_CONFIG,
717 INA2XX_MODE_MASK, 0);
718}
719
720
721static const struct i2c_device_id ina2xx_id[] = {
722 {"ina219", ina219},
723 {"ina220", ina219},
724 {"ina226", ina226},
725 {"ina230", ina226},
726 {"ina231", ina226},
727 {}
728};
729
730MODULE_DEVICE_TABLE(i2c, ina2xx_id);
731
732static struct i2c_driver ina2xx_driver = {
733 .driver = {
734 .name = KBUILD_MODNAME,
735 },
736 .probe = ina2xx_probe,
737 .remove = ina2xx_remove,
738 .id_table = ina2xx_id,
739};
740
741module_i2c_driver(ina2xx_driver);
742
743MODULE_AUTHOR("Marc Titinger <marc.titinger@baylibre.com>");
744MODULE_DESCRIPTION("Texas Instruments INA2XX ADC driver");
745MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/adc/mcp3422.c b/drivers/iio/adc/mcp3422.c
index 3555122008b4..6eca7aea8a37 100644
--- a/drivers/iio/adc/mcp3422.c
+++ b/drivers/iio/adc/mcp3422.c
@@ -305,6 +305,10 @@ static const struct attribute_group mcp3422_attribute_group = {
305 .attrs = mcp3422_attributes, 305 .attrs = mcp3422_attributes,
306}; 306};
307 307
308static const struct iio_chan_spec mcp3421_channels[] = {
309 MCP3422_CHAN(0),
310};
311
308static const struct iio_chan_spec mcp3422_channels[] = { 312static const struct iio_chan_spec mcp3422_channels[] = {
309 MCP3422_CHAN(0), 313 MCP3422_CHAN(0),
310 MCP3422_CHAN(1), 314 MCP3422_CHAN(1),
@@ -352,6 +356,10 @@ static int mcp3422_probe(struct i2c_client *client,
352 indio_dev->info = &mcp3422_info; 356 indio_dev->info = &mcp3422_info;
353 357
354 switch (adc->id) { 358 switch (adc->id) {
359 case 1:
360 indio_dev->channels = mcp3421_channels;
361 indio_dev->num_channels = ARRAY_SIZE(mcp3421_channels);
362 break;
355 case 2: 363 case 2:
356 case 3: 364 case 3:
357 case 6: 365 case 6:
@@ -383,6 +391,7 @@ static int mcp3422_probe(struct i2c_client *client,
383} 391}
384 392
385static const struct i2c_device_id mcp3422_id[] = { 393static const struct i2c_device_id mcp3422_id[] = {
394 { "mcp3421", 1 },
386 { "mcp3422", 2 }, 395 { "mcp3422", 2 },
387 { "mcp3423", 3 }, 396 { "mcp3423", 3 },
388 { "mcp3424", 4 }, 397 { "mcp3424", 4 },
diff --git a/drivers/iio/adc/ti-adc128s052.c b/drivers/iio/adc/ti-adc128s052.c
index ff6f7f63c8d9..bc58867d6e8d 100644
--- a/drivers/iio/adc/ti-adc128s052.c
+++ b/drivers/iio/adc/ti-adc128s052.c
@@ -1,10 +1,11 @@
1/* 1/*
2 * Copyright (C) 2014 Angelo Compagnucci <angelo.compagnucci@gmail.com> 2 * Copyright (C) 2014 Angelo Compagnucci <angelo.compagnucci@gmail.com>
3 * 3 *
4 * Driver for Texas Instruments' ADC128S052 and ADC122S021 ADC chip. 4 * Driver for Texas Instruments' ADC128S052, ADC122S021 and ADC124S021 ADC chip.
5 * Datasheets can be found here: 5 * Datasheets can be found here:
6 * http://www.ti.com/lit/ds/symlink/adc128s052.pdf 6 * http://www.ti.com/lit/ds/symlink/adc128s052.pdf
7 * http://www.ti.com/lit/ds/symlink/adc122s021.pdf 7 * http://www.ti.com/lit/ds/symlink/adc122s021.pdf
8 * http://www.ti.com/lit/ds/symlink/adc124s021.pdf
8 * 9 *
9 * This program is free software; you can redistribute it and/or modify 10 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as 11 * it under the terms of the GNU General Public License version 2 as
@@ -114,9 +115,17 @@ static const struct iio_chan_spec adc122s021_channels[] = {
114 ADC128_VOLTAGE_CHANNEL(1), 115 ADC128_VOLTAGE_CHANNEL(1),
115}; 116};
116 117
118static const struct iio_chan_spec adc124s021_channels[] = {
119 ADC128_VOLTAGE_CHANNEL(0),
120 ADC128_VOLTAGE_CHANNEL(1),
121 ADC128_VOLTAGE_CHANNEL(2),
122 ADC128_VOLTAGE_CHANNEL(3),
123};
124
117static const struct adc128_configuration adc128_config[] = { 125static const struct adc128_configuration adc128_config[] = {
118 { adc128s052_channels, ARRAY_SIZE(adc128s052_channels) }, 126 { adc128s052_channels, ARRAY_SIZE(adc128s052_channels) },
119 { adc122s021_channels, ARRAY_SIZE(adc122s021_channels) }, 127 { adc122s021_channels, ARRAY_SIZE(adc122s021_channels) },
128 { adc124s021_channels, ARRAY_SIZE(adc124s021_channels) },
120}; 129};
121 130
122static const struct iio_info adc128_info = { 131static const struct iio_info adc128_info = {
@@ -177,6 +186,7 @@ static int adc128_remove(struct spi_device *spi)
177static const struct of_device_id adc128_of_match[] = { 186static const struct of_device_id adc128_of_match[] = {
178 { .compatible = "ti,adc128s052", }, 187 { .compatible = "ti,adc128s052", },
179 { .compatible = "ti,adc122s021", }, 188 { .compatible = "ti,adc122s021", },
189 { .compatible = "ti,adc124s021", },
180 { /* sentinel */ }, 190 { /* sentinel */ },
181}; 191};
182MODULE_DEVICE_TABLE(of, adc128_of_match); 192MODULE_DEVICE_TABLE(of, adc128_of_match);
@@ -184,6 +194,7 @@ MODULE_DEVICE_TABLE(of, adc128_of_match);
184static const struct spi_device_id adc128_id[] = { 194static const struct spi_device_id adc128_id[] = {
185 { "adc128s052", 0}, /* index into adc128_config */ 195 { "adc128s052", 0}, /* index into adc128_config */
186 { "adc122s021", 1}, 196 { "adc122s021", 1},
197 { "adc124s021", 2},
187 { } 198 { }
188}; 199};
189MODULE_DEVICE_TABLE(spi, adc128_id); 200MODULE_DEVICE_TABLE(spi, adc128_id);
diff --git a/drivers/iio/chemical/Kconfig b/drivers/iio/chemical/Kconfig
index 3061b7299f0f..f16de61be46d 100644
--- a/drivers/iio/chemical/Kconfig
+++ b/drivers/iio/chemical/Kconfig
@@ -4,6 +4,14 @@
4 4
5menu "Chemical Sensors" 5menu "Chemical Sensors"
6 6
7config IAQCORE
8 tristate "AMS iAQ-Core VOC sensors"
9 depends on I2C
10 help
11 Say Y here to build I2C interface support for the AMS
12 iAQ-Core Continuous/Pulsed VOC (Volatile Organic Compounds)
13 sensors
14
7config VZ89X 15config VZ89X
8 tristate "SGX Sensortech MiCS VZ89X VOC sensor" 16 tristate "SGX Sensortech MiCS VZ89X VOC sensor"
9 depends on I2C 17 depends on I2C
diff --git a/drivers/iio/chemical/Makefile b/drivers/iio/chemical/Makefile
index 7292f2ded587..167861fadfab 100644
--- a/drivers/iio/chemical/Makefile
+++ b/drivers/iio/chemical/Makefile
@@ -3,4 +3,5 @@
3# 3#
4 4
5# When adding new entries keep the list in alphabetical order 5# When adding new entries keep the list in alphabetical order
6obj-$(CONFIG_IAQCORE) += ams-iaq-core.o
6obj-$(CONFIG_VZ89X) += vz89x.o 7obj-$(CONFIG_VZ89X) += vz89x.o
diff --git a/drivers/iio/chemical/ams-iaq-core.c b/drivers/iio/chemical/ams-iaq-core.c
new file mode 100644
index 000000000000..41a8e6f2e31d
--- /dev/null
+++ b/drivers/iio/chemical/ams-iaq-core.c
@@ -0,0 +1,200 @@
1/*
2 * ams-iaq-core.c - Support for AMS iAQ-Core VOC sensors
3 *
4 * Copyright (C) 2015 Matt Ranostay <mranostay@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 */
17
18#include <linux/module.h>
19#include <linux/mutex.h>
20#include <linux/init.h>
21#include <linux/i2c.h>
22#include <linux/iio/iio.h>
23
24#define AMS_IAQCORE_DATA_SIZE 9
25
26#define AMS_IAQCORE_VOC_CO2_IDX 0
27#define AMS_IAQCORE_VOC_RESISTANCE_IDX 1
28#define AMS_IAQCORE_VOC_TVOC_IDX 2
29
30struct ams_iaqcore_reading {
31 __be16 co2_ppm;
32 u8 status;
33 __be32 resistance;
34 __be16 voc_ppb;
35} __attribute__((__packed__));
36
37struct ams_iaqcore_data {
38 struct i2c_client *client;
39 struct mutex lock;
40 unsigned long last_update;
41
42 struct ams_iaqcore_reading buffer;
43};
44
45static const struct iio_chan_spec ams_iaqcore_channels[] = {
46 {
47 .type = IIO_CONCENTRATION,
48 .channel2 = IIO_MOD_CO2,
49 .modified = 1,
50 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
51 .address = AMS_IAQCORE_VOC_CO2_IDX,
52 },
53 {
54 .type = IIO_RESISTANCE,
55 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
56 .address = AMS_IAQCORE_VOC_RESISTANCE_IDX,
57 },
58 {
59 .type = IIO_CONCENTRATION,
60 .channel2 = IIO_MOD_VOC,
61 .modified = 1,
62 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED),
63 .address = AMS_IAQCORE_VOC_TVOC_IDX,
64 },
65};
66
67static int ams_iaqcore_read_measurement(struct ams_iaqcore_data *data)
68{
69 struct i2c_client *client = data->client;
70 int ret;
71
72 struct i2c_msg msg = {
73 .addr = client->addr,
74 .flags = client->flags | I2C_M_RD,
75 .len = AMS_IAQCORE_DATA_SIZE,
76 .buf = (char *) &data->buffer,
77 };
78
79 ret = i2c_transfer(client->adapter, &msg, 1);
80
81 return (ret == AMS_IAQCORE_DATA_SIZE) ? 0 : ret;
82}
83
84static int ams_iaqcore_get_measurement(struct ams_iaqcore_data *data)
85{
86 int ret;
87
88 /* sensor can only be polled once a second max per datasheet */
89 if (!time_after(jiffies, data->last_update + HZ))
90 return 0;
91
92 ret = ams_iaqcore_read_measurement(data);
93 if (ret < 0)
94 return ret;
95
96 data->last_update = jiffies;
97
98 return 0;
99}
100
101static int ams_iaqcore_read_raw(struct iio_dev *indio_dev,
102 struct iio_chan_spec const *chan, int *val,
103 int *val2, long mask)
104{
105 struct ams_iaqcore_data *data = iio_priv(indio_dev);
106 int ret;
107
108 if (mask != IIO_CHAN_INFO_PROCESSED)
109 return -EINVAL;
110
111 mutex_lock(&data->lock);
112 ret = ams_iaqcore_get_measurement(data);
113
114 if (ret)
115 goto err_out;
116
117 switch (chan->address) {
118 case AMS_IAQCORE_VOC_CO2_IDX:
119 *val = 0;
120 *val2 = be16_to_cpu(data->buffer.co2_ppm);
121 ret = IIO_VAL_INT_PLUS_MICRO;
122 break;
123 case AMS_IAQCORE_VOC_RESISTANCE_IDX:
124 *val = be32_to_cpu(data->buffer.resistance);
125 ret = IIO_VAL_INT;
126 break;
127 case AMS_IAQCORE_VOC_TVOC_IDX:
128 *val = 0;
129 *val2 = be16_to_cpu(data->buffer.voc_ppb);
130 ret = IIO_VAL_INT_PLUS_NANO;
131 break;
132 default:
133 ret = -EINVAL;
134 }
135
136err_out:
137 mutex_unlock(&data->lock);
138
139 return ret;
140}
141
142static const struct iio_info ams_iaqcore_info = {
143 .read_raw = ams_iaqcore_read_raw,
144 .driver_module = THIS_MODULE,
145};
146
147static int ams_iaqcore_probe(struct i2c_client *client,
148 const struct i2c_device_id *id)
149{
150 struct iio_dev *indio_dev;
151 struct ams_iaqcore_data *data;
152
153 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
154 if (!indio_dev)
155 return -ENOMEM;
156
157 data = iio_priv(indio_dev);
158 i2c_set_clientdata(client, indio_dev);
159 data->client = client;
160
161 /* so initial reading will complete */
162 data->last_update = jiffies - HZ;
163 mutex_init(&data->lock);
164
165 indio_dev->dev.parent = &client->dev;
166 indio_dev->info = &ams_iaqcore_info,
167 indio_dev->name = dev_name(&client->dev);
168 indio_dev->modes = INDIO_DIRECT_MODE;
169
170 indio_dev->channels = ams_iaqcore_channels;
171 indio_dev->num_channels = ARRAY_SIZE(ams_iaqcore_channels);
172
173 return devm_iio_device_register(&client->dev, indio_dev);
174}
175
176static const struct i2c_device_id ams_iaqcore_id[] = {
177 { "ams-iaq-core", 0 },
178 { }
179};
180MODULE_DEVICE_TABLE(i2c, ams_iaqcore_id);
181
182static const struct of_device_id ams_iaqcore_dt_ids[] = {
183 { .compatible = "ams,iaq-core" },
184 { }
185};
186MODULE_DEVICE_TABLE(of, ams_iaqcore_dt_ids);
187
188static struct i2c_driver ams_iaqcore_driver = {
189 .driver = {
190 .name = "ams-iaq-core",
191 .of_match_table = of_match_ptr(ams_iaqcore_dt_ids),
192 },
193 .probe = ams_iaqcore_probe,
194 .id_table = ams_iaqcore_id,
195};
196module_i2c_driver(ams_iaqcore_driver);
197
198MODULE_AUTHOR("Matt Ranostay <mranostay@gmail.com>");
199MODULE_DESCRIPTION("AMS iAQ-Core VOC sensors");
200MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/chemical/vz89x.c b/drivers/iio/chemical/vz89x.c
index 11e59a5a5112..b8b804923230 100644
--- a/drivers/iio/chemical/vz89x.c
+++ b/drivers/iio/chemical/vz89x.c
@@ -34,8 +34,9 @@
34struct vz89x_data { 34struct vz89x_data {
35 struct i2c_client *client; 35 struct i2c_client *client;
36 struct mutex lock; 36 struct mutex lock;
37 unsigned long last_update; 37 int (*xfer)(struct vz89x_data *data, u8 cmd);
38 38
39 unsigned long last_update;
39 u8 buffer[VZ89X_REG_MEASUREMENT_SIZE]; 40 u8 buffer[VZ89X_REG_MEASUREMENT_SIZE];
40}; 41};
41 42
@@ -100,27 +101,60 @@ static int vz89x_measurement_is_valid(struct vz89x_data *data)
100 return !!(data->buffer[VZ89X_REG_MEASUREMENT_SIZE - 1] > 0); 101 return !!(data->buffer[VZ89X_REG_MEASUREMENT_SIZE - 1] > 0);
101} 102}
102 103
103static int vz89x_get_measurement(struct vz89x_data *data) 104static int vz89x_i2c_xfer(struct vz89x_data *data, u8 cmd)
104{ 105{
106 struct i2c_client *client = data->client;
107 struct i2c_msg msg[2];
105 int ret; 108 int ret;
106 int i; 109 u8 buf[3] = { cmd, 0, 0};
107 110
108 /* sensor can only be polled once a second max per datasheet */ 111 msg[0].addr = client->addr;
109 if (!time_after(jiffies, data->last_update + HZ)) 112 msg[0].flags = client->flags;
110 return 0; 113 msg[0].len = 3;
114 msg[0].buf = (char *) &buf;
115
116 msg[1].addr = client->addr;
117 msg[1].flags = client->flags | I2C_M_RD;
118 msg[1].len = VZ89X_REG_MEASUREMENT_SIZE;
119 msg[1].buf = (char *) &data->buffer;
120
121 ret = i2c_transfer(client->adapter, msg, 2);
111 122
112 ret = i2c_smbus_write_word_data(data->client, 123 return (ret == 2) ? 0 : ret;
113 VZ89X_REG_MEASUREMENT, 0); 124}
125
126static int vz89x_smbus_xfer(struct vz89x_data *data, u8 cmd)
127{
128 struct i2c_client *client = data->client;
129 int ret;
130 int i;
131
132 ret = i2c_smbus_write_word_data(client, cmd, 0);
114 if (ret < 0) 133 if (ret < 0)
115 return ret; 134 return ret;
116 135
117 for (i = 0; i < VZ89X_REG_MEASUREMENT_SIZE; i++) { 136 for (i = 0; i < VZ89X_REG_MEASUREMENT_SIZE; i++) {
118 ret = i2c_smbus_read_byte(data->client); 137 ret = i2c_smbus_read_byte(client);
119 if (ret < 0) 138 if (ret < 0)
120 return ret; 139 return ret;
121 data->buffer[i] = ret; 140 data->buffer[i] = ret;
122 } 141 }
123 142
143 return 0;
144}
145
146static int vz89x_get_measurement(struct vz89x_data *data)
147{
148 int ret;
149
150 /* sensor can only be polled once a second max per datasheet */
151 if (!time_after(jiffies, data->last_update + HZ))
152 return 0;
153
154 ret = data->xfer(data, VZ89X_REG_MEASUREMENT);
155 if (ret < 0)
156 return ret;
157
124 ret = vz89x_measurement_is_valid(data); 158 ret = vz89x_measurement_is_valid(data);
125 if (ret) 159 if (ret)
126 return -EAGAIN; 160 return -EAGAIN;
@@ -204,15 +238,19 @@ static int vz89x_probe(struct i2c_client *client,
204 struct iio_dev *indio_dev; 238 struct iio_dev *indio_dev;
205 struct vz89x_data *data; 239 struct vz89x_data *data;
206 240
207 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_WORD_DATA |
208 I2C_FUNC_SMBUS_BYTE))
209 return -ENODEV;
210
211 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 241 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
212 if (!indio_dev) 242 if (!indio_dev)
213 return -ENOMEM; 243 return -ENOMEM;
214
215 data = iio_priv(indio_dev); 244 data = iio_priv(indio_dev);
245
246 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C))
247 data->xfer = vz89x_i2c_xfer;
248 else if (i2c_check_functionality(client->adapter,
249 I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BYTE))
250 data->xfer = vz89x_smbus_xfer;
251 else
252 return -ENOTSUPP;
253
216 i2c_set_clientdata(client, indio_dev); 254 i2c_set_clientdata(client, indio_dev);
217 data->client = client; 255 data->client = client;
218 data->last_update = jiffies - HZ; 256 data->last_update = jiffies - HZ;
diff --git a/drivers/iio/common/st_sensors/st_sensors_core.c b/drivers/iio/common/st_sensors/st_sensors_core.c
index 25258e2c1a82..8447c31e27f2 100644
--- a/drivers/iio/common/st_sensors/st_sensors_core.c
+++ b/drivers/iio/common/st_sensors/st_sensors_core.c
@@ -18,9 +18,6 @@
18#include <asm/unaligned.h> 18#include <asm/unaligned.h>
19#include <linux/iio/common/st_sensors.h> 19#include <linux/iio/common/st_sensors.h>
20 20
21
22#define ST_SENSORS_WAI_ADDRESS 0x0f
23
24static inline u32 st_sensors_get_unaligned_le24(const u8 *p) 21static inline u32 st_sensors_get_unaligned_le24(const u8 *p)
25{ 22{
26 return (s32)((p[0] | p[1] << 8 | p[2] << 16) << 8) >> 8; 23 return (s32)((p[0] | p[1] << 8 | p[2] << 16) << 8) >> 8;
diff --git a/drivers/iio/dummy/Kconfig b/drivers/iio/dummy/Kconfig
index e8676aa97d62..71805ced1aae 100644
--- a/drivers/iio/dummy/Kconfig
+++ b/drivers/iio/dummy/Kconfig
@@ -5,7 +5,8 @@ menu "IIO dummy driver"
5 depends on IIO 5 depends on IIO
6 6
7config IIO_DUMMY_EVGEN 7config IIO_DUMMY_EVGEN
8 tristate 8 select IRQ_WORK
9 tristate
9 10
10config IIO_SIMPLE_DUMMY 11config IIO_SIMPLE_DUMMY
11 tristate "An example driver with no hardware requirements" 12 tristate "An example driver with no hardware requirements"
diff --git a/drivers/iio/health/Kconfig b/drivers/iio/health/Kconfig
new file mode 100644
index 000000000000..a647679da805
--- /dev/null
+++ b/drivers/iio/health/Kconfig
@@ -0,0 +1,21 @@
1#
2# Health sensors
3#
4# When adding new entries keep the list in alphabetical order
5
6menu "Health sensors"
7
8config MAX30100
9 tristate "MAX30100 heart rate and pulse oximeter sensor"
10 depends on I2C
11 select REGMAP_I2C
12 select IIO_BUFFER
13 select IIO_KFIFO_BUF
14 help
15 Say Y here to build I2C interface support for the Maxim
16 MAX30100 heart rate, and pulse oximeter sensor.
17
18 To compile this driver as a module, choose M here: the
19 module will be called max30100.
20
21endmenu
diff --git a/drivers/iio/health/Makefile b/drivers/iio/health/Makefile
new file mode 100644
index 000000000000..7c475d7faad8
--- /dev/null
+++ b/drivers/iio/health/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile for IIO Health sensors
3#
4
5# When adding new entries keep the list in alphabetical order
6
7obj-$(CONFIG_MAX30100) += max30100.o
diff --git a/drivers/iio/health/max30100.c b/drivers/iio/health/max30100.c
new file mode 100644
index 000000000000..9d1c81f91dd7
--- /dev/null
+++ b/drivers/iio/health/max30100.c
@@ -0,0 +1,453 @@
1/*
2 * max30100.c - Support for MAX30100 heart rate and pulse oximeter sensor
3 *
4 * Copyright (C) 2015 Matt Ranostay <mranostay@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * TODO: allow LED current and pulse length controls via device tree properties
17 */
18
19#include <linux/module.h>
20#include <linux/init.h>
21#include <linux/interrupt.h>
22#include <linux/delay.h>
23#include <linux/err.h>
24#include <linux/irq.h>
25#include <linux/i2c.h>
26#include <linux/mutex.h>
27#include <linux/regmap.h>
28#include <linux/iio/iio.h>
29#include <linux/iio/buffer.h>
30#include <linux/iio/kfifo_buf.h>
31
32#define MAX30100_REGMAP_NAME "max30100_regmap"
33#define MAX30100_DRV_NAME "max30100"
34
35#define MAX30100_REG_INT_STATUS 0x00
36#define MAX30100_REG_INT_STATUS_PWR_RDY BIT(0)
37#define MAX30100_REG_INT_STATUS_SPO2_RDY BIT(4)
38#define MAX30100_REG_INT_STATUS_HR_RDY BIT(5)
39#define MAX30100_REG_INT_STATUS_FIFO_RDY BIT(7)
40
41#define MAX30100_REG_INT_ENABLE 0x01
42#define MAX30100_REG_INT_ENABLE_SPO2_EN BIT(0)
43#define MAX30100_REG_INT_ENABLE_HR_EN BIT(1)
44#define MAX30100_REG_INT_ENABLE_FIFO_EN BIT(3)
45#define MAX30100_REG_INT_ENABLE_MASK 0xf0
46#define MAX30100_REG_INT_ENABLE_MASK_SHIFT 4
47
48#define MAX30100_REG_FIFO_WR_PTR 0x02
49#define MAX30100_REG_FIFO_OVR_CTR 0x03
50#define MAX30100_REG_FIFO_RD_PTR 0x04
51#define MAX30100_REG_FIFO_DATA 0x05
52#define MAX30100_REG_FIFO_DATA_ENTRY_COUNT 16
53#define MAX30100_REG_FIFO_DATA_ENTRY_LEN 4
54
55#define MAX30100_REG_MODE_CONFIG 0x06
56#define MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN BIT(0)
57#define MAX30100_REG_MODE_CONFIG_MODE_HR_EN BIT(1)
58#define MAX30100_REG_MODE_CONFIG_MODE_MASK 0x03
59#define MAX30100_REG_MODE_CONFIG_TEMP_EN BIT(3)
60#define MAX30100_REG_MODE_CONFIG_PWR BIT(7)
61
62#define MAX30100_REG_SPO2_CONFIG 0x07
63#define MAX30100_REG_SPO2_CONFIG_100HZ BIT(2)
64#define MAX30100_REG_SPO2_CONFIG_HI_RES_EN BIT(6)
65#define MAX30100_REG_SPO2_CONFIG_1600US 0x3
66
67#define MAX30100_REG_LED_CONFIG 0x09
68#define MAX30100_REG_LED_CONFIG_RED_LED_SHIFT 4
69
70#define MAX30100_REG_LED_CONFIG_24MA 0x07
71#define MAX30100_REG_LED_CONFIG_50MA 0x0f
72
73#define MAX30100_REG_TEMP_INTEGER 0x16
74#define MAX30100_REG_TEMP_FRACTION 0x17
75
76struct max30100_data {
77 struct i2c_client *client;
78 struct iio_dev *indio_dev;
79 struct mutex lock;
80 struct regmap *regmap;
81
82 __be16 buffer[2]; /* 2 16-bit channels */
83};
84
85static bool max30100_is_volatile_reg(struct device *dev, unsigned int reg)
86{
87 switch (reg) {
88 case MAX30100_REG_INT_STATUS:
89 case MAX30100_REG_MODE_CONFIG:
90 case MAX30100_REG_FIFO_WR_PTR:
91 case MAX30100_REG_FIFO_OVR_CTR:
92 case MAX30100_REG_FIFO_RD_PTR:
93 case MAX30100_REG_FIFO_DATA:
94 case MAX30100_REG_TEMP_INTEGER:
95 case MAX30100_REG_TEMP_FRACTION:
96 return true;
97 default:
98 return false;
99 }
100}
101
102static const struct regmap_config max30100_regmap_config = {
103 .name = MAX30100_REGMAP_NAME,
104
105 .reg_bits = 8,
106 .val_bits = 8,
107
108 .max_register = MAX30100_REG_TEMP_FRACTION,
109 .cache_type = REGCACHE_FLAT,
110
111 .volatile_reg = max30100_is_volatile_reg,
112};
113
114static const unsigned long max30100_scan_masks[] = {0x3, 0};
115
116static const struct iio_chan_spec max30100_channels[] = {
117 {
118 .type = IIO_INTENSITY,
119 .channel2 = IIO_MOD_LIGHT_IR,
120 .modified = 1,
121
122 .scan_index = 0,
123 .scan_type = {
124 .sign = 'u',
125 .realbits = 16,
126 .storagebits = 16,
127 .endianness = IIO_BE,
128 },
129 },
130 {
131 .type = IIO_INTENSITY,
132 .channel2 = IIO_MOD_LIGHT_RED,
133 .modified = 1,
134
135 .scan_index = 1,
136 .scan_type = {
137 .sign = 'u',
138 .realbits = 16,
139 .storagebits = 16,
140 .endianness = IIO_BE,
141 },
142 },
143 {
144 .type = IIO_TEMP,
145 .info_mask_separate =
146 BIT(IIO_CHAN_INFO_RAW) | BIT(IIO_CHAN_INFO_SCALE),
147 .scan_index = -1,
148 },
149};
150
151static int max30100_set_powermode(struct max30100_data *data, bool state)
152{
153 return regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
154 MAX30100_REG_MODE_CONFIG_PWR,
155 state ? 0 : MAX30100_REG_MODE_CONFIG_PWR);
156}
157
158static int max30100_clear_fifo(struct max30100_data *data)
159{
160 int ret;
161
162 ret = regmap_write(data->regmap, MAX30100_REG_FIFO_WR_PTR, 0);
163 if (ret)
164 return ret;
165
166 ret = regmap_write(data->regmap, MAX30100_REG_FIFO_OVR_CTR, 0);
167 if (ret)
168 return ret;
169
170 return regmap_write(data->regmap, MAX30100_REG_FIFO_RD_PTR, 0);
171}
172
173static int max30100_buffer_postenable(struct iio_dev *indio_dev)
174{
175 struct max30100_data *data = iio_priv(indio_dev);
176 int ret;
177
178 ret = max30100_set_powermode(data, true);
179 if (ret)
180 return ret;
181
182 return max30100_clear_fifo(data);
183}
184
185static int max30100_buffer_predisable(struct iio_dev *indio_dev)
186{
187 struct max30100_data *data = iio_priv(indio_dev);
188
189 return max30100_set_powermode(data, false);
190}
191
192static const struct iio_buffer_setup_ops max30100_buffer_setup_ops = {
193 .postenable = max30100_buffer_postenable,
194 .predisable = max30100_buffer_predisable,
195};
196
197static inline int max30100_fifo_count(struct max30100_data *data)
198{
199 unsigned int val;
200 int ret;
201
202 ret = regmap_read(data->regmap, MAX30100_REG_INT_STATUS, &val);
203 if (ret)
204 return ret;
205
206 /* FIFO is almost full */
207 if (val & MAX30100_REG_INT_STATUS_FIFO_RDY)
208 return MAX30100_REG_FIFO_DATA_ENTRY_COUNT - 1;
209
210 return 0;
211}
212
213static int max30100_read_measurement(struct max30100_data *data)
214{
215 int ret;
216
217 ret = i2c_smbus_read_i2c_block_data(data->client,
218 MAX30100_REG_FIFO_DATA,
219 MAX30100_REG_FIFO_DATA_ENTRY_LEN,
220 (u8 *) &data->buffer);
221
222 return (ret == MAX30100_REG_FIFO_DATA_ENTRY_LEN) ? 0 : ret;
223}
224
225static irqreturn_t max30100_interrupt_handler(int irq, void *private)
226{
227 struct iio_dev *indio_dev = private;
228 struct max30100_data *data = iio_priv(indio_dev);
229 int ret, cnt = 0;
230
231 mutex_lock(&data->lock);
232
233 while (cnt-- || (cnt = max30100_fifo_count(data) > 0)) {
234 ret = max30100_read_measurement(data);
235 if (ret)
236 break;
237
238 iio_push_to_buffers(data->indio_dev, data->buffer);
239 }
240
241 mutex_unlock(&data->lock);
242
243 return IRQ_HANDLED;
244}
245
246static int max30100_chip_init(struct max30100_data *data)
247{
248 int ret;
249
250 /* RED IR LED = 24mA, IR LED = 50mA */
251 ret = regmap_write(data->regmap, MAX30100_REG_LED_CONFIG,
252 (MAX30100_REG_LED_CONFIG_24MA <<
253 MAX30100_REG_LED_CONFIG_RED_LED_SHIFT) |
254 MAX30100_REG_LED_CONFIG_50MA);
255 if (ret)
256 return ret;
257
258 /* enable hi-res SPO2 readings at 100Hz */
259 ret = regmap_write(data->regmap, MAX30100_REG_SPO2_CONFIG,
260 MAX30100_REG_SPO2_CONFIG_HI_RES_EN |
261 MAX30100_REG_SPO2_CONFIG_100HZ);
262 if (ret)
263 return ret;
264
265 /* enable SPO2 mode */
266 ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
267 MAX30100_REG_MODE_CONFIG_MODE_MASK,
268 MAX30100_REG_MODE_CONFIG_MODE_HR_EN |
269 MAX30100_REG_MODE_CONFIG_MODE_SPO2_EN);
270 if (ret)
271 return ret;
272
273 /* enable FIFO interrupt */
274 return regmap_update_bits(data->regmap, MAX30100_REG_INT_ENABLE,
275 MAX30100_REG_INT_ENABLE_MASK,
276 MAX30100_REG_INT_ENABLE_FIFO_EN
277 << MAX30100_REG_INT_ENABLE_MASK_SHIFT);
278}
279
280static int max30100_read_temp(struct max30100_data *data, int *val)
281{
282 int ret;
283 unsigned int reg;
284
285 ret = regmap_read(data->regmap, MAX30100_REG_TEMP_INTEGER, &reg);
286 if (ret < 0)
287 return ret;
288 *val = reg << 4;
289
290 ret = regmap_read(data->regmap, MAX30100_REG_TEMP_FRACTION, &reg);
291 if (ret < 0)
292 return ret;
293
294 *val |= reg & 0xf;
295 *val = sign_extend32(*val, 11);
296
297 return 0;
298}
299
300static int max30100_get_temp(struct max30100_data *data, int *val)
301{
302 int ret;
303
304 /* start acquisition */
305 ret = regmap_update_bits(data->regmap, MAX30100_REG_MODE_CONFIG,
306 MAX30100_REG_MODE_CONFIG_TEMP_EN,
307 MAX30100_REG_MODE_CONFIG_TEMP_EN);
308 if (ret)
309 return ret;
310
311 usleep_range(35000, 50000);
312
313 return max30100_read_temp(data, val);
314}
315
316static int max30100_read_raw(struct iio_dev *indio_dev,
317 struct iio_chan_spec const *chan,
318 int *val, int *val2, long mask)
319{
320 struct max30100_data *data = iio_priv(indio_dev);
321 int ret = -EINVAL;
322
323 switch (mask) {
324 case IIO_CHAN_INFO_RAW:
325 /*
326 * Temperature reading can only be acquired while engine
327 * is running
328 */
329 mutex_lock(&indio_dev->mlock);
330
331 if (!iio_buffer_enabled(indio_dev))
332 ret = -EAGAIN;
333 else {
334 ret = max30100_get_temp(data, val);
335 if (!ret)
336 ret = IIO_VAL_INT;
337
338 }
339
340 mutex_unlock(&indio_dev->mlock);
341 break;
342 case IIO_CHAN_INFO_SCALE:
343 *val = 1; /* 0.0625 */
344 *val2 = 16;
345 ret = IIO_VAL_FRACTIONAL;
346 break;
347 }
348
349 return ret;
350}
351
352static const struct iio_info max30100_info = {
353 .driver_module = THIS_MODULE,
354 .read_raw = max30100_read_raw,
355};
356
357static int max30100_probe(struct i2c_client *client,
358 const struct i2c_device_id *id)
359{
360 struct max30100_data *data;
361 struct iio_buffer *buffer;
362 struct iio_dev *indio_dev;
363 int ret;
364
365 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
366 if (!indio_dev)
367 return -ENOMEM;
368
369 buffer = devm_iio_kfifo_allocate(&client->dev);
370 if (!buffer)
371 return -ENOMEM;
372
373 iio_device_attach_buffer(indio_dev, buffer);
374
375 indio_dev->name = MAX30100_DRV_NAME;
376 indio_dev->channels = max30100_channels;
377 indio_dev->info = &max30100_info;
378 indio_dev->num_channels = ARRAY_SIZE(max30100_channels);
379 indio_dev->available_scan_masks = max30100_scan_masks;
380 indio_dev->modes = (INDIO_BUFFER_SOFTWARE | INDIO_DIRECT_MODE);
381 indio_dev->setup_ops = &max30100_buffer_setup_ops;
382
383 data = iio_priv(indio_dev);
384 data->indio_dev = indio_dev;
385 data->client = client;
386
387 mutex_init(&data->lock);
388 i2c_set_clientdata(client, indio_dev);
389
390 data->regmap = devm_regmap_init_i2c(client, &max30100_regmap_config);
391 if (IS_ERR(data->regmap)) {
392 dev_err(&client->dev, "regmap initialization failed.\n");
393 return PTR_ERR(data->regmap);
394 }
395 max30100_set_powermode(data, false);
396
397 ret = max30100_chip_init(data);
398 if (ret)
399 return ret;
400
401 if (client->irq <= 0) {
402 dev_err(&client->dev, "no valid irq defined\n");
403 return -EINVAL;
404 }
405 ret = devm_request_threaded_irq(&client->dev, client->irq,
406 NULL, max30100_interrupt_handler,
407 IRQF_TRIGGER_FALLING | IRQF_ONESHOT,
408 "max30100_irq", indio_dev);
409 if (ret) {
410 dev_err(&client->dev, "request irq (%d) failed\n", client->irq);
411 return ret;
412 }
413
414 return iio_device_register(indio_dev);
415}
416
417static int max30100_remove(struct i2c_client *client)
418{
419 struct iio_dev *indio_dev = i2c_get_clientdata(client);
420 struct max30100_data *data = iio_priv(indio_dev);
421
422 iio_device_unregister(indio_dev);
423 max30100_set_powermode(data, false);
424
425 return 0;
426}
427
428static const struct i2c_device_id max30100_id[] = {
429 { "max30100", 0 },
430 {}
431};
432MODULE_DEVICE_TABLE(i2c, max30100_id);
433
434static const struct of_device_id max30100_dt_ids[] = {
435 { .compatible = "maxim,max30100" },
436 { }
437};
438MODULE_DEVICE_TABLE(of, max30100_dt_ids);
439
440static struct i2c_driver max30100_driver = {
441 .driver = {
442 .name = MAX30100_DRV_NAME,
443 .of_match_table = of_match_ptr(max30100_dt_ids),
444 },
445 .probe = max30100_probe,
446 .remove = max30100_remove,
447 .id_table = max30100_id,
448};
449module_i2c_driver(max30100_driver);
450
451MODULE_AUTHOR("Matt Ranostay <mranostay@gmail.com>");
452MODULE_DESCRIPTION("MAX30100 heart rate and pulse oximeter sensor");
453MODULE_LICENSE("GPL");
diff --git a/drivers/iio/industrialio-configfs.c b/drivers/iio/industrialio-configfs.c
new file mode 100644
index 000000000000..45ce2bc47180
--- /dev/null
+++ b/drivers/iio/industrialio-configfs.c
@@ -0,0 +1,51 @@
1/*
2 * Industrial I/O configfs bits
3 *
4 * Copyright (c) 2015 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 */
10
11#include <linux/configfs.h>
12#include <linux/module.h>
13#include <linux/init.h>
14#include <linux/kmod.h>
15#include <linux/slab.h>
16
17#include <linux/iio/iio.h>
18#include <linux/iio/configfs.h>
19
20static struct config_item_type iio_root_group_type = {
21 .ct_owner = THIS_MODULE,
22};
23
24struct configfs_subsystem iio_configfs_subsys = {
25 .su_group = {
26 .cg_item = {
27 .ci_namebuf = "iio",
28 .ci_type = &iio_root_group_type,
29 },
30 },
31 .su_mutex = __MUTEX_INITIALIZER(iio_configfs_subsys.su_mutex),
32};
33EXPORT_SYMBOL(iio_configfs_subsys);
34
35static int __init iio_configfs_init(void)
36{
37 config_group_init(&iio_configfs_subsys.su_group);
38
39 return configfs_register_subsystem(&iio_configfs_subsys);
40}
41module_init(iio_configfs_init);
42
43static void __exit iio_configfs_exit(void)
44{
45 configfs_unregister_subsystem(&iio_configfs_subsys);
46}
47module_exit(iio_configfs_exit);
48
49MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
50MODULE_DESCRIPTION("Industrial I/O configfs support");
51MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/industrialio-sw-trigger.c b/drivers/iio/industrialio-sw-trigger.c
new file mode 100644
index 000000000000..311f9fe5aa34
--- /dev/null
+++ b/drivers/iio/industrialio-sw-trigger.c
@@ -0,0 +1,184 @@
1/*
2 * The Industrial I/O core, software trigger functions
3 *
4 * Copyright (c) 2015 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 */
10
11#include <linux/module.h>
12#include <linux/init.h>
13#include <linux/kmod.h>
14#include <linux/list.h>
15#include <linux/slab.h>
16
17#include <linux/iio/sw_trigger.h>
18#include <linux/iio/configfs.h>
19#include <linux/configfs.h>
20
21static struct config_group *iio_triggers_group;
22static struct config_item_type iio_trigger_type_group_type;
23
24static struct config_item_type iio_triggers_group_type = {
25 .ct_owner = THIS_MODULE,
26};
27
28static LIST_HEAD(iio_trigger_types_list);
29static DEFINE_MUTEX(iio_trigger_types_lock);
30
31static
32struct iio_sw_trigger_type *__iio_find_sw_trigger_type(const char *name,
33 unsigned len)
34{
35 struct iio_sw_trigger_type *t = NULL, *iter;
36
37 list_for_each_entry(iter, &iio_trigger_types_list, list)
38 if (!strcmp(iter->name, name)) {
39 t = iter;
40 break;
41 }
42
43 return t;
44}
45
46int iio_register_sw_trigger_type(struct iio_sw_trigger_type *t)
47{
48 struct iio_sw_trigger_type *iter;
49 int ret = 0;
50
51 mutex_lock(&iio_trigger_types_lock);
52 iter = __iio_find_sw_trigger_type(t->name, strlen(t->name));
53 if (iter)
54 ret = -EBUSY;
55 else
56 list_add_tail(&t->list, &iio_trigger_types_list);
57 mutex_unlock(&iio_trigger_types_lock);
58
59 if (ret)
60 return ret;
61
62 t->group = configfs_register_default_group(iio_triggers_group, t->name,
63 &iio_trigger_type_group_type);
64 if (IS_ERR(t->group))
65 ret = PTR_ERR(t->group);
66
67 return ret;
68}
69EXPORT_SYMBOL(iio_register_sw_trigger_type);
70
71void iio_unregister_sw_trigger_type(struct iio_sw_trigger_type *t)
72{
73 struct iio_sw_trigger_type *iter;
74
75 mutex_lock(&iio_trigger_types_lock);
76 iter = __iio_find_sw_trigger_type(t->name, strlen(t->name));
77 if (iter)
78 list_del(&t->list);
79 mutex_unlock(&iio_trigger_types_lock);
80
81 configfs_unregister_default_group(t->group);
82}
83EXPORT_SYMBOL(iio_unregister_sw_trigger_type);
84
85static
86struct iio_sw_trigger_type *iio_get_sw_trigger_type(const char *name)
87{
88 struct iio_sw_trigger_type *t;
89
90 mutex_lock(&iio_trigger_types_lock);
91 t = __iio_find_sw_trigger_type(name, strlen(name));
92 if (t && !try_module_get(t->owner))
93 t = NULL;
94 mutex_unlock(&iio_trigger_types_lock);
95
96 return t;
97}
98
99struct iio_sw_trigger *iio_sw_trigger_create(const char *type, const char *name)
100{
101 struct iio_sw_trigger *t;
102 struct iio_sw_trigger_type *tt;
103
104 tt = iio_get_sw_trigger_type(type);
105 if (!tt) {
106 pr_err("Invalid trigger type: %s\n", type);
107 return ERR_PTR(-EINVAL);
108 }
109 t = tt->ops->probe(name);
110 if (IS_ERR(t))
111 goto out_module_put;
112
113 t->trigger_type = tt;
114
115 return t;
116out_module_put:
117 module_put(tt->owner);
118 return t;
119}
120EXPORT_SYMBOL(iio_sw_trigger_create);
121
122void iio_sw_trigger_destroy(struct iio_sw_trigger *t)
123{
124 struct iio_sw_trigger_type *tt = t->trigger_type;
125
126 tt->ops->remove(t);
127 module_put(tt->owner);
128}
129EXPORT_SYMBOL(iio_sw_trigger_destroy);
130
131static struct config_group *trigger_make_group(struct config_group *group,
132 const char *name)
133{
134 struct iio_sw_trigger *t;
135
136 t = iio_sw_trigger_create(group->cg_item.ci_name, name);
137 if (IS_ERR(t))
138 return ERR_CAST(t);
139
140 config_item_set_name(&t->group.cg_item, "%s", name);
141
142 return &t->group;
143}
144
145static void trigger_drop_group(struct config_group *group,
146 struct config_item *item)
147{
148 struct iio_sw_trigger *t = to_iio_sw_trigger(item);
149
150 iio_sw_trigger_destroy(t);
151 config_item_put(item);
152}
153
154static struct configfs_group_operations trigger_ops = {
155 .make_group = &trigger_make_group,
156 .drop_item = &trigger_drop_group,
157};
158
159static struct config_item_type iio_trigger_type_group_type = {
160 .ct_group_ops = &trigger_ops,
161 .ct_owner = THIS_MODULE,
162};
163
164static int __init iio_sw_trigger_init(void)
165{
166 iio_triggers_group =
167 configfs_register_default_group(&iio_configfs_subsys.su_group,
168 "triggers",
169 &iio_triggers_group_type);
170 if (IS_ERR(iio_triggers_group))
171 return PTR_ERR(iio_triggers_group);
172 return 0;
173}
174module_init(iio_sw_trigger_init);
175
176static void __exit iio_sw_trigger_exit(void)
177{
178 configfs_unregister_default_group(iio_triggers_group);
179}
180module_exit(iio_sw_trigger_exit);
181
182MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
183MODULE_DESCRIPTION("Industrial I/O software triggers support");
184MODULE_LICENSE("GPL v2");
diff --git a/drivers/iio/inkern.c b/drivers/iio/inkern.c
index c8bad3cf891d..80fbbfd76faf 100644
--- a/drivers/iio/inkern.c
+++ b/drivers/iio/inkern.c
@@ -61,12 +61,10 @@ EXPORT_SYMBOL_GPL(iio_map_array_register);
61int iio_map_array_unregister(struct iio_dev *indio_dev) 61int iio_map_array_unregister(struct iio_dev *indio_dev)
62{ 62{
63 int ret = -ENODEV; 63 int ret = -ENODEV;
64 struct iio_map_internal *mapi; 64 struct iio_map_internal *mapi, *next;
65 struct list_head *pos, *tmp;
66 65
67 mutex_lock(&iio_map_list_lock); 66 mutex_lock(&iio_map_list_lock);
68 list_for_each_safe(pos, tmp, &iio_map_list) { 67 list_for_each_entry_safe(mapi, next, &iio_map_list, l) {
69 mapi = list_entry(pos, struct iio_map_internal, l);
70 if (indio_dev == mapi->indio_dev) { 68 if (indio_dev == mapi->indio_dev) {
71 list_del(&mapi->l); 69 list_del(&mapi->l);
72 kfree(mapi); 70 kfree(mapi);
diff --git a/drivers/iio/light/us5182d.c b/drivers/iio/light/us5182d.c
index 49dab3cb3e23..256c4bc12d21 100644
--- a/drivers/iio/light/us5182d.c
+++ b/drivers/iio/light/us5182d.c
@@ -23,6 +23,8 @@
23#include <linux/iio/iio.h> 23#include <linux/iio/iio.h>
24#include <linux/iio/sysfs.h> 24#include <linux/iio/sysfs.h>
25#include <linux/mutex.h> 25#include <linux/mutex.h>
26#include <linux/pm.h>
27#include <linux/pm_runtime.h>
26 28
27#define US5182D_REG_CFG0 0x00 29#define US5182D_REG_CFG0 0x00
28#define US5182D_CFG0_ONESHOT_EN BIT(6) 30#define US5182D_CFG0_ONESHOT_EN BIT(6)
@@ -81,6 +83,7 @@
81#define US5182D_READ_BYTE 1 83#define US5182D_READ_BYTE 1
82#define US5182D_READ_WORD 2 84#define US5182D_READ_WORD 2
83#define US5182D_OPSTORE_SLEEP_TIME 20 /* ms */ 85#define US5182D_OPSTORE_SLEEP_TIME 20 /* ms */
86#define US5182D_SLEEP_MS 3000 /* ms */
84 87
85/* Available ranges: [12354, 7065, 3998, 2202, 1285, 498, 256, 138] lux */ 88/* Available ranges: [12354, 7065, 3998, 2202, 1285, 498, 256, 138] lux */
86static const int us5182d_scales[] = {188500, 107800, 61000, 33600, 19600, 7600, 89static const int us5182d_scales[] = {188500, 107800, 61000, 33600, 19600, 7600,
@@ -99,6 +102,11 @@ enum mode {
99 US5182D_PX_ONLY 102 US5182D_PX_ONLY
100}; 103};
101 104
105enum pmode {
106 US5182D_CONTINUOUS,
107 US5182D_ONESHOT
108};
109
102struct us5182d_data { 110struct us5182d_data {
103 struct i2c_client *client; 111 struct i2c_client *client;
104 struct mutex lock; 112 struct mutex lock;
@@ -112,6 +120,12 @@ struct us5182d_data {
112 u16 *us5182d_dark_ths; 120 u16 *us5182d_dark_ths;
113 121
114 u8 opmode; 122 u8 opmode;
123 u8 power_mode;
124
125 bool als_enabled;
126 bool px_enabled;
127
128 bool default_continuous;
115}; 129};
116 130
117static IIO_CONST_ATTR(in_illuminance_scale_available, 131static IIO_CONST_ATTR(in_illuminance_scale_available,
@@ -130,13 +144,11 @@ static const struct {
130 u8 reg; 144 u8 reg;
131 u8 val; 145 u8 val;
132} us5182d_regvals[] = { 146} us5182d_regvals[] = {
133 {US5182D_REG_CFG0, (US5182D_CFG0_SHUTDOWN_EN | 147 {US5182D_REG_CFG0, US5182D_CFG0_WORD_ENABLE},
134 US5182D_CFG0_WORD_ENABLE)},
135 {US5182D_REG_CFG1, US5182D_CFG1_ALS_RES16}, 148 {US5182D_REG_CFG1, US5182D_CFG1_ALS_RES16},
136 {US5182D_REG_CFG2, (US5182D_CFG2_PX_RES16 | 149 {US5182D_REG_CFG2, (US5182D_CFG2_PX_RES16 |
137 US5182D_CFG2_PXGAIN_DEFAULT)}, 150 US5182D_CFG2_PXGAIN_DEFAULT)},
138 {US5182D_REG_CFG3, US5182D_CFG3_LED_CURRENT100}, 151 {US5182D_REG_CFG3, US5182D_CFG3_LED_CURRENT100},
139 {US5182D_REG_MODE_STORE, US5182D_STORE_MODE},
140 {US5182D_REG_CFG4, 0x00}, 152 {US5182D_REG_CFG4, 0x00},
141}; 153};
142 154
@@ -169,7 +181,7 @@ static int us5182d_get_als(struct us5182d_data *data)
169 return result; 181 return result;
170} 182}
171 183
172static int us5182d_set_opmode(struct us5182d_data *data, u8 mode) 184static int us5182d_oneshot_en(struct us5182d_data *data)
173{ 185{
174 int ret; 186 int ret;
175 187
@@ -183,6 +195,20 @@ static int us5182d_set_opmode(struct us5182d_data *data, u8 mode)
183 */ 195 */
184 ret = ret | US5182D_CFG0_ONESHOT_EN; 196 ret = ret | US5182D_CFG0_ONESHOT_EN;
185 197
198 return i2c_smbus_write_byte_data(data->client, US5182D_REG_CFG0, ret);
199}
200
201static int us5182d_set_opmode(struct us5182d_data *data, u8 mode)
202{
203 int ret;
204
205 if (mode == data->opmode)
206 return 0;
207
208 ret = i2c_smbus_read_byte_data(data->client, US5182D_REG_CFG0);
209 if (ret < 0)
210 return ret;
211
186 /* update mode */ 212 /* update mode */
187 ret = ret & ~US5182D_OPMODE_MASK; 213 ret = ret & ~US5182D_OPMODE_MASK;
188 ret = ret | (mode << US5182D_OPMODE_SHIFT); 214 ret = ret | (mode << US5182D_OPMODE_SHIFT);
@@ -196,9 +222,6 @@ static int us5182d_set_opmode(struct us5182d_data *data, u8 mode)
196 if (ret < 0) 222 if (ret < 0)
197 return ret; 223 return ret;
198 224
199 if (mode == data->opmode)
200 return 0;
201
202 ret = i2c_smbus_write_byte_data(data->client, US5182D_REG_MODE_STORE, 225 ret = i2c_smbus_write_byte_data(data->client, US5182D_REG_MODE_STORE,
203 US5182D_STORE_MODE); 226 US5182D_STORE_MODE);
204 if (ret < 0) 227 if (ret < 0)
@@ -210,6 +233,96 @@ static int us5182d_set_opmode(struct us5182d_data *data, u8 mode)
210 return 0; 233 return 0;
211} 234}
212 235
236static int us5182d_als_enable(struct us5182d_data *data)
237{
238 int ret;
239 u8 mode;
240
241 if (data->power_mode == US5182D_ONESHOT)
242 return us5182d_set_opmode(data, US5182D_ALS_ONLY);
243
244 if (data->als_enabled)
245 return 0;
246
247 mode = data->px_enabled ? US5182D_ALS_PX : US5182D_ALS_ONLY;
248
249 ret = us5182d_set_opmode(data, mode);
250 if (ret < 0)
251 return ret;
252
253 data->als_enabled = true;
254
255 return 0;
256}
257
258static int us5182d_px_enable(struct us5182d_data *data)
259{
260 int ret;
261 u8 mode;
262
263 if (data->power_mode == US5182D_ONESHOT)
264 return us5182d_set_opmode(data, US5182D_PX_ONLY);
265
266 if (data->px_enabled)
267 return 0;
268
269 mode = data->als_enabled ? US5182D_ALS_PX : US5182D_PX_ONLY;
270
271 ret = us5182d_set_opmode(data, mode);
272 if (ret < 0)
273 return ret;
274
275 data->px_enabled = true;
276
277 return 0;
278}
279
280static int us5182d_shutdown_en(struct us5182d_data *data, u8 state)
281{
282 int ret;
283
284 if (data->power_mode == US5182D_ONESHOT)
285 return 0;
286
287 ret = i2c_smbus_read_byte_data(data->client, US5182D_REG_CFG0);
288 if (ret < 0)
289 return ret;
290
291 ret = ret & ~US5182D_CFG0_SHUTDOWN_EN;
292 ret = ret | state;
293
294 ret = i2c_smbus_write_byte_data(data->client, US5182D_REG_CFG0, ret);
295 if (ret < 0)
296 return ret;
297
298 if (state & US5182D_CFG0_SHUTDOWN_EN) {
299 data->als_enabled = false;
300 data->px_enabled = false;
301 }
302
303 return ret;
304}
305
306
307static int us5182d_set_power_state(struct us5182d_data *data, bool on)
308{
309 int ret;
310
311 if (data->power_mode == US5182D_ONESHOT)
312 return 0;
313
314 if (on) {
315 ret = pm_runtime_get_sync(&data->client->dev);
316 if (ret < 0)
317 pm_runtime_put_noidle(&data->client->dev);
318 } else {
319 pm_runtime_mark_last_busy(&data->client->dev);
320 ret = pm_runtime_put_autosuspend(&data->client->dev);
321 }
322
323 return ret;
324}
325
213static int us5182d_read_raw(struct iio_dev *indio_dev, 326static int us5182d_read_raw(struct iio_dev *indio_dev,
214 struct iio_chan_spec const *chan, int *val, 327 struct iio_chan_spec const *chan, int *val,
215 int *val2, long mask) 328 int *val2, long mask)
@@ -222,29 +335,49 @@ static int us5182d_read_raw(struct iio_dev *indio_dev,
222 switch (chan->type) { 335 switch (chan->type) {
223 case IIO_LIGHT: 336 case IIO_LIGHT:
224 mutex_lock(&data->lock); 337 mutex_lock(&data->lock);
225 ret = us5182d_set_opmode(data, US5182D_OPMODE_ALS); 338 if (data->power_mode == US5182D_ONESHOT) {
339 ret = us5182d_oneshot_en(data);
340 if (ret < 0)
341 goto out_err;
342 }
343 ret = us5182d_set_power_state(data, true);
226 if (ret < 0) 344 if (ret < 0)
227 goto out_err; 345 goto out_err;
228 346 ret = us5182d_als_enable(data);
347 if (ret < 0)
348 goto out_poweroff;
229 ret = us5182d_get_als(data); 349 ret = us5182d_get_als(data);
230 if (ret < 0) 350 if (ret < 0)
351 goto out_poweroff;
352 *val = ret;
353 ret = us5182d_set_power_state(data, false);
354 if (ret < 0)
231 goto out_err; 355 goto out_err;
232 mutex_unlock(&data->lock); 356 mutex_unlock(&data->lock);
233 *val = ret;
234 return IIO_VAL_INT; 357 return IIO_VAL_INT;
235 case IIO_PROXIMITY: 358 case IIO_PROXIMITY:
236 mutex_lock(&data->lock); 359 mutex_lock(&data->lock);
237 ret = us5182d_set_opmode(data, US5182D_OPMODE_PX); 360 if (data->power_mode == US5182D_ONESHOT) {
361 ret = us5182d_oneshot_en(data);
362 if (ret < 0)
363 goto out_err;
364 }
365 ret = us5182d_set_power_state(data, true);
238 if (ret < 0) 366 if (ret < 0)
239 goto out_err; 367 goto out_err;
240 368 ret = us5182d_px_enable(data);
369 if (ret < 0)
370 goto out_poweroff;
241 ret = i2c_smbus_read_word_data(data->client, 371 ret = i2c_smbus_read_word_data(data->client,
242 US5182D_REG_PDL); 372 US5182D_REG_PDL);
243 if (ret < 0) 373 if (ret < 0)
374 goto out_poweroff;
375 *val = ret;
376 ret = us5182d_set_power_state(data, false);
377 if (ret < 0)
244 goto out_err; 378 goto out_err;
245 mutex_unlock(&data->lock); 379 mutex_unlock(&data->lock);
246 *val = ret; 380 return IIO_VAL_INT;
247 return IIO_VAL_INT;
248 default: 381 default:
249 return -EINVAL; 382 return -EINVAL;
250 } 383 }
@@ -263,6 +396,9 @@ static int us5182d_read_raw(struct iio_dev *indio_dev,
263 } 396 }
264 397
265 return -EINVAL; 398 return -EINVAL;
399
400out_poweroff:
401 us5182d_set_power_state(data, false);
266out_err: 402out_err:
267 mutex_unlock(&data->lock); 403 mutex_unlock(&data->lock);
268 return ret; 404 return ret;
@@ -368,6 +504,7 @@ static int us5182d_init(struct iio_dev *indio_dev)
368 return ret; 504 return ret;
369 505
370 data->opmode = 0; 506 data->opmode = 0;
507 data->power_mode = US5182D_CONTINUOUS;
371 for (i = 0; i < ARRAY_SIZE(us5182d_regvals); i++) { 508 for (i = 0; i < ARRAY_SIZE(us5182d_regvals); i++) {
372 ret = i2c_smbus_write_byte_data(data->client, 509 ret = i2c_smbus_write_byte_data(data->client,
373 us5182d_regvals[i].reg, 510 us5182d_regvals[i].reg,
@@ -376,7 +513,17 @@ static int us5182d_init(struct iio_dev *indio_dev)
376 return ret; 513 return ret;
377 } 514 }
378 515
379 return 0; 516 data->als_enabled = true;
517 data->px_enabled = true;
518
519 if (!data->default_continuous) {
520 ret = us5182d_shutdown_en(data, US5182D_CFG0_SHUTDOWN_EN);
521 if (ret < 0)
522 return ret;
523 data->power_mode = US5182D_ONESHOT;
524 }
525
526 return ret;
380} 527}
381 528
382static void us5182d_get_platform_data(struct iio_dev *indio_dev) 529static void us5182d_get_platform_data(struct iio_dev *indio_dev)
@@ -399,6 +546,8 @@ static void us5182d_get_platform_data(struct iio_dev *indio_dev)
399 "upisemi,lower-dark-gain", 546 "upisemi,lower-dark-gain",
400 &data->lower_dark_gain)) 547 &data->lower_dark_gain))
401 data->lower_dark_gain = US5182D_REG_AUTO_LDARK_GAIN_DEFAULT; 548 data->lower_dark_gain = US5182D_REG_AUTO_LDARK_GAIN_DEFAULT;
549 data->default_continuous = device_property_read_bool(&data->client->dev,
550 "upisemi,continuous");
402} 551}
403 552
404static int us5182d_dark_gain_config(struct iio_dev *indio_dev) 553static int us5182d_dark_gain_config(struct iio_dev *indio_dev)
@@ -464,18 +613,73 @@ static int us5182d_probe(struct i2c_client *client,
464 613
465 ret = us5182d_dark_gain_config(indio_dev); 614 ret = us5182d_dark_gain_config(indio_dev);
466 if (ret < 0) 615 if (ret < 0)
467 return ret; 616 goto out_err;
617
618 if (data->default_continuous) {
619 pm_runtime_set_active(&client->dev);
620 if (ret < 0)
621 goto out_err;
622 }
623
624 pm_runtime_enable(&client->dev);
625 pm_runtime_set_autosuspend_delay(&client->dev,
626 US5182D_SLEEP_MS);
627 pm_runtime_use_autosuspend(&client->dev);
628
629 ret = iio_device_register(indio_dev);
630 if (ret < 0)
631 goto out_err;
632
633 return 0;
634
635out_err:
636 us5182d_shutdown_en(data, US5182D_CFG0_SHUTDOWN_EN);
637 return ret;
468 638
469 return iio_device_register(indio_dev);
470} 639}
471 640
472static int us5182d_remove(struct i2c_client *client) 641static int us5182d_remove(struct i2c_client *client)
473{ 642{
643 struct us5182d_data *data = iio_priv(i2c_get_clientdata(client));
644
474 iio_device_unregister(i2c_get_clientdata(client)); 645 iio_device_unregister(i2c_get_clientdata(client));
475 return i2c_smbus_write_byte_data(client, US5182D_REG_CFG0, 646
476 US5182D_CFG0_SHUTDOWN_EN); 647 pm_runtime_disable(&client->dev);
648 pm_runtime_set_suspended(&client->dev);
649
650 return us5182d_shutdown_en(data, US5182D_CFG0_SHUTDOWN_EN);
477} 651}
478 652
653#if defined(CONFIG_PM_SLEEP) || defined(CONFIG_PM)
654static int us5182d_suspend(struct device *dev)
655{
656 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
657 struct us5182d_data *data = iio_priv(indio_dev);
658
659 if (data->power_mode == US5182D_CONTINUOUS)
660 return us5182d_shutdown_en(data, US5182D_CFG0_SHUTDOWN_EN);
661
662 return 0;
663}
664
665static int us5182d_resume(struct device *dev)
666{
667 struct iio_dev *indio_dev = i2c_get_clientdata(to_i2c_client(dev));
668 struct us5182d_data *data = iio_priv(indio_dev);
669
670 if (data->power_mode == US5182D_CONTINUOUS)
671 return us5182d_shutdown_en(data,
672 ~US5182D_CFG0_SHUTDOWN_EN & 0xff);
673
674 return 0;
675}
676#endif
677
678static const struct dev_pm_ops us5182d_pm_ops = {
679 SET_SYSTEM_SLEEP_PM_OPS(us5182d_suspend, us5182d_resume)
680 SET_RUNTIME_PM_OPS(us5182d_suspend, us5182d_resume, NULL)
681};
682
479static const struct acpi_device_id us5182d_acpi_match[] = { 683static const struct acpi_device_id us5182d_acpi_match[] = {
480 { "USD5182", 0}, 684 { "USD5182", 0},
481 {} 685 {}
@@ -493,6 +697,7 @@ MODULE_DEVICE_TABLE(i2c, us5182d_id);
493static struct i2c_driver us5182d_driver = { 697static struct i2c_driver us5182d_driver = {
494 .driver = { 698 .driver = {
495 .name = US5182D_DRV_NAME, 699 .name = US5182D_DRV_NAME,
700 .pm = &us5182d_pm_ops,
496 .acpi_match_table = ACPI_PTR(us5182d_acpi_match), 701 .acpi_match_table = ACPI_PTR(us5182d_acpi_match),
497 }, 702 },
498 .probe = us5182d_probe, 703 .probe = us5182d_probe,
diff --git a/drivers/iio/proximity/pulsedlight-lidar-lite-v2.c b/drivers/iio/proximity/pulsedlight-lidar-lite-v2.c
index 29ac262f591b..93e29fb67fa0 100644
--- a/drivers/iio/proximity/pulsedlight-lidar-lite-v2.c
+++ b/drivers/iio/proximity/pulsedlight-lidar-lite-v2.c
@@ -36,8 +36,10 @@
36#define LIDAR_REG_STATUS_INVALID BIT(3) 36#define LIDAR_REG_STATUS_INVALID BIT(3)
37#define LIDAR_REG_STATUS_READY BIT(0) 37#define LIDAR_REG_STATUS_READY BIT(0)
38 38
39#define LIDAR_REG_DATA_HBYTE 0x0f 39#define LIDAR_REG_DATA_HBYTE 0x0f
40#define LIDAR_REG_DATA_LBYTE 0x10 40#define LIDAR_REG_DATA_LBYTE 0x10
41#define LIDAR_REG_DATA_WORD_READ BIT(7)
42
41#define LIDAR_REG_PWR_CONTROL 0x65 43#define LIDAR_REG_PWR_CONTROL 0x65
42 44
43#define LIDAR_DRV_NAME "lidar" 45#define LIDAR_DRV_NAME "lidar"
@@ -46,6 +48,9 @@ struct lidar_data {
46 struct iio_dev *indio_dev; 48 struct iio_dev *indio_dev;
47 struct i2c_client *client; 49 struct i2c_client *client;
48 50
51 int (*xfer)(struct lidar_data *data, u8 reg, u8 *val, int len);
52 int i2c_enabled;
53
49 u16 buffer[8]; /* 2 byte distance + 8 byte timestamp */ 54 u16 buffer[8]; /* 2 byte distance + 8 byte timestamp */
50}; 55};
51 56
@@ -64,7 +69,28 @@ static const struct iio_chan_spec lidar_channels[] = {
64 IIO_CHAN_SOFT_TIMESTAMP(1), 69 IIO_CHAN_SOFT_TIMESTAMP(1),
65}; 70};
66 71
67static int lidar_read_byte(struct lidar_data *data, int reg) 72static int lidar_i2c_xfer(struct lidar_data *data, u8 reg, u8 *val, int len)
73{
74 struct i2c_client *client = data->client;
75 struct i2c_msg msg[2];
76 int ret;
77
78 msg[0].addr = client->addr;
79 msg[0].flags = client->flags | I2C_M_STOP;
80 msg[0].len = 1;
81 msg[0].buf = (char *) &reg;
82
83 msg[1].addr = client->addr;
84 msg[1].flags = client->flags | I2C_M_RD;
85 msg[1].len = len;
86 msg[1].buf = (char *) val;
87
88 ret = i2c_transfer(client->adapter, msg, 2);
89
90 return (ret == 2) ? 0 : ret;
91}
92
93static int lidar_smbus_xfer(struct lidar_data *data, u8 reg, u8 *val, int len)
68{ 94{
69 struct i2c_client *client = data->client; 95 struct i2c_client *client = data->client;
70 int ret; 96 int ret;
@@ -74,17 +100,35 @@ static int lidar_read_byte(struct lidar_data *data, int reg)
74 * so in turn i2c_smbus_read_byte_data cannot be used 100 * so in turn i2c_smbus_read_byte_data cannot be used
75 */ 101 */
76 102
77 ret = i2c_smbus_write_byte(client, reg); 103 while (len--) {
78 if (ret < 0) { 104 ret = i2c_smbus_write_byte(client, reg++);
79 dev_err(&client->dev, "cannot write addr value"); 105 if (ret < 0) {
80 return ret; 106 dev_err(&client->dev, "cannot write addr value");
107 return ret;
108 }
109
110 ret = i2c_smbus_read_byte(client);
111 if (ret < 0) {
112 dev_err(&client->dev, "cannot read data value");
113 return ret;
114 }
115
116 *(val++) = ret;
81 } 117 }
82 118
83 ret = i2c_smbus_read_byte(client); 119 return 0;
120}
121
122static int lidar_read_byte(struct lidar_data *data, u8 reg)
123{
124 int ret;
125 u8 val;
126
127 ret = data->xfer(data, reg, &val, 1);
84 if (ret < 0) 128 if (ret < 0)
85 dev_err(&client->dev, "cannot read data value"); 129 return ret;
86 130
87 return ret; 131 return val;
88} 132}
89 133
90static inline int lidar_write_control(struct lidar_data *data, int val) 134static inline int lidar_write_control(struct lidar_data *data, int val)
@@ -100,22 +144,14 @@ static inline int lidar_write_power(struct lidar_data *data, int val)
100 144
101static int lidar_read_measurement(struct lidar_data *data, u16 *reg) 145static int lidar_read_measurement(struct lidar_data *data, u16 *reg)
102{ 146{
103 int ret; 147 int ret = data->xfer(data, LIDAR_REG_DATA_HBYTE |
104 int val; 148 (data->i2c_enabled ? LIDAR_REG_DATA_WORD_READ : 0),
105 149 (u8 *) reg, 2);
106 ret = lidar_read_byte(data, LIDAR_REG_DATA_HBYTE);
107 if (ret < 0)
108 return ret;
109 val = ret << 8;
110 150
111 ret = lidar_read_byte(data, LIDAR_REG_DATA_LBYTE); 151 if (!ret)
112 if (ret < 0) 152 *reg = be16_to_cpu(*reg);
113 return ret;
114 153
115 val |= ret; 154 return ret;
116 *reg = val;
117
118 return 0;
119} 155}
120 156
121static int lidar_get_measurement(struct lidar_data *data, u16 *reg) 157static int lidar_get_measurement(struct lidar_data *data, u16 *reg)
@@ -233,6 +269,16 @@ static int lidar_probe(struct i2c_client *client,
233 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data)); 269 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
234 if (!indio_dev) 270 if (!indio_dev)
235 return -ENOMEM; 271 return -ENOMEM;
272 data = iio_priv(indio_dev);
273
274 if (i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) {
275 data->xfer = lidar_i2c_xfer;
276 data->i2c_enabled = 1;
277 } else if (i2c_check_functionality(client->adapter,
278 I2C_FUNC_SMBUS_WORD_DATA | I2C_FUNC_SMBUS_BYTE))
279 data->xfer = lidar_smbus_xfer;
280 else
281 return -ENOTSUPP;
236 282
237 indio_dev->info = &lidar_info; 283 indio_dev->info = &lidar_info;
238 indio_dev->name = LIDAR_DRV_NAME; 284 indio_dev->name = LIDAR_DRV_NAME;
@@ -240,7 +286,6 @@ static int lidar_probe(struct i2c_client *client,
240 indio_dev->num_channels = ARRAY_SIZE(lidar_channels); 286 indio_dev->num_channels = ARRAY_SIZE(lidar_channels);
241 indio_dev->modes = INDIO_DIRECT_MODE; 287 indio_dev->modes = INDIO_DIRECT_MODE;
242 288
243 data = iio_priv(indio_dev);
244 i2c_set_clientdata(client, indio_dev); 289 i2c_set_clientdata(client, indio_dev);
245 290
246 data->client = client; 291 data->client = client;
diff --git a/drivers/iio/trigger/Kconfig b/drivers/iio/trigger/Kconfig
index 79996123a71b..519e6772f6f5 100644
--- a/drivers/iio/trigger/Kconfig
+++ b/drivers/iio/trigger/Kconfig
@@ -5,6 +5,16 @@
5 5
6menu "Triggers - standalone" 6menu "Triggers - standalone"
7 7
8config IIO_HRTIMER_TRIGGER
9 tristate "High resolution timer trigger"
10 depends on IIO_SW_TRIGGER
11 help
12 Provides a frequency based IIO trigger using high resolution
13 timers as interrupt source.
14
15 To compile this driver as a module, choose M here: the
16 module will be called iio-trig-hrtimer.
17
8config IIO_INTERRUPT_TRIGGER 18config IIO_INTERRUPT_TRIGGER
9 tristate "Generic interrupt trigger" 19 tristate "Generic interrupt trigger"
10 help 20 help
diff --git a/drivers/iio/trigger/Makefile b/drivers/iio/trigger/Makefile
index 0694daecaf22..fe06eb564367 100644
--- a/drivers/iio/trigger/Makefile
+++ b/drivers/iio/trigger/Makefile
@@ -3,5 +3,7 @@
3# 3#
4 4
5# When adding new entries keep the list in alphabetical order 5# When adding new entries keep the list in alphabetical order
6
7obj-$(CONFIG_IIO_HRTIMER_TRIGGER) += iio-trig-hrtimer.o
6obj-$(CONFIG_IIO_INTERRUPT_TRIGGER) += iio-trig-interrupt.o 8obj-$(CONFIG_IIO_INTERRUPT_TRIGGER) += iio-trig-interrupt.o
7obj-$(CONFIG_IIO_SYSFS_TRIGGER) += iio-trig-sysfs.o 9obj-$(CONFIG_IIO_SYSFS_TRIGGER) += iio-trig-sysfs.o
diff --git a/drivers/iio/trigger/iio-trig-hrtimer.c b/drivers/iio/trigger/iio-trig-hrtimer.c
new file mode 100644
index 000000000000..5e6d451febeb
--- /dev/null
+++ b/drivers/iio/trigger/iio-trig-hrtimer.c
@@ -0,0 +1,193 @@
1/**
2 * The industrial I/O periodic hrtimer trigger driver
3 *
4 * Copyright (C) Intuitive Aerial AB
5 * Written by Marten Svanfeldt, marten@intuitiveaerial.com
6 * Copyright (C) 2012, Analog Device Inc.
7 * Author: Lars-Peter Clausen <lars@metafoo.de>
8 * Copyright (C) 2015, Intel Corporation
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published by
12 * the Free Software Foundation.
13 *
14 */
15#include <linux/kernel.h>
16#include <linux/slab.h>
17#include <linux/hrtimer.h>
18
19#include <linux/iio/iio.h>
20#include <linux/iio/trigger.h>
21#include <linux/iio/sw_trigger.h>
22
23/* default sampling frequency - 100Hz */
24#define HRTIMER_DEFAULT_SAMPLING_FREQUENCY 100
25
26struct iio_hrtimer_info {
27 struct iio_sw_trigger swt;
28 struct hrtimer timer;
29 unsigned long sampling_frequency;
30 ktime_t period;
31};
32
33static struct config_item_type iio_hrtimer_type = {
34 .ct_owner = THIS_MODULE,
35};
36
37static
38ssize_t iio_hrtimer_show_sampling_frequency(struct device *dev,
39 struct device_attribute *attr,
40 char *buf)
41{
42 struct iio_trigger *trig = to_iio_trigger(dev);
43 struct iio_hrtimer_info *info = iio_trigger_get_drvdata(trig);
44
45 return snprintf(buf, PAGE_SIZE, "%lu\n", info->sampling_frequency);
46}
47
48static
49ssize_t iio_hrtimer_store_sampling_frequency(struct device *dev,
50 struct device_attribute *attr,
51 const char *buf, size_t len)
52{
53 struct iio_trigger *trig = to_iio_trigger(dev);
54 struct iio_hrtimer_info *info = iio_trigger_get_drvdata(trig);
55 unsigned long val;
56 int ret;
57
58 ret = kstrtoul(buf, 10, &val);
59 if (ret)
60 return ret;
61
62 if (!val || val > NSEC_PER_SEC)
63 return -EINVAL;
64
65 info->sampling_frequency = val;
66 info->period = ktime_set(0, NSEC_PER_SEC / val);
67
68 return len;
69}
70
71static DEVICE_ATTR(sampling_frequency, S_IRUGO | S_IWUSR,
72 iio_hrtimer_show_sampling_frequency,
73 iio_hrtimer_store_sampling_frequency);
74
75static struct attribute *iio_hrtimer_attrs[] = {
76 &dev_attr_sampling_frequency.attr,
77 NULL
78};
79
80static const struct attribute_group iio_hrtimer_attr_group = {
81 .attrs = iio_hrtimer_attrs,
82};
83
84static const struct attribute_group *iio_hrtimer_attr_groups[] = {
85 &iio_hrtimer_attr_group,
86 NULL
87};
88
89static enum hrtimer_restart iio_hrtimer_trig_handler(struct hrtimer *timer)
90{
91 struct iio_hrtimer_info *info;
92
93 info = container_of(timer, struct iio_hrtimer_info, timer);
94
95 hrtimer_forward_now(timer, info->period);
96 iio_trigger_poll(info->swt.trigger);
97
98 return HRTIMER_RESTART;
99}
100
101static int iio_trig_hrtimer_set_state(struct iio_trigger *trig, bool state)
102{
103 struct iio_hrtimer_info *trig_info;
104
105 trig_info = iio_trigger_get_drvdata(trig);
106
107 if (state)
108 hrtimer_start(&trig_info->timer, trig_info->period,
109 HRTIMER_MODE_REL);
110 else
111 hrtimer_cancel(&trig_info->timer);
112
113 return 0;
114}
115
116static const struct iio_trigger_ops iio_hrtimer_trigger_ops = {
117 .owner = THIS_MODULE,
118 .set_trigger_state = iio_trig_hrtimer_set_state,
119};
120
121static struct iio_sw_trigger *iio_trig_hrtimer_probe(const char *name)
122{
123 struct iio_hrtimer_info *trig_info;
124 int ret;
125
126 trig_info = kzalloc(sizeof(*trig_info), GFP_KERNEL);
127 if (!trig_info)
128 return ERR_PTR(-ENOMEM);
129
130 trig_info->swt.trigger = iio_trigger_alloc("%s", name);
131 if (!trig_info->swt.trigger) {
132 ret = -ENOMEM;
133 goto err_free_trig_info;
134 }
135
136 iio_trigger_set_drvdata(trig_info->swt.trigger, trig_info);
137 trig_info->swt.trigger->ops = &iio_hrtimer_trigger_ops;
138 trig_info->swt.trigger->dev.groups = iio_hrtimer_attr_groups;
139
140 hrtimer_init(&trig_info->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL);
141 trig_info->timer.function = iio_hrtimer_trig_handler;
142
143 trig_info->sampling_frequency = HRTIMER_DEFAULT_SAMPLING_FREQUENCY;
144 trig_info->period = ktime_set(0, NSEC_PER_SEC /
145 trig_info->sampling_frequency);
146
147 ret = iio_trigger_register(trig_info->swt.trigger);
148 if (ret)
149 goto err_free_trigger;
150
151 iio_swt_group_init_type_name(&trig_info->swt, name, &iio_hrtimer_type);
152 return &trig_info->swt;
153err_free_trigger:
154 iio_trigger_free(trig_info->swt.trigger);
155err_free_trig_info:
156 kfree(trig_info);
157
158 return ERR_PTR(ret);
159}
160
161static int iio_trig_hrtimer_remove(struct iio_sw_trigger *swt)
162{
163 struct iio_hrtimer_info *trig_info;
164
165 trig_info = iio_trigger_get_drvdata(swt->trigger);
166
167 iio_trigger_unregister(swt->trigger);
168
169 /* cancel the timer after unreg to make sure no one rearms it */
170 hrtimer_cancel(&trig_info->timer);
171 iio_trigger_free(swt->trigger);
172 kfree(trig_info);
173
174 return 0;
175}
176
177static const struct iio_sw_trigger_ops iio_trig_hrtimer_ops = {
178 .probe = iio_trig_hrtimer_probe,
179 .remove = iio_trig_hrtimer_remove,
180};
181
182static struct iio_sw_trigger_type iio_trig_hrtimer = {
183 .name = "hrtimer",
184 .owner = THIS_MODULE,
185 .ops = &iio_trig_hrtimer_ops,
186};
187
188module_iio_sw_trigger_driver(iio_trig_hrtimer);
189
190MODULE_AUTHOR("Marten Svanfeldt <marten@intuitiveaerial.com>");
191MODULE_AUTHOR("Daniel Baluta <daniel.baluta@intel.com>");
192MODULE_DESCRIPTION("Periodic hrtimer trigger for the IIO subsystem");
193MODULE_LICENSE("GPL v2");
diff --git a/drivers/staging/iio/adc/ad7192.c b/drivers/staging/iio/adc/ad7192.c
index bb40f3728742..92211039ffa9 100644
--- a/drivers/staging/iio/adc/ad7192.c
+++ b/drivers/staging/iio/adc/ad7192.c
@@ -609,7 +609,7 @@ static const struct iio_chan_spec ad7192_channels[] = {
609 609
610static int ad7192_probe(struct spi_device *spi) 610static int ad7192_probe(struct spi_device *spi)
611{ 611{
612 const struct ad7192_platform_data *pdata = spi->dev.platform_data; 612 const struct ad7192_platform_data *pdata = dev_get_platdata(&spi->dev);
613 struct ad7192_state *st; 613 struct ad7192_state *st;
614 struct iio_dev *indio_dev; 614 struct iio_dev *indio_dev;
615 int ret, voltage_uv = 0; 615 int ret, voltage_uv = 0;
diff --git a/drivers/staging/iio/adc/ad7280a.c b/drivers/staging/iio/adc/ad7280a.c
index 35acb1a4669b..f45ebedb7a05 100644
--- a/drivers/staging/iio/adc/ad7280a.c
+++ b/drivers/staging/iio/adc/ad7280a.c
@@ -833,7 +833,7 @@ static const struct ad7280_platform_data ad7793_default_pdata = {
833 833
834static int ad7280_probe(struct spi_device *spi) 834static int ad7280_probe(struct spi_device *spi)
835{ 835{
836 const struct ad7280_platform_data *pdata = spi->dev.platform_data; 836 const struct ad7280_platform_data *pdata = dev_get_platdata(&spi->dev);
837 struct ad7280_state *st; 837 struct ad7280_state *st;
838 int ret; 838 int ret;
839 const unsigned short tACQ_ns[4] = {465, 1010, 1460, 1890}; 839 const unsigned short tACQ_ns[4] = {465, 1010, 1460, 1890};
diff --git a/drivers/staging/iio/adc/ad7816.c b/drivers/staging/iio/adc/ad7816.c
index c8e156646528..22260512cf01 100644
--- a/drivers/staging/iio/adc/ad7816.c
+++ b/drivers/staging/iio/adc/ad7816.c
@@ -345,7 +345,7 @@ static int ad7816_probe(struct spi_device *spi_dev)
345{ 345{
346 struct ad7816_chip_info *chip; 346 struct ad7816_chip_info *chip;
347 struct iio_dev *indio_dev; 347 struct iio_dev *indio_dev;
348 unsigned short *pins = spi_dev->dev.platform_data; 348 unsigned short *pins = dev_get_platdata(&spi_dev->dev);
349 int ret = 0; 349 int ret = 0;
350 int i; 350 int i;
351 351
diff --git a/drivers/staging/iio/frequency/ad9832.c b/drivers/staging/iio/frequency/ad9832.c
index 2b65faa6296a..18b27a1984b2 100644
--- a/drivers/staging/iio/frequency/ad9832.c
+++ b/drivers/staging/iio/frequency/ad9832.c
@@ -201,7 +201,7 @@ static const struct iio_info ad9832_info = {
201 201
202static int ad9832_probe(struct spi_device *spi) 202static int ad9832_probe(struct spi_device *spi)
203{ 203{
204 struct ad9832_platform_data *pdata = spi->dev.platform_data; 204 struct ad9832_platform_data *pdata = dev_get_platdata(&spi->dev);
205 struct iio_dev *indio_dev; 205 struct iio_dev *indio_dev;
206 struct ad9832_state *st; 206 struct ad9832_state *st;
207 struct regulator *reg; 207 struct regulator *reg;
diff --git a/drivers/staging/iio/frequency/ad9834.c b/drivers/staging/iio/frequency/ad9834.c
index 6464f2cbe94b..6366216e4f37 100644
--- a/drivers/staging/iio/frequency/ad9834.c
+++ b/drivers/staging/iio/frequency/ad9834.c
@@ -318,7 +318,7 @@ static const struct iio_info ad9833_info = {
318 318
319static int ad9834_probe(struct spi_device *spi) 319static int ad9834_probe(struct spi_device *spi)
320{ 320{
321 struct ad9834_platform_data *pdata = spi->dev.platform_data; 321 struct ad9834_platform_data *pdata = dev_get_platdata(&spi->dev);
322 struct ad9834_state *st; 322 struct ad9834_state *st;
323 struct iio_dev *indio_dev; 323 struct iio_dev *indio_dev;
324 struct regulator *reg; 324 struct regulator *reg;
diff --git a/drivers/staging/iio/light/tsl2x7x_core.c b/drivers/staging/iio/light/tsl2x7x_core.c
index 9dfd04855a1b..5b1c1650a0e4 100644
--- a/drivers/staging/iio/light/tsl2x7x_core.c
+++ b/drivers/staging/iio/light/tsl2x7x_core.c
@@ -1898,7 +1898,7 @@ static int tsl2x7x_probe(struct i2c_client *clientp,
1898 mutex_init(&chip->prox_mutex); 1898 mutex_init(&chip->prox_mutex);
1899 1899
1900 chip->tsl2x7x_chip_status = TSL2X7X_CHIP_UNKNOWN; 1900 chip->tsl2x7x_chip_status = TSL2X7X_CHIP_UNKNOWN;
1901 chip->pdata = clientp->dev.platform_data; 1901 chip->pdata = dev_get_platdata(&clientp->dev);
1902 chip->id = id->driver_data; 1902 chip->id = id->driver_data;
1903 chip->chip_info = 1903 chip->chip_info =
1904 &tsl2x7x_chip_info_tbl[device_channel_config[id->driver_data]]; 1904 &tsl2x7x_chip_info_tbl[device_channel_config[id->driver_data]];
diff --git a/include/linux/iio/configfs.h b/include/linux/iio/configfs.h
new file mode 100644
index 000000000000..93befd67c15c
--- /dev/null
+++ b/include/linux/iio/configfs.h
@@ -0,0 +1,15 @@
1/*
2 * Industrial I/O configfs support
3 *
4 * Copyright (c) 2015 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 */
10#ifndef __IIO_CONFIGFS
11#define __IIO_CONFIGFS
12
13extern struct configfs_subsystem iio_configfs_subsys;
14
15#endif /* __IIO_CONFIGFS */
diff --git a/include/linux/iio/sw_trigger.h b/include/linux/iio/sw_trigger.h
new file mode 100644
index 000000000000..5198f8ed08a4
--- /dev/null
+++ b/include/linux/iio/sw_trigger.h
@@ -0,0 +1,70 @@
1/*
2 * Industrial I/O software trigger interface
3 *
4 * Copyright (c) 2015 Intel Corporation
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License version 2 as published by
8 * the Free Software Foundation.
9 */
10
11#ifndef __IIO_SW_TRIGGER
12#define __IIO_SW_TRIGGER
13
14#include <linux/module.h>
15#include <linux/device.h>
16#include <linux/iio/iio.h>
17#include <linux/configfs.h>
18
19#define module_iio_sw_trigger_driver(__iio_sw_trigger_type) \
20 module_driver(__iio_sw_trigger_type, iio_register_sw_trigger_type, \
21 iio_unregister_sw_trigger_type)
22
23struct iio_sw_trigger_ops;
24
25struct iio_sw_trigger_type {
26 const char *name;
27 struct module *owner;
28 const struct iio_sw_trigger_ops *ops;
29 struct list_head list;
30 struct config_group *group;
31};
32
33struct iio_sw_trigger {
34 struct iio_trigger *trigger;
35 struct iio_sw_trigger_type *trigger_type;
36 struct config_group group;
37};
38
39struct iio_sw_trigger_ops {
40 struct iio_sw_trigger* (*probe)(const char *);
41 int (*remove)(struct iio_sw_trigger *);
42};
43
44static inline
45struct iio_sw_trigger *to_iio_sw_trigger(struct config_item *item)
46{
47 return container_of(to_config_group(item), struct iio_sw_trigger,
48 group);
49}
50
51int iio_register_sw_trigger_type(struct iio_sw_trigger_type *tt);
52void iio_unregister_sw_trigger_type(struct iio_sw_trigger_type *tt);
53
54struct iio_sw_trigger *iio_sw_trigger_create(const char *, const char *);
55void iio_sw_trigger_destroy(struct iio_sw_trigger *);
56
57int iio_sw_trigger_type_configfs_register(struct iio_sw_trigger_type *tt);
58void iio_sw_trigger_type_configfs_unregister(struct iio_sw_trigger_type *tt);
59
60static inline
61void iio_swt_group_init_type_name(struct iio_sw_trigger *t,
62 const char *name,
63 struct config_item_type *type)
64{
65#ifdef CONFIG_CONFIGFS_FS
66 config_group_init_type_name(&t->group, name, type);
67#endif
68}
69
70#endif /* __IIO_SW_TRIGGER */
generated by cgit v1.2.2 (git 2.25.0) at 2025-08-24 17:14:53 -0400