diff options
author | Ben Dooks <ben.dooks@codethink.co.uk> | 2016-06-21 06:20:30 -0400 |
---|---|---|
committer | Jason Cooper <jason@lakedaemon.net> | 2016-06-23 14:28:00 -0400 |
commit | 353332855eef20dc5ae8cd42aaafb4750748f90b (patch) | |
tree | b66755f4ed930f0a892a42e1fd5b7de41dd47fa7 | |
parent | 2a4fe14bc8da0af53076fa90ac34738c7b55fc3b (diff) |
irqchip/s3c24xx: Fixup IO accessors for big endian
Instead of using the __raw accessors, use the _relaxed versions
to deal with any issues due to endian-ness of the CPU.
Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk>
[jac: reformat subject line, fix commit message typo]
Link: https://lkml.kernel.org/r/1466504432-24187-10-git-send-email-ben.dooks@codethink.co.uk
Signed-off-by: Jason Cooper <jason@lakedaemon.net>
-rw-r--r-- | drivers/irqchip/irq-s3c24xx.c | 36 |
1 files changed, 18 insertions, 18 deletions
diff --git a/drivers/irqchip/irq-s3c24xx.c b/drivers/irqchip/irq-s3c24xx.c index 5dc5a760c723..c25ce5af091a 100644 --- a/drivers/irqchip/irq-s3c24xx.c +++ b/drivers/irqchip/irq-s3c24xx.c | |||
@@ -92,9 +92,9 @@ static void s3c_irq_mask(struct irq_data *data) | |||
92 | unsigned long mask; | 92 | unsigned long mask; |
93 | unsigned int irqno; | 93 | unsigned int irqno; |
94 | 94 | ||
95 | mask = __raw_readl(intc->reg_mask); | 95 | mask = readl_relaxed(intc->reg_mask); |
96 | mask |= (1UL << irq_data->offset); | 96 | mask |= (1UL << irq_data->offset); |
97 | __raw_writel(mask, intc->reg_mask); | 97 | writel_relaxed(mask, intc->reg_mask); |
98 | 98 | ||
99 | if (parent_intc) { | 99 | if (parent_intc) { |
100 | parent_data = &parent_intc->irqs[irq_data->parent_irq]; | 100 | parent_data = &parent_intc->irqs[irq_data->parent_irq]; |
@@ -119,9 +119,9 @@ static void s3c_irq_unmask(struct irq_data *data) | |||
119 | unsigned long mask; | 119 | unsigned long mask; |
120 | unsigned int irqno; | 120 | unsigned int irqno; |
121 | 121 | ||
122 | mask = __raw_readl(intc->reg_mask); | 122 | mask = readl_relaxed(intc->reg_mask); |
123 | mask &= ~(1UL << irq_data->offset); | 123 | mask &= ~(1UL << irq_data->offset); |
124 | __raw_writel(mask, intc->reg_mask); | 124 | writel_relaxed(mask, intc->reg_mask); |
125 | 125 | ||
126 | if (parent_intc) { | 126 | if (parent_intc) { |
127 | irqno = irq_find_mapping(parent_intc->domain, | 127 | irqno = irq_find_mapping(parent_intc->domain, |
@@ -136,9 +136,9 @@ static inline void s3c_irq_ack(struct irq_data *data) | |||
136 | struct s3c_irq_intc *intc = irq_data->intc; | 136 | struct s3c_irq_intc *intc = irq_data->intc; |
137 | unsigned long bitval = 1UL << irq_data->offset; | 137 | unsigned long bitval = 1UL << irq_data->offset; |
138 | 138 | ||
139 | __raw_writel(bitval, intc->reg_pending); | 139 | writel_relaxed(bitval, intc->reg_pending); |
140 | if (intc->reg_intpnd) | 140 | if (intc->reg_intpnd) |
141 | __raw_writel(bitval, intc->reg_intpnd); | 141 | writel_relaxed(bitval, intc->reg_intpnd); |
142 | } | 142 | } |
143 | 143 | ||
144 | static int s3c_irq_type(struct irq_data *data, unsigned int type) | 144 | static int s3c_irq_type(struct irq_data *data, unsigned int type) |
@@ -172,9 +172,9 @@ static int s3c_irqext_type_set(void __iomem *gpcon_reg, | |||
172 | unsigned long newvalue = 0, value; | 172 | unsigned long newvalue = 0, value; |
173 | 173 | ||
174 | /* Set the GPIO to external interrupt mode */ | 174 | /* Set the GPIO to external interrupt mode */ |
175 | value = __raw_readl(gpcon_reg); | 175 | value = readl_relaxed(gpcon_reg); |
176 | value = (value & ~(3 << gpcon_offset)) | (0x02 << gpcon_offset); | 176 | value = (value & ~(3 << gpcon_offset)) | (0x02 << gpcon_offset); |
177 | __raw_writel(value, gpcon_reg); | 177 | writel_relaxed(value, gpcon_reg); |
178 | 178 | ||
179 | /* Set the external interrupt to pointed trigger type */ | 179 | /* Set the external interrupt to pointed trigger type */ |
180 | switch (type) | 180 | switch (type) |
@@ -208,9 +208,9 @@ static int s3c_irqext_type_set(void __iomem *gpcon_reg, | |||
208 | return -EINVAL; | 208 | return -EINVAL; |
209 | } | 209 | } |
210 | 210 | ||
211 | value = __raw_readl(extint_reg); | 211 | value = readl_relaxed(extint_reg); |
212 | value = (value & ~(7 << extint_offset)) | (newvalue << extint_offset); | 212 | value = (value & ~(7 << extint_offset)) | (newvalue << extint_offset); |
213 | __raw_writel(value, extint_reg); | 213 | writel_relaxed(value, extint_reg); |
214 | 214 | ||
215 | return 0; | 215 | return 0; |
216 | } | 216 | } |
@@ -315,8 +315,8 @@ static void s3c_irq_demux(struct irq_desc *desc) | |||
315 | 315 | ||
316 | chained_irq_enter(chip, desc); | 316 | chained_irq_enter(chip, desc); |
317 | 317 | ||
318 | src = __raw_readl(sub_intc->reg_pending); | 318 | src = readl_relaxed(sub_intc->reg_pending); |
319 | msk = __raw_readl(sub_intc->reg_mask); | 319 | msk = readl_relaxed(sub_intc->reg_mask); |
320 | 320 | ||
321 | src &= ~msk; | 321 | src &= ~msk; |
322 | src &= irq_data->sub_bits; | 322 | src &= irq_data->sub_bits; |
@@ -337,7 +337,7 @@ static inline int s3c24xx_handle_intc(struct s3c_irq_intc *intc, | |||
337 | int pnd; | 337 | int pnd; |
338 | int offset; | 338 | int offset; |
339 | 339 | ||
340 | pnd = __raw_readl(intc->reg_intpnd); | 340 | pnd = readl_relaxed(intc->reg_intpnd); |
341 | if (!pnd) | 341 | if (!pnd) |
342 | return false; | 342 | return false; |
343 | 343 | ||
@@ -352,7 +352,7 @@ static inline int s3c24xx_handle_intc(struct s3c_irq_intc *intc, | |||
352 | * | 352 | * |
353 | * Thanks to Klaus, Shannon, et al for helping to debug this problem | 353 | * Thanks to Klaus, Shannon, et al for helping to debug this problem |
354 | */ | 354 | */ |
355 | offset = __raw_readl(intc->reg_intpnd + 4); | 355 | offset = readl_relaxed(intc->reg_intpnd + 4); |
356 | 356 | ||
357 | /* Find the bit manually, when the offset is wrong. | 357 | /* Find the bit manually, when the offset is wrong. |
358 | * The pending register only ever contains the one bit of the next | 358 | * The pending register only ever contains the one bit of the next |
@@ -406,7 +406,7 @@ int s3c24xx_set_fiq(unsigned int irq, bool on) | |||
406 | intmod = 0; | 406 | intmod = 0; |
407 | } | 407 | } |
408 | 408 | ||
409 | __raw_writel(intmod, S3C2410_INTMOD); | 409 | writel_relaxed(intmod, S3C2410_INTMOD); |
410 | return 0; | 410 | return 0; |
411 | } | 411 | } |
412 | 412 | ||
@@ -508,14 +508,14 @@ static void s3c24xx_clear_intc(struct s3c_irq_intc *intc) | |||
508 | 508 | ||
509 | last = 0; | 509 | last = 0; |
510 | for (i = 0; i < 4; i++) { | 510 | for (i = 0; i < 4; i++) { |
511 | pend = __raw_readl(reg_source); | 511 | pend = readl_relaxed(reg_source); |
512 | 512 | ||
513 | if (pend == 0 || pend == last) | 513 | if (pend == 0 || pend == last) |
514 | break; | 514 | break; |
515 | 515 | ||
516 | __raw_writel(pend, intc->reg_pending); | 516 | writel_relaxed(pend, intc->reg_pending); |
517 | if (intc->reg_intpnd) | 517 | if (intc->reg_intpnd) |
518 | __raw_writel(pend, intc->reg_intpnd); | 518 | writel_relaxed(pend, intc->reg_intpnd); |
519 | 519 | ||
520 | pr_info("irq: clearing pending status %08x\n", (int)pend); | 520 | pr_info("irq: clearing pending status %08x\n", (int)pend); |
521 | last = pend; | 521 | last = pend; |