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authorArtem Bityutskiy <artem.bityutskiy@linux.intel.com>2015-03-25 05:03:07 -0400
committerArtem Bityutskiy <artem.bityutskiy@linux.intel.com>2015-03-25 05:03:07 -0400
commit3527a86b7ae17c949307d00e1eb7087604bca1b4 (patch)
tree8e8eab905e7e73a3bf2c4d47abd356166533c9db
parentb388e6a7a6ba988998ddd83919ae8d3debf1a13d (diff)
parentbc465aa9d045feb0e13b4a8f32cc33c1943f62d6 (diff)
Merge tag 'v4.0-rc5' into linux-next
Merge the upstream -rc5 tag because we needed a more up-to-date base our further work.
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-rw-r--r--mm/shmem.c7
-rw-r--r--mm/vmalloc.c1
-rw-r--r--net/9p/trans_virtio.c24
-rw-r--r--net/bridge/br.c2
-rw-r--r--net/bridge/br_if.c2
-rw-r--r--net/caif/caif_socket.c2
-rw-r--r--net/caif/cffrml.c2
-rw-r--r--net/caif/cfpkt_skbuff.c6
-rw-r--r--net/can/af_can.c3
-rw-r--r--net/compat.c9
-rw-r--r--net/core/dev.c2
-rw-r--r--net/core/ethtool.c1
-rw-r--r--net/core/gen_stats.c15
-rw-r--r--net/core/pktgen.c3
-rw-r--r--net/core/rtnetlink.c41
-rw-r--r--net/core/skbuff.c15
-rw-r--r--net/core/sock.c4
-rw-r--r--net/core/sysctl_net_core.c10
-rw-r--r--net/decnet/dn_route.c2
-rw-r--r--net/hsr/hsr_device.c3
-rw-r--r--net/hsr/hsr_main.c4
-rw-r--r--net/hsr/hsr_slave.c10
-rw-r--r--net/ipv4/inet_connection_sock.c1
-rw-r--r--net/ipv4/inet_diag.c18
-rw-r--r--net/ipv4/ip_forward.c1
-rw-r--r--net/ipv4/ip_fragment.c11
-rw-r--r--net/ipv4/ip_output.c3
-rw-r--r--net/ipv4/ip_sockglue.c33
-rw-r--r--net/ipv4/ping.c12
-rw-r--r--net/ipv4/tcp.c10
-rw-r--r--net/ipv4/tcp_cong.c6
-rw-r--r--net/ipv4/tcp_cubic.c6
-rw-r--r--net/ipv4/tcp_input.c2
-rw-r--r--net/ipv4/xfrm4_output.c2
-rw-r--r--net/ipv6/addrconf.c17
-rw-r--r--net/ipv6/datagram.c39
-rw-r--r--net/ipv6/ip6_output.c4
-rw-r--r--net/ipv6/ip6_tunnel.c33
-rw-r--r--net/ipv6/ping.c5
-rw-r--r--net/ipv6/xfrm6_output.c2
-rw-r--r--net/ipv6/xfrm6_policy.c1
-rw-r--r--net/irda/ircomm/ircomm_tty.c6
-rw-r--r--net/irda/irnet/irnet_ppp.c4
-rw-r--r--net/mac80211/chan.c5
-rw-r--r--net/mac80211/ieee80211_i.h24
-rw-r--r--net/mac80211/mlme.c16
-rw-r--r--net/mac80211/rc80211_minstrel.c2
-rw-r--r--net/mac80211/rx.c3
-rw-r--r--net/mac80211/tx.c1
-rw-r--r--net/mac80211/util.c2
-rw-r--r--net/netfilter/ipvs/ip_vs_ctl.c2
-rw-r--r--net/netfilter/ipvs/ip_vs_sync.c3
-rw-r--r--net/netfilter/nf_tables_api.c61
-rw-r--r--net/netfilter/nft_compat.c26
-rw-r--r--net/netfilter/nft_hash.c2
-rw-r--r--net/netfilter/xt_recent.c11
-rw-r--r--net/netfilter/xt_socket.c21
-rw-r--r--net/netlink/af_netlink.c2
-rw-r--r--net/openvswitch/datapath.c45
-rw-r--r--net/openvswitch/flow_netlink.c8
-rw-r--r--net/openvswitch/vport.h2
-rw-r--r--net/packet/af_packet.c42
-rw-r--r--net/rds/iw_rdma.c40
-rw-r--r--net/rxrpc/ar-ack.c9
-rw-r--r--net/rxrpc/ar-error.c4
-rw-r--r--net/rxrpc/ar-recvmsg.c2
-rw-r--r--net/sched/act_bpf.c36
-rw-r--r--net/sched/cls_u32.c5
-rw-r--r--net/sched/ematch.c1
-rw-r--r--net/sunrpc/auth_gss/gss_rpc_upcall.c2
-rw-r--r--net/sunrpc/auth_gss/svcauth_gss.c2
-rw-r--r--net/sunrpc/backchannel_rqst.c5
-rw-r--r--net/sunrpc/cache.c2
-rw-r--r--net/sunrpc/xprtrdma/rpc_rdma.c3
-rw-r--r--net/sunrpc/xprtrdma/xprt_rdma.h2
-rw-r--r--net/tipc/link.c7
-rw-r--r--net/tipc/socket.c2
-rw-r--r--net/wireless/core.c1
-rw-r--r--net/wireless/nl80211.c22
-rw-r--r--net/wireless/reg.c2
-rw-r--r--net/xfrm/xfrm_policy.c12
-rw-r--r--scripts/gdb/linux/__init__.py1
-rw-r--r--security/apparmor/include/apparmor.h4
-rw-r--r--security/apparmor/lsm.c20
-rw-r--r--security/apparmor/path.c2
-rw-r--r--security/inode.c2
-rw-r--r--security/selinux/hooks.c8
-rw-r--r--security/smack/smack_lsm.c4
-rw-r--r--security/tomoyo/file.c4
-rw-r--r--sound/core/control.c4
-rw-r--r--sound/core/pcm_native.c2
-rw-r--r--sound/core/seq/seq_midi_emul.c3
-rw-r--r--sound/drivers/opl3/opl3_midi.c2
-rw-r--r--sound/firewire/amdtp.c5
-rw-r--r--sound/firewire/bebob/bebob.c20
-rw-r--r--sound/firewire/bebob/bebob_stream.c16
-rw-r--r--sound/firewire/dice/dice-stream.c18
-rw-r--r--sound/firewire/dice/dice.c16
-rw-r--r--sound/firewire/fireworks/fireworks.c20
-rw-r--r--sound/firewire/fireworks/fireworks_stream.c19
-rw-r--r--sound/firewire/iso-resources.c3
-rw-r--r--sound/firewire/oxfw/oxfw-stream.c11
-rw-r--r--sound/firewire/oxfw/oxfw.c21
-rw-r--r--sound/isa/msnd/msnd_pinnacle_mixer.c3
-rw-r--r--sound/pci/hda/hda_controller.c7
-rw-r--r--sound/pci/hda/hda_generic.c47
-rw-r--r--sound/pci/hda/hda_intel.c2
-rw-r--r--sound/pci/hda/hda_proc.c38
-rw-r--r--sound/pci/hda/hda_tegra.c4
-rw-r--r--sound/pci/hda/patch_cirrus.c2
-rw-r--r--sound/pci/hda/patch_conexant.c11
-rw-r--r--sound/pci/hda/patch_realtek.c8
-rw-r--r--sound/pci/hda/patch_sigmatel.c17
-rw-r--r--sound/pci/rme9652/hdspm.c6
-rw-r--r--sound/soc/atmel/sam9g20_wm8731.c68
-rw-r--r--sound/soc/cirrus/Kconfig2
-rw-r--r--sound/soc/codecs/Kconfig2
-rw-r--r--sound/soc/codecs/adav80x.c4
-rw-r--r--sound/soc/codecs/ak4641.c4
-rw-r--r--sound/soc/codecs/ak4671.c44
-rw-r--r--sound/soc/codecs/cs4271.c4
-rw-r--r--sound/soc/codecs/da732x.c8
-rw-r--r--sound/soc/codecs/es8328.c4
-rw-r--r--sound/soc/codecs/max98357a.c12
-rw-r--r--sound/soc/codecs/pcm1681.c4
-rw-r--r--sound/soc/codecs/rt286.c2
-rw-r--r--sound/soc/codecs/rt5670.c7
-rw-r--r--sound/soc/codecs/rt5677.c32
-rw-r--r--sound/soc/codecs/sgtl5000.c8
-rw-r--r--sound/soc/codecs/sn95031.c4
-rw-r--r--sound/soc/codecs/sta32x.c6
-rw-r--r--sound/soc/codecs/tas5086.c4
-rw-r--r--sound/soc/codecs/wm2000.c8
-rw-r--r--sound/soc/codecs/wm8731.c4
-rw-r--r--sound/soc/codecs/wm8903.c4
-rw-r--r--sound/soc/codecs/wm8904.c4
-rw-r--r--sound/soc/codecs/wm8955.c4
-rw-r--r--sound/soc/codecs/wm8960.c4
-rw-r--r--sound/soc/codecs/wm9712.c6
-rw-r--r--sound/soc/codecs/wm9713.c6
-rw-r--r--sound/soc/fsl/fsl_spdif.c4
-rw-r--r--sound/soc/fsl/fsl_ssi.c15
-rw-r--r--sound/soc/generic/simple-card.c5
-rw-r--r--sound/soc/intel/sst-atom-controls.h2
-rw-r--r--sound/soc/intel/sst-haswell-dsp.c3
-rw-r--r--sound/soc/intel/sst-haswell-ipc.c32
-rw-r--r--sound/soc/intel/sst-haswell-pcm.c3
-rw-r--r--sound/soc/intel/sst/sst.c10
-rw-r--r--sound/soc/kirkwood/kirkwood-i2s.c2
-rw-r--r--sound/soc/omap/omap-hdmi-audio.c3
-rw-r--r--sound/soc/omap/omap-mcbsp.c11
-rw-r--r--sound/soc/omap/omap-pcm.c2
-rw-r--r--sound/soc/samsung/Kconfig10
-rw-r--r--sound/soc/sh/rcar/core.c4
-rw-r--r--sound/soc/soc-core.c41
-rw-r--r--sound/usb/clock.c5
-rw-r--r--sound/usb/line6/driver.c14
-rw-r--r--sound/usb/line6/driver.h8
-rw-r--r--sound/usb/line6/playback.c6
-rw-r--r--sound/usb/quirks-table.h30
-rw-r--r--sound/usb/quirks.c8
-rw-r--r--sound/usb/quirks.h2
-rw-r--r--tools/perf/bench/mem-memcpy.c4
-rw-r--r--tools/perf/config/Makefile.arch4
-rw-r--r--tools/perf/config/feature-checks/Makefile2
-rw-r--r--tools/perf/config/feature-checks/test-pthread-attr-setaffinity-np.c3
-rw-r--r--tools/perf/util/annotate.c2
-rw-r--r--tools/perf/util/cloexec.c18
-rw-r--r--tools/perf/util/evlist.h2
-rw-r--r--tools/perf/util/symbol-elf.c5
-rw-r--r--tools/power/cpupower/Makefile2
-rw-r--r--tools/testing/selftests/exec/execveat.c10
-rw-r--r--tools/thermal/tmon/.gitignore1
-rw-r--r--tools/thermal/tmon/Makefile15
-rw-r--r--tools/thermal/tmon/tmon.82
-rw-r--r--tools/thermal/tmon/tmon.c14
-rw-r--r--tools/thermal/tmon/tui.c45
-rw-r--r--virt/kvm/arm/vgic-v2.c8
-rw-r--r--virt/kvm/arm/vgic-v3.c8
-rw-r--r--virt/kvm/arm/vgic.c22
-rw-r--r--virt/kvm/kvm_main.c1
1510 files changed, 38074 insertions, 17224 deletions
diff --git a/Documentation/CodeOfConflict b/Documentation/CodeOfConflict
new file mode 100644
index 000000000000..1684d0b4efa6
--- /dev/null
+++ b/Documentation/CodeOfConflict
@@ -0,0 +1,27 @@
1Code of Conflict
2----------------
3
4The Linux kernel development effort is a very personal process compared
5to "traditional" ways of developing software. Your code and ideas
6behind it will be carefully reviewed, often resulting in critique and
7criticism. The review will almost always require improvements to the
8code before it can be included in the kernel. Know that this happens
9because everyone involved wants to see the best possible solution for
10the overall success of Linux. This development process has been proven
11to create the most robust operating system kernel ever, and we do not
12want to do anything to cause the quality of submission and eventual
13result to ever decrease.
14
15If however, anyone feels personally abused, threatened, or otherwise
16uncomfortable due to this process, that is not acceptable. If so,
17please contact the Linux Foundation's Technical Advisory Board at
18<tab@lists.linux-foundation.org>, or the individual members, and they
19will work to resolve the issue to the best of their ability. For more
20information on who is on the Technical Advisory Board and what their
21role is, please see:
22 http://www.linuxfoundation.org/programs/advisory-councils/tab
23
24As a reviewer of code, please strive to keep things civil and focused on
25the technical issues involved. We are all humans, and frustrations can
26be high on both sides of the process. Try to keep in mind the immortal
27words of Bill and Ted, "Be excellent to each other."
diff --git a/Documentation/DocBook/kgdb.tmpl b/Documentation/DocBook/kgdb.tmpl
index 2428cc04dbc8..f3abca7ec53d 100644
--- a/Documentation/DocBook/kgdb.tmpl
+++ b/Documentation/DocBook/kgdb.tmpl
@@ -197,6 +197,7 @@
197 may be configured as a kernel built-in or a kernel loadable module. 197 may be configured as a kernel built-in or a kernel loadable module.
198 You can only make use of <constant>kgdbwait</constant> and early 198 You can only make use of <constant>kgdbwait</constant> and early
199 debugging if you build kgdboc into the kernel as a built-in. 199 debugging if you build kgdboc into the kernel as a built-in.
200 </para>
200 <para>Optionally you can elect to activate kms (Kernel Mode 201 <para>Optionally you can elect to activate kms (Kernel Mode
201 Setting) integration. When you use kms with kgdboc and you have a 202 Setting) integration. When you use kms with kgdboc and you have a
202 video driver that has atomic mode setting hooks, it is possible to 203 video driver that has atomic mode setting hooks, it is possible to
@@ -206,7 +207,6 @@
206 crashes or doing analysis of memory with kdb while allowing the 207 crashes or doing analysis of memory with kdb while allowing the
207 full graphics console applications to run. 208 full graphics console applications to run.
208 </para> 209 </para>
209 </para>
210 <sect2 id="kgdbocArgs"> 210 <sect2 id="kgdbocArgs">
211 <title>kgdboc arguments</title> 211 <title>kgdboc arguments</title>
212 <para>Usage: <constant>kgdboc=[kms][[,]kbd][[,]serial_device][,baud]</constant></para> 212 <para>Usage: <constant>kgdboc=[kms][[,]kbd][[,]serial_device][,baud]</constant></para>
@@ -284,7 +284,6 @@
284 </listitem> 284 </listitem>
285 </orderedlist> 285 </orderedlist>
286 </para> 286 </para>
287 </sect3>
288 <para>NOTE: Kgdboc does not support interrupting the target via the 287 <para>NOTE: Kgdboc does not support interrupting the target via the
289 gdb remote protocol. You must manually send a sysrq-g unless you 288 gdb remote protocol. You must manually send a sysrq-g unless you
290 have a proxy that splits console output to a terminal program. 289 have a proxy that splits console output to a terminal program.
@@ -305,6 +304,7 @@
305 as well as on the initial connect, or to use a debugger proxy that 304 as well as on the initial connect, or to use a debugger proxy that
306 allows an unmodified gdb to do the debugging. 305 allows an unmodified gdb to do the debugging.
307 </para> 306 </para>
307 </sect3>
308 </sect2> 308 </sect2>
309 </sect1> 309 </sect1>
310 <sect1 id="kgdbwait"> 310 <sect1 id="kgdbwait">
@@ -350,12 +350,12 @@
350 </para> 350 </para>
351 </listitem> 351 </listitem>
352 </orderedlist> 352 </orderedlist>
353 </para>
353 <para>IMPORTANT NOTE: You cannot use kgdboc + kgdbcon on a tty that is an 354 <para>IMPORTANT NOTE: You cannot use kgdboc + kgdbcon on a tty that is an
354 active system console. An example of incorrect usage is <constant>console=ttyS0,115200 kgdboc=ttyS0 kgdbcon</constant> 355 active system console. An example of incorrect usage is <constant>console=ttyS0,115200 kgdboc=ttyS0 kgdbcon</constant>
355 </para> 356 </para>
356 <para>It is possible to use this option with kgdboc on a tty that is not a system console. 357 <para>It is possible to use this option with kgdboc on a tty that is not a system console.
357 </para> 358 </para>
358 </para>
359 </sect1> 359 </sect1>
360 <sect1 id="kgdbreboot"> 360 <sect1 id="kgdbreboot">
361 <title>Run time parameter: kgdbreboot</title> 361 <title>Run time parameter: kgdbreboot</title>
diff --git a/Documentation/cgroups/unified-hierarchy.txt b/Documentation/cgroups/unified-hierarchy.txt
index 71daa35ec2d9..eb102fb72213 100644
--- a/Documentation/cgroups/unified-hierarchy.txt
+++ b/Documentation/cgroups/unified-hierarchy.txt
@@ -404,8 +404,8 @@ supported and the interface files "release_agent" and
404 be understood as an underflow into the highest possible value, -2 or 404 be understood as an underflow into the highest possible value, -2 or
405 -10M etc. do not work, so it's not consistent. 405 -10M etc. do not work, so it's not consistent.
406 406
407 memory.low, memory.high, and memory.max will use the string 407 memory.low, memory.high, and memory.max will use the string "max" to
408 "infinity" to indicate and set the highest possible value. 408 indicate and set the highest possible value.
409 409
4105. Planned Changes 4105. Planned Changes
411 411
diff --git a/Documentation/clk.txt b/Documentation/clk.txt
index 4ff84623d5e1..0e4f90aa1c13 100644
--- a/Documentation/clk.txt
+++ b/Documentation/clk.txt
@@ -73,6 +73,8 @@ the operations defined in clk.h:
73 unsigned long *parent_rate); 73 unsigned long *parent_rate);
74 long (*determine_rate)(struct clk_hw *hw, 74 long (*determine_rate)(struct clk_hw *hw,
75 unsigned long rate, 75 unsigned long rate,
76 unsigned long min_rate,
77 unsigned long max_rate,
76 unsigned long *best_parent_rate, 78 unsigned long *best_parent_rate,
77 struct clk_hw **best_parent_clk); 79 struct clk_hw **best_parent_clk);
78 int (*set_parent)(struct clk_hw *hw, u8 index); 80 int (*set_parent)(struct clk_hw *hw, u8 index);
diff --git a/Documentation/device-mapper/dm-crypt.txt b/Documentation/device-mapper/dm-crypt.txt
index c81839b52c4d..ad697781f9ac 100644
--- a/Documentation/device-mapper/dm-crypt.txt
+++ b/Documentation/device-mapper/dm-crypt.txt
@@ -51,7 +51,7 @@ Parameters: <cipher> <key> <iv_offset> <device path> \
51 Otherwise #opt_params is the number of following arguments. 51 Otherwise #opt_params is the number of following arguments.
52 52
53 Example of optional parameters section: 53 Example of optional parameters section:
54 1 allow_discards 54 3 allow_discards same_cpu_crypt submit_from_crypt_cpus
55 55
56allow_discards 56allow_discards
57 Block discard requests (a.k.a. TRIM) are passed through the crypt device. 57 Block discard requests (a.k.a. TRIM) are passed through the crypt device.
@@ -63,6 +63,19 @@ allow_discards
63 used space etc.) if the discarded blocks can be located easily on the 63 used space etc.) if the discarded blocks can be located easily on the
64 device later. 64 device later.
65 65
66same_cpu_crypt
67 Perform encryption using the same cpu that IO was submitted on.
68 The default is to use an unbound workqueue so that encryption work
69 is automatically balanced between available CPUs.
70
71submit_from_crypt_cpus
72 Disable offloading writes to a separate thread after encryption.
73 There are some situations where offloading write bios from the
74 encryption threads to a single thread degrades performance
75 significantly. The default is to offload write bios to the same
76 thread because it benefits CFQ to have writes submitted using the
77 same context.
78
66Example scripts 79Example scripts
67=============== 80===============
68LUKS (Linux Unified Key Setup) is now the preferred way to set up disk 81LUKS (Linux Unified Key Setup) is now the preferred way to set up disk
diff --git a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
index f4445e5a2bbb..1e097037349c 100644
--- a/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
+++ b/Documentation/devicetree/bindings/arm/exynos/power_domain.txt
@@ -22,6 +22,8 @@ Optional Properties:
22 - pclkN, clkN: Pairs of parent of input clock and input clock to the 22 - pclkN, clkN: Pairs of parent of input clock and input clock to the
23 devices in this power domain. Maximum of 4 pairs (N = 0 to 3) 23 devices in this power domain. Maximum of 4 pairs (N = 0 to 3)
24 are supported currently. 24 are supported currently.
25- power-domains: phandle pointing to the parent power domain, for more details
26 see Documentation/devicetree/bindings/power/power_domain.txt
25 27
26Node of a device using power domains must have a power-domains property 28Node of a device using power domains must have a power-domains property
27defined with a phandle to respective power domain. 29defined with a phandle to respective power domain.
diff --git a/Documentation/devicetree/bindings/arm/sti.txt b/Documentation/devicetree/bindings/arm/sti.txt
index d70ec358736c..8d27f6b084c7 100644
--- a/Documentation/devicetree/bindings/arm/sti.txt
+++ b/Documentation/devicetree/bindings/arm/sti.txt
@@ -13,6 +13,10 @@ Boards with the ST STiH407 SoC shall have the following properties:
13Required root node property: 13Required root node property:
14compatible = "st,stih407"; 14compatible = "st,stih407";
15 15
16Boards with the ST STiH410 SoC shall have the following properties:
17Required root node property:
18compatible = "st,stih410";
19
16Boards with the ST STiH418 SoC shall have the following properties: 20Boards with the ST STiH418 SoC shall have the following properties:
17Required root node property: 21Required root node property:
18compatible = "st,stih418"; 22compatible = "st,stih418";
diff --git a/Documentation/devicetree/bindings/clock/exynos7-clock.txt b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
index 6d3d5f80c1c3..6bf1e7493f61 100644
--- a/Documentation/devicetree/bindings/clock/exynos7-clock.txt
+++ b/Documentation/devicetree/bindings/clock/exynos7-clock.txt
@@ -34,6 +34,8 @@ Required Properties for Clock Controller:
34 - "samsung,exynos7-clock-peris" 34 - "samsung,exynos7-clock-peris"
35 - "samsung,exynos7-clock-fsys0" 35 - "samsung,exynos7-clock-fsys0"
36 - "samsung,exynos7-clock-fsys1" 36 - "samsung,exynos7-clock-fsys1"
37 - "samsung,exynos7-clock-mscl"
38 - "samsung,exynos7-clock-aud"
37 39
38 - reg: physical base address of the controller and the length of 40 - reg: physical base address of the controller and the length of
39 memory mapped region. 41 memory mapped region.
@@ -53,6 +55,7 @@ Input clocks for top0 clock controller:
53 - dout_sclk_bus1_pll 55 - dout_sclk_bus1_pll
54 - dout_sclk_cc_pll 56 - dout_sclk_cc_pll
55 - dout_sclk_mfc_pll 57 - dout_sclk_mfc_pll
58 - dout_sclk_aud_pll
56 59
57Input clocks for top1 clock controller: 60Input clocks for top1 clock controller:
58 - fin_pll 61 - fin_pll
@@ -76,6 +79,14 @@ Input clocks for peric1 clock controller:
76 - sclk_uart1 79 - sclk_uart1
77 - sclk_uart2 80 - sclk_uart2
78 - sclk_uart3 81 - sclk_uart3
82 - sclk_spi0
83 - sclk_spi1
84 - sclk_spi2
85 - sclk_spi3
86 - sclk_spi4
87 - sclk_i2s1
88 - sclk_pcm1
89 - sclk_spdif
79 90
80Input clocks for peris clock controller: 91Input clocks for peris clock controller:
81 - fin_pll 92 - fin_pll
@@ -91,3 +102,7 @@ Input clocks for fsys1 clock controller:
91 - dout_aclk_fsys1_200 102 - dout_aclk_fsys1_200
92 - dout_sclk_mmc0 103 - dout_sclk_mmc0
93 - dout_sclk_mmc1 104 - dout_sclk_mmc1
105
106Input clocks for aud clock controller:
107 - fin_pll
108 - fout_aud_pll
diff --git a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
index ded5d6212c84..c6620bc96703 100644
--- a/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
+++ b/Documentation/devicetree/bindings/clock/nvidia,tegra124-car.txt
@@ -1,4 +1,4 @@
1NVIDIA Tegra124 Clock And Reset Controller 1NVIDIA Tegra124 and Tegra132 Clock And Reset Controller
2 2
3This binding uses the common clock binding: 3This binding uses the common clock binding:
4Documentation/devicetree/bindings/clock/clock-bindings.txt 4Documentation/devicetree/bindings/clock/clock-bindings.txt
@@ -7,14 +7,16 @@ The CAR (Clock And Reset) Controller on Tegra is the HW module responsible
7for muxing and gating Tegra's clocks, and setting their rates. 7for muxing and gating Tegra's clocks, and setting their rates.
8 8
9Required properties : 9Required properties :
10- compatible : Should be "nvidia,tegra124-car" 10- compatible : Should be "nvidia,tegra124-car" or "nvidia,tegra132-car"
11- reg : Should contain CAR registers location and length 11- reg : Should contain CAR registers location and length
12- clocks : Should contain phandle and clock specifiers for two clocks: 12- clocks : Should contain phandle and clock specifiers for two clocks:
13 the 32 KHz "32k_in", and the board-specific oscillator "osc". 13 the 32 KHz "32k_in", and the board-specific oscillator "osc".
14- #clock-cells : Should be 1. 14- #clock-cells : Should be 1.
15 In clock consumers, this cell represents the clock ID exposed by the 15 In clock consumers, this cell represents the clock ID exposed by the
16 CAR. The assignments may be found in header file 16 CAR. The assignments may be found in the header files
17 <dt-bindings/clock/tegra124-car.h>. 17 <dt-bindings/clock/tegra124-car-common.h> (which covers IDs common
18 to Tegra124 and Tegra132) and <dt-bindings/clock/tegra124-car.h>
19 (for Tegra124-specific clocks).
18- #reset-cells : Should be 1. 20- #reset-cells : Should be 1.
19 In clock consumers, this cell represents the bit number in the CAR's 21 In clock consumers, this cell represents the bit number in the CAR's
20 array of CLK_RST_CONTROLLER_RST_DEVICES_* registers. 22 array of CLK_RST_CONTROLLER_RST_DEVICES_* registers.
diff --git a/Documentation/devicetree/bindings/clock/qcom,lcc.txt b/Documentation/devicetree/bindings/clock/qcom,lcc.txt
new file mode 100644
index 000000000000..dd755be63a01
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/qcom,lcc.txt
@@ -0,0 +1,21 @@
1Qualcomm LPASS Clock & Reset Controller Binding
2------------------------------------------------
3
4Required properties :
5- compatible : shall contain only one of the following:
6
7 "qcom,lcc-msm8960"
8 "qcom,lcc-apq8064"
9 "qcom,lcc-ipq8064"
10
11- reg : shall contain base register location and length
12- #clock-cells : shall contain 1
13- #reset-cells : shall contain 1
14
15Example:
16 clock-controller@28000000 {
17 compatible = "qcom,lcc-ipq8064";
18 reg = <0x28000000 0x1000>;
19 #clock-cells = <1>;
20 #reset-cells = <1>;
21 };
diff --git a/Documentation/devicetree/bindings/clock/qoriq-clock.txt b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
index 266ff9d23229..df4a259a6898 100644
--- a/Documentation/devicetree/bindings/clock/qoriq-clock.txt
+++ b/Documentation/devicetree/bindings/clock/qoriq-clock.txt
@@ -1,6 +1,6 @@
1* Clock Block on Freescale CoreNet Platforms 1* Clock Block on Freescale QorIQ Platforms
2 2
3Freescale CoreNet chips take primary clocking input from the external 3Freescale qoriq chips take primary clocking input from the external
4SYSCLK signal. The SYSCLK input (frequency) is multiplied using 4SYSCLK signal. The SYSCLK input (frequency) is multiplied using
5multiple phase locked loops (PLL) to create a variety of frequencies 5multiple phase locked loops (PLL) to create a variety of frequencies
6which can then be passed to a variety of internal logic, including 6which can then be passed to a variety of internal logic, including
@@ -29,6 +29,7 @@ Required properties:
29 * "fsl,t4240-clockgen" 29 * "fsl,t4240-clockgen"
30 * "fsl,b4420-clockgen" 30 * "fsl,b4420-clockgen"
31 * "fsl,b4860-clockgen" 31 * "fsl,b4860-clockgen"
32 * "fsl,ls1021a-clockgen"
32 Chassis clock strings include: 33 Chassis clock strings include:
33 * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks 34 * "fsl,qoriq-clockgen-1.0": for chassis 1.0 clocks
34 * "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks 35 * "fsl,qoriq-clockgen-2.0": for chassis 2.0 clocks
diff --git a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
index 2e18676bd4b5..0a80fa70ca26 100644
--- a/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,cpg-mstp-clocks.txt
@@ -11,6 +11,7 @@ Required Properties:
11 11
12 - compatible: Must be one of the following 12 - compatible: Must be one of the following
13 - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks 13 - "renesas,r7s72100-mstp-clocks" for R7S72100 (RZ) MSTP gate clocks
14 - "renesas,r8a73a4-mstp-clocks" for R8A73A4 (R-Mobile APE6) MSTP gate clocks
14 - "renesas,r8a7740-mstp-clocks" for R8A7740 (R-Mobile A1) MSTP gate clocks 15 - "renesas,r8a7740-mstp-clocks" for R8A7740 (R-Mobile A1) MSTP gate clocks
15 - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks 16 - "renesas,r8a7779-mstp-clocks" for R8A7779 (R-Car H1) MSTP gate clocks
16 - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks 17 - "renesas,r8a7790-mstp-clocks" for R8A7790 (R-Car H2) MSTP gate clocks
diff --git a/Documentation/devicetree/bindings/clock/renesas,r8a73a4-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,r8a73a4-cpg-clocks.txt
new file mode 100644
index 000000000000..ece92393e80d
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/renesas,r8a73a4-cpg-clocks.txt
@@ -0,0 +1,33 @@
1* Renesas R8A73A4 Clock Pulse Generator (CPG)
2
3The CPG generates core clocks for the R8A73A4 SoC. It includes five PLLs
4and several fixed ratio dividers.
5
6Required Properties:
7
8 - compatible: Must be "renesas,r8a73a4-cpg-clocks"
9
10 - reg: Base address and length of the memory resource used by the CPG
11
12 - clocks: Reference to the parent clocks ("extal1" and "extal2")
13
14 - #clock-cells: Must be 1
15
16 - clock-output-names: The names of the clocks. Supported clocks are "main",
17 "pll0", "pll1", "pll2", "pll2s", "pll2h", "z", "z2", "i", "m3", "b",
18 "m1", "m2", "zx", "zs", and "hp".
19
20
21Example
22-------
23
24 cpg_clocks: cpg_clocks@e6150000 {
25 compatible = "renesas,r8a73a4-cpg-clocks";
26 reg = <0 0xe6150000 0 0x10000>;
27 clocks = <&extal1_clk>, <&extal2_clk>;
28 #clock-cells = <1>;
29 clock-output-names = "main", "pll0", "pll1", "pll2",
30 "pll2s", "pll2h", "z", "z2",
31 "i", "m3", "b", "m1", "m2",
32 "zx", "zs", "hp";
33 };
diff --git a/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt b/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
index e6ad35b894f9..b02944fba9de 100644
--- a/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
+++ b/Documentation/devicetree/bindings/clock/renesas,rcar-gen2-cpg-clocks.txt
@@ -8,15 +8,18 @@ Required Properties:
8 - compatible: Must be one of 8 - compatible: Must be one of
9 - "renesas,r8a7790-cpg-clocks" for the r8a7790 CPG 9 - "renesas,r8a7790-cpg-clocks" for the r8a7790 CPG
10 - "renesas,r8a7791-cpg-clocks" for the r8a7791 CPG 10 - "renesas,r8a7791-cpg-clocks" for the r8a7791 CPG
11 - "renesas,r8a7793-cpg-clocks" for the r8a7793 CPG
11 - "renesas,r8a7794-cpg-clocks" for the r8a7794 CPG 12 - "renesas,r8a7794-cpg-clocks" for the r8a7794 CPG
12 - "renesas,rcar-gen2-cpg-clocks" for the generic R-Car Gen2 CPG 13 - "renesas,rcar-gen2-cpg-clocks" for the generic R-Car Gen2 CPG
13 14
14 - reg: Base address and length of the memory resource used by the CPG 15 - reg: Base address and length of the memory resource used by the CPG
15 16
16 - clocks: Reference to the parent clock 17 - clocks: References to the parent clocks: first to the EXTAL clock, second
18 to the USB_EXTAL clock
17 - #clock-cells: Must be 1 19 - #clock-cells: Must be 1
18 - clock-output-names: The names of the clocks. Supported clocks are "main", 20 - clock-output-names: The names of the clocks. Supported clocks are "main",
19 "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1" and "z" 21 "pll0", "pll1", "pll3", "lb", "qspi", "sdh", "sd0", "sd1", "z", "rcan", and
22 "adsp"
20 23
21 24
22Example 25Example
@@ -26,8 +29,9 @@ Example
26 compatible = "renesas,r8a7790-cpg-clocks", 29 compatible = "renesas,r8a7790-cpg-clocks",
27 "renesas,rcar-gen2-cpg-clocks"; 30 "renesas,rcar-gen2-cpg-clocks";
28 reg = <0 0xe6150000 0 0x1000>; 31 reg = <0 0xe6150000 0 0x1000>;
29 clocks = <&extal_clk>; 32 clocks = <&extal_clk &usb_extal_clk>;
30 #clock-cells = <1>; 33 #clock-cells = <1>;
31 clock-output-names = "main", "pll0, "pll1", "pll3", 34 clock-output-names = "main", "pll0, "pll1", "pll3",
32 "lb", "qspi", "sdh", "sd0", "sd1", "z"; 35 "lb", "qspi", "sdh", "sd0", "sd1", "z",
36 "rcan", "adsp";
33 }; 37 };
diff --git a/Documentation/devicetree/bindings/clock/sunxi.txt b/Documentation/devicetree/bindings/clock/sunxi.txt
index 67b2b99f2b33..60b44285250d 100644
--- a/Documentation/devicetree/bindings/clock/sunxi.txt
+++ b/Documentation/devicetree/bindings/clock/sunxi.txt
@@ -26,7 +26,7 @@ Required properties:
26 "allwinner,sun5i-a10s-ahb-gates-clk" - for the AHB gates on A10s 26 "allwinner,sun5i-a10s-ahb-gates-clk" - for the AHB gates on A10s
27 "allwinner,sun7i-a20-ahb-gates-clk" - for the AHB gates on A20 27 "allwinner,sun7i-a20-ahb-gates-clk" - for the AHB gates on A20
28 "allwinner,sun6i-a31-ar100-clk" - for the AR100 on A31 28 "allwinner,sun6i-a31-ar100-clk" - for the AR100 on A31
29 "allwinner,sun6i-a31-ahb1-mux-clk" - for the AHB1 multiplexer on A31 29 "allwinner,sun6i-a31-ahb1-clk" - for the AHB1 clock on A31
30 "allwinner,sun6i-a31-ahb1-gates-clk" - for the AHB1 gates on A31 30 "allwinner,sun6i-a31-ahb1-gates-clk" - for the AHB1 gates on A31
31 "allwinner,sun8i-a23-ahb1-gates-clk" - for the AHB1 gates on A23 31 "allwinner,sun8i-a23-ahb1-gates-clk" - for the AHB1 gates on A23
32 "allwinner,sun9i-a80-ahb0-gates-clk" - for the AHB0 gates on A80 32 "allwinner,sun9i-a80-ahb0-gates-clk" - for the AHB0 gates on A80
@@ -55,9 +55,11 @@ Required properties:
55 "allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31 55 "allwinner,sun6i-a31-apb2-gates-clk" - for the APB2 gates on A31
56 "allwinner,sun8i-a23-apb2-gates-clk" - for the APB2 gates on A23 56 "allwinner,sun8i-a23-apb2-gates-clk" - for the APB2 gates on A23
57 "allwinner,sun5i-a13-mbus-clk" - for the MBUS clock on A13 57 "allwinner,sun5i-a13-mbus-clk" - for the MBUS clock on A13
58 "allwinner,sun4i-a10-mmc-output-clk" - for the MMC output clock on A10 58 "allwinner,sun4i-a10-mmc-clk" - for the MMC clock
59 "allwinner,sun4i-a10-mmc-sample-clk" - for the MMC sample clock on A10 59 "allwinner,sun9i-a80-mmc-clk" - for mmc module clocks on A80
60 "allwinner,sun9i-a80-mmc-config-clk" - for mmc gates + resets on A80
60 "allwinner,sun4i-a10-mod0-clk" - for the module 0 family of clocks 61 "allwinner,sun4i-a10-mod0-clk" - for the module 0 family of clocks
62 "allwinner,sun9i-a80-mod0-clk" - for module 0 (storage) clocks on A80
61 "allwinner,sun8i-a23-mbus-clk" - for the MBUS clock on A23 63 "allwinner,sun8i-a23-mbus-clk" - for the MBUS clock on A23
62 "allwinner,sun7i-a20-out-clk" - for the external output clocks 64 "allwinner,sun7i-a20-out-clk" - for the external output clocks
63 "allwinner,sun7i-a20-gmac-clk" - for the GMAC clock module on A20/A31 65 "allwinner,sun7i-a20-gmac-clk" - for the GMAC clock module on A20/A31
@@ -73,7 +75,9 @@ Required properties for all clocks:
73- #clock-cells : from common clock binding; shall be set to 0 except for 75- #clock-cells : from common clock binding; shall be set to 0 except for
74 the following compatibles where it shall be set to 1: 76 the following compatibles where it shall be set to 1:
75 "allwinner,*-gates-clk", "allwinner,sun4i-pll5-clk", 77 "allwinner,*-gates-clk", "allwinner,sun4i-pll5-clk",
76 "allwinner,sun4i-pll6-clk", "allwinner,sun6i-a31-pll6-clk" 78 "allwinner,sun4i-pll6-clk", "allwinner,sun6i-a31-pll6-clk",
79 "allwinner,*-usb-clk", "allwinner,*-mmc-clk",
80 "allwinner,*-mmc-config-clk"
77- clock-output-names : shall be the corresponding names of the outputs. 81- clock-output-names : shall be the corresponding names of the outputs.
78 If the clock module only has one output, the name shall be the 82 If the clock module only has one output, the name shall be the
79 module name. 83 module name.
@@ -81,6 +85,10 @@ Required properties for all clocks:
81And "allwinner,*-usb-clk" clocks also require: 85And "allwinner,*-usb-clk" clocks also require:
82- reset-cells : shall be set to 1 86- reset-cells : shall be set to 1
83 87
88The "allwinner,sun9i-a80-mmc-config-clk" clock also requires:
89- #reset-cells : shall be set to 1
90- resets : shall be the reset control phandle for the mmc block.
91
84For "allwinner,sun7i-a20-gmac-clk", the parent clocks shall be fixed rate 92For "allwinner,sun7i-a20-gmac-clk", the parent clocks shall be fixed rate
85dummy clocks at 25 MHz and 125 MHz, respectively. See example. 93dummy clocks at 25 MHz and 125 MHz, respectively. See example.
86 94
@@ -95,6 +103,14 @@ For "allwinner,sun6i-a31-pll6-clk", there are 2 outputs. The first output
95is the normal PLL6 output, or "pll6". The second output is rate doubled 103is the normal PLL6 output, or "pll6". The second output is rate doubled
96PLL6, or "pll6x2". 104PLL6, or "pll6x2".
97 105
106The "allwinner,*-mmc-clk" clocks have three different outputs: the
107main clock, with the ID 0, and the output and sample clocks, with the
108IDs 1 and 2, respectively.
109
110The "allwinner,sun9i-a80-mmc-config-clk" clock has one clock/reset output
111per mmc controller. The number of outputs is determined by the size of
112the address block, which is related to the overall mmc block.
113
98For example: 114For example:
99 115
100osc24M: clk@01c20050 { 116osc24M: clk@01c20050 {
@@ -138,11 +154,11 @@ cpu: cpu@01c20054 {
138}; 154};
139 155
140mmc0_clk: clk@01c20088 { 156mmc0_clk: clk@01c20088 {
141 #clock-cells = <0>; 157 #clock-cells = <1>;
142 compatible = "allwinner,sun4i-mod0-clk"; 158 compatible = "allwinner,sun4i-a10-mmc-clk";
143 reg = <0x01c20088 0x4>; 159 reg = <0x01c20088 0x4>;
144 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 160 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
145 clock-output-names = "mmc0"; 161 clock-output-names = "mmc0", "mmc0_output", "mmc0_sample";
146}; 162};
147 163
148mii_phy_tx_clk: clk@2 { 164mii_phy_tx_clk: clk@2 {
@@ -170,3 +186,16 @@ gmac_clk: clk@01c20164 {
170 clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>; 186 clocks = <&mii_phy_tx_clk>, <&gmac_int_tx_clk>;
171 clock-output-names = "gmac"; 187 clock-output-names = "gmac";
172}; 188};
189
190mmc_config_clk: clk@01c13000 {
191 compatible = "allwinner,sun9i-a80-mmc-config-clk";
192 reg = <0x01c13000 0x10>;
193 clocks = <&ahb0_gates 8>;
194 clock-names = "ahb";
195 resets = <&ahb0_resets 8>;
196 reset-names = "ahb";
197 #clock-cells = <1>;
198 #reset-cells = <1>;
199 clock-output-names = "mmc0_config", "mmc1_config",
200 "mmc2_config", "mmc3_config";
201};
diff --git a/Documentation/devicetree/bindings/clock/ti,cdce706.txt b/Documentation/devicetree/bindings/clock/ti,cdce706.txt
new file mode 100644
index 000000000000..616836e7e1e2
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/ti,cdce706.txt
@@ -0,0 +1,42 @@
1Bindings for Texas Instruments CDCE706 programmable 3-PLL clock
2synthesizer/multiplier/divider.
3
4Reference: http://www.ti.com/lit/ds/symlink/cdce706.pdf
5
6I2C device node required properties:
7- compatible: shall be "ti,cdce706".
8- reg: i2c device address, shall be in range [0x68...0x6b].
9- #clock-cells: from common clock binding; shall be set to 1.
10- clocks: from common clock binding; list of parent clock
11 handles, shall be reference clock(s) connected to CLK_IN0
12 and CLK_IN1 pins.
13- clock-names: shall be clk_in0 and/or clk_in1. Use clk_in0
14 in case of crystal oscillator or differential signal input
15 configuration. Use clk_in0 and clk_in1 in case of independent
16 single-ended LVCMOS inputs configuration.
17
18Example:
19
20 clocks {
21 clk54: clk54 {
22 #clock-cells = <0>;
23 compatible = "fixed-clock";
24 clock-frequency = <54000000>;
25 };
26 };
27 ...
28 i2c0: i2c-master@0d090000 {
29 ...
30 cdce706: clock-synth@69 {
31 compatible = "ti,cdce706";
32 #clock-cells = <1>;
33 reg = <0x69>;
34 clocks = <&clk54>;
35 clock-names = "clk_in0";
36 };
37 };
38 ...
39 simple-audio-card,codec {
40 ...
41 clocks = <&cdce706 4>;
42 };
diff --git a/Documentation/devicetree/bindings/clock/ti/fapll.txt b/Documentation/devicetree/bindings/clock/ti/fapll.txt
new file mode 100644
index 000000000000..c19b3f253b8c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/ti/fapll.txt
@@ -0,0 +1,33 @@
1Binding for Texas Instruments FAPLL clock.
2
3Binding status: Unstable - ABI compatibility may be broken in the future
4
5This binding uses the common clock binding[1]. It assumes a
6register-mapped FAPLL with usually two selectable input clocks
7(reference clock and bypass clock), and one or more child
8syntesizers.
9
10[1] Documentation/devicetree/bindings/clock/clock-bindings.txt
11
12Required properties:
13- compatible : shall be "ti,dm816-fapll-clock"
14- #clock-cells : from common clock binding; shall be set to 0.
15- clocks : link phandles of parent clocks (clk-ref and clk-bypass)
16- reg : address and length of the register set for controlling the FAPLL.
17
18Examples:
19 main_fapll: main_fapll {
20 #clock-cells = <1>;
21 compatible = "ti,dm816-fapll-clock";
22 reg = <0x400 0x40>;
23 clocks = <&sys_clkin_ck &sys_clkin_ck>;
24 clock-indices = <1>, <2>, <3>, <4>, <5>,
25 <6>, <7>;
26 clock-output-names = "main_pll_clk1",
27 "main_pll_clk2",
28 "main_pll_clk3",
29 "main_pll_clk4",
30 "main_pll_clk5",
31 "main_pll_clk6",
32 "main_pll_clk7";
33 };
diff --git a/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt b/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt
new file mode 100644
index 000000000000..81f982ccca31
--- /dev/null
+++ b/Documentation/devicetree/bindings/i2c/brcm,iproc-i2c.txt
@@ -0,0 +1,37 @@
1Broadcom iProc I2C controller
2
3Required properties:
4
5- compatible:
6 Must be "brcm,iproc-i2c"
7
8- reg:
9 Define the base and range of the I/O address space that contain the iProc
10 I2C controller registers
11
12- interrupts:
13 Should contain the I2C interrupt
14
15- clock-frequency:
16 This is the I2C bus clock. Need to be either 100000 or 400000
17
18- #address-cells:
19 Always 1 (for I2C addresses)
20
21- #size-cells:
22 Always 0
23
24Example:
25 i2c0: i2c@18008000 {
26 compatible = "brcm,iproc-i2c";
27 reg = <0x18008000 0x100>;
28 #address-cells = <1>;
29 #size-cells = <0>;
30 interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
31 clock-frequency = <100000>;
32
33 codec: wm8750@1a {
34 compatible = "wlf,wm8750";
35 reg = <0x1a>;
36 };
37 };
diff --git a/Documentation/devicetree/bindings/i2c/i2c-imx.txt b/Documentation/devicetree/bindings/i2c/i2c-imx.txt
index 52d37fd8d3e5..ce4311d726ae 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-imx.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-imx.txt
@@ -7,6 +7,7 @@ Required properties:
7 - "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC 7 - "fsl,vf610-i2c" for I2C compatible with the one integrated on Vybrid vf610 SoC
8- reg : Should contain I2C/HS-I2C registers location and length 8- reg : Should contain I2C/HS-I2C registers location and length
9- interrupts : Should contain I2C/HS-I2C interrupt 9- interrupts : Should contain I2C/HS-I2C interrupt
10- clocks : Should contain the I2C/HS-I2C clock specifier
10 11
11Optional properties: 12Optional properties:
12- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz. 13- clock-frequency : Constains desired I2C/HS-I2C bus clock frequency in Hz.
diff --git a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
index 34a3fb6f8488..cf53d5fba20a 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-mux-pca954x.txt
@@ -16,6 +16,9 @@ Required Properties:
16Optional Properties: 16Optional Properties:
17 17
18 - reset-gpios: Reference to the GPIO connected to the reset input. 18 - reset-gpios: Reference to the GPIO connected to the reset input.
19 - i2c-mux-idle-disconnect: Boolean; if defined, forces mux to disconnect all
20 children in idle state. This is necessary for example, if there are several
21 multiplexers on the bus and the devices behind them use same I2C addresses.
19 22
20 23
21Example: 24Example:
diff --git a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
index 1637c298a1b3..17bef9a34e50 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-ocores.txt
@@ -4,24 +4,60 @@ Required properties:
4- compatible : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst" 4- compatible : "opencores,i2c-ocores" or "aeroflexgaisler,i2cmst"
5- reg : bus address start and address range size of device 5- reg : bus address start and address range size of device
6- interrupts : interrupt number 6- interrupts : interrupt number
7- clock-frequency : frequency of bus clock in Hz 7- clocks : handle to the controller clock; see the note below.
8 Mutually exclusive with opencores,ip-clock-frequency
9- opencores,ip-clock-frequency: frequency of the controller clock in Hz;
10 see the note below. Mutually exclusive with clocks
8- #address-cells : should be <1> 11- #address-cells : should be <1>
9- #size-cells : should be <0> 12- #size-cells : should be <0>
10 13
11Optional properties: 14Optional properties:
15- clock-frequency : frequency of bus clock in Hz; see the note below.
16 Defaults to 100 KHz when the property is not specified
12- reg-shift : device register offsets are shifted by this value 17- reg-shift : device register offsets are shifted by this value
13- reg-io-width : io register width in bytes (1, 2 or 4) 18- reg-io-width : io register width in bytes (1, 2 or 4)
14- regstep : deprecated, use reg-shift above 19- regstep : deprecated, use reg-shift above
15 20
16Example: 21Note
22clock-frequency property is meant to control the bus frequency for i2c bus
23drivers, but it was incorrectly used to specify i2c controller input clock
24frequency. So the following rules are set to fix this situation:
25- if clock-frequency is present and neither opencores,ip-clock-frequency nor
26 clocks are, then clock-frequency specifies i2c controller clock frequency.
27 This is to keep backwards compatibility with setups using old DTB. i2c bus
28 frequency is fixed at 100 KHz.
29- if clocks is present it specifies i2c controller clock. clock-frequency
30 property specifies i2c bus frequency.
31- if opencores,ip-clock-frequency is present it specifies i2c controller
32 clock frequency. clock-frequency property specifies i2c bus frequency.
17 33
34Examples:
35
36 i2c0: ocores@a0000000 {
37 #address-cells = <1>;
38 #size-cells = <0>;
39 compatible = "opencores,i2c-ocores";
40 reg = <0xa0000000 0x8>;
41 interrupts = <10>;
42 opencores,ip-clock-frequency = <20000000>;
43
44 reg-shift = <0>; /* 8 bit registers */
45 reg-io-width = <1>; /* 8 bit read/write */
46
47 dummy@60 {
48 compatible = "dummy";
49 reg = <0x60>;
50 };
51 };
52or
18 i2c0: ocores@a0000000 { 53 i2c0: ocores@a0000000 {
19 #address-cells = <1>; 54 #address-cells = <1>;
20 #size-cells = <0>; 55 #size-cells = <0>;
21 compatible = "opencores,i2c-ocores"; 56 compatible = "opencores,i2c-ocores";
22 reg = <0xa0000000 0x8>; 57 reg = <0xa0000000 0x8>;
23 interrupts = <10>; 58 interrupts = <10>;
24 clock-frequency = <20000000>; 59 clocks = <&osc>;
60 clock-frequency = <400000>; /* i2c bus frequency 400 KHz */
25 61
26 reg-shift = <0>; /* 8 bit registers */ 62 reg-shift = <0>; /* 8 bit registers */
27 reg-io-width = <1>; /* 8 bit read/write */ 63 reg-io-width = <1>; /* 8 bit read/write */
diff --git a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
index dde6c22ce91a..f0d71bc52e64 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-rk3x.txt
@@ -21,6 +21,17 @@ Required on RK3066, RK3188 :
21Optional properties : 21Optional properties :
22 22
23 - clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used. 23 - clock-frequency : SCL frequency to use (in Hz). If omitted, 100kHz is used.
24 - i2c-scl-rising-time-ns : Number of nanoseconds the SCL signal takes to rise
25 (t(r) in I2C specification). If not specified this is assumed to be
26 the maximum the specification allows(1000 ns for Standard-mode,
27 300 ns for Fast-mode) which might cause slightly slower communication.
28 - i2c-scl-falling-time-ns : Number of nanoseconds the SCL signal takes to fall
29 (t(f) in the I2C specification). If not specified this is assumed to
30 be the maximum the specification allows (300 ns) which might cause
31 slightly slower communication.
32 - i2c-sda-falling-time-ns : Number of nanoseconds the SDA signal takes to fall
33 (t(f) in the I2C specification). If not specified we'll use the SCL
34 value since they are the same in nearly all cases.
24 35
25Example: 36Example:
26 37
@@ -39,4 +50,7 @@ i2c0: i2c@2002d000 {
39 50
40 clock-names = "i2c"; 51 clock-names = "i2c";
41 clocks = <&cru PCLK_I2C0>; 52 clocks = <&cru PCLK_I2C0>;
53
54 i2c-scl-rising-time-ns = <800>;
55 i2c-scl-falling-time-ns = <100>;
42}; 56};
diff --git a/Documentation/devicetree/bindings/i2c/trivial-devices.txt b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
index 4dcd88d5f7ca..aaa8325004d2 100644
--- a/Documentation/devicetree/bindings/i2c/trivial-devices.txt
+++ b/Documentation/devicetree/bindings/i2c/trivial-devices.txt
@@ -61,9 +61,8 @@ fsl,sgtl5000 SGTL5000: Ultra Low-Power Audio Codec
61gmt,g751 G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface 61gmt,g751 G751: Digital Temperature Sensor and Thermal Watchdog with Two-Wire Interface
62infineon,slb9635tt Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz) 62infineon,slb9635tt Infineon SLB9635 (Soft-) I2C TPM (old protocol, max 100khz)
63infineon,slb9645tt Infineon SLB9645 I2C TPM (new protocol, max 400khz) 63infineon,slb9645tt Infineon SLB9645 I2C TPM (new protocol, max 400khz)
64isl,isl12057 Intersil ISL12057 I2C RTC Chip 64isil,isl12057 Intersil ISL12057 I2C RTC Chip
65isil,isl29028 (deprecated, use isl) 65isil,isl29028 Intersil ISL29028 Ambient Light and Proximity Sensor
66isl,isl29028 Intersil ISL29028 Ambient Light and Proximity Sensor
67maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator 66maxim,ds1050 5 Bit Programmable, Pulse-Width Modulator
68maxim,max1237 Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs 67maxim,max1237 Low-Power, 4-/12-Channel, 2-Wire Serial, 12-Bit ADCs
69maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface 68maxim,max6625 9-Bit/12-Bit Temperature Sensors with I²C-Compatible Serial Interface
diff --git a/Documentation/devicetree/bindings/mips/cavium/cib.txt b/Documentation/devicetree/bindings/mips/cavium/cib.txt
new file mode 100644
index 000000000000..f39a1aa2852b
--- /dev/null
+++ b/Documentation/devicetree/bindings/mips/cavium/cib.txt
@@ -0,0 +1,43 @@
1* Cavium Interrupt Bus widget
2
3Properties:
4- compatible: "cavium,octeon-7130-cib"
5
6 Compatibility with cn70XX SoCs.
7
8- interrupt-controller: This is an interrupt controller.
9
10- reg: Two elements consisting of the addresses of the RAW and EN
11 registers of the CIB block
12
13- cavium,max-bits: The index (zero based) of the highest numbered bit
14 in the CIB block.
15
16- interrupt-parent: Always the CIU on the SoC.
17
18- interrupts: The CIU line to which the CIB block is connected.
19
20- #interrupt-cells: Must be <2>. The first cell is the bit within the
21 CIB. The second cell specifies the triggering semantics of the
22 line.
23
24Example:
25
26 interrupt-controller@107000000e000 {
27 compatible = "cavium,octeon-7130-cib";
28 reg = <0x10700 0x0000e000 0x0 0x8>, /* RAW */
29 <0x10700 0x0000e100 0x0 0x8>; /* EN */
30 cavium,max-bits = <23>;
31
32 interrupt-controller;
33 interrupt-parent = <&ciu>;
34 interrupts = <1 24>;
35 /* Interrupts are specified by two parts:
36 * 1) Bit number in the CIB* registers
37 * 2) Triggering (1 - edge rising
38 * 2 - edge falling
39 * 4 - level active high
40 * 8 - level active low)
41 */
42 #interrupt-cells = <2>;
43 };
diff --git a/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt b/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt
index 91b3a3467150..4bf41d833804 100644
--- a/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt
+++ b/Documentation/devicetree/bindings/mmc/sunxi-mmc.txt
@@ -10,8 +10,8 @@ Absolute maximum transfer rate is 200MB/s
10Required properties: 10Required properties:
11 - compatible : "allwinner,sun4i-a10-mmc" or "allwinner,sun5i-a13-mmc" 11 - compatible : "allwinner,sun4i-a10-mmc" or "allwinner,sun5i-a13-mmc"
12 - reg : mmc controller base registers 12 - reg : mmc controller base registers
13 - clocks : a list with 2 phandle + clock specifier pairs 13 - clocks : a list with 4 phandle + clock specifier pairs
14 - clock-names : must contain "ahb" and "mmc" 14 - clock-names : must contain "ahb", "mmc", "output" and "sample"
15 - interrupts : mmc controller interrupt 15 - interrupts : mmc controller interrupt
16 16
17Optional properties: 17Optional properties:
@@ -25,8 +25,8 @@ Examples:
25 mmc0: mmc@01c0f000 { 25 mmc0: mmc@01c0f000 {
26 compatible = "allwinner,sun5i-a13-mmc"; 26 compatible = "allwinner,sun5i-a13-mmc";
27 reg = <0x01c0f000 0x1000>; 27 reg = <0x01c0f000 0x1000>;
28 clocks = <&ahb_gates 8>, <&mmc0_clk>; 28 clocks = <&ahb_gates 8>, <&mmc0_clk>, <&mmc0_output_clk>, <&mmc0_sample_clk>;
29 clock-names = "ahb", "mod"; 29 clock-names = "ahb", "mod", "output", "sample";
30 interrupts = <0 32 4>; 30 interrupts = <0 32 4>;
31 status = "disabled"; 31 status = "disabled";
32 }; 32 };
diff --git a/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt b/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt
index 33df3932168e..8db32384a486 100644
--- a/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt
+++ b/Documentation/devicetree/bindings/net/amd-xgbe-phy.txt
@@ -27,6 +27,8 @@ property is used.
27- amd,serdes-cdr-rate: CDR rate speed selection 27- amd,serdes-cdr-rate: CDR rate speed selection
28- amd,serdes-pq-skew: PQ (data sampling) skew 28- amd,serdes-pq-skew: PQ (data sampling) skew
29- amd,serdes-tx-amp: TX amplitude boost 29- amd,serdes-tx-amp: TX amplitude boost
30- amd,serdes-dfe-tap-config: DFE taps available to run
31- amd,serdes-dfe-tap-enable: DFE taps to enable
30 32
31Example: 33Example:
32 xgbe_phy@e1240800 { 34 xgbe_phy@e1240800 {
@@ -41,4 +43,6 @@ Example:
41 amd,serdes-cdr-rate = <2>, <2>, <7>; 43 amd,serdes-cdr-rate = <2>, <2>, <7>;
42 amd,serdes-pq-skew = <10>, <10>, <30>; 44 amd,serdes-pq-skew = <10>, <10>, <30>;
43 amd,serdes-tx-amp = <15>, <15>, <10>; 45 amd,serdes-tx-amp = <15>, <15>, <10>;
46 amd,serdes-dfe-tap-config = <3>, <3>, <1>;
47 amd,serdes-dfe-tap-enable = <0>, <0>, <127>;
44 }; 48 };
diff --git a/Documentation/devicetree/bindings/net/apm-xgene-enet.txt b/Documentation/devicetree/bindings/net/apm-xgene-enet.txt
index cfcc52705ed8..6151999c5dca 100644
--- a/Documentation/devicetree/bindings/net/apm-xgene-enet.txt
+++ b/Documentation/devicetree/bindings/net/apm-xgene-enet.txt
@@ -4,7 +4,10 @@ Ethernet nodes are defined to describe on-chip ethernet interfaces in
4APM X-Gene SoC. 4APM X-Gene SoC.
5 5
6Required properties for all the ethernet interfaces: 6Required properties for all the ethernet interfaces:
7- compatible: Should be "apm,xgene-enet" 7- compatible: Should state binding information from the following list,
8 - "apm,xgene-enet": RGMII based 1G interface
9 - "apm,xgene1-sgenet": SGMII based 1G interface
10 - "apm,xgene1-xgenet": XFI based 10G interface
8- reg: Address and length of the register set for the device. It contains the 11- reg: Address and length of the register set for the device. It contains the
9 information of registers in the same order as described by reg-names 12 information of registers in the same order as described by reg-names
10- reg-names: Should contain the register set names 13- reg-names: Should contain the register set names
diff --git a/Documentation/devicetree/bindings/power/power_domain.txt b/Documentation/devicetree/bindings/power/power_domain.txt
index 98c16672ab5f..0f8ed3710c66 100644
--- a/Documentation/devicetree/bindings/power/power_domain.txt
+++ b/Documentation/devicetree/bindings/power/power_domain.txt
@@ -19,6 +19,16 @@ Required properties:
19 providing multiple PM domains (e.g. power controllers), but can be any value 19 providing multiple PM domains (e.g. power controllers), but can be any value
20 as specified by device tree binding documentation of particular provider. 20 as specified by device tree binding documentation of particular provider.
21 21
22Optional properties:
23 - power-domains : A phandle and PM domain specifier as defined by bindings of
24 the power controller specified by phandle.
25 Some power domains might be powered from another power domain (or have
26 other hardware specific dependencies). For representing such dependency
27 a standard PM domain consumer binding is used. When provided, all domains
28 created by the given provider should be subdomains of the domain
29 specified by this binding. More details about power domain specifier are
30 available in the next section.
31
22Example: 32Example:
23 33
24 power: power-controller@12340000 { 34 power: power-controller@12340000 {
@@ -30,6 +40,25 @@ Example:
30The node above defines a power controller that is a PM domain provider and 40The node above defines a power controller that is a PM domain provider and
31expects one cell as its phandle argument. 41expects one cell as its phandle argument.
32 42
43Example 2:
44
45 parent: power-controller@12340000 {
46 compatible = "foo,power-controller";
47 reg = <0x12340000 0x1000>;
48 #power-domain-cells = <1>;
49 };
50
51 child: power-controller@12340000 {
52 compatible = "foo,power-controller";
53 reg = <0x12341000 0x1000>;
54 power-domains = <&parent 0>;
55 #power-domain-cells = <1>;
56 };
57
58The nodes above define two power controllers: 'parent' and 'child'.
59Domains created by the 'child' power controller are subdomains of '0' power
60domain provided by the 'parent' power controller.
61
33==PM domain consumers== 62==PM domain consumers==
34 63
35Required properties: 64Required properties:
diff --git a/Documentation/devicetree/bindings/serial/of-serial.txt b/Documentation/devicetree/bindings/serial/8250.txt
index 91d5ab0e60fc..91d5ab0e60fc 100644
--- a/Documentation/devicetree/bindings/serial/of-serial.txt
+++ b/Documentation/devicetree/bindings/serial/8250.txt
diff --git a/Documentation/devicetree/bindings/serial/axis,etraxfs-uart.txt b/Documentation/devicetree/bindings/serial/axis,etraxfs-uart.txt
new file mode 100644
index 000000000000..ebcbb62c0a76
--- /dev/null
+++ b/Documentation/devicetree/bindings/serial/axis,etraxfs-uart.txt
@@ -0,0 +1,19 @@
1ETRAX FS UART
2
3Required properties:
4- compatible : "axis,etraxfs-uart"
5- reg: offset and length of the register set for the device.
6- interrupts: device interrupt
7
8Optional properties:
9- {dtr,dsr,ri,cd}-gpios: specify a GPIO for DTR/DSR/RI/CD
10 line respectively.
11
12Example:
13
14serial@b00260000 {
15 compatible = "axis,etraxfs-uart";
16 reg = <0xb0026000 0x1000>;
17 interrupts = <68>;
18 status = "disabled";
19};
diff --git a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
index 7f76214f728a..289c40ed7470 100644
--- a/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
+++ b/Documentation/devicetree/bindings/serial/snps-dw-apb-uart.txt
@@ -21,6 +21,18 @@ Optional properties:
21- reg-io-width : the size (in bytes) of the IO accesses that should be 21- reg-io-width : the size (in bytes) of the IO accesses that should be
22 performed on the device. If this property is not present then single byte 22 performed on the device. If this property is not present then single byte
23 accesses are used. 23 accesses are used.
24- dcd-override : Override the DCD modem status signal. This signal will always
25 be reported as active instead of being obtained from the modem status
26 register. Define this if your serial port does not use this pin.
27- dsr-override : Override the DTS modem status signal. This signal will always
28 be reported as active instead of being obtained from the modem status
29 register. Define this if your serial port does not use this pin.
30- cts-override : Override the CTS modem status signal. This signal will always
31 be reported as active instead of being obtained from the modem status
32 register. Define this if your serial port does not use this pin.
33- ri-override : Override the RI modem status signal. This signal will always be
34 reported as inactive instead of being obtained from the modem status register.
35 Define this if your serial port does not use this pin.
24 36
25Example: 37Example:
26 38
@@ -31,6 +43,10 @@ Example:
31 interrupts = <10>; 43 interrupts = <10>;
32 reg-shift = <2>; 44 reg-shift = <2>;
33 reg-io-width = <4>; 45 reg-io-width = <4>;
46 dcd-override;
47 dsr-override;
48 cts-override;
49 ri-override;
34 }; 50 };
35 51
36Example with one clock: 52Example with one clock:
diff --git a/Documentation/devicetree/bindings/submitting-patches.txt b/Documentation/devicetree/bindings/submitting-patches.txt
index 56742bc70218..7d44eae7ab0b 100644
--- a/Documentation/devicetree/bindings/submitting-patches.txt
+++ b/Documentation/devicetree/bindings/submitting-patches.txt
@@ -12,6 +12,9 @@ I. For patch submitters
12 12
13 devicetree@vger.kernel.org 13 devicetree@vger.kernel.org
14 14
15 and Cc: the DT maintainers. Use scripts/get_maintainer.pl to identify
16 all of the DT maintainers.
17
15 3) The Documentation/ portion of the patch should come in the series before 18 3) The Documentation/ portion of the patch should come in the series before
16 the code implementing the binding. 19 the code implementing the binding.
17 20
diff --git a/Documentation/devicetree/bindings/vendor-prefixes.txt b/Documentation/devicetree/bindings/vendor-prefixes.txt
index 389ca1347a77..fae26d014aaf 100644
--- a/Documentation/devicetree/bindings/vendor-prefixes.txt
+++ b/Documentation/devicetree/bindings/vendor-prefixes.txt
@@ -20,6 +20,7 @@ amlogic Amlogic, Inc.
20ams AMS AG 20ams AMS AG
21amstaos AMS-Taos Inc. 21amstaos AMS-Taos Inc.
22apm Applied Micro Circuits Corporation (APM) 22apm Applied Micro Circuits Corporation (APM)
23arasan Arasan Chip Systems
23arm ARM Ltd. 24arm ARM Ltd.
24armadeus ARMadeus Systems SARL 25armadeus ARMadeus Systems SARL
25asahi-kasei Asahi Kasei Corp. 26asahi-kasei Asahi Kasei Corp.
@@ -27,6 +28,7 @@ atmel Atmel Corporation
27auo AU Optronics Corporation 28auo AU Optronics Corporation
28avago Avago Technologies 29avago Avago Technologies
29avic Shanghai AVIC Optoelectronics Co., Ltd. 30avic Shanghai AVIC Optoelectronics Co., Ltd.
31axis Axis Communications AB
30bosch Bosch Sensortec GmbH 32bosch Bosch Sensortec GmbH
31brcm Broadcom Corporation 33brcm Broadcom Corporation
32buffalo Buffalo, Inc. 34buffalo Buffalo, Inc.
diff --git a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
index f90e294d7631..a4d869744f59 100644
--- a/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
+++ b/Documentation/devicetree/bindings/watchdog/atmel-wdt.txt
@@ -26,6 +26,11 @@ Optional properties:
26- atmel,disable : Should be present if you want to disable the watchdog. 26- atmel,disable : Should be present if you want to disable the watchdog.
27- atmel,idle-halt : Should be present if you want to stop the watchdog when 27- atmel,idle-halt : Should be present if you want to stop the watchdog when
28 entering idle state. 28 entering idle state.
29 CAUTION: This property should be used with care, it actually makes the
30 watchdog not counting when the CPU is in idle state, therefore the
31 watchdog reset time depends on mean CPU usage and will not reset at all
32 if the CPU stop working while it is in idle state, which is probably
33 not what you want.
29- atmel,dbg-halt : Should be present if you want to stop the watchdog when 34- atmel,dbg-halt : Should be present if you want to stop the watchdog when
30 entering debug state. 35 entering debug state.
31 36
diff --git a/Documentation/filesystems/Locking b/Documentation/filesystems/Locking
index 2ca3d17eee56..f91926f2f482 100644
--- a/Documentation/filesystems/Locking
+++ b/Documentation/filesystems/Locking
@@ -164,8 +164,6 @@ the block device inode. See there for more details.
164 164
165--------------------------- file_system_type --------------------------- 165--------------------------- file_system_type ---------------------------
166prototypes: 166prototypes:
167 int (*get_sb) (struct file_system_type *, int,
168 const char *, void *, struct vfsmount *);
169 struct dentry *(*mount) (struct file_system_type *, int, 167 struct dentry *(*mount) (struct file_system_type *, int,
170 const char *, void *); 168 const char *, void *);
171 void (*kill_sb) (struct super_block *); 169 void (*kill_sb) (struct super_block *);
diff --git a/Documentation/filesystems/dlmfs.txt b/Documentation/filesystems/dlmfs.txt
index 1b528b2ad809..fcf4d509d118 100644
--- a/Documentation/filesystems/dlmfs.txt
+++ b/Documentation/filesystems/dlmfs.txt
@@ -5,8 +5,8 @@ system.
5 5
6dlmfs is built with OCFS2 as it requires most of its infrastructure. 6dlmfs is built with OCFS2 as it requires most of its infrastructure.
7 7
8Project web page: http://oss.oracle.com/projects/ocfs2 8Project web page: http://ocfs2.wiki.kernel.org
9Tools web page: http://oss.oracle.com/projects/ocfs2-tools 9Tools web page: https://github.com/markfasheh/ocfs2-tools
10OCFS2 mailing lists: http://oss.oracle.com/projects/ocfs2/mailman/ 10OCFS2 mailing lists: http://oss.oracle.com/projects/ocfs2/mailman/
11 11
12All code copyright 2005 Oracle except when otherwise noted. 12All code copyright 2005 Oracle except when otherwise noted.
diff --git a/Documentation/filesystems/ocfs2.txt b/Documentation/filesystems/ocfs2.txt
index 28f8c08201e2..4c49e5410595 100644
--- a/Documentation/filesystems/ocfs2.txt
+++ b/Documentation/filesystems/ocfs2.txt
@@ -8,8 +8,8 @@ also make it attractive for non-clustered use.
8You'll want to install the ocfs2-tools package in order to at least 8You'll want to install the ocfs2-tools package in order to at least
9get "mount.ocfs2" and "ocfs2_hb_ctl". 9get "mount.ocfs2" and "ocfs2_hb_ctl".
10 10
11Project web page: http://oss.oracle.com/projects/ocfs2 11Project web page: http://ocfs2.wiki.kernel.org
12Tools web page: http://oss.oracle.com/projects/ocfs2-tools 12Tools git tree: https://github.com/markfasheh/ocfs2-tools
13OCFS2 mailing lists: http://oss.oracle.com/projects/ocfs2/mailman/ 13OCFS2 mailing lists: http://oss.oracle.com/projects/ocfs2/mailman/
14 14
15All code copyright 2005 Oracle except when otherwise noted. 15All code copyright 2005 Oracle except when otherwise noted.
diff --git a/Documentation/filesystems/overlayfs.txt b/Documentation/filesystems/overlayfs.txt
index a27c950ece61..6db0e5d1da07 100644
--- a/Documentation/filesystems/overlayfs.txt
+++ b/Documentation/filesystems/overlayfs.txt
@@ -159,6 +159,22 @@ overlay filesystem (though an operation on the name of the file such as
159rename or unlink will of course be noticed and handled). 159rename or unlink will of course be noticed and handled).
160 160
161 161
162Multiple lower layers
163---------------------
164
165Multiple lower layers can now be given using the the colon (":") as a
166separator character between the directory names. For example:
167
168 mount -t overlay overlay -olowerdir=/lower1:/lower2:/lower3 /merged
169
170As the example shows, "upperdir=" and "workdir=" may be omitted. In
171that case the overlay will be read-only.
172
173The specified lower directories will be stacked beginning from the
174rightmost one and going left. In the above example lower1 will be the
175top, lower2 the middle and lower3 the bottom layer.
176
177
162Non-standard behavior 178Non-standard behavior
163--------------------- 179---------------------
164 180
@@ -196,3 +212,15 @@ Changes to the underlying filesystems while part of a mounted overlay
196filesystem are not allowed. If the underlying filesystem is changed, 212filesystem are not allowed. If the underlying filesystem is changed,
197the behavior of the overlay is undefined, though it will not result in 213the behavior of the overlay is undefined, though it will not result in
198a crash or deadlock. 214a crash or deadlock.
215
216Testsuite
217---------
218
219There's testsuite developed by David Howells at:
220
221 git://git.infradead.org/users/dhowells/unionmount-testsuite.git
222
223Run as root:
224
225 # cd unionmount-testsuite
226 # ./run --ov
diff --git a/Documentation/i2c/functionality b/Documentation/i2c/functionality
index 4556a3eb87c4..4aae8ed15873 100644
--- a/Documentation/i2c/functionality
+++ b/Documentation/i2c/functionality
@@ -12,7 +12,7 @@ FUNCTIONALITY CONSTANTS
12----------------------- 12-----------------------
13 13
14For the most up-to-date list of functionality constants, please check 14For the most up-to-date list of functionality constants, please check
15<linux/i2c.h>! 15<uapi/linux/i2c.h>!
16 16
17 I2C_FUNC_I2C Plain i2c-level commands (Pure SMBus 17 I2C_FUNC_I2C Plain i2c-level commands (Pure SMBus
18 adapters typically can not do these) 18 adapters typically can not do these)
diff --git a/Documentation/input/alps.txt b/Documentation/input/alps.txt
index 90bca6f988e1..a63e5e013a8c 100644
--- a/Documentation/input/alps.txt
+++ b/Documentation/input/alps.txt
@@ -3,8 +3,8 @@ ALPS Touchpad Protocol
3 3
4Introduction 4Introduction
5------------ 5------------
6Currently the ALPS touchpad driver supports five protocol versions in use by 6Currently the ALPS touchpad driver supports seven protocol versions in use by
7ALPS touchpads, called versions 1, 2, 3, 4 and 5. 7ALPS touchpads, called versions 1, 2, 3, 4, 5, 6 and 7.
8 8
9Since roughly mid-2010 several new ALPS touchpads have been released and 9Since roughly mid-2010 several new ALPS touchpads have been released and
10integrated into a variety of laptops and netbooks. These new touchpads 10integrated into a variety of laptops and netbooks. These new touchpads
@@ -240,3 +240,67 @@ For mt, the format is:
240 byte 3: 0 x23 x22 x21 x20 x19 x18 x17 240 byte 3: 0 x23 x22 x21 x20 x19 x18 x17
241 byte 4: 0 x9 x8 x7 x6 x5 x4 x3 241 byte 4: 0 x9 x8 x7 x6 x5 x4 x3
242 byte 5: 0 x16 x15 x14 x13 x12 x11 x10 242 byte 5: 0 x16 x15 x14 x13 x12 x11 x10
243
244ALPS Absolute Mode - Protocol Version 6
245---------------------------------------
246
247For trackstick packet, the format is:
248
249 byte 0: 1 1 1 1 1 1 1 1
250 byte 1: 0 X6 X5 X4 X3 X2 X1 X0
251 byte 2: 0 Y6 Y5 Y4 Y3 Y2 Y1 Y0
252 byte 3: ? Y7 X7 ? ? M R L
253 byte 4: Z7 Z6 Z5 Z4 Z3 Z2 Z1 Z0
254 byte 5: 0 1 1 1 1 1 1 1
255
256For touchpad packet, the format is:
257
258 byte 0: 1 1 1 1 1 1 1 1
259 byte 1: 0 0 0 0 x3 x2 x1 x0
260 byte 2: 0 0 0 0 y3 y2 y1 y0
261 byte 3: ? x7 x6 x5 x4 ? r l
262 byte 4: ? y7 y6 y5 y4 ? ? ?
263 byte 5: z7 z6 z5 z4 z3 z2 z1 z0
264
265(v6 touchpad does not have middle button)
266
267ALPS Absolute Mode - Protocol Version 7
268---------------------------------------
269
270For trackstick packet, the format is:
271
272 byte 0: 0 1 0 0 1 0 0 0
273 byte 1: 1 1 * * 1 M R L
274 byte 2: X7 1 X5 X4 X3 X2 X1 X0
275 byte 3: Z6 1 Y6 X6 1 Y2 Y1 Y0
276 byte 4: Y7 0 Y5 Y4 Y3 1 1 0
277 byte 5: T&P 0 Z5 Z4 Z3 Z2 Z1 Z0
278
279For touchpad packet, the format is:
280
281 packet-fmt b7 b6 b5 b4 b3 b2 b1 b0
282 byte 0: TWO & MULTI L 1 R M 1 Y0-2 Y0-1 Y0-0
283 byte 0: NEW L 1 X1-5 1 1 Y0-2 Y0-1 Y0-0
284 byte 1: Y0-10 Y0-9 Y0-8 Y0-7 Y0-6 Y0-5 Y0-4 Y0-3
285 byte 2: X0-11 1 X0-10 X0-9 X0-8 X0-7 X0-6 X0-5
286 byte 3: X1-11 1 X0-4 X0-3 1 X0-2 X0-1 X0-0
287 byte 4: TWO X1-10 TWO X1-9 X1-8 X1-7 X1-6 X1-5 X1-4
288 byte 4: MULTI X1-10 TWO X1-9 X1-8 X1-7 X1-6 Y1-5 1
289 byte 4: NEW X1-10 TWO X1-9 X1-8 X1-7 X1-6 0 0
290 byte 5: TWO & NEW Y1-10 0 Y1-9 Y1-8 Y1-7 Y1-6 Y1-5 Y1-4
291 byte 5: MULTI Y1-10 0 Y1-9 Y1-8 Y1-7 Y1-6 F-1 F-0
292
293 L: Left button
294 R / M: Non-clickpads: Right / Middle button
295 Clickpads: When > 2 fingers are down, and some fingers
296 are in the button area, then the 2 coordinates reported
297 are for fingers outside the button area and these report
298 extra fingers being present in the right / left button
299 area. Note these fingers are not added to the F field!
300 so if a TWO packet is received and R = 1 then there are
301 3 fingers down, etc.
302 TWO: 1: Two touches present, byte 0/4/5 are in TWO fmt
303 0: If byte 4 bit 0 is 1, then byte 0/4/5 are in MULTI fmt
304 otherwise byte 0 bit 4 must be set and byte 0/4/5 are
305 in NEW fmt
306 F: Number of fingers - 3, 0 means 3 fingers, 1 means 4 ...
diff --git a/Documentation/power/suspend-and-interrupts.txt b/Documentation/power/suspend-and-interrupts.txt
index 2f9c5a5fcb25..8afb29a8604a 100644
--- a/Documentation/power/suspend-and-interrupts.txt
+++ b/Documentation/power/suspend-and-interrupts.txt
@@ -40,8 +40,10 @@ but also to IPIs and to some other special-purpose interrupts.
40 40
41The IRQF_NO_SUSPEND flag is used to indicate that to the IRQ subsystem when 41The IRQF_NO_SUSPEND flag is used to indicate that to the IRQ subsystem when
42requesting a special-purpose interrupt. It causes suspend_device_irqs() to 42requesting a special-purpose interrupt. It causes suspend_device_irqs() to
43leave the corresponding IRQ enabled so as to allow the interrupt to work all 43leave the corresponding IRQ enabled so as to allow the interrupt to work as
44the time as expected. 44expected during the suspend-resume cycle, but does not guarantee that the
45interrupt will wake the system from a suspended state -- for such cases it is
46necessary to use enable_irq_wake().
45 47
46Note that the IRQF_NO_SUSPEND flag affects the entire IRQ and not just one 48Note that the IRQF_NO_SUSPEND flag affects the entire IRQ and not just one
47user of it. Thus, if the IRQ is shared, all of the interrupt handlers installed 49user of it. Thus, if the IRQ is shared, all of the interrupt handlers installed
@@ -110,8 +112,9 @@ any special interrupt handling logic for it to work.
110IRQF_NO_SUSPEND and enable_irq_wake() 112IRQF_NO_SUSPEND and enable_irq_wake()
111------------------------------------- 113-------------------------------------
112 114
113There are no valid reasons to use both enable_irq_wake() and the IRQF_NO_SUSPEND 115There are very few valid reasons to use both enable_irq_wake() and the
114flag on the same IRQ. 116IRQF_NO_SUSPEND flag on the same IRQ, and it is never valid to use both for the
117same device.
115 118
116First of all, if the IRQ is not shared, the rules for handling IRQF_NO_SUSPEND 119First of all, if the IRQ is not shared, the rules for handling IRQF_NO_SUSPEND
117interrupts (interrupt handlers are invoked after suspend_device_irqs()) are 120interrupts (interrupt handlers are invoked after suspend_device_irqs()) are
@@ -120,4 +123,13 @@ handlers are not invoked after suspend_device_irqs()).
120 123
121Second, both enable_irq_wake() and IRQF_NO_SUSPEND apply to entire IRQs and not 124Second, both enable_irq_wake() and IRQF_NO_SUSPEND apply to entire IRQs and not
122to individual interrupt handlers, so sharing an IRQ between a system wakeup 125to individual interrupt handlers, so sharing an IRQ between a system wakeup
123interrupt source and an IRQF_NO_SUSPEND interrupt source does not make sense. 126interrupt source and an IRQF_NO_SUSPEND interrupt source does not generally
127make sense.
128
129In rare cases an IRQ can be shared between a wakeup device driver and an
130IRQF_NO_SUSPEND user. In order for this to be safe, the wakeup device driver
131must be able to discern spurious IRQs from genuine wakeup events (signalling
132the latter to the core with pm_system_wakeup()), must use enable_irq_wake() to
133ensure that the IRQ will function as a wakeup source, and must request the IRQ
134with IRQF_COND_SUSPEND to tell the core that it meets these requirements. If
135these requirements are not met, it is not valid to use IRQF_COND_SUSPEND.
diff --git a/Documentation/x86/zero-page.txt b/Documentation/x86/zero-page.txt
index 199f453cb4de..82fbdbc1e0b0 100644
--- a/Documentation/x86/zero-page.txt
+++ b/Documentation/x86/zero-page.txt
@@ -3,7 +3,7 @@ protocol of kernel. These should be filled by bootloader or 16-bit
3real-mode setup code of the kernel. References/settings to it mainly 3real-mode setup code of the kernel. References/settings to it mainly
4are in: 4are in:
5 5
6 arch/x86/include/asm/bootparam.h 6 arch/x86/include/uapi/asm/bootparam.h
7 7
8 8
9Offset Proto Name Meaning 9Offset Proto Name Meaning
diff --git a/MAINTAINERS b/MAINTAINERS
index 7cfcee4e2bea..358eb0105e00 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -1030,6 +1030,16 @@ F: arch/arm/mach-mxs/
1030F: arch/arm/boot/dts/imx* 1030F: arch/arm/boot/dts/imx*
1031F: arch/arm/configs/imx*_defconfig 1031F: arch/arm/configs/imx*_defconfig
1032 1032
1033ARM/FREESCALE VYBRID ARM ARCHITECTURE
1034M: Shawn Guo <shawn.guo@linaro.org>
1035M: Sascha Hauer <kernel@pengutronix.de>
1036R: Stefan Agner <stefan@agner.ch>
1037L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1038S: Maintained
1039T: git git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux.git
1040F: arch/arm/mach-imx/*vf610*
1041F: arch/arm/boot/dts/vf*
1042
1033ARM/GLOMATION GESBC9312SX MACHINE SUPPORT 1043ARM/GLOMATION GESBC9312SX MACHINE SUPPORT
1034M: Lennert Buytenhek <kernel@wantstofly.org> 1044M: Lennert Buytenhek <kernel@wantstofly.org>
1035L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1045L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
@@ -1188,6 +1198,7 @@ ARM/Marvell Dove/MV78xx0/Orion SOC support
1188M: Jason Cooper <jason@lakedaemon.net> 1198M: Jason Cooper <jason@lakedaemon.net>
1189M: Andrew Lunn <andrew@lunn.ch> 1199M: Andrew Lunn <andrew@lunn.ch>
1190M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com> 1200M: Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>
1201M: Gregory Clement <gregory.clement@free-electrons.com>
1191L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) 1202L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
1192S: Maintained 1203S: Maintained
1193F: arch/arm/mach-dove/ 1204F: arch/arm/mach-dove/
@@ -1730,7 +1741,7 @@ S: Maintained
1730F: drivers/net/ethernet/atheros/ 1741F: drivers/net/ethernet/atheros/
1731 1742
1732ATM 1743ATM
1733M: Chas Williams <chas@cmf.nrl.navy.mil> 1744M: Chas Williams <3chas3@gmail.com>
1734L: linux-atm-general@lists.sourceforge.net (moderated for non-subscribers) 1745L: linux-atm-general@lists.sourceforge.net (moderated for non-subscribers)
1735L: netdev@vger.kernel.org 1746L: netdev@vger.kernel.org
1736W: http://linux-atm.sourceforge.net 1747W: http://linux-atm.sourceforge.net
@@ -2065,7 +2076,7 @@ F: include/net/bluetooth/
2065BONDING DRIVER 2076BONDING DRIVER
2066M: Jay Vosburgh <j.vosburgh@gmail.com> 2077M: Jay Vosburgh <j.vosburgh@gmail.com>
2067M: Veaceslav Falico <vfalico@gmail.com> 2078M: Veaceslav Falico <vfalico@gmail.com>
2068M: Andy Gospodarek <andy@greyhouse.net> 2079M: Andy Gospodarek <gospo@cumulusnetworks.com>
2069L: netdev@vger.kernel.org 2080L: netdev@vger.kernel.org
2070W: http://sourceforge.net/projects/bonding/ 2081W: http://sourceforge.net/projects/bonding/
2071S: Supported 2082S: Supported
@@ -2107,7 +2118,6 @@ F: drivers/net/ethernet/broadcom/bnx2x/
2107 2118
2108BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITECTURE 2119BROADCOM BCM281XX/BCM11XXX/BCM216XX ARM ARCHITECTURE
2109M: Christian Daudt <bcm@fixthebug.org> 2120M: Christian Daudt <bcm@fixthebug.org>
2110M: Matt Porter <mporter@linaro.org>
2111M: Florian Fainelli <f.fainelli@gmail.com> 2121M: Florian Fainelli <f.fainelli@gmail.com>
2112L: bcm-kernel-feedback-list@broadcom.com 2122L: bcm-kernel-feedback-list@broadcom.com
2113T: git git://github.com/broadcom/mach-bcm 2123T: git git://github.com/broadcom/mach-bcm
@@ -2369,8 +2379,9 @@ F: arch/x86/include/asm/tce.h
2369 2379
2370CAN NETWORK LAYER 2380CAN NETWORK LAYER
2371M: Oliver Hartkopp <socketcan@hartkopp.net> 2381M: Oliver Hartkopp <socketcan@hartkopp.net>
2382M: Marc Kleine-Budde <mkl@pengutronix.de>
2372L: linux-can@vger.kernel.org 2383L: linux-can@vger.kernel.org
2373W: http://gitorious.org/linux-can 2384W: https://github.com/linux-can
2374T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git 2385T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git
2375T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git 2386T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git
2376S: Maintained 2387S: Maintained
@@ -2386,7 +2397,7 @@ CAN NETWORK DRIVERS
2386M: Wolfgang Grandegger <wg@grandegger.com> 2397M: Wolfgang Grandegger <wg@grandegger.com>
2387M: Marc Kleine-Budde <mkl@pengutronix.de> 2398M: Marc Kleine-Budde <mkl@pengutronix.de>
2388L: linux-can@vger.kernel.org 2399L: linux-can@vger.kernel.org
2389W: http://gitorious.org/linux-can 2400W: https://github.com/linux-can
2390T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git 2401T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can.git
2391T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git 2402T: git git://git.kernel.org/pub/scm/linux/kernel/git/mkl/linux-can-next.git
2392S: Maintained 2403S: Maintained
@@ -3937,7 +3948,7 @@ S: Maintained
3937F: drivers/staging/fbtft/ 3948F: drivers/staging/fbtft/
3938 3949
3939FCOE SUBSYSTEM (libfc, libfcoe, fcoe) 3950FCOE SUBSYSTEM (libfc, libfcoe, fcoe)
3940M: Robert Love <robert.w.love@intel.com> 3951M: Vasu Dev <vasu.dev@intel.com>
3941L: fcoe-devel@open-fcoe.org 3952L: fcoe-devel@open-fcoe.org
3942W: www.Open-FCoE.org 3953W: www.Open-FCoE.org
3943S: Supported 3954S: Supported
@@ -7213,8 +7224,7 @@ ORACLE CLUSTER FILESYSTEM 2 (OCFS2)
7213M: Mark Fasheh <mfasheh@suse.com> 7224M: Mark Fasheh <mfasheh@suse.com>
7214M: Joel Becker <jlbec@evilplan.org> 7225M: Joel Becker <jlbec@evilplan.org>
7215L: ocfs2-devel@oss.oracle.com (moderated for non-subscribers) 7226L: ocfs2-devel@oss.oracle.com (moderated for non-subscribers)
7216W: http://oss.oracle.com/projects/ocfs2/ 7227W: http://ocfs2.wiki.kernel.org
7217T: git git://git.kernel.org/pub/scm/linux/kernel/git/jlbec/ocfs2.git
7218S: Supported 7228S: Supported
7219F: Documentation/filesystems/ocfs2.txt 7229F: Documentation/filesystems/ocfs2.txt
7220F: Documentation/filesystems/dlmfs.txt 7230F: Documentation/filesystems/dlmfs.txt
@@ -8481,6 +8491,14 @@ S: Supported
8481L: netdev@vger.kernel.org 8491L: netdev@vger.kernel.org
8482F: drivers/net/ethernet/samsung/sxgbe/ 8492F: drivers/net/ethernet/samsung/sxgbe/
8483 8493
8494SAMSUNG THERMAL DRIVER
8495M: Lukasz Majewski <l.majewski@samsung.com>
8496L: linux-pm@vger.kernel.org
8497L: linux-samsung-soc@vger.kernel.org
8498S: Supported
8499T: https://github.com/lmajewski/linux-samsung-thermal.git
8500F: drivers/thermal/samsung/
8501
8484SAMSUNG USB2 PHY DRIVER 8502SAMSUNG USB2 PHY DRIVER
8485M: Kamil Debski <k.debski@samsung.com> 8503M: Kamil Debski <k.debski@samsung.com>
8486L: linux-kernel@vger.kernel.org 8504L: linux-kernel@vger.kernel.org
@@ -8567,7 +8585,7 @@ S: Maintained
8567F: drivers/scsi/sr* 8585F: drivers/scsi/sr*
8568 8586
8569SCSI RDMA PROTOCOL (SRP) INITIATOR 8587SCSI RDMA PROTOCOL (SRP) INITIATOR
8570M: Bart Van Assche <bvanassche@acm.org> 8588M: Bart Van Assche <bart.vanassche@sandisk.com>
8571L: linux-rdma@vger.kernel.org 8589L: linux-rdma@vger.kernel.org
8572S: Supported 8590S: Supported
8573W: http://www.openfabrics.org 8591W: http://www.openfabrics.org
@@ -9719,6 +9737,11 @@ L: linux-omap@vger.kernel.org
9719S: Maintained 9737S: Maintained
9720F: drivers/thermal/ti-soc-thermal/ 9738F: drivers/thermal/ti-soc-thermal/
9721 9739
9740TI CDCE706 CLOCK DRIVER
9741M: Max Filippov <jcmvbkbc@gmail.com>
9742S: Maintained
9743F: drivers/clk/clk-cdce706.c
9744
9722TI CLOCK DRIVER 9745TI CLOCK DRIVER
9723M: Tero Kristo <t-kristo@ti.com> 9746M: Tero Kristo <t-kristo@ti.com>
9724L: linux-omap@vger.kernel.org 9747L: linux-omap@vger.kernel.org
@@ -10184,6 +10207,13 @@ S: Maintained
10184F: Documentation/usb/ohci.txt 10207F: Documentation/usb/ohci.txt
10185F: drivers/usb/host/ohci* 10208F: drivers/usb/host/ohci*
10186 10209
10210USB OTG FSM (Finite State Machine)
10211M: Peter Chen <Peter.Chen@freescale.com>
10212T: git git://github.com/hzpeterchen/linux-usb.git
10213L: linux-usb@vger.kernel.org
10214S: Maintained
10215F: drivers/usb/common/usb-otg-fsm.c
10216
10187USB OVER IP DRIVER 10217USB OVER IP DRIVER
10188M: Valentina Manea <valentina.manea.m@gmail.com> 10218M: Valentina Manea <valentina.manea.m@gmail.com>
10189M: Shuah Khan <shuah.kh@samsung.com> 10219M: Shuah Khan <shuah.kh@samsung.com>
diff --git a/Makefile b/Makefile
index 19e256ae2679..14c722f96877 100644
--- a/Makefile
+++ b/Makefile
@@ -1,8 +1,8 @@
1VERSION = 3 1VERSION = 4
2PATCHLEVEL = 19 2PATCHLEVEL = 0
3SUBLEVEL = 0 3SUBLEVEL = 0
4EXTRAVERSION = 4EXTRAVERSION = -rc5
5NAME = Diseased Newt 5NAME = Hurr durr I'ma sheep
6 6
7# *DOCUMENTATION* 7# *DOCUMENTATION*
8# To see a list of typical targets execute "make help" 8# To see a list of typical targets execute "make help"
diff --git a/arch/arc/include/asm/processor.h b/arch/arc/include/asm/processor.h
index 4e547296831d..52312cb5dbe2 100644
--- a/arch/arc/include/asm/processor.h
+++ b/arch/arc/include/asm/processor.h
@@ -47,9 +47,6 @@ struct thread_struct {
47/* Forward declaration, a strange C thing */ 47/* Forward declaration, a strange C thing */
48struct task_struct; 48struct task_struct;
49 49
50/* Return saved PC of a blocked thread */
51unsigned long thread_saved_pc(struct task_struct *t);
52
53#define task_pt_regs(p) \ 50#define task_pt_regs(p) \
54 ((struct pt_regs *)(THREAD_SIZE + (void *)task_stack_page(p)) - 1) 51 ((struct pt_regs *)(THREAD_SIZE + (void *)task_stack_page(p)) - 1)
55 52
@@ -72,18 +69,21 @@ unsigned long thread_saved_pc(struct task_struct *t);
72#define release_segments(mm) do { } while (0) 69#define release_segments(mm) do { } while (0)
73 70
74#define KSTK_EIP(tsk) (task_pt_regs(tsk)->ret) 71#define KSTK_EIP(tsk) (task_pt_regs(tsk)->ret)
72#define KSTK_ESP(tsk) (task_pt_regs(tsk)->sp)
75 73
76/* 74/*
77 * Where abouts of Task's sp, fp, blink when it was last seen in kernel mode. 75 * Where abouts of Task's sp, fp, blink when it was last seen in kernel mode.
78 * Look in process.c for details of kernel stack layout 76 * Look in process.c for details of kernel stack layout
79 */ 77 */
80#define KSTK_ESP(tsk) (tsk->thread.ksp) 78#define TSK_K_ESP(tsk) (tsk->thread.ksp)
81 79
82#define KSTK_REG(tsk, off) (*((unsigned int *)(KSTK_ESP(tsk) + \ 80#define TSK_K_REG(tsk, off) (*((unsigned int *)(TSK_K_ESP(tsk) + \
83 sizeof(struct callee_regs) + off))) 81 sizeof(struct callee_regs) + off)))
84 82
85#define KSTK_BLINK(tsk) KSTK_REG(tsk, 4) 83#define TSK_K_BLINK(tsk) TSK_K_REG(tsk, 4)
86#define KSTK_FP(tsk) KSTK_REG(tsk, 0) 84#define TSK_K_FP(tsk) TSK_K_REG(tsk, 0)
85
86#define thread_saved_pc(tsk) TSK_K_BLINK(tsk)
87 87
88extern void start_thread(struct pt_regs * regs, unsigned long pc, 88extern void start_thread(struct pt_regs * regs, unsigned long pc,
89 unsigned long usp); 89 unsigned long usp);
diff --git a/arch/arc/include/asm/stacktrace.h b/arch/arc/include/asm/stacktrace.h
new file mode 100644
index 000000000000..b29b6064ea14
--- /dev/null
+++ b/arch/arc/include/asm/stacktrace.h
@@ -0,0 +1,37 @@
1/*
2 * Copyright (C) 2014-15 Synopsys, Inc. (www.synopsys.com)
3 * Copyright (C) 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * published by the Free Software Foundation.
8 */
9
10#ifndef __ASM_STACKTRACE_H
11#define __ASM_STACKTRACE_H
12
13#include <linux/sched.h>
14
15/**
16 * arc_unwind_core - Unwind the kernel mode stack for an execution context
17 * @tsk: NULL for current task, specific task otherwise
18 * @regs: pt_regs used to seed the unwinder {SP, FP, BLINK, PC}
19 * If NULL, use pt_regs of @tsk (if !NULL) otherwise
20 * use the current values of {SP, FP, BLINK, PC}
21 * @consumer_fn: Callback invoked for each frame unwound
22 * Returns 0 to continue unwinding, -1 to stop
23 * @arg: Arg to callback
24 *
25 * Returns the address of first function in stack
26 *
27 * Semantics:
28 * - synchronous unwinding (e.g. dump_stack): @tsk NULL, @regs NULL
29 * - Asynchronous unwinding of sleeping task: @tsk !NULL, @regs NULL
30 * - Asynchronous unwinding of intr/excp etc: @tsk !NULL, @regs !NULL
31 */
32notrace noinline unsigned int arc_unwind_core(
33 struct task_struct *tsk, struct pt_regs *regs,
34 int (*consumer_fn) (unsigned int, void *),
35 void *arg);
36
37#endif /* __ASM_STACKTRACE_H */
diff --git a/arch/arc/kernel/process.c b/arch/arc/kernel/process.c
index fdd89715d2d3..98c00a2d4dd9 100644
--- a/arch/arc/kernel/process.c
+++ b/arch/arc/kernel/process.c
@@ -192,29 +192,6 @@ int dump_fpu(struct pt_regs *regs, elf_fpregset_t *fpu)
192 return 0; 192 return 0;
193} 193}
194 194
195/*
196 * API: expected by schedular Code: If thread is sleeping where is that.
197 * What is this good for? it will be always the scheduler or ret_from_fork.
198 * So we hard code that anyways.
199 */
200unsigned long thread_saved_pc(struct task_struct *t)
201{
202 struct pt_regs *regs = task_pt_regs(t);
203 unsigned long blink = 0;
204
205 /*
206 * If the thread being queried for in not itself calling this, then it
207 * implies it is not executing, which in turn implies it is sleeping,
208 * which in turn implies it got switched OUT by the schedular.
209 * In that case, it's kernel mode blink can reliably retrieved as per
210 * the picture above (right above pt_regs).
211 */
212 if (t != current && t->state != TASK_RUNNING)
213 blink = *((unsigned int *)regs - 1);
214
215 return blink;
216}
217
218int elf_check_arch(const struct elf32_hdr *x) 195int elf_check_arch(const struct elf32_hdr *x)
219{ 196{
220 unsigned int eflags; 197 unsigned int eflags;
diff --git a/arch/arc/kernel/stacktrace.c b/arch/arc/kernel/stacktrace.c
index 9ce47cfe2303..92320d6f737c 100644
--- a/arch/arc/kernel/stacktrace.c
+++ b/arch/arc/kernel/stacktrace.c
@@ -43,6 +43,10 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
43 struct pt_regs *regs, 43 struct pt_regs *regs,
44 struct unwind_frame_info *frame_info) 44 struct unwind_frame_info *frame_info)
45{ 45{
46 /*
47 * synchronous unwinding (e.g. dump_stack)
48 * - uses current values of SP and friends
49 */
46 if (tsk == NULL && regs == NULL) { 50 if (tsk == NULL && regs == NULL) {
47 unsigned long fp, sp, blink, ret; 51 unsigned long fp, sp, blink, ret;
48 frame_info->task = current; 52 frame_info->task = current;
@@ -61,12 +65,17 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
61 frame_info->regs.r63 = ret; 65 frame_info->regs.r63 = ret;
62 frame_info->call_frame = 0; 66 frame_info->call_frame = 0;
63 } else if (regs == NULL) { 67 } else if (regs == NULL) {
68 /*
69 * Asynchronous unwinding of sleeping task
70 * - Gets SP etc from task's pt_regs (saved bottom of kernel
71 * mode stack of task)
72 */
64 73
65 frame_info->task = tsk; 74 frame_info->task = tsk;
66 75
67 frame_info->regs.r27 = KSTK_FP(tsk); 76 frame_info->regs.r27 = TSK_K_FP(tsk);
68 frame_info->regs.r28 = KSTK_ESP(tsk); 77 frame_info->regs.r28 = TSK_K_ESP(tsk);
69 frame_info->regs.r31 = KSTK_BLINK(tsk); 78 frame_info->regs.r31 = TSK_K_BLINK(tsk);
70 frame_info->regs.r63 = (unsigned int)__switch_to; 79 frame_info->regs.r63 = (unsigned int)__switch_to;
71 80
72 /* In the prologue of __switch_to, first FP is saved on stack 81 /* In the prologue of __switch_to, first FP is saved on stack
@@ -83,6 +92,10 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
83 frame_info->call_frame = 0; 92 frame_info->call_frame = 0;
84 93
85 } else { 94 } else {
95 /*
96 * Asynchronous unwinding of intr/exception
97 * - Just uses the pt_regs passed
98 */
86 frame_info->task = tsk; 99 frame_info->task = tsk;
87 100
88 frame_info->regs.r27 = regs->fp; 101 frame_info->regs.r27 = regs->fp;
@@ -95,7 +108,7 @@ static void seed_unwind_frame_info(struct task_struct *tsk,
95 108
96#endif 109#endif
97 110
98static noinline unsigned int 111notrace noinline unsigned int
99arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs, 112arc_unwind_core(struct task_struct *tsk, struct pt_regs *regs,
100 int (*consumer_fn) (unsigned int, void *), void *arg) 113 int (*consumer_fn) (unsigned int, void *), void *arg)
101{ 114{
diff --git a/arch/arc/kernel/unaligned.c b/arch/arc/kernel/unaligned.c
index 7ff5b5c183bb..74db59b6f392 100644
--- a/arch/arc/kernel/unaligned.c
+++ b/arch/arc/kernel/unaligned.c
@@ -12,6 +12,7 @@
12 */ 12 */
13 13
14#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/perf_event.h>
15#include <linux/ptrace.h> 16#include <linux/ptrace.h>
16#include <linux/uaccess.h> 17#include <linux/uaccess.h>
17#include <asm/disasm.h> 18#include <asm/disasm.h>
@@ -253,6 +254,7 @@ int misaligned_fixup(unsigned long address, struct pt_regs *regs,
253 } 254 }
254 } 255 }
255 256
257 perf_sw_event(PERF_COUNT_SW_ALIGNMENT_FAULTS, 1, regs, address);
256 return 0; 258 return 0;
257 259
258fault: 260fault:
diff --git a/arch/arc/mm/fault.c b/arch/arc/mm/fault.c
index 563cb27e37f5..6a2e006cbcce 100644
--- a/arch/arc/mm/fault.c
+++ b/arch/arc/mm/fault.c
@@ -14,6 +14,7 @@
14#include <linux/ptrace.h> 14#include <linux/ptrace.h>
15#include <linux/uaccess.h> 15#include <linux/uaccess.h>
16#include <linux/kdebug.h> 16#include <linux/kdebug.h>
17#include <linux/perf_event.h>
17#include <asm/pgalloc.h> 18#include <asm/pgalloc.h>
18#include <asm/mmu.h> 19#include <asm/mmu.h>
19 20
@@ -139,13 +140,20 @@ good_area:
139 return; 140 return;
140 } 141 }
141 142
143 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS, 1, regs, address);
144
142 if (likely(!(fault & VM_FAULT_ERROR))) { 145 if (likely(!(fault & VM_FAULT_ERROR))) {
143 if (flags & FAULT_FLAG_ALLOW_RETRY) { 146 if (flags & FAULT_FLAG_ALLOW_RETRY) {
144 /* To avoid updating stats twice for retry case */ 147 /* To avoid updating stats twice for retry case */
145 if (fault & VM_FAULT_MAJOR) 148 if (fault & VM_FAULT_MAJOR) {
146 tsk->maj_flt++; 149 tsk->maj_flt++;
147 else 150 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MAJ, 1,
151 regs, address);
152 } else {
148 tsk->min_flt++; 153 tsk->min_flt++;
154 perf_sw_event(PERF_COUNT_SW_PAGE_FAULTS_MIN, 1,
155 regs, address);
156 }
149 157
150 if (fault & VM_FAULT_RETRY) { 158 if (fault & VM_FAULT_RETRY) {
151 flags &= ~FAULT_FLAG_ALLOW_RETRY; 159 flags &= ~FAULT_FLAG_ALLOW_RETRY;
diff --git a/arch/arm/Makefile b/arch/arm/Makefile
index 7f99cd652203..eb7bb511f853 100644
--- a/arch/arm/Makefile
+++ b/arch/arm/Makefile
@@ -150,6 +150,7 @@ machine-$(CONFIG_ARCH_BERLIN) += berlin
150machine-$(CONFIG_ARCH_CLPS711X) += clps711x 150machine-$(CONFIG_ARCH_CLPS711X) += clps711x
151machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx 151machine-$(CONFIG_ARCH_CNS3XXX) += cns3xxx
152machine-$(CONFIG_ARCH_DAVINCI) += davinci 152machine-$(CONFIG_ARCH_DAVINCI) += davinci
153machine-$(CONFIG_ARCH_DIGICOLOR) += digicolor
153machine-$(CONFIG_ARCH_DOVE) += dove 154machine-$(CONFIG_ARCH_DOVE) += dove
154machine-$(CONFIG_ARCH_EBSA110) += ebsa110 155machine-$(CONFIG_ARCH_EBSA110) += ebsa110
155machine-$(CONFIG_ARCH_EFM32) += efm32 156machine-$(CONFIG_ARCH_EFM32) += efm32
diff --git a/arch/arm/boot/dts/am335x-bone-common.dtsi b/arch/arm/boot/dts/am335x-bone-common.dtsi
index 6cc25ed912ee..c3255e0c90aa 100644
--- a/arch/arm/boot/dts/am335x-bone-common.dtsi
+++ b/arch/arm/boot/dts/am335x-bone-common.dtsi
@@ -195,6 +195,7 @@
195 195
196&usb0 { 196&usb0 {
197 status = "okay"; 197 status = "okay";
198 dr_mode = "peripheral";
198}; 199};
199 200
200&usb1 { 201&usb1 {
@@ -300,3 +301,11 @@
300 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>; 301 cd-gpios = <&gpio0 6 GPIO_ACTIVE_HIGH>;
301 cd-inverted; 302 cd-inverted;
302}; 303};
304
305&aes {
306 status = "okay";
307};
308
309&sham {
310 status = "okay";
311};
diff --git a/arch/arm/boot/dts/am335x-bone.dts b/arch/arm/boot/dts/am335x-bone.dts
index 83d40f7655e5..6b8493720424 100644
--- a/arch/arm/boot/dts/am335x-bone.dts
+++ b/arch/arm/boot/dts/am335x-bone.dts
@@ -24,11 +24,3 @@
24&mmc1 { 24&mmc1 {
25 vmmc-supply = <&ldo3_reg>; 25 vmmc-supply = <&ldo3_reg>;
26}; 26};
27
28&sham {
29 status = "okay";
30};
31
32&aes {
33 status = "okay";
34};
diff --git a/arch/arm/boot/dts/am335x-lxm.dts b/arch/arm/boot/dts/am335x-lxm.dts
index 7266a00aab2e..5c5667a3624d 100644
--- a/arch/arm/boot/dts/am335x-lxm.dts
+++ b/arch/arm/boot/dts/am335x-lxm.dts
@@ -328,6 +328,10 @@
328 dual_emac_res_vlan = <3>; 328 dual_emac_res_vlan = <3>;
329}; 329};
330 330
331&phy_sel {
332 rmii-clock-ext;
333};
334
331&mac { 335&mac {
332 pinctrl-names = "default", "sleep"; 336 pinctrl-names = "default", "sleep";
333 pinctrl-0 = <&cpsw_default>; 337 pinctrl-0 = <&cpsw_default>;
diff --git a/arch/arm/boot/dts/am33xx-clocks.dtsi b/arch/arm/boot/dts/am33xx-clocks.dtsi
index 712edce7d6fb..071b56aa0c7e 100644
--- a/arch/arm/boot/dts/am33xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am33xx-clocks.dtsi
@@ -99,7 +99,7 @@
99 ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 { 99 ehrpwm0_tbclk: ehrpwm0_tbclk@44e10664 {
100 #clock-cells = <0>; 100 #clock-cells = <0>;
101 compatible = "ti,gate-clock"; 101 compatible = "ti,gate-clock";
102 clocks = <&dpll_per_m2_ck>; 102 clocks = <&l4ls_gclk>;
103 ti,bit-shift = <0>; 103 ti,bit-shift = <0>;
104 reg = <0x0664>; 104 reg = <0x0664>;
105 }; 105 };
@@ -107,7 +107,7 @@
107 ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 { 107 ehrpwm1_tbclk: ehrpwm1_tbclk@44e10664 {
108 #clock-cells = <0>; 108 #clock-cells = <0>;
109 compatible = "ti,gate-clock"; 109 compatible = "ti,gate-clock";
110 clocks = <&dpll_per_m2_ck>; 110 clocks = <&l4ls_gclk>;
111 ti,bit-shift = <1>; 111 ti,bit-shift = <1>;
112 reg = <0x0664>; 112 reg = <0x0664>;
113 }; 113 };
@@ -115,7 +115,7 @@
115 ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 { 115 ehrpwm2_tbclk: ehrpwm2_tbclk@44e10664 {
116 #clock-cells = <0>; 116 #clock-cells = <0>;
117 compatible = "ti,gate-clock"; 117 compatible = "ti,gate-clock";
118 clocks = <&dpll_per_m2_ck>; 118 clocks = <&l4ls_gclk>;
119 ti,bit-shift = <2>; 119 ti,bit-shift = <2>;
120 reg = <0x0664>; 120 reg = <0x0664>;
121 }; 121 };
diff --git a/arch/arm/boot/dts/am437x-idk-evm.dts b/arch/arm/boot/dts/am437x-idk-evm.dts
index f9a17e2ca8cb..0198f5a62b96 100644
--- a/arch/arm/boot/dts/am437x-idk-evm.dts
+++ b/arch/arm/boot/dts/am437x-idk-evm.dts
@@ -133,20 +133,6 @@
133 >; 133 >;
134 }; 134 };
135 135
136 i2c1_pins_default: i2c1_pins_default {
137 pinctrl-single,pins = <
138 0x15c (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_cs0.i2c1_scl */
139 0x158 (PIN_INPUT | SLEWCTRL_FAST | MUX_MODE2) /* spi0_d1.i2c1_sda */
140 >;
141 };
142
143 i2c1_pins_sleep: i2c1_pins_sleep {
144 pinctrl-single,pins = <
145 0x15c (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_cs0.i2c1_scl */
146 0x158 (PIN_INPUT_PULLDOWN | MUX_MODE7) /* spi0_d1.i2c1_sda */
147 >;
148 };
149
150 mmc1_pins_default: pinmux_mmc1_pins_default { 136 mmc1_pins_default: pinmux_mmc1_pins_default {
151 pinctrl-single,pins = < 137 pinctrl-single,pins = <
152 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */ 138 0x100 (PIN_INPUT | MUX_MODE0) /* mmc0_clk.mmc0_clk */
@@ -254,7 +240,7 @@
254 status = "okay"; 240 status = "okay";
255 pinctrl-names = "default", "sleep"; 241 pinctrl-names = "default", "sleep";
256 pinctrl-0 = <&i2c0_pins_default>; 242 pinctrl-0 = <&i2c0_pins_default>;
257 pinctrl-1 = <&i2c0_pins_default>; 243 pinctrl-1 = <&i2c0_pins_sleep>;
258 clock-frequency = <400000>; 244 clock-frequency = <400000>;
259 245
260 at24@50 { 246 at24@50 {
@@ -262,17 +248,10 @@
262 pagesize = <64>; 248 pagesize = <64>;
263 reg = <0x50>; 249 reg = <0x50>;
264 }; 250 };
265};
266
267&i2c1 {
268 status = "okay";
269 pinctrl-names = "default", "sleep";
270 pinctrl-0 = <&i2c1_pins_default>;
271 pinctrl-1 = <&i2c1_pins_default>;
272 clock-frequency = <400000>;
273 251
274 tps: tps62362@60 { 252 tps: tps62362@60 {
275 compatible = "ti,tps62362"; 253 compatible = "ti,tps62362";
254 reg = <0x60>;
276 regulator-name = "VDD_MPU"; 255 regulator-name = "VDD_MPU";
277 regulator-min-microvolt = <950000>; 256 regulator-min-microvolt = <950000>;
278 regulator-max-microvolt = <1330000>; 257 regulator-max-microvolt = <1330000>;
diff --git a/arch/arm/boot/dts/am43xx-clocks.dtsi b/arch/arm/boot/dts/am43xx-clocks.dtsi
index c7dc9dab93a4..cfb49686ab6a 100644
--- a/arch/arm/boot/dts/am43xx-clocks.dtsi
+++ b/arch/arm/boot/dts/am43xx-clocks.dtsi
@@ -107,7 +107,7 @@
107 ehrpwm0_tbclk: ehrpwm0_tbclk { 107 ehrpwm0_tbclk: ehrpwm0_tbclk {
108 #clock-cells = <0>; 108 #clock-cells = <0>;
109 compatible = "ti,gate-clock"; 109 compatible = "ti,gate-clock";
110 clocks = <&dpll_per_m2_ck>; 110 clocks = <&l4ls_gclk>;
111 ti,bit-shift = <0>; 111 ti,bit-shift = <0>;
112 reg = <0x0664>; 112 reg = <0x0664>;
113 }; 113 };
@@ -115,7 +115,7 @@
115 ehrpwm1_tbclk: ehrpwm1_tbclk { 115 ehrpwm1_tbclk: ehrpwm1_tbclk {
116 #clock-cells = <0>; 116 #clock-cells = <0>;
117 compatible = "ti,gate-clock"; 117 compatible = "ti,gate-clock";
118 clocks = <&dpll_per_m2_ck>; 118 clocks = <&l4ls_gclk>;
119 ti,bit-shift = <1>; 119 ti,bit-shift = <1>;
120 reg = <0x0664>; 120 reg = <0x0664>;
121 }; 121 };
@@ -123,7 +123,7 @@
123 ehrpwm2_tbclk: ehrpwm2_tbclk { 123 ehrpwm2_tbclk: ehrpwm2_tbclk {
124 #clock-cells = <0>; 124 #clock-cells = <0>;
125 compatible = "ti,gate-clock"; 125 compatible = "ti,gate-clock";
126 clocks = <&dpll_per_m2_ck>; 126 clocks = <&l4ls_gclk>;
127 ti,bit-shift = <2>; 127 ti,bit-shift = <2>;
128 reg = <0x0664>; 128 reg = <0x0664>;
129 }; 129 };
@@ -131,7 +131,7 @@
131 ehrpwm3_tbclk: ehrpwm3_tbclk { 131 ehrpwm3_tbclk: ehrpwm3_tbclk {
132 #clock-cells = <0>; 132 #clock-cells = <0>;
133 compatible = "ti,gate-clock"; 133 compatible = "ti,gate-clock";
134 clocks = <&dpll_per_m2_ck>; 134 clocks = <&l4ls_gclk>;
135 ti,bit-shift = <4>; 135 ti,bit-shift = <4>;
136 reg = <0x0664>; 136 reg = <0x0664>;
137 }; 137 };
@@ -139,7 +139,7 @@
139 ehrpwm4_tbclk: ehrpwm4_tbclk { 139 ehrpwm4_tbclk: ehrpwm4_tbclk {
140 #clock-cells = <0>; 140 #clock-cells = <0>;
141 compatible = "ti,gate-clock"; 141 compatible = "ti,gate-clock";
142 clocks = <&dpll_per_m2_ck>; 142 clocks = <&l4ls_gclk>;
143 ti,bit-shift = <5>; 143 ti,bit-shift = <5>;
144 reg = <0x0664>; 144 reg = <0x0664>;
145 }; 145 };
@@ -147,7 +147,7 @@
147 ehrpwm5_tbclk: ehrpwm5_tbclk { 147 ehrpwm5_tbclk: ehrpwm5_tbclk {
148 #clock-cells = <0>; 148 #clock-cells = <0>;
149 compatible = "ti,gate-clock"; 149 compatible = "ti,gate-clock";
150 clocks = <&dpll_per_m2_ck>; 150 clocks = <&l4ls_gclk>;
151 ti,bit-shift = <6>; 151 ti,bit-shift = <6>;
152 reg = <0x0664>; 152 reg = <0x0664>;
153 }; 153 };
diff --git a/arch/arm/boot/dts/am57xx-beagle-x15.dts b/arch/arm/boot/dts/am57xx-beagle-x15.dts
index 03750af3b49a..6463f9ef2b54 100644
--- a/arch/arm/boot/dts/am57xx-beagle-x15.dts
+++ b/arch/arm/boot/dts/am57xx-beagle-x15.dts
@@ -549,14 +549,6 @@
549 pinctrl-0 = <&usb1_pins>; 549 pinctrl-0 = <&usb1_pins>;
550}; 550};
551 551
552&omap_dwc3_1 {
553 extcon = <&extcon_usb1>;
554};
555
556&omap_dwc3_2 {
557 extcon = <&extcon_usb2>;
558};
559
560&usb2 { 552&usb2 {
561 dr_mode = "peripheral"; 553 dr_mode = "peripheral";
562}; 554};
diff --git a/arch/arm/boot/dts/at91sam9260.dtsi b/arch/arm/boot/dts/at91sam9260.dtsi
index fff0ee69aab4..e7f0a4ae271c 100644
--- a/arch/arm/boot/dts/at91sam9260.dtsi
+++ b/arch/arm/boot/dts/at91sam9260.dtsi
@@ -494,12 +494,12 @@
494 494
495 pinctrl_usart3_rts: usart3_rts-0 { 495 pinctrl_usart3_rts: usart3_rts-0 {
496 atmel,pins = 496 atmel,pins =
497 <AT91_PIOB 8 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC8 periph B */ 497 <AT91_PIOC 8 AT91_PERIPH_B AT91_PINCTRL_NONE>;
498 }; 498 };
499 499
500 pinctrl_usart3_cts: usart3_cts-0 { 500 pinctrl_usart3_cts: usart3_cts-0 {
501 atmel,pins = 501 atmel,pins =
502 <AT91_PIOB 10 AT91_PERIPH_B AT91_PINCTRL_NONE>; /* PC10 periph B */ 502 <AT91_PIOC 10 AT91_PERIPH_B AT91_PINCTRL_NONE>;
503 }; 503 };
504 }; 504 };
505 505
@@ -853,7 +853,7 @@
853 }; 853 };
854 854
855 usb1: gadget@fffa4000 { 855 usb1: gadget@fffa4000 {
856 compatible = "atmel,at91rm9200-udc"; 856 compatible = "atmel,at91sam9260-udc";
857 reg = <0xfffa4000 0x4000>; 857 reg = <0xfffa4000 0x4000>;
858 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; 858 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
859 clocks = <&udc_clk>, <&udpck>; 859 clocks = <&udc_clk>, <&udpck>;
@@ -976,7 +976,6 @@
976 atmel,watchdog-type = "hardware"; 976 atmel,watchdog-type = "hardware";
977 atmel,reset-type = "all"; 977 atmel,reset-type = "all";
978 atmel,dbg-halt; 978 atmel,dbg-halt;
979 atmel,idle-halt;
980 status = "disabled"; 979 status = "disabled";
981 }; 980 };
982 981
diff --git a/arch/arm/boot/dts/at91sam9261.dtsi b/arch/arm/boot/dts/at91sam9261.dtsi
index e247b0b5fdab..d55fdf2487ef 100644
--- a/arch/arm/boot/dts/at91sam9261.dtsi
+++ b/arch/arm/boot/dts/at91sam9261.dtsi
@@ -124,11 +124,12 @@
124 }; 124 };
125 125
126 usb1: gadget@fffa4000 { 126 usb1: gadget@fffa4000 {
127 compatible = "atmel,at91rm9200-udc"; 127 compatible = "atmel,at91sam9261-udc";
128 reg = <0xfffa4000 0x4000>; 128 reg = <0xfffa4000 0x4000>;
129 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>; 129 interrupts = <10 IRQ_TYPE_LEVEL_HIGH 2>;
130 clocks = <&usb>, <&udc_clk>, <&udpck>; 130 clocks = <&udc_clk>, <&udpck>;
131 clock-names = "usb_clk", "udc_clk", "udpck"; 131 clock-names = "pclk", "hclk";
132 atmel,matrix = <&matrix>;
132 status = "disabled"; 133 status = "disabled";
133 }; 134 };
134 135
@@ -262,7 +263,7 @@
262 }; 263 };
263 264
264 matrix: matrix@ffffee00 { 265 matrix: matrix@ffffee00 {
265 compatible = "atmel,at91sam9260-bus-matrix"; 266 compatible = "atmel,at91sam9260-bus-matrix", "syscon";
266 reg = <0xffffee00 0x200>; 267 reg = <0xffffee00 0x200>;
267 }; 268 };
268 269
diff --git a/arch/arm/boot/dts/at91sam9263.dtsi b/arch/arm/boot/dts/at91sam9263.dtsi
index 1f67bb4c144e..fce301c4e9d6 100644
--- a/arch/arm/boot/dts/at91sam9263.dtsi
+++ b/arch/arm/boot/dts/at91sam9263.dtsi
@@ -69,7 +69,7 @@
69 69
70 sram1: sram@00500000 { 70 sram1: sram@00500000 {
71 compatible = "mmio-sram"; 71 compatible = "mmio-sram";
72 reg = <0x00300000 0x4000>; 72 reg = <0x00500000 0x4000>;
73 }; 73 };
74 74
75 ahb { 75 ahb {
@@ -856,7 +856,7 @@
856 }; 856 };
857 857
858 usb1: gadget@fff78000 { 858 usb1: gadget@fff78000 {
859 compatible = "atmel,at91rm9200-udc"; 859 compatible = "atmel,at91sam9263-udc";
860 reg = <0xfff78000 0x4000>; 860 reg = <0xfff78000 0x4000>;
861 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>; 861 interrupts = <24 IRQ_TYPE_LEVEL_HIGH 2>;
862 clocks = <&udc_clk>, <&udpck>; 862 clocks = <&udc_clk>, <&udpck>;
@@ -905,7 +905,6 @@
905 atmel,watchdog-type = "hardware"; 905 atmel,watchdog-type = "hardware";
906 atmel,reset-type = "all"; 906 atmel,reset-type = "all";
907 atmel,dbg-halt; 907 atmel,dbg-halt;
908 atmel,idle-halt;
909 status = "disabled"; 908 status = "disabled";
910 }; 909 };
911 910
diff --git a/arch/arm/boot/dts/at91sam9g45.dtsi b/arch/arm/boot/dts/at91sam9g45.dtsi
index ee80aa9c0759..488af63d5174 100644
--- a/arch/arm/boot/dts/at91sam9g45.dtsi
+++ b/arch/arm/boot/dts/at91sam9g45.dtsi
@@ -1116,7 +1116,6 @@
1116 atmel,watchdog-type = "hardware"; 1116 atmel,watchdog-type = "hardware";
1117 atmel,reset-type = "all"; 1117 atmel,reset-type = "all";
1118 atmel,dbg-halt; 1118 atmel,dbg-halt;
1119 atmel,idle-halt;
1120 status = "disabled"; 1119 status = "disabled";
1121 }; 1120 };
1122 1121
@@ -1301,7 +1300,7 @@
1301 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1300 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1302 reg = <0x00800000 0x100000>; 1301 reg = <0x00800000 0x100000>;
1303 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1302 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1304 clocks = <&usb>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>; 1303 clocks = <&utmi>, <&uhphs_clk>, <&uhphs_clk>, <&uhpck>;
1305 clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck"; 1304 clock-names = "usb_clk", "ehci_clk", "hclk", "uhpck";
1306 status = "disabled"; 1305 status = "disabled";
1307 }; 1306 };
diff --git a/arch/arm/boot/dts/at91sam9n12.dtsi b/arch/arm/boot/dts/at91sam9n12.dtsi
index c2666a7cb5b1..0c53a375ba99 100644
--- a/arch/arm/boot/dts/at91sam9n12.dtsi
+++ b/arch/arm/boot/dts/at91sam9n12.dtsi
@@ -894,7 +894,6 @@
894 atmel,watchdog-type = "hardware"; 894 atmel,watchdog-type = "hardware";
895 atmel,reset-type = "all"; 895 atmel,reset-type = "all";
896 atmel,dbg-halt; 896 atmel,dbg-halt;
897 atmel,idle-halt;
898 status = "disabled"; 897 status = "disabled";
899 }; 898 };
900 899
diff --git a/arch/arm/boot/dts/at91sam9x5.dtsi b/arch/arm/boot/dts/at91sam9x5.dtsi
index 818dabdd8c0e..d221179d0f1a 100644
--- a/arch/arm/boot/dts/at91sam9x5.dtsi
+++ b/arch/arm/boot/dts/at91sam9x5.dtsi
@@ -1066,7 +1066,7 @@
1066 reg = <0x00500000 0x80000 1066 reg = <0x00500000 0x80000
1067 0xf803c000 0x400>; 1067 0xf803c000 0x400>;
1068 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>; 1068 interrupts = <23 IRQ_TYPE_LEVEL_HIGH 0>;
1069 clocks = <&usb>, <&udphs_clk>; 1069 clocks = <&utmi>, <&udphs_clk>;
1070 clock-names = "hclk", "pclk"; 1070 clock-names = "hclk", "pclk";
1071 status = "disabled"; 1071 status = "disabled";
1072 1072
@@ -1130,7 +1130,6 @@
1130 atmel,watchdog-type = "hardware"; 1130 atmel,watchdog-type = "hardware";
1131 atmel,reset-type = "all"; 1131 atmel,reset-type = "all";
1132 atmel,dbg-halt; 1132 atmel,dbg-halt;
1133 atmel,idle-halt;
1134 status = "disabled"; 1133 status = "disabled";
1135 }; 1134 };
1136 1135
@@ -1186,7 +1185,7 @@
1186 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1185 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1187 reg = <0x00700000 0x100000>; 1186 reg = <0x00700000 0x100000>;
1188 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>; 1187 interrupts = <22 IRQ_TYPE_LEVEL_HIGH 2>;
1189 clocks = <&usb>, <&uhphs_clk>, <&uhpck>; 1188 clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
1190 clock-names = "usb_clk", "ehci_clk", "uhpck"; 1189 clock-names = "usb_clk", "ehci_clk", "uhpck";
1191 status = "disabled"; 1190 status = "disabled";
1192 }; 1191 };
diff --git a/arch/arm/boot/dts/bcm-cygnus.dtsi b/arch/arm/boot/dts/bcm-cygnus.dtsi
index 5126f9e77a98..ff5fb6ab0b97 100644
--- a/arch/arm/boot/dts/bcm-cygnus.dtsi
+++ b/arch/arm/boot/dts/bcm-cygnus.dtsi
@@ -70,6 +70,26 @@
70 }; 70 };
71 }; 71 };
72 72
73 i2c0: i2c@18008000 {
74 compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
75 reg = <0x18008000 0x100>;
76 #address-cells = <1>;
77 #size-cells = <0>;
78 interrupts = <GIC_SPI 85 IRQ_TYPE_NONE>;
79 clock-frequency = <100000>;
80 status = "disabled";
81 };
82
83 i2c1: i2c@1800b000 {
84 compatible = "brcm,cygnus-iproc-i2c", "brcm,iproc-i2c";
85 reg = <0x1800b000 0x100>;
86 #address-cells = <1>;
87 #size-cells = <0>;
88 interrupts = <GIC_SPI 86 IRQ_TYPE_NONE>;
89 clock-frequency = <100000>;
90 status = "disabled";
91 };
92
73 uart0: serial@18020000 { 93 uart0: serial@18020000 {
74 compatible = "snps,dw-apb-uart"; 94 compatible = "snps,dw-apb-uart";
75 reg = <0x18020000 0x100>; 95 reg = <0x18020000 0x100>;
diff --git a/arch/arm/boot/dts/bcm63138.dtsi b/arch/arm/boot/dts/bcm63138.dtsi
index d2d8e94e0aa2..f46329c8ad75 100644
--- a/arch/arm/boot/dts/bcm63138.dtsi
+++ b/arch/arm/boot/dts/bcm63138.dtsi
@@ -66,8 +66,9 @@
66 reg = <0x1d000 0x1000>; 66 reg = <0x1d000 0x1000>;
67 cache-unified; 67 cache-unified;
68 cache-level = <2>; 68 cache-level = <2>;
69 cache-sets = <16>; 69 cache-size = <524288>;
70 cache-size = <0x80000>; 70 cache-sets = <1024>;
71 cache-line-size = <32>;
71 interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>; 72 interrupts = <GIC_PPI 0 IRQ_TYPE_LEVEL_HIGH>;
72 }; 73 };
73 74
diff --git a/arch/arm/boot/dts/dm8168-evm.dts b/arch/arm/boot/dts/dm8168-evm.dts
index 857d0289ad4d..d3a29c1b8417 100644
--- a/arch/arm/boot/dts/dm8168-evm.dts
+++ b/arch/arm/boot/dts/dm8168-evm.dts
@@ -35,6 +35,18 @@
35 DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */ 35 DM816X_IOPAD(0x0aac, PIN_INPUT | MUX_MODE0) /* SPI_D1 */
36 >; 36 >;
37 }; 37 };
38
39 usb0_pins: pinmux_usb0_pins {
40 pinctrl-single,pins = <
41 DM816X_IOPAD(0x0d00, MUX_MODE0) /* USB0_DRVVBUS */
42 >;
43 };
44
45 usb1_pins: pinmux_usb0_pins {
46 pinctrl-single,pins = <
47 DM816X_IOPAD(0x0d04, MUX_MODE0) /* USB1_DRVVBUS */
48 >;
49 };
38}; 50};
39 51
40&i2c1 { 52&i2c1 {
@@ -127,3 +139,16 @@
127&mmc1 { 139&mmc1 {
128 vmmc-supply = <&vmmcsd_fixed>; 140 vmmc-supply = <&vmmcsd_fixed>;
129}; 141};
142
143/* At least dm8168-evm rev c won't support multipoint, later may */
144&usb0 {
145 pinctrl-names = "default";
146 pinctrl-0 = <&usb0_pins>;
147 mentor,multipoint = <0>;
148};
149
150&usb1 {
151 pinctrl-names = "default";
152 pinctrl-0 = <&usb1_pins>;
153 mentor,multipoint = <0>;
154};
diff --git a/arch/arm/boot/dts/dm816x.dtsi b/arch/arm/boot/dts/dm816x.dtsi
index d98d0f7de380..3c97b5f2addc 100644
--- a/arch/arm/boot/dts/dm816x.dtsi
+++ b/arch/arm/boot/dts/dm816x.dtsi
@@ -97,10 +97,31 @@
97 97
98 /* Device Configuration Registers */ 98 /* Device Configuration Registers */
99 scm_conf: syscon@600 { 99 scm_conf: syscon@600 {
100 compatible = "syscon"; 100 compatible = "syscon", "simple-bus";
101 reg = <0x600 0x110>; 101 reg = <0x600 0x110>;
102 #address-cells = <1>; 102 #address-cells = <1>;
103 #size-cells = <1>; 103 #size-cells = <1>;
104 ranges = <0 0x600 0x110>;
105
106 usb_phy0: usb-phy@20 {
107 compatible = "ti,dm8168-usb-phy";
108 reg = <0x20 0x8>;
109 reg-names = "phy";
110 clocks = <&main_fapll 6>;
111 clock-names = "refclk";
112 #phy-cells = <0>;
113 syscon = <&scm_conf>;
114 };
115
116 usb_phy1: usb-phy@28 {
117 compatible = "ti,dm8168-usb-phy";
118 reg = <0x28 0x8>;
119 reg-names = "phy";
120 clocks = <&main_fapll 6>;
121 clock-names = "refclk";
122 #phy-cells = <0>;
123 syscon = <&scm_conf>;
124 };
104 }; 125 };
105 126
106 scrm_clocks: clocks { 127 scrm_clocks: clocks {
@@ -357,7 +378,10 @@
357 reg-names = "mc", "control"; 378 reg-names = "mc", "control";
358 interrupts = <18>; 379 interrupts = <18>;
359 interrupt-names = "mc"; 380 interrupt-names = "mc";
360 dr_mode = "otg"; 381 dr_mode = "host";
382 interface-type = <0>;
383 phys = <&usb_phy0>;
384 phy-names = "usb2-phy";
361 mentor,multipoint = <1>; 385 mentor,multipoint = <1>;
362 mentor,num-eps = <16>; 386 mentor,num-eps = <16>;
363 mentor,ram-bits = <12>; 387 mentor,ram-bits = <12>;
@@ -366,13 +390,15 @@
366 390
367 usb1: usb@47401800 { 391 usb1: usb@47401800 {
368 compatible = "ti,musb-am33xx"; 392 compatible = "ti,musb-am33xx";
369 status = "disabled";
370 reg = <0x47401c00 0x400 393 reg = <0x47401c00 0x400
371 0x47401800 0x200>; 394 0x47401800 0x200>;
372 reg-names = "mc", "control"; 395 reg-names = "mc", "control";
373 interrupts = <19>; 396 interrupts = <19>;
374 interrupt-names = "mc"; 397 interrupt-names = "mc";
375 dr_mode = "otg"; 398 dr_mode = "host";
399 interface-type = <0>;
400 phys = <&usb_phy1>;
401 phy-names = "usb2-phy";
376 mentor,multipoint = <1>; 402 mentor,multipoint = <1>;
377 mentor,num-eps = <16>; 403 mentor,num-eps = <16>;
378 mentor,ram-bits = <12>; 404 mentor,ram-bits = <12>;
diff --git a/arch/arm/boot/dts/dra7-evm.dts b/arch/arm/boot/dts/dra7-evm.dts
index 746cddb1b8f5..7563d7ce01bb 100644
--- a/arch/arm/boot/dts/dra7-evm.dts
+++ b/arch/arm/boot/dts/dra7-evm.dts
@@ -263,17 +263,15 @@
263 263
264 dcan1_pins_default: dcan1_pins_default { 264 dcan1_pins_default: dcan1_pins_default {
265 pinctrl-single,pins = < 265 pinctrl-single,pins = <
266 0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */ 266 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
267 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 267 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
268 0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
269 >; 268 >;
270 }; 269 };
271 270
272 dcan1_pins_sleep: dcan1_pins_sleep { 271 dcan1_pins_sleep: dcan1_pins_sleep {
273 pinctrl-single,pins = < 272 pinctrl-single,pins = <
274 0x3d0 (MUX_MODE15) /* dcan1_tx.off */ 273 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
275 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 274 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
276 0x418 (MUX_MODE15) /* wakeup0.off */
277 >; 275 >;
278 }; 276 };
279}; 277};
@@ -543,14 +541,6 @@
543 }; 541 };
544}; 542};
545 543
546&omap_dwc3_1 {
547 extcon = <&extcon_usb1>;
548};
549
550&omap_dwc3_2 {
551 extcon = <&extcon_usb2>;
552};
553
554&usb1 { 544&usb1 {
555 dr_mode = "peripheral"; 545 dr_mode = "peripheral";
556 pinctrl-names = "default"; 546 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/dra7.dtsi b/arch/arm/boot/dts/dra7.dtsi
index 5827fedafd43..127608d79033 100644
--- a/arch/arm/boot/dts/dra7.dtsi
+++ b/arch/arm/boot/dts/dra7.dtsi
@@ -249,8 +249,8 @@
249 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>, 249 <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>,
250 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; 250 <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
251 #dma-cells = <1>; 251 #dma-cells = <1>;
252 #dma-channels = <32>; 252 dma-channels = <32>;
253 #dma-requests = <127>; 253 dma-requests = <127>;
254 }; 254 };
255 255
256 gpio1: gpio@4ae10000 { 256 gpio1: gpio@4ae10000 {
@@ -1090,8 +1090,8 @@
1090 <0x4A096800 0x40>; /* pll_ctrl */ 1090 <0x4A096800 0x40>; /* pll_ctrl */
1091 reg-names = "phy_rx", "phy_tx", "pll_ctrl"; 1091 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
1092 ctrl-module = <&omap_control_sata>; 1092 ctrl-module = <&omap_control_sata>;
1093 clocks = <&sys_clkin1>; 1093 clocks = <&sys_clkin1>, <&sata_ref_clk>;
1094 clock-names = "sysclk"; 1094 clock-names = "sysclk", "refclk";
1095 #phy-cells = <0>; 1095 #phy-cells = <0>;
1096 }; 1096 };
1097 1097
diff --git a/arch/arm/boot/dts/dra72-evm.dts b/arch/arm/boot/dts/dra72-evm.dts
index 4d8711713610..40ed539ce474 100644
--- a/arch/arm/boot/dts/dra72-evm.dts
+++ b/arch/arm/boot/dts/dra72-evm.dts
@@ -119,17 +119,15 @@
119 119
120 dcan1_pins_default: dcan1_pins_default { 120 dcan1_pins_default: dcan1_pins_default {
121 pinctrl-single,pins = < 121 pinctrl-single,pins = <
122 0x3d0 (PIN_OUTPUT | MUX_MODE0) /* dcan1_tx */ 122 0x3d0 (PIN_OUTPUT_PULLUP | MUX_MODE0) /* dcan1_tx */
123 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 123 0x418 (PULL_UP | MUX_MODE1) /* wakeup0.dcan1_rx */
124 0x418 (PULL_DIS | MUX_MODE1) /* wakeup0.dcan1_rx */
125 >; 124 >;
126 }; 125 };
127 126
128 dcan1_pins_sleep: dcan1_pins_sleep { 127 dcan1_pins_sleep: dcan1_pins_sleep {
129 pinctrl-single,pins = < 128 pinctrl-single,pins = <
130 0x3d0 (MUX_MODE15) /* dcan1_tx.off */ 129 0x3d0 (MUX_MODE15 | PULL_UP) /* dcan1_tx.off */
131 0x3d4 (MUX_MODE15) /* dcan1_rx.off */ 130 0x418 (MUX_MODE15 | PULL_UP) /* wakeup0.off */
132 0x418 (MUX_MODE15) /* wakeup0.off */
133 >; 131 >;
134 }; 132 };
135 133
@@ -380,14 +378,6 @@
380 phy-supply = <&ldo4_reg>; 378 phy-supply = <&ldo4_reg>;
381}; 379};
382 380
383&omap_dwc3_1 {
384 extcon = <&extcon_usb1>;
385};
386
387&omap_dwc3_2 {
388 extcon = <&extcon_usb2>;
389};
390
391&usb1 { 381&usb1 {
392 dr_mode = "peripheral"; 382 dr_mode = "peripheral";
393 pinctrl-names = "default"; 383 pinctrl-names = "default";
diff --git a/arch/arm/boot/dts/dra7xx-clocks.dtsi b/arch/arm/boot/dts/dra7xx-clocks.dtsi
index 4bdcbd61ce47..99b09a44e269 100644
--- a/arch/arm/boot/dts/dra7xx-clocks.dtsi
+++ b/arch/arm/boot/dts/dra7xx-clocks.dtsi
@@ -243,10 +243,18 @@
243 ti,invert-autoidle-bit; 243 ti,invert-autoidle-bit;
244 }; 244 };
245 245
246 dpll_core_byp_mux: dpll_core_byp_mux {
247 #clock-cells = <0>;
248 compatible = "ti,mux-clock";
249 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
250 ti,bit-shift = <23>;
251 reg = <0x012c>;
252 };
253
246 dpll_core_ck: dpll_core_ck { 254 dpll_core_ck: dpll_core_ck {
247 #clock-cells = <0>; 255 #clock-cells = <0>;
248 compatible = "ti,omap4-dpll-core-clock"; 256 compatible = "ti,omap4-dpll-core-clock";
249 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 257 clocks = <&sys_clkin1>, <&dpll_core_byp_mux>;
250 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>; 258 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
251 }; 259 };
252 260
@@ -309,10 +317,18 @@
309 clock-div = <1>; 317 clock-div = <1>;
310 }; 318 };
311 319
320 dpll_dsp_byp_mux: dpll_dsp_byp_mux {
321 #clock-cells = <0>;
322 compatible = "ti,mux-clock";
323 clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>;
324 ti,bit-shift = <23>;
325 reg = <0x0240>;
326 };
327
312 dpll_dsp_ck: dpll_dsp_ck { 328 dpll_dsp_ck: dpll_dsp_ck {
313 #clock-cells = <0>; 329 #clock-cells = <0>;
314 compatible = "ti,omap4-dpll-clock"; 330 compatible = "ti,omap4-dpll-clock";
315 clocks = <&sys_clkin1>, <&dsp_dpll_hs_clk_div>; 331 clocks = <&sys_clkin1>, <&dpll_dsp_byp_mux>;
316 reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>; 332 reg = <0x0234>, <0x0238>, <0x0240>, <0x023c>;
317 }; 333 };
318 334
@@ -335,10 +351,18 @@
335 clock-div = <1>; 351 clock-div = <1>;
336 }; 352 };
337 353
354 dpll_iva_byp_mux: dpll_iva_byp_mux {
355 #clock-cells = <0>;
356 compatible = "ti,mux-clock";
357 clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>;
358 ti,bit-shift = <23>;
359 reg = <0x01ac>;
360 };
361
338 dpll_iva_ck: dpll_iva_ck { 362 dpll_iva_ck: dpll_iva_ck {
339 #clock-cells = <0>; 363 #clock-cells = <0>;
340 compatible = "ti,omap4-dpll-clock"; 364 compatible = "ti,omap4-dpll-clock";
341 clocks = <&sys_clkin1>, <&iva_dpll_hs_clk_div>; 365 clocks = <&sys_clkin1>, <&dpll_iva_byp_mux>;
342 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; 366 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
343 }; 367 };
344 368
@@ -361,10 +385,18 @@
361 clock-div = <1>; 385 clock-div = <1>;
362 }; 386 };
363 387
388 dpll_gpu_byp_mux: dpll_gpu_byp_mux {
389 #clock-cells = <0>;
390 compatible = "ti,mux-clock";
391 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
392 ti,bit-shift = <23>;
393 reg = <0x02e4>;
394 };
395
364 dpll_gpu_ck: dpll_gpu_ck { 396 dpll_gpu_ck: dpll_gpu_ck {
365 #clock-cells = <0>; 397 #clock-cells = <0>;
366 compatible = "ti,omap4-dpll-clock"; 398 compatible = "ti,omap4-dpll-clock";
367 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 399 clocks = <&sys_clkin1>, <&dpll_gpu_byp_mux>;
368 reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>; 400 reg = <0x02d8>, <0x02dc>, <0x02e4>, <0x02e0>;
369 }; 401 };
370 402
@@ -398,10 +430,18 @@
398 clock-div = <1>; 430 clock-div = <1>;
399 }; 431 };
400 432
433 dpll_ddr_byp_mux: dpll_ddr_byp_mux {
434 #clock-cells = <0>;
435 compatible = "ti,mux-clock";
436 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
437 ti,bit-shift = <23>;
438 reg = <0x021c>;
439 };
440
401 dpll_ddr_ck: dpll_ddr_ck { 441 dpll_ddr_ck: dpll_ddr_ck {
402 #clock-cells = <0>; 442 #clock-cells = <0>;
403 compatible = "ti,omap4-dpll-clock"; 443 compatible = "ti,omap4-dpll-clock";
404 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 444 clocks = <&sys_clkin1>, <&dpll_ddr_byp_mux>;
405 reg = <0x0210>, <0x0214>, <0x021c>, <0x0218>; 445 reg = <0x0210>, <0x0214>, <0x021c>, <0x0218>;
406 }; 446 };
407 447
@@ -416,10 +456,18 @@
416 ti,invert-autoidle-bit; 456 ti,invert-autoidle-bit;
417 }; 457 };
418 458
459 dpll_gmac_byp_mux: dpll_gmac_byp_mux {
460 #clock-cells = <0>;
461 compatible = "ti,mux-clock";
462 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>;
463 ti,bit-shift = <23>;
464 reg = <0x02b4>;
465 };
466
419 dpll_gmac_ck: dpll_gmac_ck { 467 dpll_gmac_ck: dpll_gmac_ck {
420 #clock-cells = <0>; 468 #clock-cells = <0>;
421 compatible = "ti,omap4-dpll-clock"; 469 compatible = "ti,omap4-dpll-clock";
422 clocks = <&sys_clkin1>, <&dpll_abe_m3x2_ck>; 470 clocks = <&sys_clkin1>, <&dpll_gmac_byp_mux>;
423 reg = <0x02a8>, <0x02ac>, <0x02b4>, <0x02b0>; 471 reg = <0x02a8>, <0x02ac>, <0x02b4>, <0x02b0>;
424 }; 472 };
425 473
@@ -482,10 +530,18 @@
482 clock-div = <1>; 530 clock-div = <1>;
483 }; 531 };
484 532
533 dpll_eve_byp_mux: dpll_eve_byp_mux {
534 #clock-cells = <0>;
535 compatible = "ti,mux-clock";
536 clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>;
537 ti,bit-shift = <23>;
538 reg = <0x0290>;
539 };
540
485 dpll_eve_ck: dpll_eve_ck { 541 dpll_eve_ck: dpll_eve_ck {
486 #clock-cells = <0>; 542 #clock-cells = <0>;
487 compatible = "ti,omap4-dpll-clock"; 543 compatible = "ti,omap4-dpll-clock";
488 clocks = <&sys_clkin1>, <&eve_dpll_hs_clk_div>; 544 clocks = <&sys_clkin1>, <&dpll_eve_byp_mux>;
489 reg = <0x0284>, <0x0288>, <0x0290>, <0x028c>; 545 reg = <0x0284>, <0x0288>, <0x0290>, <0x028c>;
490 }; 546 };
491 547
@@ -1249,10 +1305,18 @@
1249 clock-div = <1>; 1305 clock-div = <1>;
1250 }; 1306 };
1251 1307
1308 dpll_per_byp_mux: dpll_per_byp_mux {
1309 #clock-cells = <0>;
1310 compatible = "ti,mux-clock";
1311 clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>;
1312 ti,bit-shift = <23>;
1313 reg = <0x014c>;
1314 };
1315
1252 dpll_per_ck: dpll_per_ck { 1316 dpll_per_ck: dpll_per_ck {
1253 #clock-cells = <0>; 1317 #clock-cells = <0>;
1254 compatible = "ti,omap4-dpll-clock"; 1318 compatible = "ti,omap4-dpll-clock";
1255 clocks = <&sys_clkin1>, <&per_dpll_hs_clk_div>; 1319 clocks = <&sys_clkin1>, <&dpll_per_byp_mux>;
1256 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>; 1320 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
1257 }; 1321 };
1258 1322
@@ -1275,10 +1339,18 @@
1275 clock-div = <1>; 1339 clock-div = <1>;
1276 }; 1340 };
1277 1341
1342 dpll_usb_byp_mux: dpll_usb_byp_mux {
1343 #clock-cells = <0>;
1344 compatible = "ti,mux-clock";
1345 clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>;
1346 ti,bit-shift = <23>;
1347 reg = <0x018c>;
1348 };
1349
1278 dpll_usb_ck: dpll_usb_ck { 1350 dpll_usb_ck: dpll_usb_ck {
1279 #clock-cells = <0>; 1351 #clock-cells = <0>;
1280 compatible = "ti,omap4-dpll-j-type-clock"; 1352 compatible = "ti,omap4-dpll-j-type-clock";
1281 clocks = <&sys_clkin1>, <&usb_dpll_hs_clk_div>; 1353 clocks = <&sys_clkin1>, <&dpll_usb_byp_mux>;
1282 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>; 1354 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
1283 }; 1355 };
1284 1356
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index 277b48b0b6f9..ac6b0ae42caf 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -18,6 +18,7 @@
18 */ 18 */
19 19
20#include "skeleton.dtsi" 20#include "skeleton.dtsi"
21#include "exynos4-cpu-thermal.dtsi"
21#include <dt-bindings/clock/exynos3250.h> 22#include <dt-bindings/clock/exynos3250.h>
22 23
23/ { 24/ {
@@ -193,6 +194,7 @@
193 interrupts = <0 216 0>; 194 interrupts = <0 216 0>;
194 clocks = <&cmu CLK_TMU_APBIF>; 195 clocks = <&cmu CLK_TMU_APBIF>;
195 clock-names = "tmu_apbif"; 196 clock-names = "tmu_apbif";
197 #include "exynos4412-tmu-sensor-conf.dtsi"
196 status = "disabled"; 198 status = "disabled";
197 }; 199 };
198 200
diff --git a/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
new file mode 100644
index 000000000000..735cb2f10817
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4-cpu-thermal.dtsi
@@ -0,0 +1,52 @@
1/*
2 * Device tree sources for Exynos4 thermal zone
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal.h>
13
14/ {
15thermal-zones {
16 cpu_thermal: cpu-thermal {
17 thermal-sensors = <&tmu 0>;
18 polling-delay-passive = <0>;
19 polling-delay = <0>;
20 trips {
21 cpu_alert0: cpu-alert-0 {
22 temperature = <70000>; /* millicelsius */
23 hysteresis = <10000>; /* millicelsius */
24 type = "active";
25 };
26 cpu_alert1: cpu-alert-1 {
27 temperature = <95000>; /* millicelsius */
28 hysteresis = <10000>; /* millicelsius */
29 type = "active";
30 };
31 cpu_alert2: cpu-alert-2 {
32 temperature = <110000>; /* millicelsius */
33 hysteresis = <10000>; /* millicelsius */
34 type = "active";
35 };
36 cpu_crit0: cpu-crit-0 {
37 temperature = <120000>; /* millicelsius */
38 hysteresis = <0>; /* millicelsius */
39 type = "critical";
40 };
41 };
42 cooling-maps {
43 map0 {
44 trip = <&cpu_alert0>;
45 };
46 map1 {
47 trip = <&cpu_alert1>;
48 };
49 };
50 };
51};
52};
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 76173cacd450..77ea547768f4 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -38,6 +38,7 @@
38 i2c5 = &i2c_5; 38 i2c5 = &i2c_5;
39 i2c6 = &i2c_6; 39 i2c6 = &i2c_6;
40 i2c7 = &i2c_7; 40 i2c7 = &i2c_7;
41 i2c8 = &i2c_8;
41 csis0 = &csis_0; 42 csis0 = &csis_0;
42 csis1 = &csis_1; 43 csis1 = &csis_1;
43 fimc0 = &fimc_0; 44 fimc0 = &fimc_0;
@@ -104,6 +105,7 @@
104 compatible = "samsung,exynos4210-pd"; 105 compatible = "samsung,exynos4210-pd";
105 reg = <0x10023C20 0x20>; 106 reg = <0x10023C20 0x20>;
106 #power-domain-cells = <0>; 107 #power-domain-cells = <0>;
108 power-domains = <&pd_lcd0>;
107 }; 109 };
108 110
109 pd_cam: cam-power-domain@10023C00 { 111 pd_cam: cam-power-domain@10023C00 {
@@ -554,6 +556,22 @@
554 status = "disabled"; 556 status = "disabled";
555 }; 557 };
556 558
559 i2c_8: i2c@138E0000 {
560 #address-cells = <1>;
561 #size-cells = <0>;
562 compatible = "samsung,s3c2440-hdmiphy-i2c";
563 reg = <0x138E0000 0x100>;
564 interrupts = <0 93 0>;
565 clocks = <&clock CLK_I2C_HDMI>;
566 clock-names = "i2c";
567 status = "disabled";
568
569 hdmi_i2c_phy: hdmiphy@38 {
570 compatible = "exynos4210-hdmiphy";
571 reg = <0x38>;
572 };
573 };
574
557 spi_0: spi@13920000 { 575 spi_0: spi@13920000 {
558 compatible = "samsung,exynos4210-spi"; 576 compatible = "samsung,exynos4210-spi";
559 reg = <0x13920000 0x100>; 577 reg = <0x13920000 0x100>;
@@ -663,6 +681,33 @@
663 status = "disabled"; 681 status = "disabled";
664 }; 682 };
665 683
684 tmu: tmu@100C0000 {
685 #include "exynos4412-tmu-sensor-conf.dtsi"
686 };
687
688 hdmi: hdmi@12D00000 {
689 compatible = "samsung,exynos4210-hdmi";
690 reg = <0x12D00000 0x70000>;
691 interrupts = <0 92 0>;
692 clock-names = "hdmi", "sclk_hdmi", "sclk_pixel", "sclk_hdmiphy",
693 "mout_hdmi";
694 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
695 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
696 <&clock CLK_MOUT_HDMI>;
697 phy = <&hdmi_i2c_phy>;
698 power-domains = <&pd_tv>;
699 samsung,syscon-phandle = <&pmu_system_controller>;
700 status = "disabled";
701 };
702
703 mixer: mixer@12C10000 {
704 compatible = "samsung,exynos4210-mixer";
705 interrupts = <0 91 0>;
706 reg = <0x12C10000 0x2100>, <0x12c00000 0x300>;
707 power-domains = <&pd_tv>;
708 status = "disabled";
709 };
710
666 ppmu_dmc0: ppmu_dmc0@106a0000 { 711 ppmu_dmc0: ppmu_dmc0@106a0000 {
667 compatible = "samsung,exynos-ppmu"; 712 compatible = "samsung,exynos-ppmu";
668 reg = <0x106a0000 0x2000>; 713 reg = <0x106a0000 0x2000>;
diff --git a/arch/arm/boot/dts/exynos4210-trats.dts b/arch/arm/boot/dts/exynos4210-trats.dts
index 3d6652a4b6cb..32c5fd8f6269 100644
--- a/arch/arm/boot/dts/exynos4210-trats.dts
+++ b/arch/arm/boot/dts/exynos4210-trats.dts
@@ -426,6 +426,25 @@
426 status = "okay"; 426 status = "okay";
427 }; 427 };
428 428
429 tmu@100C0000 {
430 status = "okay";
431 };
432
433 thermal-zones {
434 cpu_thermal: cpu-thermal {
435 cooling-maps {
436 map0 {
437 /* Corresponds to 800MHz at freq_table */
438 cooling-device = <&cpu0 2 2>;
439 };
440 map1 {
441 /* Corresponds to 200MHz at freq_table */
442 cooling-device = <&cpu0 4 4>;
443 };
444 };
445 };
446 };
447
429 camera { 448 camera {
430 pinctrl-names = "default"; 449 pinctrl-names = "default";
431 pinctrl-0 = <>; 450 pinctrl-0 = <>;
diff --git a/arch/arm/boot/dts/exynos4210-universal_c210.dts b/arch/arm/boot/dts/exynos4210-universal_c210.dts
index b57e6b82ea20..d4f2b11319dd 100644
--- a/arch/arm/boot/dts/exynos4210-universal_c210.dts
+++ b/arch/arm/boot/dts/exynos4210-universal_c210.dts
@@ -505,6 +505,63 @@
505 assigned-clock-rates = <0>, <160000000>; 505 assigned-clock-rates = <0>, <160000000>;
506 }; 506 };
507 }; 507 };
508
509 hdmi_en: voltage-regulator-hdmi-5v {
510 compatible = "regulator-fixed";
511 regulator-name = "HDMI_5V";
512 regulator-min-microvolt = <5000000>;
513 regulator-max-microvolt = <5000000>;
514 gpio = <&gpe0 1 0>;
515 enable-active-high;
516 };
517
518 hdmi_ddc: i2c-ddc {
519 compatible = "i2c-gpio";
520 gpios = <&gpe4 2 0 &gpe4 3 0>;
521 i2c-gpio,delay-us = <100>;
522 #address-cells = <1>;
523 #size-cells = <0>;
524
525 pinctrl-0 = <&i2c_ddc_bus>;
526 pinctrl-names = "default";
527 status = "okay";
528 };
529
530 mixer@12C10000 {
531 status = "okay";
532 };
533
534 hdmi@12D00000 {
535 hpd-gpio = <&gpx3 7 0>;
536 pinctrl-names = "default";
537 pinctrl-0 = <&hdmi_hpd>;
538 hdmi-en-supply = <&hdmi_en>;
539 vdd-supply = <&ldo3_reg>;
540 vdd_osc-supply = <&ldo4_reg>;
541 vdd_pll-supply = <&ldo3_reg>;
542 ddc = <&hdmi_ddc>;
543 status = "okay";
544 };
545
546 i2c@138E0000 {
547 status = "okay";
548 };
549};
550
551&pinctrl_1 {
552 hdmi_hpd: hdmi-hpd {
553 samsung,pins = "gpx3-7";
554 samsung,pin-pud = <0>;
555 };
556};
557
558&pinctrl_0 {
559 i2c_ddc_bus: i2c-ddc-bus {
560 samsung,pins = "gpe4-2", "gpe4-3";
561 samsung,pin-function = <2>;
562 samsung,pin-pud = <3>;
563 samsung,pin-drv = <0>;
564 };
508}; 565};
509 566
510&mdma1 { 567&mdma1 {
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 67c832c9dcf1..be89f83f70e7 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -21,6 +21,7 @@
21 21
22#include "exynos4.dtsi" 22#include "exynos4.dtsi"
23#include "exynos4210-pinctrl.dtsi" 23#include "exynos4210-pinctrl.dtsi"
24#include "exynos4-cpu-thermal.dtsi"
24 25
25/ { 26/ {
26 compatible = "samsung,exynos4210", "samsung,exynos4"; 27 compatible = "samsung,exynos4210", "samsung,exynos4";
@@ -35,10 +36,13 @@
35 #address-cells = <1>; 36 #address-cells = <1>;
36 #size-cells = <0>; 37 #size-cells = <0>;
37 38
38 cpu@900 { 39 cpu0: cpu@900 {
39 device_type = "cpu"; 40 device_type = "cpu";
40 compatible = "arm,cortex-a9"; 41 compatible = "arm,cortex-a9";
41 reg = <0x900>; 42 reg = <0x900>;
43 cooling-min-level = <4>;
44 cooling-max-level = <2>;
45 #cooling-cells = <2>; /* min followed by max */
42 }; 46 };
43 47
44 cpu@901 { 48 cpu@901 {
@@ -153,16 +157,38 @@
153 reg = <0x03860000 0x1000>; 157 reg = <0x03860000 0x1000>;
154 }; 158 };
155 159
156 tmu@100C0000 { 160 tmu: tmu@100C0000 {
157 compatible = "samsung,exynos4210-tmu"; 161 compatible = "samsung,exynos4210-tmu";
158 interrupt-parent = <&combiner>; 162 interrupt-parent = <&combiner>;
159 reg = <0x100C0000 0x100>; 163 reg = <0x100C0000 0x100>;
160 interrupts = <2 4>; 164 interrupts = <2 4>;
161 clocks = <&clock CLK_TMU_APBIF>; 165 clocks = <&clock CLK_TMU_APBIF>;
162 clock-names = "tmu_apbif"; 166 clock-names = "tmu_apbif";
167 samsung,tmu_gain = <15>;
168 samsung,tmu_reference_voltage = <7>;
163 status = "disabled"; 169 status = "disabled";
164 }; 170 };
165 171
172 thermal-zones {
173 cpu_thermal: cpu-thermal {
174 polling-delay-passive = <0>;
175 polling-delay = <0>;
176 thermal-sensors = <&tmu 0>;
177
178 trips {
179 cpu_alert0: cpu-alert-0 {
180 temperature = <85000>; /* millicelsius */
181 };
182 cpu_alert1: cpu-alert-1 {
183 temperature = <100000>; /* millicelsius */
184 };
185 cpu_alert2: cpu-alert-2 {
186 temperature = <110000>; /* millicelsius */
187 };
188 };
189 };
190 };
191
166 g2d@12800000 { 192 g2d@12800000 {
167 compatible = "samsung,s5pv210-g2d"; 193 compatible = "samsung,s5pv210-g2d";
168 reg = <0x12800000 0x1000>; 194 reg = <0x12800000 0x1000>;
@@ -203,6 +229,14 @@
203 }; 229 };
204 }; 230 };
205 231
232 mixer: mixer@12C10000 {
233 clock-names = "mixer", "hdmi", "sclk_hdmi", "vp", "mout_mixer",
234 "sclk_mixer";
235 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
236 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>,
237 <&clock CLK_MOUT_MIXER>, <&clock CLK_SCLK_MIXER>;
238 };
239
206 ppmu_lcd1: ppmu_lcd1@12240000 { 240 ppmu_lcd1: ppmu_lcd1@12240000 {
207 compatible = "samsung,exynos-ppmu"; 241 compatible = "samsung,exynos-ppmu";
208 reg = <0x12240000 0x2000>; 242 reg = <0x12240000 0x2000>;
diff --git a/arch/arm/boot/dts/exynos4212.dtsi b/arch/arm/boot/dts/exynos4212.dtsi
index dd0a43ec56da..5be03288f1ee 100644
--- a/arch/arm/boot/dts/exynos4212.dtsi
+++ b/arch/arm/boot/dts/exynos4212.dtsi
@@ -26,10 +26,13 @@
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 cpu@A00 { 29 cpu0: cpu@A00 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 compatible = "arm,cortex-a9"; 31 compatible = "arm,cortex-a9";
32 reg = <0xA00>; 32 reg = <0xA00>;
33 cooling-min-level = <13>;
34 cooling-max-level = <7>;
35 #cooling-cells = <2>; /* min followed by max */
33 }; 36 };
34 37
35 cpu@A01 { 38 cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index de80b5bba204..adb4f6a97a1d 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -249,6 +249,20 @@
249 regulator-always-on; 249 regulator-always-on;
250 }; 250 };
251 251
252 ldo8_reg: ldo@8 {
253 regulator-compatible = "LDO8";
254 regulator-name = "VDD10_HDMI_1.0V";
255 regulator-min-microvolt = <1000000>;
256 regulator-max-microvolt = <1000000>;
257 };
258
259 ldo10_reg: ldo@10 {
260 regulator-compatible = "LDO10";
261 regulator-name = "VDDQ_MIPIHSI_1.8V";
262 regulator-min-microvolt = <1800000>;
263 regulator-max-microvolt = <1800000>;
264 };
265
252 ldo11_reg: LDO11 { 266 ldo11_reg: LDO11 {
253 regulator-name = "VDD18_ABB1_1.8V"; 267 regulator-name = "VDD18_ABB1_1.8V";
254 regulator-min-microvolt = <1800000>; 268 regulator-min-microvolt = <1800000>;
@@ -411,6 +425,51 @@
411 ehci: ehci@12580000 { 425 ehci: ehci@12580000 {
412 status = "okay"; 426 status = "okay";
413 }; 427 };
428
429 tmu@100C0000 {
430 vtmu-supply = <&ldo10_reg>;
431 status = "okay";
432 };
433
434 thermal-zones {
435 cpu_thermal: cpu-thermal {
436 cooling-maps {
437 map0 {
438 /* Corresponds to 800MHz at freq_table */
439 cooling-device = <&cpu0 7 7>;
440 };
441 map1 {
442 /* Corresponds to 200MHz at freq_table */
443 cooling-device = <&cpu0 13 13>;
444 };
445 };
446 };
447 };
448
449 mixer: mixer@12C10000 {
450 status = "okay";
451 };
452
453 hdmi@12D00000 {
454 hpd-gpio = <&gpx3 7 0>;
455 pinctrl-names = "default";
456 pinctrl-0 = <&hdmi_hpd>;
457 vdd-supply = <&ldo8_reg>;
458 vdd_osc-supply = <&ldo10_reg>;
459 vdd_pll-supply = <&ldo8_reg>;
460 ddc = <&hdmi_ddc>;
461 status = "okay";
462 };
463
464 hdmi_ddc: i2c@13880000 {
465 status = "okay";
466 pinctrl-names = "default";
467 pinctrl-0 = <&i2c2_bus>;
468 };
469
470 i2c@138E0000 {
471 status = "okay";
472 };
414}; 473};
415 474
416&pinctrl_1 { 475&pinctrl_1 {
@@ -425,4 +484,9 @@
425 samsung,pin-pud = <0>; 484 samsung,pin-pud = <0>;
426 samsung,pin-drv = <0>; 485 samsung,pin-drv = <0>;
427 }; 486 };
487
488 hdmi_hpd: hdmi-hpd {
489 samsung,pins = "gpx3-7";
490 samsung,pin-pud = <1>;
491 };
428}; 492};
diff --git a/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
new file mode 100644
index 000000000000..e3f7934d19d0
--- /dev/null
+++ b/arch/arm/boot/dts/exynos4412-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
1/*
2 * Device tree sources for Exynos4412 TMU sensor configuration
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal_exynos.h>
13
14#thermal-sensor-cells = <0>;
15samsung,tmu_gain = <8>;
16samsung,tmu_reference_voltage = <16>;
17samsung,tmu_noise_cancel_mode = <4>;
18samsung,tmu_efuse_value = <55>;
19samsung,tmu_min_efuse_value = <40>;
20samsung,tmu_max_efuse_value = <100>;
21samsung,tmu_first_point_trim = <25>;
22samsung,tmu_second_point_trim = <85>;
23samsung,tmu_default_temp_offset = <50>;
24samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/arch/arm/boot/dts/exynos4412-trats2.dts b/arch/arm/boot/dts/exynos4412-trats2.dts
index 21f748083586..173ffa479ad3 100644
--- a/arch/arm/boot/dts/exynos4412-trats2.dts
+++ b/arch/arm/boot/dts/exynos4412-trats2.dts
@@ -927,6 +927,21 @@
927 pulldown-ohm = <100000>; /* 100K */ 927 pulldown-ohm = <100000>; /* 100K */
928 io-channels = <&adc 2>; /* Battery temperature */ 928 io-channels = <&adc 2>; /* Battery temperature */
929 }; 929 };
930
931 thermal-zones {
932 cpu_thermal: cpu-thermal {
933 cooling-maps {
934 map0 {
935 /* Corresponds to 800MHz at freq_table */
936 cooling-device = <&cpu0 7 7>;
937 };
938 map1 {
939 /* Corresponds to 200MHz at freq_table */
940 cooling-device = <&cpu0 13 13>;
941 };
942 };
943 };
944 };
930}; 945};
931 946
932&pmu_system_controller { 947&pmu_system_controller {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 0f6ec93bb1d8..68ad43b391ae 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -26,10 +26,13 @@
26 #address-cells = <1>; 26 #address-cells = <1>;
27 #size-cells = <0>; 27 #size-cells = <0>;
28 28
29 cpu@A00 { 29 cpu0: cpu@A00 {
30 device_type = "cpu"; 30 device_type = "cpu";
31 compatible = "arm,cortex-a9"; 31 compatible = "arm,cortex-a9";
32 reg = <0xA00>; 32 reg = <0xA00>;
33 cooling-min-level = <13>;
34 cooling-max-level = <7>;
35 #cooling-cells = <2>; /* min followed by max */
33 }; 36 };
34 37
35 cpu@A01 { 38 cpu@A01 {
diff --git a/arch/arm/boot/dts/exynos4x12.dtsi b/arch/arm/boot/dts/exynos4x12.dtsi
index f5e0ae780d6c..6a6abe14fd9b 100644
--- a/arch/arm/boot/dts/exynos4x12.dtsi
+++ b/arch/arm/boot/dts/exynos4x12.dtsi
@@ -19,6 +19,7 @@
19 19
20#include "exynos4.dtsi" 20#include "exynos4.dtsi"
21#include "exynos4x12-pinctrl.dtsi" 21#include "exynos4x12-pinctrl.dtsi"
22#include "exynos4-cpu-thermal.dtsi"
22 23
23/ { 24/ {
24 aliases { 25 aliases {
@@ -297,4 +298,15 @@
297 clock-names = "tmu_apbif"; 298 clock-names = "tmu_apbif";
298 status = "disabled"; 299 status = "disabled";
299 }; 300 };
301
302 hdmi: hdmi@12D00000 {
303 compatible = "samsung,exynos4212-hdmi";
304 };
305
306 mixer: mixer@12C10000 {
307 compatible = "samsung,exynos4212-mixer";
308 clock-names = "mixer", "hdmi", "sclk_hdmi", "vp";
309 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
310 <&clock CLK_SCLK_HDMI>, <&clock CLK_VP>;
311 };
300}; 312};
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi
index 9bb1b0b738f5..adbde1adad95 100644
--- a/arch/arm/boot/dts/exynos5250.dtsi
+++ b/arch/arm/boot/dts/exynos5250.dtsi
@@ -20,7 +20,7 @@
20#include <dt-bindings/clock/exynos5250.h> 20#include <dt-bindings/clock/exynos5250.h>
21#include "exynos5.dtsi" 21#include "exynos5.dtsi"
22#include "exynos5250-pinctrl.dtsi" 22#include "exynos5250-pinctrl.dtsi"
23 23#include "exynos4-cpu-thermal.dtsi"
24#include <dt-bindings/clock/exynos-audss-clk.h> 24#include <dt-bindings/clock/exynos-audss-clk.h>
25 25
26/ { 26/ {
@@ -58,11 +58,14 @@
58 #address-cells = <1>; 58 #address-cells = <1>;
59 #size-cells = <0>; 59 #size-cells = <0>;
60 60
61 cpu@0 { 61 cpu0: cpu@0 {
62 device_type = "cpu"; 62 device_type = "cpu";
63 compatible = "arm,cortex-a15"; 63 compatible = "arm,cortex-a15";
64 reg = <0>; 64 reg = <0>;
65 clock-frequency = <1700000000>; 65 clock-frequency = <1700000000>;
66 cooling-min-level = <15>;
67 cooling-max-level = <9>;
68 #cooling-cells = <2>; /* min followed by max */
66 }; 69 };
67 cpu@1 { 70 cpu@1 {
68 device_type = "cpu"; 71 device_type = "cpu";
@@ -102,6 +105,12 @@
102 #power-domain-cells = <0>; 105 #power-domain-cells = <0>;
103 }; 106 };
104 107
108 pd_disp1: disp1-power-domain@100440A0 {
109 compatible = "samsung,exynos4210-pd";
110 reg = <0x100440A0 0x20>;
111 #power-domain-cells = <0>;
112 };
113
105 clock: clock-controller@10010000 { 114 clock: clock-controller@10010000 {
106 compatible = "samsung,exynos5250-clock"; 115 compatible = "samsung,exynos5250-clock";
107 reg = <0x10010000 0x30000>; 116 reg = <0x10010000 0x30000>;
@@ -235,12 +244,32 @@
235 status = "disabled"; 244 status = "disabled";
236 }; 245 };
237 246
238 tmu@10060000 { 247 tmu: tmu@10060000 {
239 compatible = "samsung,exynos5250-tmu"; 248 compatible = "samsung,exynos5250-tmu";
240 reg = <0x10060000 0x100>; 249 reg = <0x10060000 0x100>;
241 interrupts = <0 65 0>; 250 interrupts = <0 65 0>;
242 clocks = <&clock CLK_TMU>; 251 clocks = <&clock CLK_TMU>;
243 clock-names = "tmu_apbif"; 252 clock-names = "tmu_apbif";
253 #include "exynos4412-tmu-sensor-conf.dtsi"
254 };
255
256 thermal-zones {
257 cpu_thermal: cpu-thermal {
258 polling-delay-passive = <0>;
259 polling-delay = <0>;
260 thermal-sensors = <&tmu 0>;
261
262 cooling-maps {
263 map0 {
264 /* Corresponds to 800MHz at freq_table */
265 cooling-device = <&cpu0 9 9>;
266 };
267 map1 {
268 /* Corresponds to 200MHz at freq_table */
269 cooling-device = <&cpu0 15 15>;
270 };
271 };
272 };
244 }; 273 };
245 274
246 serial@12C00000 { 275 serial@12C00000 {
@@ -719,6 +748,7 @@
719 hdmi: hdmi { 748 hdmi: hdmi {
720 compatible = "samsung,exynos4212-hdmi"; 749 compatible = "samsung,exynos4212-hdmi";
721 reg = <0x14530000 0x70000>; 750 reg = <0x14530000 0x70000>;
751 power-domains = <&pd_disp1>;
722 interrupts = <0 95 0>; 752 interrupts = <0 95 0>;
723 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>, 753 clocks = <&clock CLK_HDMI>, <&clock CLK_SCLK_HDMI>,
724 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>, 754 <&clock CLK_SCLK_PIXEL>, <&clock CLK_SCLK_HDMIPHY>,
@@ -731,9 +761,11 @@
731 mixer { 761 mixer {
732 compatible = "samsung,exynos5250-mixer"; 762 compatible = "samsung,exynos5250-mixer";
733 reg = <0x14450000 0x10000>; 763 reg = <0x14450000 0x10000>;
764 power-domains = <&pd_disp1>;
734 interrupts = <0 94 0>; 765 interrupts = <0 94 0>;
735 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; 766 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
736 clock-names = "mixer", "sclk_hdmi"; 767 <&clock CLK_SCLK_HDMI>;
768 clock-names = "mixer", "hdmi", "sclk_hdmi";
737 }; 769 };
738 770
739 dp_phy: video-phy@10040720 { 771 dp_phy: video-phy@10040720 {
@@ -743,6 +775,7 @@
743 }; 775 };
744 776
745 dp: dp-controller@145B0000 { 777 dp: dp-controller@145B0000 {
778 power-domains = <&pd_disp1>;
746 clocks = <&clock CLK_DP>; 779 clocks = <&clock CLK_DP>;
747 clock-names = "dp"; 780 clock-names = "dp";
748 phys = <&dp_phy>; 781 phys = <&dp_phy>;
@@ -750,6 +783,7 @@
750 }; 783 };
751 784
752 fimd: fimd@14400000 { 785 fimd: fimd@14400000 {
786 power-domains = <&pd_disp1>;
753 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>; 787 clocks = <&clock CLK_SCLK_FIMD1>, <&clock CLK_FIMD1>;
754 clock-names = "sclk_fimd", "fimd"; 788 clock-names = "sclk_fimd", "fimd";
755 }; 789 };
diff --git a/arch/arm/boot/dts/exynos5420-trip-points.dtsi b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
new file mode 100644
index 000000000000..5d31fc140823
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5420-trip-points.dtsi
@@ -0,0 +1,35 @@
1/*
2 * Device tree sources for default Exynos5420 thermal zone definition
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12polling-delay-passive = <0>;
13polling-delay = <0>;
14trips {
15 cpu-alert-0 {
16 temperature = <85000>; /* millicelsius */
17 hysteresis = <10000>; /* millicelsius */
18 type = "active";
19 };
20 cpu-alert-1 {
21 temperature = <103000>; /* millicelsius */
22 hysteresis = <10000>; /* millicelsius */
23 type = "active";
24 };
25 cpu-alert-2 {
26 temperature = <110000>; /* millicelsius */
27 hysteresis = <10000>; /* millicelsius */
28 type = "active";
29 };
30 cpu-crit-0 {
31 temperature = <1200000>; /* millicelsius */
32 hysteresis = <0>; /* millicelsius */
33 type = "critical";
34 };
35};
diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index 9dc2e9773b30..c0e98cf3514f 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -740,8 +740,9 @@
740 compatible = "samsung,exynos5420-mixer"; 740 compatible = "samsung,exynos5420-mixer";
741 reg = <0x14450000 0x10000>; 741 reg = <0x14450000 0x10000>;
742 interrupts = <0 94 0>; 742 interrupts = <0 94 0>;
743 clocks = <&clock CLK_MIXER>, <&clock CLK_SCLK_HDMI>; 743 clocks = <&clock CLK_MIXER>, <&clock CLK_HDMI>,
744 clock-names = "mixer", "sclk_hdmi"; 744 <&clock CLK_SCLK_HDMI>;
745 clock-names = "mixer", "hdmi", "sclk_hdmi";
745 power-domains = <&disp_pd>; 746 power-domains = <&disp_pd>;
746 }; 747 };
747 748
@@ -782,6 +783,7 @@
782 interrupts = <0 65 0>; 783 interrupts = <0 65 0>;
783 clocks = <&clock CLK_TMU>; 784 clocks = <&clock CLK_TMU>;
784 clock-names = "tmu_apbif"; 785 clock-names = "tmu_apbif";
786 #include "exynos4412-tmu-sensor-conf.dtsi"
785 }; 787 };
786 788
787 tmu_cpu1: tmu@10064000 { 789 tmu_cpu1: tmu@10064000 {
@@ -790,6 +792,7 @@
790 interrupts = <0 183 0>; 792 interrupts = <0 183 0>;
791 clocks = <&clock CLK_TMU>; 793 clocks = <&clock CLK_TMU>;
792 clock-names = "tmu_apbif"; 794 clock-names = "tmu_apbif";
795 #include "exynos4412-tmu-sensor-conf.dtsi"
793 }; 796 };
794 797
795 tmu_cpu2: tmu@10068000 { 798 tmu_cpu2: tmu@10068000 {
@@ -798,6 +801,7 @@
798 interrupts = <0 184 0>; 801 interrupts = <0 184 0>;
799 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>; 802 clocks = <&clock CLK_TMU>, <&clock CLK_TMU>;
800 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 803 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
804 #include "exynos4412-tmu-sensor-conf.dtsi"
801 }; 805 };
802 806
803 tmu_cpu3: tmu@1006c000 { 807 tmu_cpu3: tmu@1006c000 {
@@ -806,6 +810,7 @@
806 interrupts = <0 185 0>; 810 interrupts = <0 185 0>;
807 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>; 811 clocks = <&clock CLK_TMU>, <&clock CLK_TMU_GPU>;
808 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 812 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
813 #include "exynos4412-tmu-sensor-conf.dtsi"
809 }; 814 };
810 815
811 tmu_gpu: tmu@100a0000 { 816 tmu_gpu: tmu@100a0000 {
@@ -814,6 +819,30 @@
814 interrupts = <0 215 0>; 819 interrupts = <0 215 0>;
815 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>; 820 clocks = <&clock CLK_TMU_GPU>, <&clock CLK_TMU>;
816 clock-names = "tmu_apbif", "tmu_triminfo_apbif"; 821 clock-names = "tmu_apbif", "tmu_triminfo_apbif";
822 #include "exynos4412-tmu-sensor-conf.dtsi"
823 };
824
825 thermal-zones {
826 cpu0_thermal: cpu0-thermal {
827 thermal-sensors = <&tmu_cpu0>;
828 #include "exynos5420-trip-points.dtsi"
829 };
830 cpu1_thermal: cpu1-thermal {
831 thermal-sensors = <&tmu_cpu1>;
832 #include "exynos5420-trip-points.dtsi"
833 };
834 cpu2_thermal: cpu2-thermal {
835 thermal-sensors = <&tmu_cpu2>;
836 #include "exynos5420-trip-points.dtsi"
837 };
838 cpu3_thermal: cpu3-thermal {
839 thermal-sensors = <&tmu_cpu3>;
840 #include "exynos5420-trip-points.dtsi"
841 };
842 gpu_thermal: gpu-thermal {
843 thermal-sensors = <&tmu_gpu>;
844 #include "exynos5420-trip-points.dtsi"
845 };
817 }; 846 };
818 847
819 watchdog: watchdog@101D0000 { 848 watchdog: watchdog@101D0000 {
diff --git a/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
new file mode 100644
index 000000000000..7b2fba0ae92b
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-tmu-sensor-conf.dtsi
@@ -0,0 +1,24 @@
1/*
2 * Device tree sources for Exynos5440 TMU sensor configuration
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12#include <dt-bindings/thermal/thermal_exynos.h>
13
14#thermal-sensor-cells = <0>;
15samsung,tmu_gain = <5>;
16samsung,tmu_reference_voltage = <16>;
17samsung,tmu_noise_cancel_mode = <4>;
18samsung,tmu_efuse_value = <0x5d2d>;
19samsung,tmu_min_efuse_value = <16>;
20samsung,tmu_max_efuse_value = <76>;
21samsung,tmu_first_point_trim = <25>;
22samsung,tmu_second_point_trim = <70>;
23samsung,tmu_default_temp_offset = <25>;
24samsung,tmu_cal_type = <TYPE_ONE_POINT_TRIMMING>;
diff --git a/arch/arm/boot/dts/exynos5440-trip-points.dtsi b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
new file mode 100644
index 000000000000..48adfa8f4300
--- /dev/null
+++ b/arch/arm/boot/dts/exynos5440-trip-points.dtsi
@@ -0,0 +1,25 @@
1/*
2 * Device tree sources for default Exynos5440 thermal zone definition
3 *
4 * Copyright (c) 2014 Lukasz Majewski <l.majewski@samsung.com>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 */
11
12polling-delay-passive = <0>;
13polling-delay = <0>;
14trips {
15 cpu-alert-0 {
16 temperature = <100000>; /* millicelsius */
17 hysteresis = <0>; /* millicelsius */
18 type = "active";
19 };
20 cpu-crit-0 {
21 temperature = <1050000>; /* millicelsius */
22 hysteresis = <0>; /* millicelsius */
23 type = "critical";
24 };
25};
diff --git a/arch/arm/boot/dts/exynos5440.dtsi b/arch/arm/boot/dts/exynos5440.dtsi
index 8f3373cd7b87..59d9416b3b03 100644
--- a/arch/arm/boot/dts/exynos5440.dtsi
+++ b/arch/arm/boot/dts/exynos5440.dtsi
@@ -219,6 +219,7 @@
219 interrupts = <0 58 0>; 219 interrupts = <0 58 0>;
220 clocks = <&clock CLK_B_125>; 220 clocks = <&clock CLK_B_125>;
221 clock-names = "tmu_apbif"; 221 clock-names = "tmu_apbif";
222 #include "exynos5440-tmu-sensor-conf.dtsi"
222 }; 223 };
223 224
224 tmuctrl_1: tmuctrl@16011C { 225 tmuctrl_1: tmuctrl@16011C {
@@ -227,6 +228,7 @@
227 interrupts = <0 58 0>; 228 interrupts = <0 58 0>;
228 clocks = <&clock CLK_B_125>; 229 clocks = <&clock CLK_B_125>;
229 clock-names = "tmu_apbif"; 230 clock-names = "tmu_apbif";
231 #include "exynos5440-tmu-sensor-conf.dtsi"
230 }; 232 };
231 233
232 tmuctrl_2: tmuctrl@160120 { 234 tmuctrl_2: tmuctrl@160120 {
@@ -235,6 +237,22 @@
235 interrupts = <0 58 0>; 237 interrupts = <0 58 0>;
236 clocks = <&clock CLK_B_125>; 238 clocks = <&clock CLK_B_125>;
237 clock-names = "tmu_apbif"; 239 clock-names = "tmu_apbif";
240 #include "exynos5440-tmu-sensor-conf.dtsi"
241 };
242
243 thermal-zones {
244 cpu0_thermal: cpu0-thermal {
245 thermal-sensors = <&tmuctrl_0>;
246 #include "exynos5440-trip-points.dtsi"
247 };
248 cpu1_thermal: cpu1-thermal {
249 thermal-sensors = <&tmuctrl_1>;
250 #include "exynos5440-trip-points.dtsi"
251 };
252 cpu2_thermal: cpu2-thermal {
253 thermal-sensors = <&tmuctrl_2>;
254 #include "exynos5440-trip-points.dtsi"
255 };
238 }; 256 };
239 257
240 sata@210000 { 258 sata@210000 {
diff --git a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
index f1cd2147421d..a626e6dd8022 100644
--- a/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
+++ b/arch/arm/boot/dts/imx6qdl-sabresd.dtsi
@@ -35,6 +35,7 @@
35 regulator-max-microvolt = <5000000>; 35 regulator-max-microvolt = <5000000>;
36 gpio = <&gpio3 22 0>; 36 gpio = <&gpio3 22 0>;
37 enable-active-high; 37 enable-active-high;
38 vin-supply = <&swbst_reg>;
38 }; 39 };
39 40
40 reg_usb_h1_vbus: regulator@1 { 41 reg_usb_h1_vbus: regulator@1 {
@@ -45,6 +46,7 @@
45 regulator-max-microvolt = <5000000>; 46 regulator-max-microvolt = <5000000>;
46 gpio = <&gpio1 29 0>; 47 gpio = <&gpio1 29 0>;
47 enable-active-high; 48 enable-active-high;
49 vin-supply = <&swbst_reg>;
48 }; 50 };
49 51
50 reg_audio: regulator@2 { 52 reg_audio: regulator@2 {
diff --git a/arch/arm/boot/dts/imx6sl-evk.dts b/arch/arm/boot/dts/imx6sl-evk.dts
index fda4932faefd..945887d3fdb3 100644
--- a/arch/arm/boot/dts/imx6sl-evk.dts
+++ b/arch/arm/boot/dts/imx6sl-evk.dts
@@ -52,6 +52,7 @@
52 regulator-max-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>;
53 gpio = <&gpio4 0 0>; 53 gpio = <&gpio4 0 0>;
54 enable-active-high; 54 enable-active-high;
55 vin-supply = <&swbst_reg>;
55 }; 56 };
56 57
57 reg_usb_otg2_vbus: regulator@1 { 58 reg_usb_otg2_vbus: regulator@1 {
@@ -62,6 +63,7 @@
62 regulator-max-microvolt = <5000000>; 63 regulator-max-microvolt = <5000000>;
63 gpio = <&gpio4 2 0>; 64 gpio = <&gpio4 2 0>;
64 enable-active-high; 65 enable-active-high;
66 vin-supply = <&swbst_reg>;
65 }; 67 };
66 68
67 reg_aud3v: regulator@2 { 69 reg_aud3v: regulator@2 {
diff --git a/arch/arm/boot/dts/omap2.dtsi b/arch/arm/boot/dts/omap2.dtsi
index 59d1c297bb30..578fa2a54dce 100644
--- a/arch/arm/boot/dts/omap2.dtsi
+++ b/arch/arm/boot/dts/omap2.dtsi
@@ -87,8 +87,8 @@
87 <14>, 87 <14>,
88 <15>; 88 <15>;
89 #dma-cells = <1>; 89 #dma-cells = <1>;
90 #dma-channels = <32>; 90 dma-channels = <32>;
91 #dma-requests = <64>; 91 dma-requests = <64>;
92 }; 92 };
93 93
94 i2c1: i2c@48070000 { 94 i2c1: i2c@48070000 {
diff --git a/arch/arm/boot/dts/omap3-n900.dts b/arch/arm/boot/dts/omap3-n900.dts
index 60403273f83e..db80f9d376fa 100644
--- a/arch/arm/boot/dts/omap3-n900.dts
+++ b/arch/arm/boot/dts/omap3-n900.dts
@@ -16,6 +16,13 @@
16 model = "Nokia N900"; 16 model = "Nokia N900";
17 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3"; 17 compatible = "nokia,omap3-n900", "ti,omap3430", "ti,omap3";
18 18
19 aliases {
20 i2c0;
21 i2c1 = &i2c1;
22 i2c2 = &i2c2;
23 i2c3 = &i2c3;
24 };
25
19 cpus { 26 cpus {
20 cpu@0 { 27 cpu@0 {
21 cpu0-supply = <&vcc>; 28 cpu0-supply = <&vcc>;
@@ -704,7 +711,7 @@
704 compatible = "smsc,lan91c94"; 711 compatible = "smsc,lan91c94";
705 interrupt-parent = <&gpio2>; 712 interrupt-parent = <&gpio2>;
706 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */ 713 interrupts = <22 IRQ_TYPE_LEVEL_HIGH>; /* gpio54 */
707 reg = <1 0x300 0xf>; /* 16 byte IO range at offset 0x300 */ 714 reg = <1 0 0xf>; /* 16 byte IO range */
708 bank-width = <2>; 715 bank-width = <2>;
709 pinctrl-names = "default"; 716 pinctrl-names = "default";
710 pinctrl-0 = <&ethernet_pins>; 717 pinctrl-0 = <&ethernet_pins>;
diff --git a/arch/arm/boot/dts/omap3.dtsi b/arch/arm/boot/dts/omap3.dtsi
index 01b71111bd55..f4f78c40b564 100644
--- a/arch/arm/boot/dts/omap3.dtsi
+++ b/arch/arm/boot/dts/omap3.dtsi
@@ -155,8 +155,8 @@
155 <14>, 155 <14>,
156 <15>; 156 <15>;
157 #dma-cells = <1>; 157 #dma-cells = <1>;
158 #dma-channels = <32>; 158 dma-channels = <32>;
159 #dma-requests = <96>; 159 dma-requests = <96>;
160 }; 160 };
161 161
162 omap3_pmx_core: pinmux@48002030 { 162 omap3_pmx_core: pinmux@48002030 {
diff --git a/arch/arm/boot/dts/omap4.dtsi b/arch/arm/boot/dts/omap4.dtsi
index 074147cebae4..87401d9f4d8b 100644
--- a/arch/arm/boot/dts/omap4.dtsi
+++ b/arch/arm/boot/dts/omap4.dtsi
@@ -223,8 +223,8 @@
223 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 223 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
224 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 224 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
225 #dma-cells = <1>; 225 #dma-cells = <1>;
226 #dma-channels = <32>; 226 dma-channels = <32>;
227 #dma-requests = <127>; 227 dma-requests = <127>;
228 }; 228 };
229 229
230 gpio1: gpio@4a310000 { 230 gpio1: gpio@4a310000 {
diff --git a/arch/arm/boot/dts/omap5-core-thermal.dtsi b/arch/arm/boot/dts/omap5-core-thermal.dtsi
index 19212ac6eef0..de8a3d456cf7 100644
--- a/arch/arm/boot/dts/omap5-core-thermal.dtsi
+++ b/arch/arm/boot/dts/omap5-core-thermal.dtsi
@@ -13,7 +13,7 @@
13 13
14core_thermal: core_thermal { 14core_thermal: core_thermal {
15 polling-delay-passive = <250>; /* milliseconds */ 15 polling-delay-passive = <250>; /* milliseconds */
16 polling-delay = <1000>; /* milliseconds */ 16 polling-delay = <500>; /* milliseconds */
17 17
18 /* sensor ID */ 18 /* sensor ID */
19 thermal-sensors = <&bandgap 2>; 19 thermal-sensors = <&bandgap 2>;
diff --git a/arch/arm/boot/dts/omap5-gpu-thermal.dtsi b/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
index 1b87aca88b77..bc3090f2e84b 100644
--- a/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
+++ b/arch/arm/boot/dts/omap5-gpu-thermal.dtsi
@@ -13,7 +13,7 @@
13 13
14gpu_thermal: gpu_thermal { 14gpu_thermal: gpu_thermal {
15 polling-delay-passive = <250>; /* milliseconds */ 15 polling-delay-passive = <250>; /* milliseconds */
16 polling-delay = <1000>; /* milliseconds */ 16 polling-delay = <500>; /* milliseconds */
17 17
18 /* sensor ID */ 18 /* sensor ID */
19 thermal-sensors = <&bandgap 1>; 19 thermal-sensors = <&bandgap 1>;
diff --git a/arch/arm/boot/dts/omap5.dtsi b/arch/arm/boot/dts/omap5.dtsi
index b321fdf42c9f..4a485b63a141 100644
--- a/arch/arm/boot/dts/omap5.dtsi
+++ b/arch/arm/boot/dts/omap5.dtsi
@@ -238,8 +238,8 @@
238 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>, 238 <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>,
239 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>; 239 <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
240 #dma-cells = <1>; 240 #dma-cells = <1>;
241 #dma-channels = <32>; 241 dma-channels = <32>;
242 #dma-requests = <127>; 242 dma-requests = <127>;
243 }; 243 };
244 244
245 gpio1: gpio@4ae10000 { 245 gpio1: gpio@4ae10000 {
@@ -929,8 +929,8 @@
929 <0x4A096800 0x40>; /* pll_ctrl */ 929 <0x4A096800 0x40>; /* pll_ctrl */
930 reg-names = "phy_rx", "phy_tx", "pll_ctrl"; 930 reg-names = "phy_rx", "phy_tx", "pll_ctrl";
931 ctrl-module = <&omap_control_sata>; 931 ctrl-module = <&omap_control_sata>;
932 clocks = <&sys_clkin>; 932 clocks = <&sys_clkin>, <&sata_ref_clk>;
933 clock-names = "sysclk"; 933 clock-names = "sysclk", "refclk";
934 #phy-cells = <0>; 934 #phy-cells = <0>;
935 }; 935 };
936 }; 936 };
@@ -1079,4 +1079,8 @@
1079 }; 1079 };
1080}; 1080};
1081 1081
1082&cpu_thermal {
1083 polling-delay = <500>; /* milliseconds */
1084};
1085
1082/include/ "omap54xx-clocks.dtsi" 1086/include/ "omap54xx-clocks.dtsi"
diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi
index 58c27466f012..83b425fb3ac2 100644
--- a/arch/arm/boot/dts/omap54xx-clocks.dtsi
+++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi
@@ -167,10 +167,18 @@
167 ti,index-starts-at-one; 167 ti,index-starts-at-one;
168 }; 168 };
169 169
170 dpll_core_byp_mux: dpll_core_byp_mux {
171 #clock-cells = <0>;
172 compatible = "ti,mux-clock";
173 clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>;
174 ti,bit-shift = <23>;
175 reg = <0x012c>;
176 };
177
170 dpll_core_ck: dpll_core_ck { 178 dpll_core_ck: dpll_core_ck {
171 #clock-cells = <0>; 179 #clock-cells = <0>;
172 compatible = "ti,omap4-dpll-core-clock"; 180 compatible = "ti,omap4-dpll-core-clock";
173 clocks = <&sys_clkin>, <&dpll_abe_m3x2_ck>; 181 clocks = <&sys_clkin>, <&dpll_core_byp_mux>;
174 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>; 182 reg = <0x0120>, <0x0124>, <0x012c>, <0x0128>;
175 }; 183 };
176 184
@@ -294,10 +302,18 @@
294 clock-div = <1>; 302 clock-div = <1>;
295 }; 303 };
296 304
305 dpll_iva_byp_mux: dpll_iva_byp_mux {
306 #clock-cells = <0>;
307 compatible = "ti,mux-clock";
308 clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>;
309 ti,bit-shift = <23>;
310 reg = <0x01ac>;
311 };
312
297 dpll_iva_ck: dpll_iva_ck { 313 dpll_iva_ck: dpll_iva_ck {
298 #clock-cells = <0>; 314 #clock-cells = <0>;
299 compatible = "ti,omap4-dpll-clock"; 315 compatible = "ti,omap4-dpll-clock";
300 clocks = <&sys_clkin>, <&iva_dpll_hs_clk_div>; 316 clocks = <&sys_clkin>, <&dpll_iva_byp_mux>;
301 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; 317 reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>;
302 }; 318 };
303 319
@@ -599,10 +615,19 @@
599 }; 615 };
600}; 616};
601&cm_core_clocks { 617&cm_core_clocks {
618
619 dpll_per_byp_mux: dpll_per_byp_mux {
620 #clock-cells = <0>;
621 compatible = "ti,mux-clock";
622 clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>;
623 ti,bit-shift = <23>;
624 reg = <0x014c>;
625 };
626
602 dpll_per_ck: dpll_per_ck { 627 dpll_per_ck: dpll_per_ck {
603 #clock-cells = <0>; 628 #clock-cells = <0>;
604 compatible = "ti,omap4-dpll-clock"; 629 compatible = "ti,omap4-dpll-clock";
605 clocks = <&sys_clkin>, <&per_dpll_hs_clk_div>; 630 clocks = <&sys_clkin>, <&dpll_per_byp_mux>;
606 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>; 631 reg = <0x0140>, <0x0144>, <0x014c>, <0x0148>;
607 }; 632 };
608 633
@@ -714,10 +739,18 @@
714 ti,index-starts-at-one; 739 ti,index-starts-at-one;
715 }; 740 };
716 741
742 dpll_usb_byp_mux: dpll_usb_byp_mux {
743 #clock-cells = <0>;
744 compatible = "ti,mux-clock";
745 clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>;
746 ti,bit-shift = <23>;
747 reg = <0x018c>;
748 };
749
717 dpll_usb_ck: dpll_usb_ck { 750 dpll_usb_ck: dpll_usb_ck {
718 #clock-cells = <0>; 751 #clock-cells = <0>;
719 compatible = "ti,omap4-dpll-j-type-clock"; 752 compatible = "ti,omap4-dpll-j-type-clock";
720 clocks = <&sys_clkin>, <&usb_dpll_hs_clk_div>; 753 clocks = <&sys_clkin>, <&dpll_usb_byp_mux>;
721 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>; 754 reg = <0x0180>, <0x0184>, <0x018c>, <0x0188>;
722 }; 755 };
723 756
diff --git a/arch/arm/boot/dts/sama5d3.dtsi b/arch/arm/boot/dts/sama5d3.dtsi
index 261311bdf65b..367af53c1b84 100644
--- a/arch/arm/boot/dts/sama5d3.dtsi
+++ b/arch/arm/boot/dts/sama5d3.dtsi
@@ -1248,7 +1248,6 @@
1248 atmel,watchdog-type = "hardware"; 1248 atmel,watchdog-type = "hardware";
1249 atmel,reset-type = "all"; 1249 atmel,reset-type = "all";
1250 atmel,dbg-halt; 1250 atmel,dbg-halt;
1251 atmel,idle-halt;
1252 status = "disabled"; 1251 status = "disabled";
1253 }; 1252 };
1254 1253
@@ -1416,7 +1415,7 @@
1416 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 1415 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
1417 reg = <0x00700000 0x100000>; 1416 reg = <0x00700000 0x100000>;
1418 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>; 1417 interrupts = <32 IRQ_TYPE_LEVEL_HIGH 2>;
1419 clocks = <&usb>, <&uhphs_clk>, <&uhpck>; 1418 clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
1420 clock-names = "usb_clk", "ehci_clk", "uhpck"; 1419 clock-names = "usb_clk", "ehci_clk", "uhpck";
1421 status = "disabled"; 1420 status = "disabled";
1422 }; 1421 };
diff --git a/arch/arm/boot/dts/sama5d4.dtsi b/arch/arm/boot/dts/sama5d4.dtsi
index d986b41b9654..4303874889c6 100644
--- a/arch/arm/boot/dts/sama5d4.dtsi
+++ b/arch/arm/boot/dts/sama5d4.dtsi
@@ -66,6 +66,7 @@
66 gpio4 = &pioE; 66 gpio4 = &pioE;
67 tcb0 = &tcb0; 67 tcb0 = &tcb0;
68 tcb1 = &tcb1; 68 tcb1 = &tcb1;
69 i2c0 = &i2c0;
69 i2c2 = &i2c2; 70 i2c2 = &i2c2;
70 }; 71 };
71 cpus { 72 cpus {
@@ -259,7 +260,7 @@
259 compatible = "atmel,at91sam9g45-ehci", "usb-ehci"; 260 compatible = "atmel,at91sam9g45-ehci", "usb-ehci";
260 reg = <0x00600000 0x100000>; 261 reg = <0x00600000 0x100000>;
261 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>; 262 interrupts = <46 IRQ_TYPE_LEVEL_HIGH 2>;
262 clocks = <&usb>, <&uhphs_clk>, <&uhpck>; 263 clocks = <&utmi>, <&uhphs_clk>, <&uhpck>;
263 clock-names = "usb_clk", "ehci_clk", "uhpck"; 264 clock-names = "usb_clk", "ehci_clk", "uhpck";
264 status = "disabled"; 265 status = "disabled";
265 }; 266 };
@@ -461,8 +462,8 @@
461 462
462 lcdck: lcdck { 463 lcdck: lcdck {
463 #clock-cells = <0>; 464 #clock-cells = <0>;
464 reg = <4>; 465 reg = <3>;
465 clocks = <&smd>; 466 clocks = <&mck>;
466 }; 467 };
467 468
468 smdck: smdck { 469 smdck: smdck {
@@ -770,7 +771,7 @@
770 reg = <50>; 771 reg = <50>;
771 }; 772 };
772 773
773 lcd_clk: lcd_clk { 774 lcdc_clk: lcdc_clk {
774 #clock-cells = <0>; 775 #clock-cells = <0>;
775 reg = <51>; 776 reg = <51>;
776 }; 777 };
diff --git a/arch/arm/boot/dts/socfpga.dtsi b/arch/arm/boot/dts/socfpga.dtsi
index 252c3d1bda50..9d8760956752 100644
--- a/arch/arm/boot/dts/socfpga.dtsi
+++ b/arch/arm/boot/dts/socfpga.dtsi
@@ -713,6 +713,9 @@
713 reg-shift = <2>; 713 reg-shift = <2>;
714 reg-io-width = <4>; 714 reg-io-width = <4>;
715 clocks = <&l4_sp_clk>; 715 clocks = <&l4_sp_clk>;
716 dmas = <&pdma 28>,
717 <&pdma 29>;
718 dma-names = "tx", "rx";
716 }; 719 };
717 720
718 uart1: serial1@ffc03000 { 721 uart1: serial1@ffc03000 {
@@ -722,6 +725,9 @@
722 reg-shift = <2>; 725 reg-shift = <2>;
723 reg-io-width = <4>; 726 reg-io-width = <4>;
724 clocks = <&l4_sp_clk>; 727 clocks = <&l4_sp_clk>;
728 dmas = <&pdma 30>,
729 <&pdma 31>;
730 dma-names = "tx", "rx";
725 }; 731 };
726 732
727 rst: rstmgr@ffd05000 { 733 rst: rstmgr@ffd05000 {
diff --git a/arch/arm/boot/dts/sun4i-a10.dtsi b/arch/arm/boot/dts/sun4i-a10.dtsi
index 8ca3c1a2063d..5c2925831f20 100644
--- a/arch/arm/boot/dts/sun4i-a10.dtsi
+++ b/arch/arm/boot/dts/sun4i-a10.dtsi
@@ -294,35 +294,43 @@
294 }; 294 };
295 295
296 mmc0_clk: clk@01c20088 { 296 mmc0_clk: clk@01c20088 {
297 #clock-cells = <0>; 297 #clock-cells = <1>;
298 compatible = "allwinner,sun4i-a10-mod0-clk"; 298 compatible = "allwinner,sun4i-a10-mmc-clk";
299 reg = <0x01c20088 0x4>; 299 reg = <0x01c20088 0x4>;
300 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 300 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
301 clock-output-names = "mmc0"; 301 clock-output-names = "mmc0",
302 "mmc0_output",
303 "mmc0_sample";
302 }; 304 };
303 305
304 mmc1_clk: clk@01c2008c { 306 mmc1_clk: clk@01c2008c {
305 #clock-cells = <0>; 307 #clock-cells = <1>;
306 compatible = "allwinner,sun4i-a10-mod0-clk"; 308 compatible = "allwinner,sun4i-a10-mmc-clk";
307 reg = <0x01c2008c 0x4>; 309 reg = <0x01c2008c 0x4>;
308 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 310 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
309 clock-output-names = "mmc1"; 311 clock-output-names = "mmc1",
312 "mmc1_output",
313 "mmc1_sample";
310 }; 314 };
311 315
312 mmc2_clk: clk@01c20090 { 316 mmc2_clk: clk@01c20090 {
313 #clock-cells = <0>; 317 #clock-cells = <1>;
314 compatible = "allwinner,sun4i-a10-mod0-clk"; 318 compatible = "allwinner,sun4i-a10-mmc-clk";
315 reg = <0x01c20090 0x4>; 319 reg = <0x01c20090 0x4>;
316 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 320 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
317 clock-output-names = "mmc2"; 321 clock-output-names = "mmc2",
322 "mmc2_output",
323 "mmc2_sample";
318 }; 324 };
319 325
320 mmc3_clk: clk@01c20094 { 326 mmc3_clk: clk@01c20094 {
321 #clock-cells = <0>; 327 #clock-cells = <1>;
322 compatible = "allwinner,sun4i-a10-mod0-clk"; 328 compatible = "allwinner,sun4i-a10-mmc-clk";
323 reg = <0x01c20094 0x4>; 329 reg = <0x01c20094 0x4>;
324 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 330 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
325 clock-output-names = "mmc3"; 331 clock-output-names = "mmc3",
332 "mmc3_output",
333 "mmc3_sample";
326 }; 334 };
327 335
328 ts_clk: clk@01c20098 { 336 ts_clk: clk@01c20098 {
@@ -468,8 +476,14 @@
468 mmc0: mmc@01c0f000 { 476 mmc0: mmc@01c0f000 {
469 compatible = "allwinner,sun4i-a10-mmc"; 477 compatible = "allwinner,sun4i-a10-mmc";
470 reg = <0x01c0f000 0x1000>; 478 reg = <0x01c0f000 0x1000>;
471 clocks = <&ahb_gates 8>, <&mmc0_clk>; 479 clocks = <&ahb_gates 8>,
472 clock-names = "ahb", "mmc"; 480 <&mmc0_clk 0>,
481 <&mmc0_clk 1>,
482 <&mmc0_clk 2>;
483 clock-names = "ahb",
484 "mmc",
485 "output",
486 "sample";
473 interrupts = <32>; 487 interrupts = <32>;
474 status = "disabled"; 488 status = "disabled";
475 }; 489 };
@@ -477,8 +491,14 @@
477 mmc1: mmc@01c10000 { 491 mmc1: mmc@01c10000 {
478 compatible = "allwinner,sun4i-a10-mmc"; 492 compatible = "allwinner,sun4i-a10-mmc";
479 reg = <0x01c10000 0x1000>; 493 reg = <0x01c10000 0x1000>;
480 clocks = <&ahb_gates 9>, <&mmc1_clk>; 494 clocks = <&ahb_gates 9>,
481 clock-names = "ahb", "mmc"; 495 <&mmc1_clk 0>,
496 <&mmc1_clk 1>,
497 <&mmc1_clk 2>;
498 clock-names = "ahb",
499 "mmc",
500 "output",
501 "sample";
482 interrupts = <33>; 502 interrupts = <33>;
483 status = "disabled"; 503 status = "disabled";
484 }; 504 };
@@ -486,8 +506,14 @@
486 mmc2: mmc@01c11000 { 506 mmc2: mmc@01c11000 {
487 compatible = "allwinner,sun4i-a10-mmc"; 507 compatible = "allwinner,sun4i-a10-mmc";
488 reg = <0x01c11000 0x1000>; 508 reg = <0x01c11000 0x1000>;
489 clocks = <&ahb_gates 10>, <&mmc2_clk>; 509 clocks = <&ahb_gates 10>,
490 clock-names = "ahb", "mmc"; 510 <&mmc2_clk 0>,
511 <&mmc2_clk 1>,
512 <&mmc2_clk 2>;
513 clock-names = "ahb",
514 "mmc",
515 "output",
516 "sample";
491 interrupts = <34>; 517 interrupts = <34>;
492 status = "disabled"; 518 status = "disabled";
493 }; 519 };
@@ -495,8 +521,14 @@
495 mmc3: mmc@01c12000 { 521 mmc3: mmc@01c12000 {
496 compatible = "allwinner,sun4i-a10-mmc"; 522 compatible = "allwinner,sun4i-a10-mmc";
497 reg = <0x01c12000 0x1000>; 523 reg = <0x01c12000 0x1000>;
498 clocks = <&ahb_gates 11>, <&mmc3_clk>; 524 clocks = <&ahb_gates 11>,
499 clock-names = "ahb", "mmc"; 525 <&mmc3_clk 0>,
526 <&mmc3_clk 1>,
527 <&mmc3_clk 2>;
528 clock-names = "ahb",
529 "mmc",
530 "output",
531 "sample";
500 interrupts = <35>; 532 interrupts = <35>;
501 status = "disabled"; 533 status = "disabled";
502 }; 534 };
diff --git a/arch/arm/boot/dts/sun5i-a10s.dtsi b/arch/arm/boot/dts/sun5i-a10s.dtsi
index 905f84d141f0..2fd8988f310c 100644
--- a/arch/arm/boot/dts/sun5i-a10s.dtsi
+++ b/arch/arm/boot/dts/sun5i-a10s.dtsi
@@ -218,27 +218,33 @@
218 }; 218 };
219 219
220 mmc0_clk: clk@01c20088 { 220 mmc0_clk: clk@01c20088 {
221 #clock-cells = <0>; 221 #clock-cells = <1>;
222 compatible = "allwinner,sun4i-a10-mod0-clk"; 222 compatible = "allwinner,sun4i-a10-mmc-clk";
223 reg = <0x01c20088 0x4>; 223 reg = <0x01c20088 0x4>;
224 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 224 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
225 clock-output-names = "mmc0"; 225 clock-output-names = "mmc0",
226 "mmc0_output",
227 "mmc0_sample";
226 }; 228 };
227 229
228 mmc1_clk: clk@01c2008c { 230 mmc1_clk: clk@01c2008c {
229 #clock-cells = <0>; 231 #clock-cells = <1>;
230 compatible = "allwinner,sun4i-a10-mod0-clk"; 232 compatible = "allwinner,sun4i-a10-mmc-clk";
231 reg = <0x01c2008c 0x4>; 233 reg = <0x01c2008c 0x4>;
232 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 234 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
233 clock-output-names = "mmc1"; 235 clock-output-names = "mmc1",
236 "mmc1_output",
237 "mmc1_sample";
234 }; 238 };
235 239
236 mmc2_clk: clk@01c20090 { 240 mmc2_clk: clk@01c20090 {
237 #clock-cells = <0>; 241 #clock-cells = <1>;
238 compatible = "allwinner,sun4i-a10-mod0-clk"; 242 compatible = "allwinner,sun4i-a10-mmc-clk";
239 reg = <0x01c20090 0x4>; 243 reg = <0x01c20090 0x4>;
240 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 244 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
241 clock-output-names = "mmc2"; 245 clock-output-names = "mmc2",
246 "mmc2_output",
247 "mmc2_sample";
242 }; 248 };
243 249
244 ts_clk: clk@01c20098 { 250 ts_clk: clk@01c20098 {
@@ -368,8 +374,14 @@
368 mmc0: mmc@01c0f000 { 374 mmc0: mmc@01c0f000 {
369 compatible = "allwinner,sun5i-a13-mmc"; 375 compatible = "allwinner,sun5i-a13-mmc";
370 reg = <0x01c0f000 0x1000>; 376 reg = <0x01c0f000 0x1000>;
371 clocks = <&ahb_gates 8>, <&mmc0_clk>; 377 clocks = <&ahb_gates 8>,
372 clock-names = "ahb", "mmc"; 378 <&mmc0_clk 0>,
379 <&mmc0_clk 1>,
380 <&mmc0_clk 2>;
381 clock-names = "ahb",
382 "mmc",
383 "output",
384 "sample";
373 interrupts = <32>; 385 interrupts = <32>;
374 status = "disabled"; 386 status = "disabled";
375 }; 387 };
@@ -377,8 +389,14 @@
377 mmc1: mmc@01c10000 { 389 mmc1: mmc@01c10000 {
378 compatible = "allwinner,sun5i-a13-mmc"; 390 compatible = "allwinner,sun5i-a13-mmc";
379 reg = <0x01c10000 0x1000>; 391 reg = <0x01c10000 0x1000>;
380 clocks = <&ahb_gates 9>, <&mmc1_clk>; 392 clocks = <&ahb_gates 9>,
381 clock-names = "ahb", "mmc"; 393 <&mmc1_clk 0>,
394 <&mmc1_clk 1>,
395 <&mmc1_clk 2>;
396 clock-names = "ahb",
397 "mmc",
398 "output",
399 "sample";
382 interrupts = <33>; 400 interrupts = <33>;
383 status = "disabled"; 401 status = "disabled";
384 }; 402 };
@@ -386,8 +404,14 @@
386 mmc2: mmc@01c11000 { 404 mmc2: mmc@01c11000 {
387 compatible = "allwinner,sun5i-a13-mmc"; 405 compatible = "allwinner,sun5i-a13-mmc";
388 reg = <0x01c11000 0x1000>; 406 reg = <0x01c11000 0x1000>;
389 clocks = <&ahb_gates 10>, <&mmc2_clk>; 407 clocks = <&ahb_gates 10>,
390 clock-names = "ahb", "mmc"; 408 <&mmc2_clk 0>,
409 <&mmc2_clk 1>,
410 <&mmc2_clk 2>;
411 clock-names = "ahb",
412 "mmc",
413 "output",
414 "sample";
391 interrupts = <34>; 415 interrupts = <34>;
392 status = "disabled"; 416 status = "disabled";
393 }; 417 };
diff --git a/arch/arm/boot/dts/sun5i-a13.dtsi b/arch/arm/boot/dts/sun5i-a13.dtsi
index 4910393d1b09..f8818f1edbbe 100644
--- a/arch/arm/boot/dts/sun5i-a13.dtsi
+++ b/arch/arm/boot/dts/sun5i-a13.dtsi
@@ -257,27 +257,33 @@
257 }; 257 };
258 258
259 mmc0_clk: clk@01c20088 { 259 mmc0_clk: clk@01c20088 {
260 #clock-cells = <0>; 260 #clock-cells = <1>;
261 compatible = "allwinner,sun4i-a10-mod0-clk"; 261 compatible = "allwinner,sun4i-a10-mmc-clk";
262 reg = <0x01c20088 0x4>; 262 reg = <0x01c20088 0x4>;
263 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 263 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
264 clock-output-names = "mmc0"; 264 clock-output-names = "mmc0",
265 "mmc0_output",
266 "mmc0_sample";
265 }; 267 };
266 268
267 mmc1_clk: clk@01c2008c { 269 mmc1_clk: clk@01c2008c {
268 #clock-cells = <0>; 270 #clock-cells = <1>;
269 compatible = "allwinner,sun4i-a10-mod0-clk"; 271 compatible = "allwinner,sun4i-a10-mmc-clk";
270 reg = <0x01c2008c 0x4>; 272 reg = <0x01c2008c 0x4>;
271 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 273 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
272 clock-output-names = "mmc1"; 274 clock-output-names = "mmc1",
275 "mmc1_output",
276 "mmc1_sample";
273 }; 277 };
274 278
275 mmc2_clk: clk@01c20090 { 279 mmc2_clk: clk@01c20090 {
276 #clock-cells = <0>; 280 #clock-cells = <1>;
277 compatible = "allwinner,sun4i-a10-mod0-clk"; 281 compatible = "allwinner,sun4i-a10-mmc-clk";
278 reg = <0x01c20090 0x4>; 282 reg = <0x01c20090 0x4>;
279 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 283 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
280 clock-output-names = "mmc2"; 284 clock-output-names = "mmc2",
285 "mmc2_output",
286 "mmc2_sample";
281 }; 287 };
282 288
283 ts_clk: clk@01c20098 { 289 ts_clk: clk@01c20098 {
@@ -391,8 +397,14 @@
391 mmc0: mmc@01c0f000 { 397 mmc0: mmc@01c0f000 {
392 compatible = "allwinner,sun5i-a13-mmc"; 398 compatible = "allwinner,sun5i-a13-mmc";
393 reg = <0x01c0f000 0x1000>; 399 reg = <0x01c0f000 0x1000>;
394 clocks = <&ahb_gates 8>, <&mmc0_clk>; 400 clocks = <&ahb_gates 8>,
395 clock-names = "ahb", "mmc"; 401 <&mmc0_clk 0>,
402 <&mmc0_clk 1>,
403 <&mmc0_clk 2>;
404 clock-names = "ahb",
405 "mmc",
406 "output",
407 "sample";
396 interrupts = <32>; 408 interrupts = <32>;
397 status = "disabled"; 409 status = "disabled";
398 }; 410 };
@@ -400,8 +412,14 @@
400 mmc2: mmc@01c11000 { 412 mmc2: mmc@01c11000 {
401 compatible = "allwinner,sun5i-a13-mmc"; 413 compatible = "allwinner,sun5i-a13-mmc";
402 reg = <0x01c11000 0x1000>; 414 reg = <0x01c11000 0x1000>;
403 clocks = <&ahb_gates 10>, <&mmc2_clk>; 415 clocks = <&ahb_gates 10>,
404 clock-names = "ahb", "mmc"; 416 <&mmc2_clk 0>,
417 <&mmc2_clk 1>,
418 <&mmc2_clk 2>;
419 clock-names = "ahb",
420 "mmc",
421 "output",
422 "sample";
405 interrupts = <34>; 423 interrupts = <34>;
406 status = "disabled"; 424 status = "disabled";
407 }; 425 };
diff --git a/arch/arm/boot/dts/sun6i-a31.dtsi b/arch/arm/boot/dts/sun6i-a31.dtsi
index 47e557656993..fa2f403ccf28 100644
--- a/arch/arm/boot/dts/sun6i-a31.dtsi
+++ b/arch/arm/boot/dts/sun6i-a31.dtsi
@@ -190,19 +190,11 @@
190 clock-output-names = "axi"; 190 clock-output-names = "axi";
191 }; 191 };
192 192
193 ahb1_mux: ahb1_mux@01c20054 {
194 #clock-cells = <0>;
195 compatible = "allwinner,sun6i-a31-ahb1-mux-clk";
196 reg = <0x01c20054 0x4>;
197 clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
198 clock-output-names = "ahb1_mux";
199 };
200
201 ahb1: ahb1@01c20054 { 193 ahb1: ahb1@01c20054 {
202 #clock-cells = <0>; 194 #clock-cells = <0>;
203 compatible = "allwinner,sun4i-a10-ahb-clk"; 195 compatible = "allwinner,sun6i-a31-ahb1-clk";
204 reg = <0x01c20054 0x4>; 196 reg = <0x01c20054 0x4>;
205 clocks = <&ahb1_mux>; 197 clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
206 clock-output-names = "ahb1"; 198 clock-output-names = "ahb1";
207 }; 199 };
208 200
@@ -265,35 +257,43 @@
265 }; 257 };
266 258
267 mmc0_clk: clk@01c20088 { 259 mmc0_clk: clk@01c20088 {
268 #clock-cells = <0>; 260 #clock-cells = <1>;
269 compatible = "allwinner,sun4i-a10-mod0-clk"; 261 compatible = "allwinner,sun4i-a10-mmc-clk";
270 reg = <0x01c20088 0x4>; 262 reg = <0x01c20088 0x4>;
271 clocks = <&osc24M>, <&pll6 0>; 263 clocks = <&osc24M>, <&pll6 0>;
272 clock-output-names = "mmc0"; 264 clock-output-names = "mmc0",
265 "mmc0_output",
266 "mmc0_sample";
273 }; 267 };
274 268
275 mmc1_clk: clk@01c2008c { 269 mmc1_clk: clk@01c2008c {
276 #clock-cells = <0>; 270 #clock-cells = <1>;
277 compatible = "allwinner,sun4i-a10-mod0-clk"; 271 compatible = "allwinner,sun4i-a10-mmc-clk";
278 reg = <0x01c2008c 0x4>; 272 reg = <0x01c2008c 0x4>;
279 clocks = <&osc24M>, <&pll6 0>; 273 clocks = <&osc24M>, <&pll6 0>;
280 clock-output-names = "mmc1"; 274 clock-output-names = "mmc1",
275 "mmc1_output",
276 "mmc1_sample";
281 }; 277 };
282 278
283 mmc2_clk: clk@01c20090 { 279 mmc2_clk: clk@01c20090 {
284 #clock-cells = <0>; 280 #clock-cells = <1>;
285 compatible = "allwinner,sun4i-a10-mod0-clk"; 281 compatible = "allwinner,sun4i-a10-mmc-clk";
286 reg = <0x01c20090 0x4>; 282 reg = <0x01c20090 0x4>;
287 clocks = <&osc24M>, <&pll6 0>; 283 clocks = <&osc24M>, <&pll6 0>;
288 clock-output-names = "mmc2"; 284 clock-output-names = "mmc2",
285 "mmc2_output",
286 "mmc2_sample";
289 }; 287 };
290 288
291 mmc3_clk: clk@01c20094 { 289 mmc3_clk: clk@01c20094 {
292 #clock-cells = <0>; 290 #clock-cells = <1>;
293 compatible = "allwinner,sun4i-a10-mod0-clk"; 291 compatible = "allwinner,sun4i-a10-mmc-clk";
294 reg = <0x01c20094 0x4>; 292 reg = <0x01c20094 0x4>;
295 clocks = <&osc24M>, <&pll6 0>; 293 clocks = <&osc24M>, <&pll6 0>;
296 clock-output-names = "mmc3"; 294 clock-output-names = "mmc3",
295 "mmc3_output",
296 "mmc3_sample";
297 }; 297 };
298 298
299 spi0_clk: clk@01c200a0 { 299 spi0_clk: clk@01c200a0 {
@@ -383,15 +383,21 @@
383 #dma-cells = <1>; 383 #dma-cells = <1>;
384 384
385 /* DMA controller requires AHB1 clocked from PLL6 */ 385 /* DMA controller requires AHB1 clocked from PLL6 */
386 assigned-clocks = <&ahb1_mux>; 386 assigned-clocks = <&ahb1>;
387 assigned-clock-parents = <&pll6 0>; 387 assigned-clock-parents = <&pll6 0>;
388 }; 388 };
389 389
390 mmc0: mmc@01c0f000 { 390 mmc0: mmc@01c0f000 {
391 compatible = "allwinner,sun5i-a13-mmc"; 391 compatible = "allwinner,sun5i-a13-mmc";
392 reg = <0x01c0f000 0x1000>; 392 reg = <0x01c0f000 0x1000>;
393 clocks = <&ahb1_gates 8>, <&mmc0_clk>; 393 clocks = <&ahb1_gates 8>,
394 clock-names = "ahb", "mmc"; 394 <&mmc0_clk 0>,
395 <&mmc0_clk 1>,
396 <&mmc0_clk 2>;
397 clock-names = "ahb",
398 "mmc",
399 "output",
400 "sample";
395 resets = <&ahb1_rst 8>; 401 resets = <&ahb1_rst 8>;
396 reset-names = "ahb"; 402 reset-names = "ahb";
397 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 403 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
@@ -401,8 +407,14 @@
401 mmc1: mmc@01c10000 { 407 mmc1: mmc@01c10000 {
402 compatible = "allwinner,sun5i-a13-mmc"; 408 compatible = "allwinner,sun5i-a13-mmc";
403 reg = <0x01c10000 0x1000>; 409 reg = <0x01c10000 0x1000>;
404 clocks = <&ahb1_gates 9>, <&mmc1_clk>; 410 clocks = <&ahb1_gates 9>,
405 clock-names = "ahb", "mmc"; 411 <&mmc1_clk 0>,
412 <&mmc1_clk 1>,
413 <&mmc1_clk 2>;
414 clock-names = "ahb",
415 "mmc",
416 "output",
417 "sample";
406 resets = <&ahb1_rst 9>; 418 resets = <&ahb1_rst 9>;
407 reset-names = "ahb"; 419 reset-names = "ahb";
408 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 420 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
@@ -412,8 +424,14 @@
412 mmc2: mmc@01c11000 { 424 mmc2: mmc@01c11000 {
413 compatible = "allwinner,sun5i-a13-mmc"; 425 compatible = "allwinner,sun5i-a13-mmc";
414 reg = <0x01c11000 0x1000>; 426 reg = <0x01c11000 0x1000>;
415 clocks = <&ahb1_gates 10>, <&mmc2_clk>; 427 clocks = <&ahb1_gates 10>,
416 clock-names = "ahb", "mmc"; 428 <&mmc2_clk 0>,
429 <&mmc2_clk 1>,
430 <&mmc2_clk 2>;
431 clock-names = "ahb",
432 "mmc",
433 "output",
434 "sample";
417 resets = <&ahb1_rst 10>; 435 resets = <&ahb1_rst 10>;
418 reset-names = "ahb"; 436 reset-names = "ahb";
419 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 437 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
@@ -423,8 +441,14 @@
423 mmc3: mmc@01c12000 { 441 mmc3: mmc@01c12000 {
424 compatible = "allwinner,sun5i-a13-mmc"; 442 compatible = "allwinner,sun5i-a13-mmc";
425 reg = <0x01c12000 0x1000>; 443 reg = <0x01c12000 0x1000>;
426 clocks = <&ahb1_gates 11>, <&mmc3_clk>; 444 clocks = <&ahb1_gates 11>,
427 clock-names = "ahb", "mmc"; 445 <&mmc3_clk 0>,
446 <&mmc3_clk 1>,
447 <&mmc3_clk 2>;
448 clock-names = "ahb",
449 "mmc",
450 "output",
451 "sample";
428 resets = <&ahb1_rst 11>; 452 resets = <&ahb1_rst 11>;
429 reset-names = "ahb"; 453 reset-names = "ahb";
430 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 454 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/boot/dts/sun7i-a20.dtsi b/arch/arm/boot/dts/sun7i-a20.dtsi
index 786d491542ac..3a8530b79f1c 100644
--- a/arch/arm/boot/dts/sun7i-a20.dtsi
+++ b/arch/arm/boot/dts/sun7i-a20.dtsi
@@ -337,35 +337,43 @@
337 }; 337 };
338 338
339 mmc0_clk: clk@01c20088 { 339 mmc0_clk: clk@01c20088 {
340 #clock-cells = <0>; 340 #clock-cells = <1>;
341 compatible = "allwinner,sun4i-a10-mod0-clk"; 341 compatible = "allwinner,sun4i-a10-mmc-clk";
342 reg = <0x01c20088 0x4>; 342 reg = <0x01c20088 0x4>;
343 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 343 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
344 clock-output-names = "mmc0"; 344 clock-output-names = "mmc0",
345 "mmc0_output",
346 "mmc0_sample";
345 }; 347 };
346 348
347 mmc1_clk: clk@01c2008c { 349 mmc1_clk: clk@01c2008c {
348 #clock-cells = <0>; 350 #clock-cells = <1>;
349 compatible = "allwinner,sun4i-a10-mod0-clk"; 351 compatible = "allwinner,sun4i-a10-mmc-clk";
350 reg = <0x01c2008c 0x4>; 352 reg = <0x01c2008c 0x4>;
351 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 353 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
352 clock-output-names = "mmc1"; 354 clock-output-names = "mmc1",
355 "mmc1_output",
356 "mmc1_sample";
353 }; 357 };
354 358
355 mmc2_clk: clk@01c20090 { 359 mmc2_clk: clk@01c20090 {
356 #clock-cells = <0>; 360 #clock-cells = <1>;
357 compatible = "allwinner,sun4i-a10-mod0-clk"; 361 compatible = "allwinner,sun4i-a10-mmc-clk";
358 reg = <0x01c20090 0x4>; 362 reg = <0x01c20090 0x4>;
359 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 363 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
360 clock-output-names = "mmc2"; 364 clock-output-names = "mmc2",
365 "mmc2_output",
366 "mmc2_sample";
361 }; 367 };
362 368
363 mmc3_clk: clk@01c20094 { 369 mmc3_clk: clk@01c20094 {
364 #clock-cells = <0>; 370 #clock-cells = <1>;
365 compatible = "allwinner,sun4i-a10-mod0-clk"; 371 compatible = "allwinner,sun4i-a10-mmc-clk";
366 reg = <0x01c20094 0x4>; 372 reg = <0x01c20094 0x4>;
367 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>; 373 clocks = <&osc24M>, <&pll6 1>, <&pll5 1>;
368 clock-output-names = "mmc3"; 374 clock-output-names = "mmc3",
375 "mmc3_output",
376 "mmc3_sample";
369 }; 377 };
370 378
371 ts_clk: clk@01c20098 { 379 ts_clk: clk@01c20098 {
@@ -583,8 +591,14 @@
583 mmc0: mmc@01c0f000 { 591 mmc0: mmc@01c0f000 {
584 compatible = "allwinner,sun5i-a13-mmc"; 592 compatible = "allwinner,sun5i-a13-mmc";
585 reg = <0x01c0f000 0x1000>; 593 reg = <0x01c0f000 0x1000>;
586 clocks = <&ahb_gates 8>, <&mmc0_clk>; 594 clocks = <&ahb_gates 8>,
587 clock-names = "ahb", "mmc"; 595 <&mmc0_clk 0>,
596 <&mmc0_clk 1>,
597 <&mmc0_clk 2>;
598 clock-names = "ahb",
599 "mmc",
600 "output",
601 "sample";
588 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; 602 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
589 status = "disabled"; 603 status = "disabled";
590 }; 604 };
@@ -592,8 +606,14 @@
592 mmc1: mmc@01c10000 { 606 mmc1: mmc@01c10000 {
593 compatible = "allwinner,sun5i-a13-mmc"; 607 compatible = "allwinner,sun5i-a13-mmc";
594 reg = <0x01c10000 0x1000>; 608 reg = <0x01c10000 0x1000>;
595 clocks = <&ahb_gates 9>, <&mmc1_clk>; 609 clocks = <&ahb_gates 9>,
596 clock-names = "ahb", "mmc"; 610 <&mmc1_clk 0>,
611 <&mmc1_clk 1>,
612 <&mmc1_clk 2>;
613 clock-names = "ahb",
614 "mmc",
615 "output",
616 "sample";
597 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 617 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
598 status = "disabled"; 618 status = "disabled";
599 }; 619 };
@@ -601,8 +621,14 @@
601 mmc2: mmc@01c11000 { 621 mmc2: mmc@01c11000 {
602 compatible = "allwinner,sun5i-a13-mmc"; 622 compatible = "allwinner,sun5i-a13-mmc";
603 reg = <0x01c11000 0x1000>; 623 reg = <0x01c11000 0x1000>;
604 clocks = <&ahb_gates 10>, <&mmc2_clk>; 624 clocks = <&ahb_gates 10>,
605 clock-names = "ahb", "mmc"; 625 <&mmc2_clk 0>,
626 <&mmc2_clk 1>,
627 <&mmc2_clk 2>;
628 clock-names = "ahb",
629 "mmc",
630 "output",
631 "sample";
606 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>; 632 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
607 status = "disabled"; 633 status = "disabled";
608 }; 634 };
@@ -610,8 +636,14 @@
610 mmc3: mmc@01c12000 { 636 mmc3: mmc@01c12000 {
611 compatible = "allwinner,sun5i-a13-mmc"; 637 compatible = "allwinner,sun5i-a13-mmc";
612 reg = <0x01c12000 0x1000>; 638 reg = <0x01c12000 0x1000>;
613 clocks = <&ahb_gates 11>, <&mmc3_clk>; 639 clocks = <&ahb_gates 11>,
614 clock-names = "ahb", "mmc"; 640 <&mmc3_clk 0>,
641 <&mmc3_clk 1>,
642 <&mmc3_clk 2>;
643 clock-names = "ahb",
644 "mmc",
645 "output",
646 "sample";
615 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>; 647 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
616 status = "disabled"; 648 status = "disabled";
617 }; 649 };
diff --git a/arch/arm/boot/dts/sun8i-a23.dtsi b/arch/arm/boot/dts/sun8i-a23.dtsi
index dd34527293e4..382ebd137ee4 100644
--- a/arch/arm/boot/dts/sun8i-a23.dtsi
+++ b/arch/arm/boot/dts/sun8i-a23.dtsi
@@ -119,11 +119,19 @@
119 }; 119 };
120 120
121 /* dummy clock until actually implemented */ 121 /* dummy clock until actually implemented */
122 pll6: pll6_clk { 122 pll5: pll5_clk {
123 #clock-cells = <0>; 123 #clock-cells = <0>;
124 compatible = "fixed-clock"; 124 compatible = "fixed-clock";
125 clock-frequency = <600000000>; 125 clock-frequency = <0>;
126 clock-output-names = "pll6"; 126 clock-output-names = "pll5";
127 };
128
129 pll6: clk@01c20028 {
130 #clock-cells = <1>;
131 compatible = "allwinner,sun6i-a31-pll6-clk";
132 reg = <0x01c20028 0x4>;
133 clocks = <&osc24M>;
134 clock-output-names = "pll6", "pll6x2";
127 }; 135 };
128 136
129 cpu: cpu_clk@01c20050 { 137 cpu: cpu_clk@01c20050 {
@@ -149,19 +157,11 @@
149 clock-output-names = "axi"; 157 clock-output-names = "axi";
150 }; 158 };
151 159
152 ahb1_mux: ahb1_mux_clk@01c20054 {
153 #clock-cells = <0>;
154 compatible = "allwinner,sun6i-a31-ahb1-mux-clk";
155 reg = <0x01c20054 0x4>;
156 clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6>;
157 clock-output-names = "ahb1_mux";
158 };
159
160 ahb1: ahb1_clk@01c20054 { 160 ahb1: ahb1_clk@01c20054 {
161 #clock-cells = <0>; 161 #clock-cells = <0>;
162 compatible = "allwinner,sun4i-a10-ahb-clk"; 162 compatible = "allwinner,sun6i-a31-ahb1-clk";
163 reg = <0x01c20054 0x4>; 163 reg = <0x01c20054 0x4>;
164 clocks = <&ahb1_mux>; 164 clocks = <&osc32k>, <&osc24M>, <&axi>, <&pll6 0>;
165 clock-output-names = "ahb1"; 165 clock-output-names = "ahb1";
166 }; 166 };
167 167
@@ -202,7 +202,7 @@
202 #clock-cells = <0>; 202 #clock-cells = <0>;
203 compatible = "allwinner,sun4i-a10-apb1-clk"; 203 compatible = "allwinner,sun4i-a10-apb1-clk";
204 reg = <0x01c20058 0x4>; 204 reg = <0x01c20058 0x4>;
205 clocks = <&osc32k>, <&osc24M>, <&pll6>, <&pll6>; 205 clocks = <&osc32k>, <&osc24M>, <&pll6 0>, <&pll6 0>;
206 clock-output-names = "apb2"; 206 clock-output-names = "apb2";
207 }; 207 };
208 208
@@ -218,27 +218,41 @@
218 }; 218 };
219 219
220 mmc0_clk: clk@01c20088 { 220 mmc0_clk: clk@01c20088 {
221 #clock-cells = <0>; 221 #clock-cells = <1>;
222 compatible = "allwinner,sun4i-a10-mod0-clk"; 222 compatible = "allwinner,sun4i-a10-mmc-clk";
223 reg = <0x01c20088 0x4>; 223 reg = <0x01c20088 0x4>;
224 clocks = <&osc24M>, <&pll6>; 224 clocks = <&osc24M>, <&pll6 0>;
225 clock-output-names = "mmc0"; 225 clock-output-names = "mmc0",
226 "mmc0_output",
227 "mmc0_sample";
226 }; 228 };
227 229
228 mmc1_clk: clk@01c2008c { 230 mmc1_clk: clk@01c2008c {
229 #clock-cells = <0>; 231 #clock-cells = <1>;
230 compatible = "allwinner,sun4i-a10-mod0-clk"; 232 compatible = "allwinner,sun4i-a10-mmc-clk";
231 reg = <0x01c2008c 0x4>; 233 reg = <0x01c2008c 0x4>;
232 clocks = <&osc24M>, <&pll6>; 234 clocks = <&osc24M>, <&pll6 0>;
233 clock-output-names = "mmc1"; 235 clock-output-names = "mmc1",
236 "mmc1_output",
237 "mmc1_sample";
234 }; 238 };
235 239
236 mmc2_clk: clk@01c20090 { 240 mmc2_clk: clk@01c20090 {
237 #clock-cells = <0>; 241 #clock-cells = <1>;
238 compatible = "allwinner,sun4i-a10-mod0-clk"; 242 compatible = "allwinner,sun4i-a10-mmc-clk";
239 reg = <0x01c20090 0x4>; 243 reg = <0x01c20090 0x4>;
240 clocks = <&osc24M>, <&pll6>; 244 clocks = <&osc24M>, <&pll6 0>;
241 clock-output-names = "mmc2"; 245 clock-output-names = "mmc2",
246 "mmc2_output",
247 "mmc2_sample";
248 };
249
250 mbus_clk: clk@01c2015c {
251 #clock-cells = <0>;
252 compatible = "allwinner,sun8i-a23-mbus-clk";
253 reg = <0x01c2015c 0x4>;
254 clocks = <&osc24M>, <&pll6 1>, <&pll5>;
255 clock-output-names = "mbus";
242 }; 256 };
243 }; 257 };
244 258
@@ -260,8 +274,14 @@
260 mmc0: mmc@01c0f000 { 274 mmc0: mmc@01c0f000 {
261 compatible = "allwinner,sun5i-a13-mmc"; 275 compatible = "allwinner,sun5i-a13-mmc";
262 reg = <0x01c0f000 0x1000>; 276 reg = <0x01c0f000 0x1000>;
263 clocks = <&ahb1_gates 8>, <&mmc0_clk>; 277 clocks = <&ahb1_gates 8>,
264 clock-names = "ahb", "mmc"; 278 <&mmc0_clk 0>,
279 <&mmc0_clk 1>,
280 <&mmc0_clk 2>;
281 clock-names = "ahb",
282 "mmc",
283 "output",
284 "sample";
265 resets = <&ahb1_rst 8>; 285 resets = <&ahb1_rst 8>;
266 reset-names = "ahb"; 286 reset-names = "ahb";
267 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 287 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>;
@@ -271,8 +291,14 @@
271 mmc1: mmc@01c10000 { 291 mmc1: mmc@01c10000 {
272 compatible = "allwinner,sun5i-a13-mmc"; 292 compatible = "allwinner,sun5i-a13-mmc";
273 reg = <0x01c10000 0x1000>; 293 reg = <0x01c10000 0x1000>;
274 clocks = <&ahb1_gates 9>, <&mmc1_clk>; 294 clocks = <&ahb1_gates 9>,
275 clock-names = "ahb", "mmc"; 295 <&mmc1_clk 0>,
296 <&mmc1_clk 1>,
297 <&mmc1_clk 2>;
298 clock-names = "ahb",
299 "mmc",
300 "output",
301 "sample";
276 resets = <&ahb1_rst 9>; 302 resets = <&ahb1_rst 9>;
277 reset-names = "ahb"; 303 reset-names = "ahb";
278 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 304 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
@@ -282,8 +308,14 @@
282 mmc2: mmc@01c11000 { 308 mmc2: mmc@01c11000 {
283 compatible = "allwinner,sun5i-a13-mmc"; 309 compatible = "allwinner,sun5i-a13-mmc";
284 reg = <0x01c11000 0x1000>; 310 reg = <0x01c11000 0x1000>;
285 clocks = <&ahb1_gates 10>, <&mmc2_clk>; 311 clocks = <&ahb1_gates 10>,
286 clock-names = "ahb", "mmc"; 312 <&mmc2_clk 0>,
313 <&mmc2_clk 1>,
314 <&mmc2_clk 2>;
315 clock-names = "ahb",
316 "mmc",
317 "output",
318 "sample";
287 resets = <&ahb1_rst 10>; 319 resets = <&ahb1_rst 10>;
288 reset-names = "ahb"; 320 reset-names = "ahb";
289 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 321 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
diff --git a/arch/arm/configs/at91_dt_defconfig b/arch/arm/configs/at91_dt_defconfig
index f2670f638e97..811e72bbe642 100644
--- a/arch/arm/configs/at91_dt_defconfig
+++ b/arch/arm/configs/at91_dt_defconfig
@@ -70,6 +70,7 @@ CONFIG_SCSI=y
70CONFIG_BLK_DEV_SD=y 70CONFIG_BLK_DEV_SD=y
71# CONFIG_SCSI_LOWLEVEL is not set 71# CONFIG_SCSI_LOWLEVEL is not set
72CONFIG_NETDEVICES=y 72CONFIG_NETDEVICES=y
73CONFIG_ARM_AT91_ETHER=y
73CONFIG_MACB=y 74CONFIG_MACB=y
74# CONFIG_NET_VENDOR_BROADCOM is not set 75# CONFIG_NET_VENDOR_BROADCOM is not set
75CONFIG_DM9000=y 76CONFIG_DM9000=y
diff --git a/arch/arm/configs/multi_v7_defconfig b/arch/arm/configs/multi_v7_defconfig
index e8a4c955241b..06075b6d2463 100644
--- a/arch/arm/configs/multi_v7_defconfig
+++ b/arch/arm/configs/multi_v7_defconfig
@@ -62,6 +62,17 @@ CONFIG_MACH_SPEAR1340=y
62CONFIG_ARCH_STI=y 62CONFIG_ARCH_STI=y
63CONFIG_ARCH_EXYNOS=y 63CONFIG_ARCH_EXYNOS=y
64CONFIG_EXYNOS5420_MCPM=y 64CONFIG_EXYNOS5420_MCPM=y
65CONFIG_ARCH_SHMOBILE_MULTI=y
66CONFIG_ARCH_EMEV2=y
67CONFIG_ARCH_R7S72100=y
68CONFIG_ARCH_R8A73A4=y
69CONFIG_ARCH_R8A7740=y
70CONFIG_ARCH_R8A7779=y
71CONFIG_ARCH_R8A7790=y
72CONFIG_ARCH_R8A7791=y
73CONFIG_ARCH_R8A7794=y
74CONFIG_ARCH_SH73A0=y
75CONFIG_MACH_MARZEN=y
65CONFIG_ARCH_SUNXI=y 76CONFIG_ARCH_SUNXI=y
66CONFIG_ARCH_SIRF=y 77CONFIG_ARCH_SIRF=y
67CONFIG_ARCH_TEGRA=y 78CONFIG_ARCH_TEGRA=y
@@ -84,9 +95,11 @@ CONFIG_PCI_KEYSTONE=y
84CONFIG_PCI_MSI=y 95CONFIG_PCI_MSI=y
85CONFIG_PCI_MVEBU=y 96CONFIG_PCI_MVEBU=y
86CONFIG_PCI_TEGRA=y 97CONFIG_PCI_TEGRA=y
98CONFIG_PCI_RCAR_GEN2=y
99CONFIG_PCI_RCAR_GEN2_PCIE=y
87CONFIG_PCIEPORTBUS=y 100CONFIG_PCIEPORTBUS=y
88CONFIG_SMP=y 101CONFIG_SMP=y
89CONFIG_NR_CPUS=8 102CONFIG_NR_CPUS=16
90CONFIG_HIGHPTE=y 103CONFIG_HIGHPTE=y
91CONFIG_CMA=y 104CONFIG_CMA=y
92CONFIG_ARM_APPENDED_DTB=y 105CONFIG_ARM_APPENDED_DTB=y
@@ -130,6 +143,7 @@ CONFIG_DEVTMPFS_MOUNT=y
130CONFIG_DMA_CMA=y 143CONFIG_DMA_CMA=y
131CONFIG_CMA_SIZE_MBYTES=64 144CONFIG_CMA_SIZE_MBYTES=64
132CONFIG_OMAP_OCP2SCP=y 145CONFIG_OMAP_OCP2SCP=y
146CONFIG_SIMPLE_PM_BUS=y
133CONFIG_MTD=y 147CONFIG_MTD=y
134CONFIG_MTD_CMDLINE_PARTS=y 148CONFIG_MTD_CMDLINE_PARTS=y
135CONFIG_MTD_BLOCK=y 149CONFIG_MTD_BLOCK=y
@@ -157,6 +171,7 @@ CONFIG_AHCI_SUNXI=y
157CONFIG_AHCI_TEGRA=y 171CONFIG_AHCI_TEGRA=y
158CONFIG_SATA_HIGHBANK=y 172CONFIG_SATA_HIGHBANK=y
159CONFIG_SATA_MV=y 173CONFIG_SATA_MV=y
174CONFIG_SATA_RCAR=y
160CONFIG_NETDEVICES=y 175CONFIG_NETDEVICES=y
161CONFIG_HIX5HD2_GMAC=y 176CONFIG_HIX5HD2_GMAC=y
162CONFIG_SUN4I_EMAC=y 177CONFIG_SUN4I_EMAC=y
@@ -167,14 +182,17 @@ CONFIG_MV643XX_ETH=y
167CONFIG_MVNETA=y 182CONFIG_MVNETA=y
168CONFIG_KS8851=y 183CONFIG_KS8851=y
169CONFIG_R8169=y 184CONFIG_R8169=y
185CONFIG_SH_ETH=y
170CONFIG_SMSC911X=y 186CONFIG_SMSC911X=y
171CONFIG_STMMAC_ETH=y 187CONFIG_STMMAC_ETH=y
172CONFIG_TI_CPSW=y 188CONFIG_TI_CPSW=y
173CONFIG_XILINX_EMACLITE=y 189CONFIG_XILINX_EMACLITE=y
174CONFIG_AT803X_PHY=y 190CONFIG_AT803X_PHY=y
175CONFIG_MARVELL_PHY=y 191CONFIG_MARVELL_PHY=y
192CONFIG_SMSC_PHY=y
176CONFIG_BROADCOM_PHY=y 193CONFIG_BROADCOM_PHY=y
177CONFIG_ICPLUS_PHY=y 194CONFIG_ICPLUS_PHY=y
195CONFIG_MICREL_PHY=y
178CONFIG_USB_PEGASUS=y 196CONFIG_USB_PEGASUS=y
179CONFIG_USB_USBNET=y 197CONFIG_USB_USBNET=y
180CONFIG_USB_NET_SMSC75XX=y 198CONFIG_USB_NET_SMSC75XX=y
@@ -192,15 +210,18 @@ CONFIG_KEYBOARD_CROS_EC=y
192CONFIG_MOUSE_PS2_ELANTECH=y 210CONFIG_MOUSE_PS2_ELANTECH=y
193CONFIG_INPUT_TOUCHSCREEN=y 211CONFIG_INPUT_TOUCHSCREEN=y
194CONFIG_TOUCHSCREEN_ATMEL_MXT=y 212CONFIG_TOUCHSCREEN_ATMEL_MXT=y
213CONFIG_TOUCHSCREEN_ST1232=m
195CONFIG_TOUCHSCREEN_STMPE=y 214CONFIG_TOUCHSCREEN_STMPE=y
196CONFIG_TOUCHSCREEN_SUN4I=y 215CONFIG_TOUCHSCREEN_SUN4I=y
197CONFIG_INPUT_MISC=y 216CONFIG_INPUT_MISC=y
198CONFIG_INPUT_MPU3050=y 217CONFIG_INPUT_MPU3050=y
199CONFIG_INPUT_AXP20X_PEK=y 218CONFIG_INPUT_AXP20X_PEK=y
219CONFIG_INPUT_ADXL34X=m
200CONFIG_SERIO_AMBAKMI=y 220CONFIG_SERIO_AMBAKMI=y
201CONFIG_SERIAL_8250=y 221CONFIG_SERIAL_8250=y
202CONFIG_SERIAL_8250_CONSOLE=y 222CONFIG_SERIAL_8250_CONSOLE=y
203CONFIG_SERIAL_8250_DW=y 223CONFIG_SERIAL_8250_DW=y
224CONFIG_SERIAL_8250_EM=y
204CONFIG_SERIAL_8250_MT6577=y 225CONFIG_SERIAL_8250_MT6577=y
205CONFIG_SERIAL_AMBA_PL011=y 226CONFIG_SERIAL_AMBA_PL011=y
206CONFIG_SERIAL_AMBA_PL011_CONSOLE=y 227CONFIG_SERIAL_AMBA_PL011_CONSOLE=y
@@ -213,6 +234,9 @@ CONFIG_SERIAL_SIRFSOC_CONSOLE=y
213CONFIG_SERIAL_TEGRA=y 234CONFIG_SERIAL_TEGRA=y
214CONFIG_SERIAL_IMX=y 235CONFIG_SERIAL_IMX=y
215CONFIG_SERIAL_IMX_CONSOLE=y 236CONFIG_SERIAL_IMX_CONSOLE=y
237CONFIG_SERIAL_SH_SCI=y
238CONFIG_SERIAL_SH_SCI_NR_UARTS=20
239CONFIG_SERIAL_SH_SCI_CONSOLE=y
216CONFIG_SERIAL_MSM=y 240CONFIG_SERIAL_MSM=y
217CONFIG_SERIAL_MSM_CONSOLE=y 241CONFIG_SERIAL_MSM_CONSOLE=y
218CONFIG_SERIAL_VT8500=y 242CONFIG_SERIAL_VT8500=y
@@ -233,19 +257,26 @@ CONFIG_I2C_MUX_PCA954x=y
233CONFIG_I2C_MUX_PINCTRL=y 257CONFIG_I2C_MUX_PINCTRL=y
234CONFIG_I2C_CADENCE=y 258CONFIG_I2C_CADENCE=y
235CONFIG_I2C_DESIGNWARE_PLATFORM=y 259CONFIG_I2C_DESIGNWARE_PLATFORM=y
260CONFIG_I2C_GPIO=m
236CONFIG_I2C_EXYNOS5=y 261CONFIG_I2C_EXYNOS5=y
237CONFIG_I2C_MV64XXX=y 262CONFIG_I2C_MV64XXX=y
263CONFIG_I2C_RIIC=y
238CONFIG_I2C_S3C2410=y 264CONFIG_I2C_S3C2410=y
265CONFIG_I2C_SH_MOBILE=y
239CONFIG_I2C_SIRF=y 266CONFIG_I2C_SIRF=y
240CONFIG_I2C_TEGRA=y
241CONFIG_I2C_ST=y 267CONFIG_I2C_ST=y
242CONFIG_SPI=y 268CONFIG_I2C_TEGRA=y
243CONFIG_I2C_XILINX=y 269CONFIG_I2C_XILINX=y
244CONFIG_SPI_DAVINCI=y 270CONFIG_I2C_RCAR=y
271CONFIG_SPI=y
245CONFIG_SPI_CADENCE=y 272CONFIG_SPI_CADENCE=y
273CONFIG_SPI_DAVINCI=y
246CONFIG_SPI_OMAP24XX=y 274CONFIG_SPI_OMAP24XX=y
247CONFIG_SPI_ORION=y 275CONFIG_SPI_ORION=y
248CONFIG_SPI_PL022=y 276CONFIG_SPI_PL022=y
277CONFIG_SPI_RSPI=y
278CONFIG_SPI_SH_MSIOF=m
279CONFIG_SPI_SH_HSPI=y
249CONFIG_SPI_SIRF=y 280CONFIG_SPI_SIRF=y
250CONFIG_SPI_SUN4I=y 281CONFIG_SPI_SUN4I=y
251CONFIG_SPI_SUN6I=y 282CONFIG_SPI_SUN6I=y
@@ -259,12 +290,15 @@ CONFIG_PINCTRL_PALMAS=y
259CONFIG_PINCTRL_APQ8084=y 290CONFIG_PINCTRL_APQ8084=y
260CONFIG_GPIO_SYSFS=y 291CONFIG_GPIO_SYSFS=y
261CONFIG_GPIO_GENERIC_PLATFORM=y 292CONFIG_GPIO_GENERIC_PLATFORM=y
262CONFIG_GPIO_DWAPB=y
263CONFIG_GPIO_DAVINCI=y 293CONFIG_GPIO_DAVINCI=y
294CONFIG_GPIO_DWAPB=y
295CONFIG_GPIO_EM=y
296CONFIG_GPIO_RCAR=y
264CONFIG_GPIO_XILINX=y 297CONFIG_GPIO_XILINX=y
265CONFIG_GPIO_ZYNQ=y 298CONFIG_GPIO_ZYNQ=y
266CONFIG_GPIO_PCA953X=y 299CONFIG_GPIO_PCA953X=y
267CONFIG_GPIO_PCA953X_IRQ=y 300CONFIG_GPIO_PCA953X_IRQ=y
301CONFIG_GPIO_PCF857X=y
268CONFIG_GPIO_TWL4030=y 302CONFIG_GPIO_TWL4030=y
269CONFIG_GPIO_PALMAS=y 303CONFIG_GPIO_PALMAS=y
270CONFIG_GPIO_SYSCON=y 304CONFIG_GPIO_SYSCON=y
@@ -276,10 +310,12 @@ CONFIG_POWER_RESET_AS3722=y
276CONFIG_POWER_RESET_GPIO=y 310CONFIG_POWER_RESET_GPIO=y
277CONFIG_POWER_RESET_KEYSTONE=y 311CONFIG_POWER_RESET_KEYSTONE=y
278CONFIG_POWER_RESET_SUN6I=y 312CONFIG_POWER_RESET_SUN6I=y
313CONFIG_POWER_RESET_RMOBILE=y
279CONFIG_SENSORS_LM90=y 314CONFIG_SENSORS_LM90=y
280CONFIG_SENSORS_LM95245=y 315CONFIG_SENSORS_LM95245=y
281CONFIG_THERMAL=y 316CONFIG_THERMAL=y
282CONFIG_CPU_THERMAL=y 317CONFIG_CPU_THERMAL=y
318CONFIG_RCAR_THERMAL=y
283CONFIG_ARMADA_THERMAL=y 319CONFIG_ARMADA_THERMAL=y
284CONFIG_DAVINCI_WATCHDOG 320CONFIG_DAVINCI_WATCHDOG
285CONFIG_ST_THERMAL_SYSCFG=y 321CONFIG_ST_THERMAL_SYSCFG=y
@@ -290,6 +326,7 @@ CONFIG_ARM_SP805_WATCHDOG=y
290CONFIG_ORION_WATCHDOG=y 326CONFIG_ORION_WATCHDOG=y
291CONFIG_SUNXI_WATCHDOG=y 327CONFIG_SUNXI_WATCHDOG=y
292CONFIG_MESON_WATCHDOG=y 328CONFIG_MESON_WATCHDOG=y
329CONFIG_MFD_AS3711=y
293CONFIG_MFD_AS3722=y 330CONFIG_MFD_AS3722=y
294CONFIG_MFD_BCM590XX=y 331CONFIG_MFD_BCM590XX=y
295CONFIG_MFD_AXP20X=y 332CONFIG_MFD_AXP20X=y
@@ -304,13 +341,16 @@ CONFIG_MFD_TPS65090=y
304CONFIG_MFD_TPS6586X=y 341CONFIG_MFD_TPS6586X=y
305CONFIG_MFD_TPS65910=y 342CONFIG_MFD_TPS65910=y
306CONFIG_REGULATOR_AB8500=y 343CONFIG_REGULATOR_AB8500=y
344CONFIG_REGULATOR_AS3711=y
307CONFIG_REGULATOR_AS3722=y 345CONFIG_REGULATOR_AS3722=y
308CONFIG_REGULATOR_AXP20X=y 346CONFIG_REGULATOR_AXP20X=y
309CONFIG_REGULATOR_BCM590XX=y 347CONFIG_REGULATOR_BCM590XX=y
348CONFIG_REGULATOR_DA9210=y
310CONFIG_REGULATOR_GPIO=y 349CONFIG_REGULATOR_GPIO=y
311CONFIG_MFD_SYSCON=y 350CONFIG_MFD_SYSCON=y
312CONFIG_POWER_RESET_SYSCON=y 351CONFIG_POWER_RESET_SYSCON=y
313CONFIG_REGULATOR_MAX8907=y 352CONFIG_REGULATOR_MAX8907=y
353CONFIG_REGULATOR_MAX8973=y
314CONFIG_REGULATOR_MAX77686=y 354CONFIG_REGULATOR_MAX77686=y
315CONFIG_REGULATOR_PALMAS=y 355CONFIG_REGULATOR_PALMAS=y
316CONFIG_REGULATOR_S2MPS11=y 356CONFIG_REGULATOR_S2MPS11=y
@@ -324,18 +364,32 @@ CONFIG_REGULATOR_TWL4030=y
324CONFIG_REGULATOR_VEXPRESS=y 364CONFIG_REGULATOR_VEXPRESS=y
325CONFIG_MEDIA_SUPPORT=y 365CONFIG_MEDIA_SUPPORT=y
326CONFIG_MEDIA_CAMERA_SUPPORT=y 366CONFIG_MEDIA_CAMERA_SUPPORT=y
367CONFIG_MEDIA_CONTROLLER=y
368CONFIG_VIDEO_V4L2_SUBDEV_API=y
327CONFIG_MEDIA_USB_SUPPORT=y 369CONFIG_MEDIA_USB_SUPPORT=y
328CONFIG_USB_VIDEO_CLASS=y 370CONFIG_USB_VIDEO_CLASS=y
329CONFIG_USB_GSPCA=y 371CONFIG_USB_GSPCA=y
372CONFIG_V4L_PLATFORM_DRIVERS=y
373CONFIG_SOC_CAMERA=m
374CONFIG_SOC_CAMERA_PLATFORM=m
375CONFIG_VIDEO_RCAR_VIN=m
376CONFIG_V4L_MEM2MEM_DRIVERS=y
377CONFIG_VIDEO_RENESAS_VSP1=m
378# CONFIG_MEDIA_SUBDRV_AUTOSELECT is not set
379CONFIG_VIDEO_ADV7180=m
330CONFIG_DRM=y 380CONFIG_DRM=y
381CONFIG_DRM_RCAR_DU=m
331CONFIG_DRM_TEGRA=y 382CONFIG_DRM_TEGRA=y
332CONFIG_DRM_PANEL_SIMPLE=y 383CONFIG_DRM_PANEL_SIMPLE=y
333CONFIG_FB_ARMCLCD=y 384CONFIG_FB_ARMCLCD=y
334CONFIG_FB_WM8505=y 385CONFIG_FB_WM8505=y
386CONFIG_FB_SH_MOBILE_LCDC=y
335CONFIG_FB_SIMPLE=y 387CONFIG_FB_SIMPLE=y
388CONFIG_FB_SH_MOBILE_MERAM=y
336CONFIG_BACKLIGHT_LCD_SUPPORT=y 389CONFIG_BACKLIGHT_LCD_SUPPORT=y
337CONFIG_BACKLIGHT_CLASS_DEVICE=y 390CONFIG_BACKLIGHT_CLASS_DEVICE=y
338CONFIG_BACKLIGHT_PWM=y 391CONFIG_BACKLIGHT_PWM=y
392CONFIG_BACKLIGHT_AS3711=y
339CONFIG_FRAMEBUFFER_CONSOLE=y 393CONFIG_FRAMEBUFFER_CONSOLE=y
340CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y 394CONFIG_FRAMEBUFFER_CONSOLE_ROTATION=y
341CONFIG_SOUND=y 395CONFIG_SOUND=y
@@ -343,6 +397,8 @@ CONFIG_SND=y
343CONFIG_SND_DYNAMIC_MINORS=y 397CONFIG_SND_DYNAMIC_MINORS=y
344CONFIG_SND_USB_AUDIO=y 398CONFIG_SND_USB_AUDIO=y
345CONFIG_SND_SOC=y 399CONFIG_SND_SOC=y
400CONFIG_SND_SOC_SH4_FSI=m
401CONFIG_SND_SOC_RCAR=m
346CONFIG_SND_SOC_TEGRA=y 402CONFIG_SND_SOC_TEGRA=y
347CONFIG_SND_SOC_TEGRA_RT5640=y 403CONFIG_SND_SOC_TEGRA_RT5640=y
348CONFIG_SND_SOC_TEGRA_WM8753=y 404CONFIG_SND_SOC_TEGRA_WM8753=y
@@ -350,6 +406,8 @@ CONFIG_SND_SOC_TEGRA_WM8903=y
350CONFIG_SND_SOC_TEGRA_TRIMSLICE=y 406CONFIG_SND_SOC_TEGRA_TRIMSLICE=y
351CONFIG_SND_SOC_TEGRA_ALC5632=y 407CONFIG_SND_SOC_TEGRA_ALC5632=y
352CONFIG_SND_SOC_TEGRA_MAX98090=y 408CONFIG_SND_SOC_TEGRA_MAX98090=y
409CONFIG_SND_SOC_AK4642=m
410CONFIG_SND_SOC_WM8978=m
353CONFIG_USB=y 411CONFIG_USB=y
354CONFIG_USB_XHCI_HCD=y 412CONFIG_USB_XHCI_HCD=y
355CONFIG_USB_XHCI_MVEBU=y 413CONFIG_USB_XHCI_MVEBU=y
@@ -362,6 +420,8 @@ CONFIG_USB_ISP1760_HCD=y
362CONFIG_USB_OHCI_HCD=y 420CONFIG_USB_OHCI_HCD=y
363CONFIG_USB_OHCI_HCD_STI=y 421CONFIG_USB_OHCI_HCD_STI=y
364CONFIG_USB_OHCI_HCD_PLATFORM=y 422CONFIG_USB_OHCI_HCD_PLATFORM=y
423CONFIG_USB_R8A66597_HCD=m
424CONFIG_USB_RENESAS_USBHS=m
365CONFIG_USB_STORAGE=y 425CONFIG_USB_STORAGE=y
366CONFIG_USB_DWC3=y 426CONFIG_USB_DWC3=y
367CONFIG_USB_CHIPIDEA=y 427CONFIG_USB_CHIPIDEA=y
@@ -374,6 +434,10 @@ CONFIG_SAMSUNG_USB3PHY=y
374CONFIG_USB_GPIO_VBUS=y 434CONFIG_USB_GPIO_VBUS=y
375CONFIG_USB_ISP1301=y 435CONFIG_USB_ISP1301=y
376CONFIG_USB_MXS_PHY=y 436CONFIG_USB_MXS_PHY=y
437CONFIG_USB_RCAR_PHY=m
438CONFIG_USB_RCAR_GEN2_PHY=m
439CONFIG_USB_GADGET=y
440CONFIG_USB_RENESAS_USBHS_UDC=m
377CONFIG_MMC=y 441CONFIG_MMC=y
378CONFIG_MMC_BLOCK_MINORS=16 442CONFIG_MMC_BLOCK_MINORS=16
379CONFIG_MMC_ARMMMCI=y 443CONFIG_MMC_ARMMMCI=y
@@ -392,12 +456,14 @@ CONFIG_MMC_SDHCI_ST=y
392CONFIG_MMC_OMAP=y 456CONFIG_MMC_OMAP=y
393CONFIG_MMC_OMAP_HS=y 457CONFIG_MMC_OMAP_HS=y
394CONFIG_MMC_MVSDIO=y 458CONFIG_MMC_MVSDIO=y
395CONFIG_MMC_SUNXI=y 459CONFIG_MMC_SDHI=y
396CONFIG_MMC_DW=y 460CONFIG_MMC_DW=y
397CONFIG_MMC_DW_IDMAC=y 461CONFIG_MMC_DW_IDMAC=y
398CONFIG_MMC_DW_PLTFM=y 462CONFIG_MMC_DW_PLTFM=y
399CONFIG_MMC_DW_EXYNOS=y 463CONFIG_MMC_DW_EXYNOS=y
400CONFIG_MMC_DW_ROCKCHIP=y 464CONFIG_MMC_DW_ROCKCHIP=y
465CONFIG_MMC_SH_MMCIF=y
466CONFIG_MMC_SUNXI=y
401CONFIG_NEW_LEDS=y 467CONFIG_NEW_LEDS=y
402CONFIG_LEDS_CLASS=y 468CONFIG_LEDS_CLASS=y
403CONFIG_LEDS_GPIO=y 469CONFIG_LEDS_GPIO=y
@@ -421,10 +487,12 @@ CONFIG_RTC_DRV_AS3722=y
421CONFIG_RTC_DRV_DS1307=y 487CONFIG_RTC_DRV_DS1307=y
422CONFIG_RTC_DRV_MAX8907=y 488CONFIG_RTC_DRV_MAX8907=y
423CONFIG_RTC_DRV_MAX77686=y 489CONFIG_RTC_DRV_MAX77686=y
490CONFIG_RTC_DRV_RS5C372=m
424CONFIG_RTC_DRV_PALMAS=y 491CONFIG_RTC_DRV_PALMAS=y
425CONFIG_RTC_DRV_TWL4030=y 492CONFIG_RTC_DRV_TWL4030=y
426CONFIG_RTC_DRV_TPS6586X=y 493CONFIG_RTC_DRV_TPS6586X=y
427CONFIG_RTC_DRV_TPS65910=y 494CONFIG_RTC_DRV_TPS65910=y
495CONFIG_RTC_DRV_S35390A=m
428CONFIG_RTC_DRV_EM3027=y 496CONFIG_RTC_DRV_EM3027=y
429CONFIG_RTC_DRV_PL031=y 497CONFIG_RTC_DRV_PL031=y
430CONFIG_RTC_DRV_VT8500=y 498CONFIG_RTC_DRV_VT8500=y
@@ -436,6 +504,9 @@ CONFIG_DMADEVICES=y
436CONFIG_DW_DMAC=y 504CONFIG_DW_DMAC=y
437CONFIG_MV_XOR=y 505CONFIG_MV_XOR=y
438CONFIG_TEGRA20_APB_DMA=y 506CONFIG_TEGRA20_APB_DMA=y
507CONFIG_SH_DMAE=y
508CONFIG_RCAR_AUDMAC_PP=m
509CONFIG_RCAR_DMAC=y
439CONFIG_STE_DMA40=y 510CONFIG_STE_DMA40=y
440CONFIG_SIRF_DMA=y 511CONFIG_SIRF_DMA=y
441CONFIG_TI_EDMA=y 512CONFIG_TI_EDMA=y
@@ -468,6 +539,7 @@ CONFIG_IIO=y
468CONFIG_XILINX_XADC=y 539CONFIG_XILINX_XADC=y
469CONFIG_AK8975=y 540CONFIG_AK8975=y
470CONFIG_PWM=y 541CONFIG_PWM=y
542CONFIG_PWM_RENESAS_TPU=y
471CONFIG_PWM_TEGRA=y 543CONFIG_PWM_TEGRA=y
472CONFIG_PWM_VT8500=y 544CONFIG_PWM_VT8500=y
473CONFIG_PHY_HIX5HD2_SATA=y 545CONFIG_PHY_HIX5HD2_SATA=y
diff --git a/arch/arm/configs/omap2plus_defconfig b/arch/arm/configs/omap2plus_defconfig
index b7386524c356..8e108599e1af 100644
--- a/arch/arm/configs/omap2plus_defconfig
+++ b/arch/arm/configs/omap2plus_defconfig
@@ -114,6 +114,7 @@ CONFIG_MTD_PHYSMAP_OF=y
114CONFIG_MTD_NAND=y 114CONFIG_MTD_NAND=y
115CONFIG_MTD_NAND_ECC_BCH=y 115CONFIG_MTD_NAND_ECC_BCH=y
116CONFIG_MTD_NAND_OMAP2=y 116CONFIG_MTD_NAND_OMAP2=y
117CONFIG_MTD_NAND_OMAP_BCH=y
117CONFIG_MTD_ONENAND=y 118CONFIG_MTD_ONENAND=y
118CONFIG_MTD_ONENAND_VERIFY_WRITE=y 119CONFIG_MTD_ONENAND_VERIFY_WRITE=y
119CONFIG_MTD_ONENAND_OMAP2=y 120CONFIG_MTD_ONENAND_OMAP2=y
@@ -248,6 +249,7 @@ CONFIG_TWL6040_CORE=y
248CONFIG_REGULATOR_PALMAS=y 249CONFIG_REGULATOR_PALMAS=y
249CONFIG_REGULATOR_PBIAS=y 250CONFIG_REGULATOR_PBIAS=y
250CONFIG_REGULATOR_TI_ABB=y 251CONFIG_REGULATOR_TI_ABB=y
252CONFIG_REGULATOR_TPS62360=m
251CONFIG_REGULATOR_TPS65023=y 253CONFIG_REGULATOR_TPS65023=y
252CONFIG_REGULATOR_TPS6507X=y 254CONFIG_REGULATOR_TPS6507X=y
253CONFIG_REGULATOR_TPS65217=y 255CONFIG_REGULATOR_TPS65217=y
@@ -374,7 +376,8 @@ CONFIG_PWM_TIEHRPWM=m
374CONFIG_PWM_TWL=m 376CONFIG_PWM_TWL=m
375CONFIG_PWM_TWL_LED=m 377CONFIG_PWM_TWL_LED=m
376CONFIG_OMAP_USB2=m 378CONFIG_OMAP_USB2=m
377CONFIG_TI_PIPE3=m 379CONFIG_TI_PIPE3=y
380CONFIG_TWL4030_USB=m
378CONFIG_EXT2_FS=y 381CONFIG_EXT2_FS=y
379CONFIG_EXT3_FS=y 382CONFIG_EXT3_FS=y
380# CONFIG_EXT3_FS_XATTR is not set 383# CONFIG_EXT3_FS_XATTR is not set
diff --git a/arch/arm/configs/sama5_defconfig b/arch/arm/configs/sama5_defconfig
index 41d856effe6c..510c747c65b4 100644
--- a/arch/arm/configs/sama5_defconfig
+++ b/arch/arm/configs/sama5_defconfig
@@ -3,8 +3,6 @@
3CONFIG_SYSVIPC=y 3CONFIG_SYSVIPC=y
4CONFIG_IRQ_DOMAIN_DEBUG=y 4CONFIG_IRQ_DOMAIN_DEBUG=y
5CONFIG_LOG_BUF_SHIFT=14 5CONFIG_LOG_BUF_SHIFT=14
6CONFIG_SYSFS_DEPRECATED=y
7CONFIG_SYSFS_DEPRECATED_V2=y
8CONFIG_BLK_DEV_INITRD=y 6CONFIG_BLK_DEV_INITRD=y
9CONFIG_EMBEDDED=y 7CONFIG_EMBEDDED=y
10CONFIG_SLAB=y 8CONFIG_SLAB=y
diff --git a/arch/arm/configs/sunxi_defconfig b/arch/arm/configs/sunxi_defconfig
index 38840a812924..8f6a5702b696 100644
--- a/arch/arm/configs/sunxi_defconfig
+++ b/arch/arm/configs/sunxi_defconfig
@@ -4,6 +4,7 @@ CONFIG_BLK_DEV_INITRD=y
4CONFIG_PERF_EVENTS=y 4CONFIG_PERF_EVENTS=y
5CONFIG_ARCH_SUNXI=y 5CONFIG_ARCH_SUNXI=y
6CONFIG_SMP=y 6CONFIG_SMP=y
7CONFIG_NR_CPUS=8
7CONFIG_AEABI=y 8CONFIG_AEABI=y
8CONFIG_HIGHMEM=y 9CONFIG_HIGHMEM=y
9CONFIG_HIGHPTE=y 10CONFIG_HIGHPTE=y
diff --git a/arch/arm/configs/vexpress_defconfig b/arch/arm/configs/vexpress_defconfig
index f489fdaa19b8..37fe607a4ede 100644
--- a/arch/arm/configs/vexpress_defconfig
+++ b/arch/arm/configs/vexpress_defconfig
@@ -118,8 +118,8 @@ CONFIG_HID_ZEROPLUS=y
118CONFIG_USB=y 118CONFIG_USB=y
119CONFIG_USB_ANNOUNCE_NEW_DEVICES=y 119CONFIG_USB_ANNOUNCE_NEW_DEVICES=y
120CONFIG_USB_MON=y 120CONFIG_USB_MON=y
121CONFIG_USB_ISP1760_HCD=y
122CONFIG_USB_STORAGE=y 121CONFIG_USB_STORAGE=y
122CONFIG_USB_ISP1760=y
123CONFIG_MMC=y 123CONFIG_MMC=y
124CONFIG_MMC_ARMMMCI=y 124CONFIG_MMC_ARMMMCI=y
125CONFIG_NEW_LEDS=y 125CONFIG_NEW_LEDS=y
diff --git a/arch/arm/crypto/aesbs-core.S_shipped b/arch/arm/crypto/aesbs-core.S_shipped
index 71e5fc7cfb18..1d1800f71c5b 100644
--- a/arch/arm/crypto/aesbs-core.S_shipped
+++ b/arch/arm/crypto/aesbs-core.S_shipped
@@ -58,14 +58,18 @@
58# define VFP_ABI_FRAME 0 58# define VFP_ABI_FRAME 0
59# define BSAES_ASM_EXTENDED_KEY 59# define BSAES_ASM_EXTENDED_KEY
60# define XTS_CHAIN_TWEAK 60# define XTS_CHAIN_TWEAK
61# define __ARM_ARCH__ 7 61# define __ARM_ARCH__ __LINUX_ARM_ARCH__
62# define __ARM_MAX_ARCH__ 7
62#endif 63#endif
63 64
64#ifdef __thumb__ 65#ifdef __thumb__
65# define adrl adr 66# define adrl adr
66#endif 67#endif
67 68
68#if __ARM_ARCH__>=7 69#if __ARM_MAX_ARCH__>=7
70.arch armv7-a
71.fpu neon
72
69.text 73.text
70.syntax unified @ ARMv7-capable assembler is expected to handle this 74.syntax unified @ ARMv7-capable assembler is expected to handle this
71#ifdef __thumb2__ 75#ifdef __thumb2__
@@ -74,8 +78,6 @@
74.code 32 78.code 32
75#endif 79#endif
76 80
77.fpu neon
78
79.type _bsaes_decrypt8,%function 81.type _bsaes_decrypt8,%function
80.align 4 82.align 4
81_bsaes_decrypt8: 83_bsaes_decrypt8:
@@ -2095,9 +2097,11 @@ bsaes_xts_decrypt:
2095 vld1.8 {q8}, [r0] @ initial tweak 2097 vld1.8 {q8}, [r0] @ initial tweak
2096 adr r2, .Lxts_magic 2098 adr r2, .Lxts_magic
2097 2099
2100#ifndef XTS_CHAIN_TWEAK
2098 tst r9, #0xf @ if not multiple of 16 2101 tst r9, #0xf @ if not multiple of 16
2099 it ne @ Thumb2 thing, sanity check in ARM 2102 it ne @ Thumb2 thing, sanity check in ARM
2100 subne r9, #0x10 @ subtract another 16 bytes 2103 subne r9, #0x10 @ subtract another 16 bytes
2104#endif
2101 subs r9, #0x80 2105 subs r9, #0x80
2102 2106
2103 blo .Lxts_dec_short 2107 blo .Lxts_dec_short
diff --git a/arch/arm/crypto/bsaes-armv7.pl b/arch/arm/crypto/bsaes-armv7.pl
index be068db960ee..a4d3856e7d24 100644
--- a/arch/arm/crypto/bsaes-armv7.pl
+++ b/arch/arm/crypto/bsaes-armv7.pl
@@ -701,14 +701,18 @@ $code.=<<___;
701# define VFP_ABI_FRAME 0 701# define VFP_ABI_FRAME 0
702# define BSAES_ASM_EXTENDED_KEY 702# define BSAES_ASM_EXTENDED_KEY
703# define XTS_CHAIN_TWEAK 703# define XTS_CHAIN_TWEAK
704# define __ARM_ARCH__ 7 704# define __ARM_ARCH__ __LINUX_ARM_ARCH__
705# define __ARM_MAX_ARCH__ 7
705#endif 706#endif
706 707
707#ifdef __thumb__ 708#ifdef __thumb__
708# define adrl adr 709# define adrl adr
709#endif 710#endif
710 711
711#if __ARM_ARCH__>=7 712#if __ARM_MAX_ARCH__>=7
713.arch armv7-a
714.fpu neon
715
712.text 716.text
713.syntax unified @ ARMv7-capable assembler is expected to handle this 717.syntax unified @ ARMv7-capable assembler is expected to handle this
714#ifdef __thumb2__ 718#ifdef __thumb2__
@@ -717,8 +721,6 @@ $code.=<<___;
717.code 32 721.code 32
718#endif 722#endif
719 723
720.fpu neon
721
722.type _bsaes_decrypt8,%function 724.type _bsaes_decrypt8,%function
723.align 4 725.align 4
724_bsaes_decrypt8: 726_bsaes_decrypt8:
@@ -2076,9 +2078,11 @@ bsaes_xts_decrypt:
2076 vld1.8 {@XMM[8]}, [r0] @ initial tweak 2078 vld1.8 {@XMM[8]}, [r0] @ initial tweak
2077 adr $magic, .Lxts_magic 2079 adr $magic, .Lxts_magic
2078 2080
2081#ifndef XTS_CHAIN_TWEAK
2079 tst $len, #0xf @ if not multiple of 16 2082 tst $len, #0xf @ if not multiple of 16
2080 it ne @ Thumb2 thing, sanity check in ARM 2083 it ne @ Thumb2 thing, sanity check in ARM
2081 subne $len, #0x10 @ subtract another 16 bytes 2084 subne $len, #0x10 @ subtract another 16 bytes
2085#endif
2082 subs $len, #0x80 2086 subs $len, #0x80
2083 2087
2084 blo .Lxts_dec_short 2088 blo .Lxts_dec_short
diff --git a/arch/arm/include/asm/kvm_mmu.h b/arch/arm/include/asm/kvm_mmu.h
index 37ca2a4c6f09..4cf48c3aca13 100644
--- a/arch/arm/include/asm/kvm_mmu.h
+++ b/arch/arm/include/asm/kvm_mmu.h
@@ -149,29 +149,28 @@ static inline bool kvm_s2pmd_readonly(pmd_t *pmd)
149 (__boundary - 1 < (end) - 1)? __boundary: (end); \ 149 (__boundary - 1 < (end) - 1)? __boundary: (end); \
150}) 150})
151 151
152#define kvm_pgd_index(addr) pgd_index(addr)
153
152static inline bool kvm_page_empty(void *ptr) 154static inline bool kvm_page_empty(void *ptr)
153{ 155{
154 struct page *ptr_page = virt_to_page(ptr); 156 struct page *ptr_page = virt_to_page(ptr);
155 return page_count(ptr_page) == 1; 157 return page_count(ptr_page) == 1;
156} 158}
157 159
158
159#define kvm_pte_table_empty(kvm, ptep) kvm_page_empty(ptep) 160#define kvm_pte_table_empty(kvm, ptep) kvm_page_empty(ptep)
160#define kvm_pmd_table_empty(kvm, pmdp) kvm_page_empty(pmdp) 161#define kvm_pmd_table_empty(kvm, pmdp) kvm_page_empty(pmdp)
161#define kvm_pud_table_empty(kvm, pudp) (0) 162#define kvm_pud_table_empty(kvm, pudp) (0)
162 163
163#define KVM_PREALLOC_LEVEL 0 164#define KVM_PREALLOC_LEVEL 0
164 165
165static inline int kvm_prealloc_hwpgd(struct kvm *kvm, pgd_t *pgd) 166static inline void *kvm_get_hwpgd(struct kvm *kvm)
166{ 167{
167 return 0; 168 return kvm->arch.pgd;
168} 169}
169 170
170static inline void kvm_free_hwpgd(struct kvm *kvm) { } 171static inline unsigned int kvm_get_hwpgd_size(void)
171
172static inline void *kvm_get_hwpgd(struct kvm *kvm)
173{ 172{
174 return kvm->arch.pgd; 173 return PTRS_PER_S2_PGD * sizeof(pgd_t);
175} 174}
176 175
177struct kvm; 176struct kvm;
@@ -207,7 +206,7 @@ static inline void __coherent_cache_guest_page(struct kvm_vcpu *vcpu, pfn_t pfn,
207 206
208 bool need_flush = !vcpu_has_cache_enabled(vcpu) || ipa_uncached; 207 bool need_flush = !vcpu_has_cache_enabled(vcpu) || ipa_uncached;
209 208
210 VM_BUG_ON(size & PAGE_MASK); 209 VM_BUG_ON(size & ~PAGE_MASK);
211 210
212 if (!need_flush && !icache_is_pipt()) 211 if (!need_flush && !icache_is_pipt())
213 goto vipt_cache; 212 goto vipt_cache;
diff --git a/arch/arm/include/debug/at91.S b/arch/arm/include/debug/at91.S
index 80a6501b4d50..c3c45e628e33 100644
--- a/arch/arm/include/debug/at91.S
+++ b/arch/arm/include/debug/at91.S
@@ -18,8 +18,11 @@
18#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */ 18#define AT91_DBGU 0xfc00c000 /* SAMA5D4_BASE_USART3 */
19#endif 19#endif
20 20
21/* Keep in sync with mach-at91/include/mach/hardware.h */ 21#ifdef CONFIG_MMU
22#define AT91_IO_P2V(x) ((x) - 0x01000000) 22#define AT91_IO_P2V(x) ((x) - 0x01000000)
23#else
24#define AT91_IO_P2V(x) (x)
25#endif
23 26
24#define AT91_DBGU_SR (0x14) /* Status Register */ 27#define AT91_DBGU_SR (0x14) /* Status Register */
25#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */ 28#define AT91_DBGU_THR (0x1c) /* Transmitter Holding Register */
diff --git a/arch/arm/kernel/perf_event_cpu.c b/arch/arm/kernel/perf_event_cpu.c
index dd9acc95ebc0..61b53c46edfa 100644
--- a/arch/arm/kernel/perf_event_cpu.c
+++ b/arch/arm/kernel/perf_event_cpu.c
@@ -231,7 +231,7 @@ static void cpu_pmu_destroy(struct arm_pmu *cpu_pmu)
231/* 231/*
232 * PMU platform driver and devicetree bindings. 232 * PMU platform driver and devicetree bindings.
233 */ 233 */
234static struct of_device_id cpu_pmu_of_device_ids[] = { 234static const struct of_device_id cpu_pmu_of_device_ids[] = {
235 {.compatible = "arm,cortex-a17-pmu", .data = armv7_a17_pmu_init}, 235 {.compatible = "arm,cortex-a17-pmu", .data = armv7_a17_pmu_init},
236 {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init}, 236 {.compatible = "arm,cortex-a15-pmu", .data = armv7_a15_pmu_init},
237 {.compatible = "arm,cortex-a12-pmu", .data = armv7_a12_pmu_init}, 237 {.compatible = "arm,cortex-a12-pmu", .data = armv7_a12_pmu_init},
diff --git a/arch/arm/kernel/setup.c b/arch/arm/kernel/setup.c
index e55408e96559..1d60bebea4b8 100644
--- a/arch/arm/kernel/setup.c
+++ b/arch/arm/kernel/setup.c
@@ -246,12 +246,9 @@ static int __get_cpu_architecture(void)
246 if (cpu_arch) 246 if (cpu_arch)
247 cpu_arch += CPU_ARCH_ARMv3; 247 cpu_arch += CPU_ARCH_ARMv3;
248 } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) { 248 } else if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
249 unsigned int mmfr0;
250
251 /* Revised CPUID format. Read the Memory Model Feature 249 /* Revised CPUID format. Read the Memory Model Feature
252 * Register 0 and check for VMSAv7 or PMSAv7 */ 250 * Register 0 and check for VMSAv7 or PMSAv7 */
253 asm("mrc p15, 0, %0, c0, c1, 4" 251 unsigned int mmfr0 = read_cpuid_ext(CPUID_EXT_MMFR0);
254 : "=r" (mmfr0));
255 if ((mmfr0 & 0x0000000f) >= 0x00000003 || 252 if ((mmfr0 & 0x0000000f) >= 0x00000003 ||
256 (mmfr0 & 0x000000f0) >= 0x00000030) 253 (mmfr0 & 0x000000f0) >= 0x00000030)
257 cpu_arch = CPU_ARCH_ARMv7; 254 cpu_arch = CPU_ARCH_ARMv7;
diff --git a/arch/arm/kvm/arm.c b/arch/arm/kvm/arm.c
index 07e7eb1d7ab6..5560f74f9eee 100644
--- a/arch/arm/kvm/arm.c
+++ b/arch/arm/kvm/arm.c
@@ -540,7 +540,7 @@ int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *run)
540 540
541 vcpu->mode = OUTSIDE_GUEST_MODE; 541 vcpu->mode = OUTSIDE_GUEST_MODE;
542 kvm_guest_exit(); 542 kvm_guest_exit();
543 trace_kvm_exit(*vcpu_pc(vcpu)); 543 trace_kvm_exit(kvm_vcpu_trap_get_class(vcpu), *vcpu_pc(vcpu));
544 /* 544 /*
545 * We may have taken a host interrupt in HYP mode (ie 545 * We may have taken a host interrupt in HYP mode (ie
546 * while executing the guest). This interrupt is still 546 * while executing the guest). This interrupt is still
diff --git a/arch/arm/kvm/mmu.c b/arch/arm/kvm/mmu.c
index 3e6859bc3e11..5656d79c5a44 100644
--- a/arch/arm/kvm/mmu.c
+++ b/arch/arm/kvm/mmu.c
@@ -290,7 +290,7 @@ static void unmap_range(struct kvm *kvm, pgd_t *pgdp,
290 phys_addr_t addr = start, end = start + size; 290 phys_addr_t addr = start, end = start + size;
291 phys_addr_t next; 291 phys_addr_t next;
292 292
293 pgd = pgdp + pgd_index(addr); 293 pgd = pgdp + kvm_pgd_index(addr);
294 do { 294 do {
295 next = kvm_pgd_addr_end(addr, end); 295 next = kvm_pgd_addr_end(addr, end);
296 if (!pgd_none(*pgd)) 296 if (!pgd_none(*pgd))
@@ -355,7 +355,7 @@ static void stage2_flush_memslot(struct kvm *kvm,
355 phys_addr_t next; 355 phys_addr_t next;
356 pgd_t *pgd; 356 pgd_t *pgd;
357 357
358 pgd = kvm->arch.pgd + pgd_index(addr); 358 pgd = kvm->arch.pgd + kvm_pgd_index(addr);
359 do { 359 do {
360 next = kvm_pgd_addr_end(addr, end); 360 next = kvm_pgd_addr_end(addr, end);
361 stage2_flush_puds(kvm, pgd, addr, next); 361 stage2_flush_puds(kvm, pgd, addr, next);
@@ -632,6 +632,20 @@ int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
632 __phys_to_pfn(phys_addr), PAGE_HYP_DEVICE); 632 __phys_to_pfn(phys_addr), PAGE_HYP_DEVICE);
633} 633}
634 634
635/* Free the HW pgd, one page at a time */
636static void kvm_free_hwpgd(void *hwpgd)
637{
638 free_pages_exact(hwpgd, kvm_get_hwpgd_size());
639}
640
641/* Allocate the HW PGD, making sure that each page gets its own refcount */
642static void *kvm_alloc_hwpgd(void)
643{
644 unsigned int size = kvm_get_hwpgd_size();
645
646 return alloc_pages_exact(size, GFP_KERNEL | __GFP_ZERO);
647}
648
635/** 649/**
636 * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation. 650 * kvm_alloc_stage2_pgd - allocate level-1 table for stage-2 translation.
637 * @kvm: The KVM struct pointer for the VM. 651 * @kvm: The KVM struct pointer for the VM.
@@ -645,15 +659,31 @@ int create_hyp_io_mappings(void *from, void *to, phys_addr_t phys_addr)
645 */ 659 */
646int kvm_alloc_stage2_pgd(struct kvm *kvm) 660int kvm_alloc_stage2_pgd(struct kvm *kvm)
647{ 661{
648 int ret;
649 pgd_t *pgd; 662 pgd_t *pgd;
663 void *hwpgd;
650 664
651 if (kvm->arch.pgd != NULL) { 665 if (kvm->arch.pgd != NULL) {
652 kvm_err("kvm_arch already initialized?\n"); 666 kvm_err("kvm_arch already initialized?\n");
653 return -EINVAL; 667 return -EINVAL;
654 } 668 }
655 669
670 hwpgd = kvm_alloc_hwpgd();
671 if (!hwpgd)
672 return -ENOMEM;
673
674 /* When the kernel uses more levels of page tables than the
675 * guest, we allocate a fake PGD and pre-populate it to point
676 * to the next-level page table, which will be the real
677 * initial page table pointed to by the VTTBR.
678 *
679 * When KVM_PREALLOC_LEVEL==2, we allocate a single page for
680 * the PMD and the kernel will use folded pud.
681 * When KVM_PREALLOC_LEVEL==1, we allocate 2 consecutive PUD
682 * pages.
683 */
656 if (KVM_PREALLOC_LEVEL > 0) { 684 if (KVM_PREALLOC_LEVEL > 0) {
685 int i;
686
657 /* 687 /*
658 * Allocate fake pgd for the page table manipulation macros to 688 * Allocate fake pgd for the page table manipulation macros to
659 * work. This is not used by the hardware and we have no 689 * work. This is not used by the hardware and we have no
@@ -661,30 +691,32 @@ int kvm_alloc_stage2_pgd(struct kvm *kvm)
661 */ 691 */
662 pgd = (pgd_t *)kmalloc(PTRS_PER_S2_PGD * sizeof(pgd_t), 692 pgd = (pgd_t *)kmalloc(PTRS_PER_S2_PGD * sizeof(pgd_t),
663 GFP_KERNEL | __GFP_ZERO); 693 GFP_KERNEL | __GFP_ZERO);
694
695 if (!pgd) {
696 kvm_free_hwpgd(hwpgd);
697 return -ENOMEM;
698 }
699
700 /* Plug the HW PGD into the fake one. */
701 for (i = 0; i < PTRS_PER_S2_PGD; i++) {
702 if (KVM_PREALLOC_LEVEL == 1)
703 pgd_populate(NULL, pgd + i,
704 (pud_t *)hwpgd + i * PTRS_PER_PUD);
705 else if (KVM_PREALLOC_LEVEL == 2)
706 pud_populate(NULL, pud_offset(pgd, 0) + i,
707 (pmd_t *)hwpgd + i * PTRS_PER_PMD);
708 }
664 } else { 709 } else {
665 /* 710 /*
666 * Allocate actual first-level Stage-2 page table used by the 711 * Allocate actual first-level Stage-2 page table used by the
667 * hardware for Stage-2 page table walks. 712 * hardware for Stage-2 page table walks.
668 */ 713 */
669 pgd = (pgd_t *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, S2_PGD_ORDER); 714 pgd = (pgd_t *)hwpgd;
670 } 715 }
671 716
672 if (!pgd)
673 return -ENOMEM;
674
675 ret = kvm_prealloc_hwpgd(kvm, pgd);
676 if (ret)
677 goto out_err;
678
679 kvm_clean_pgd(pgd); 717 kvm_clean_pgd(pgd);
680 kvm->arch.pgd = pgd; 718 kvm->arch.pgd = pgd;
681 return 0; 719 return 0;
682out_err:
683 if (KVM_PREALLOC_LEVEL > 0)
684 kfree(pgd);
685 else
686 free_pages((unsigned long)pgd, S2_PGD_ORDER);
687 return ret;
688} 720}
689 721
690/** 722/**
@@ -785,11 +817,10 @@ void kvm_free_stage2_pgd(struct kvm *kvm)
785 return; 817 return;
786 818
787 unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE); 819 unmap_stage2_range(kvm, 0, KVM_PHYS_SIZE);
788 kvm_free_hwpgd(kvm); 820 kvm_free_hwpgd(kvm_get_hwpgd(kvm));
789 if (KVM_PREALLOC_LEVEL > 0) 821 if (KVM_PREALLOC_LEVEL > 0)
790 kfree(kvm->arch.pgd); 822 kfree(kvm->arch.pgd);
791 else 823
792 free_pages((unsigned long)kvm->arch.pgd, S2_PGD_ORDER);
793 kvm->arch.pgd = NULL; 824 kvm->arch.pgd = NULL;
794} 825}
795 826
@@ -799,7 +830,7 @@ static pud_t *stage2_get_pud(struct kvm *kvm, struct kvm_mmu_memory_cache *cache
799 pgd_t *pgd; 830 pgd_t *pgd;
800 pud_t *pud; 831 pud_t *pud;
801 832
802 pgd = kvm->arch.pgd + pgd_index(addr); 833 pgd = kvm->arch.pgd + kvm_pgd_index(addr);
803 if (WARN_ON(pgd_none(*pgd))) { 834 if (WARN_ON(pgd_none(*pgd))) {
804 if (!cache) 835 if (!cache)
805 return NULL; 836 return NULL;
@@ -1089,7 +1120,7 @@ static void stage2_wp_range(struct kvm *kvm, phys_addr_t addr, phys_addr_t end)
1089 pgd_t *pgd; 1120 pgd_t *pgd;
1090 phys_addr_t next; 1121 phys_addr_t next;
1091 1122
1092 pgd = kvm->arch.pgd + pgd_index(addr); 1123 pgd = kvm->arch.pgd + kvm_pgd_index(addr);
1093 do { 1124 do {
1094 /* 1125 /*
1095 * Release kvm_mmu_lock periodically if the memory region is 1126 * Release kvm_mmu_lock periodically if the memory region is
diff --git a/arch/arm/kvm/trace.h b/arch/arm/kvm/trace.h
index 881874b1a036..6817664b46b8 100644
--- a/arch/arm/kvm/trace.h
+++ b/arch/arm/kvm/trace.h
@@ -25,18 +25,22 @@ TRACE_EVENT(kvm_entry,
25); 25);
26 26
27TRACE_EVENT(kvm_exit, 27TRACE_EVENT(kvm_exit,
28 TP_PROTO(unsigned long vcpu_pc), 28 TP_PROTO(unsigned int exit_reason, unsigned long vcpu_pc),
29 TP_ARGS(vcpu_pc), 29 TP_ARGS(exit_reason, vcpu_pc),
30 30
31 TP_STRUCT__entry( 31 TP_STRUCT__entry(
32 __field( unsigned int, exit_reason )
32 __field( unsigned long, vcpu_pc ) 33 __field( unsigned long, vcpu_pc )
33 ), 34 ),
34 35
35 TP_fast_assign( 36 TP_fast_assign(
37 __entry->exit_reason = exit_reason;
36 __entry->vcpu_pc = vcpu_pc; 38 __entry->vcpu_pc = vcpu_pc;
37 ), 39 ),
38 40
39 TP_printk("PC: 0x%08lx", __entry->vcpu_pc) 41 TP_printk("HSR_EC: 0x%04x, PC: 0x%08lx",
42 __entry->exit_reason,
43 __entry->vcpu_pc)
40); 44);
41 45
42TRACE_EVENT(kvm_guest_fault, 46TRACE_EVENT(kvm_guest_fault,
diff --git a/arch/arm/mach-asm9260/Kconfig b/arch/arm/mach-asm9260/Kconfig
index 8423be76080e..52241207a82a 100644
--- a/arch/arm/mach-asm9260/Kconfig
+++ b/arch/arm/mach-asm9260/Kconfig
@@ -2,5 +2,7 @@ config MACH_ASM9260
2 bool "Alphascale ASM9260" 2 bool "Alphascale ASM9260"
3 depends on ARCH_MULTI_V5 3 depends on ARCH_MULTI_V5
4 select CPU_ARM926T 4 select CPU_ARM926T
5 select ASM9260_TIMER
6 select GENERIC_CLOCKEVENTS
5 help 7 help
6 Support for Alphascale ASM9260 based platform. 8 Support for Alphascale ASM9260 based platform.
diff --git a/arch/arm/mach-at91/Kconfig b/arch/arm/mach-at91/Kconfig
index c6740e359a44..c74a44324e5b 100644
--- a/arch/arm/mach-at91/Kconfig
+++ b/arch/arm/mach-at91/Kconfig
@@ -64,7 +64,6 @@ config SOC_SAMA5D4
64 select SOC_SAMA5 64 select SOC_SAMA5
65 select CLKSRC_MMIO 65 select CLKSRC_MMIO
66 select CACHE_L2X0 66 select CACHE_L2X0
67 select CACHE_PL310
68 select HAVE_FB_ATMEL 67 select HAVE_FB_ATMEL
69 select HAVE_AT91_UTMI 68 select HAVE_AT91_UTMI
70 select HAVE_AT91_SMD 69 select HAVE_AT91_SMD
diff --git a/arch/arm/mach-at91/at91rm9200_time.c b/arch/arm/mach-at91/at91rm9200_time.c
index 51761f8927b7..b00d09555f2b 100644
--- a/arch/arm/mach-at91/at91rm9200_time.c
+++ b/arch/arm/mach-at91/at91rm9200_time.c
@@ -183,7 +183,7 @@ static struct clock_event_device clkevt = {
183void __iomem *at91_st_base; 183void __iomem *at91_st_base;
184EXPORT_SYMBOL_GPL(at91_st_base); 184EXPORT_SYMBOL_GPL(at91_st_base);
185 185
186static struct of_device_id at91rm9200_st_timer_ids[] = { 186static const struct of_device_id at91rm9200_st_timer_ids[] = {
187 { .compatible = "atmel,at91rm9200-st" }, 187 { .compatible = "atmel,at91rm9200-st" },
188 { /* sentinel */ } 188 { /* sentinel */ }
189}; 189};
diff --git a/arch/arm/mach-at91/generic.h b/arch/arm/mach-at91/generic.h
index a6e726a6e0b5..583369ffc284 100644
--- a/arch/arm/mach-at91/generic.h
+++ b/arch/arm/mach-at91/generic.h
@@ -35,10 +35,10 @@ extern void __init at91sam9260_pm_init(void);
35extern void __init at91sam9g45_pm_init(void); 35extern void __init at91sam9g45_pm_init(void);
36extern void __init at91sam9x5_pm_init(void); 36extern void __init at91sam9x5_pm_init(void);
37#else 37#else
38void __init at91rm9200_pm_init(void) { } 38static inline void __init at91rm9200_pm_init(void) { }
39void __init at91sam9260_pm_init(void) { } 39static inline void __init at91sam9260_pm_init(void) { }
40void __init at91sam9g45_pm_init(void) { } 40static inline void __init at91sam9g45_pm_init(void) { }
41void __init at91sam9x5_pm_init(void) { } 41static inline void __init at91sam9x5_pm_init(void) { }
42#endif 42#endif
43 43
44#endif /* _AT91_GENERIC_H */ 44#endif /* _AT91_GENERIC_H */
diff --git a/arch/arm/mach-at91/pm.c b/arch/arm/mach-at91/pm.c
index af8d8afc2e12..aa4116e9452f 100644
--- a/arch/arm/mach-at91/pm.c
+++ b/arch/arm/mach-at91/pm.c
@@ -226,7 +226,7 @@ void at91_pm_set_standby(void (*at91_standby)(void))
226 } 226 }
227} 227}
228 228
229static struct of_device_id ramc_ids[] = { 229static const struct of_device_id ramc_ids[] __initconst = {
230 { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby }, 230 { .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
231 { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby }, 231 { .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
232 { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby }, 232 { .compatible = "atmel,at91sam9g45-ddramc", .data = at91_ddr_standby },
@@ -234,7 +234,7 @@ static struct of_device_id ramc_ids[] = {
234 { /*sentinel*/ } 234 { /*sentinel*/ }
235}; 235};
236 236
237static void at91_dt_ramc(void) 237static __init void at91_dt_ramc(void)
238{ 238{
239 struct device_node *np; 239 struct device_node *np;
240 const struct of_device_id *of_id; 240 const struct of_device_id *of_id;
@@ -270,37 +270,35 @@ static void __init at91_pm_sram_init(void)
270 phys_addr_t sram_pbase; 270 phys_addr_t sram_pbase;
271 unsigned long sram_base; 271 unsigned long sram_base;
272 struct device_node *node; 272 struct device_node *node;
273 struct platform_device *pdev; 273 struct platform_device *pdev = NULL;
274 274
275 node = of_find_compatible_node(NULL, NULL, "mmio-sram"); 275 for_each_compatible_node(node, NULL, "mmio-sram") {
276 if (!node) { 276 pdev = of_find_device_by_node(node);
277 pr_warn("%s: failed to find sram node!\n", __func__); 277 if (pdev) {
278 return; 278 of_node_put(node);
279 break;
280 }
279 } 281 }
280 282
281 pdev = of_find_device_by_node(node);
282 if (!pdev) { 283 if (!pdev) {
283 pr_warn("%s: failed to find sram device!\n", __func__); 284 pr_warn("%s: failed to find sram device!\n", __func__);
284 goto put_node; 285 return;
285 } 286 }
286 287
287 sram_pool = dev_get_gen_pool(&pdev->dev); 288 sram_pool = dev_get_gen_pool(&pdev->dev);
288 if (!sram_pool) { 289 if (!sram_pool) {
289 pr_warn("%s: sram pool unavailable!\n", __func__); 290 pr_warn("%s: sram pool unavailable!\n", __func__);
290 goto put_node; 291 return;
291 } 292 }
292 293
293 sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz); 294 sram_base = gen_pool_alloc(sram_pool, at91_slow_clock_sz);
294 if (!sram_base) { 295 if (!sram_base) {
295 pr_warn("%s: unable to alloc ocram!\n", __func__); 296 pr_warn("%s: unable to alloc ocram!\n", __func__);
296 goto put_node; 297 return;
297 } 298 }
298 299
299 sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base); 300 sram_pbase = gen_pool_virt_to_phys(sram_pool, sram_base);
300 slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false); 301 slow_clock = __arm_ioremap_exec(sram_pbase, at91_slow_clock_sz, false);
301
302put_node:
303 of_node_put(node);
304} 302}
305#endif 303#endif
306 304
diff --git a/arch/arm/mach-at91/pm.h b/arch/arm/mach-at91/pm.h
index d2c89963af2d..86c0aa819d25 100644
--- a/arch/arm/mach-at91/pm.h
+++ b/arch/arm/mach-at91/pm.h
@@ -44,7 +44,7 @@ static inline void at91rm9200_standby(void)
44 " mcr p15, 0, %0, c7, c0, 4\n\t" 44 " mcr p15, 0, %0, c7, c0, 4\n\t"
45 " str %5, [%1, %2]" 45 " str %5, [%1, %2]"
46 : 46 :
47 : "r" (0), "r" (AT91_BASE_SYS), "r" (AT91RM9200_SDRAMC_LPR), 47 : "r" (0), "r" (at91_ramc_base[0]), "r" (AT91RM9200_SDRAMC_LPR),
48 "r" (1), "r" (AT91RM9200_SDRAMC_SRR), 48 "r" (1), "r" (AT91RM9200_SDRAMC_SRR),
49 "r" (lpr)); 49 "r" (lpr));
50} 50}
diff --git a/arch/arm/mach-at91/pm_slowclock.S b/arch/arm/mach-at91/pm_slowclock.S
index 556151e85ec4..931f0e302c03 100644
--- a/arch/arm/mach-at91/pm_slowclock.S
+++ b/arch/arm/mach-at91/pm_slowclock.S
@@ -25,11 +25,6 @@
25 */ 25 */
26#undef SLOWDOWN_MASTER_CLOCK 26#undef SLOWDOWN_MASTER_CLOCK
27 27
28#define MCKRDY_TIMEOUT 1000
29#define MOSCRDY_TIMEOUT 1000
30#define PLLALOCK_TIMEOUT 1000
31#define PLLBLOCK_TIMEOUT 1000
32
33pmc .req r0 28pmc .req r0
34sdramc .req r1 29sdramc .req r1
35ramc1 .req r2 30ramc1 .req r2
@@ -41,60 +36,42 @@ tmp2 .req r5
41 * Wait until master clock is ready (after switching master clock source) 36 * Wait until master clock is ready (after switching master clock source)
42 */ 37 */
43 .macro wait_mckrdy 38 .macro wait_mckrdy
44 mov tmp2, #MCKRDY_TIMEOUT 391: ldr tmp1, [pmc, #AT91_PMC_SR]
451: sub tmp2, tmp2, #1
46 cmp tmp2, #0
47 beq 2f
48 ldr tmp1, [pmc, #AT91_PMC_SR]
49 tst tmp1, #AT91_PMC_MCKRDY 40 tst tmp1, #AT91_PMC_MCKRDY
50 beq 1b 41 beq 1b
512:
52 .endm 42 .endm
53 43
54/* 44/*
55 * Wait until master oscillator has stabilized. 45 * Wait until master oscillator has stabilized.
56 */ 46 */
57 .macro wait_moscrdy 47 .macro wait_moscrdy
58 mov tmp2, #MOSCRDY_TIMEOUT 481: ldr tmp1, [pmc, #AT91_PMC_SR]
591: sub tmp2, tmp2, #1
60 cmp tmp2, #0
61 beq 2f
62 ldr tmp1, [pmc, #AT91_PMC_SR]
63 tst tmp1, #AT91_PMC_MOSCS 49 tst tmp1, #AT91_PMC_MOSCS
64 beq 1b 50 beq 1b
652:
66 .endm 51 .endm
67 52
68/* 53/*
69 * Wait until PLLA has locked. 54 * Wait until PLLA has locked.
70 */ 55 */
71 .macro wait_pllalock 56 .macro wait_pllalock
72 mov tmp2, #PLLALOCK_TIMEOUT 571: ldr tmp1, [pmc, #AT91_PMC_SR]
731: sub tmp2, tmp2, #1
74 cmp tmp2, #0
75 beq 2f
76 ldr tmp1, [pmc, #AT91_PMC_SR]
77 tst tmp1, #AT91_PMC_LOCKA 58 tst tmp1, #AT91_PMC_LOCKA
78 beq 1b 59 beq 1b
792:
80 .endm 60 .endm
81 61
82/* 62/*
83 * Wait until PLLB has locked. 63 * Wait until PLLB has locked.
84 */ 64 */
85 .macro wait_pllblock 65 .macro wait_pllblock
86 mov tmp2, #PLLBLOCK_TIMEOUT 661: ldr tmp1, [pmc, #AT91_PMC_SR]
871: sub tmp2, tmp2, #1
88 cmp tmp2, #0
89 beq 2f
90 ldr tmp1, [pmc, #AT91_PMC_SR]
91 tst tmp1, #AT91_PMC_LOCKB 67 tst tmp1, #AT91_PMC_LOCKB
92 beq 1b 68 beq 1b
932:
94 .endm 69 .endm
95 70
96 .text 71 .text
97 72
73 .arm
74
98/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc, 75/* void at91_slow_clock(void __iomem *pmc, void __iomem *sdramc,
99 * void __iomem *ramc1, int memctrl) 76 * void __iomem *ramc1, int memctrl)
100 */ 77 */
@@ -134,6 +111,16 @@ ddr_sr_enable:
134 cmp memctrl, #AT91_MEMCTRL_DDRSDR 111 cmp memctrl, #AT91_MEMCTRL_DDRSDR
135 bne sdr_sr_enable 112 bne sdr_sr_enable
136 113
114 /* LPDDR1 --> force DDR2 mode during self-refresh */
115 ldr tmp1, [sdramc, #AT91_DDRSDRC_MDR]
116 str tmp1, .saved_sam9_mdr
117 bic tmp1, tmp1, #~AT91_DDRSDRC_MD
118 cmp tmp1, #AT91_DDRSDRC_MD_LOW_POWER_DDR
119 ldreq tmp1, [sdramc, #AT91_DDRSDRC_MDR]
120 biceq tmp1, tmp1, #AT91_DDRSDRC_MD
121 orreq tmp1, tmp1, #AT91_DDRSDRC_MD_DDR2
122 streq tmp1, [sdramc, #AT91_DDRSDRC_MDR]
123
137 /* prepare for DDRAM self-refresh mode */ 124 /* prepare for DDRAM self-refresh mode */
138 ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR] 125 ldr tmp1, [sdramc, #AT91_DDRSDRC_LPR]
139 str tmp1, .saved_sam9_lpr 126 str tmp1, .saved_sam9_lpr
@@ -142,14 +129,26 @@ ddr_sr_enable:
142 129
143 /* figure out if we use the second ram controller */ 130 /* figure out if we use the second ram controller */
144 cmp ramc1, #0 131 cmp ramc1, #0
145 ldrne tmp2, [ramc1, #AT91_DDRSDRC_LPR] 132 beq ddr_no_2nd_ctrl
146 strne tmp2, .saved_sam9_lpr1 133
147 bicne tmp2, #AT91_DDRSDRC_LPCB 134 ldr tmp2, [ramc1, #AT91_DDRSDRC_MDR]
148 orrne tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH 135 str tmp2, .saved_sam9_mdr1
136 bic tmp2, tmp2, #~AT91_DDRSDRC_MD
137 cmp tmp2, #AT91_DDRSDRC_MD_LOW_POWER_DDR
138 ldreq tmp2, [ramc1, #AT91_DDRSDRC_MDR]
139 biceq tmp2, tmp2, #AT91_DDRSDRC_MD
140 orreq tmp2, tmp2, #AT91_DDRSDRC_MD_DDR2
141 streq tmp2, [ramc1, #AT91_DDRSDRC_MDR]
142
143 ldr tmp2, [ramc1, #AT91_DDRSDRC_LPR]
144 str tmp2, .saved_sam9_lpr1
145 bic tmp2, #AT91_DDRSDRC_LPCB
146 orr tmp2, #AT91_DDRSDRC_LPCB_SELF_REFRESH
149 147
150 /* Enable DDRAM self-refresh mode */ 148 /* Enable DDRAM self-refresh mode */
149 str tmp2, [ramc1, #AT91_DDRSDRC_LPR]
150ddr_no_2nd_ctrl:
151 str tmp1, [sdramc, #AT91_DDRSDRC_LPR] 151 str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
152 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
153 152
154 b sdr_sr_done 153 b sdr_sr_done
155 154
@@ -208,6 +207,7 @@ sdr_sr_done:
208 /* Turn off the main oscillator */ 207 /* Turn off the main oscillator */
209 ldr tmp1, [pmc, #AT91_CKGR_MOR] 208 ldr tmp1, [pmc, #AT91_CKGR_MOR]
210 bic tmp1, tmp1, #AT91_PMC_MOSCEN 209 bic tmp1, tmp1, #AT91_PMC_MOSCEN
210 orr tmp1, tmp1, #AT91_PMC_KEY
211 str tmp1, [pmc, #AT91_CKGR_MOR] 211 str tmp1, [pmc, #AT91_CKGR_MOR]
212 212
213 /* Wait for interrupt */ 213 /* Wait for interrupt */
@@ -216,6 +216,7 @@ sdr_sr_done:
216 /* Turn on the main oscillator */ 216 /* Turn on the main oscillator */
217 ldr tmp1, [pmc, #AT91_CKGR_MOR] 217 ldr tmp1, [pmc, #AT91_CKGR_MOR]
218 orr tmp1, tmp1, #AT91_PMC_MOSCEN 218 orr tmp1, tmp1, #AT91_PMC_MOSCEN
219 orr tmp1, tmp1, #AT91_PMC_KEY
219 str tmp1, [pmc, #AT91_CKGR_MOR] 220 str tmp1, [pmc, #AT91_CKGR_MOR]
220 221
221 wait_moscrdy 222 wait_moscrdy
@@ -280,12 +281,17 @@ sdr_sr_done:
280 */ 281 */
281 cmp memctrl, #AT91_MEMCTRL_DDRSDR 282 cmp memctrl, #AT91_MEMCTRL_DDRSDR
282 bne sdr_en_restore 283 bne sdr_en_restore
284 /* Restore MDR in case of LPDDR1 */
285 ldr tmp1, .saved_sam9_mdr
286 str tmp1, [sdramc, #AT91_DDRSDRC_MDR]
283 /* Restore LPR on AT91 with DDRAM */ 287 /* Restore LPR on AT91 with DDRAM */
284 ldr tmp1, .saved_sam9_lpr 288 ldr tmp1, .saved_sam9_lpr
285 str tmp1, [sdramc, #AT91_DDRSDRC_LPR] 289 str tmp1, [sdramc, #AT91_DDRSDRC_LPR]
286 290
287 /* if we use the second ram controller */ 291 /* if we use the second ram controller */
288 cmp ramc1, #0 292 cmp ramc1, #0
293 ldrne tmp2, .saved_sam9_mdr1
294 strne tmp2, [ramc1, #AT91_DDRSDRC_MDR]
289 ldrne tmp2, .saved_sam9_lpr1 295 ldrne tmp2, .saved_sam9_lpr1
290 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR] 296 strne tmp2, [ramc1, #AT91_DDRSDRC_LPR]
291 297
@@ -319,5 +325,11 @@ ram_restored:
319.saved_sam9_lpr1: 325.saved_sam9_lpr1:
320 .word 0 326 .word 0
321 327
328.saved_sam9_mdr:
329 .word 0
330
331.saved_sam9_mdr1:
332 .word 0
333
322ENTRY(at91_slow_clock_sz) 334ENTRY(at91_slow_clock_sz)
323 .word .-at91_slow_clock 335 .word .-at91_slow_clock
diff --git a/arch/arm/mach-axxia/axxia.c b/arch/arm/mach-axxia/axxia.c
index 19e5a1d95397..4db76a493c5a 100644
--- a/arch/arm/mach-axxia/axxia.c
+++ b/arch/arm/mach-axxia/axxia.c
@@ -16,7 +16,7 @@
16#include <linux/init.h> 16#include <linux/init.h>
17#include <asm/mach/arch.h> 17#include <asm/mach/arch.h>
18 18
19static const char *axxia_dt_match[] __initconst = { 19static const char *const axxia_dt_match[] __initconst = {
20 "lsi,axm5516", 20 "lsi,axm5516",
21 "lsi,axm5516-sim", 21 "lsi,axm5516-sim",
22 "lsi,axm5516-emu", 22 "lsi,axm5516-emu",
diff --git a/arch/arm/mach-bcm/Kconfig b/arch/arm/mach-bcm/Kconfig
index aaeec78c3ec4..8b11f44bb36e 100644
--- a/arch/arm/mach-bcm/Kconfig
+++ b/arch/arm/mach-bcm/Kconfig
@@ -68,7 +68,7 @@ config ARCH_BCM_MOBILE
68 This enables support for systems based on Broadcom mobile SoCs. 68 This enables support for systems based on Broadcom mobile SoCs.
69 69
70config ARCH_BCM_281XX 70config ARCH_BCM_281XX
71 bool "Broadcom BCM281XX SoC family" 71 bool "Broadcom BCM281XX SoC family" if ARCH_MULTI_V7
72 select ARCH_BCM_MOBILE 72 select ARCH_BCM_MOBILE
73 select HAVE_SMP 73 select HAVE_SMP
74 help 74 help
@@ -77,7 +77,7 @@ config ARCH_BCM_281XX
77 variants. 77 variants.
78 78
79config ARCH_BCM_21664 79config ARCH_BCM_21664
80 bool "Broadcom BCM21664 SoC family" 80 bool "Broadcom BCM21664 SoC family" if ARCH_MULTI_V7
81 select ARCH_BCM_MOBILE 81 select ARCH_BCM_MOBILE
82 select HAVE_SMP 82 select HAVE_SMP
83 help 83 help
diff --git a/arch/arm/mach-bcm/brcmstb.c b/arch/arm/mach-bcm/brcmstb.c
index 60a5afa06ed7..3a60f7ee3f0c 100644
--- a/arch/arm/mach-bcm/brcmstb.c
+++ b/arch/arm/mach-bcm/brcmstb.c
@@ -17,7 +17,7 @@
17#include <asm/mach-types.h> 17#include <asm/mach-types.h>
18#include <asm/mach/arch.h> 18#include <asm/mach/arch.h>
19 19
20static const char *brcmstb_match[] __initconst = { 20static const char *const brcmstb_match[] __initconst = {
21 "brcm,bcm7445", 21 "brcm,bcm7445",
22 "brcm,brcmstb", 22 "brcm,brcmstb",
23 NULL 23 NULL
diff --git a/arch/arm/mach-davinci/Kconfig b/arch/arm/mach-davinci/Kconfig
index 584e8d4e2892..cd30f6f5f2ff 100644
--- a/arch/arm/mach-davinci/Kconfig
+++ b/arch/arm/mach-davinci/Kconfig
@@ -32,12 +32,14 @@ config ARCH_DAVINCI_DM646x
32 32
33config ARCH_DAVINCI_DA830 33config ARCH_DAVINCI_DA830
34 bool "DA830/OMAP-L137/AM17x based system" 34 bool "DA830/OMAP-L137/AM17x based system"
35 depends on !ARCH_DAVINCI_DMx || AUTO_ZRELADDR
35 select ARCH_DAVINCI_DA8XX 36 select ARCH_DAVINCI_DA8XX
36 select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1 37 select CPU_DCACHE_WRITETHROUGH # needed on silicon revs 1.0, 1.1
37 select CP_INTC 38 select CP_INTC
38 39
39config ARCH_DAVINCI_DA850 40config ARCH_DAVINCI_DA850
40 bool "DA850/OMAP-L138/AM18x based system" 41 bool "DA850/OMAP-L138/AM18x based system"
42 depends on !ARCH_DAVINCI_DMx || AUTO_ZRELADDR
41 select ARCH_DAVINCI_DA8XX 43 select ARCH_DAVINCI_DA8XX
42 select CP_INTC 44 select CP_INTC
43 45
diff --git a/arch/arm/mach-davinci/da8xx-dt.c b/arch/arm/mach-davinci/da8xx-dt.c
index f703d82f08a8..438f68547f4c 100644
--- a/arch/arm/mach-davinci/da8xx-dt.c
+++ b/arch/arm/mach-davinci/da8xx-dt.c
@@ -20,7 +20,7 @@
20 20
21#define DA8XX_NUM_UARTS 3 21#define DA8XX_NUM_UARTS 3
22 22
23static struct of_device_id da8xx_irq_match[] __initdata = { 23static const struct of_device_id da8xx_irq_match[] __initconst = {
24 { .compatible = "ti,cp-intc", .data = cp_intc_of_init, }, 24 { .compatible = "ti,cp-intc", .data = cp_intc_of_init, },
25 { } 25 { }
26}; 26};
diff --git a/arch/arm/mach-davinci/mux.c b/arch/arm/mach-davinci/mux.c
index a8eb909a2b6c..6a2ff0a654a5 100644
--- a/arch/arm/mach-davinci/mux.c
+++ b/arch/arm/mach-davinci/mux.c
@@ -30,7 +30,7 @@ static void __iomem *pinmux_base;
30/* 30/*
31 * Sets the DAVINCI MUX register based on the table 31 * Sets the DAVINCI MUX register based on the table
32 */ 32 */
33int __init_or_module davinci_cfg_reg(const unsigned long index) 33int davinci_cfg_reg(const unsigned long index)
34{ 34{
35 static DEFINE_SPINLOCK(mux_spin_lock); 35 static DEFINE_SPINLOCK(mux_spin_lock);
36 struct davinci_soc_info *soc_info = &davinci_soc_info; 36 struct davinci_soc_info *soc_info = &davinci_soc_info;
@@ -101,7 +101,7 @@ int __init_or_module davinci_cfg_reg(const unsigned long index)
101} 101}
102EXPORT_SYMBOL(davinci_cfg_reg); 102EXPORT_SYMBOL(davinci_cfg_reg);
103 103
104int __init_or_module davinci_cfg_reg_list(const short pins[]) 104int davinci_cfg_reg_list(const short pins[])
105{ 105{
106 int i, error = -EINVAL; 106 int i, error = -EINVAL;
107 107
diff --git a/arch/arm/mach-exynos/exynos.c b/arch/arm/mach-exynos/exynos.c
index 2013f73797ed..9e9dfdfad9d7 100644
--- a/arch/arm/mach-exynos/exynos.c
+++ b/arch/arm/mach-exynos/exynos.c
@@ -227,7 +227,7 @@ static void __init exynos_dt_machine_init(void)
227 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); 227 of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
228} 228}
229 229
230static char const *exynos_dt_compat[] __initconst = { 230static char const *const exynos_dt_compat[] __initconst = {
231 "samsung,exynos3", 231 "samsung,exynos3",
232 "samsung,exynos3250", 232 "samsung,exynos3250",
233 "samsung,exynos4", 233 "samsung,exynos4",
diff --git a/arch/arm/mach-exynos/platsmp.c b/arch/arm/mach-exynos/platsmp.c
index 3f32c47a6d74..d2e9f12d12f1 100644
--- a/arch/arm/mach-exynos/platsmp.c
+++ b/arch/arm/mach-exynos/platsmp.c
@@ -126,8 +126,7 @@ static inline void platform_do_lowpower(unsigned int cpu, int *spurious)
126 */ 126 */
127void exynos_cpu_power_down(int cpu) 127void exynos_cpu_power_down(int cpu)
128{ 128{
129 if (cpu == 0 && (of_machine_is_compatible("samsung,exynos5420") || 129 if (cpu == 0 && (soc_is_exynos5420() || soc_is_exynos5800())) {
130 of_machine_is_compatible("samsung,exynos5800"))) {
131 /* 130 /*
132 * Bypass power down for CPU0 during suspend. Check for 131 * Bypass power down for CPU0 during suspend. Check for
133 * the SYS_PWR_REG value to decide if we are suspending 132 * the SYS_PWR_REG value to decide if we are suspending
diff --git a/arch/arm/mach-exynos/pm_domains.c b/arch/arm/mach-exynos/pm_domains.c
index 20f267121b3e..37266a826437 100644
--- a/arch/arm/mach-exynos/pm_domains.c
+++ b/arch/arm/mach-exynos/pm_domains.c
@@ -161,6 +161,34 @@ no_clk:
161 of_genpd_add_provider_simple(np, &pd->pd); 161 of_genpd_add_provider_simple(np, &pd->pd);
162 } 162 }
163 163
164 /* Assign the child power domains to their parents */
165 for_each_compatible_node(np, NULL, "samsung,exynos4210-pd") {
166 struct generic_pm_domain *child_domain, *parent_domain;
167 struct of_phandle_args args;
168
169 args.np = np;
170 args.args_count = 0;
171 child_domain = of_genpd_get_from_provider(&args);
172 if (!child_domain)
173 continue;
174
175 if (of_parse_phandle_with_args(np, "power-domains",
176 "#power-domain-cells", 0, &args) != 0)
177 continue;
178
179 parent_domain = of_genpd_get_from_provider(&args);
180 if (!parent_domain)
181 continue;
182
183 if (pm_genpd_add_subdomain(parent_domain, child_domain))
184 pr_warn("%s failed to add subdomain: %s\n",
185 parent_domain->name, child_domain->name);
186 else
187 pr_info("%s has as child subdomain: %s.\n",
188 parent_domain->name, child_domain->name);
189 of_node_put(np);
190 }
191
164 return 0; 192 return 0;
165} 193}
166arch_initcall(exynos4_pm_init_power_domain); 194arch_initcall(exynos4_pm_init_power_domain);
diff --git a/arch/arm/mach-exynos/suspend.c b/arch/arm/mach-exynos/suspend.c
index 666ec3e5b03f..318d127df147 100644
--- a/arch/arm/mach-exynos/suspend.c
+++ b/arch/arm/mach-exynos/suspend.c
@@ -87,8 +87,8 @@ static unsigned int exynos_pmu_spare3;
87static u32 exynos_irqwake_intmask = 0xffffffff; 87static u32 exynos_irqwake_intmask = 0xffffffff;
88 88
89static const struct exynos_wkup_irq exynos3250_wkup_irq[] = { 89static const struct exynos_wkup_irq exynos3250_wkup_irq[] = {
90 { 73, BIT(1) }, /* RTC alarm */ 90 { 105, BIT(1) }, /* RTC alarm */
91 { 74, BIT(2) }, /* RTC tick */ 91 { 106, BIT(2) }, /* RTC tick */
92 { /* sentinel */ }, 92 { /* sentinel */ },
93}; 93};
94 94
@@ -587,7 +587,7 @@ static struct exynos_pm_data exynos5420_pm_data = {
587 .cpu_suspend = exynos5420_cpu_suspend, 587 .cpu_suspend = exynos5420_cpu_suspend,
588}; 588};
589 589
590static struct of_device_id exynos_pmu_of_device_ids[] = { 590static const struct of_device_id exynos_pmu_of_device_ids[] __initconst = {
591 { 591 {
592 .compatible = "samsung,exynos3250-pmu", 592 .compatible = "samsung,exynos3250-pmu",
593 .data = &exynos3250_pm_data, 593 .data = &exynos3250_pm_data,
diff --git a/arch/arm/mach-highbank/highbank.c b/arch/arm/mach-highbank/highbank.c
index 07a09570175d..231fba0d03e5 100644
--- a/arch/arm/mach-highbank/highbank.c
+++ b/arch/arm/mach-highbank/highbank.c
@@ -169,7 +169,7 @@ static void __init highbank_init(void)
169 platform_device_register(&highbank_cpuidle_device); 169 platform_device_register(&highbank_cpuidle_device);
170} 170}
171 171
172static const char *highbank_match[] __initconst = { 172static const char *const highbank_match[] __initconst = {
173 "calxeda,highbank", 173 "calxeda,highbank",
174 "calxeda,ecx-2000", 174 "calxeda,ecx-2000",
175 NULL, 175 NULL,
diff --git a/arch/arm/mach-hisi/hisilicon.c b/arch/arm/mach-hisi/hisilicon.c
index 76b907078b58..c6bd7c7bd4aa 100644
--- a/arch/arm/mach-hisi/hisilicon.c
+++ b/arch/arm/mach-hisi/hisilicon.c
@@ -45,7 +45,7 @@ static void __init hi3620_map_io(void)
45 iotable_init(hi3620_io_desc, ARRAY_SIZE(hi3620_io_desc)); 45 iotable_init(hi3620_io_desc, ARRAY_SIZE(hi3620_io_desc));
46} 46}
47 47
48static const char *hi3xxx_compat[] __initconst = { 48static const char *const hi3xxx_compat[] __initconst = {
49 "hisilicon,hi3620-hi4511", 49 "hisilicon,hi3620-hi4511",
50 NULL, 50 NULL,
51}; 51};
@@ -55,7 +55,7 @@ DT_MACHINE_START(HI3620, "Hisilicon Hi3620 (Flattened Device Tree)")
55 .dt_compat = hi3xxx_compat, 55 .dt_compat = hi3xxx_compat,
56MACHINE_END 56MACHINE_END
57 57
58static const char *hix5hd2_compat[] __initconst = { 58static const char *const hix5hd2_compat[] __initconst = {
59 "hisilicon,hix5hd2", 59 "hisilicon,hix5hd2",
60 NULL, 60 NULL,
61}; 61};
@@ -64,7 +64,7 @@ DT_MACHINE_START(HIX5HD2_DT, "Hisilicon HIX5HD2 (Flattened Device Tree)")
64 .dt_compat = hix5hd2_compat, 64 .dt_compat = hix5hd2_compat,
65MACHINE_END 65MACHINE_END
66 66
67static const char *hip04_compat[] __initconst = { 67static const char *const hip04_compat[] __initconst = {
68 "hisilicon,hip04-d01", 68 "hisilicon,hip04-d01",
69 NULL, 69 NULL,
70}; 70};
@@ -73,7 +73,7 @@ DT_MACHINE_START(HIP04, "Hisilicon HiP04 (Flattened Device Tree)")
73 .dt_compat = hip04_compat, 73 .dt_compat = hip04_compat,
74MACHINE_END 74MACHINE_END
75 75
76static const char *hip01_compat[] __initconst = { 76static const char *const hip01_compat[] __initconst = {
77 "hisilicon,hip01", 77 "hisilicon,hip01",
78 "hisilicon,hip01-ca9x2", 78 "hisilicon,hip01-ca9x2",
79 NULL, 79 NULL,
diff --git a/arch/arm/mach-imx/mach-imx6q.c b/arch/arm/mach-imx/mach-imx6q.c
index 4ad6e473cf83..9de3412af406 100644
--- a/arch/arm/mach-imx/mach-imx6q.c
+++ b/arch/arm/mach-imx/mach-imx6q.c
@@ -211,8 +211,9 @@ static void __init imx6q_1588_init(void)
211 * set bit IOMUXC_GPR1[21]. Or the PTP clock must be from pad 211 * set bit IOMUXC_GPR1[21]. Or the PTP clock must be from pad
212 * (external OSC), and we need to clear the bit. 212 * (external OSC), and we need to clear the bit.
213 */ 213 */
214 clksel = ptp_clk == enet_ref ? IMX6Q_GPR1_ENET_CLK_SEL_ANATOP : 214 clksel = clk_is_match(ptp_clk, enet_ref) ?
215 IMX6Q_GPR1_ENET_CLK_SEL_PAD; 215 IMX6Q_GPR1_ENET_CLK_SEL_ANATOP :
216 IMX6Q_GPR1_ENET_CLK_SEL_PAD;
216 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr"); 217 gpr = syscon_regmap_lookup_by_compatible("fsl,imx6q-iomuxc-gpr");
217 if (!IS_ERR(gpr)) 218 if (!IS_ERR(gpr))
218 regmap_update_bits(gpr, IOMUXC_GPR1, 219 regmap_update_bits(gpr, IOMUXC_GPR1,
diff --git a/arch/arm/mach-imx/mmdc.c b/arch/arm/mach-imx/mmdc.c
index a377f95033ae..0411f0664c15 100644
--- a/arch/arm/mach-imx/mmdc.c
+++ b/arch/arm/mach-imx/mmdc.c
@@ -68,7 +68,7 @@ int imx_mmdc_get_ddr_type(void)
68 return ddr_type; 68 return ddr_type;
69} 69}
70 70
71static struct of_device_id imx_mmdc_dt_ids[] = { 71static const struct of_device_id imx_mmdc_dt_ids[] = {
72 { .compatible = "fsl,imx6q-mmdc", }, 72 { .compatible = "fsl,imx6q-mmdc", },
73 { /* sentinel */ } 73 { /* sentinel */ }
74}; 74};
diff --git a/arch/arm/mach-ixp4xx/include/mach/io.h b/arch/arm/mach-ixp4xx/include/mach/io.h
index 6a722860e34d..b02439019963 100644
--- a/arch/arm/mach-ixp4xx/include/mach/io.h
+++ b/arch/arm/mach-ixp4xx/include/mach/io.h
@@ -245,8 +245,10 @@ static inline void outb(u8 value, u32 addr)
245} 245}
246 246
247#define outsb outsb 247#define outsb outsb
248static inline void outsb(u32 io_addr, const u8 *vaddr, u32 count) 248static inline void outsb(u32 io_addr, const void *p, u32 count)
249{ 249{
250 const u8 *vaddr = p;
251
250 while (count--) 252 while (count--)
251 outb(*vaddr++, io_addr); 253 outb(*vaddr++, io_addr);
252} 254}
@@ -262,8 +264,9 @@ static inline void outw(u16 value, u32 addr)
262} 264}
263 265
264#define outsw outsw 266#define outsw outsw
265static inline void outsw(u32 io_addr, const u16 *vaddr, u32 count) 267static inline void outsw(u32 io_addr, const void *p, u32 count)
266{ 268{
269 const u16 *vaddr = p;
267 while (count--) 270 while (count--)
268 outw(cpu_to_le16(*vaddr++), io_addr); 271 outw(cpu_to_le16(*vaddr++), io_addr);
269} 272}
@@ -275,8 +278,9 @@ static inline void outl(u32 value, u32 addr)
275} 278}
276 279
277#define outsl outsl 280#define outsl outsl
278static inline void outsl(u32 io_addr, const u32 *vaddr, u32 count) 281static inline void outsl(u32 io_addr, const void *p, u32 count)
279{ 282{
283 const u32 *vaddr = p;
280 while (count--) 284 while (count--)
281 outl(cpu_to_le32(*vaddr++), io_addr); 285 outl(cpu_to_le32(*vaddr++), io_addr);
282} 286}
@@ -294,8 +298,9 @@ static inline u8 inb(u32 addr)
294} 298}
295 299
296#define insb insb 300#define insb insb
297static inline void insb(u32 io_addr, u8 *vaddr, u32 count) 301static inline void insb(u32 io_addr, void *p, u32 count)
298{ 302{
303 u8 *vaddr = p;
299 while (count--) 304 while (count--)
300 *vaddr++ = inb(io_addr); 305 *vaddr++ = inb(io_addr);
301} 306}
@@ -313,8 +318,9 @@ static inline u16 inw(u32 addr)
313} 318}
314 319
315#define insw insw 320#define insw insw
316static inline void insw(u32 io_addr, u16 *vaddr, u32 count) 321static inline void insw(u32 io_addr, void *p, u32 count)
317{ 322{
323 u16 *vaddr = p;
318 while (count--) 324 while (count--)
319 *vaddr++ = le16_to_cpu(inw(io_addr)); 325 *vaddr++ = le16_to_cpu(inw(io_addr));
320} 326}
@@ -330,8 +336,9 @@ static inline u32 inl(u32 addr)
330} 336}
331 337
332#define insl insl 338#define insl insl
333static inline void insl(u32 io_addr, u32 *vaddr, u32 count) 339static inline void insl(u32 io_addr, void *p, u32 count)
334{ 340{
341 u32 *vaddr = p;
335 while (count--) 342 while (count--)
336 *vaddr++ = le32_to_cpu(inl(io_addr)); 343 *vaddr++ = le32_to_cpu(inl(io_addr));
337} 344}
diff --git a/arch/arm/mach-keystone/keystone.c b/arch/arm/mach-keystone/keystone.c
index 7f352de26099..06620875813a 100644
--- a/arch/arm/mach-keystone/keystone.c
+++ b/arch/arm/mach-keystone/keystone.c
@@ -103,7 +103,7 @@ static void __init keystone_init_meminfo(void)
103 pr_info("Switching to high address space at 0x%llx\n", (u64)offset); 103 pr_info("Switching to high address space at 0x%llx\n", (u64)offset);
104} 104}
105 105
106static const char *keystone_match[] __initconst = { 106static const char *const keystone_match[] __initconst = {
107 "ti,keystone", 107 "ti,keystone",
108 NULL, 108 NULL,
109}; 109};
diff --git a/arch/arm/mach-keystone/pm_domain.c b/arch/arm/mach-keystone/pm_domain.c
index ef6041e7e675..41bebfd296dc 100644
--- a/arch/arm/mach-keystone/pm_domain.c
+++ b/arch/arm/mach-keystone/pm_domain.c
@@ -61,7 +61,7 @@ static struct pm_clk_notifier_block platform_domain_notifier = {
61 .pm_domain = &keystone_pm_domain, 61 .pm_domain = &keystone_pm_domain,
62}; 62};
63 63
64static struct of_device_id of_keystone_table[] = { 64static const struct of_device_id of_keystone_table[] = {
65 {.compatible = "ti,keystone"}, 65 {.compatible = "ti,keystone"},
66 { /* end of list */ }, 66 { /* end of list */ },
67}; 67};
diff --git a/arch/arm/mach-mmp/time.c b/arch/arm/mach-mmp/time.c
index 2756351dbb35..10bfa03e58d4 100644
--- a/arch/arm/mach-mmp/time.c
+++ b/arch/arm/mach-mmp/time.c
@@ -213,7 +213,7 @@ void __init timer_init(int irq)
213} 213}
214 214
215#ifdef CONFIG_OF 215#ifdef CONFIG_OF
216static struct of_device_id mmp_timer_dt_ids[] = { 216static const struct of_device_id mmp_timer_dt_ids[] = {
217 { .compatible = "mrvl,mmp-timer", }, 217 { .compatible = "mrvl,mmp-timer", },
218 {} 218 {}
219}; 219};
diff --git a/arch/arm/mach-msm/board-halibut.c b/arch/arm/mach-msm/board-halibut.c
index 61bfe584a9d7..fc832040c6e9 100644
--- a/arch/arm/mach-msm/board-halibut.c
+++ b/arch/arm/mach-msm/board-halibut.c
@@ -20,6 +20,7 @@
20#include <linux/input.h> 20#include <linux/input.h>
21#include <linux/io.h> 21#include <linux/io.h>
22#include <linux/delay.h> 22#include <linux/delay.h>
23#include <linux/smc91x.h>
23 24
24#include <mach/hardware.h> 25#include <mach/hardware.h>
25#include <asm/mach-types.h> 26#include <asm/mach-types.h>
@@ -46,15 +47,20 @@ static struct resource smc91x_resources[] = {
46 [1] = { 47 [1] = {
47 .start = MSM_GPIO_TO_INT(49), 48 .start = MSM_GPIO_TO_INT(49),
48 .end = MSM_GPIO_TO_INT(49), 49 .end = MSM_GPIO_TO_INT(49),
49 .flags = IORESOURCE_IRQ, 50 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
50 }, 51 },
51}; 52};
52 53
54static struct smc91x_platdata smc91x_platdata = {
55 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
56};
57
53static struct platform_device smc91x_device = { 58static struct platform_device smc91x_device = {
54 .name = "smc91x", 59 .name = "smc91x",
55 .id = 0, 60 .id = 0,
56 .num_resources = ARRAY_SIZE(smc91x_resources), 61 .num_resources = ARRAY_SIZE(smc91x_resources),
57 .resource = smc91x_resources, 62 .resource = smc91x_resources,
63 .dev.platform_data = &smc91x_platdata,
58}; 64};
59 65
60static struct platform_device *devices[] __initdata = { 66static struct platform_device *devices[] __initdata = {
diff --git a/arch/arm/mach-msm/board-qsd8x50.c b/arch/arm/mach-msm/board-qsd8x50.c
index 4c748616ef47..10016a3bc698 100644
--- a/arch/arm/mach-msm/board-qsd8x50.c
+++ b/arch/arm/mach-msm/board-qsd8x50.c
@@ -22,6 +22,7 @@
22#include <linux/usb/msm_hsusb.h> 22#include <linux/usb/msm_hsusb.h>
23#include <linux/err.h> 23#include <linux/err.h>
24#include <linux/clkdev.h> 24#include <linux/clkdev.h>
25#include <linux/smc91x.h>
25 26
26#include <asm/mach-types.h> 27#include <asm/mach-types.h>
27#include <asm/mach/arch.h> 28#include <asm/mach/arch.h>
@@ -49,15 +50,20 @@ static struct resource smc91x_resources[] = {
49 .flags = IORESOURCE_MEM, 50 .flags = IORESOURCE_MEM,
50 }, 51 },
51 [1] = { 52 [1] = {
52 .flags = IORESOURCE_IRQ, 53 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
53 }, 54 },
54}; 55};
55 56
57static struct smc91x_platdata smc91x_platdata = {
58 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
59};
60
56static struct platform_device smc91x_device = { 61static struct platform_device smc91x_device = {
57 .name = "smc91x", 62 .name = "smc91x",
58 .id = 0, 63 .id = 0,
59 .num_resources = ARRAY_SIZE(smc91x_resources), 64 .num_resources = ARRAY_SIZE(smc91x_resources),
60 .resource = smc91x_resources, 65 .resource = smc91x_resources,
66 .dev.platform_data = &smc91x_platdata,
61}; 67};
62 68
63static int __init msm_init_smc91x(void) 69static int __init msm_init_smc91x(void)
diff --git a/arch/arm/mach-mvebu/coherency.c b/arch/arm/mach-mvebu/coherency.c
index b5895f040caa..e46e9ea1e187 100644
--- a/arch/arm/mach-mvebu/coherency.c
+++ b/arch/arm/mach-mvebu/coherency.c
@@ -51,7 +51,7 @@ enum {
51 COHERENCY_FABRIC_TYPE_ARMADA_380, 51 COHERENCY_FABRIC_TYPE_ARMADA_380,
52}; 52};
53 53
54static struct of_device_id of_coherency_table[] = { 54static const struct of_device_id of_coherency_table[] = {
55 {.compatible = "marvell,coherency-fabric", 55 {.compatible = "marvell,coherency-fabric",
56 .data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_370_XP }, 56 .data = (void *) COHERENCY_FABRIC_TYPE_ARMADA_370_XP },
57 {.compatible = "marvell,armada-375-coherency-fabric", 57 {.compatible = "marvell,armada-375-coherency-fabric",
diff --git a/arch/arm/mach-mvebu/pmsu.c b/arch/arm/mach-mvebu/pmsu.c
index d8ab605a44fa..8b9f5e202ccf 100644
--- a/arch/arm/mach-mvebu/pmsu.c
+++ b/arch/arm/mach-mvebu/pmsu.c
@@ -104,7 +104,7 @@ static void __iomem *pmsu_mp_base;
104 104
105static void *mvebu_cpu_resume; 105static void *mvebu_cpu_resume;
106 106
107static struct of_device_id of_pmsu_table[] = { 107static const struct of_device_id of_pmsu_table[] = {
108 { .compatible = "marvell,armada-370-pmsu", }, 108 { .compatible = "marvell,armada-370-pmsu", },
109 { .compatible = "marvell,armada-370-xp-pmsu", }, 109 { .compatible = "marvell,armada-370-xp-pmsu", },
110 { .compatible = "marvell,armada-380-pmsu", }, 110 { .compatible = "marvell,armada-380-pmsu", },
diff --git a/arch/arm/mach-mvebu/system-controller.c b/arch/arm/mach-mvebu/system-controller.c
index a068cb5c2ce8..c6c132acd7a6 100644
--- a/arch/arm/mach-mvebu/system-controller.c
+++ b/arch/arm/mach-mvebu/system-controller.c
@@ -126,7 +126,7 @@ int mvebu_system_controller_get_soc_id(u32 *dev, u32 *rev)
126 return -ENODEV; 126 return -ENODEV;
127} 127}
128 128
129#ifdef CONFIG_SMP 129#if defined(CONFIG_SMP) && defined(CONFIG_MACH_MVEBU_V7)
130void mvebu_armada375_smp_wa_init(void) 130void mvebu_armada375_smp_wa_init(void)
131{ 131{
132 u32 dev, rev; 132 u32 dev, rev;
diff --git a/arch/arm/mach-nspire/nspire.c b/arch/arm/mach-nspire/nspire.c
index 3d24ebf12095..3445a5686805 100644
--- a/arch/arm/mach-nspire/nspire.c
+++ b/arch/arm/mach-nspire/nspire.c
@@ -27,7 +27,7 @@
27#include "mmio.h" 27#include "mmio.h"
28#include "clcd.h" 28#include "clcd.h"
29 29
30static const char *nspire_dt_match[] __initconst = { 30static const char *const nspire_dt_match[] __initconst = {
31 "ti,nspire", 31 "ti,nspire",
32 "ti,nspire-cx", 32 "ti,nspire-cx",
33 "ti,nspire-tp", 33 "ti,nspire-tp",
diff --git a/arch/arm/mach-omap2/Makefile b/arch/arm/mach-omap2/Makefile
index 00d5d8f9f150..b83f18fcec9b 100644
--- a/arch/arm/mach-omap2/Makefile
+++ b/arch/arm/mach-omap2/Makefile
@@ -190,7 +190,7 @@ obj-$(CONFIG_SOC_OMAP2430) += clock2430.o
190obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o 190obj-$(CONFIG_ARCH_OMAP3) += $(clock-common) clock3xxx.o
191obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o clkt34xx_dpll3m2.o 191obj-$(CONFIG_ARCH_OMAP3) += clock34xx.o clkt34xx_dpll3m2.o
192obj-$(CONFIG_ARCH_OMAP3) += clock3517.o clock36xx.o 192obj-$(CONFIG_ARCH_OMAP3) += clock3517.o clock36xx.o
193obj-$(CONFIG_ARCH_OMAP3) += dpll3xxx.o cclock3xxx_data.o 193obj-$(CONFIG_ARCH_OMAP3) += dpll3xxx.o
194obj-$(CONFIG_ARCH_OMAP3) += clkt_iclk.o 194obj-$(CONFIG_ARCH_OMAP3) += clkt_iclk.o
195obj-$(CONFIG_ARCH_OMAP4) += $(clock-common) 195obj-$(CONFIG_ARCH_OMAP4) += $(clock-common)
196obj-$(CONFIG_ARCH_OMAP4) += dpll3xxx.o dpll44xx.o 196obj-$(CONFIG_ARCH_OMAP4) += dpll3xxx.o dpll44xx.o
diff --git a/arch/arm/mach-omap2/cclock3xxx_data.c b/arch/arm/mach-omap2/cclock3xxx_data.c
deleted file mode 100644
index e79c80bbc755..000000000000
--- a/arch/arm/mach-omap2/cclock3xxx_data.c
+++ /dev/null
@@ -1,3688 +0,0 @@
1/*
2 * OMAP3 clock data
3 *
4 * Copyright (C) 2007-2012 Texas Instruments, Inc.
5 * Copyright (C) 2007-2011 Nokia Corporation
6 *
7 * Written by Paul Walmsley
8 * Updated to COMMON clk data format by Rajendra Nayak <rnayak@ti.com>
9 * With many device clock fixes by Kevin Hilman and Jouni Högander
10 * DPLL bypass clock support added by Roman Tereshonkov
11 *
12 */
13
14/*
15 * Virtual clocks are introduced as convenient tools.
16 * They are sources for other clocks and not supposed
17 * to be requested from drivers directly.
18 */
19
20#include <linux/kernel.h>
21#include <linux/clk.h>
22#include <linux/clk-private.h>
23#include <linux/list.h>
24#include <linux/io.h>
25
26#include "soc.h"
27#include "iomap.h"
28#include "clock.h"
29#include "clock3xxx.h"
30#include "clock34xx.h"
31#include "clock36xx.h"
32#include "clock3517.h"
33#include "cm3xxx.h"
34#include "cm-regbits-34xx.h"
35#include "prm3xxx.h"
36#include "prm-regbits-34xx.h"
37#include "control.h"
38
39/*
40 * clocks
41 */
42
43#define OMAP_CM_REGADDR OMAP34XX_CM_REGADDR
44
45/* Maximum DPLL multiplier, divider values for OMAP3 */
46#define OMAP3_MAX_DPLL_MULT 2047
47#define OMAP3630_MAX_JTYPE_DPLL_MULT 4095
48#define OMAP3_MAX_DPLL_DIV 128
49
50DEFINE_CLK_FIXED_RATE(dummy_apb_pclk, CLK_IS_ROOT, 0x0, 0x0);
51
52DEFINE_CLK_FIXED_RATE(mcbsp_clks, CLK_IS_ROOT, 0x0, 0x0);
53
54DEFINE_CLK_FIXED_RATE(omap_32k_fck, CLK_IS_ROOT, 32768, 0x0);
55
56DEFINE_CLK_FIXED_RATE(pclk_ck, CLK_IS_ROOT, 27000000, 0x0);
57
58DEFINE_CLK_FIXED_RATE(rmii_ck, CLK_IS_ROOT, 50000000, 0x0);
59
60DEFINE_CLK_FIXED_RATE(secure_32k_fck, CLK_IS_ROOT, 32768, 0x0);
61
62DEFINE_CLK_FIXED_RATE(sys_altclk, CLK_IS_ROOT, 0x0, 0x0);
63
64DEFINE_CLK_FIXED_RATE(virt_12m_ck, CLK_IS_ROOT, 12000000, 0x0);
65
66DEFINE_CLK_FIXED_RATE(virt_13m_ck, CLK_IS_ROOT, 13000000, 0x0);
67
68DEFINE_CLK_FIXED_RATE(virt_16_8m_ck, CLK_IS_ROOT, 16800000, 0x0);
69
70DEFINE_CLK_FIXED_RATE(virt_19200000_ck, CLK_IS_ROOT, 19200000, 0x0);
71
72DEFINE_CLK_FIXED_RATE(virt_26000000_ck, CLK_IS_ROOT, 26000000, 0x0);
73
74DEFINE_CLK_FIXED_RATE(virt_38_4m_ck, CLK_IS_ROOT, 38400000, 0x0);
75
76static const char *osc_sys_ck_parent_names[] = {
77 "virt_12m_ck", "virt_13m_ck", "virt_19200000_ck", "virt_26000000_ck",
78 "virt_38_4m_ck", "virt_16_8m_ck",
79};
80
81DEFINE_CLK_MUX(osc_sys_ck, osc_sys_ck_parent_names, NULL, 0x0,
82 OMAP3430_PRM_CLKSEL, OMAP3430_SYS_CLKIN_SEL_SHIFT,
83 OMAP3430_SYS_CLKIN_SEL_WIDTH, 0x0, NULL);
84
85DEFINE_CLK_DIVIDER(sys_ck, "osc_sys_ck", &osc_sys_ck, 0x0,
86 OMAP3430_PRM_CLKSRC_CTRL, OMAP_SYSCLKDIV_SHIFT,
87 OMAP_SYSCLKDIV_WIDTH, CLK_DIVIDER_ONE_BASED, NULL);
88
89static struct dpll_data dpll3_dd = {
90 .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
91 .mult_mask = OMAP3430_CORE_DPLL_MULT_MASK,
92 .div1_mask = OMAP3430_CORE_DPLL_DIV_MASK,
93 .clk_bypass = &sys_ck,
94 .clk_ref = &sys_ck,
95 .freqsel_mask = OMAP3430_CORE_DPLL_FREQSEL_MASK,
96 .control_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
97 .enable_mask = OMAP3430_EN_CORE_DPLL_MASK,
98 .auto_recal_bit = OMAP3430_EN_CORE_DPLL_DRIFTGUARD_SHIFT,
99 .recal_en_bit = OMAP3430_CORE_DPLL_RECAL_EN_SHIFT,
100 .recal_st_bit = OMAP3430_CORE_DPLL_ST_SHIFT,
101 .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
102 .autoidle_mask = OMAP3430_AUTO_CORE_DPLL_MASK,
103 .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
104 .idlest_mask = OMAP3430_ST_CORE_CLK_MASK,
105 .max_multiplier = OMAP3_MAX_DPLL_MULT,
106 .min_divider = 1,
107 .max_divider = OMAP3_MAX_DPLL_DIV,
108};
109
110static struct clk dpll3_ck;
111
112static const char *dpll3_ck_parent_names[] = {
113 "sys_ck",
114 "sys_ck",
115};
116
117static const struct clk_ops dpll3_ck_ops = {
118 .init = &omap2_init_clk_clkdm,
119 .get_parent = &omap2_init_dpll_parent,
120 .recalc_rate = &omap3_dpll_recalc,
121 .round_rate = &omap2_dpll_round_rate,
122};
123
124static struct clk_hw_omap dpll3_ck_hw = {
125 .hw = {
126 .clk = &dpll3_ck,
127 },
128 .ops = &clkhwops_omap3_dpll,
129 .dpll_data = &dpll3_dd,
130 .clkdm_name = "dpll3_clkdm",
131};
132
133DEFINE_STRUCT_CLK(dpll3_ck, dpll3_ck_parent_names, dpll3_ck_ops);
134
135DEFINE_CLK_DIVIDER(dpll3_m2_ck, "dpll3_ck", &dpll3_ck, 0x0,
136 OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
137 OMAP3430_CORE_DPLL_CLKOUT_DIV_SHIFT,
138 OMAP3430_CORE_DPLL_CLKOUT_DIV_WIDTH,
139 CLK_DIVIDER_ONE_BASED, NULL);
140
141static struct clk core_ck;
142
143static const char *core_ck_parent_names[] = {
144 "dpll3_m2_ck",
145};
146
147static const struct clk_ops core_ck_ops = {};
148
149DEFINE_STRUCT_CLK_HW_OMAP(core_ck, NULL);
150DEFINE_STRUCT_CLK(core_ck, core_ck_parent_names, core_ck_ops);
151
152DEFINE_CLK_DIVIDER(l3_ick, "core_ck", &core_ck, 0x0,
153 OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
154 OMAP3430_CLKSEL_L3_SHIFT, OMAP3430_CLKSEL_L3_WIDTH,
155 CLK_DIVIDER_ONE_BASED, NULL);
156
157DEFINE_CLK_DIVIDER(l4_ick, "l3_ick", &l3_ick, 0x0,
158 OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
159 OMAP3430_CLKSEL_L4_SHIFT, OMAP3430_CLKSEL_L4_WIDTH,
160 CLK_DIVIDER_ONE_BASED, NULL);
161
162static struct clk security_l4_ick2;
163
164static const char *security_l4_ick2_parent_names[] = {
165 "l4_ick",
166};
167
168DEFINE_STRUCT_CLK_HW_OMAP(security_l4_ick2, NULL);
169DEFINE_STRUCT_CLK(security_l4_ick2, security_l4_ick2_parent_names, core_ck_ops);
170
171static struct clk aes1_ick;
172
173static const char *aes1_ick_parent_names[] = {
174 "security_l4_ick2",
175};
176
177static const struct clk_ops aes1_ick_ops = {
178 .enable = &omap2_dflt_clk_enable,
179 .disable = &omap2_dflt_clk_disable,
180 .is_enabled = &omap2_dflt_clk_is_enabled,
181};
182
183static struct clk_hw_omap aes1_ick_hw = {
184 .hw = {
185 .clk = &aes1_ick,
186 },
187 .ops = &clkhwops_iclk_wait,
188 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
189 .enable_bit = OMAP3430_EN_AES1_SHIFT,
190};
191
192DEFINE_STRUCT_CLK(aes1_ick, aes1_ick_parent_names, aes1_ick_ops);
193
194static struct clk core_l4_ick;
195
196static const struct clk_ops core_l4_ick_ops = {
197 .init = &omap2_init_clk_clkdm,
198};
199
200DEFINE_STRUCT_CLK_HW_OMAP(core_l4_ick, "core_l4_clkdm");
201DEFINE_STRUCT_CLK(core_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
202
203static struct clk aes2_ick;
204
205static const char *aes2_ick_parent_names[] = {
206 "core_l4_ick",
207};
208
209static const struct clk_ops aes2_ick_ops = {
210 .init = &omap2_init_clk_clkdm,
211 .enable = &omap2_dflt_clk_enable,
212 .disable = &omap2_dflt_clk_disable,
213 .is_enabled = &omap2_dflt_clk_is_enabled,
214};
215
216static struct clk_hw_omap aes2_ick_hw = {
217 .hw = {
218 .clk = &aes2_ick,
219 },
220 .ops = &clkhwops_iclk_wait,
221 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
222 .enable_bit = OMAP3430_EN_AES2_SHIFT,
223 .clkdm_name = "core_l4_clkdm",
224};
225
226DEFINE_STRUCT_CLK(aes2_ick, aes2_ick_parent_names, aes2_ick_ops);
227
228static struct clk dpll1_fck;
229
230static struct dpll_data dpll1_dd = {
231 .mult_div1_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL),
232 .mult_mask = OMAP3430_MPU_DPLL_MULT_MASK,
233 .div1_mask = OMAP3430_MPU_DPLL_DIV_MASK,
234 .clk_bypass = &dpll1_fck,
235 .clk_ref = &sys_ck,
236 .freqsel_mask = OMAP3430_MPU_DPLL_FREQSEL_MASK,
237 .control_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKEN_PLL),
238 .enable_mask = OMAP3430_EN_MPU_DPLL_MASK,
239 .modes = (1 << DPLL_LOW_POWER_BYPASS) | (1 << DPLL_LOCKED),
240 .auto_recal_bit = OMAP3430_EN_MPU_DPLL_DRIFTGUARD_SHIFT,
241 .recal_en_bit = OMAP3430_MPU_DPLL_RECAL_EN_SHIFT,
242 .recal_st_bit = OMAP3430_MPU_DPLL_ST_SHIFT,
243 .autoidle_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_AUTOIDLE_PLL),
244 .autoidle_mask = OMAP3430_AUTO_MPU_DPLL_MASK,
245 .idlest_reg = OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
246 .idlest_mask = OMAP3430_ST_MPU_CLK_MASK,
247 .max_multiplier = OMAP3_MAX_DPLL_MULT,
248 .min_divider = 1,
249 .max_divider = OMAP3_MAX_DPLL_DIV,
250};
251
252static struct clk dpll1_ck;
253
254static const struct clk_ops dpll1_ck_ops = {
255 .init = &omap2_init_clk_clkdm,
256 .enable = &omap3_noncore_dpll_enable,
257 .disable = &omap3_noncore_dpll_disable,
258 .get_parent = &omap2_init_dpll_parent,
259 .recalc_rate = &omap3_dpll_recalc,
260 .set_rate = &omap3_noncore_dpll_set_rate,
261 .set_parent = &omap3_noncore_dpll_set_parent,
262 .set_rate_and_parent = &omap3_noncore_dpll_set_rate_and_parent,
263 .determine_rate = &omap3_noncore_dpll_determine_rate,
264 .round_rate = &omap2_dpll_round_rate,
265};
266
267static struct clk_hw_omap dpll1_ck_hw = {
268 .hw = {
269 .clk = &dpll1_ck,
270 },
271 .ops = &clkhwops_omap3_dpll,
272 .dpll_data = &dpll1_dd,
273 .clkdm_name = "dpll1_clkdm",
274};
275
276DEFINE_STRUCT_CLK(dpll1_ck, dpll3_ck_parent_names, dpll1_ck_ops);
277
278DEFINE_CLK_FIXED_FACTOR(dpll1_x2_ck, "dpll1_ck", &dpll1_ck, 0x0, 2, 1);
279
280DEFINE_CLK_DIVIDER(dpll1_x2m2_ck, "dpll1_x2_ck", &dpll1_x2_ck, 0x0,
281 OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL2_PLL),
282 OMAP3430_MPU_DPLL_CLKOUT_DIV_SHIFT,
283 OMAP3430_MPU_DPLL_CLKOUT_DIV_WIDTH,
284 CLK_DIVIDER_ONE_BASED, NULL);
285
286static struct clk mpu_ck;
287
288static const char *mpu_ck_parent_names[] = {
289 "dpll1_x2m2_ck",
290};
291
292DEFINE_STRUCT_CLK_HW_OMAP(mpu_ck, "mpu_clkdm");
293DEFINE_STRUCT_CLK(mpu_ck, mpu_ck_parent_names, core_l4_ick_ops);
294
295DEFINE_CLK_DIVIDER(arm_fck, "mpu_ck", &mpu_ck, 0x0,
296 OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_IDLEST_PLL),
297 OMAP3430_ST_MPU_CLK_SHIFT, OMAP3430_ST_MPU_CLK_WIDTH,
298 0x0, NULL);
299
300static struct clk cam_ick;
301
302static struct clk_hw_omap cam_ick_hw = {
303 .hw = {
304 .clk = &cam_ick,
305 },
306 .ops = &clkhwops_iclk,
307 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_ICLKEN),
308 .enable_bit = OMAP3430_EN_CAM_SHIFT,
309 .clkdm_name = "cam_clkdm",
310};
311
312DEFINE_STRUCT_CLK(cam_ick, security_l4_ick2_parent_names, aes2_ick_ops);
313
314/* DPLL4 */
315/* Supplies 96MHz, 54Mhz TV DAC, DSS fclk, CAM sensor clock, emul trace clk */
316/* Type: DPLL */
317static struct dpll_data dpll4_dd;
318
319static struct dpll_data dpll4_dd_34xx __initdata = {
320 .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL2),
321 .mult_mask = OMAP3430_PERIPH_DPLL_MULT_MASK,
322 .div1_mask = OMAP3430_PERIPH_DPLL_DIV_MASK,
323 .clk_bypass = &sys_ck,
324 .clk_ref = &sys_ck,
325 .freqsel_mask = OMAP3430_PERIPH_DPLL_FREQSEL_MASK,
326 .control_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
327 .enable_mask = OMAP3430_EN_PERIPH_DPLL_MASK,
328 .modes = (1 << DPLL_LOW_POWER_STOP) | (1 << DPLL_LOCKED),
329 .auto_recal_bit = OMAP3430_EN_PERIPH_DPLL_DRIFTGUARD_SHIFT,
330 .recal_en_bit = OMAP3430_PERIPH_DPLL_RECAL_EN_SHIFT,
331 .recal_st_bit = OMAP3430_PERIPH_DPLL_ST_SHIFT,
332 .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
333 .autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK,
334 .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
335 .idlest_mask = OMAP3430_ST_PERIPH_CLK_MASK,
336 .max_multiplier = OMAP3_MAX_DPLL_MULT,
337 .min_divider = 1,
338 .max_divider = OMAP3_MAX_DPLL_DIV,
339};
340
341static struct dpll_data dpll4_dd_3630 __initdata = {
342 .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL2),
343 .mult_mask = OMAP3630_PERIPH_DPLL_MULT_MASK,
344 .div1_mask = OMAP3430_PERIPH_DPLL_DIV_MASK,
345 .clk_bypass = &sys_ck,
346 .clk_ref = &sys_ck,
347 .control_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
348 .enable_mask = OMAP3430_EN_PERIPH_DPLL_MASK,
349 .modes = (1 << DPLL_LOW_POWER_STOP) | (1 << DPLL_LOCKED),
350 .auto_recal_bit = OMAP3430_EN_PERIPH_DPLL_DRIFTGUARD_SHIFT,
351 .recal_en_bit = OMAP3430_PERIPH_DPLL_RECAL_EN_SHIFT,
352 .recal_st_bit = OMAP3430_PERIPH_DPLL_ST_SHIFT,
353 .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, CM_AUTOIDLE),
354 .autoidle_mask = OMAP3430_AUTO_PERIPH_DPLL_MASK,
355 .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST),
356 .idlest_mask = OMAP3430_ST_PERIPH_CLK_MASK,
357 .dco_mask = OMAP3630_PERIPH_DPLL_DCO_SEL_MASK,
358 .sddiv_mask = OMAP3630_PERIPH_DPLL_SD_DIV_MASK,
359 .max_multiplier = OMAP3630_MAX_JTYPE_DPLL_MULT,
360 .min_divider = 1,
361 .max_divider = OMAP3_MAX_DPLL_DIV,
362 .flags = DPLL_J_TYPE
363};
364
365static struct clk dpll4_ck;
366
367static const struct clk_ops dpll4_ck_ops = {
368 .init = &omap2_init_clk_clkdm,
369 .enable = &omap3_noncore_dpll_enable,
370 .disable = &omap3_noncore_dpll_disable,
371 .get_parent = &omap2_init_dpll_parent,
372 .recalc_rate = &omap3_dpll_recalc,
373 .set_rate = &omap3_dpll4_set_rate,
374 .set_parent = &omap3_noncore_dpll_set_parent,
375 .set_rate_and_parent = &omap3_dpll4_set_rate_and_parent,
376 .determine_rate = &omap3_noncore_dpll_determine_rate,
377 .round_rate = &omap2_dpll_round_rate,
378};
379
380static struct clk_hw_omap dpll4_ck_hw = {
381 .hw = {
382 .clk = &dpll4_ck,
383 },
384 .dpll_data = &dpll4_dd,
385 .ops = &clkhwops_omap3_dpll,
386 .clkdm_name = "dpll4_clkdm",
387};
388
389DEFINE_STRUCT_CLK(dpll4_ck, dpll3_ck_parent_names, dpll4_ck_ops);
390
391static const struct clk_div_table dpll4_mx_ck_div_table[] = {
392 { .div = 1, .val = 1 },
393 { .div = 2, .val = 2 },
394 { .div = 3, .val = 3 },
395 { .div = 4, .val = 4 },
396 { .div = 5, .val = 5 },
397 { .div = 6, .val = 6 },
398 { .div = 7, .val = 7 },
399 { .div = 8, .val = 8 },
400 { .div = 9, .val = 9 },
401 { .div = 10, .val = 10 },
402 { .div = 11, .val = 11 },
403 { .div = 12, .val = 12 },
404 { .div = 13, .val = 13 },
405 { .div = 14, .val = 14 },
406 { .div = 15, .val = 15 },
407 { .div = 16, .val = 16 },
408 { .div = 17, .val = 17 },
409 { .div = 18, .val = 18 },
410 { .div = 19, .val = 19 },
411 { .div = 20, .val = 20 },
412 { .div = 21, .val = 21 },
413 { .div = 22, .val = 22 },
414 { .div = 23, .val = 23 },
415 { .div = 24, .val = 24 },
416 { .div = 25, .val = 25 },
417 { .div = 26, .val = 26 },
418 { .div = 27, .val = 27 },
419 { .div = 28, .val = 28 },
420 { .div = 29, .val = 29 },
421 { .div = 30, .val = 30 },
422 { .div = 31, .val = 31 },
423 { .div = 32, .val = 32 },
424 { .div = 0 },
425};
426
427DEFINE_CLK_DIVIDER(dpll4_m5_ck, "dpll4_ck", &dpll4_ck, 0x0,
428 OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_CLKSEL),
429 OMAP3430_CLKSEL_CAM_SHIFT, OMAP3630_CLKSEL_CAM_WIDTH,
430 CLK_DIVIDER_ONE_BASED, NULL);
431
432static struct clk dpll4_m5x2_ck;
433
434static const char *dpll4_m5x2_ck_parent_names[] = {
435 "dpll4_m5_ck",
436};
437
438static const struct clk_ops dpll4_m5x2_ck_ops = {
439 .init = &omap2_init_clk_clkdm,
440 .enable = &omap2_dflt_clk_enable,
441 .disable = &omap2_dflt_clk_disable,
442 .is_enabled = &omap2_dflt_clk_is_enabled,
443 .set_rate = &omap3_clkoutx2_set_rate,
444 .recalc_rate = &omap3_clkoutx2_recalc,
445 .round_rate = &omap3_clkoutx2_round_rate,
446};
447
448static const struct clk_ops dpll4_m5x2_ck_3630_ops = {
449 .init = &omap2_init_clk_clkdm,
450 .enable = &omap36xx_pwrdn_clk_enable_with_hsdiv_restore,
451 .disable = &omap2_dflt_clk_disable,
452 .recalc_rate = &omap3_clkoutx2_recalc,
453};
454
455static struct clk_hw_omap dpll4_m5x2_ck_hw = {
456 .hw = {
457 .clk = &dpll4_m5x2_ck,
458 },
459 .ops = &clkhwops_wait,
460 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
461 .enable_bit = OMAP3430_PWRDN_CAM_SHIFT,
462 .flags = INVERT_ENABLE,
463 .clkdm_name = "dpll4_clkdm",
464};
465
466DEFINE_STRUCT_CLK_FLAGS(dpll4_m5x2_ck, dpll4_m5x2_ck_parent_names,
467 dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
468
469static struct clk dpll4_m5x2_ck_3630 = {
470 .name = "dpll4_m5x2_ck",
471 .hw = &dpll4_m5x2_ck_hw.hw,
472 .parent_names = dpll4_m5x2_ck_parent_names,
473 .num_parents = ARRAY_SIZE(dpll4_m5x2_ck_parent_names),
474 .ops = &dpll4_m5x2_ck_3630_ops,
475 .flags = CLK_SET_RATE_PARENT,
476};
477
478static struct clk cam_mclk;
479
480static const char *cam_mclk_parent_names[] = {
481 "dpll4_m5x2_ck",
482};
483
484static struct clk_hw_omap cam_mclk_hw = {
485 .hw = {
486 .clk = &cam_mclk,
487 },
488 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
489 .enable_bit = OMAP3430_EN_CAM_SHIFT,
490 .clkdm_name = "cam_clkdm",
491};
492
493static struct clk cam_mclk = {
494 .name = "cam_mclk",
495 .hw = &cam_mclk_hw.hw,
496 .parent_names = cam_mclk_parent_names,
497 .num_parents = ARRAY_SIZE(cam_mclk_parent_names),
498 .ops = &aes2_ick_ops,
499 .flags = CLK_SET_RATE_PARENT,
500};
501
502static const struct clksel_rate clkout2_src_core_rates[] = {
503 { .div = 1, .val = 0, .flags = RATE_IN_3XXX },
504 { .div = 0 }
505};
506
507static const struct clksel_rate clkout2_src_sys_rates[] = {
508 { .div = 1, .val = 1, .flags = RATE_IN_3XXX },
509 { .div = 0 }
510};
511
512static const struct clksel_rate clkout2_src_96m_rates[] = {
513 { .div = 1, .val = 2, .flags = RATE_IN_3XXX },
514 { .div = 0 }
515};
516
517DEFINE_CLK_DIVIDER(dpll4_m2_ck, "dpll4_ck", &dpll4_ck, 0x0,
518 OMAP_CM_REGADDR(PLL_MOD, OMAP3430_CM_CLKSEL3),
519 OMAP3430_DIV_96M_SHIFT, OMAP3630_DIV_96M_WIDTH,
520 CLK_DIVIDER_ONE_BASED, NULL);
521
522static struct clk dpll4_m2x2_ck;
523
524static const char *dpll4_m2x2_ck_parent_names[] = {
525 "dpll4_m2_ck",
526};
527
528static struct clk_hw_omap dpll4_m2x2_ck_hw = {
529 .hw = {
530 .clk = &dpll4_m2x2_ck,
531 },
532 .ops = &clkhwops_wait,
533 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
534 .enable_bit = OMAP3430_PWRDN_96M_SHIFT,
535 .flags = INVERT_ENABLE,
536 .clkdm_name = "dpll4_clkdm",
537};
538
539DEFINE_STRUCT_CLK(dpll4_m2x2_ck, dpll4_m2x2_ck_parent_names, dpll4_m5x2_ck_ops);
540
541static struct clk dpll4_m2x2_ck_3630 = {
542 .name = "dpll4_m2x2_ck",
543 .hw = &dpll4_m2x2_ck_hw.hw,
544 .parent_names = dpll4_m2x2_ck_parent_names,
545 .num_parents = ARRAY_SIZE(dpll4_m2x2_ck_parent_names),
546 .ops = &dpll4_m5x2_ck_3630_ops,
547};
548
549static struct clk omap_96m_alwon_fck;
550
551static const char *omap_96m_alwon_fck_parent_names[] = {
552 "dpll4_m2x2_ck",
553};
554
555DEFINE_STRUCT_CLK_HW_OMAP(omap_96m_alwon_fck, NULL);
556DEFINE_STRUCT_CLK(omap_96m_alwon_fck, omap_96m_alwon_fck_parent_names,
557 core_ck_ops);
558
559static struct clk cm_96m_fck;
560
561static const char *cm_96m_fck_parent_names[] = {
562 "omap_96m_alwon_fck",
563};
564
565DEFINE_STRUCT_CLK_HW_OMAP(cm_96m_fck, NULL);
566DEFINE_STRUCT_CLK(cm_96m_fck, cm_96m_fck_parent_names, core_ck_ops);
567
568static const struct clksel_rate clkout2_src_54m_rates[] = {
569 { .div = 1, .val = 3, .flags = RATE_IN_3XXX },
570 { .div = 0 }
571};
572
573DEFINE_CLK_DIVIDER_TABLE(dpll4_m3_ck, "dpll4_ck", &dpll4_ck, 0x0,
574 OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
575 OMAP3430_CLKSEL_TV_SHIFT, OMAP3630_CLKSEL_TV_WIDTH,
576 0, dpll4_mx_ck_div_table, NULL);
577
578static struct clk dpll4_m3x2_ck;
579
580static const char *dpll4_m3x2_ck_parent_names[] = {
581 "dpll4_m3_ck",
582};
583
584static struct clk_hw_omap dpll4_m3x2_ck_hw = {
585 .hw = {
586 .clk = &dpll4_m3x2_ck,
587 },
588 .ops = &clkhwops_wait,
589 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
590 .enable_bit = OMAP3430_PWRDN_TV_SHIFT,
591 .flags = INVERT_ENABLE,
592 .clkdm_name = "dpll4_clkdm",
593};
594
595DEFINE_STRUCT_CLK(dpll4_m3x2_ck, dpll4_m3x2_ck_parent_names, dpll4_m5x2_ck_ops);
596
597static struct clk dpll4_m3x2_ck_3630 = {
598 .name = "dpll4_m3x2_ck",
599 .hw = &dpll4_m3x2_ck_hw.hw,
600 .parent_names = dpll4_m3x2_ck_parent_names,
601 .num_parents = ARRAY_SIZE(dpll4_m3x2_ck_parent_names),
602 .ops = &dpll4_m5x2_ck_3630_ops,
603};
604
605static const char *omap_54m_fck_parent_names[] = {
606 "dpll4_m3x2_ck", "sys_altclk",
607};
608
609DEFINE_CLK_MUX(omap_54m_fck, omap_54m_fck_parent_names, NULL, 0x0,
610 OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1), OMAP3430_SOURCE_54M_SHIFT,
611 OMAP3430_SOURCE_54M_WIDTH, 0x0, NULL);
612
613static const struct clksel clkout2_src_clksel[] = {
614 { .parent = &core_ck, .rates = clkout2_src_core_rates },
615 { .parent = &sys_ck, .rates = clkout2_src_sys_rates },
616 { .parent = &cm_96m_fck, .rates = clkout2_src_96m_rates },
617 { .parent = &omap_54m_fck, .rates = clkout2_src_54m_rates },
618 { .parent = NULL },
619};
620
621static const char *clkout2_src_ck_parent_names[] = {
622 "core_ck", "sys_ck", "cm_96m_fck", "omap_54m_fck",
623};
624
625static const struct clk_ops clkout2_src_ck_ops = {
626 .init = &omap2_init_clk_clkdm,
627 .enable = &omap2_dflt_clk_enable,
628 .disable = &omap2_dflt_clk_disable,
629 .is_enabled = &omap2_dflt_clk_is_enabled,
630 .recalc_rate = &omap2_clksel_recalc,
631 .get_parent = &omap2_clksel_find_parent_index,
632 .set_parent = &omap2_clksel_set_parent,
633};
634
635DEFINE_CLK_OMAP_MUX_GATE(clkout2_src_ck, "core_clkdm",
636 clkout2_src_clksel, OMAP3430_CM_CLKOUT_CTRL,
637 OMAP3430_CLKOUT2SOURCE_MASK,
638 OMAP3430_CM_CLKOUT_CTRL, OMAP3430_CLKOUT2_EN_SHIFT,
639 NULL, clkout2_src_ck_parent_names, clkout2_src_ck_ops);
640
641static const struct clksel_rate omap_48m_cm96m_rates[] = {
642 { .div = 2, .val = 0, .flags = RATE_IN_3XXX },
643 { .div = 0 }
644};
645
646static const struct clksel_rate omap_48m_alt_rates[] = {
647 { .div = 1, .val = 1, .flags = RATE_IN_3XXX },
648 { .div = 0 }
649};
650
651static const struct clksel omap_48m_clksel[] = {
652 { .parent = &cm_96m_fck, .rates = omap_48m_cm96m_rates },
653 { .parent = &sys_altclk, .rates = omap_48m_alt_rates },
654 { .parent = NULL },
655};
656
657static const char *omap_48m_fck_parent_names[] = {
658 "cm_96m_fck", "sys_altclk",
659};
660
661static struct clk omap_48m_fck;
662
663static const struct clk_ops omap_48m_fck_ops = {
664 .recalc_rate = &omap2_clksel_recalc,
665 .get_parent = &omap2_clksel_find_parent_index,
666 .set_parent = &omap2_clksel_set_parent,
667};
668
669static struct clk_hw_omap omap_48m_fck_hw = {
670 .hw = {
671 .clk = &omap_48m_fck,
672 },
673 .clksel = omap_48m_clksel,
674 .clksel_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
675 .clksel_mask = OMAP3430_SOURCE_48M_MASK,
676};
677
678DEFINE_STRUCT_CLK(omap_48m_fck, omap_48m_fck_parent_names, omap_48m_fck_ops);
679
680DEFINE_CLK_FIXED_FACTOR(omap_12m_fck, "omap_48m_fck", &omap_48m_fck, 0x0, 1, 4);
681
682static struct clk core_12m_fck;
683
684static const char *core_12m_fck_parent_names[] = {
685 "omap_12m_fck",
686};
687
688DEFINE_STRUCT_CLK_HW_OMAP(core_12m_fck, "core_l4_clkdm");
689DEFINE_STRUCT_CLK(core_12m_fck, core_12m_fck_parent_names, core_l4_ick_ops);
690
691static struct clk core_48m_fck;
692
693static const char *core_48m_fck_parent_names[] = {
694 "omap_48m_fck",
695};
696
697DEFINE_STRUCT_CLK_HW_OMAP(core_48m_fck, "core_l4_clkdm");
698DEFINE_STRUCT_CLK(core_48m_fck, core_48m_fck_parent_names, core_l4_ick_ops);
699
700static const char *omap_96m_fck_parent_names[] = {
701 "cm_96m_fck", "sys_ck",
702};
703
704DEFINE_CLK_MUX(omap_96m_fck, omap_96m_fck_parent_names, NULL, 0x0,
705 OMAP_CM_REGADDR(PLL_MOD, CM_CLKSEL1),
706 OMAP3430_SOURCE_96M_SHIFT, OMAP3430_SOURCE_96M_WIDTH, 0x0, NULL);
707
708static struct clk core_96m_fck;
709
710static const char *core_96m_fck_parent_names[] = {
711 "omap_96m_fck",
712};
713
714DEFINE_STRUCT_CLK_HW_OMAP(core_96m_fck, "core_l4_clkdm");
715DEFINE_STRUCT_CLK(core_96m_fck, core_96m_fck_parent_names, core_l4_ick_ops);
716
717static struct clk core_l3_ick;
718
719static const char *core_l3_ick_parent_names[] = {
720 "l3_ick",
721};
722
723DEFINE_STRUCT_CLK_HW_OMAP(core_l3_ick, "core_l3_clkdm");
724DEFINE_STRUCT_CLK(core_l3_ick, core_l3_ick_parent_names, core_l4_ick_ops);
725
726DEFINE_CLK_FIXED_FACTOR(dpll3_m2x2_ck, "dpll3_m2_ck", &dpll3_m2_ck, 0x0, 2, 1);
727
728static struct clk corex2_fck;
729
730static const char *corex2_fck_parent_names[] = {
731 "dpll3_m2x2_ck",
732};
733
734DEFINE_STRUCT_CLK_HW_OMAP(corex2_fck, NULL);
735DEFINE_STRUCT_CLK(corex2_fck, corex2_fck_parent_names, core_ck_ops);
736
737static const char *cpefuse_fck_parent_names[] = {
738 "sys_ck",
739};
740
741static struct clk cpefuse_fck;
742
743static struct clk_hw_omap cpefuse_fck_hw = {
744 .hw = {
745 .clk = &cpefuse_fck,
746 },
747 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
748 .enable_bit = OMAP3430ES2_EN_CPEFUSE_SHIFT,
749 .clkdm_name = "core_l4_clkdm",
750};
751
752DEFINE_STRUCT_CLK(cpefuse_fck, cpefuse_fck_parent_names, aes2_ick_ops);
753
754static struct clk csi2_96m_fck;
755
756static const char *csi2_96m_fck_parent_names[] = {
757 "core_96m_fck",
758};
759
760static struct clk_hw_omap csi2_96m_fck_hw = {
761 .hw = {
762 .clk = &csi2_96m_fck,
763 },
764 .enable_reg = OMAP_CM_REGADDR(OMAP3430_CAM_MOD, CM_FCLKEN),
765 .enable_bit = OMAP3430_EN_CSI2_SHIFT,
766 .clkdm_name = "cam_clkdm",
767};
768
769DEFINE_STRUCT_CLK(csi2_96m_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
770
771static struct clk d2d_26m_fck;
772
773static struct clk_hw_omap d2d_26m_fck_hw = {
774 .hw = {
775 .clk = &d2d_26m_fck,
776 },
777 .ops = &clkhwops_wait,
778 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
779 .enable_bit = OMAP3430ES1_EN_D2D_SHIFT,
780 .clkdm_name = "d2d_clkdm",
781};
782
783DEFINE_STRUCT_CLK(d2d_26m_fck, cpefuse_fck_parent_names, aes2_ick_ops);
784
785static struct clk des1_ick;
786
787static struct clk_hw_omap des1_ick_hw = {
788 .hw = {
789 .clk = &des1_ick,
790 },
791 .ops = &clkhwops_iclk_wait,
792 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
793 .enable_bit = OMAP3430_EN_DES1_SHIFT,
794};
795
796DEFINE_STRUCT_CLK(des1_ick, aes1_ick_parent_names, aes1_ick_ops);
797
798static struct clk des2_ick;
799
800static struct clk_hw_omap des2_ick_hw = {
801 .hw = {
802 .clk = &des2_ick,
803 },
804 .ops = &clkhwops_iclk_wait,
805 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
806 .enable_bit = OMAP3430_EN_DES2_SHIFT,
807 .clkdm_name = "core_l4_clkdm",
808};
809
810DEFINE_STRUCT_CLK(des2_ick, aes2_ick_parent_names, aes2_ick_ops);
811
812DEFINE_CLK_DIVIDER(dpll1_fck, "core_ck", &core_ck, 0x0,
813 OMAP_CM_REGADDR(MPU_MOD, OMAP3430_CM_CLKSEL1_PLL),
814 OMAP3430_MPU_CLK_SRC_SHIFT, OMAP3430_MPU_CLK_SRC_WIDTH,
815 CLK_DIVIDER_ONE_BASED, NULL);
816
817static struct clk dpll2_fck;
818
819static struct dpll_data dpll2_dd = {
820 .mult_div1_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL),
821 .mult_mask = OMAP3430_IVA2_DPLL_MULT_MASK,
822 .div1_mask = OMAP3430_IVA2_DPLL_DIV_MASK,
823 .clk_bypass = &dpll2_fck,
824 .clk_ref = &sys_ck,
825 .freqsel_mask = OMAP3430_IVA2_DPLL_FREQSEL_MASK,
826 .control_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKEN_PLL),
827 .enable_mask = OMAP3430_EN_IVA2_DPLL_MASK,
828 .modes = ((1 << DPLL_LOW_POWER_STOP) | (1 << DPLL_LOCKED) |
829 (1 << DPLL_LOW_POWER_BYPASS)),
830 .auto_recal_bit = OMAP3430_EN_IVA2_DPLL_DRIFTGUARD_SHIFT,
831 .recal_en_bit = OMAP3430_PRM_IRQENABLE_MPU_IVA2_DPLL_RECAL_EN_SHIFT,
832 .recal_st_bit = OMAP3430_PRM_IRQSTATUS_MPU_IVA2_DPLL_ST_SHIFT,
833 .autoidle_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_AUTOIDLE_PLL),
834 .autoidle_mask = OMAP3430_AUTO_IVA2_DPLL_MASK,
835 .idlest_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_IDLEST_PLL),
836 .idlest_mask = OMAP3430_ST_IVA2_CLK_MASK,
837 .max_multiplier = OMAP3_MAX_DPLL_MULT,
838 .min_divider = 1,
839 .max_divider = OMAP3_MAX_DPLL_DIV,
840};
841
842static struct clk dpll2_ck;
843
844static struct clk_hw_omap dpll2_ck_hw = {
845 .hw = {
846 .clk = &dpll2_ck,
847 },
848 .ops = &clkhwops_omap3_dpll,
849 .dpll_data = &dpll2_dd,
850 .clkdm_name = "dpll2_clkdm",
851};
852
853DEFINE_STRUCT_CLK(dpll2_ck, dpll3_ck_parent_names, dpll1_ck_ops);
854
855DEFINE_CLK_DIVIDER(dpll2_fck, "core_ck", &core_ck, 0x0,
856 OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL1_PLL),
857 OMAP3430_IVA2_CLK_SRC_SHIFT, OMAP3430_IVA2_CLK_SRC_WIDTH,
858 CLK_DIVIDER_ONE_BASED, NULL);
859
860DEFINE_CLK_DIVIDER(dpll2_m2_ck, "dpll2_ck", &dpll2_ck, 0x0,
861 OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, OMAP3430_CM_CLKSEL2_PLL),
862 OMAP3430_IVA2_DPLL_CLKOUT_DIV_SHIFT,
863 OMAP3430_IVA2_DPLL_CLKOUT_DIV_WIDTH,
864 CLK_DIVIDER_ONE_BASED, NULL);
865
866DEFINE_CLK_DIVIDER(dpll3_m3_ck, "dpll3_ck", &dpll3_ck, 0x0,
867 OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
868 OMAP3430_DIV_DPLL3_SHIFT, OMAP3430_DIV_DPLL3_WIDTH,
869 CLK_DIVIDER_ONE_BASED, NULL);
870
871static struct clk dpll3_m3x2_ck;
872
873static const char *dpll3_m3x2_ck_parent_names[] = {
874 "dpll3_m3_ck",
875};
876
877static struct clk_hw_omap dpll3_m3x2_ck_hw = {
878 .hw = {
879 .clk = &dpll3_m3x2_ck,
880 },
881 .ops = &clkhwops_wait,
882 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
883 .enable_bit = OMAP3430_PWRDN_EMU_CORE_SHIFT,
884 .flags = INVERT_ENABLE,
885 .clkdm_name = "dpll3_clkdm",
886};
887
888DEFINE_STRUCT_CLK(dpll3_m3x2_ck, dpll3_m3x2_ck_parent_names, dpll4_m5x2_ck_ops);
889
890static struct clk dpll3_m3x2_ck_3630 = {
891 .name = "dpll3_m3x2_ck",
892 .hw = &dpll3_m3x2_ck_hw.hw,
893 .parent_names = dpll3_m3x2_ck_parent_names,
894 .num_parents = ARRAY_SIZE(dpll3_m3x2_ck_parent_names),
895 .ops = &dpll4_m5x2_ck_3630_ops,
896};
897
898DEFINE_CLK_FIXED_FACTOR(dpll3_x2_ck, "dpll3_ck", &dpll3_ck, 0x0, 2, 1);
899
900DEFINE_CLK_DIVIDER_TABLE(dpll4_m4_ck, "dpll4_ck", &dpll4_ck, 0x0,
901 OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_CLKSEL),
902 OMAP3430_CLKSEL_DSS1_SHIFT, OMAP3630_CLKSEL_DSS1_WIDTH,
903 0, dpll4_mx_ck_div_table, NULL);
904
905static struct clk dpll4_m4x2_ck;
906
907static const char *dpll4_m4x2_ck_parent_names[] = {
908 "dpll4_m4_ck",
909};
910
911static struct clk_hw_omap dpll4_m4x2_ck_hw = {
912 .hw = {
913 .clk = &dpll4_m4x2_ck,
914 },
915 .ops = &clkhwops_wait,
916 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
917 .enable_bit = OMAP3430_PWRDN_DSS1_SHIFT,
918 .flags = INVERT_ENABLE,
919 .clkdm_name = "dpll4_clkdm",
920};
921
922DEFINE_STRUCT_CLK_FLAGS(dpll4_m4x2_ck, dpll4_m4x2_ck_parent_names,
923 dpll4_m5x2_ck_ops, CLK_SET_RATE_PARENT);
924
925static struct clk dpll4_m4x2_ck_3630 = {
926 .name = "dpll4_m4x2_ck",
927 .hw = &dpll4_m4x2_ck_hw.hw,
928 .parent_names = dpll4_m4x2_ck_parent_names,
929 .num_parents = ARRAY_SIZE(dpll4_m4x2_ck_parent_names),
930 .ops = &dpll4_m5x2_ck_3630_ops,
931 .flags = CLK_SET_RATE_PARENT,
932};
933
934DEFINE_CLK_DIVIDER(dpll4_m6_ck, "dpll4_ck", &dpll4_ck, 0x0,
935 OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
936 OMAP3430_DIV_DPLL4_SHIFT, OMAP3630_DIV_DPLL4_WIDTH,
937 CLK_DIVIDER_ONE_BASED, NULL);
938
939static struct clk dpll4_m6x2_ck;
940
941static const char *dpll4_m6x2_ck_parent_names[] = {
942 "dpll4_m6_ck",
943};
944
945static struct clk_hw_omap dpll4_m6x2_ck_hw = {
946 .hw = {
947 .clk = &dpll4_m6x2_ck,
948 },
949 .ops = &clkhwops_wait,
950 .enable_reg = OMAP_CM_REGADDR(PLL_MOD, CM_CLKEN),
951 .enable_bit = OMAP3430_PWRDN_EMU_PERIPH_SHIFT,
952 .flags = INVERT_ENABLE,
953 .clkdm_name = "dpll4_clkdm",
954};
955
956DEFINE_STRUCT_CLK(dpll4_m6x2_ck, dpll4_m6x2_ck_parent_names, dpll4_m5x2_ck_ops);
957
958static struct clk dpll4_m6x2_ck_3630 = {
959 .name = "dpll4_m6x2_ck",
960 .hw = &dpll4_m6x2_ck_hw.hw,
961 .parent_names = dpll4_m6x2_ck_parent_names,
962 .num_parents = ARRAY_SIZE(dpll4_m6x2_ck_parent_names),
963 .ops = &dpll4_m5x2_ck_3630_ops,
964};
965
966DEFINE_CLK_FIXED_FACTOR(dpll4_x2_ck, "dpll4_ck", &dpll4_ck, 0x0, 2, 1);
967
968static struct dpll_data dpll5_dd = {
969 .mult_div1_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL4),
970 .mult_mask = OMAP3430ES2_PERIPH2_DPLL_MULT_MASK,
971 .div1_mask = OMAP3430ES2_PERIPH2_DPLL_DIV_MASK,
972 .clk_bypass = &sys_ck,
973 .clk_ref = &sys_ck,
974 .freqsel_mask = OMAP3430ES2_PERIPH2_DPLL_FREQSEL_MASK,
975 .control_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKEN2),
976 .enable_mask = OMAP3430ES2_EN_PERIPH2_DPLL_MASK,
977 .modes = (1 << DPLL_LOW_POWER_STOP) | (1 << DPLL_LOCKED),
978 .auto_recal_bit = OMAP3430ES2_EN_PERIPH2_DPLL_DRIFTGUARD_SHIFT,
979 .recal_en_bit = OMAP3430ES2_SND_PERIPH_DPLL_RECAL_EN_SHIFT,
980 .recal_st_bit = OMAP3430ES2_SND_PERIPH_DPLL_ST_SHIFT,
981 .autoidle_reg = OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_AUTOIDLE2_PLL),
982 .autoidle_mask = OMAP3430ES2_AUTO_PERIPH2_DPLL_MASK,
983 .idlest_reg = OMAP_CM_REGADDR(PLL_MOD, CM_IDLEST2),
984 .idlest_mask = OMAP3430ES2_ST_PERIPH2_CLK_MASK,
985 .max_multiplier = OMAP3_MAX_DPLL_MULT,
986 .min_divider = 1,
987 .max_divider = OMAP3_MAX_DPLL_DIV,
988};
989
990static struct clk dpll5_ck;
991
992static struct clk_hw_omap dpll5_ck_hw = {
993 .hw = {
994 .clk = &dpll5_ck,
995 },
996 .ops = &clkhwops_omap3_dpll,
997 .dpll_data = &dpll5_dd,
998 .clkdm_name = "dpll5_clkdm",
999};
1000
1001DEFINE_STRUCT_CLK(dpll5_ck, dpll3_ck_parent_names, dpll1_ck_ops);
1002
1003DEFINE_CLK_DIVIDER(dpll5_m2_ck, "dpll5_ck", &dpll5_ck, 0x0,
1004 OMAP_CM_REGADDR(PLL_MOD, OMAP3430ES2_CM_CLKSEL5),
1005 OMAP3430ES2_DIV_120M_SHIFT, OMAP3430ES2_DIV_120M_WIDTH,
1006 CLK_DIVIDER_ONE_BASED, NULL);
1007
1008static struct clk dss1_alwon_fck_3430es1;
1009
1010static const char *dss1_alwon_fck_3430es1_parent_names[] = {
1011 "dpll4_m4x2_ck",
1012};
1013
1014static struct clk_hw_omap dss1_alwon_fck_3430es1_hw = {
1015 .hw = {
1016 .clk = &dss1_alwon_fck_3430es1,
1017 },
1018 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
1019 .enable_bit = OMAP3430_EN_DSS1_SHIFT,
1020 .clkdm_name = "dss_clkdm",
1021};
1022
1023DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es1,
1024 dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops,
1025 CLK_SET_RATE_PARENT);
1026
1027static struct clk dss1_alwon_fck_3430es2;
1028
1029static struct clk_hw_omap dss1_alwon_fck_3430es2_hw = {
1030 .hw = {
1031 .clk = &dss1_alwon_fck_3430es2,
1032 },
1033 .ops = &clkhwops_omap3430es2_dss_usbhost_wait,
1034 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
1035 .enable_bit = OMAP3430_EN_DSS1_SHIFT,
1036 .clkdm_name = "dss_clkdm",
1037};
1038
1039DEFINE_STRUCT_CLK_FLAGS(dss1_alwon_fck_3430es2,
1040 dss1_alwon_fck_3430es1_parent_names, aes2_ick_ops,
1041 CLK_SET_RATE_PARENT);
1042
1043static struct clk dss2_alwon_fck;
1044
1045static struct clk_hw_omap dss2_alwon_fck_hw = {
1046 .hw = {
1047 .clk = &dss2_alwon_fck,
1048 },
1049 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
1050 .enable_bit = OMAP3430_EN_DSS2_SHIFT,
1051 .clkdm_name = "dss_clkdm",
1052};
1053
1054DEFINE_STRUCT_CLK(dss2_alwon_fck, cpefuse_fck_parent_names, aes2_ick_ops);
1055
1056static struct clk dss_96m_fck;
1057
1058static struct clk_hw_omap dss_96m_fck_hw = {
1059 .hw = {
1060 .clk = &dss_96m_fck,
1061 },
1062 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
1063 .enable_bit = OMAP3430_EN_TV_SHIFT,
1064 .clkdm_name = "dss_clkdm",
1065};
1066
1067DEFINE_STRUCT_CLK(dss_96m_fck, core_96m_fck_parent_names, aes2_ick_ops);
1068
1069static struct clk dss_ick_3430es1;
1070
1071static struct clk_hw_omap dss_ick_3430es1_hw = {
1072 .hw = {
1073 .clk = &dss_ick_3430es1,
1074 },
1075 .ops = &clkhwops_iclk,
1076 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN),
1077 .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
1078 .clkdm_name = "dss_clkdm",
1079};
1080
1081DEFINE_STRUCT_CLK(dss_ick_3430es1, security_l4_ick2_parent_names, aes2_ick_ops);
1082
1083static struct clk dss_ick_3430es2;
1084
1085static struct clk_hw_omap dss_ick_3430es2_hw = {
1086 .hw = {
1087 .clk = &dss_ick_3430es2,
1088 },
1089 .ops = &clkhwops_omap3430es2_iclk_dss_usbhost_wait,
1090 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_ICLKEN),
1091 .enable_bit = OMAP3430_CM_ICLKEN_DSS_EN_DSS_SHIFT,
1092 .clkdm_name = "dss_clkdm",
1093};
1094
1095DEFINE_STRUCT_CLK(dss_ick_3430es2, security_l4_ick2_parent_names, aes2_ick_ops);
1096
1097static struct clk dss_tv_fck;
1098
1099static const char *dss_tv_fck_parent_names[] = {
1100 "omap_54m_fck",
1101};
1102
1103static struct clk_hw_omap dss_tv_fck_hw = {
1104 .hw = {
1105 .clk = &dss_tv_fck,
1106 },
1107 .enable_reg = OMAP_CM_REGADDR(OMAP3430_DSS_MOD, CM_FCLKEN),
1108 .enable_bit = OMAP3430_EN_TV_SHIFT,
1109 .clkdm_name = "dss_clkdm",
1110};
1111
1112DEFINE_STRUCT_CLK(dss_tv_fck, dss_tv_fck_parent_names, aes2_ick_ops);
1113
1114static struct clk emac_fck;
1115
1116static const char *emac_fck_parent_names[] = {
1117 "rmii_ck",
1118};
1119
1120static struct clk_hw_omap emac_fck_hw = {
1121 .hw = {
1122 .clk = &emac_fck,
1123 },
1124 .enable_reg = OMAP343X_CTRL_REGADDR(AM35XX_CONTROL_IPSS_CLK_CTRL),
1125 .enable_bit = AM35XX_CPGMAC_FCLK_SHIFT,
1126};
1127
1128DEFINE_STRUCT_CLK(emac_fck, emac_fck_parent_names, aes1_ick_ops);
1129
1130static struct clk ipss_ick;
1131
1132static const char *ipss_ick_parent_names[] = {
1133 "core_l3_ick",
1134};
1135
1136static struct clk_hw_omap ipss_ick_hw = {
1137 .hw = {
1138 .clk = &ipss_ick,
1139 },
1140 .ops = &clkhwops_am35xx_ipss_wait,
1141 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1142 .enable_bit = AM35XX_EN_IPSS_SHIFT,
1143 .clkdm_name = "core_l3_clkdm",
1144};
1145
1146DEFINE_STRUCT_CLK(ipss_ick, ipss_ick_parent_names, aes2_ick_ops);
1147
1148static struct clk emac_ick;
1149
1150static const char *emac_ick_parent_names[] = {
1151 "ipss_ick",
1152};
1153
1154static struct clk_hw_omap emac_ick_hw = {
1155 .hw = {
1156 .clk = &emac_ick,
1157 },
1158 .ops = &clkhwops_am35xx_ipss_module_wait,
1159 .enable_reg = OMAP343X_CTRL_REGADDR(AM35XX_CONTROL_IPSS_CLK_CTRL),
1160 .enable_bit = AM35XX_CPGMAC_VBUSP_CLK_SHIFT,
1161 .clkdm_name = "core_l3_clkdm",
1162};
1163
1164DEFINE_STRUCT_CLK(emac_ick, emac_ick_parent_names, aes2_ick_ops);
1165
1166static struct clk emu_core_alwon_ck;
1167
1168static const char *emu_core_alwon_ck_parent_names[] = {
1169 "dpll3_m3x2_ck",
1170};
1171
1172DEFINE_STRUCT_CLK_HW_OMAP(emu_core_alwon_ck, "dpll3_clkdm");
1173DEFINE_STRUCT_CLK(emu_core_alwon_ck, emu_core_alwon_ck_parent_names,
1174 core_l4_ick_ops);
1175
1176static struct clk emu_mpu_alwon_ck;
1177
1178static const char *emu_mpu_alwon_ck_parent_names[] = {
1179 "mpu_ck",
1180};
1181
1182DEFINE_STRUCT_CLK_HW_OMAP(emu_mpu_alwon_ck, NULL);
1183DEFINE_STRUCT_CLK(emu_mpu_alwon_ck, emu_mpu_alwon_ck_parent_names, core_ck_ops);
1184
1185static struct clk emu_per_alwon_ck;
1186
1187static const char *emu_per_alwon_ck_parent_names[] = {
1188 "dpll4_m6x2_ck",
1189};
1190
1191DEFINE_STRUCT_CLK_HW_OMAP(emu_per_alwon_ck, "dpll4_clkdm");
1192DEFINE_STRUCT_CLK(emu_per_alwon_ck, emu_per_alwon_ck_parent_names,
1193 core_l4_ick_ops);
1194
1195static const char *emu_src_ck_parent_names[] = {
1196 "sys_ck", "emu_core_alwon_ck", "emu_per_alwon_ck", "emu_mpu_alwon_ck",
1197};
1198
1199static const struct clksel_rate emu_src_sys_rates[] = {
1200 { .div = 1, .val = 0, .flags = RATE_IN_3XXX },
1201 { .div = 0 },
1202};
1203
1204static const struct clksel_rate emu_src_core_rates[] = {
1205 { .div = 1, .val = 1, .flags = RATE_IN_3XXX },
1206 { .div = 0 },
1207};
1208
1209static const struct clksel_rate emu_src_per_rates[] = {
1210 { .div = 1, .val = 2, .flags = RATE_IN_3XXX },
1211 { .div = 0 },
1212};
1213
1214static const struct clksel_rate emu_src_mpu_rates[] = {
1215 { .div = 1, .val = 3, .flags = RATE_IN_3XXX },
1216 { .div = 0 },
1217};
1218
1219static const struct clksel emu_src_clksel[] = {
1220 { .parent = &sys_ck, .rates = emu_src_sys_rates },
1221 { .parent = &emu_core_alwon_ck, .rates = emu_src_core_rates },
1222 { .parent = &emu_per_alwon_ck, .rates = emu_src_per_rates },
1223 { .parent = &emu_mpu_alwon_ck, .rates = emu_src_mpu_rates },
1224 { .parent = NULL },
1225};
1226
1227static const struct clk_ops emu_src_ck_ops = {
1228 .init = &omap2_init_clk_clkdm,
1229 .recalc_rate = &omap2_clksel_recalc,
1230 .get_parent = &omap2_clksel_find_parent_index,
1231 .set_parent = &omap2_clksel_set_parent,
1232 .enable = &omap2_clkops_enable_clkdm,
1233 .disable = &omap2_clkops_disable_clkdm,
1234};
1235
1236static struct clk emu_src_ck;
1237
1238static struct clk_hw_omap emu_src_ck_hw = {
1239 .hw = {
1240 .clk = &emu_src_ck,
1241 },
1242 .clksel = emu_src_clksel,
1243 .clksel_reg = OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
1244 .clksel_mask = OMAP3430_MUX_CTRL_MASK,
1245 .clkdm_name = "emu_clkdm",
1246};
1247
1248DEFINE_STRUCT_CLK(emu_src_ck, emu_src_ck_parent_names, emu_src_ck_ops);
1249
1250DEFINE_CLK_DIVIDER(atclk_fck, "emu_src_ck", &emu_src_ck, 0x0,
1251 OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
1252 OMAP3430_CLKSEL_ATCLK_SHIFT, OMAP3430_CLKSEL_ATCLK_WIDTH,
1253 CLK_DIVIDER_ONE_BASED, NULL);
1254
1255static struct clk fac_ick;
1256
1257static struct clk_hw_omap fac_ick_hw = {
1258 .hw = {
1259 .clk = &fac_ick,
1260 },
1261 .ops = &clkhwops_iclk_wait,
1262 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1263 .enable_bit = OMAP3430ES1_EN_FAC_SHIFT,
1264 .clkdm_name = "core_l4_clkdm",
1265};
1266
1267DEFINE_STRUCT_CLK(fac_ick, aes2_ick_parent_names, aes2_ick_ops);
1268
1269static struct clk fshostusb_fck;
1270
1271static const char *fshostusb_fck_parent_names[] = {
1272 "core_48m_fck",
1273};
1274
1275static struct clk_hw_omap fshostusb_fck_hw = {
1276 .hw = {
1277 .clk = &fshostusb_fck,
1278 },
1279 .ops = &clkhwops_wait,
1280 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1281 .enable_bit = OMAP3430ES1_EN_FSHOSTUSB_SHIFT,
1282 .clkdm_name = "core_l4_clkdm",
1283};
1284
1285DEFINE_STRUCT_CLK(fshostusb_fck, fshostusb_fck_parent_names, aes2_ick_ops);
1286
1287static struct clk gfx_l3_ck;
1288
1289static struct clk_hw_omap gfx_l3_ck_hw = {
1290 .hw = {
1291 .clk = &gfx_l3_ck,
1292 },
1293 .ops = &clkhwops_wait,
1294 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_ICLKEN),
1295 .enable_bit = OMAP_EN_GFX_SHIFT,
1296 .clkdm_name = "gfx_3430es1_clkdm",
1297};
1298
1299DEFINE_STRUCT_CLK(gfx_l3_ck, core_l3_ick_parent_names, aes1_ick_ops);
1300
1301DEFINE_CLK_DIVIDER(gfx_l3_fck, "l3_ick", &l3_ick, 0x0,
1302 OMAP_CM_REGADDR(GFX_MOD, CM_CLKSEL),
1303 OMAP_CLKSEL_GFX_SHIFT, OMAP_CLKSEL_GFX_WIDTH,
1304 CLK_DIVIDER_ONE_BASED, NULL);
1305
1306static struct clk gfx_cg1_ck;
1307
1308static const char *gfx_cg1_ck_parent_names[] = {
1309 "gfx_l3_fck",
1310};
1311
1312static struct clk_hw_omap gfx_cg1_ck_hw = {
1313 .hw = {
1314 .clk = &gfx_cg1_ck,
1315 },
1316 .ops = &clkhwops_wait,
1317 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
1318 .enable_bit = OMAP3430ES1_EN_2D_SHIFT,
1319 .clkdm_name = "gfx_3430es1_clkdm",
1320};
1321
1322DEFINE_STRUCT_CLK(gfx_cg1_ck, gfx_cg1_ck_parent_names, aes2_ick_ops);
1323
1324static struct clk gfx_cg2_ck;
1325
1326static struct clk_hw_omap gfx_cg2_ck_hw = {
1327 .hw = {
1328 .clk = &gfx_cg2_ck,
1329 },
1330 .ops = &clkhwops_wait,
1331 .enable_reg = OMAP_CM_REGADDR(GFX_MOD, CM_FCLKEN),
1332 .enable_bit = OMAP3430ES1_EN_3D_SHIFT,
1333 .clkdm_name = "gfx_3430es1_clkdm",
1334};
1335
1336DEFINE_STRUCT_CLK(gfx_cg2_ck, gfx_cg1_ck_parent_names, aes2_ick_ops);
1337
1338static struct clk gfx_l3_ick;
1339
1340static const char *gfx_l3_ick_parent_names[] = {
1341 "gfx_l3_ck",
1342};
1343
1344DEFINE_STRUCT_CLK_HW_OMAP(gfx_l3_ick, "gfx_3430es1_clkdm");
1345DEFINE_STRUCT_CLK(gfx_l3_ick, gfx_l3_ick_parent_names, core_l4_ick_ops);
1346
1347static struct clk wkup_32k_fck;
1348
1349static const char *wkup_32k_fck_parent_names[] = {
1350 "omap_32k_fck",
1351};
1352
1353DEFINE_STRUCT_CLK_HW_OMAP(wkup_32k_fck, "wkup_clkdm");
1354DEFINE_STRUCT_CLK(wkup_32k_fck, wkup_32k_fck_parent_names, core_l4_ick_ops);
1355
1356static struct clk gpio1_dbck;
1357
1358static const char *gpio1_dbck_parent_names[] = {
1359 "wkup_32k_fck",
1360};
1361
1362static struct clk_hw_omap gpio1_dbck_hw = {
1363 .hw = {
1364 .clk = &gpio1_dbck,
1365 },
1366 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
1367 .enable_bit = OMAP3430_EN_GPIO1_SHIFT,
1368 .clkdm_name = "wkup_clkdm",
1369};
1370
1371DEFINE_STRUCT_CLK(gpio1_dbck, gpio1_dbck_parent_names, aes2_ick_ops);
1372
1373static struct clk wkup_l4_ick;
1374
1375DEFINE_STRUCT_CLK_HW_OMAP(wkup_l4_ick, "wkup_clkdm");
1376DEFINE_STRUCT_CLK(wkup_l4_ick, cpefuse_fck_parent_names, core_l4_ick_ops);
1377
1378static struct clk gpio1_ick;
1379
1380static const char *gpio1_ick_parent_names[] = {
1381 "wkup_l4_ick",
1382};
1383
1384static struct clk_hw_omap gpio1_ick_hw = {
1385 .hw = {
1386 .clk = &gpio1_ick,
1387 },
1388 .ops = &clkhwops_iclk_wait,
1389 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
1390 .enable_bit = OMAP3430_EN_GPIO1_SHIFT,
1391 .clkdm_name = "wkup_clkdm",
1392};
1393
1394DEFINE_STRUCT_CLK(gpio1_ick, gpio1_ick_parent_names, aes2_ick_ops);
1395
1396static struct clk per_32k_alwon_fck;
1397
1398DEFINE_STRUCT_CLK_HW_OMAP(per_32k_alwon_fck, "per_clkdm");
1399DEFINE_STRUCT_CLK(per_32k_alwon_fck, wkup_32k_fck_parent_names,
1400 core_l4_ick_ops);
1401
1402static struct clk gpio2_dbck;
1403
1404static const char *gpio2_dbck_parent_names[] = {
1405 "per_32k_alwon_fck",
1406};
1407
1408static struct clk_hw_omap gpio2_dbck_hw = {
1409 .hw = {
1410 .clk = &gpio2_dbck,
1411 },
1412 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1413 .enable_bit = OMAP3430_EN_GPIO2_SHIFT,
1414 .clkdm_name = "per_clkdm",
1415};
1416
1417DEFINE_STRUCT_CLK(gpio2_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
1418
1419static struct clk per_l4_ick;
1420
1421DEFINE_STRUCT_CLK_HW_OMAP(per_l4_ick, "per_clkdm");
1422DEFINE_STRUCT_CLK(per_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
1423
1424static struct clk gpio2_ick;
1425
1426static const char *gpio2_ick_parent_names[] = {
1427 "per_l4_ick",
1428};
1429
1430static struct clk_hw_omap gpio2_ick_hw = {
1431 .hw = {
1432 .clk = &gpio2_ick,
1433 },
1434 .ops = &clkhwops_iclk_wait,
1435 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1436 .enable_bit = OMAP3430_EN_GPIO2_SHIFT,
1437 .clkdm_name = "per_clkdm",
1438};
1439
1440DEFINE_STRUCT_CLK(gpio2_ick, gpio2_ick_parent_names, aes2_ick_ops);
1441
1442static struct clk gpio3_dbck;
1443
1444static struct clk_hw_omap gpio3_dbck_hw = {
1445 .hw = {
1446 .clk = &gpio3_dbck,
1447 },
1448 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1449 .enable_bit = OMAP3430_EN_GPIO3_SHIFT,
1450 .clkdm_name = "per_clkdm",
1451};
1452
1453DEFINE_STRUCT_CLK(gpio3_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
1454
1455static struct clk gpio3_ick;
1456
1457static struct clk_hw_omap gpio3_ick_hw = {
1458 .hw = {
1459 .clk = &gpio3_ick,
1460 },
1461 .ops = &clkhwops_iclk_wait,
1462 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1463 .enable_bit = OMAP3430_EN_GPIO3_SHIFT,
1464 .clkdm_name = "per_clkdm",
1465};
1466
1467DEFINE_STRUCT_CLK(gpio3_ick, gpio2_ick_parent_names, aes2_ick_ops);
1468
1469static struct clk gpio4_dbck;
1470
1471static struct clk_hw_omap gpio4_dbck_hw = {
1472 .hw = {
1473 .clk = &gpio4_dbck,
1474 },
1475 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1476 .enable_bit = OMAP3430_EN_GPIO4_SHIFT,
1477 .clkdm_name = "per_clkdm",
1478};
1479
1480DEFINE_STRUCT_CLK(gpio4_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
1481
1482static struct clk gpio4_ick;
1483
1484static struct clk_hw_omap gpio4_ick_hw = {
1485 .hw = {
1486 .clk = &gpio4_ick,
1487 },
1488 .ops = &clkhwops_iclk_wait,
1489 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1490 .enable_bit = OMAP3430_EN_GPIO4_SHIFT,
1491 .clkdm_name = "per_clkdm",
1492};
1493
1494DEFINE_STRUCT_CLK(gpio4_ick, gpio2_ick_parent_names, aes2_ick_ops);
1495
1496static struct clk gpio5_dbck;
1497
1498static struct clk_hw_omap gpio5_dbck_hw = {
1499 .hw = {
1500 .clk = &gpio5_dbck,
1501 },
1502 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1503 .enable_bit = OMAP3430_EN_GPIO5_SHIFT,
1504 .clkdm_name = "per_clkdm",
1505};
1506
1507DEFINE_STRUCT_CLK(gpio5_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
1508
1509static struct clk gpio5_ick;
1510
1511static struct clk_hw_omap gpio5_ick_hw = {
1512 .hw = {
1513 .clk = &gpio5_ick,
1514 },
1515 .ops = &clkhwops_iclk_wait,
1516 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1517 .enable_bit = OMAP3430_EN_GPIO5_SHIFT,
1518 .clkdm_name = "per_clkdm",
1519};
1520
1521DEFINE_STRUCT_CLK(gpio5_ick, gpio2_ick_parent_names, aes2_ick_ops);
1522
1523static struct clk gpio6_dbck;
1524
1525static struct clk_hw_omap gpio6_dbck_hw = {
1526 .hw = {
1527 .clk = &gpio6_dbck,
1528 },
1529 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1530 .enable_bit = OMAP3430_EN_GPIO6_SHIFT,
1531 .clkdm_name = "per_clkdm",
1532};
1533
1534DEFINE_STRUCT_CLK(gpio6_dbck, gpio2_dbck_parent_names, aes2_ick_ops);
1535
1536static struct clk gpio6_ick;
1537
1538static struct clk_hw_omap gpio6_ick_hw = {
1539 .hw = {
1540 .clk = &gpio6_ick,
1541 },
1542 .ops = &clkhwops_iclk_wait,
1543 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1544 .enable_bit = OMAP3430_EN_GPIO6_SHIFT,
1545 .clkdm_name = "per_clkdm",
1546};
1547
1548DEFINE_STRUCT_CLK(gpio6_ick, gpio2_ick_parent_names, aes2_ick_ops);
1549
1550static struct clk gpmc_fck;
1551
1552static struct clk_hw_omap gpmc_fck_hw = {
1553 .hw = {
1554 .clk = &gpmc_fck,
1555 },
1556 .flags = ENABLE_ON_INIT,
1557 .clkdm_name = "core_l3_clkdm",
1558};
1559
1560DEFINE_STRUCT_CLK(gpmc_fck, ipss_ick_parent_names, core_l4_ick_ops);
1561
1562static const struct clksel omap343x_gpt_clksel[] = {
1563 { .parent = &omap_32k_fck, .rates = gpt_32k_rates },
1564 { .parent = &sys_ck, .rates = gpt_sys_rates },
1565 { .parent = NULL },
1566};
1567
1568static const char *gpt10_fck_parent_names[] = {
1569 "omap_32k_fck", "sys_ck",
1570};
1571
1572DEFINE_CLK_OMAP_MUX_GATE(gpt10_fck, "core_l4_clkdm", omap343x_gpt_clksel,
1573 OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
1574 OMAP3430_CLKSEL_GPT10_MASK,
1575 OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1576 OMAP3430_EN_GPT10_SHIFT, &clkhwops_wait,
1577 gpt10_fck_parent_names, clkout2_src_ck_ops);
1578
1579static struct clk gpt10_ick;
1580
1581static struct clk_hw_omap gpt10_ick_hw = {
1582 .hw = {
1583 .clk = &gpt10_ick,
1584 },
1585 .ops = &clkhwops_iclk_wait,
1586 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1587 .enable_bit = OMAP3430_EN_GPT10_SHIFT,
1588 .clkdm_name = "core_l4_clkdm",
1589};
1590
1591DEFINE_STRUCT_CLK(gpt10_ick, aes2_ick_parent_names, aes2_ick_ops);
1592
1593DEFINE_CLK_OMAP_MUX_GATE(gpt11_fck, "core_l4_clkdm", omap343x_gpt_clksel,
1594 OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
1595 OMAP3430_CLKSEL_GPT11_MASK,
1596 OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1597 OMAP3430_EN_GPT11_SHIFT, &clkhwops_wait,
1598 gpt10_fck_parent_names, clkout2_src_ck_ops);
1599
1600static struct clk gpt11_ick;
1601
1602static struct clk_hw_omap gpt11_ick_hw = {
1603 .hw = {
1604 .clk = &gpt11_ick,
1605 },
1606 .ops = &clkhwops_iclk_wait,
1607 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1608 .enable_bit = OMAP3430_EN_GPT11_SHIFT,
1609 .clkdm_name = "core_l4_clkdm",
1610};
1611
1612DEFINE_STRUCT_CLK(gpt11_ick, aes2_ick_parent_names, aes2_ick_ops);
1613
1614static struct clk gpt12_fck;
1615
1616static const char *gpt12_fck_parent_names[] = {
1617 "secure_32k_fck",
1618};
1619
1620DEFINE_STRUCT_CLK_HW_OMAP(gpt12_fck, "wkup_clkdm");
1621DEFINE_STRUCT_CLK(gpt12_fck, gpt12_fck_parent_names, core_l4_ick_ops);
1622
1623static struct clk gpt12_ick;
1624
1625static struct clk_hw_omap gpt12_ick_hw = {
1626 .hw = {
1627 .clk = &gpt12_ick,
1628 },
1629 .ops = &clkhwops_iclk_wait,
1630 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
1631 .enable_bit = OMAP3430_EN_GPT12_SHIFT,
1632 .clkdm_name = "wkup_clkdm",
1633};
1634
1635DEFINE_STRUCT_CLK(gpt12_ick, gpio1_ick_parent_names, aes2_ick_ops);
1636
1637DEFINE_CLK_OMAP_MUX_GATE(gpt1_fck, "wkup_clkdm", omap343x_gpt_clksel,
1638 OMAP_CM_REGADDR(WKUP_MOD, CM_CLKSEL),
1639 OMAP3430_CLKSEL_GPT1_MASK,
1640 OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
1641 OMAP3430_EN_GPT1_SHIFT, &clkhwops_wait,
1642 gpt10_fck_parent_names, clkout2_src_ck_ops);
1643
1644static struct clk gpt1_ick;
1645
1646static struct clk_hw_omap gpt1_ick_hw = {
1647 .hw = {
1648 .clk = &gpt1_ick,
1649 },
1650 .ops = &clkhwops_iclk_wait,
1651 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
1652 .enable_bit = OMAP3430_EN_GPT1_SHIFT,
1653 .clkdm_name = "wkup_clkdm",
1654};
1655
1656DEFINE_STRUCT_CLK(gpt1_ick, gpio1_ick_parent_names, aes2_ick_ops);
1657
1658DEFINE_CLK_OMAP_MUX_GATE(gpt2_fck, "per_clkdm", omap343x_gpt_clksel,
1659 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL),
1660 OMAP3430_CLKSEL_GPT2_MASK,
1661 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1662 OMAP3430_EN_GPT2_SHIFT, &clkhwops_wait,
1663 gpt10_fck_parent_names, clkout2_src_ck_ops);
1664
1665static struct clk gpt2_ick;
1666
1667static struct clk_hw_omap gpt2_ick_hw = {
1668 .hw = {
1669 .clk = &gpt2_ick,
1670 },
1671 .ops = &clkhwops_iclk_wait,
1672 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1673 .enable_bit = OMAP3430_EN_GPT2_SHIFT,
1674 .clkdm_name = "per_clkdm",
1675};
1676
1677DEFINE_STRUCT_CLK(gpt2_ick, gpio2_ick_parent_names, aes2_ick_ops);
1678
1679DEFINE_CLK_OMAP_MUX_GATE(gpt3_fck, "per_clkdm", omap343x_gpt_clksel,
1680 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL),
1681 OMAP3430_CLKSEL_GPT3_MASK,
1682 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1683 OMAP3430_EN_GPT3_SHIFT, &clkhwops_wait,
1684 gpt10_fck_parent_names, clkout2_src_ck_ops);
1685
1686static struct clk gpt3_ick;
1687
1688static struct clk_hw_omap gpt3_ick_hw = {
1689 .hw = {
1690 .clk = &gpt3_ick,
1691 },
1692 .ops = &clkhwops_iclk_wait,
1693 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1694 .enable_bit = OMAP3430_EN_GPT3_SHIFT,
1695 .clkdm_name = "per_clkdm",
1696};
1697
1698DEFINE_STRUCT_CLK(gpt3_ick, gpio2_ick_parent_names, aes2_ick_ops);
1699
1700DEFINE_CLK_OMAP_MUX_GATE(gpt4_fck, "per_clkdm", omap343x_gpt_clksel,
1701 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL),
1702 OMAP3430_CLKSEL_GPT4_MASK,
1703 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1704 OMAP3430_EN_GPT4_SHIFT, &clkhwops_wait,
1705 gpt10_fck_parent_names, clkout2_src_ck_ops);
1706
1707static struct clk gpt4_ick;
1708
1709static struct clk_hw_omap gpt4_ick_hw = {
1710 .hw = {
1711 .clk = &gpt4_ick,
1712 },
1713 .ops = &clkhwops_iclk_wait,
1714 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1715 .enable_bit = OMAP3430_EN_GPT4_SHIFT,
1716 .clkdm_name = "per_clkdm",
1717};
1718
1719DEFINE_STRUCT_CLK(gpt4_ick, gpio2_ick_parent_names, aes2_ick_ops);
1720
1721DEFINE_CLK_OMAP_MUX_GATE(gpt5_fck, "per_clkdm", omap343x_gpt_clksel,
1722 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL),
1723 OMAP3430_CLKSEL_GPT5_MASK,
1724 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1725 OMAP3430_EN_GPT5_SHIFT, &clkhwops_wait,
1726 gpt10_fck_parent_names, clkout2_src_ck_ops);
1727
1728static struct clk gpt5_ick;
1729
1730static struct clk_hw_omap gpt5_ick_hw = {
1731 .hw = {
1732 .clk = &gpt5_ick,
1733 },
1734 .ops = &clkhwops_iclk_wait,
1735 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1736 .enable_bit = OMAP3430_EN_GPT5_SHIFT,
1737 .clkdm_name = "per_clkdm",
1738};
1739
1740DEFINE_STRUCT_CLK(gpt5_ick, gpio2_ick_parent_names, aes2_ick_ops);
1741
1742DEFINE_CLK_OMAP_MUX_GATE(gpt6_fck, "per_clkdm", omap343x_gpt_clksel,
1743 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL),
1744 OMAP3430_CLKSEL_GPT6_MASK,
1745 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1746 OMAP3430_EN_GPT6_SHIFT, &clkhwops_wait,
1747 gpt10_fck_parent_names, clkout2_src_ck_ops);
1748
1749static struct clk gpt6_ick;
1750
1751static struct clk_hw_omap gpt6_ick_hw = {
1752 .hw = {
1753 .clk = &gpt6_ick,
1754 },
1755 .ops = &clkhwops_iclk_wait,
1756 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1757 .enable_bit = OMAP3430_EN_GPT6_SHIFT,
1758 .clkdm_name = "per_clkdm",
1759};
1760
1761DEFINE_STRUCT_CLK(gpt6_ick, gpio2_ick_parent_names, aes2_ick_ops);
1762
1763DEFINE_CLK_OMAP_MUX_GATE(gpt7_fck, "per_clkdm", omap343x_gpt_clksel,
1764 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL),
1765 OMAP3430_CLKSEL_GPT7_MASK,
1766 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1767 OMAP3430_EN_GPT7_SHIFT, &clkhwops_wait,
1768 gpt10_fck_parent_names, clkout2_src_ck_ops);
1769
1770static struct clk gpt7_ick;
1771
1772static struct clk_hw_omap gpt7_ick_hw = {
1773 .hw = {
1774 .clk = &gpt7_ick,
1775 },
1776 .ops = &clkhwops_iclk_wait,
1777 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1778 .enable_bit = OMAP3430_EN_GPT7_SHIFT,
1779 .clkdm_name = "per_clkdm",
1780};
1781
1782DEFINE_STRUCT_CLK(gpt7_ick, gpio2_ick_parent_names, aes2_ick_ops);
1783
1784DEFINE_CLK_OMAP_MUX_GATE(gpt8_fck, "per_clkdm", omap343x_gpt_clksel,
1785 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL),
1786 OMAP3430_CLKSEL_GPT8_MASK,
1787 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1788 OMAP3430_EN_GPT8_SHIFT, &clkhwops_wait,
1789 gpt10_fck_parent_names, clkout2_src_ck_ops);
1790
1791static struct clk gpt8_ick;
1792
1793static struct clk_hw_omap gpt8_ick_hw = {
1794 .hw = {
1795 .clk = &gpt8_ick,
1796 },
1797 .ops = &clkhwops_iclk_wait,
1798 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1799 .enable_bit = OMAP3430_EN_GPT8_SHIFT,
1800 .clkdm_name = "per_clkdm",
1801};
1802
1803DEFINE_STRUCT_CLK(gpt8_ick, gpio2_ick_parent_names, aes2_ick_ops);
1804
1805DEFINE_CLK_OMAP_MUX_GATE(gpt9_fck, "per_clkdm", omap343x_gpt_clksel,
1806 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_CLKSEL),
1807 OMAP3430_CLKSEL_GPT9_MASK,
1808 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
1809 OMAP3430_EN_GPT9_SHIFT, &clkhwops_wait,
1810 gpt10_fck_parent_names, clkout2_src_ck_ops);
1811
1812static struct clk gpt9_ick;
1813
1814static struct clk_hw_omap gpt9_ick_hw = {
1815 .hw = {
1816 .clk = &gpt9_ick,
1817 },
1818 .ops = &clkhwops_iclk_wait,
1819 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
1820 .enable_bit = OMAP3430_EN_GPT9_SHIFT,
1821 .clkdm_name = "per_clkdm",
1822};
1823
1824DEFINE_STRUCT_CLK(gpt9_ick, gpio2_ick_parent_names, aes2_ick_ops);
1825
1826static struct clk hdq_fck;
1827
1828static const char *hdq_fck_parent_names[] = {
1829 "core_12m_fck",
1830};
1831
1832static struct clk_hw_omap hdq_fck_hw = {
1833 .hw = {
1834 .clk = &hdq_fck,
1835 },
1836 .ops = &clkhwops_wait,
1837 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1838 .enable_bit = OMAP3430_EN_HDQ_SHIFT,
1839 .clkdm_name = "core_l4_clkdm",
1840};
1841
1842DEFINE_STRUCT_CLK(hdq_fck, hdq_fck_parent_names, aes2_ick_ops);
1843
1844static struct clk hdq_ick;
1845
1846static struct clk_hw_omap hdq_ick_hw = {
1847 .hw = {
1848 .clk = &hdq_ick,
1849 },
1850 .ops = &clkhwops_iclk_wait,
1851 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1852 .enable_bit = OMAP3430_EN_HDQ_SHIFT,
1853 .clkdm_name = "core_l4_clkdm",
1854};
1855
1856DEFINE_STRUCT_CLK(hdq_ick, aes2_ick_parent_names, aes2_ick_ops);
1857
1858static struct clk hecc_ck;
1859
1860static struct clk_hw_omap hecc_ck_hw = {
1861 .hw = {
1862 .clk = &hecc_ck,
1863 },
1864 .ops = &clkhwops_am35xx_ipss_module_wait,
1865 .enable_reg = OMAP343X_CTRL_REGADDR(AM35XX_CONTROL_IPSS_CLK_CTRL),
1866 .enable_bit = AM35XX_HECC_VBUSP_CLK_SHIFT,
1867 .clkdm_name = "core_l3_clkdm",
1868};
1869
1870DEFINE_STRUCT_CLK(hecc_ck, cpefuse_fck_parent_names, aes2_ick_ops);
1871
1872static struct clk hsotgusb_fck_am35xx;
1873
1874static struct clk_hw_omap hsotgusb_fck_am35xx_hw = {
1875 .hw = {
1876 .clk = &hsotgusb_fck_am35xx,
1877 },
1878 .enable_reg = OMAP343X_CTRL_REGADDR(AM35XX_CONTROL_IPSS_CLK_CTRL),
1879 .enable_bit = AM35XX_USBOTG_FCLK_SHIFT,
1880 .clkdm_name = "core_l3_clkdm",
1881};
1882
1883DEFINE_STRUCT_CLK(hsotgusb_fck_am35xx, cpefuse_fck_parent_names, aes2_ick_ops);
1884
1885static struct clk hsotgusb_ick_3430es1;
1886
1887static struct clk_hw_omap hsotgusb_ick_3430es1_hw = {
1888 .hw = {
1889 .clk = &hsotgusb_ick_3430es1,
1890 },
1891 .ops = &clkhwops_iclk,
1892 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1893 .enable_bit = OMAP3430_EN_HSOTGUSB_SHIFT,
1894 .clkdm_name = "core_l3_clkdm",
1895};
1896
1897DEFINE_STRUCT_CLK(hsotgusb_ick_3430es1, ipss_ick_parent_names, aes2_ick_ops);
1898
1899static struct clk hsotgusb_ick_3430es2;
1900
1901static struct clk_hw_omap hsotgusb_ick_3430es2_hw = {
1902 .hw = {
1903 .clk = &hsotgusb_ick_3430es2,
1904 },
1905 .ops = &clkhwops_omap3430es2_iclk_hsotgusb_wait,
1906 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1907 .enable_bit = OMAP3430_EN_HSOTGUSB_SHIFT,
1908 .clkdm_name = "core_l3_clkdm",
1909};
1910
1911DEFINE_STRUCT_CLK(hsotgusb_ick_3430es2, ipss_ick_parent_names, aes2_ick_ops);
1912
1913static struct clk hsotgusb_ick_am35xx;
1914
1915static struct clk_hw_omap hsotgusb_ick_am35xx_hw = {
1916 .hw = {
1917 .clk = &hsotgusb_ick_am35xx,
1918 },
1919 .ops = &clkhwops_am35xx_ipss_module_wait,
1920 .enable_reg = OMAP343X_CTRL_REGADDR(AM35XX_CONTROL_IPSS_CLK_CTRL),
1921 .enable_bit = AM35XX_USBOTG_VBUSP_CLK_SHIFT,
1922 .clkdm_name = "core_l3_clkdm",
1923};
1924
1925DEFINE_STRUCT_CLK(hsotgusb_ick_am35xx, emac_ick_parent_names, aes2_ick_ops);
1926
1927static struct clk i2c1_fck;
1928
1929static struct clk_hw_omap i2c1_fck_hw = {
1930 .hw = {
1931 .clk = &i2c1_fck,
1932 },
1933 .ops = &clkhwops_wait,
1934 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1935 .enable_bit = OMAP3430_EN_I2C1_SHIFT,
1936 .clkdm_name = "core_l4_clkdm",
1937};
1938
1939DEFINE_STRUCT_CLK(i2c1_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
1940
1941static struct clk i2c1_ick;
1942
1943static struct clk_hw_omap i2c1_ick_hw = {
1944 .hw = {
1945 .clk = &i2c1_ick,
1946 },
1947 .ops = &clkhwops_iclk_wait,
1948 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1949 .enable_bit = OMAP3430_EN_I2C1_SHIFT,
1950 .clkdm_name = "core_l4_clkdm",
1951};
1952
1953DEFINE_STRUCT_CLK(i2c1_ick, aes2_ick_parent_names, aes2_ick_ops);
1954
1955static struct clk i2c2_fck;
1956
1957static struct clk_hw_omap i2c2_fck_hw = {
1958 .hw = {
1959 .clk = &i2c2_fck,
1960 },
1961 .ops = &clkhwops_wait,
1962 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1963 .enable_bit = OMAP3430_EN_I2C2_SHIFT,
1964 .clkdm_name = "core_l4_clkdm",
1965};
1966
1967DEFINE_STRUCT_CLK(i2c2_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
1968
1969static struct clk i2c2_ick;
1970
1971static struct clk_hw_omap i2c2_ick_hw = {
1972 .hw = {
1973 .clk = &i2c2_ick,
1974 },
1975 .ops = &clkhwops_iclk_wait,
1976 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
1977 .enable_bit = OMAP3430_EN_I2C2_SHIFT,
1978 .clkdm_name = "core_l4_clkdm",
1979};
1980
1981DEFINE_STRUCT_CLK(i2c2_ick, aes2_ick_parent_names, aes2_ick_ops);
1982
1983static struct clk i2c3_fck;
1984
1985static struct clk_hw_omap i2c3_fck_hw = {
1986 .hw = {
1987 .clk = &i2c3_fck,
1988 },
1989 .ops = &clkhwops_wait,
1990 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
1991 .enable_bit = OMAP3430_EN_I2C3_SHIFT,
1992 .clkdm_name = "core_l4_clkdm",
1993};
1994
1995DEFINE_STRUCT_CLK(i2c3_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
1996
1997static struct clk i2c3_ick;
1998
1999static struct clk_hw_omap i2c3_ick_hw = {
2000 .hw = {
2001 .clk = &i2c3_ick,
2002 },
2003 .ops = &clkhwops_iclk_wait,
2004 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2005 .enable_bit = OMAP3430_EN_I2C3_SHIFT,
2006 .clkdm_name = "core_l4_clkdm",
2007};
2008
2009DEFINE_STRUCT_CLK(i2c3_ick, aes2_ick_parent_names, aes2_ick_ops);
2010
2011static struct clk icr_ick;
2012
2013static struct clk_hw_omap icr_ick_hw = {
2014 .hw = {
2015 .clk = &icr_ick,
2016 },
2017 .ops = &clkhwops_iclk_wait,
2018 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2019 .enable_bit = OMAP3430_EN_ICR_SHIFT,
2020 .clkdm_name = "core_l4_clkdm",
2021};
2022
2023DEFINE_STRUCT_CLK(icr_ick, aes2_ick_parent_names, aes2_ick_ops);
2024
2025static struct clk iva2_ck;
2026
2027static const char *iva2_ck_parent_names[] = {
2028 "dpll2_m2_ck",
2029};
2030
2031static struct clk_hw_omap iva2_ck_hw = {
2032 .hw = {
2033 .clk = &iva2_ck,
2034 },
2035 .ops = &clkhwops_wait,
2036 .enable_reg = OMAP_CM_REGADDR(OMAP3430_IVA2_MOD, CM_FCLKEN),
2037 .enable_bit = OMAP3430_CM_FCLKEN_IVA2_EN_IVA2_SHIFT,
2038 .clkdm_name = "iva2_clkdm",
2039};
2040
2041DEFINE_STRUCT_CLK(iva2_ck, iva2_ck_parent_names, aes2_ick_ops);
2042
2043static struct clk mad2d_ick;
2044
2045static struct clk_hw_omap mad2d_ick_hw = {
2046 .hw = {
2047 .clk = &mad2d_ick,
2048 },
2049 .ops = &clkhwops_iclk_wait,
2050 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3),
2051 .enable_bit = OMAP3430_EN_MAD2D_SHIFT,
2052 .clkdm_name = "d2d_clkdm",
2053};
2054
2055DEFINE_STRUCT_CLK(mad2d_ick, core_l3_ick_parent_names, aes2_ick_ops);
2056
2057static struct clk mailboxes_ick;
2058
2059static struct clk_hw_omap mailboxes_ick_hw = {
2060 .hw = {
2061 .clk = &mailboxes_ick,
2062 },
2063 .ops = &clkhwops_iclk_wait,
2064 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2065 .enable_bit = OMAP3430_EN_MAILBOXES_SHIFT,
2066 .clkdm_name = "core_l4_clkdm",
2067};
2068
2069DEFINE_STRUCT_CLK(mailboxes_ick, aes2_ick_parent_names, aes2_ick_ops);
2070
2071static const struct clksel_rate common_mcbsp_96m_rates[] = {
2072 { .div = 1, .val = 0, .flags = RATE_IN_3XXX },
2073 { .div = 0 }
2074};
2075
2076static const struct clksel_rate common_mcbsp_mcbsp_rates[] = {
2077 { .div = 1, .val = 1, .flags = RATE_IN_3XXX },
2078 { .div = 0 }
2079};
2080
2081static const struct clksel mcbsp_15_clksel[] = {
2082 { .parent = &core_96m_fck, .rates = common_mcbsp_96m_rates },
2083 { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates },
2084 { .parent = NULL },
2085};
2086
2087static const char *mcbsp1_fck_parent_names[] = {
2088 "core_96m_fck", "mcbsp_clks",
2089};
2090
2091DEFINE_CLK_OMAP_MUX_GATE(mcbsp1_fck, "core_l4_clkdm", mcbsp_15_clksel,
2092 OMAP343X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0),
2093 OMAP2_MCBSP1_CLKS_MASK,
2094 OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2095 OMAP3430_EN_MCBSP1_SHIFT, &clkhwops_wait,
2096 mcbsp1_fck_parent_names, clkout2_src_ck_ops);
2097
2098static struct clk mcbsp1_ick;
2099
2100static struct clk_hw_omap mcbsp1_ick_hw = {
2101 .hw = {
2102 .clk = &mcbsp1_ick,
2103 },
2104 .ops = &clkhwops_iclk_wait,
2105 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2106 .enable_bit = OMAP3430_EN_MCBSP1_SHIFT,
2107 .clkdm_name = "core_l4_clkdm",
2108};
2109
2110DEFINE_STRUCT_CLK(mcbsp1_ick, aes2_ick_parent_names, aes2_ick_ops);
2111
2112static struct clk per_96m_fck;
2113
2114DEFINE_STRUCT_CLK_HW_OMAP(per_96m_fck, "per_clkdm");
2115DEFINE_STRUCT_CLK(per_96m_fck, cm_96m_fck_parent_names, core_l4_ick_ops);
2116
2117static const struct clksel mcbsp_234_clksel[] = {
2118 { .parent = &per_96m_fck, .rates = common_mcbsp_96m_rates },
2119 { .parent = &mcbsp_clks, .rates = common_mcbsp_mcbsp_rates },
2120 { .parent = NULL },
2121};
2122
2123static const char *mcbsp2_fck_parent_names[] = {
2124 "per_96m_fck", "mcbsp_clks",
2125};
2126
2127DEFINE_CLK_OMAP_MUX_GATE(mcbsp2_fck, "per_clkdm", mcbsp_234_clksel,
2128 OMAP343X_CTRL_REGADDR(OMAP2_CONTROL_DEVCONF0),
2129 OMAP2_MCBSP2_CLKS_MASK,
2130 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2131 OMAP3430_EN_MCBSP2_SHIFT, &clkhwops_wait,
2132 mcbsp2_fck_parent_names, clkout2_src_ck_ops);
2133
2134static struct clk mcbsp2_ick;
2135
2136static struct clk_hw_omap mcbsp2_ick_hw = {
2137 .hw = {
2138 .clk = &mcbsp2_ick,
2139 },
2140 .ops = &clkhwops_iclk_wait,
2141 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2142 .enable_bit = OMAP3430_EN_MCBSP2_SHIFT,
2143 .clkdm_name = "per_clkdm",
2144};
2145
2146DEFINE_STRUCT_CLK(mcbsp2_ick, gpio2_ick_parent_names, aes2_ick_ops);
2147
2148DEFINE_CLK_OMAP_MUX_GATE(mcbsp3_fck, "per_clkdm", mcbsp_234_clksel,
2149 OMAP343X_CTRL_REGADDR(OMAP343X_CONTROL_DEVCONF1),
2150 OMAP2_MCBSP3_CLKS_MASK,
2151 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2152 OMAP3430_EN_MCBSP3_SHIFT, &clkhwops_wait,
2153 mcbsp2_fck_parent_names, clkout2_src_ck_ops);
2154
2155static struct clk mcbsp3_ick;
2156
2157static struct clk_hw_omap mcbsp3_ick_hw = {
2158 .hw = {
2159 .clk = &mcbsp3_ick,
2160 },
2161 .ops = &clkhwops_iclk_wait,
2162 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2163 .enable_bit = OMAP3430_EN_MCBSP3_SHIFT,
2164 .clkdm_name = "per_clkdm",
2165};
2166
2167DEFINE_STRUCT_CLK(mcbsp3_ick, gpio2_ick_parent_names, aes2_ick_ops);
2168
2169DEFINE_CLK_OMAP_MUX_GATE(mcbsp4_fck, "per_clkdm", mcbsp_234_clksel,
2170 OMAP343X_CTRL_REGADDR(OMAP343X_CONTROL_DEVCONF1),
2171 OMAP2_MCBSP4_CLKS_MASK,
2172 OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2173 OMAP3430_EN_MCBSP4_SHIFT, &clkhwops_wait,
2174 mcbsp2_fck_parent_names, clkout2_src_ck_ops);
2175
2176static struct clk mcbsp4_ick;
2177
2178static struct clk_hw_omap mcbsp4_ick_hw = {
2179 .hw = {
2180 .clk = &mcbsp4_ick,
2181 },
2182 .ops = &clkhwops_iclk_wait,
2183 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2184 .enable_bit = OMAP3430_EN_MCBSP4_SHIFT,
2185 .clkdm_name = "per_clkdm",
2186};
2187
2188DEFINE_STRUCT_CLK(mcbsp4_ick, gpio2_ick_parent_names, aes2_ick_ops);
2189
2190DEFINE_CLK_OMAP_MUX_GATE(mcbsp5_fck, "core_l4_clkdm", mcbsp_15_clksel,
2191 OMAP343X_CTRL_REGADDR(OMAP343X_CONTROL_DEVCONF1),
2192 OMAP2_MCBSP5_CLKS_MASK,
2193 OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2194 OMAP3430_EN_MCBSP5_SHIFT, &clkhwops_wait,
2195 mcbsp1_fck_parent_names, clkout2_src_ck_ops);
2196
2197static struct clk mcbsp5_ick;
2198
2199static struct clk_hw_omap mcbsp5_ick_hw = {
2200 .hw = {
2201 .clk = &mcbsp5_ick,
2202 },
2203 .ops = &clkhwops_iclk_wait,
2204 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2205 .enable_bit = OMAP3430_EN_MCBSP5_SHIFT,
2206 .clkdm_name = "core_l4_clkdm",
2207};
2208
2209DEFINE_STRUCT_CLK(mcbsp5_ick, aes2_ick_parent_names, aes2_ick_ops);
2210
2211static struct clk mcspi1_fck;
2212
2213static struct clk_hw_omap mcspi1_fck_hw = {
2214 .hw = {
2215 .clk = &mcspi1_fck,
2216 },
2217 .ops = &clkhwops_wait,
2218 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2219 .enable_bit = OMAP3430_EN_MCSPI1_SHIFT,
2220 .clkdm_name = "core_l4_clkdm",
2221};
2222
2223DEFINE_STRUCT_CLK(mcspi1_fck, fshostusb_fck_parent_names, aes2_ick_ops);
2224
2225static struct clk mcspi1_ick;
2226
2227static struct clk_hw_omap mcspi1_ick_hw = {
2228 .hw = {
2229 .clk = &mcspi1_ick,
2230 },
2231 .ops = &clkhwops_iclk_wait,
2232 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2233 .enable_bit = OMAP3430_EN_MCSPI1_SHIFT,
2234 .clkdm_name = "core_l4_clkdm",
2235};
2236
2237DEFINE_STRUCT_CLK(mcspi1_ick, aes2_ick_parent_names, aes2_ick_ops);
2238
2239static struct clk mcspi2_fck;
2240
2241static struct clk_hw_omap mcspi2_fck_hw = {
2242 .hw = {
2243 .clk = &mcspi2_fck,
2244 },
2245 .ops = &clkhwops_wait,
2246 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2247 .enable_bit = OMAP3430_EN_MCSPI2_SHIFT,
2248 .clkdm_name = "core_l4_clkdm",
2249};
2250
2251DEFINE_STRUCT_CLK(mcspi2_fck, fshostusb_fck_parent_names, aes2_ick_ops);
2252
2253static struct clk mcspi2_ick;
2254
2255static struct clk_hw_omap mcspi2_ick_hw = {
2256 .hw = {
2257 .clk = &mcspi2_ick,
2258 },
2259 .ops = &clkhwops_iclk_wait,
2260 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2261 .enable_bit = OMAP3430_EN_MCSPI2_SHIFT,
2262 .clkdm_name = "core_l4_clkdm",
2263};
2264
2265DEFINE_STRUCT_CLK(mcspi2_ick, aes2_ick_parent_names, aes2_ick_ops);
2266
2267static struct clk mcspi3_fck;
2268
2269static struct clk_hw_omap mcspi3_fck_hw = {
2270 .hw = {
2271 .clk = &mcspi3_fck,
2272 },
2273 .ops = &clkhwops_wait,
2274 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2275 .enable_bit = OMAP3430_EN_MCSPI3_SHIFT,
2276 .clkdm_name = "core_l4_clkdm",
2277};
2278
2279DEFINE_STRUCT_CLK(mcspi3_fck, fshostusb_fck_parent_names, aes2_ick_ops);
2280
2281static struct clk mcspi3_ick;
2282
2283static struct clk_hw_omap mcspi3_ick_hw = {
2284 .hw = {
2285 .clk = &mcspi3_ick,
2286 },
2287 .ops = &clkhwops_iclk_wait,
2288 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2289 .enable_bit = OMAP3430_EN_MCSPI3_SHIFT,
2290 .clkdm_name = "core_l4_clkdm",
2291};
2292
2293DEFINE_STRUCT_CLK(mcspi3_ick, aes2_ick_parent_names, aes2_ick_ops);
2294
2295static struct clk mcspi4_fck;
2296
2297static struct clk_hw_omap mcspi4_fck_hw = {
2298 .hw = {
2299 .clk = &mcspi4_fck,
2300 },
2301 .ops = &clkhwops_wait,
2302 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2303 .enable_bit = OMAP3430_EN_MCSPI4_SHIFT,
2304 .clkdm_name = "core_l4_clkdm",
2305};
2306
2307DEFINE_STRUCT_CLK(mcspi4_fck, fshostusb_fck_parent_names, aes2_ick_ops);
2308
2309static struct clk mcspi4_ick;
2310
2311static struct clk_hw_omap mcspi4_ick_hw = {
2312 .hw = {
2313 .clk = &mcspi4_ick,
2314 },
2315 .ops = &clkhwops_iclk_wait,
2316 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2317 .enable_bit = OMAP3430_EN_MCSPI4_SHIFT,
2318 .clkdm_name = "core_l4_clkdm",
2319};
2320
2321DEFINE_STRUCT_CLK(mcspi4_ick, aes2_ick_parent_names, aes2_ick_ops);
2322
2323static struct clk mmchs1_fck;
2324
2325static struct clk_hw_omap mmchs1_fck_hw = {
2326 .hw = {
2327 .clk = &mmchs1_fck,
2328 },
2329 .ops = &clkhwops_wait,
2330 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2331 .enable_bit = OMAP3430_EN_MMC1_SHIFT,
2332 .clkdm_name = "core_l4_clkdm",
2333};
2334
2335DEFINE_STRUCT_CLK(mmchs1_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
2336
2337static struct clk mmchs1_ick;
2338
2339static struct clk_hw_omap mmchs1_ick_hw = {
2340 .hw = {
2341 .clk = &mmchs1_ick,
2342 },
2343 .ops = &clkhwops_iclk_wait,
2344 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2345 .enable_bit = OMAP3430_EN_MMC1_SHIFT,
2346 .clkdm_name = "core_l4_clkdm",
2347};
2348
2349DEFINE_STRUCT_CLK(mmchs1_ick, aes2_ick_parent_names, aes2_ick_ops);
2350
2351static struct clk mmchs2_fck;
2352
2353static struct clk_hw_omap mmchs2_fck_hw = {
2354 .hw = {
2355 .clk = &mmchs2_fck,
2356 },
2357 .ops = &clkhwops_wait,
2358 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2359 .enable_bit = OMAP3430_EN_MMC2_SHIFT,
2360 .clkdm_name = "core_l4_clkdm",
2361};
2362
2363DEFINE_STRUCT_CLK(mmchs2_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
2364
2365static struct clk mmchs2_ick;
2366
2367static struct clk_hw_omap mmchs2_ick_hw = {
2368 .hw = {
2369 .clk = &mmchs2_ick,
2370 },
2371 .ops = &clkhwops_iclk_wait,
2372 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2373 .enable_bit = OMAP3430_EN_MMC2_SHIFT,
2374 .clkdm_name = "core_l4_clkdm",
2375};
2376
2377DEFINE_STRUCT_CLK(mmchs2_ick, aes2_ick_parent_names, aes2_ick_ops);
2378
2379static struct clk mmchs3_fck;
2380
2381static struct clk_hw_omap mmchs3_fck_hw = {
2382 .hw = {
2383 .clk = &mmchs3_fck,
2384 },
2385 .ops = &clkhwops_wait,
2386 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2387 .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT,
2388 .clkdm_name = "core_l4_clkdm",
2389};
2390
2391DEFINE_STRUCT_CLK(mmchs3_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
2392
2393static struct clk mmchs3_ick;
2394
2395static struct clk_hw_omap mmchs3_ick_hw = {
2396 .hw = {
2397 .clk = &mmchs3_ick,
2398 },
2399 .ops = &clkhwops_iclk_wait,
2400 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2401 .enable_bit = OMAP3430ES2_EN_MMC3_SHIFT,
2402 .clkdm_name = "core_l4_clkdm",
2403};
2404
2405DEFINE_STRUCT_CLK(mmchs3_ick, aes2_ick_parent_names, aes2_ick_ops);
2406
2407static struct clk modem_fck;
2408
2409static struct clk_hw_omap modem_fck_hw = {
2410 .hw = {
2411 .clk = &modem_fck,
2412 },
2413 .ops = &clkhwops_iclk_wait,
2414 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2415 .enable_bit = OMAP3430_EN_MODEM_SHIFT,
2416 .clkdm_name = "d2d_clkdm",
2417};
2418
2419DEFINE_STRUCT_CLK(modem_fck, cpefuse_fck_parent_names, aes2_ick_ops);
2420
2421static struct clk mspro_fck;
2422
2423static struct clk_hw_omap mspro_fck_hw = {
2424 .hw = {
2425 .clk = &mspro_fck,
2426 },
2427 .ops = &clkhwops_wait,
2428 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2429 .enable_bit = OMAP3430_EN_MSPRO_SHIFT,
2430 .clkdm_name = "core_l4_clkdm",
2431};
2432
2433DEFINE_STRUCT_CLK(mspro_fck, csi2_96m_fck_parent_names, aes2_ick_ops);
2434
2435static struct clk mspro_ick;
2436
2437static struct clk_hw_omap mspro_ick_hw = {
2438 .hw = {
2439 .clk = &mspro_ick,
2440 },
2441 .ops = &clkhwops_iclk_wait,
2442 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2443 .enable_bit = OMAP3430_EN_MSPRO_SHIFT,
2444 .clkdm_name = "core_l4_clkdm",
2445};
2446
2447DEFINE_STRUCT_CLK(mspro_ick, aes2_ick_parent_names, aes2_ick_ops);
2448
2449static struct clk omap_192m_alwon_fck;
2450
2451DEFINE_STRUCT_CLK_HW_OMAP(omap_192m_alwon_fck, NULL);
2452DEFINE_STRUCT_CLK(omap_192m_alwon_fck, omap_96m_alwon_fck_parent_names,
2453 core_ck_ops);
2454
2455static struct clk omap_32ksync_ick;
2456
2457static struct clk_hw_omap omap_32ksync_ick_hw = {
2458 .hw = {
2459 .clk = &omap_32ksync_ick,
2460 },
2461 .ops = &clkhwops_iclk_wait,
2462 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
2463 .enable_bit = OMAP3430_EN_32KSYNC_SHIFT,
2464 .clkdm_name = "wkup_clkdm",
2465};
2466
2467DEFINE_STRUCT_CLK(omap_32ksync_ick, gpio1_ick_parent_names, aes2_ick_ops);
2468
2469static const struct clksel_rate omap_96m_alwon_fck_rates[] = {
2470 { .div = 1, .val = 1, .flags = RATE_IN_36XX },
2471 { .div = 2, .val = 2, .flags = RATE_IN_36XX },
2472 { .div = 0 }
2473};
2474
2475static const struct clksel omap_96m_alwon_fck_clksel[] = {
2476 { .parent = &omap_192m_alwon_fck, .rates = omap_96m_alwon_fck_rates },
2477 { .parent = NULL }
2478};
2479
2480static struct clk omap_96m_alwon_fck_3630;
2481
2482static const char *omap_96m_alwon_fck_3630_parent_names[] = {
2483 "omap_192m_alwon_fck",
2484};
2485
2486static const struct clk_ops omap_96m_alwon_fck_3630_ops = {
2487 .set_rate = &omap2_clksel_set_rate,
2488 .recalc_rate = &omap2_clksel_recalc,
2489 .round_rate = &omap2_clksel_round_rate,
2490};
2491
2492static struct clk_hw_omap omap_96m_alwon_fck_3630_hw = {
2493 .hw = {
2494 .clk = &omap_96m_alwon_fck_3630,
2495 },
2496 .clksel = omap_96m_alwon_fck_clksel,
2497 .clksel_reg = OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
2498 .clksel_mask = OMAP3630_CLKSEL_96M_MASK,
2499};
2500
2501static struct clk omap_96m_alwon_fck_3630 = {
2502 .name = "omap_96m_alwon_fck",
2503 .hw = &omap_96m_alwon_fck_3630_hw.hw,
2504 .parent_names = omap_96m_alwon_fck_3630_parent_names,
2505 .num_parents = ARRAY_SIZE(omap_96m_alwon_fck_3630_parent_names),
2506 .ops = &omap_96m_alwon_fck_3630_ops,
2507};
2508
2509static struct clk omapctrl_ick;
2510
2511static struct clk_hw_omap omapctrl_ick_hw = {
2512 .hw = {
2513 .clk = &omapctrl_ick,
2514 },
2515 .ops = &clkhwops_iclk_wait,
2516 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2517 .enable_bit = OMAP3430_EN_OMAPCTRL_SHIFT,
2518 .flags = ENABLE_ON_INIT,
2519 .clkdm_name = "core_l4_clkdm",
2520};
2521
2522DEFINE_STRUCT_CLK(omapctrl_ick, aes2_ick_parent_names, aes2_ick_ops);
2523
2524DEFINE_CLK_DIVIDER(pclk_fck, "emu_src_ck", &emu_src_ck, 0x0,
2525 OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
2526 OMAP3430_CLKSEL_PCLK_SHIFT, OMAP3430_CLKSEL_PCLK_WIDTH,
2527 CLK_DIVIDER_ONE_BASED, NULL);
2528
2529DEFINE_CLK_DIVIDER(pclkx2_fck, "emu_src_ck", &emu_src_ck, 0x0,
2530 OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
2531 OMAP3430_CLKSEL_PCLKX2_SHIFT, OMAP3430_CLKSEL_PCLKX2_WIDTH,
2532 CLK_DIVIDER_ONE_BASED, NULL);
2533
2534static struct clk per_48m_fck;
2535
2536DEFINE_STRUCT_CLK_HW_OMAP(per_48m_fck, "per_clkdm");
2537DEFINE_STRUCT_CLK(per_48m_fck, core_48m_fck_parent_names, core_l4_ick_ops);
2538
2539static struct clk security_l3_ick;
2540
2541DEFINE_STRUCT_CLK_HW_OMAP(security_l3_ick, NULL);
2542DEFINE_STRUCT_CLK(security_l3_ick, core_l3_ick_parent_names, core_ck_ops);
2543
2544static struct clk pka_ick;
2545
2546static const char *pka_ick_parent_names[] = {
2547 "security_l3_ick",
2548};
2549
2550static struct clk_hw_omap pka_ick_hw = {
2551 .hw = {
2552 .clk = &pka_ick,
2553 },
2554 .ops = &clkhwops_iclk_wait,
2555 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
2556 .enable_bit = OMAP3430_EN_PKA_SHIFT,
2557};
2558
2559DEFINE_STRUCT_CLK(pka_ick, pka_ick_parent_names, aes1_ick_ops);
2560
2561DEFINE_CLK_DIVIDER(rm_ick, "l4_ick", &l4_ick, 0x0,
2562 OMAP_CM_REGADDR(WKUP_MOD, CM_CLKSEL),
2563 OMAP3430_CLKSEL_RM_SHIFT, OMAP3430_CLKSEL_RM_WIDTH,
2564 CLK_DIVIDER_ONE_BASED, NULL);
2565
2566static struct clk rng_ick;
2567
2568static struct clk_hw_omap rng_ick_hw = {
2569 .hw = {
2570 .clk = &rng_ick,
2571 },
2572 .ops = &clkhwops_iclk_wait,
2573 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
2574 .enable_bit = OMAP3430_EN_RNG_SHIFT,
2575};
2576
2577DEFINE_STRUCT_CLK(rng_ick, aes1_ick_parent_names, aes1_ick_ops);
2578
2579static struct clk sad2d_ick;
2580
2581static struct clk_hw_omap sad2d_ick_hw = {
2582 .hw = {
2583 .clk = &sad2d_ick,
2584 },
2585 .ops = &clkhwops_iclk_wait,
2586 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2587 .enable_bit = OMAP3430_EN_SAD2D_SHIFT,
2588 .clkdm_name = "d2d_clkdm",
2589};
2590
2591DEFINE_STRUCT_CLK(sad2d_ick, core_l3_ick_parent_names, aes2_ick_ops);
2592
2593static struct clk sdrc_ick;
2594
2595static struct clk_hw_omap sdrc_ick_hw = {
2596 .hw = {
2597 .clk = &sdrc_ick,
2598 },
2599 .ops = &clkhwops_wait,
2600 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2601 .enable_bit = OMAP3430_EN_SDRC_SHIFT,
2602 .flags = ENABLE_ON_INIT,
2603 .clkdm_name = "core_l3_clkdm",
2604};
2605
2606DEFINE_STRUCT_CLK(sdrc_ick, ipss_ick_parent_names, aes2_ick_ops);
2607
2608static const struct clksel_rate sgx_core_rates[] = {
2609 { .div = 2, .val = 5, .flags = RATE_IN_36XX },
2610 { .div = 3, .val = 0, .flags = RATE_IN_3XXX },
2611 { .div = 4, .val = 1, .flags = RATE_IN_3XXX },
2612 { .div = 6, .val = 2, .flags = RATE_IN_3XXX },
2613 { .div = 0 }
2614};
2615
2616static const struct clksel_rate sgx_96m_rates[] = {
2617 { .div = 1, .val = 3, .flags = RATE_IN_3XXX },
2618 { .div = 0 }
2619};
2620
2621static const struct clksel_rate sgx_192m_rates[] = {
2622 { .div = 1, .val = 4, .flags = RATE_IN_36XX },
2623 { .div = 0 }
2624};
2625
2626static const struct clksel_rate sgx_corex2_rates[] = {
2627 { .div = 3, .val = 6, .flags = RATE_IN_36XX },
2628 { .div = 5, .val = 7, .flags = RATE_IN_36XX },
2629 { .div = 0 }
2630};
2631
2632static const struct clksel sgx_clksel[] = {
2633 { .parent = &core_ck, .rates = sgx_core_rates },
2634 { .parent = &cm_96m_fck, .rates = sgx_96m_rates },
2635 { .parent = &omap_192m_alwon_fck, .rates = sgx_192m_rates },
2636 { .parent = &corex2_fck, .rates = sgx_corex2_rates },
2637 { .parent = NULL },
2638};
2639
2640static const char *sgx_fck_parent_names[] = {
2641 "core_ck", "cm_96m_fck", "omap_192m_alwon_fck", "corex2_fck",
2642};
2643
2644static struct clk sgx_fck;
2645
2646static const struct clk_ops sgx_fck_ops = {
2647 .init = &omap2_init_clk_clkdm,
2648 .enable = &omap2_dflt_clk_enable,
2649 .disable = &omap2_dflt_clk_disable,
2650 .is_enabled = &omap2_dflt_clk_is_enabled,
2651 .recalc_rate = &omap2_clksel_recalc,
2652 .set_rate = &omap2_clksel_set_rate,
2653 .round_rate = &omap2_clksel_round_rate,
2654 .get_parent = &omap2_clksel_find_parent_index,
2655 .set_parent = &omap2_clksel_set_parent,
2656};
2657
2658DEFINE_CLK_OMAP_MUX_GATE(sgx_fck, "sgx_clkdm", sgx_clksel,
2659 OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_CLKSEL),
2660 OMAP3430ES2_CLKSEL_SGX_MASK,
2661 OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_FCLKEN),
2662 OMAP3430ES2_CM_FCLKEN_SGX_EN_SGX_SHIFT,
2663 &clkhwops_wait, sgx_fck_parent_names, sgx_fck_ops);
2664
2665static struct clk sgx_ick;
2666
2667static struct clk_hw_omap sgx_ick_hw = {
2668 .hw = {
2669 .clk = &sgx_ick,
2670 },
2671 .ops = &clkhwops_wait,
2672 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_SGX_MOD, CM_ICLKEN),
2673 .enable_bit = OMAP3430ES2_CM_ICLKEN_SGX_EN_SGX_SHIFT,
2674 .clkdm_name = "sgx_clkdm",
2675};
2676
2677DEFINE_STRUCT_CLK(sgx_ick, core_l3_ick_parent_names, aes2_ick_ops);
2678
2679static struct clk sha11_ick;
2680
2681static struct clk_hw_omap sha11_ick_hw = {
2682 .hw = {
2683 .clk = &sha11_ick,
2684 },
2685 .ops = &clkhwops_iclk_wait,
2686 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN2),
2687 .enable_bit = OMAP3430_EN_SHA11_SHIFT,
2688};
2689
2690DEFINE_STRUCT_CLK(sha11_ick, aes1_ick_parent_names, aes1_ick_ops);
2691
2692static struct clk sha12_ick;
2693
2694static struct clk_hw_omap sha12_ick_hw = {
2695 .hw = {
2696 .clk = &sha12_ick,
2697 },
2698 .ops = &clkhwops_iclk_wait,
2699 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2700 .enable_bit = OMAP3430_EN_SHA12_SHIFT,
2701 .clkdm_name = "core_l4_clkdm",
2702};
2703
2704DEFINE_STRUCT_CLK(sha12_ick, aes2_ick_parent_names, aes2_ick_ops);
2705
2706static struct clk sr1_fck;
2707
2708static struct clk_hw_omap sr1_fck_hw = {
2709 .hw = {
2710 .clk = &sr1_fck,
2711 },
2712 .ops = &clkhwops_wait,
2713 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
2714 .enable_bit = OMAP3430_EN_SR1_SHIFT,
2715 .clkdm_name = "wkup_clkdm",
2716};
2717
2718DEFINE_STRUCT_CLK(sr1_fck, cpefuse_fck_parent_names, aes2_ick_ops);
2719
2720static struct clk sr2_fck;
2721
2722static struct clk_hw_omap sr2_fck_hw = {
2723 .hw = {
2724 .clk = &sr2_fck,
2725 },
2726 .ops = &clkhwops_wait,
2727 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
2728 .enable_bit = OMAP3430_EN_SR2_SHIFT,
2729 .clkdm_name = "wkup_clkdm",
2730};
2731
2732DEFINE_STRUCT_CLK(sr2_fck, cpefuse_fck_parent_names, aes2_ick_ops);
2733
2734static struct clk sr_l4_ick;
2735
2736DEFINE_STRUCT_CLK_HW_OMAP(sr_l4_ick, "core_l4_clkdm");
2737DEFINE_STRUCT_CLK(sr_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
2738
2739static struct clk ssi_l4_ick;
2740
2741DEFINE_STRUCT_CLK_HW_OMAP(ssi_l4_ick, "core_l4_clkdm");
2742DEFINE_STRUCT_CLK(ssi_l4_ick, security_l4_ick2_parent_names, core_l4_ick_ops);
2743
2744static struct clk ssi_ick_3430es1;
2745
2746static const char *ssi_ick_3430es1_parent_names[] = {
2747 "ssi_l4_ick",
2748};
2749
2750static struct clk_hw_omap ssi_ick_3430es1_hw = {
2751 .hw = {
2752 .clk = &ssi_ick_3430es1,
2753 },
2754 .ops = &clkhwops_iclk,
2755 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2756 .enable_bit = OMAP3430_EN_SSI_SHIFT,
2757 .clkdm_name = "core_l4_clkdm",
2758};
2759
2760DEFINE_STRUCT_CLK(ssi_ick_3430es1, ssi_ick_3430es1_parent_names, aes2_ick_ops);
2761
2762static struct clk ssi_ick_3430es2;
2763
2764static struct clk_hw_omap ssi_ick_3430es2_hw = {
2765 .hw = {
2766 .clk = &ssi_ick_3430es2,
2767 },
2768 .ops = &clkhwops_omap3430es2_iclk_ssi_wait,
2769 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2770 .enable_bit = OMAP3430_EN_SSI_SHIFT,
2771 .clkdm_name = "core_l4_clkdm",
2772};
2773
2774DEFINE_STRUCT_CLK(ssi_ick_3430es2, ssi_ick_3430es1_parent_names, aes2_ick_ops);
2775
2776static const struct clksel_rate ssi_ssr_corex2_rates[] = {
2777 { .div = 1, .val = 1, .flags = RATE_IN_3XXX },
2778 { .div = 2, .val = 2, .flags = RATE_IN_3XXX },
2779 { .div = 3, .val = 3, .flags = RATE_IN_3XXX },
2780 { .div = 4, .val = 4, .flags = RATE_IN_3XXX },
2781 { .div = 6, .val = 6, .flags = RATE_IN_3XXX },
2782 { .div = 8, .val = 8, .flags = RATE_IN_3XXX },
2783 { .div = 0 }
2784};
2785
2786static const struct clksel ssi_ssr_clksel[] = {
2787 { .parent = &corex2_fck, .rates = ssi_ssr_corex2_rates },
2788 { .parent = NULL },
2789};
2790
2791static const char *ssi_ssr_fck_3430es1_parent_names[] = {
2792 "corex2_fck",
2793};
2794
2795static const struct clk_ops ssi_ssr_fck_3430es1_ops = {
2796 .init = &omap2_init_clk_clkdm,
2797 .enable = &omap2_dflt_clk_enable,
2798 .disable = &omap2_dflt_clk_disable,
2799 .is_enabled = &omap2_dflt_clk_is_enabled,
2800 .recalc_rate = &omap2_clksel_recalc,
2801 .set_rate = &omap2_clksel_set_rate,
2802 .round_rate = &omap2_clksel_round_rate,
2803};
2804
2805DEFINE_CLK_OMAP_MUX_GATE(ssi_ssr_fck_3430es1, "core_l4_clkdm",
2806 ssi_ssr_clksel, OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
2807 OMAP3430_CLKSEL_SSI_MASK,
2808 OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2809 OMAP3430_EN_SSI_SHIFT,
2810 NULL, ssi_ssr_fck_3430es1_parent_names,
2811 ssi_ssr_fck_3430es1_ops);
2812
2813DEFINE_CLK_OMAP_MUX_GATE(ssi_ssr_fck_3430es2, "core_l4_clkdm",
2814 ssi_ssr_clksel, OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
2815 OMAP3430_CLKSEL_SSI_MASK,
2816 OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2817 OMAP3430_EN_SSI_SHIFT,
2818 NULL, ssi_ssr_fck_3430es1_parent_names,
2819 ssi_ssr_fck_3430es1_ops);
2820
2821DEFINE_CLK_FIXED_FACTOR(ssi_sst_fck_3430es1, "ssi_ssr_fck_3430es1",
2822 &ssi_ssr_fck_3430es1, 0x0, 1, 2);
2823
2824DEFINE_CLK_FIXED_FACTOR(ssi_sst_fck_3430es2, "ssi_ssr_fck_3430es2",
2825 &ssi_ssr_fck_3430es2, 0x0, 1, 2);
2826
2827static struct clk sys_clkout1;
2828
2829static const char *sys_clkout1_parent_names[] = {
2830 "osc_sys_ck",
2831};
2832
2833static struct clk_hw_omap sys_clkout1_hw = {
2834 .hw = {
2835 .clk = &sys_clkout1,
2836 },
2837 .enable_reg = OMAP3430_PRM_CLKOUT_CTRL,
2838 .enable_bit = OMAP3430_CLKOUT_EN_SHIFT,
2839};
2840
2841DEFINE_STRUCT_CLK(sys_clkout1, sys_clkout1_parent_names, aes1_ick_ops);
2842
2843DEFINE_CLK_DIVIDER(sys_clkout2, "clkout2_src_ck", &clkout2_src_ck, 0x0,
2844 OMAP3430_CM_CLKOUT_CTRL, OMAP3430_CLKOUT2_DIV_SHIFT,
2845 OMAP3430_CLKOUT2_DIV_WIDTH, CLK_DIVIDER_POWER_OF_TWO, NULL);
2846
2847DEFINE_CLK_MUX(traceclk_src_fck, emu_src_ck_parent_names, NULL, 0x0,
2848 OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
2849 OMAP3430_TRACE_MUX_CTRL_SHIFT, OMAP3430_TRACE_MUX_CTRL_WIDTH,
2850 0x0, NULL);
2851
2852DEFINE_CLK_DIVIDER(traceclk_fck, "traceclk_src_fck", &traceclk_src_fck, 0x0,
2853 OMAP_CM_REGADDR(OMAP3430_EMU_MOD, CM_CLKSEL1),
2854 OMAP3430_CLKSEL_TRACECLK_SHIFT,
2855 OMAP3430_CLKSEL_TRACECLK_WIDTH, CLK_DIVIDER_ONE_BASED, NULL);
2856
2857static struct clk ts_fck;
2858
2859static struct clk_hw_omap ts_fck_hw = {
2860 .hw = {
2861 .clk = &ts_fck,
2862 },
2863 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
2864 .enable_bit = OMAP3430ES2_EN_TS_SHIFT,
2865 .clkdm_name = "core_l4_clkdm",
2866};
2867
2868DEFINE_STRUCT_CLK(ts_fck, wkup_32k_fck_parent_names, aes2_ick_ops);
2869
2870static struct clk uart1_fck;
2871
2872static struct clk_hw_omap uart1_fck_hw = {
2873 .hw = {
2874 .clk = &uart1_fck,
2875 },
2876 .ops = &clkhwops_wait,
2877 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2878 .enable_bit = OMAP3430_EN_UART1_SHIFT,
2879 .clkdm_name = "core_l4_clkdm",
2880};
2881
2882DEFINE_STRUCT_CLK(uart1_fck, fshostusb_fck_parent_names, aes2_ick_ops);
2883
2884static struct clk uart1_ick;
2885
2886static struct clk_hw_omap uart1_ick_hw = {
2887 .hw = {
2888 .clk = &uart1_ick,
2889 },
2890 .ops = &clkhwops_iclk_wait,
2891 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2892 .enable_bit = OMAP3430_EN_UART1_SHIFT,
2893 .clkdm_name = "core_l4_clkdm",
2894};
2895
2896DEFINE_STRUCT_CLK(uart1_ick, aes2_ick_parent_names, aes2_ick_ops);
2897
2898static struct clk uart2_fck;
2899
2900static struct clk_hw_omap uart2_fck_hw = {
2901 .hw = {
2902 .clk = &uart2_fck,
2903 },
2904 .ops = &clkhwops_wait,
2905 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2906 .enable_bit = OMAP3430_EN_UART2_SHIFT,
2907 .clkdm_name = "core_l4_clkdm",
2908};
2909
2910DEFINE_STRUCT_CLK(uart2_fck, fshostusb_fck_parent_names, aes2_ick_ops);
2911
2912static struct clk uart2_ick;
2913
2914static struct clk_hw_omap uart2_ick_hw = {
2915 .hw = {
2916 .clk = &uart2_ick,
2917 },
2918 .ops = &clkhwops_iclk_wait,
2919 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
2920 .enable_bit = OMAP3430_EN_UART2_SHIFT,
2921 .clkdm_name = "core_l4_clkdm",
2922};
2923
2924DEFINE_STRUCT_CLK(uart2_ick, aes2_ick_parent_names, aes2_ick_ops);
2925
2926static struct clk uart3_fck;
2927
2928static const char *uart3_fck_parent_names[] = {
2929 "per_48m_fck",
2930};
2931
2932static struct clk_hw_omap uart3_fck_hw = {
2933 .hw = {
2934 .clk = &uart3_fck,
2935 },
2936 .ops = &clkhwops_wait,
2937 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2938 .enable_bit = OMAP3430_EN_UART3_SHIFT,
2939 .clkdm_name = "per_clkdm",
2940};
2941
2942DEFINE_STRUCT_CLK(uart3_fck, uart3_fck_parent_names, aes2_ick_ops);
2943
2944static struct clk uart3_ick;
2945
2946static struct clk_hw_omap uart3_ick_hw = {
2947 .hw = {
2948 .clk = &uart3_ick,
2949 },
2950 .ops = &clkhwops_iclk_wait,
2951 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2952 .enable_bit = OMAP3430_EN_UART3_SHIFT,
2953 .clkdm_name = "per_clkdm",
2954};
2955
2956DEFINE_STRUCT_CLK(uart3_ick, gpio2_ick_parent_names, aes2_ick_ops);
2957
2958static struct clk uart4_fck;
2959
2960static struct clk_hw_omap uart4_fck_hw = {
2961 .hw = {
2962 .clk = &uart4_fck,
2963 },
2964 .ops = &clkhwops_wait,
2965 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
2966 .enable_bit = OMAP3630_EN_UART4_SHIFT,
2967 .clkdm_name = "per_clkdm",
2968};
2969
2970DEFINE_STRUCT_CLK(uart4_fck, uart3_fck_parent_names, aes2_ick_ops);
2971
2972static struct clk uart4_fck_am35xx;
2973
2974static struct clk_hw_omap uart4_fck_am35xx_hw = {
2975 .hw = {
2976 .clk = &uart4_fck_am35xx,
2977 },
2978 .ops = &clkhwops_wait,
2979 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_FCLKEN1),
2980 .enable_bit = AM35XX_EN_UART4_SHIFT,
2981 .clkdm_name = "core_l4_clkdm",
2982};
2983
2984DEFINE_STRUCT_CLK(uart4_fck_am35xx, fshostusb_fck_parent_names, aes2_ick_ops);
2985
2986static struct clk uart4_ick;
2987
2988static struct clk_hw_omap uart4_ick_hw = {
2989 .hw = {
2990 .clk = &uart4_ick,
2991 },
2992 .ops = &clkhwops_iclk_wait,
2993 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
2994 .enable_bit = OMAP3630_EN_UART4_SHIFT,
2995 .clkdm_name = "per_clkdm",
2996};
2997
2998DEFINE_STRUCT_CLK(uart4_ick, gpio2_ick_parent_names, aes2_ick_ops);
2999
3000static struct clk uart4_ick_am35xx;
3001
3002static struct clk_hw_omap uart4_ick_am35xx_hw = {
3003 .hw = {
3004 .clk = &uart4_ick_am35xx,
3005 },
3006 .ops = &clkhwops_iclk_wait,
3007 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
3008 .enable_bit = AM35XX_EN_UART4_SHIFT,
3009 .clkdm_name = "core_l4_clkdm",
3010};
3011
3012DEFINE_STRUCT_CLK(uart4_ick_am35xx, aes2_ick_parent_names, aes2_ick_ops);
3013
3014static const struct clksel_rate div2_rates[] = {
3015 { .div = 1, .val = 1, .flags = RATE_IN_3XXX },
3016 { .div = 2, .val = 2, .flags = RATE_IN_3XXX },
3017 { .div = 0 }
3018};
3019
3020static const struct clksel usb_l4_clksel[] = {
3021 { .parent = &l4_ick, .rates = div2_rates },
3022 { .parent = NULL },
3023};
3024
3025static const char *usb_l4_ick_parent_names[] = {
3026 "l4_ick",
3027};
3028
3029DEFINE_CLK_OMAP_MUX_GATE(usb_l4_ick, "core_l4_clkdm", usb_l4_clksel,
3030 OMAP_CM_REGADDR(CORE_MOD, CM_CLKSEL),
3031 OMAP3430ES1_CLKSEL_FSHOSTUSB_MASK,
3032 OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN1),
3033 OMAP3430ES1_EN_FSHOSTUSB_SHIFT,
3034 &clkhwops_iclk_wait, usb_l4_ick_parent_names,
3035 ssi_ssr_fck_3430es1_ops);
3036
3037static struct clk usbhost_120m_fck;
3038
3039static const char *usbhost_120m_fck_parent_names[] = {
3040 "dpll5_m2_ck",
3041};
3042
3043static struct clk_hw_omap usbhost_120m_fck_hw = {
3044 .hw = {
3045 .clk = &usbhost_120m_fck,
3046 },
3047 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
3048 .enable_bit = OMAP3430ES2_EN_USBHOST2_SHIFT,
3049 .clkdm_name = "usbhost_clkdm",
3050};
3051
3052DEFINE_STRUCT_CLK(usbhost_120m_fck, usbhost_120m_fck_parent_names,
3053 aes2_ick_ops);
3054
3055static struct clk usbhost_48m_fck;
3056
3057static struct clk_hw_omap usbhost_48m_fck_hw = {
3058 .hw = {
3059 .clk = &usbhost_48m_fck,
3060 },
3061 .ops = &clkhwops_omap3430es2_dss_usbhost_wait,
3062 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_FCLKEN),
3063 .enable_bit = OMAP3430ES2_EN_USBHOST1_SHIFT,
3064 .clkdm_name = "usbhost_clkdm",
3065};
3066
3067DEFINE_STRUCT_CLK(usbhost_48m_fck, core_48m_fck_parent_names, aes2_ick_ops);
3068
3069static struct clk usbhost_ick;
3070
3071static struct clk_hw_omap usbhost_ick_hw = {
3072 .hw = {
3073 .clk = &usbhost_ick,
3074 },
3075 .ops = &clkhwops_omap3430es2_iclk_dss_usbhost_wait,
3076 .enable_reg = OMAP_CM_REGADDR(OMAP3430ES2_USBHOST_MOD, CM_ICLKEN),
3077 .enable_bit = OMAP3430ES2_EN_USBHOST_SHIFT,
3078 .clkdm_name = "usbhost_clkdm",
3079};
3080
3081DEFINE_STRUCT_CLK(usbhost_ick, security_l4_ick2_parent_names, aes2_ick_ops);
3082
3083static struct clk usbtll_fck;
3084
3085static struct clk_hw_omap usbtll_fck_hw = {
3086 .hw = {
3087 .clk = &usbtll_fck,
3088 },
3089 .ops = &clkhwops_wait,
3090 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, OMAP3430ES2_CM_FCLKEN3),
3091 .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
3092 .clkdm_name = "core_l4_clkdm",
3093};
3094
3095DEFINE_STRUCT_CLK(usbtll_fck, usbhost_120m_fck_parent_names, aes2_ick_ops);
3096
3097static struct clk usbtll_ick;
3098
3099static struct clk_hw_omap usbtll_ick_hw = {
3100 .hw = {
3101 .clk = &usbtll_ick,
3102 },
3103 .ops = &clkhwops_iclk_wait,
3104 .enable_reg = OMAP_CM_REGADDR(CORE_MOD, CM_ICLKEN3),
3105 .enable_bit = OMAP3430ES2_EN_USBTLL_SHIFT,
3106 .clkdm_name = "core_l4_clkdm",
3107};
3108
3109DEFINE_STRUCT_CLK(usbtll_ick, aes2_ick_parent_names, aes2_ick_ops);
3110
3111static const struct clksel_rate usim_96m_rates[] = {
3112 { .div = 2, .val = 3, .flags = RATE_IN_3XXX },
3113 { .div = 4, .val = 4, .flags = RATE_IN_3XXX },
3114 { .div = 8, .val = 5, .flags = RATE_IN_3XXX },
3115 { .div = 10, .val = 6, .flags = RATE_IN_3XXX },
3116 { .div = 0 }
3117};
3118
3119static const struct clksel_rate usim_120m_rates[] = {
3120 { .div = 4, .val = 7, .flags = RATE_IN_3XXX },
3121 { .div = 8, .val = 8, .flags = RATE_IN_3XXX },
3122 { .div = 16, .val = 9, .flags = RATE_IN_3XXX },
3123 { .div = 20, .val = 10, .flags = RATE_IN_3XXX },
3124 { .div = 0 }
3125};
3126
3127static const struct clksel usim_clksel[] = {
3128 { .parent = &omap_96m_fck, .rates = usim_96m_rates },
3129 { .parent = &dpll5_m2_ck, .rates = usim_120m_rates },
3130 { .parent = &sys_ck, .rates = div2_rates },
3131 { .parent = NULL },
3132};
3133
3134static const char *usim_fck_parent_names[] = {
3135 "omap_96m_fck", "dpll5_m2_ck", "sys_ck",
3136};
3137
3138static struct clk usim_fck;
3139
3140static const struct clk_ops usim_fck_ops = {
3141 .enable = &omap2_dflt_clk_enable,
3142 .disable = &omap2_dflt_clk_disable,
3143 .is_enabled = &omap2_dflt_clk_is_enabled,
3144 .recalc_rate = &omap2_clksel_recalc,
3145 .get_parent = &omap2_clksel_find_parent_index,
3146 .set_parent = &omap2_clksel_set_parent,
3147};
3148
3149DEFINE_CLK_OMAP_MUX_GATE(usim_fck, NULL, usim_clksel,
3150 OMAP_CM_REGADDR(WKUP_MOD, CM_CLKSEL),
3151 OMAP3430ES2_CLKSEL_USIMOCP_MASK,
3152 OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
3153 OMAP3430ES2_EN_USIMOCP_SHIFT, &clkhwops_wait,
3154 usim_fck_parent_names, usim_fck_ops);
3155
3156static struct clk usim_ick;
3157
3158static struct clk_hw_omap usim_ick_hw = {
3159 .hw = {
3160 .clk = &usim_ick,
3161 },
3162 .ops = &clkhwops_iclk_wait,
3163 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
3164 .enable_bit = OMAP3430ES2_EN_USIMOCP_SHIFT,
3165 .clkdm_name = "wkup_clkdm",
3166};
3167
3168DEFINE_STRUCT_CLK(usim_ick, gpio1_ick_parent_names, aes2_ick_ops);
3169
3170static struct clk vpfe_fck;
3171
3172static const char *vpfe_fck_parent_names[] = {
3173 "pclk_ck",
3174};
3175
3176static struct clk_hw_omap vpfe_fck_hw = {
3177 .hw = {
3178 .clk = &vpfe_fck,
3179 },
3180 .enable_reg = OMAP343X_CTRL_REGADDR(AM35XX_CONTROL_IPSS_CLK_CTRL),
3181 .enable_bit = AM35XX_VPFE_FCLK_SHIFT,
3182};
3183
3184DEFINE_STRUCT_CLK(vpfe_fck, vpfe_fck_parent_names, aes1_ick_ops);
3185
3186static struct clk vpfe_ick;
3187
3188static struct clk_hw_omap vpfe_ick_hw = {
3189 .hw = {
3190 .clk = &vpfe_ick,
3191 },
3192 .ops = &clkhwops_am35xx_ipss_module_wait,
3193 .enable_reg = OMAP343X_CTRL_REGADDR(AM35XX_CONTROL_IPSS_CLK_CTRL),
3194 .enable_bit = AM35XX_VPFE_VBUSP_CLK_SHIFT,
3195 .clkdm_name = "core_l3_clkdm",
3196};
3197
3198DEFINE_STRUCT_CLK(vpfe_ick, emac_ick_parent_names, aes2_ick_ops);
3199
3200static struct clk wdt1_fck;
3201
3202DEFINE_STRUCT_CLK_HW_OMAP(wdt1_fck, "wkup_clkdm");
3203DEFINE_STRUCT_CLK(wdt1_fck, gpt12_fck_parent_names, core_l4_ick_ops);
3204
3205static struct clk wdt1_ick;
3206
3207static struct clk_hw_omap wdt1_ick_hw = {
3208 .hw = {
3209 .clk = &wdt1_ick,
3210 },
3211 .ops = &clkhwops_iclk_wait,
3212 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
3213 .enable_bit = OMAP3430_EN_WDT1_SHIFT,
3214 .clkdm_name = "wkup_clkdm",
3215};
3216
3217DEFINE_STRUCT_CLK(wdt1_ick, gpio1_ick_parent_names, aes2_ick_ops);
3218
3219static struct clk wdt2_fck;
3220
3221static struct clk_hw_omap wdt2_fck_hw = {
3222 .hw = {
3223 .clk = &wdt2_fck,
3224 },
3225 .ops = &clkhwops_wait,
3226 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_FCLKEN),
3227 .enable_bit = OMAP3430_EN_WDT2_SHIFT,
3228 .clkdm_name = "wkup_clkdm",
3229};
3230
3231DEFINE_STRUCT_CLK(wdt2_fck, gpio1_dbck_parent_names, aes2_ick_ops);
3232
3233static struct clk wdt2_ick;
3234
3235static struct clk_hw_omap wdt2_ick_hw = {
3236 .hw = {
3237 .clk = &wdt2_ick,
3238 },
3239 .ops = &clkhwops_iclk_wait,
3240 .enable_reg = OMAP_CM_REGADDR(WKUP_MOD, CM_ICLKEN),
3241 .enable_bit = OMAP3430_EN_WDT2_SHIFT,
3242 .clkdm_name = "wkup_clkdm",
3243};
3244
3245DEFINE_STRUCT_CLK(wdt2_ick, gpio1_ick_parent_names, aes2_ick_ops);
3246
3247static struct clk wdt3_fck;
3248
3249static struct clk_hw_omap wdt3_fck_hw = {
3250 .hw = {
3251 .clk = &wdt3_fck,
3252 },
3253 .ops = &clkhwops_wait,
3254 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_FCLKEN),
3255 .enable_bit = OMAP3430_EN_WDT3_SHIFT,
3256 .clkdm_name = "per_clkdm",
3257};
3258
3259DEFINE_STRUCT_CLK(wdt3_fck, gpio2_dbck_parent_names, aes2_ick_ops);
3260
3261static struct clk wdt3_ick;
3262
3263static struct clk_hw_omap wdt3_ick_hw = {
3264 .hw = {
3265 .clk = &wdt3_ick,
3266 },
3267 .ops = &clkhwops_iclk_wait,
3268 .enable_reg = OMAP_CM_REGADDR(OMAP3430_PER_MOD, CM_ICLKEN),
3269 .enable_bit = OMAP3430_EN_WDT3_SHIFT,
3270 .clkdm_name = "per_clkdm",
3271};
3272
3273DEFINE_STRUCT_CLK(wdt3_ick, gpio2_ick_parent_names, aes2_ick_ops);
3274
3275/*
3276 * clocks specific to omap3430es1
3277 */
3278static struct omap_clk omap3430es1_clks[] = {
3279 CLK(NULL, "gfx_l3_ck", &gfx_l3_ck),
3280 CLK(NULL, "gfx_l3_fck", &gfx_l3_fck),
3281 CLK(NULL, "gfx_l3_ick", &gfx_l3_ick),
3282 CLK(NULL, "gfx_cg1_ck", &gfx_cg1_ck),
3283 CLK(NULL, "gfx_cg2_ck", &gfx_cg2_ck),
3284 CLK(NULL, "d2d_26m_fck", &d2d_26m_fck),
3285 CLK(NULL, "fshostusb_fck", &fshostusb_fck),
3286 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es1),
3287 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es1),
3288 CLK("musb-omap2430", "ick", &hsotgusb_ick_3430es1),
3289 CLK(NULL, "hsotgusb_ick", &hsotgusb_ick_3430es1),
3290 CLK(NULL, "fac_ick", &fac_ick),
3291 CLK(NULL, "ssi_ick", &ssi_ick_3430es1),
3292 CLK(NULL, "usb_l4_ick", &usb_l4_ick),
3293 CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es1),
3294 CLK("omapdss_dss", "ick", &dss_ick_3430es1),
3295 CLK(NULL, "dss_ick", &dss_ick_3430es1),
3296};
3297
3298/*
3299 * clocks specific to am35xx
3300 */
3301static struct omap_clk am35xx_clks[] = {
3302 CLK(NULL, "ipss_ick", &ipss_ick),
3303 CLK(NULL, "rmii_ck", &rmii_ck),
3304 CLK(NULL, "pclk_ck", &pclk_ck),
3305 CLK(NULL, "emac_ick", &emac_ick),
3306 CLK(NULL, "emac_fck", &emac_fck),
3307 CLK("davinci_emac.0", NULL, &emac_ick),
3308 CLK("davinci_mdio.0", NULL, &emac_fck),
3309 CLK("vpfe-capture", "master", &vpfe_ick),
3310 CLK("vpfe-capture", "slave", &vpfe_fck),
3311 CLK(NULL, "hsotgusb_ick", &hsotgusb_ick_am35xx),
3312 CLK(NULL, "hsotgusb_fck", &hsotgusb_fck_am35xx),
3313 CLK(NULL, "hecc_ck", &hecc_ck),
3314 CLK(NULL, "uart4_ick", &uart4_ick_am35xx),
3315 CLK(NULL, "uart4_fck", &uart4_fck_am35xx),
3316};
3317
3318/*
3319 * clocks specific to omap36xx
3320 */
3321static struct omap_clk omap36xx_clks[] = {
3322 CLK(NULL, "omap_192m_alwon_fck", &omap_192m_alwon_fck),
3323 CLK(NULL, "uart4_fck", &uart4_fck),
3324};
3325
3326/*
3327 * clocks common to omap36xx omap34xx
3328 */
3329static struct omap_clk omap34xx_omap36xx_clks[] = {
3330 CLK(NULL, "aes1_ick", &aes1_ick),
3331 CLK("omap_rng", "ick", &rng_ick),
3332 CLK("omap3-rom-rng", "ick", &rng_ick),
3333 CLK(NULL, "sha11_ick", &sha11_ick),
3334 CLK(NULL, "des1_ick", &des1_ick),
3335 CLK(NULL, "cam_mclk", &cam_mclk),
3336 CLK(NULL, "cam_ick", &cam_ick),
3337 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck),
3338 CLK(NULL, "security_l3_ick", &security_l3_ick),
3339 CLK(NULL, "pka_ick", &pka_ick),
3340 CLK(NULL, "icr_ick", &icr_ick),
3341 CLK("omap-aes", "ick", &aes2_ick),
3342 CLK("omap-sham", "ick", &sha12_ick),
3343 CLK(NULL, "des2_ick", &des2_ick),
3344 CLK(NULL, "mspro_ick", &mspro_ick),
3345 CLK(NULL, "mailboxes_ick", &mailboxes_ick),
3346 CLK(NULL, "ssi_l4_ick", &ssi_l4_ick),
3347 CLK(NULL, "sr1_fck", &sr1_fck),
3348 CLK(NULL, "sr2_fck", &sr2_fck),
3349 CLK(NULL, "sr_l4_ick", &sr_l4_ick),
3350 CLK(NULL, "security_l4_ick2", &security_l4_ick2),
3351 CLK(NULL, "wkup_l4_ick", &wkup_l4_ick),
3352 CLK(NULL, "dpll2_fck", &dpll2_fck),
3353 CLK(NULL, "iva2_ck", &iva2_ck),
3354 CLK(NULL, "modem_fck", &modem_fck),
3355 CLK(NULL, "sad2d_ick", &sad2d_ick),
3356 CLK(NULL, "mad2d_ick", &mad2d_ick),
3357 CLK(NULL, "mspro_fck", &mspro_fck),
3358 CLK(NULL, "dpll2_ck", &dpll2_ck),
3359 CLK(NULL, "dpll2_m2_ck", &dpll2_m2_ck),
3360};
3361
3362/*
3363 * clocks common to omap36xx and omap3430es2plus
3364 */
3365static struct omap_clk omap36xx_omap3430es2plus_clks[] = {
3366 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es2),
3367 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es2),
3368 CLK("musb-omap2430", "ick", &hsotgusb_ick_3430es2),
3369 CLK(NULL, "hsotgusb_ick", &hsotgusb_ick_3430es2),
3370 CLK(NULL, "ssi_ick", &ssi_ick_3430es2),
3371 CLK(NULL, "usim_fck", &usim_fck),
3372 CLK(NULL, "usim_ick", &usim_ick),
3373};
3374
3375/*
3376 * clocks common to am35xx omap36xx and omap3430es2plus
3377 */
3378static struct omap_clk omap36xx_am35xx_omap3430es2plus_clks[] = {
3379 CLK(NULL, "virt_16_8m_ck", &virt_16_8m_ck),
3380 CLK(NULL, "dpll5_ck", &dpll5_ck),
3381 CLK(NULL, "dpll5_m2_ck", &dpll5_m2_ck),
3382 CLK(NULL, "sgx_fck", &sgx_fck),
3383 CLK(NULL, "sgx_ick", &sgx_ick),
3384 CLK(NULL, "cpefuse_fck", &cpefuse_fck),
3385 CLK(NULL, "ts_fck", &ts_fck),
3386 CLK(NULL, "usbtll_fck", &usbtll_fck),
3387 CLK(NULL, "usbtll_ick", &usbtll_ick),
3388 CLK("omap_hsmmc.2", "ick", &mmchs3_ick),
3389 CLK(NULL, "mmchs3_ick", &mmchs3_ick),
3390 CLK(NULL, "mmchs3_fck", &mmchs3_fck),
3391 CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es2),
3392 CLK("omapdss_dss", "ick", &dss_ick_3430es2),
3393 CLK(NULL, "dss_ick", &dss_ick_3430es2),
3394 CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck),
3395 CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck),
3396 CLK(NULL, "usbhost_ick", &usbhost_ick),
3397};
3398
3399/*
3400 * common clocks
3401 */
3402static struct omap_clk omap3xxx_clks[] = {
3403 CLK(NULL, "apb_pclk", &dummy_apb_pclk),
3404 CLK(NULL, "omap_32k_fck", &omap_32k_fck),
3405 CLK(NULL, "virt_12m_ck", &virt_12m_ck),
3406 CLK(NULL, "virt_13m_ck", &virt_13m_ck),
3407 CLK(NULL, "virt_19200000_ck", &virt_19200000_ck),
3408 CLK(NULL, "virt_26000000_ck", &virt_26000000_ck),
3409 CLK(NULL, "virt_38_4m_ck", &virt_38_4m_ck),
3410 CLK(NULL, "osc_sys_ck", &osc_sys_ck),
3411 CLK("twl", "fck", &osc_sys_ck),
3412 CLK(NULL, "sys_ck", &sys_ck),
3413 CLK(NULL, "omap_96m_alwon_fck", &omap_96m_alwon_fck),
3414 CLK("etb", "emu_core_alwon_ck", &emu_core_alwon_ck),
3415 CLK(NULL, "sys_altclk", &sys_altclk),
3416 CLK(NULL, "mcbsp_clks", &mcbsp_clks),
3417 CLK(NULL, "sys_clkout1", &sys_clkout1),
3418 CLK(NULL, "dpll1_ck", &dpll1_ck),
3419 CLK(NULL, "dpll1_x2_ck", &dpll1_x2_ck),
3420 CLK(NULL, "dpll1_x2m2_ck", &dpll1_x2m2_ck),
3421 CLK(NULL, "dpll3_ck", &dpll3_ck),
3422 CLK(NULL, "core_ck", &core_ck),
3423 CLK(NULL, "dpll3_x2_ck", &dpll3_x2_ck),
3424 CLK(NULL, "dpll3_m2_ck", &dpll3_m2_ck),
3425 CLK(NULL, "dpll3_m2x2_ck", &dpll3_m2x2_ck),
3426 CLK(NULL, "dpll3_m3_ck", &dpll3_m3_ck),
3427 CLK(NULL, "dpll3_m3x2_ck", &dpll3_m3x2_ck),
3428 CLK(NULL, "dpll4_ck", &dpll4_ck),
3429 CLK(NULL, "dpll4_x2_ck", &dpll4_x2_ck),
3430 CLK(NULL, "omap_96m_fck", &omap_96m_fck),
3431 CLK(NULL, "cm_96m_fck", &cm_96m_fck),
3432 CLK(NULL, "omap_54m_fck", &omap_54m_fck),
3433 CLK(NULL, "omap_48m_fck", &omap_48m_fck),
3434 CLK(NULL, "omap_12m_fck", &omap_12m_fck),
3435 CLK(NULL, "dpll4_m2_ck", &dpll4_m2_ck),
3436 CLK(NULL, "dpll4_m2x2_ck", &dpll4_m2x2_ck),
3437 CLK(NULL, "dpll4_m3_ck", &dpll4_m3_ck),
3438 CLK(NULL, "dpll4_m3x2_ck", &dpll4_m3x2_ck),
3439 CLK(NULL, "dpll4_m4_ck", &dpll4_m4_ck),
3440 CLK(NULL, "dpll4_m4x2_ck", &dpll4_m4x2_ck),
3441 CLK(NULL, "dpll4_m5_ck", &dpll4_m5_ck),
3442 CLK(NULL, "dpll4_m5x2_ck", &dpll4_m5x2_ck),
3443 CLK(NULL, "dpll4_m6_ck", &dpll4_m6_ck),
3444 CLK(NULL, "dpll4_m6x2_ck", &dpll4_m6x2_ck),
3445 CLK("etb", "emu_per_alwon_ck", &emu_per_alwon_ck),
3446 CLK(NULL, "clkout2_src_ck", &clkout2_src_ck),
3447 CLK(NULL, "sys_clkout2", &sys_clkout2),
3448 CLK(NULL, "corex2_fck", &corex2_fck),
3449 CLK(NULL, "dpll1_fck", &dpll1_fck),
3450 CLK(NULL, "mpu_ck", &mpu_ck),
3451 CLK(NULL, "arm_fck", &arm_fck),
3452 CLK("etb", "emu_mpu_alwon_ck", &emu_mpu_alwon_ck),
3453 CLK(NULL, "l3_ick", &l3_ick),
3454 CLK(NULL, "l4_ick", &l4_ick),
3455 CLK(NULL, "rm_ick", &rm_ick),
3456 CLK(NULL, "gpt10_fck", &gpt10_fck),
3457 CLK(NULL, "gpt11_fck", &gpt11_fck),
3458 CLK(NULL, "core_96m_fck", &core_96m_fck),
3459 CLK(NULL, "mmchs2_fck", &mmchs2_fck),
3460 CLK(NULL, "mmchs1_fck", &mmchs1_fck),
3461 CLK(NULL, "i2c3_fck", &i2c3_fck),
3462 CLK(NULL, "i2c2_fck", &i2c2_fck),
3463 CLK(NULL, "i2c1_fck", &i2c1_fck),
3464 CLK(NULL, "mcbsp5_fck", &mcbsp5_fck),
3465 CLK(NULL, "mcbsp1_fck", &mcbsp1_fck),
3466 CLK(NULL, "core_48m_fck", &core_48m_fck),
3467 CLK(NULL, "mcspi4_fck", &mcspi4_fck),
3468 CLK(NULL, "mcspi3_fck", &mcspi3_fck),
3469 CLK(NULL, "mcspi2_fck", &mcspi2_fck),
3470 CLK(NULL, "mcspi1_fck", &mcspi1_fck),
3471 CLK(NULL, "uart2_fck", &uart2_fck),
3472 CLK(NULL, "uart1_fck", &uart1_fck),
3473 CLK(NULL, "core_12m_fck", &core_12m_fck),
3474 CLK("omap_hdq.0", "fck", &hdq_fck),
3475 CLK(NULL, "hdq_fck", &hdq_fck),
3476 CLK(NULL, "core_l3_ick", &core_l3_ick),
3477 CLK(NULL, "sdrc_ick", &sdrc_ick),
3478 CLK(NULL, "gpmc_fck", &gpmc_fck),
3479 CLK(NULL, "core_l4_ick", &core_l4_ick),
3480 CLK("omap_hsmmc.1", "ick", &mmchs2_ick),
3481 CLK("omap_hsmmc.0", "ick", &mmchs1_ick),
3482 CLK(NULL, "mmchs2_ick", &mmchs2_ick),
3483 CLK(NULL, "mmchs1_ick", &mmchs1_ick),
3484 CLK("omap_hdq.0", "ick", &hdq_ick),
3485 CLK(NULL, "hdq_ick", &hdq_ick),
3486 CLK("omap2_mcspi.4", "ick", &mcspi4_ick),
3487 CLK("omap2_mcspi.3", "ick", &mcspi3_ick),
3488 CLK("omap2_mcspi.2", "ick", &mcspi2_ick),
3489 CLK("omap2_mcspi.1", "ick", &mcspi1_ick),
3490 CLK(NULL, "mcspi4_ick", &mcspi4_ick),
3491 CLK(NULL, "mcspi3_ick", &mcspi3_ick),
3492 CLK(NULL, "mcspi2_ick", &mcspi2_ick),
3493 CLK(NULL, "mcspi1_ick", &mcspi1_ick),
3494 CLK("omap_i2c.3", "ick", &i2c3_ick),
3495 CLK("omap_i2c.2", "ick", &i2c2_ick),
3496 CLK("omap_i2c.1", "ick", &i2c1_ick),
3497 CLK(NULL, "i2c3_ick", &i2c3_ick),
3498 CLK(NULL, "i2c2_ick", &i2c2_ick),
3499 CLK(NULL, "i2c1_ick", &i2c1_ick),
3500 CLK(NULL, "uart2_ick", &uart2_ick),
3501 CLK(NULL, "uart1_ick", &uart1_ick),
3502 CLK(NULL, "gpt11_ick", &gpt11_ick),
3503 CLK(NULL, "gpt10_ick", &gpt10_ick),
3504 CLK("omap-mcbsp.5", "ick", &mcbsp5_ick),
3505 CLK("omap-mcbsp.1", "ick", &mcbsp1_ick),
3506 CLK(NULL, "mcbsp5_ick", &mcbsp5_ick),
3507 CLK(NULL, "mcbsp1_ick", &mcbsp1_ick),
3508 CLK(NULL, "omapctrl_ick", &omapctrl_ick),
3509 CLK(NULL, "dss_tv_fck", &dss_tv_fck),
3510 CLK(NULL, "dss_96m_fck", &dss_96m_fck),
3511 CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck),
3512 CLK(NULL, "init_60m_fclk", &dummy_ck),
3513 CLK(NULL, "gpt1_fck", &gpt1_fck),
3514 CLK(NULL, "aes2_ick", &aes2_ick),
3515 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck),
3516 CLK(NULL, "gpio1_dbck", &gpio1_dbck),
3517 CLK(NULL, "sha12_ick", &sha12_ick),
3518 CLK(NULL, "wdt2_fck", &wdt2_fck),
3519 CLK("omap_wdt", "ick", &wdt2_ick),
3520 CLK(NULL, "wdt2_ick", &wdt2_ick),
3521 CLK(NULL, "wdt1_ick", &wdt1_ick),
3522 CLK(NULL, "gpio1_ick", &gpio1_ick),
3523 CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick),
3524 CLK(NULL, "gpt12_ick", &gpt12_ick),
3525 CLK(NULL, "gpt1_ick", &gpt1_ick),
3526 CLK(NULL, "per_96m_fck", &per_96m_fck),
3527 CLK(NULL, "per_48m_fck", &per_48m_fck),
3528 CLK(NULL, "uart3_fck", &uart3_fck),
3529 CLK(NULL, "gpt2_fck", &gpt2_fck),
3530 CLK(NULL, "gpt3_fck", &gpt3_fck),
3531 CLK(NULL, "gpt4_fck", &gpt4_fck),
3532 CLK(NULL, "gpt5_fck", &gpt5_fck),
3533 CLK(NULL, "gpt6_fck", &gpt6_fck),
3534 CLK(NULL, "gpt7_fck", &gpt7_fck),
3535 CLK(NULL, "gpt8_fck", &gpt8_fck),
3536 CLK(NULL, "gpt9_fck", &gpt9_fck),
3537 CLK(NULL, "per_32k_alwon_fck", &per_32k_alwon_fck),
3538 CLK(NULL, "gpio6_dbck", &gpio6_dbck),
3539 CLK(NULL, "gpio5_dbck", &gpio5_dbck),
3540 CLK(NULL, "gpio4_dbck", &gpio4_dbck),
3541 CLK(NULL, "gpio3_dbck", &gpio3_dbck),
3542 CLK(NULL, "gpio2_dbck", &gpio2_dbck),
3543 CLK(NULL, "wdt3_fck", &wdt3_fck),
3544 CLK(NULL, "per_l4_ick", &per_l4_ick),
3545 CLK(NULL, "gpio6_ick", &gpio6_ick),
3546 CLK(NULL, "gpio5_ick", &gpio5_ick),
3547 CLK(NULL, "gpio4_ick", &gpio4_ick),
3548 CLK(NULL, "gpio3_ick", &gpio3_ick),
3549 CLK(NULL, "gpio2_ick", &gpio2_ick),
3550 CLK(NULL, "wdt3_ick", &wdt3_ick),
3551 CLK(NULL, "uart3_ick", &uart3_ick),
3552 CLK(NULL, "uart4_ick", &uart4_ick),
3553 CLK(NULL, "gpt9_ick", &gpt9_ick),
3554 CLK(NULL, "gpt8_ick", &gpt8_ick),
3555 CLK(NULL, "gpt7_ick", &gpt7_ick),
3556 CLK(NULL, "gpt6_ick", &gpt6_ick),
3557 CLK(NULL, "gpt5_ick", &gpt5_ick),
3558 CLK(NULL, "gpt4_ick", &gpt4_ick),
3559 CLK(NULL, "gpt3_ick", &gpt3_ick),
3560 CLK(NULL, "gpt2_ick", &gpt2_ick),
3561 CLK("omap-mcbsp.2", "ick", &mcbsp2_ick),
3562 CLK("omap-mcbsp.3", "ick", &mcbsp3_ick),
3563 CLK("omap-mcbsp.4", "ick", &mcbsp4_ick),
3564 CLK(NULL, "mcbsp4_ick", &mcbsp2_ick),
3565 CLK(NULL, "mcbsp3_ick", &mcbsp3_ick),
3566 CLK(NULL, "mcbsp2_ick", &mcbsp4_ick),
3567 CLK(NULL, "mcbsp2_fck", &mcbsp2_fck),
3568 CLK(NULL, "mcbsp3_fck", &mcbsp3_fck),
3569 CLK(NULL, "mcbsp4_fck", &mcbsp4_fck),
3570 CLK("etb", "emu_src_ck", &emu_src_ck),
3571 CLK(NULL, "emu_src_ck", &emu_src_ck),
3572 CLK(NULL, "pclk_fck", &pclk_fck),
3573 CLK(NULL, "pclkx2_fck", &pclkx2_fck),
3574 CLK(NULL, "atclk_fck", &atclk_fck),
3575 CLK(NULL, "traceclk_src_fck", &traceclk_src_fck),
3576 CLK(NULL, "traceclk_fck", &traceclk_fck),
3577 CLK(NULL, "secure_32k_fck", &secure_32k_fck),
3578 CLK(NULL, "gpt12_fck", &gpt12_fck),
3579 CLK(NULL, "wdt1_fck", &wdt1_fck),
3580 CLK(NULL, "timer_32k_ck", &omap_32k_fck),
3581 CLK(NULL, "timer_sys_ck", &sys_ck),
3582 CLK(NULL, "cpufreq_ck", &dpll1_ck),
3583};
3584
3585static const char *enable_init_clks[] = {
3586 "sdrc_ick",
3587 "gpmc_fck",
3588 "omapctrl_ick",
3589};
3590
3591int __init omap3xxx_clk_init(void)
3592{
3593 if (omap3_has_192mhz_clk())
3594 omap_96m_alwon_fck = omap_96m_alwon_fck_3630;
3595
3596 if (cpu_is_omap3630()) {
3597 dpll3_m3x2_ck = dpll3_m3x2_ck_3630;
3598 dpll4_m2x2_ck = dpll4_m2x2_ck_3630;
3599 dpll4_m3x2_ck = dpll4_m3x2_ck_3630;
3600 dpll4_m4x2_ck = dpll4_m4x2_ck_3630;
3601 dpll4_m5x2_ck = dpll4_m5x2_ck_3630;
3602 dpll4_m6x2_ck = dpll4_m6x2_ck_3630;
3603 }
3604
3605 /*
3606 * XXX This type of dynamic rewriting of the clock tree is
3607 * deprecated and should be revised soon.
3608 */
3609 if (cpu_is_omap3630())
3610 dpll4_dd = dpll4_dd_3630;
3611 else
3612 dpll4_dd = dpll4_dd_34xx;
3613
3614
3615 /*
3616 * 3505 must be tested before 3517, since 3517 returns true
3617 * for both AM3517 chips and AM3517 family chips, which
3618 * includes 3505. Unfortunately there's no obvious family
3619 * test for 3517/3505 :-(
3620 */
3621 if (soc_is_am35xx()) {
3622 cpu_mask = RATE_IN_34XX;
3623 omap_clocks_register(am35xx_clks, ARRAY_SIZE(am35xx_clks));
3624 omap_clocks_register(omap36xx_am35xx_omap3430es2plus_clks,
3625 ARRAY_SIZE(omap36xx_am35xx_omap3430es2plus_clks));
3626 omap_clocks_register(omap3xxx_clks, ARRAY_SIZE(omap3xxx_clks));
3627 } else if (cpu_is_omap3630()) {
3628 cpu_mask = (RATE_IN_34XX | RATE_IN_36XX);
3629 omap_clocks_register(omap36xx_clks, ARRAY_SIZE(omap36xx_clks));
3630 omap_clocks_register(omap36xx_omap3430es2plus_clks,
3631 ARRAY_SIZE(omap36xx_omap3430es2plus_clks));
3632 omap_clocks_register(omap34xx_omap36xx_clks,
3633 ARRAY_SIZE(omap34xx_omap36xx_clks));
3634 omap_clocks_register(omap36xx_am35xx_omap3430es2plus_clks,
3635 ARRAY_SIZE(omap36xx_am35xx_omap3430es2plus_clks));
3636 omap_clocks_register(omap3xxx_clks, ARRAY_SIZE(omap3xxx_clks));
3637 } else if (cpu_is_omap34xx()) {
3638 if (omap_rev() == OMAP3430_REV_ES1_0) {
3639 cpu_mask = RATE_IN_3430ES1;
3640 omap_clocks_register(omap3430es1_clks,
3641 ARRAY_SIZE(omap3430es1_clks));
3642 omap_clocks_register(omap34xx_omap36xx_clks,
3643 ARRAY_SIZE(omap34xx_omap36xx_clks));
3644 omap_clocks_register(omap3xxx_clks,
3645 ARRAY_SIZE(omap3xxx_clks));
3646 } else {
3647 /*
3648 * Assume that anything that we haven't matched yet
3649 * has 3430ES2-type clocks.
3650 */
3651 cpu_mask = RATE_IN_3430ES2PLUS;
3652 omap_clocks_register(omap34xx_omap36xx_clks,
3653 ARRAY_SIZE(omap34xx_omap36xx_clks));
3654 omap_clocks_register(omap36xx_omap3430es2plus_clks,
3655 ARRAY_SIZE(omap36xx_omap3430es2plus_clks));
3656 omap_clocks_register(omap36xx_am35xx_omap3430es2plus_clks,
3657 ARRAY_SIZE(omap36xx_am35xx_omap3430es2plus_clks));
3658 omap_clocks_register(omap3xxx_clks,
3659 ARRAY_SIZE(omap3xxx_clks));
3660 }
3661 } else {
3662 WARN(1, "clock: could not identify OMAP3 variant\n");
3663 }
3664
3665 omap2_clk_disable_autoidle_all();
3666
3667 omap2_clk_enable_init_clocks(enable_init_clks,
3668 ARRAY_SIZE(enable_init_clks));
3669
3670 pr_info("Clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
3671 (clk_get_rate(&osc_sys_ck) / 1000000),
3672 (clk_get_rate(&osc_sys_ck) / 100000) % 10,
3673 (clk_get_rate(&core_ck) / 1000000),
3674 (clk_get_rate(&arm_fck) / 1000000));
3675
3676 /*
3677 * Lock DPLL5 -- here only until other device init code can
3678 * handle this
3679 */
3680 if (omap_rev() >= OMAP3430_REV_ES2_0)
3681 omap3_clk_lock_dpll5();
3682
3683 /* Avoid sleeping during omap3_core_dpll_m2_set_rate() */
3684 sdrc_ick_p = clk_get(NULL, "sdrc_ick");
3685 arm_fck_p = clk_get(NULL, "arm_fck");
3686
3687 return 0;
3688}
diff --git a/arch/arm/mach-omap2/clock.c b/arch/arm/mach-omap2/clock.c
index 4ae4ccebced2..6124db5c37ae 100644
--- a/arch/arm/mach-omap2/clock.c
+++ b/arch/arm/mach-omap2/clock.c
@@ -23,7 +23,6 @@
23#include <linux/clk-provider.h> 23#include <linux/clk-provider.h>
24#include <linux/io.h> 24#include <linux/io.h>
25#include <linux/bitops.h> 25#include <linux/bitops.h>
26#include <linux/clk-private.h>
27#include <asm/cpu.h> 26#include <asm/cpu.h>
28 27
29#include <trace/events/power.h> 28#include <trace/events/power.h>
@@ -633,21 +632,6 @@ const struct clk_hw_omap_ops clkhwops_wait = {
633}; 632};
634 633
635/** 634/**
636 * omap_clocks_register - register an array of omap_clk
637 * @ocs: pointer to an array of omap_clk to register
638 */
639void __init omap_clocks_register(struct omap_clk oclks[], int cnt)
640{
641 struct omap_clk *c;
642
643 for (c = oclks; c < oclks + cnt; c++) {
644 clkdev_add(&c->lk);
645 if (!__clk_init(NULL, c->lk.clk))
646 omap2_init_clk_hw_omap_clocks(c->lk.clk);
647 }
648}
649
650/**
651 * omap2_clk_switch_mpurate_at_boot - switch ARM MPU rate by boot-time argument 635 * omap2_clk_switch_mpurate_at_boot - switch ARM MPU rate by boot-time argument
652 * @mpurate_ck_name: clk name of the clock to change rate 636 * @mpurate_ck_name: clk name of the clock to change rate
653 * 637 *
diff --git a/arch/arm/mach-omap2/clock.h b/arch/arm/mach-omap2/clock.h
index 1cf9dd85248a..a56742f96000 100644
--- a/arch/arm/mach-omap2/clock.h
+++ b/arch/arm/mach-omap2/clock.h
@@ -40,23 +40,29 @@ struct omap_clk {
40struct clockdomain; 40struct clockdomain;
41 41
42#define DEFINE_STRUCT_CLK(_name, _parent_array_name, _clkops_name) \ 42#define DEFINE_STRUCT_CLK(_name, _parent_array_name, _clkops_name) \
43 static struct clk _name = { \ 43 static struct clk_core _name##_core = { \
44 .name = #_name, \ 44 .name = #_name, \
45 .hw = &_name##_hw.hw, \ 45 .hw = &_name##_hw.hw, \
46 .parent_names = _parent_array_name, \ 46 .parent_names = _parent_array_name, \
47 .num_parents = ARRAY_SIZE(_parent_array_name), \ 47 .num_parents = ARRAY_SIZE(_parent_array_name), \
48 .ops = &_clkops_name, \ 48 .ops = &_clkops_name, \
49 }; \
50 static struct clk _name = { \
51 .core = &_name##_core, \
49 }; 52 };
50 53
51#define DEFINE_STRUCT_CLK_FLAGS(_name, _parent_array_name, \ 54#define DEFINE_STRUCT_CLK_FLAGS(_name, _parent_array_name, \
52 _clkops_name, _flags) \ 55 _clkops_name, _flags) \
53 static struct clk _name = { \ 56 static struct clk_core _name##_core = { \
54 .name = #_name, \ 57 .name = #_name, \
55 .hw = &_name##_hw.hw, \ 58 .hw = &_name##_hw.hw, \
56 .parent_names = _parent_array_name, \ 59 .parent_names = _parent_array_name, \
57 .num_parents = ARRAY_SIZE(_parent_array_name), \ 60 .num_parents = ARRAY_SIZE(_parent_array_name), \
58 .ops = &_clkops_name, \ 61 .ops = &_clkops_name, \
59 .flags = _flags, \ 62 .flags = _flags, \
63 }; \
64 static struct clk _name = { \
65 .core = &_name##_core, \
60 }; 66 };
61 67
62#define DEFINE_STRUCT_CLK_HW_OMAP(_name, _clkdm_name) \ 68#define DEFINE_STRUCT_CLK_HW_OMAP(_name, _clkdm_name) \
@@ -238,7 +244,6 @@ struct ti_clk_features {
238extern struct ti_clk_features ti_clk_features; 244extern struct ti_clk_features ti_clk_features;
239 245
240extern const struct clkops clkops_omap2_dflt_wait; 246extern const struct clkops clkops_omap2_dflt_wait;
241extern const struct clkops clkops_dummy;
242extern const struct clkops clkops_omap2_dflt; 247extern const struct clkops clkops_omap2_dflt;
243 248
244extern struct clk_functions omap2_clk_functions; 249extern struct clk_functions omap2_clk_functions;
@@ -247,7 +252,6 @@ extern const struct clksel_rate gpt_32k_rates[];
247extern const struct clksel_rate gpt_sys_rates[]; 252extern const struct clksel_rate gpt_sys_rates[];
248extern const struct clksel_rate gfx_l3_rates[]; 253extern const struct clksel_rate gfx_l3_rates[];
249extern const struct clksel_rate dsp_ick_rates[]; 254extern const struct clksel_rate dsp_ick_rates[];
250extern struct clk dummy_ck;
251 255
252extern const struct clk_hw_omap_ops clkhwops_iclk_wait; 256extern const struct clk_hw_omap_ops clkhwops_iclk_wait;
253extern const struct clk_hw_omap_ops clkhwops_wait; 257extern const struct clk_hw_omap_ops clkhwops_wait;
@@ -272,7 +276,5 @@ extern void __iomem *clk_memmaps[];
272extern int omap2_clkops_enable_clkdm(struct clk_hw *hw); 276extern int omap2_clkops_enable_clkdm(struct clk_hw *hw);
273extern void omap2_clkops_disable_clkdm(struct clk_hw *hw); 277extern void omap2_clkops_disable_clkdm(struct clk_hw *hw);
274 278
275extern void omap_clocks_register(struct omap_clk *oclks, int cnt);
276
277void __init ti_clk_init_features(void); 279void __init ti_clk_init_features(void);
278#endif 280#endif
diff --git a/arch/arm/mach-omap2/clock_common_data.c b/arch/arm/mach-omap2/clock_common_data.c
index ef4d21bfb964..61b60dfb14ce 100644
--- a/arch/arm/mach-omap2/clock_common_data.c
+++ b/arch/arm/mach-omap2/clock_common_data.c
@@ -16,7 +16,6 @@
16 * OMAP3xxx clock definition files. 16 * OMAP3xxx clock definition files.
17 */ 17 */
18 18
19#include <linux/clk-private.h>
20#include "clock.h" 19#include "clock.h"
21 20
22/* clksel_rate data common to 24xx/343x */ 21/* clksel_rate data common to 24xx/343x */
@@ -114,13 +113,3 @@ const struct clksel_rate div31_1to31_rates[] = {
114 { .div = 31, .val = 31, .flags = RATE_IN_4430 | RATE_IN_AM33XX }, 113 { .div = 31, .val = 31, .flags = RATE_IN_4430 | RATE_IN_AM33XX },
115 { .div = 0 }, 114 { .div = 0 },
116}; 115};
117
118/* Clocks shared between various OMAP SoCs */
119
120static struct clk_ops dummy_ck_ops = {};
121
122struct clk dummy_ck = {
123 .name = "dummy_clk",
124 .ops = &dummy_ck_ops,
125 .flags = CLK_IS_BASIC,
126};
diff --git a/arch/arm/mach-omap2/dpll3xxx.c b/arch/arm/mach-omap2/dpll3xxx.c
index c2da2a0fe5ad..44e57ec225d4 100644
--- a/arch/arm/mach-omap2/dpll3xxx.c
+++ b/arch/arm/mach-omap2/dpll3xxx.c
@@ -410,7 +410,7 @@ int omap3_noncore_dpll_enable(struct clk_hw *hw)
410 struct clk_hw_omap *clk = to_clk_hw_omap(hw); 410 struct clk_hw_omap *clk = to_clk_hw_omap(hw);
411 int r; 411 int r;
412 struct dpll_data *dd; 412 struct dpll_data *dd;
413 struct clk *parent; 413 struct clk_hw *parent;
414 414
415 dd = clk->dpll_data; 415 dd = clk->dpll_data;
416 if (!dd) 416 if (!dd)
@@ -427,13 +427,13 @@ int omap3_noncore_dpll_enable(struct clk_hw *hw)
427 } 427 }
428 } 428 }
429 429
430 parent = __clk_get_parent(hw->clk); 430 parent = __clk_get_hw(__clk_get_parent(hw->clk));
431 431
432 if (__clk_get_rate(hw->clk) == __clk_get_rate(dd->clk_bypass)) { 432 if (__clk_get_rate(hw->clk) == __clk_get_rate(dd->clk_bypass)) {
433 WARN_ON(parent != dd->clk_bypass); 433 WARN_ON(parent != __clk_get_hw(dd->clk_bypass));
434 r = _omap3_noncore_dpll_bypass(clk); 434 r = _omap3_noncore_dpll_bypass(clk);
435 } else { 435 } else {
436 WARN_ON(parent != dd->clk_ref); 436 WARN_ON(parent != __clk_get_hw(dd->clk_ref));
437 r = _omap3_noncore_dpll_lock(clk); 437 r = _omap3_noncore_dpll_lock(clk);
438 } 438 }
439 439
@@ -473,6 +473,8 @@ void omap3_noncore_dpll_disable(struct clk_hw *hw)
473 * in failure. 473 * in failure.
474 */ 474 */
475long omap3_noncore_dpll_determine_rate(struct clk_hw *hw, unsigned long rate, 475long omap3_noncore_dpll_determine_rate(struct clk_hw *hw, unsigned long rate,
476 unsigned long min_rate,
477 unsigned long max_rate,
476 unsigned long *best_parent_rate, 478 unsigned long *best_parent_rate,
477 struct clk_hw **best_parent_clk) 479 struct clk_hw **best_parent_clk)
478{ 480{
@@ -549,7 +551,8 @@ int omap3_noncore_dpll_set_rate(struct clk_hw *hw, unsigned long rate,
549 if (!dd) 551 if (!dd)
550 return -EINVAL; 552 return -EINVAL;
551 553
552 if (__clk_get_parent(hw->clk) != dd->clk_ref) 554 if (__clk_get_hw(__clk_get_parent(hw->clk)) !=
555 __clk_get_hw(dd->clk_ref))
553 return -EINVAL; 556 return -EINVAL;
554 557
555 if (dd->last_rounded_rate == 0) 558 if (dd->last_rounded_rate == 0)
diff --git a/arch/arm/mach-omap2/dpll44xx.c b/arch/arm/mach-omap2/dpll44xx.c
index fc712240e5fd..f231be05b9a6 100644
--- a/arch/arm/mach-omap2/dpll44xx.c
+++ b/arch/arm/mach-omap2/dpll44xx.c
@@ -202,6 +202,8 @@ out:
202 * in failure. 202 * in failure.
203 */ 203 */
204long omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, unsigned long rate, 204long omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, unsigned long rate,
205 unsigned long min_rate,
206 unsigned long max_rate,
205 unsigned long *best_parent_rate, 207 unsigned long *best_parent_rate,
206 struct clk_hw **best_parent_clk) 208 struct clk_hw **best_parent_clk)
207{ 209{
diff --git a/arch/arm/mach-omap2/io.c b/arch/arm/mach-omap2/io.c
index e60780f05374..c4871c55bd8b 100644
--- a/arch/arm/mach-omap2/io.c
+++ b/arch/arm/mach-omap2/io.c
@@ -461,7 +461,17 @@ void __init omap3_init_early(void)
461 omap3xxx_clockdomains_init(); 461 omap3xxx_clockdomains_init();
462 omap3xxx_hwmod_init(); 462 omap3xxx_hwmod_init();
463 omap_hwmod_init_postsetup(); 463 omap_hwmod_init_postsetup();
464 omap_clk_soc_init = omap3xxx_clk_init; 464 if (!of_have_populated_dt()) {
465 omap3_prcm_legacy_iomaps_init();
466 if (soc_is_am35xx())
467 omap_clk_soc_init = am35xx_clk_legacy_init;
468 else if (cpu_is_omap3630())
469 omap_clk_soc_init = omap36xx_clk_legacy_init;
470 else if (omap_rev() == OMAP3430_REV_ES1_0)
471 omap_clk_soc_init = omap3430es1_clk_legacy_init;
472 else
473 omap_clk_soc_init = omap3430_clk_legacy_init;
474 }
465} 475}
466 476
467void __init omap3430_init_early(void) 477void __init omap3430_init_early(void)
@@ -753,15 +763,17 @@ int __init omap_clk_init(void)
753 763
754 ti_clk_init_features(); 764 ti_clk_init_features();
755 765
756 ret = of_prcm_init(); 766 if (of_have_populated_dt()) {
757 if (ret) 767 ret = of_prcm_init();
758 return ret; 768 if (ret)
769 return ret;
759 770
760 of_clk_init(NULL); 771 of_clk_init(NULL);
761 772
762 ti_dt_clk_init_retry_clks(); 773 ti_dt_clk_init_retry_clks();
763 774
764 ti_dt_clockdomains_setup(); 775 ti_dt_clockdomains_setup();
776 }
765 777
766 ret = omap_clk_soc_init(); 778 ret = omap_clk_soc_init();
767 779
diff --git a/arch/arm/mach-omap2/omap4-common.c b/arch/arm/mach-omap2/omap4-common.c
index 2418bdf28ca2..cee0fe1ee6ff 100644
--- a/arch/arm/mach-omap2/omap4-common.c
+++ b/arch/arm/mach-omap2/omap4-common.c
@@ -242,7 +242,7 @@ static int __init omap4_sar_ram_init(void)
242} 242}
243omap_early_initcall(omap4_sar_ram_init); 243omap_early_initcall(omap4_sar_ram_init);
244 244
245static struct of_device_id gic_match[] = { 245static const struct of_device_id gic_match[] = {
246 { .compatible = "arm,cortex-a9-gic", }, 246 { .compatible = "arm,cortex-a9-gic", },
247 { .compatible = "arm,cortex-a15-gic", }, 247 { .compatible = "arm,cortex-a15-gic", },
248 { }, 248 { },
diff --git a/arch/arm/mach-omap2/omap_hwmod.c b/arch/arm/mach-omap2/omap_hwmod.c
index 92afb723dcfc..355b08936871 100644
--- a/arch/arm/mach-omap2/omap_hwmod.c
+++ b/arch/arm/mach-omap2/omap_hwmod.c
@@ -1692,16 +1692,15 @@ static int _deassert_hardreset(struct omap_hwmod *oh, const char *name)
1692 if (ret == -EBUSY) 1692 if (ret == -EBUSY)
1693 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name); 1693 pr_warn("omap_hwmod: %s: failed to hardreset\n", oh->name);
1694 1694
1695 if (!ret) { 1695 if (oh->clkdm) {
1696 /* 1696 /*
1697 * Set the clockdomain to HW_AUTO, assuming that the 1697 * Set the clockdomain to HW_AUTO, assuming that the
1698 * previous state was HW_AUTO. 1698 * previous state was HW_AUTO.
1699 */ 1699 */
1700 if (oh->clkdm && hwsup) 1700 if (hwsup)
1701 clkdm_allow_idle(oh->clkdm); 1701 clkdm_allow_idle(oh->clkdm);
1702 } else { 1702
1703 if (oh->clkdm) 1703 clkdm_hwmod_disable(oh->clkdm, oh);
1704 clkdm_hwmod_disable(oh->clkdm, oh);
1705 } 1704 }
1706 1705
1707 return ret; 1706 return ret;
@@ -2698,6 +2697,7 @@ static int __init _register(struct omap_hwmod *oh)
2698 INIT_LIST_HEAD(&oh->master_ports); 2697 INIT_LIST_HEAD(&oh->master_ports);
2699 INIT_LIST_HEAD(&oh->slave_ports); 2698 INIT_LIST_HEAD(&oh->slave_ports);
2700 spin_lock_init(&oh->_lock); 2699 spin_lock_init(&oh->_lock);
2700 lockdep_set_class(&oh->_lock, &oh->hwmod_key);
2701 2701
2702 oh->_state = _HWMOD_STATE_REGISTERED; 2702 oh->_state = _HWMOD_STATE_REGISTERED;
2703 2703
diff --git a/arch/arm/mach-omap2/omap_hwmod.h b/arch/arm/mach-omap2/omap_hwmod.h
index 9d4bec6ee742..9611c91d9b82 100644
--- a/arch/arm/mach-omap2/omap_hwmod.h
+++ b/arch/arm/mach-omap2/omap_hwmod.h
@@ -674,6 +674,7 @@ struct omap_hwmod {
674 u32 _sysc_cache; 674 u32 _sysc_cache;
675 void __iomem *_mpu_rt_va; 675 void __iomem *_mpu_rt_va;
676 spinlock_t _lock; 676 spinlock_t _lock;
677 struct lock_class_key hwmod_key; /* unique lock class */
677 struct list_head node; 678 struct list_head node;
678 struct omap_hwmod_ocp_if *_mpu_port; 679 struct omap_hwmod_ocp_if *_mpu_port;
679 unsigned int (*xlate_irq)(unsigned int); 680 unsigned int (*xlate_irq)(unsigned int);
diff --git a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
index e8692e7675b8..16fe7a1b7a35 100644
--- a/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
+++ b/arch/arm/mach-omap2/omap_hwmod_7xx_data.c
@@ -1466,55 +1466,18 @@ static struct omap_hwmod dra7xx_ocp2scp3_hwmod = {
1466 * 1466 *
1467 */ 1467 */
1468 1468
1469static struct omap_hwmod_class dra7xx_pcie_hwmod_class = { 1469static struct omap_hwmod_class dra7xx_pciess_hwmod_class = {
1470 .name = "pcie", 1470 .name = "pcie",
1471}; 1471};
1472 1472
1473/* pcie1 */ 1473/* pcie1 */
1474static struct omap_hwmod dra7xx_pcie1_hwmod = { 1474static struct omap_hwmod dra7xx_pciess1_hwmod = {
1475 .name = "pcie1", 1475 .name = "pcie1",
1476 .class = &dra7xx_pcie_hwmod_class, 1476 .class = &dra7xx_pciess_hwmod_class,
1477 .clkdm_name = "pcie_clkdm", 1477 .clkdm_name = "pcie_clkdm",
1478 .main_clk = "l4_root_clk_div", 1478 .main_clk = "l4_root_clk_div",
1479 .prcm = { 1479 .prcm = {
1480 .omap4 = { 1480 .omap4 = {
1481 .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
1482 .modulemode = MODULEMODE_SWCTRL,
1483 },
1484 },
1485};
1486
1487/* pcie2 */
1488static struct omap_hwmod dra7xx_pcie2_hwmod = {
1489 .name = "pcie2",
1490 .class = &dra7xx_pcie_hwmod_class,
1491 .clkdm_name = "pcie_clkdm",
1492 .main_clk = "l4_root_clk_div",
1493 .prcm = {
1494 .omap4 = {
1495 .clkctrl_offs = DRA7XX_CM_PCIE_CLKSTCTRL_OFFSET,
1496 .modulemode = MODULEMODE_SWCTRL,
1497 },
1498 },
1499};
1500
1501/*
1502 * 'PCIE PHY' class
1503 *
1504 */
1505
1506static struct omap_hwmod_class dra7xx_pcie_phy_hwmod_class = {
1507 .name = "pcie-phy",
1508};
1509
1510/* pcie1 phy */
1511static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
1512 .name = "pcie1-phy",
1513 .class = &dra7xx_pcie_phy_hwmod_class,
1514 .clkdm_name = "l3init_clkdm",
1515 .main_clk = "l4_root_clk_div",
1516 .prcm = {
1517 .omap4 = {
1518 .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET, 1481 .clkctrl_offs = DRA7XX_CM_L3INIT_PCIESS1_CLKCTRL_OFFSET,
1519 .context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET, 1482 .context_offs = DRA7XX_RM_L3INIT_PCIESS1_CONTEXT_OFFSET,
1520 .modulemode = MODULEMODE_SWCTRL, 1483 .modulemode = MODULEMODE_SWCTRL,
@@ -1522,11 +1485,11 @@ static struct omap_hwmod dra7xx_pcie1_phy_hwmod = {
1522 }, 1485 },
1523}; 1486};
1524 1487
1525/* pcie2 phy */ 1488/* pcie2 */
1526static struct omap_hwmod dra7xx_pcie2_phy_hwmod = { 1489static struct omap_hwmod dra7xx_pciess2_hwmod = {
1527 .name = "pcie2-phy", 1490 .name = "pcie2",
1528 .class = &dra7xx_pcie_phy_hwmod_class, 1491 .class = &dra7xx_pciess_hwmod_class,
1529 .clkdm_name = "l3init_clkdm", 1492 .clkdm_name = "pcie_clkdm",
1530 .main_clk = "l4_root_clk_div", 1493 .main_clk = "l4_root_clk_div",
1531 .prcm = { 1494 .prcm = {
1532 .omap4 = { 1495 .omap4 = {
@@ -2877,50 +2840,34 @@ static struct omap_hwmod_ocp_if dra7xx_l4_cfg__ocp2scp3 = {
2877 .user = OCP_USER_MPU | OCP_USER_SDMA, 2840 .user = OCP_USER_MPU | OCP_USER_SDMA,
2878}; 2841};
2879 2842
2880/* l3_main_1 -> pcie1 */ 2843/* l3_main_1 -> pciess1 */
2881static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie1 = { 2844static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess1 = {
2882 .master = &dra7xx_l3_main_1_hwmod, 2845 .master = &dra7xx_l3_main_1_hwmod,
2883 .slave = &dra7xx_pcie1_hwmod, 2846 .slave = &dra7xx_pciess1_hwmod,
2884 .clk = "l3_iclk_div", 2847 .clk = "l3_iclk_div",
2885 .user = OCP_USER_MPU | OCP_USER_SDMA, 2848 .user = OCP_USER_MPU | OCP_USER_SDMA,
2886}; 2849};
2887 2850
2888/* l4_cfg -> pcie1 */ 2851/* l4_cfg -> pciess1 */
2889static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1 = { 2852static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess1 = {
2890 .master = &dra7xx_l4_cfg_hwmod, 2853 .master = &dra7xx_l4_cfg_hwmod,
2891 .slave = &dra7xx_pcie1_hwmod, 2854 .slave = &dra7xx_pciess1_hwmod,
2892 .clk = "l4_root_clk_div", 2855 .clk = "l4_root_clk_div",
2893 .user = OCP_USER_MPU | OCP_USER_SDMA, 2856 .user = OCP_USER_MPU | OCP_USER_SDMA,
2894}; 2857};
2895 2858
2896/* l3_main_1 -> pcie2 */ 2859/* l3_main_1 -> pciess2 */
2897static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pcie2 = { 2860static struct omap_hwmod_ocp_if dra7xx_l3_main_1__pciess2 = {
2898 .master = &dra7xx_l3_main_1_hwmod, 2861 .master = &dra7xx_l3_main_1_hwmod,
2899 .slave = &dra7xx_pcie2_hwmod, 2862 .slave = &dra7xx_pciess2_hwmod,
2900 .clk = "l3_iclk_div", 2863 .clk = "l3_iclk_div",
2901 .user = OCP_USER_MPU | OCP_USER_SDMA, 2864 .user = OCP_USER_MPU | OCP_USER_SDMA,
2902}; 2865};
2903 2866
2904/* l4_cfg -> pcie2 */ 2867/* l4_cfg -> pciess2 */
2905static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2 = { 2868static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pciess2 = {
2906 .master = &dra7xx_l4_cfg_hwmod,
2907 .slave = &dra7xx_pcie2_hwmod,
2908 .clk = "l4_root_clk_div",
2909 .user = OCP_USER_MPU | OCP_USER_SDMA,
2910};
2911
2912/* l4_cfg -> pcie1 phy */
2913static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie1_phy = {
2914 .master = &dra7xx_l4_cfg_hwmod,
2915 .slave = &dra7xx_pcie1_phy_hwmod,
2916 .clk = "l4_root_clk_div",
2917 .user = OCP_USER_MPU | OCP_USER_SDMA,
2918};
2919
2920/* l4_cfg -> pcie2 phy */
2921static struct omap_hwmod_ocp_if dra7xx_l4_cfg__pcie2_phy = {
2922 .master = &dra7xx_l4_cfg_hwmod, 2869 .master = &dra7xx_l4_cfg_hwmod,
2923 .slave = &dra7xx_pcie2_phy_hwmod, 2870 .slave = &dra7xx_pciess2_hwmod,
2924 .clk = "l4_root_clk_div", 2871 .clk = "l4_root_clk_div",
2925 .user = OCP_USER_MPU | OCP_USER_SDMA, 2872 .user = OCP_USER_MPU | OCP_USER_SDMA,
2926}; 2873};
@@ -3327,12 +3274,10 @@ static struct omap_hwmod_ocp_if *dra7xx_hwmod_ocp_ifs[] __initdata = {
3327 &dra7xx_l4_cfg__mpu, 3274 &dra7xx_l4_cfg__mpu,
3328 &dra7xx_l4_cfg__ocp2scp1, 3275 &dra7xx_l4_cfg__ocp2scp1,
3329 &dra7xx_l4_cfg__ocp2scp3, 3276 &dra7xx_l4_cfg__ocp2scp3,
3330 &dra7xx_l3_main_1__pcie1, 3277 &dra7xx_l3_main_1__pciess1,
3331 &dra7xx_l4_cfg__pcie1, 3278 &dra7xx_l4_cfg__pciess1,
3332 &dra7xx_l3_main_1__pcie2, 3279 &dra7xx_l3_main_1__pciess2,
3333 &dra7xx_l4_cfg__pcie2, 3280 &dra7xx_l4_cfg__pciess2,
3334 &dra7xx_l4_cfg__pcie1_phy,
3335 &dra7xx_l4_cfg__pcie2_phy,
3336 &dra7xx_l3_main_1__qspi, 3281 &dra7xx_l3_main_1__qspi,
3337 &dra7xx_l4_per3__rtcss, 3282 &dra7xx_l4_per3__rtcss,
3338 &dra7xx_l4_cfg__sata, 3283 &dra7xx_l4_cfg__sata,
diff --git a/arch/arm/mach-omap2/pdata-quirks.c b/arch/arm/mach-omap2/pdata-quirks.c
index 190fa43e7479..e642b079e9f3 100644
--- a/arch/arm/mach-omap2/pdata-quirks.c
+++ b/arch/arm/mach-omap2/pdata-quirks.c
@@ -173,6 +173,7 @@ static void __init omap3_igep0030_rev_g_legacy_init(void)
173 173
174static void __init omap3_evm_legacy_init(void) 174static void __init omap3_evm_legacy_init(void)
175{ 175{
176 hsmmc2_internal_input_clk();
176 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149); 177 legacy_init_wl12xx(WL12XX_REFCLOCK_38, 0, 149);
177} 178}
178 179
diff --git a/arch/arm/mach-omap2/prm.h b/arch/arm/mach-omap2/prm.h
index 77752e49d8d4..b9061a6a2db8 100644
--- a/arch/arm/mach-omap2/prm.h
+++ b/arch/arm/mach-omap2/prm.h
@@ -20,6 +20,7 @@ extern void __iomem *prm_base;
20extern u16 prm_features; 20extern u16 prm_features;
21extern void omap2_set_globals_prm(void __iomem *prm); 21extern void omap2_set_globals_prm(void __iomem *prm);
22int of_prcm_init(void); 22int of_prcm_init(void);
23void omap3_prcm_legacy_iomaps_init(void);
23# endif 24# endif
24 25
25/* 26/*
diff --git a/arch/arm/mach-omap2/prm3xxx.c b/arch/arm/mach-omap2/prm3xxx.c
index c5e00c6714b1..5713bbdf83bc 100644
--- a/arch/arm/mach-omap2/prm3xxx.c
+++ b/arch/arm/mach-omap2/prm3xxx.c
@@ -674,7 +674,7 @@ int __init omap3xxx_prm_init(void)
674 return prm_register(&omap3xxx_prm_ll_data); 674 return prm_register(&omap3xxx_prm_ll_data);
675} 675}
676 676
677static struct of_device_id omap3_prm_dt_match_table[] = { 677static const struct of_device_id omap3_prm_dt_match_table[] = {
678 { .compatible = "ti,omap3-prm" }, 678 { .compatible = "ti,omap3-prm" },
679 { } 679 { }
680}; 680};
diff --git a/arch/arm/mach-omap2/prm44xx.c b/arch/arm/mach-omap2/prm44xx.c
index 408c64efb807..d6d6bc39e05c 100644
--- a/arch/arm/mach-omap2/prm44xx.c
+++ b/arch/arm/mach-omap2/prm44xx.c
@@ -252,10 +252,10 @@ static void omap44xx_prm_save_and_clear_irqen(u32 *saved_mask)
252{ 252{
253 saved_mask[0] = 253 saved_mask[0] =
254 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, 254 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
255 OMAP4_PRM_IRQSTATUS_MPU_OFFSET); 255 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
256 saved_mask[1] = 256 saved_mask[1] =
257 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST, 257 omap4_prm_read_inst_reg(OMAP4430_PRM_OCP_SOCKET_INST,
258 OMAP4_PRM_IRQSTATUS_MPU_2_OFFSET); 258 OMAP4_PRM_IRQENABLE_MPU_2_OFFSET);
259 259
260 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST, 260 omap4_prm_write_inst_reg(0, OMAP4430_PRM_OCP_SOCKET_INST,
261 OMAP4_PRM_IRQENABLE_MPU_OFFSET); 261 OMAP4_PRM_IRQENABLE_MPU_OFFSET);
@@ -712,7 +712,7 @@ int __init omap44xx_prm_init(void)
712 return prm_register(&omap44xx_prm_ll_data); 712 return prm_register(&omap44xx_prm_ll_data);
713} 713}
714 714
715static struct of_device_id omap_prm_dt_match_table[] = { 715static const struct of_device_id omap_prm_dt_match_table[] = {
716 { .compatible = "ti,omap4-prm" }, 716 { .compatible = "ti,omap4-prm" },
717 { .compatible = "ti,omap5-prm" }, 717 { .compatible = "ti,omap5-prm" },
718 { .compatible = "ti,dra7-prm" }, 718 { .compatible = "ti,dra7-prm" },
diff --git a/arch/arm/mach-omap2/prm_common.c b/arch/arm/mach-omap2/prm_common.c
index 264b5e29404d..bfaa7ba595cc 100644
--- a/arch/arm/mach-omap2/prm_common.c
+++ b/arch/arm/mach-omap2/prm_common.c
@@ -35,6 +35,8 @@
35#include "prm44xx.h" 35#include "prm44xx.h"
36#include "common.h" 36#include "common.h"
37#include "clock.h" 37#include "clock.h"
38#include "cm.h"
39#include "control.h"
38 40
39/* 41/*
40 * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs 42 * OMAP_PRCM_MAX_NR_PENDING_REG: maximum number of PRM_IRQ*_MPU regs
@@ -641,6 +643,15 @@ int __init of_prcm_init(void)
641 return 0; 643 return 0;
642} 644}
643 645
646void __init omap3_prcm_legacy_iomaps_init(void)
647{
648 ti_clk_ll_ops = &omap_clk_ll_ops;
649
650 clk_memmaps[TI_CLKM_CM] = cm_base + OMAP3430_IVA2_MOD;
651 clk_memmaps[TI_CLKM_PRM] = prm_base + OMAP3430_IVA2_MOD;
652 clk_memmaps[TI_CLKM_SCRM] = omap_ctrl_base_get();
653}
654
644static int __init prm_late_init(void) 655static int __init prm_late_init(void)
645{ 656{
646 if (prm_ll_data->late_init) 657 if (prm_ll_data->late_init)
diff --git a/arch/arm/mach-prima2/Kconfig b/arch/arm/mach-prima2/Kconfig
index a219dc310d5d..e03d8b5c9ad0 100644
--- a/arch/arm/mach-prima2/Kconfig
+++ b/arch/arm/mach-prima2/Kconfig
@@ -27,7 +27,6 @@ config ARCH_ATLAS7
27 select CPU_V7 27 select CPU_V7
28 select HAVE_ARM_SCU if SMP 28 select HAVE_ARM_SCU if SMP
29 select HAVE_SMP 29 select HAVE_SMP
30 select SMP_ON_UP if SMP
31 help 30 help
32 Support for CSR SiRFSoC ARM Cortex A7 Platform 31 Support for CSR SiRFSoC ARM Cortex A7 Platform
33 32
diff --git a/arch/arm/mach-prima2/common.c b/arch/arm/mach-prima2/common.c
index 0c819bb88418..8cadb302a7d2 100644
--- a/arch/arm/mach-prima2/common.c
+++ b/arch/arm/mach-prima2/common.c
@@ -21,7 +21,7 @@ static void __init sirfsoc_init_late(void)
21} 21}
22 22
23#ifdef CONFIG_ARCH_ATLAS6 23#ifdef CONFIG_ARCH_ATLAS6
24static const char *atlas6_dt_match[] __initconst = { 24static const char *const atlas6_dt_match[] __initconst = {
25 "sirf,atlas6", 25 "sirf,atlas6",
26 NULL 26 NULL
27}; 27};
@@ -36,7 +36,7 @@ MACHINE_END
36#endif 36#endif
37 37
38#ifdef CONFIG_ARCH_PRIMA2 38#ifdef CONFIG_ARCH_PRIMA2
39static const char *prima2_dt_match[] __initconst = { 39static const char *const prima2_dt_match[] __initconst = {
40 "sirf,prima2", 40 "sirf,prima2",
41 NULL 41 NULL
42}; 42};
@@ -52,7 +52,7 @@ MACHINE_END
52#endif 52#endif
53 53
54#ifdef CONFIG_ARCH_ATLAS7 54#ifdef CONFIG_ARCH_ATLAS7
55static const char *atlas7_dt_match[] __initdata = { 55static const char *const atlas7_dt_match[] __initconst = {
56 "sirf,atlas7", 56 "sirf,atlas7",
57 NULL 57 NULL
58}; 58};
diff --git a/arch/arm/mach-prima2/platsmp.c b/arch/arm/mach-prima2/platsmp.c
index fc2b03c81e5f..e46c91094dde 100644
--- a/arch/arm/mach-prima2/platsmp.c
+++ b/arch/arm/mach-prima2/platsmp.c
@@ -40,7 +40,7 @@ static void sirfsoc_secondary_init(unsigned int cpu)
40 spin_unlock(&boot_lock); 40 spin_unlock(&boot_lock);
41} 41}
42 42
43static struct of_device_id clk_ids[] = { 43static const struct of_device_id clk_ids[] = {
44 { .compatible = "sirf,atlas7-clkc" }, 44 { .compatible = "sirf,atlas7-clkc" },
45 {}, 45 {},
46}; 46};
diff --git a/arch/arm/mach-pxa/idp.c b/arch/arm/mach-pxa/idp.c
index 343c4e3a7c5d..f6d02e4cbcda 100644
--- a/arch/arm/mach-pxa/idp.c
+++ b/arch/arm/mach-pxa/idp.c
@@ -36,6 +36,7 @@
36#include <linux/platform_data/video-pxafb.h> 36#include <linux/platform_data/video-pxafb.h>
37#include <mach/bitfield.h> 37#include <mach/bitfield.h>
38#include <linux/platform_data/mmc-pxamci.h> 38#include <linux/platform_data/mmc-pxamci.h>
39#include <linux/smc91x.h>
39 40
40#include "generic.h" 41#include "generic.h"
41#include "devices.h" 42#include "devices.h"
@@ -81,11 +82,16 @@ static struct resource smc91x_resources[] = {
81 } 82 }
82}; 83};
83 84
85static struct smc91x_platdata smc91x_platdata = {
86 .flags = SMC91X_USE_32BIT | SMC91X_USE_DMA | SMC91X_NOWAIT,
87};
88
84static struct platform_device smc91x_device = { 89static struct platform_device smc91x_device = {
85 .name = "smc91x", 90 .name = "smc91x",
86 .id = 0, 91 .id = 0,
87 .num_resources = ARRAY_SIZE(smc91x_resources), 92 .num_resources = ARRAY_SIZE(smc91x_resources),
88 .resource = smc91x_resources, 93 .resource = smc91x_resources,
94 .dev.platform_data = &smc91x_platdata,
89}; 95};
90 96
91static void idp_backlight_power(int on) 97static void idp_backlight_power(int on)
diff --git a/arch/arm/mach-pxa/lpd270.c b/arch/arm/mach-pxa/lpd270.c
index ad777b353bd5..eaee2c20b189 100644
--- a/arch/arm/mach-pxa/lpd270.c
+++ b/arch/arm/mach-pxa/lpd270.c
@@ -24,6 +24,7 @@
24#include <linux/mtd/mtd.h> 24#include <linux/mtd/mtd.h>
25#include <linux/mtd/partitions.h> 25#include <linux/mtd/partitions.h>
26#include <linux/pwm_backlight.h> 26#include <linux/pwm_backlight.h>
27#include <linux/smc91x.h>
27 28
28#include <asm/types.h> 29#include <asm/types.h>
29#include <asm/setup.h> 30#include <asm/setup.h>
@@ -189,15 +190,20 @@ static struct resource smc91x_resources[] = {
189 [1] = { 190 [1] = {
190 .start = LPD270_ETHERNET_IRQ, 191 .start = LPD270_ETHERNET_IRQ,
191 .end = LPD270_ETHERNET_IRQ, 192 .end = LPD270_ETHERNET_IRQ,
192 .flags = IORESOURCE_IRQ, 193 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
193 }, 194 },
194}; 195};
195 196
197struct smc91x_platdata smc91x_platdata = {
198 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
199};
200
196static struct platform_device smc91x_device = { 201static struct platform_device smc91x_device = {
197 .name = "smc91x", 202 .name = "smc91x",
198 .id = 0, 203 .id = 0,
199 .num_resources = ARRAY_SIZE(smc91x_resources), 204 .num_resources = ARRAY_SIZE(smc91x_resources),
200 .resource = smc91x_resources, 205 .resource = smc91x_resources,
206 .dev.platform_data = &smc91x_platdata,
201}; 207};
202 208
203static struct resource lpd270_flash_resources[] = { 209static struct resource lpd270_flash_resources[] = {
diff --git a/arch/arm/mach-realview/core.c b/arch/arm/mach-realview/core.c
index 850e506926df..c309593abdb2 100644
--- a/arch/arm/mach-realview/core.c
+++ b/arch/arm/mach-realview/core.c
@@ -28,6 +28,7 @@
28#include <linux/platform_data/video-clcd-versatile.h> 28#include <linux/platform_data/video-clcd-versatile.h>
29#include <linux/io.h> 29#include <linux/io.h>
30#include <linux/smsc911x.h> 30#include <linux/smsc911x.h>
31#include <linux/smc91x.h>
31#include <linux/ata_platform.h> 32#include <linux/ata_platform.h>
32#include <linux/amba/mmci.h> 33#include <linux/amba/mmci.h>
33#include <linux/gfp.h> 34#include <linux/gfp.h>
@@ -94,6 +95,10 @@ static struct smsc911x_platform_config smsc911x_config = {
94 .phy_interface = PHY_INTERFACE_MODE_MII, 95 .phy_interface = PHY_INTERFACE_MODE_MII,
95}; 96};
96 97
98static struct smc91x_platdata smc91x_platdata = {
99 .flags = SMC91X_USE_32BIT | SMC91X_NOWAIT,
100};
101
97static struct platform_device realview_eth_device = { 102static struct platform_device realview_eth_device = {
98 .name = "smsc911x", 103 .name = "smsc911x",
99 .id = 0, 104 .id = 0,
@@ -107,6 +112,8 @@ int realview_eth_register(const char *name, struct resource *res)
107 realview_eth_device.resource = res; 112 realview_eth_device.resource = res;
108 if (strcmp(realview_eth_device.name, "smsc911x") == 0) 113 if (strcmp(realview_eth_device.name, "smsc911x") == 0)
109 realview_eth_device.dev.platform_data = &smsc911x_config; 114 realview_eth_device.dev.platform_data = &smsc911x_config;
115 else
116 realview_eth_device.dev.platform_data = &smc91x_platdata;
110 117
111 return platform_device_register(&realview_eth_device); 118 return platform_device_register(&realview_eth_device);
112} 119}
diff --git a/arch/arm/mach-realview/realview_eb.c b/arch/arm/mach-realview/realview_eb.c
index 64c88d657f9e..b3869cbbcc68 100644
--- a/arch/arm/mach-realview/realview_eb.c
+++ b/arch/arm/mach-realview/realview_eb.c
@@ -234,7 +234,7 @@ static struct resource realview_eb_eth_resources[] = {
234 [1] = { 234 [1] = {
235 .start = IRQ_EB_ETH, 235 .start = IRQ_EB_ETH,
236 .end = IRQ_EB_ETH, 236 .end = IRQ_EB_ETH,
237 .flags = IORESOURCE_IRQ, 237 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHEDGE,
238 }, 238 },
239}; 239};
240 240
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index 5078932c1683..ae4eb7cc4bcc 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -11,6 +11,7 @@ config ARCH_ROCKCHIP
11 select HAVE_ARM_SCU if SMP 11 select HAVE_ARM_SCU if SMP
12 select HAVE_ARM_TWD if SMP 12 select HAVE_ARM_TWD if SMP
13 select DW_APB_TIMER_OF 13 select DW_APB_TIMER_OF
14 select REGULATOR if PM
14 select ROCKCHIP_TIMER 15 select ROCKCHIP_TIMER
15 select ARM_GLOBAL_TIMER 16 select ARM_GLOBAL_TIMER
16 select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK 17 select CLKSRC_ARM_GLOBAL_TIMER_SCHED_CLOCK
diff --git a/arch/arm/mach-rockchip/pm.h b/arch/arm/mach-rockchip/pm.h
index 7d752ff39f91..7c889c04604b 100644
--- a/arch/arm/mach-rockchip/pm.h
+++ b/arch/arm/mach-rockchip/pm.h
@@ -24,7 +24,13 @@ extern unsigned long rkpm_bootdata_ddr_data;
24extern unsigned long rk3288_bootram_sz; 24extern unsigned long rk3288_bootram_sz;
25 25
26void rockchip_slp_cpu_resume(void); 26void rockchip_slp_cpu_resume(void);
27#ifdef CONFIG_PM_SLEEP
27void __init rockchip_suspend_init(void); 28void __init rockchip_suspend_init(void);
29#else
30static inline void rockchip_suspend_init(void)
31{
32}
33#endif
28 34
29/****** following is rk3288 defined **********/ 35/****** following is rk3288 defined **********/
30#define RK3288_PMU_WAKEUP_CFG0 0x00 36#define RK3288_PMU_WAKEUP_CFG0 0x00
diff --git a/arch/arm/mach-s5pv210/s5pv210.c b/arch/arm/mach-s5pv210/s5pv210.c
index 43eb1eaea0c9..83e656ea95ae 100644
--- a/arch/arm/mach-s5pv210/s5pv210.c
+++ b/arch/arm/mach-s5pv210/s5pv210.c
@@ -63,7 +63,7 @@ static void __init s5pv210_dt_init_late(void)
63 s5pv210_pm_init(); 63 s5pv210_pm_init();
64} 64}
65 65
66static char const *s5pv210_dt_compat[] __initconst = { 66static char const *const s5pv210_dt_compat[] __initconst = {
67 "samsung,s5pc110", 67 "samsung,s5pc110",
68 "samsung,s5pv210", 68 "samsung,s5pv210",
69 NULL 69 NULL
diff --git a/arch/arm/mach-sa1100/neponset.c b/arch/arm/mach-sa1100/neponset.c
index 169262e3040d..af868d258e66 100644
--- a/arch/arm/mach-sa1100/neponset.c
+++ b/arch/arm/mach-sa1100/neponset.c
@@ -12,6 +12,7 @@
12#include <linux/pm.h> 12#include <linux/pm.h>
13#include <linux/serial_core.h> 13#include <linux/serial_core.h>
14#include <linux/slab.h> 14#include <linux/slab.h>
15#include <linux/smc91x.h>
15 16
16#include <asm/mach-types.h> 17#include <asm/mach-types.h>
17#include <asm/mach/map.h> 18#include <asm/mach/map.h>
@@ -258,12 +259,17 @@ static int neponset_probe(struct platform_device *dev)
258 0x02000000, "smc91x-attrib"), 259 0x02000000, "smc91x-attrib"),
259 { .flags = IORESOURCE_IRQ }, 260 { .flags = IORESOURCE_IRQ },
260 }; 261 };
262 struct smc91x_platdata smc91x_platdata = {
263 .flags = SMC91X_USE_8BIT | SMC91X_IO_SHIFT_2 | SMC91X_NOWAIT,
264 };
261 struct platform_device_info smc91x_devinfo = { 265 struct platform_device_info smc91x_devinfo = {
262 .parent = &dev->dev, 266 .parent = &dev->dev,
263 .name = "smc91x", 267 .name = "smc91x",
264 .id = 0, 268 .id = 0,
265 .res = smc91x_resources, 269 .res = smc91x_resources,
266 .num_res = ARRAY_SIZE(smc91x_resources), 270 .num_res = ARRAY_SIZE(smc91x_resources),
271 .data = &smc91x_platdata,
272 .size_data = sizeof(smc91x_platdata),
267 }; 273 };
268 int ret, irq; 274 int ret, irq;
269 275
diff --git a/arch/arm/mach-sa1100/pleb.c b/arch/arm/mach-sa1100/pleb.c
index 091261878eff..1525d7b5f1b7 100644
--- a/arch/arm/mach-sa1100/pleb.c
+++ b/arch/arm/mach-sa1100/pleb.c
@@ -11,6 +11,7 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <linux/io.h> 12#include <linux/io.h>
13#include <linux/mtd/partitions.h> 13#include <linux/mtd/partitions.h>
14#include <linux/smc91x.h>
14 15
15#include <mach/hardware.h> 16#include <mach/hardware.h>
16#include <asm/setup.h> 17#include <asm/setup.h>
@@ -43,12 +44,18 @@ static struct resource smc91x_resources[] = {
43#endif 44#endif
44}; 45};
45 46
47static struct smc91x_platdata smc91x_platdata = {
48 .flags = SMC91X_USE_16BIT | SMC91X_NOWAIT,
49};
46 50
47static struct platform_device smc91x_device = { 51static struct platform_device smc91x_device = {
48 .name = "smc91x", 52 .name = "smc91x",
49 .id = 0, 53 .id = 0,
50 .num_resources = ARRAY_SIZE(smc91x_resources), 54 .num_resources = ARRAY_SIZE(smc91x_resources),
51 .resource = smc91x_resources, 55 .resource = smc91x_resources,
56 .dev = {
57 .platform_data = &smc91x_platdata,
58 },
52}; 59};
53 60
54static struct platform_device *devices[] __initdata = { 61static struct platform_device *devices[] __initdata = {
diff --git a/arch/arm/mach-shmobile/setup-emev2.c b/arch/arm/mach-shmobile/setup-emev2.c
index aad97be9cbe1..37f7b15c01bc 100644
--- a/arch/arm/mach-shmobile/setup-emev2.c
+++ b/arch/arm/mach-shmobile/setup-emev2.c
@@ -37,7 +37,7 @@ static void __init emev2_map_io(void)
37 iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc)); 37 iotable_init(emev2_io_desc, ARRAY_SIZE(emev2_io_desc));
38} 38}
39 39
40static const char *emev2_boards_compat_dt[] __initconst = { 40static const char *const emev2_boards_compat_dt[] __initconst = {
41 "renesas,emev2", 41 "renesas,emev2",
42 NULL, 42 NULL,
43}; 43};
diff --git a/arch/arm/mach-socfpga/core.h b/arch/arm/mach-socfpga/core.h
index 483cb467bf65..a0f3b1cd497c 100644
--- a/arch/arm/mach-socfpga/core.h
+++ b/arch/arm/mach-socfpga/core.h
@@ -45,6 +45,6 @@ extern char secondary_trampoline, secondary_trampoline_end;
45 45
46extern unsigned long socfpga_cpu1start_addr; 46extern unsigned long socfpga_cpu1start_addr;
47 47
48#define SOCFPGA_SCU_VIRT_BASE 0xfffec000 48#define SOCFPGA_SCU_VIRT_BASE 0xfee00000
49 49
50#endif 50#endif
diff --git a/arch/arm/mach-socfpga/socfpga.c b/arch/arm/mach-socfpga/socfpga.c
index 383d61e138af..f5e597c207b9 100644
--- a/arch/arm/mach-socfpga/socfpga.c
+++ b/arch/arm/mach-socfpga/socfpga.c
@@ -23,6 +23,7 @@
23#include <asm/hardware/cache-l2x0.h> 23#include <asm/hardware/cache-l2x0.h>
24#include <asm/mach/arch.h> 24#include <asm/mach/arch.h>
25#include <asm/mach/map.h> 25#include <asm/mach/map.h>
26#include <asm/cacheflush.h>
26 27
27#include "core.h" 28#include "core.h"
28 29
@@ -73,6 +74,10 @@ void __init socfpga_sysmgr_init(void)
73 (u32 *) &socfpga_cpu1start_addr)) 74 (u32 *) &socfpga_cpu1start_addr))
74 pr_err("SMP: Need cpu1-start-addr in device tree.\n"); 75 pr_err("SMP: Need cpu1-start-addr in device tree.\n");
75 76
77 /* Ensure that socfpga_cpu1start_addr is visible to other CPUs */
78 smp_wmb();
79 sync_cache_w(&socfpga_cpu1start_addr);
80
76 sys_manager_base_addr = of_iomap(np, 0); 81 sys_manager_base_addr = of_iomap(np, 0);
77 82
78 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr"); 83 np = of_find_compatible_node(NULL, NULL, "altr,rst-mgr");
diff --git a/arch/arm/mach-sti/Kconfig b/arch/arm/mach-sti/Kconfig
index 8825bc9e2553..3b1ac463a494 100644
--- a/arch/arm/mach-sti/Kconfig
+++ b/arch/arm/mach-sti/Kconfig
@@ -13,6 +13,7 @@ menuconfig ARCH_STI
13 select ARM_ERRATA_775420 13 select ARM_ERRATA_775420
14 select PL310_ERRATA_753970 if CACHE_L2X0 14 select PL310_ERRATA_753970 if CACHE_L2X0
15 select PL310_ERRATA_769419 if CACHE_L2X0 15 select PL310_ERRATA_769419 if CACHE_L2X0
16 select RESET_CONTROLLER
16 help 17 help
17 Include support for STiH41x SOCs like STiH415/416 using the device tree 18 Include support for STiH41x SOCs like STiH415/416 using the device tree
18 for discovery 19 for discovery
diff --git a/arch/arm/mach-sti/board-dt.c b/arch/arm/mach-sti/board-dt.c
index b067390cef4e..b373acade338 100644
--- a/arch/arm/mach-sti/board-dt.c
+++ b/arch/arm/mach-sti/board-dt.c
@@ -18,6 +18,7 @@ static const char *stih41x_dt_match[] __initdata = {
18 "st,stih415", 18 "st,stih415",
19 "st,stih416", 19 "st,stih416",
20 "st,stih407", 20 "st,stih407",
21 "st,stih410",
21 "st,stih418", 22 "st,stih418",
22 NULL 23 NULL
23}; 24};
diff --git a/arch/arm/mach-tegra/tegra.c b/arch/arm/mach-tegra/tegra.c
index ef016af1c9e7..914341bcef25 100644
--- a/arch/arm/mach-tegra/tegra.c
+++ b/arch/arm/mach-tegra/tegra.c
@@ -91,8 +91,6 @@ static void __init tegra_dt_init(void)
91 struct soc_device *soc_dev; 91 struct soc_device *soc_dev;
92 struct device *parent = NULL; 92 struct device *parent = NULL;
93 93
94 tegra_clocks_apply_init_table();
95
96 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL); 94 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
97 if (!soc_dev_attr) 95 if (!soc_dev_attr)
98 goto out; 96 goto out;
diff --git a/arch/arm/mach-ux500/pm_domains.c b/arch/arm/mach-ux500/pm_domains.c
index 0d4b5b46f15b..4d71c90f801c 100644
--- a/arch/arm/mach-ux500/pm_domains.c
+++ b/arch/arm/mach-ux500/pm_domains.c
@@ -49,7 +49,7 @@ static struct generic_pm_domain *ux500_pm_domains[NR_DOMAINS] = {
49 [DOMAIN_VAPE] = &ux500_pm_domain_vape, 49 [DOMAIN_VAPE] = &ux500_pm_domain_vape,
50}; 50};
51 51
52static struct of_device_id ux500_pm_domain_matches[] = { 52static const struct of_device_id ux500_pm_domain_matches[] __initconst = {
53 { .compatible = "stericsson,ux500-pm-domains", }, 53 { .compatible = "stericsson,ux500-pm-domains", },
54 { }, 54 { },
55}; 55};
diff --git a/arch/arm/mach-versatile/versatile_dt.c b/arch/arm/mach-versatile/versatile_dt.c
index 9f9bc61ca64b..7de3e92a13b0 100644
--- a/arch/arm/mach-versatile/versatile_dt.c
+++ b/arch/arm/mach-versatile/versatile_dt.c
@@ -35,7 +35,7 @@ static void __init versatile_dt_init(void)
35 versatile_auxdata_lookup, NULL); 35 versatile_auxdata_lookup, NULL);
36} 36}
37 37
38static const char *versatile_dt_match[] __initconst = { 38static const char *const versatile_dt_match[] __initconst = {
39 "arm,versatile-ab", 39 "arm,versatile-ab",
40 "arm,versatile-pb", 40 "arm,versatile-pb",
41 NULL, 41 NULL,
diff --git a/arch/arm/mach-vexpress/Kconfig b/arch/arm/mach-vexpress/Kconfig
index d6b16d9a7838..3c2509b4b694 100644
--- a/arch/arm/mach-vexpress/Kconfig
+++ b/arch/arm/mach-vexpress/Kconfig
@@ -73,6 +73,7 @@ config ARCH_VEXPRESS_TC2_PM
73 depends on MCPM 73 depends on MCPM
74 select ARM_CCI 74 select ARM_CCI
75 select ARCH_VEXPRESS_SPC 75 select ARCH_VEXPRESS_SPC
76 select ARM_CPU_SUSPEND
76 help 77 help
77 Support for CPU and cluster power management on Versatile Express 78 Support for CPU and cluster power management on Versatile Express
78 with a TC2 (A15x2 A7x3) big.LITTLE core tile. 79 with a TC2 (A15x2 A7x3) big.LITTLE core tile.
diff --git a/arch/arm/mm/Kconfig b/arch/arm/mm/Kconfig
index c43c71455566..9b4f29e595a4 100644
--- a/arch/arm/mm/Kconfig
+++ b/arch/arm/mm/Kconfig
@@ -892,13 +892,6 @@ config CACHE_L2X0
892 892
893if CACHE_L2X0 893if CACHE_L2X0
894 894
895config CACHE_PL310
896 bool
897 default y if CPU_V7 && !(CPU_V6 || CPU_V6K)
898 help
899 This option enables optimisations for the PL310 cache
900 controller.
901
902config PL310_ERRATA_588369 895config PL310_ERRATA_588369
903 bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines" 896 bool "PL310 errata: Clean & Invalidate maintenance operations do not invalidate clean lines"
904 help 897 help
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index c6c7696b8db9..8f15f70622a6 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -1131,23 +1131,22 @@ static void __init l2c310_of_parse(const struct device_node *np,
1131 } 1131 }
1132 1132
1133 ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_512K); 1133 ret = l2x0_cache_size_of_parse(np, aux_val, aux_mask, &assoc, SZ_512K);
1134 if (ret) 1134 if (!ret) {
1135 return; 1135 switch (assoc) {
1136 1136 case 16:
1137 switch (assoc) { 1137 *aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
1138 case 16: 1138 *aux_val |= L310_AUX_CTRL_ASSOCIATIVITY_16;
1139 *aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK; 1139 *aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK;
1140 *aux_val |= L310_AUX_CTRL_ASSOCIATIVITY_16; 1140 break;
1141 *aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK; 1141 case 8:
1142 break; 1142 *aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK;
1143 case 8: 1143 *aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK;
1144 *aux_val &= ~L2X0_AUX_CTRL_ASSOC_MASK; 1144 break;
1145 *aux_mask &= ~L2X0_AUX_CTRL_ASSOC_MASK; 1145 default:
1146 break; 1146 pr_err("L2C-310 OF cache associativity %d invalid, only 8 or 16 permitted\n",
1147 default: 1147 assoc);
1148 pr_err("L2C-310 OF cache associativity %d invalid, only 8 or 16 permitted\n", 1148 break;
1149 assoc); 1149 }
1150 break;
1151 } 1150 }
1152 1151
1153 prefetch = l2x0_saved_regs.prefetch_ctrl; 1152 prefetch = l2x0_saved_regs.prefetch_ctrl;
diff --git a/arch/arm/mm/dma-mapping.c b/arch/arm/mm/dma-mapping.c
index 903dba064a03..c27447653903 100644
--- a/arch/arm/mm/dma-mapping.c
+++ b/arch/arm/mm/dma-mapping.c
@@ -171,7 +171,7 @@ static int __dma_supported(struct device *dev, u64 mask, bool warn)
171 */ 171 */
172 if (sizeof(mask) != sizeof(dma_addr_t) && 172 if (sizeof(mask) != sizeof(dma_addr_t) &&
173 mask > (dma_addr_t)~0 && 173 mask > (dma_addr_t)~0 &&
174 dma_to_pfn(dev, ~0) < max_pfn) { 174 dma_to_pfn(dev, ~0) < max_pfn - 1) {
175 if (warn) { 175 if (warn) {
176 dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n", 176 dev_warn(dev, "Coherent DMA mask %#llx is larger than dma_addr_t allows\n",
177 mask); 177 mask);
@@ -1106,7 +1106,7 @@ static struct page **__iommu_alloc_buffer(struct device *dev, size_t size,
1106 int i = 0; 1106 int i = 0;
1107 1107
1108 if (array_size <= PAGE_SIZE) 1108 if (array_size <= PAGE_SIZE)
1109 pages = kzalloc(array_size, gfp); 1109 pages = kzalloc(array_size, GFP_KERNEL);
1110 else 1110 else
1111 pages = vzalloc(array_size); 1111 pages = vzalloc(array_size);
1112 if (!pages) 1112 if (!pages)
diff --git a/arch/arm/mm/fault.c b/arch/arm/mm/fault.c
index a982dc3190df..6333d9c17875 100644
--- a/arch/arm/mm/fault.c
+++ b/arch/arm/mm/fault.c
@@ -552,6 +552,7 @@ do_DataAbort(unsigned long addr, unsigned int fsr, struct pt_regs *regs)
552 552
553 pr_alert("Unhandled fault: %s (0x%03x) at 0x%08lx\n", 553 pr_alert("Unhandled fault: %s (0x%03x) at 0x%08lx\n",
554 inf->name, fsr, addr); 554 inf->name, fsr, addr);
555 show_pte(current->mm, addr);
555 556
556 info.si_signo = inf->sig; 557 info.si_signo = inf->sig;
557 info.si_errno = 0; 558 info.si_errno = 0;
diff --git a/arch/arm/mm/pageattr.c b/arch/arm/mm/pageattr.c
index 004e35cdcfff..cf30daff8932 100644
--- a/arch/arm/mm/pageattr.c
+++ b/arch/arm/mm/pageattr.c
@@ -49,7 +49,10 @@ static int change_memory_common(unsigned long addr, int numpages,
49 WARN_ON_ONCE(1); 49 WARN_ON_ONCE(1);
50 } 50 }
51 51
52 if (!is_module_address(start) || !is_module_address(end - 1)) 52 if (start < MODULES_VADDR || start >= MODULES_END)
53 return -EINVAL;
54
55 if (end < MODULES_VADDR || start >= MODULES_END)
53 return -EINVAL; 56 return -EINVAL;
54 57
55 data.set_mask = set_mask; 58 data.set_mask = set_mask;
diff --git a/arch/arm64/boot/dts/apm/apm-storm.dtsi b/arch/arm64/boot/dts/apm/apm-storm.dtsi
index f1ad9c2ab2e9..a857794432d6 100644
--- a/arch/arm64/boot/dts/apm/apm-storm.dtsi
+++ b/arch/arm64/boot/dts/apm/apm-storm.dtsi
@@ -622,7 +622,7 @@
622 }; 622 };
623 623
624 sgenet0: ethernet@1f210000 { 624 sgenet0: ethernet@1f210000 {
625 compatible = "apm,xgene-enet"; 625 compatible = "apm,xgene1-sgenet";
626 status = "disabled"; 626 status = "disabled";
627 reg = <0x0 0x1f210000 0x0 0xd100>, 627 reg = <0x0 0x1f210000 0x0 0xd100>,
628 <0x0 0x1f200000 0x0 0Xc300>, 628 <0x0 0x1f200000 0x0 0Xc300>,
@@ -636,7 +636,7 @@
636 }; 636 };
637 637
638 xgenet: ethernet@1f610000 { 638 xgenet: ethernet@1f610000 {
639 compatible = "apm,xgene-enet"; 639 compatible = "apm,xgene1-xgenet";
640 status = "disabled"; 640 status = "disabled";
641 reg = <0x0 0x1f610000 0x0 0xd100>, 641 reg = <0x0 0x1f610000 0x0 0xd100>,
642 <0x0 0x1f600000 0x0 0Xc300>, 642 <0x0 0x1f600000 0x0 0Xc300>,
diff --git a/arch/arm64/boot/dts/arm/foundation-v8.dts b/arch/arm64/boot/dts/arm/foundation-v8.dts
index 27f32962e55c..4eac8dcea423 100644
--- a/arch/arm64/boot/dts/arm/foundation-v8.dts
+++ b/arch/arm64/boot/dts/arm/foundation-v8.dts
@@ -34,6 +34,7 @@
34 reg = <0x0 0x0>; 34 reg = <0x0 0x0>;
35 enable-method = "spin-table"; 35 enable-method = "spin-table";
36 cpu-release-addr = <0x0 0x8000fff8>; 36 cpu-release-addr = <0x0 0x8000fff8>;
37 next-level-cache = <&L2_0>;
37 }; 38 };
38 cpu@1 { 39 cpu@1 {
39 device_type = "cpu"; 40 device_type = "cpu";
@@ -41,6 +42,7 @@
41 reg = <0x0 0x1>; 42 reg = <0x0 0x1>;
42 enable-method = "spin-table"; 43 enable-method = "spin-table";
43 cpu-release-addr = <0x0 0x8000fff8>; 44 cpu-release-addr = <0x0 0x8000fff8>;
45 next-level-cache = <&L2_0>;
44 }; 46 };
45 cpu@2 { 47 cpu@2 {
46 device_type = "cpu"; 48 device_type = "cpu";
@@ -48,6 +50,7 @@
48 reg = <0x0 0x2>; 50 reg = <0x0 0x2>;
49 enable-method = "spin-table"; 51 enable-method = "spin-table";
50 cpu-release-addr = <0x0 0x8000fff8>; 52 cpu-release-addr = <0x0 0x8000fff8>;
53 next-level-cache = <&L2_0>;
51 }; 54 };
52 cpu@3 { 55 cpu@3 {
53 device_type = "cpu"; 56 device_type = "cpu";
@@ -55,6 +58,11 @@
55 reg = <0x0 0x3>; 58 reg = <0x0 0x3>;
56 enable-method = "spin-table"; 59 enable-method = "spin-table";
57 cpu-release-addr = <0x0 0x8000fff8>; 60 cpu-release-addr = <0x0 0x8000fff8>;
61 next-level-cache = <&L2_0>;
62 };
63
64 L2_0: l2-cache0 {
65 compatible = "cache";
58 }; 66 };
59 }; 67 };
60 68
diff --git a/arch/arm64/boot/dts/arm/juno.dts b/arch/arm64/boot/dts/arm/juno.dts
index d429129ecb3d..133ee59de2d7 100644
--- a/arch/arm64/boot/dts/arm/juno.dts
+++ b/arch/arm64/boot/dts/arm/juno.dts
@@ -39,6 +39,7 @@
39 reg = <0x0 0x0>; 39 reg = <0x0 0x0>;
40 device_type = "cpu"; 40 device_type = "cpu";
41 enable-method = "psci"; 41 enable-method = "psci";
42 next-level-cache = <&A57_L2>;
42 }; 43 };
43 44
44 A57_1: cpu@1 { 45 A57_1: cpu@1 {
@@ -46,6 +47,7 @@
46 reg = <0x0 0x1>; 47 reg = <0x0 0x1>;
47 device_type = "cpu"; 48 device_type = "cpu";
48 enable-method = "psci"; 49 enable-method = "psci";
50 next-level-cache = <&A57_L2>;
49 }; 51 };
50 52
51 A53_0: cpu@100 { 53 A53_0: cpu@100 {
@@ -53,6 +55,7 @@
53 reg = <0x0 0x100>; 55 reg = <0x0 0x100>;
54 device_type = "cpu"; 56 device_type = "cpu";
55 enable-method = "psci"; 57 enable-method = "psci";
58 next-level-cache = <&A53_L2>;
56 }; 59 };
57 60
58 A53_1: cpu@101 { 61 A53_1: cpu@101 {
@@ -60,6 +63,7 @@
60 reg = <0x0 0x101>; 63 reg = <0x0 0x101>;
61 device_type = "cpu"; 64 device_type = "cpu";
62 enable-method = "psci"; 65 enable-method = "psci";
66 next-level-cache = <&A53_L2>;
63 }; 67 };
64 68
65 A53_2: cpu@102 { 69 A53_2: cpu@102 {
@@ -67,6 +71,7 @@
67 reg = <0x0 0x102>; 71 reg = <0x0 0x102>;
68 device_type = "cpu"; 72 device_type = "cpu";
69 enable-method = "psci"; 73 enable-method = "psci";
74 next-level-cache = <&A53_L2>;
70 }; 75 };
71 76
72 A53_3: cpu@103 { 77 A53_3: cpu@103 {
@@ -74,6 +79,15 @@
74 reg = <0x0 0x103>; 79 reg = <0x0 0x103>;
75 device_type = "cpu"; 80 device_type = "cpu";
76 enable-method = "psci"; 81 enable-method = "psci";
82 next-level-cache = <&A53_L2>;
83 };
84
85 A57_L2: l2-cache0 {
86 compatible = "cache";
87 };
88
89 A53_L2: l2-cache1 {
90 compatible = "cache";
77 }; 91 };
78 }; 92 };
79 93
diff --git a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
index efc59b3baf63..20addabbd127 100644
--- a/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
+++ b/arch/arm64/boot/dts/arm/rtsm_ve-aemv8a.dts
@@ -37,6 +37,7 @@
37 reg = <0x0 0x0>; 37 reg = <0x0 0x0>;
38 enable-method = "spin-table"; 38 enable-method = "spin-table";
39 cpu-release-addr = <0x0 0x8000fff8>; 39 cpu-release-addr = <0x0 0x8000fff8>;
40 next-level-cache = <&L2_0>;
40 }; 41 };
41 cpu@1 { 42 cpu@1 {
42 device_type = "cpu"; 43 device_type = "cpu";
@@ -44,6 +45,7 @@
44 reg = <0x0 0x1>; 45 reg = <0x0 0x1>;
45 enable-method = "spin-table"; 46 enable-method = "spin-table";
46 cpu-release-addr = <0x0 0x8000fff8>; 47 cpu-release-addr = <0x0 0x8000fff8>;
48 next-level-cache = <&L2_0>;
47 }; 49 };
48 cpu@2 { 50 cpu@2 {
49 device_type = "cpu"; 51 device_type = "cpu";
@@ -51,6 +53,7 @@
51 reg = <0x0 0x2>; 53 reg = <0x0 0x2>;
52 enable-method = "spin-table"; 54 enable-method = "spin-table";
53 cpu-release-addr = <0x0 0x8000fff8>; 55 cpu-release-addr = <0x0 0x8000fff8>;
56 next-level-cache = <&L2_0>;
54 }; 57 };
55 cpu@3 { 58 cpu@3 {
56 device_type = "cpu"; 59 device_type = "cpu";
@@ -58,6 +61,11 @@
58 reg = <0x0 0x3>; 61 reg = <0x0 0x3>;
59 enable-method = "spin-table"; 62 enable-method = "spin-table";
60 cpu-release-addr = <0x0 0x8000fff8>; 63 cpu-release-addr = <0x0 0x8000fff8>;
64 next-level-cache = <&L2_0>;
65 };
66
67 L2_0: l2-cache0 {
68 compatible = "cache";
61 }; 69 };
62 }; 70 };
63 71
diff --git a/arch/arm64/crypto/Makefile b/arch/arm64/crypto/Makefile
index 5720608c50b1..abb79b3cfcfe 100644
--- a/arch/arm64/crypto/Makefile
+++ b/arch/arm64/crypto/Makefile
@@ -29,7 +29,7 @@ aes-ce-blk-y := aes-glue-ce.o aes-ce.o
29obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o 29obj-$(CONFIG_CRYPTO_AES_ARM64_NEON_BLK) += aes-neon-blk.o
30aes-neon-blk-y := aes-glue-neon.o aes-neon.o 30aes-neon-blk-y := aes-glue-neon.o aes-neon.o
31 31
32AFLAGS_aes-ce.o := -DINTERLEAVE=2 -DINTERLEAVE_INLINE 32AFLAGS_aes-ce.o := -DINTERLEAVE=4
33AFLAGS_aes-neon.o := -DINTERLEAVE=4 33AFLAGS_aes-neon.o := -DINTERLEAVE=4
34 34
35CFLAGS_aes-glue-ce.o := -DUSE_V8_CRYPTO_EXTENSIONS 35CFLAGS_aes-glue-ce.o := -DUSE_V8_CRYPTO_EXTENSIONS
diff --git a/arch/arm64/include/asm/assembler.h b/arch/arm64/include/asm/assembler.h
index 5901480bfdca..750bac4e637e 100644
--- a/arch/arm64/include/asm/assembler.h
+++ b/arch/arm64/include/asm/assembler.h
@@ -20,6 +20,9 @@
20#error "Only include this from assembly code" 20#error "Only include this from assembly code"
21#endif 21#endif
22 22
23#ifndef __ASM_ASSEMBLER_H
24#define __ASM_ASSEMBLER_H
25
23#include <asm/ptrace.h> 26#include <asm/ptrace.h>
24#include <asm/thread_info.h> 27#include <asm/thread_info.h>
25 28
@@ -155,3 +158,5 @@ lr .req x30 // link register
155#endif 158#endif
156 orr \rd, \lbits, \hbits, lsl #32 159 orr \rd, \lbits, \hbits, lsl #32
157 .endm 160 .endm
161
162#endif /* __ASM_ASSEMBLER_H */
diff --git a/arch/arm64/include/asm/cpuidle.h b/arch/arm64/include/asm/cpuidle.h
index 0710654631e7..c60643f14cda 100644
--- a/arch/arm64/include/asm/cpuidle.h
+++ b/arch/arm64/include/asm/cpuidle.h
@@ -1,6 +1,8 @@
1#ifndef __ASM_CPUIDLE_H 1#ifndef __ASM_CPUIDLE_H
2#define __ASM_CPUIDLE_H 2#define __ASM_CPUIDLE_H
3 3
4#include <asm/proc-fns.h>
5
4#ifdef CONFIG_CPU_IDLE 6#ifdef CONFIG_CPU_IDLE
5extern int cpu_init_idle(unsigned int cpu); 7extern int cpu_init_idle(unsigned int cpu);
6extern int cpu_suspend(unsigned long arg); 8extern int cpu_suspend(unsigned long arg);
diff --git a/arch/arm64/include/asm/insn.h b/arch/arm64/include/asm/insn.h
index e2ff32a93b5c..d2f49423c5dc 100644
--- a/arch/arm64/include/asm/insn.h
+++ b/arch/arm64/include/asm/insn.h
@@ -264,8 +264,10 @@ __AARCH64_INSN_FUNCS(ands, 0x7F200000, 0x6A000000)
264__AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000) 264__AARCH64_INSN_FUNCS(bics, 0x7F200000, 0x6A200000)
265__AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000) 265__AARCH64_INSN_FUNCS(b, 0xFC000000, 0x14000000)
266__AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000) 266__AARCH64_INSN_FUNCS(bl, 0xFC000000, 0x94000000)
267__AARCH64_INSN_FUNCS(cbz, 0xFE000000, 0x34000000) 267__AARCH64_INSN_FUNCS(cbz, 0x7F000000, 0x34000000)
268__AARCH64_INSN_FUNCS(cbnz, 0xFE000000, 0x35000000) 268__AARCH64_INSN_FUNCS(cbnz, 0x7F000000, 0x35000000)
269__AARCH64_INSN_FUNCS(tbz, 0x7F000000, 0x36000000)
270__AARCH64_INSN_FUNCS(tbnz, 0x7F000000, 0x37000000)
269__AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000) 271__AARCH64_INSN_FUNCS(bcond, 0xFF000010, 0x54000000)
270__AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001) 272__AARCH64_INSN_FUNCS(svc, 0xFFE0001F, 0xD4000001)
271__AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002) 273__AARCH64_INSN_FUNCS(hvc, 0xFFE0001F, 0xD4000002)
diff --git a/arch/arm64/include/asm/kvm_arm.h b/arch/arm64/include/asm/kvm_arm.h
index 94674eb7e7bb..54bb4ba97441 100644
--- a/arch/arm64/include/asm/kvm_arm.h
+++ b/arch/arm64/include/asm/kvm_arm.h
@@ -129,6 +129,9 @@
129 * 40 bits wide (T0SZ = 24). Systems with a PARange smaller than 40 bits are 129 * 40 bits wide (T0SZ = 24). Systems with a PARange smaller than 40 bits are
130 * not known to exist and will break with this configuration. 130 * not known to exist and will break with this configuration.
131 * 131 *
132 * VTCR_EL2.PS is extracted from ID_AA64MMFR0_EL1.PARange at boot time
133 * (see hyp-init.S).
134 *
132 * Note that when using 4K pages, we concatenate two first level page tables 135 * Note that when using 4K pages, we concatenate two first level page tables
133 * together. 136 * together.
134 * 137 *
@@ -138,7 +141,6 @@
138#ifdef CONFIG_ARM64_64K_PAGES 141#ifdef CONFIG_ARM64_64K_PAGES
139/* 142/*
140 * Stage2 translation configuration: 143 * Stage2 translation configuration:
141 * 40bits output (PS = 2)
142 * 40bits input (T0SZ = 24) 144 * 40bits input (T0SZ = 24)
143 * 64kB pages (TG0 = 1) 145 * 64kB pages (TG0 = 1)
144 * 2 level page tables (SL = 1) 146 * 2 level page tables (SL = 1)
@@ -150,7 +152,6 @@
150#else 152#else
151/* 153/*
152 * Stage2 translation configuration: 154 * Stage2 translation configuration:
153 * 40bits output (PS = 2)
154 * 40bits input (T0SZ = 24) 155 * 40bits input (T0SZ = 24)
155 * 4kB pages (TG0 = 0) 156 * 4kB pages (TG0 = 0)
156 * 3 level page tables (SL = 1) 157 * 3 level page tables (SL = 1)
diff --git a/arch/arm64/include/asm/kvm_mmu.h b/arch/arm64/include/asm/kvm_mmu.h
index 6458b5373142..bbfb600fa822 100644
--- a/arch/arm64/include/asm/kvm_mmu.h
+++ b/arch/arm64/include/asm/kvm_mmu.h
@@ -158,6 +158,8 @@ static inline bool kvm_s2pmd_readonly(pmd_t *pmd)
158#define PTRS_PER_S2_PGD (1 << PTRS_PER_S2_PGD_SHIFT) 158#define PTRS_PER_S2_PGD (1 << PTRS_PER_S2_PGD_SHIFT)
159#define S2_PGD_ORDER get_order(PTRS_PER_S2_PGD * sizeof(pgd_t)) 159#define S2_PGD_ORDER get_order(PTRS_PER_S2_PGD * sizeof(pgd_t))
160 160
161#define kvm_pgd_index(addr) (((addr) >> PGDIR_SHIFT) & (PTRS_PER_S2_PGD - 1))
162
161/* 163/*
162 * If we are concatenating first level stage-2 page tables, we would have less 164 * If we are concatenating first level stage-2 page tables, we would have less
163 * than or equal to 16 pointers in the fake PGD, because that's what the 165 * than or equal to 16 pointers in the fake PGD, because that's what the
@@ -171,43 +173,6 @@ static inline bool kvm_s2pmd_readonly(pmd_t *pmd)
171#define KVM_PREALLOC_LEVEL (0) 173#define KVM_PREALLOC_LEVEL (0)
172#endif 174#endif
173 175
174/**
175 * kvm_prealloc_hwpgd - allocate inital table for VTTBR
176 * @kvm: The KVM struct pointer for the VM.
177 * @pgd: The kernel pseudo pgd
178 *
179 * When the kernel uses more levels of page tables than the guest, we allocate
180 * a fake PGD and pre-populate it to point to the next-level page table, which
181 * will be the real initial page table pointed to by the VTTBR.
182 *
183 * When KVM_PREALLOC_LEVEL==2, we allocate a single page for the PMD and
184 * the kernel will use folded pud. When KVM_PREALLOC_LEVEL==1, we
185 * allocate 2 consecutive PUD pages.
186 */
187static inline int kvm_prealloc_hwpgd(struct kvm *kvm, pgd_t *pgd)
188{
189 unsigned int i;
190 unsigned long hwpgd;
191
192 if (KVM_PREALLOC_LEVEL == 0)
193 return 0;
194
195 hwpgd = __get_free_pages(GFP_KERNEL | __GFP_ZERO, PTRS_PER_S2_PGD_SHIFT);
196 if (!hwpgd)
197 return -ENOMEM;
198
199 for (i = 0; i < PTRS_PER_S2_PGD; i++) {
200 if (KVM_PREALLOC_LEVEL == 1)
201 pgd_populate(NULL, pgd + i,
202 (pud_t *)hwpgd + i * PTRS_PER_PUD);
203 else if (KVM_PREALLOC_LEVEL == 2)
204 pud_populate(NULL, pud_offset(pgd, 0) + i,
205 (pmd_t *)hwpgd + i * PTRS_PER_PMD);
206 }
207
208 return 0;
209}
210
211static inline void *kvm_get_hwpgd(struct kvm *kvm) 176static inline void *kvm_get_hwpgd(struct kvm *kvm)
212{ 177{
213 pgd_t *pgd = kvm->arch.pgd; 178 pgd_t *pgd = kvm->arch.pgd;
@@ -224,12 +189,11 @@ static inline void *kvm_get_hwpgd(struct kvm *kvm)
224 return pmd_offset(pud, 0); 189 return pmd_offset(pud, 0);
225} 190}
226 191
227static inline void kvm_free_hwpgd(struct kvm *kvm) 192static inline unsigned int kvm_get_hwpgd_size(void)
228{ 193{
229 if (KVM_PREALLOC_LEVEL > 0) { 194 if (KVM_PREALLOC_LEVEL > 0)
230 unsigned long hwpgd = (unsigned long)kvm_get_hwpgd(kvm); 195 return PTRS_PER_S2_PGD * PAGE_SIZE;
231 free_pages(hwpgd, PTRS_PER_S2_PGD_SHIFT); 196 return PTRS_PER_S2_PGD * sizeof(pgd_t);
232 }
233} 197}
234 198
235static inline bool kvm_page_empty(void *ptr) 199static inline bool kvm_page_empty(void *ptr)
diff --git a/arch/arm64/include/asm/pgtable.h b/arch/arm64/include/asm/pgtable.h
index 16449c535e50..800ec0e87ed9 100644
--- a/arch/arm64/include/asm/pgtable.h
+++ b/arch/arm64/include/asm/pgtable.h
@@ -460,7 +460,7 @@ static inline pud_t *pud_offset(pgd_t *pgd, unsigned long addr)
460static inline pte_t pte_modify(pte_t pte, pgprot_t newprot) 460static inline pte_t pte_modify(pte_t pte, pgprot_t newprot)
461{ 461{
462 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY | 462 const pteval_t mask = PTE_USER | PTE_PXN | PTE_UXN | PTE_RDONLY |
463 PTE_PROT_NONE | PTE_VALID | PTE_WRITE; 463 PTE_PROT_NONE | PTE_WRITE | PTE_TYPE_MASK;
464 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask); 464 pte_val(pte) = (pte_val(pte) & ~mask) | (pgprot_val(newprot) & mask);
465 return pte; 465 return pte;
466} 466}
diff --git a/arch/arm64/include/asm/proc-fns.h b/arch/arm64/include/asm/proc-fns.h
index 9a8fd84f8fb2..941c375616e2 100644
--- a/arch/arm64/include/asm/proc-fns.h
+++ b/arch/arm64/include/asm/proc-fns.h
@@ -39,7 +39,11 @@ extern u64 cpu_do_resume(phys_addr_t ptr, u64 idmap_ttbr);
39 39
40#include <asm/memory.h> 40#include <asm/memory.h>
41 41
42#define cpu_switch_mm(pgd,mm) cpu_do_switch_mm(virt_to_phys(pgd),mm) 42#define cpu_switch_mm(pgd,mm) \
43do { \
44 BUG_ON(pgd == swapper_pg_dir); \
45 cpu_do_switch_mm(virt_to_phys(pgd),mm); \
46} while (0)
43 47
44#define cpu_get_pgd() \ 48#define cpu_get_pgd() \
45({ \ 49({ \
diff --git a/arch/arm64/include/asm/processor.h b/arch/arm64/include/asm/processor.h
index f9be30ea1cbd..20e9591a60cf 100644
--- a/arch/arm64/include/asm/processor.h
+++ b/arch/arm64/include/asm/processor.h
@@ -45,7 +45,8 @@
45#define STACK_TOP STACK_TOP_MAX 45#define STACK_TOP STACK_TOP_MAX
46#endif /* CONFIG_COMPAT */ 46#endif /* CONFIG_COMPAT */
47 47
48#define ARCH_LOW_ADDRESS_LIMIT PHYS_MASK 48extern phys_addr_t arm64_dma_phys_limit;
49#define ARCH_LOW_ADDRESS_LIMIT (arm64_dma_phys_limit - 1)
49#endif /* __KERNEL__ */ 50#endif /* __KERNEL__ */
50 51
51struct debug_info { 52struct debug_info {
diff --git a/arch/arm64/include/asm/tlb.h b/arch/arm64/include/asm/tlb.h
index c028fe37456f..53d9c354219f 100644
--- a/arch/arm64/include/asm/tlb.h
+++ b/arch/arm64/include/asm/tlb.h
@@ -48,6 +48,7 @@ static inline void tlb_flush(struct mmu_gather *tlb)
48static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte, 48static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
49 unsigned long addr) 49 unsigned long addr)
50{ 50{
51 __flush_tlb_pgtable(tlb->mm, addr);
51 pgtable_page_dtor(pte); 52 pgtable_page_dtor(pte);
52 tlb_remove_entry(tlb, pte); 53 tlb_remove_entry(tlb, pte);
53} 54}
@@ -56,6 +57,7 @@ static inline void __pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
56static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp, 57static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
57 unsigned long addr) 58 unsigned long addr)
58{ 59{
60 __flush_tlb_pgtable(tlb->mm, addr);
59 tlb_remove_entry(tlb, virt_to_page(pmdp)); 61 tlb_remove_entry(tlb, virt_to_page(pmdp));
60} 62}
61#endif 63#endif
@@ -64,6 +66,7 @@ static inline void __pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmdp,
64static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp, 66static inline void __pud_free_tlb(struct mmu_gather *tlb, pud_t *pudp,
65 unsigned long addr) 67 unsigned long addr)
66{ 68{
69 __flush_tlb_pgtable(tlb->mm, addr);
67 tlb_remove_entry(tlb, virt_to_page(pudp)); 70 tlb_remove_entry(tlb, virt_to_page(pudp));
68} 71}
69#endif 72#endif
diff --git a/arch/arm64/include/asm/tlbflush.h b/arch/arm64/include/asm/tlbflush.h
index 73f0ce570fb3..c3bb05b98616 100644
--- a/arch/arm64/include/asm/tlbflush.h
+++ b/arch/arm64/include/asm/tlbflush.h
@@ -24,11 +24,6 @@
24#include <linux/sched.h> 24#include <linux/sched.h>
25#include <asm/cputype.h> 25#include <asm/cputype.h>
26 26
27extern void __cpu_flush_user_tlb_range(unsigned long, unsigned long, struct vm_area_struct *);
28extern void __cpu_flush_kern_tlb_range(unsigned long, unsigned long);
29
30extern struct cpu_tlb_fns cpu_tlb;
31
32/* 27/*
33 * TLB Management 28 * TLB Management
34 * ============== 29 * ==============
@@ -149,6 +144,19 @@ static inline void flush_tlb_kernel_range(unsigned long start, unsigned long end
149} 144}
150 145
151/* 146/*
147 * Used to invalidate the TLB (walk caches) corresponding to intermediate page
148 * table levels (pgd/pud/pmd).
149 */
150static inline void __flush_tlb_pgtable(struct mm_struct *mm,
151 unsigned long uaddr)
152{
153 unsigned long addr = uaddr >> 12 | ((unsigned long)ASID(mm) << 48);
154
155 dsb(ishst);
156 asm("tlbi vae1is, %0" : : "r" (addr));
157 dsb(ish);
158}
159/*
152 * On AArch64, the cache coherency is handled via the set_pte_at() function. 160 * On AArch64, the cache coherency is handled via the set_pte_at() function.
153 */ 161 */
154static inline void update_mmu_cache(struct vm_area_struct *vma, 162static inline void update_mmu_cache(struct vm_area_struct *vma,
diff --git a/arch/arm64/kernel/Makefile b/arch/arm64/kernel/Makefile
index bef04afd6031..5ee07eee80c2 100644
--- a/arch/arm64/kernel/Makefile
+++ b/arch/arm64/kernel/Makefile
@@ -15,8 +15,9 @@ CFLAGS_REMOVE_return_address.o = -pg
15arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \ 15arm64-obj-y := cputable.o debug-monitors.o entry.o irq.o fpsimd.o \
16 entry-fpsimd.o process.o ptrace.o setup.o signal.o \ 16 entry-fpsimd.o process.o ptrace.o setup.o signal.o \
17 sys.o stacktrace.o time.o traps.o io.o vdso.o \ 17 sys.o stacktrace.o time.o traps.o io.o vdso.o \
18 hyp-stub.o psci.o cpu_ops.o insn.o return_address.o \ 18 hyp-stub.o psci.o psci-call.o cpu_ops.o insn.o \
19 cpuinfo.o cpu_errata.o alternative.o cacheinfo.o 19 return_address.o cpuinfo.o cpu_errata.o \
20 alternative.o cacheinfo.o
20 21
21arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \ 22arm64-obj-$(CONFIG_COMPAT) += sys32.o kuser32.o signal32.o \
22 sys_compat.o entry32.o \ 23 sys_compat.o entry32.o \
diff --git a/arch/arm64/kernel/efi.c b/arch/arm64/kernel/efi.c
index b42c7b480e1e..ab21e0d58278 100644
--- a/arch/arm64/kernel/efi.c
+++ b/arch/arm64/kernel/efi.c
@@ -337,7 +337,11 @@ core_initcall(arm64_dmi_init);
337 337
338static void efi_set_pgd(struct mm_struct *mm) 338static void efi_set_pgd(struct mm_struct *mm)
339{ 339{
340 cpu_switch_mm(mm->pgd, mm); 340 if (mm == &init_mm)
341 cpu_set_reserved_ttbr0();
342 else
343 cpu_switch_mm(mm->pgd, mm);
344
341 flush_tlb_all(); 345 flush_tlb_all();
342 if (icache_is_aivivt()) 346 if (icache_is_aivivt())
343 __flush_icache_all(); 347 __flush_icache_all();
@@ -354,3 +358,12 @@ void efi_virtmap_unload(void)
354 efi_set_pgd(current->active_mm); 358 efi_set_pgd(current->active_mm);
355 preempt_enable(); 359 preempt_enable();
356} 360}
361
362/*
363 * UpdateCapsule() depends on the system being shutdown via
364 * ResetSystem().
365 */
366bool efi_poweroff_required(void)
367{
368 return efi_enabled(EFI_RUNTIME_SERVICES);
369}
diff --git a/arch/arm64/kernel/ftrace.c b/arch/arm64/kernel/ftrace.c
index cf8556ae09d0..c851be795080 100644
--- a/arch/arm64/kernel/ftrace.c
+++ b/arch/arm64/kernel/ftrace.c
@@ -156,7 +156,7 @@ static int ftrace_modify_graph_caller(bool enable)
156 156
157 branch = aarch64_insn_gen_branch_imm(pc, 157 branch = aarch64_insn_gen_branch_imm(pc,
158 (unsigned long)ftrace_graph_caller, 158 (unsigned long)ftrace_graph_caller,
159 AARCH64_INSN_BRANCH_LINK); 159 AARCH64_INSN_BRANCH_NOLINK);
160 nop = aarch64_insn_gen_nop(); 160 nop = aarch64_insn_gen_nop();
161 161
162 if (enable) 162 if (enable)
diff --git a/arch/arm64/kernel/head.S b/arch/arm64/kernel/head.S
index 8ce88e08c030..07f930540f4a 100644
--- a/arch/arm64/kernel/head.S
+++ b/arch/arm64/kernel/head.S
@@ -585,8 +585,8 @@ ENDPROC(set_cpu_boot_mode_flag)
585 * zeroing of .bss would clobber it. 585 * zeroing of .bss would clobber it.
586 */ 586 */
587 .pushsection .data..cacheline_aligned 587 .pushsection .data..cacheline_aligned
588ENTRY(__boot_cpu_mode)
589 .align L1_CACHE_SHIFT 588 .align L1_CACHE_SHIFT
589ENTRY(__boot_cpu_mode)
590 .long BOOT_CPU_MODE_EL2 590 .long BOOT_CPU_MODE_EL2
591 .long 0 591 .long 0
592 .popsection 592 .popsection
diff --git a/arch/arm64/kernel/insn.c b/arch/arm64/kernel/insn.c
index 27d4864577e5..c8eca88f12e6 100644
--- a/arch/arm64/kernel/insn.c
+++ b/arch/arm64/kernel/insn.c
@@ -87,8 +87,10 @@ static void __kprobes *patch_map(void *addr, int fixmap)
87 87
88 if (module && IS_ENABLED(CONFIG_DEBUG_SET_MODULE_RONX)) 88 if (module && IS_ENABLED(CONFIG_DEBUG_SET_MODULE_RONX))
89 page = vmalloc_to_page(addr); 89 page = vmalloc_to_page(addr);
90 else 90 else if (!module && IS_ENABLED(CONFIG_DEBUG_RODATA))
91 page = virt_to_page(addr); 91 page = virt_to_page(addr);
92 else
93 return addr;
92 94
93 BUG_ON(!page); 95 BUG_ON(!page);
94 set_fixmap(fixmap, page_to_phys(page)); 96 set_fixmap(fixmap, page_to_phys(page));
diff --git a/arch/arm64/kernel/process.c b/arch/arm64/kernel/process.c
index fde9923af859..c6b1f3b96f45 100644
--- a/arch/arm64/kernel/process.c
+++ b/arch/arm64/kernel/process.c
@@ -21,6 +21,7 @@
21#include <stdarg.h> 21#include <stdarg.h>
22 22
23#include <linux/compat.h> 23#include <linux/compat.h>
24#include <linux/efi.h>
24#include <linux/export.h> 25#include <linux/export.h>
25#include <linux/sched.h> 26#include <linux/sched.h>
26#include <linux/kernel.h> 27#include <linux/kernel.h>
@@ -150,6 +151,13 @@ void machine_restart(char *cmd)
150 local_irq_disable(); 151 local_irq_disable();
151 smp_send_stop(); 152 smp_send_stop();
152 153
154 /*
155 * UpdateCapsule() depends on the system being reset via
156 * ResetSystem().
157 */
158 if (efi_enabled(EFI_RUNTIME_SERVICES))
159 efi_reboot(reboot_mode, NULL);
160
153 /* Now call the architecture specific reboot code. */ 161 /* Now call the architecture specific reboot code. */
154 if (arm_pm_restart) 162 if (arm_pm_restart)
155 arm_pm_restart(reboot_mode, cmd); 163 arm_pm_restart(reboot_mode, cmd);
diff --git a/arch/arm64/kernel/psci-call.S b/arch/arm64/kernel/psci-call.S
new file mode 100644
index 000000000000..cf83e61cd3b5
--- /dev/null
+++ b/arch/arm64/kernel/psci-call.S
@@ -0,0 +1,28 @@
1/*
2 * This program is free software; you can redistribute it and/or modify
3 * it under the terms of the GNU General Public License version 2 as
4 * published by the Free Software Foundation.
5 *
6 * This program is distributed in the hope that it will be useful,
7 * but WITHOUT ANY WARRANTY; without even the implied warranty of
8 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 *
11 * Copyright (C) 2015 ARM Limited
12 *
13 * Author: Will Deacon <will.deacon@arm.com>
14 */
15
16#include <linux/linkage.h>
17
18/* int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */
19ENTRY(__invoke_psci_fn_hvc)
20 hvc #0
21 ret
22ENDPROC(__invoke_psci_fn_hvc)
23
24/* int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1, u64 arg2) */
25ENTRY(__invoke_psci_fn_smc)
26 smc #0
27 ret
28ENDPROC(__invoke_psci_fn_smc)
diff --git a/arch/arm64/kernel/psci.c b/arch/arm64/kernel/psci.c
index 3425f311c49e..9b8a70ae64a1 100644
--- a/arch/arm64/kernel/psci.c
+++ b/arch/arm64/kernel/psci.c
@@ -57,6 +57,9 @@ static struct psci_operations psci_ops;
57static int (*invoke_psci_fn)(u64, u64, u64, u64); 57static int (*invoke_psci_fn)(u64, u64, u64, u64);
58typedef int (*psci_initcall_t)(const struct device_node *); 58typedef int (*psci_initcall_t)(const struct device_node *);
59 59
60asmlinkage int __invoke_psci_fn_hvc(u64, u64, u64, u64);
61asmlinkage int __invoke_psci_fn_smc(u64, u64, u64, u64);
62
60enum psci_function { 63enum psci_function {
61 PSCI_FN_CPU_SUSPEND, 64 PSCI_FN_CPU_SUSPEND,
62 PSCI_FN_CPU_ON, 65 PSCI_FN_CPU_ON,
@@ -109,40 +112,6 @@ static void psci_power_state_unpack(u32 power_state,
109 PSCI_0_2_POWER_STATE_AFFL_SHIFT; 112 PSCI_0_2_POWER_STATE_AFFL_SHIFT;
110} 113}
111 114
112/*
113 * The following two functions are invoked via the invoke_psci_fn pointer
114 * and will not be inlined, allowing us to piggyback on the AAPCS.
115 */
116static noinline int __invoke_psci_fn_hvc(u64 function_id, u64 arg0, u64 arg1,
117 u64 arg2)
118{
119 asm volatile(
120 __asmeq("%0", "x0")
121 __asmeq("%1", "x1")
122 __asmeq("%2", "x2")
123 __asmeq("%3", "x3")
124 "hvc #0\n"
125 : "+r" (function_id)
126 : "r" (arg0), "r" (arg1), "r" (arg2));
127
128 return function_id;
129}
130
131static noinline int __invoke_psci_fn_smc(u64 function_id, u64 arg0, u64 arg1,
132 u64 arg2)
133{
134 asm volatile(
135 __asmeq("%0", "x0")
136 __asmeq("%1", "x1")
137 __asmeq("%2", "x2")
138 __asmeq("%3", "x3")
139 "smc #0\n"
140 : "+r" (function_id)
141 : "r" (arg0), "r" (arg1), "r" (arg2));
142
143 return function_id;
144}
145
146static int psci_get_version(void) 115static int psci_get_version(void)
147{ 116{
148 int err; 117 int err;
diff --git a/arch/arm64/kernel/signal32.c b/arch/arm64/kernel/signal32.c
index c20a300e2213..d26fcd4cd6e6 100644
--- a/arch/arm64/kernel/signal32.c
+++ b/arch/arm64/kernel/signal32.c
@@ -154,8 +154,7 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from)
154 case __SI_TIMER: 154 case __SI_TIMER:
155 err |= __put_user(from->si_tid, &to->si_tid); 155 err |= __put_user(from->si_tid, &to->si_tid);
156 err |= __put_user(from->si_overrun, &to->si_overrun); 156 err |= __put_user(from->si_overrun, &to->si_overrun);
157 err |= __put_user((compat_uptr_t)(unsigned long)from->si_ptr, 157 err |= __put_user(from->si_int, &to->si_int);
158 &to->si_ptr);
159 break; 158 break;
160 case __SI_POLL: 159 case __SI_POLL:
161 err |= __put_user(from->si_band, &to->si_band); 160 err |= __put_user(from->si_band, &to->si_band);
@@ -184,7 +183,7 @@ int copy_siginfo_to_user32(compat_siginfo_t __user *to, const siginfo_t *from)
184 case __SI_MESGQ: /* But this is */ 183 case __SI_MESGQ: /* But this is */
185 err |= __put_user(from->si_pid, &to->si_pid); 184 err |= __put_user(from->si_pid, &to->si_pid);
186 err |= __put_user(from->si_uid, &to->si_uid); 185 err |= __put_user(from->si_uid, &to->si_uid);
187 err |= __put_user((compat_uptr_t)(unsigned long)from->si_ptr, &to->si_ptr); 186 err |= __put_user(from->si_int, &to->si_int);
188 break; 187 break;
189 case __SI_SYS: 188 case __SI_SYS:
190 err |= __put_user((compat_uptr_t)(unsigned long) 189 err |= __put_user((compat_uptr_t)(unsigned long)
diff --git a/arch/arm64/kernel/vdso/gettimeofday.S b/arch/arm64/kernel/vdso/gettimeofday.S
index fe652ffd34c2..efa79e8d4196 100644
--- a/arch/arm64/kernel/vdso/gettimeofday.S
+++ b/arch/arm64/kernel/vdso/gettimeofday.S
@@ -174,8 +174,6 @@ ENDPROC(__kernel_clock_gettime)
174/* int __kernel_clock_getres(clockid_t clock_id, struct timespec *res); */ 174/* int __kernel_clock_getres(clockid_t clock_id, struct timespec *res); */
175ENTRY(__kernel_clock_getres) 175ENTRY(__kernel_clock_getres)
176 .cfi_startproc 176 .cfi_startproc
177 cbz w1, 3f
178
179 cmp w0, #CLOCK_REALTIME 177 cmp w0, #CLOCK_REALTIME
180 ccmp w0, #CLOCK_MONOTONIC, #0x4, ne 178 ccmp w0, #CLOCK_MONOTONIC, #0x4, ne
181 b.ne 1f 179 b.ne 1f
@@ -188,6 +186,7 @@ ENTRY(__kernel_clock_getres)
188 b.ne 4f 186 b.ne 4f
189 ldr x2, 6f 187 ldr x2, 6f
1902: 1882:
189 cbz w1, 3f
191 stp xzr, x2, [x1] 190 stp xzr, x2, [x1]
192 191
1933: /* res == NULL. */ 1923: /* res == NULL. */
diff --git a/arch/arm64/mm/dma-mapping.c b/arch/arm64/mm/dma-mapping.c
index 0a24b9b8c698..ef7d112f5ce0 100644
--- a/arch/arm64/mm/dma-mapping.c
+++ b/arch/arm64/mm/dma-mapping.c
@@ -51,7 +51,7 @@ static int __init early_coherent_pool(char *p)
51} 51}
52early_param("coherent_pool", early_coherent_pool); 52early_param("coherent_pool", early_coherent_pool);
53 53
54static void *__alloc_from_pool(size_t size, struct page **ret_page) 54static void *__alloc_from_pool(size_t size, struct page **ret_page, gfp_t flags)
55{ 55{
56 unsigned long val; 56 unsigned long val;
57 void *ptr = NULL; 57 void *ptr = NULL;
@@ -67,6 +67,8 @@ static void *__alloc_from_pool(size_t size, struct page **ret_page)
67 67
68 *ret_page = phys_to_page(phys); 68 *ret_page = phys_to_page(phys);
69 ptr = (void *)val; 69 ptr = (void *)val;
70 if (flags & __GFP_ZERO)
71 memset(ptr, 0, size);
70 } 72 }
71 73
72 return ptr; 74 return ptr;
@@ -101,6 +103,7 @@ static void *__dma_alloc_coherent(struct device *dev, size_t size,
101 flags |= GFP_DMA; 103 flags |= GFP_DMA;
102 if (IS_ENABLED(CONFIG_DMA_CMA) && (flags & __GFP_WAIT)) { 104 if (IS_ENABLED(CONFIG_DMA_CMA) && (flags & __GFP_WAIT)) {
103 struct page *page; 105 struct page *page;
106 void *addr;
104 107
105 size = PAGE_ALIGN(size); 108 size = PAGE_ALIGN(size);
106 page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT, 109 page = dma_alloc_from_contiguous(dev, size >> PAGE_SHIFT,
@@ -109,7 +112,10 @@ static void *__dma_alloc_coherent(struct device *dev, size_t size,
109 return NULL; 112 return NULL;
110 113
111 *dma_handle = phys_to_dma(dev, page_to_phys(page)); 114 *dma_handle = phys_to_dma(dev, page_to_phys(page));
112 return page_address(page); 115 addr = page_address(page);
116 if (flags & __GFP_ZERO)
117 memset(addr, 0, size);
118 return addr;
113 } else { 119 } else {
114 return swiotlb_alloc_coherent(dev, size, dma_handle, flags); 120 return swiotlb_alloc_coherent(dev, size, dma_handle, flags);
115 } 121 }
@@ -146,7 +152,7 @@ static void *__dma_alloc(struct device *dev, size_t size,
146 152
147 if (!coherent && !(flags & __GFP_WAIT)) { 153 if (!coherent && !(flags & __GFP_WAIT)) {
148 struct page *page = NULL; 154 struct page *page = NULL;
149 void *addr = __alloc_from_pool(size, &page); 155 void *addr = __alloc_from_pool(size, &page, flags);
150 156
151 if (addr) 157 if (addr)
152 *dma_handle = phys_to_dma(dev, page_to_phys(page)); 158 *dma_handle = phys_to_dma(dev, page_to_phys(page));
@@ -348,8 +354,6 @@ static struct dma_map_ops swiotlb_dma_ops = {
348 .mapping_error = swiotlb_dma_mapping_error, 354 .mapping_error = swiotlb_dma_mapping_error,
349}; 355};
350 356
351extern int swiotlb_late_init_with_default_size(size_t default_size);
352
353static int __init atomic_pool_init(void) 357static int __init atomic_pool_init(void)
354{ 358{
355 pgprot_t prot = __pgprot(PROT_NORMAL_NC); 359 pgprot_t prot = __pgprot(PROT_NORMAL_NC);
@@ -411,21 +415,13 @@ out:
411 return -ENOMEM; 415 return -ENOMEM;
412} 416}
413 417
414static int __init swiotlb_late_init(void) 418static int __init arm64_dma_init(void)
415{ 419{
416 size_t swiotlb_size = min(SZ_64M, MAX_ORDER_NR_PAGES << PAGE_SHIFT); 420 int ret;
417 421
418 dma_ops = &swiotlb_dma_ops; 422 dma_ops = &swiotlb_dma_ops;
419 423
420 return swiotlb_late_init_with_default_size(swiotlb_size); 424 ret = atomic_pool_init();
421}
422
423static int __init arm64_dma_init(void)
424{
425 int ret = 0;
426
427 ret |= swiotlb_late_init();
428 ret |= atomic_pool_init();
429 425
430 return ret; 426 return ret;
431} 427}
diff --git a/arch/arm64/mm/init.c b/arch/arm64/mm/init.c
index 71145f952070..ae85da6307bb 100644
--- a/arch/arm64/mm/init.c
+++ b/arch/arm64/mm/init.c
@@ -33,6 +33,7 @@
33#include <linux/dma-mapping.h> 33#include <linux/dma-mapping.h>
34#include <linux/dma-contiguous.h> 34#include <linux/dma-contiguous.h>
35#include <linux/efi.h> 35#include <linux/efi.h>
36#include <linux/swiotlb.h>
36 37
37#include <asm/fixmap.h> 38#include <asm/fixmap.h>
38#include <asm/memory.h> 39#include <asm/memory.h>
@@ -45,6 +46,7 @@
45#include "mm.h" 46#include "mm.h"
46 47
47phys_addr_t memstart_addr __read_mostly = 0; 48phys_addr_t memstart_addr __read_mostly = 0;
49phys_addr_t arm64_dma_phys_limit __read_mostly;
48 50
49#ifdef CONFIG_BLK_DEV_INITRD 51#ifdef CONFIG_BLK_DEV_INITRD
50static int __init early_initrd(char *p) 52static int __init early_initrd(char *p)
@@ -85,7 +87,7 @@ static void __init zone_sizes_init(unsigned long min, unsigned long max)
85 87
86 /* 4GB maximum for 32-bit only capable devices */ 88 /* 4GB maximum for 32-bit only capable devices */
87 if (IS_ENABLED(CONFIG_ZONE_DMA)) { 89 if (IS_ENABLED(CONFIG_ZONE_DMA)) {
88 max_dma = PFN_DOWN(max_zone_dma_phys()); 90 max_dma = PFN_DOWN(arm64_dma_phys_limit);
89 zone_size[ZONE_DMA] = max_dma - min; 91 zone_size[ZONE_DMA] = max_dma - min;
90 } 92 }
91 zone_size[ZONE_NORMAL] = max - max_dma; 93 zone_size[ZONE_NORMAL] = max - max_dma;
@@ -156,8 +158,6 @@ early_param("mem", early_mem);
156 158
157void __init arm64_memblock_init(void) 159void __init arm64_memblock_init(void)
158{ 160{
159 phys_addr_t dma_phys_limit = 0;
160
161 memblock_enforce_memory_limit(memory_limit); 161 memblock_enforce_memory_limit(memory_limit);
162 162
163 /* 163 /*
@@ -174,8 +174,10 @@ void __init arm64_memblock_init(void)
174 174
175 /* 4GB maximum for 32-bit only capable devices */ 175 /* 4GB maximum for 32-bit only capable devices */
176 if (IS_ENABLED(CONFIG_ZONE_DMA)) 176 if (IS_ENABLED(CONFIG_ZONE_DMA))
177 dma_phys_limit = max_zone_dma_phys(); 177 arm64_dma_phys_limit = max_zone_dma_phys();
178 dma_contiguous_reserve(dma_phys_limit); 178 else
179 arm64_dma_phys_limit = PHYS_MASK + 1;
180 dma_contiguous_reserve(arm64_dma_phys_limit);
179 181
180 memblock_allow_resize(); 182 memblock_allow_resize();
181 memblock_dump_all(); 183 memblock_dump_all();
@@ -276,6 +278,8 @@ static void __init free_unused_memmap(void)
276 */ 278 */
277void __init mem_init(void) 279void __init mem_init(void)
278{ 280{
281 swiotlb_init(1);
282
279 set_max_mapnr(pfn_to_page(max_pfn) - mem_map); 283 set_max_mapnr(pfn_to_page(max_pfn) - mem_map);
280 284
281#ifndef CONFIG_SPARSEMEM_VMEMMAP 285#ifndef CONFIG_SPARSEMEM_VMEMMAP
diff --git a/arch/arm64/mm/pageattr.c b/arch/arm64/mm/pageattr.c
index bb0ea94c4ba1..1d3ec3ddd84b 100644
--- a/arch/arm64/mm/pageattr.c
+++ b/arch/arm64/mm/pageattr.c
@@ -51,7 +51,10 @@ static int change_memory_common(unsigned long addr, int numpages,
51 WARN_ON_ONCE(1); 51 WARN_ON_ONCE(1);
52 } 52 }
53 53
54 if (!is_module_address(start) || !is_module_address(end - 1)) 54 if (start < MODULES_VADDR || start >= MODULES_END)
55 return -EINVAL;
56
57 if (end < MODULES_VADDR || end >= MODULES_END)
55 return -EINVAL; 58 return -EINVAL;
56 59
57 data.set_mask = set_mask; 60 data.set_mask = set_mask;
diff --git a/arch/blackfin/mach-bf527/boards/ad7160eval.c b/arch/blackfin/mach-bf527/boards/ad7160eval.c
index 9501bd8d9cd1..68f2a8a806ea 100644
--- a/arch/blackfin/mach-bf527/boards/ad7160eval.c
+++ b/arch/blackfin/mach-bf527/boards/ad7160eval.c
@@ -666,7 +666,14 @@ static struct platform_device bfin_sport1_uart_device = {
666#endif 666#endif
667 667
668#if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY) 668#if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
669#include <asm/bfin_rotary.h> 669#include <linux/platform_data/bfin_rotary.h>
670
671static const u16 per_cnt[] = {
672 P_CNT_CUD,
673 P_CNT_CDG,
674 P_CNT_CZM,
675 0
676};
670 677
671static struct bfin_rotary_platform_data bfin_rotary_data = { 678static struct bfin_rotary_platform_data bfin_rotary_data = {
672 /*.rotary_up_key = KEY_UP,*/ 679 /*.rotary_up_key = KEY_UP,*/
@@ -676,10 +683,16 @@ static struct bfin_rotary_platform_data bfin_rotary_data = {
676 .debounce = 10, /* 0..17 */ 683 .debounce = 10, /* 0..17 */
677 .mode = ROT_QUAD_ENC | ROT_DEBE, 684 .mode = ROT_QUAD_ENC | ROT_DEBE,
678 .pm_wakeup = 1, 685 .pm_wakeup = 1,
686 .pin_list = per_cnt,
679}; 687};
680 688
681static struct resource bfin_rotary_resources[] = { 689static struct resource bfin_rotary_resources[] = {
682 { 690 {
691 .start = CNT_CONFIG,
692 .end = CNT_CONFIG + 0xff,
693 .flags = IORESOURCE_MEM,
694 },
695 {
683 .start = IRQ_CNT, 696 .start = IRQ_CNT,
684 .end = IRQ_CNT, 697 .end = IRQ_CNT,
685 .flags = IORESOURCE_IRQ, 698 .flags = IORESOURCE_IRQ,
diff --git a/arch/blackfin/mach-bf527/boards/ezkit.c b/arch/blackfin/mach-bf527/boards/ezkit.c
index d64f565dc2a0..d4219e8e5ab8 100644
--- a/arch/blackfin/mach-bf527/boards/ezkit.c
+++ b/arch/blackfin/mach-bf527/boards/ezkit.c
@@ -1092,7 +1092,14 @@ static struct platform_device bfin_device_gpiokeys = {
1092#endif 1092#endif
1093 1093
1094#if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY) 1094#if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
1095#include <asm/bfin_rotary.h> 1095#include <linux/platform_data/bfin_rotary.h>
1096
1097static const u16 per_cnt[] = {
1098 P_CNT_CUD,
1099 P_CNT_CDG,
1100 P_CNT_CZM,
1101 0
1102};
1096 1103
1097static struct bfin_rotary_platform_data bfin_rotary_data = { 1104static struct bfin_rotary_platform_data bfin_rotary_data = {
1098 /*.rotary_up_key = KEY_UP,*/ 1105 /*.rotary_up_key = KEY_UP,*/
@@ -1102,10 +1109,16 @@ static struct bfin_rotary_platform_data bfin_rotary_data = {
1102 .debounce = 10, /* 0..17 */ 1109 .debounce = 10, /* 0..17 */
1103 .mode = ROT_QUAD_ENC | ROT_DEBE, 1110 .mode = ROT_QUAD_ENC | ROT_DEBE,
1104 .pm_wakeup = 1, 1111 .pm_wakeup = 1,
1112 .pin_list = per_cnt,
1105}; 1113};
1106 1114
1107static struct resource bfin_rotary_resources[] = { 1115static struct resource bfin_rotary_resources[] = {
1108 { 1116 {
1117 .start = CNT_CONFIG,
1118 .end = CNT_CONFIG + 0xff,
1119 .flags = IORESOURCE_MEM,
1120 },
1121 {
1109 .start = IRQ_CNT, 1122 .start = IRQ_CNT,
1110 .end = IRQ_CNT, 1123 .end = IRQ_CNT,
1111 .flags = IORESOURCE_IRQ, 1124 .flags = IORESOURCE_IRQ,
diff --git a/arch/blackfin/mach-bf548/boards/ezkit.c b/arch/blackfin/mach-bf548/boards/ezkit.c
index 1fe7ff286619..4204b9842532 100644
--- a/arch/blackfin/mach-bf548/boards/ezkit.c
+++ b/arch/blackfin/mach-bf548/boards/ezkit.c
@@ -159,7 +159,7 @@ static struct platform_device bf54x_kpad_device = {
159#endif 159#endif
160 160
161#if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY) 161#if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
162#include <asm/bfin_rotary.h> 162#include <linux/platform_data/bfin_rotary.h>
163 163
164static struct bfin_rotary_platform_data bfin_rotary_data = { 164static struct bfin_rotary_platform_data bfin_rotary_data = {
165 /*.rotary_up_key = KEY_UP,*/ 165 /*.rotary_up_key = KEY_UP,*/
@@ -173,6 +173,11 @@ static struct bfin_rotary_platform_data bfin_rotary_data = {
173 173
174static struct resource bfin_rotary_resources[] = { 174static struct resource bfin_rotary_resources[] = {
175 { 175 {
176 .start = CNT_CONFIG,
177 .end = CNT_CONFIG + 0xff,
178 .flags = IORESOURCE_MEM,
179 },
180 {
176 .start = IRQ_CNT, 181 .start = IRQ_CNT,
177 .end = IRQ_CNT, 182 .end = IRQ_CNT,
178 .flags = IORESOURCE_IRQ, 183 .flags = IORESOURCE_IRQ,
diff --git a/arch/blackfin/mach-bf609/boards/ezkit.c b/arch/blackfin/mach-bf609/boards/ezkit.c
index e2c0b024ce88..7f9fc272ec30 100644
--- a/arch/blackfin/mach-bf609/boards/ezkit.c
+++ b/arch/blackfin/mach-bf609/boards/ezkit.c
@@ -75,7 +75,7 @@ static struct platform_device bfin_isp1760_device = {
75#endif 75#endif
76 76
77#if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY) 77#if IS_ENABLED(CONFIG_INPUT_BFIN_ROTARY)
78#include <asm/bfin_rotary.h> 78#include <linux/platform_data/bfin_rotary.h>
79 79
80static struct bfin_rotary_platform_data bfin_rotary_data = { 80static struct bfin_rotary_platform_data bfin_rotary_data = {
81 /*.rotary_up_key = KEY_UP,*/ 81 /*.rotary_up_key = KEY_UP,*/
@@ -88,6 +88,11 @@ static struct bfin_rotary_platform_data bfin_rotary_data = {
88 88
89static struct resource bfin_rotary_resources[] = { 89static struct resource bfin_rotary_resources[] = {
90 { 90 {
91 .start = CNT_CONFIG,
92 .end = CNT_CONFIG + 0xff,
93 .flags = IORESOURCE_MEM,
94 },
95 {
91 .start = IRQ_CNT, 96 .start = IRQ_CNT,
92 .end = IRQ_CNT, 97 .end = IRQ_CNT,
93 .flags = IORESOURCE_IRQ, 98 .flags = IORESOURCE_IRQ,
diff --git a/arch/c6x/include/asm/pgtable.h b/arch/c6x/include/asm/pgtable.h
index 78d4483ba40c..ec4db6df5e0d 100644
--- a/arch/c6x/include/asm/pgtable.h
+++ b/arch/c6x/include/asm/pgtable.h
@@ -67,6 +67,11 @@ extern unsigned long empty_zero_page;
67 */ 67 */
68#define pgtable_cache_init() do { } while (0) 68#define pgtable_cache_init() do { } while (0)
69 69
70/*
71 * c6x is !MMU, so define the simpliest implementation
72 */
73#define pgprot_writecombine pgprot_noncached
74
70#include <asm-generic/pgtable.h> 75#include <asm-generic/pgtable.h>
71 76
72#endif /* _ASM_C6X_PGTABLE_H */ 77#endif /* _ASM_C6X_PGTABLE_H */
diff --git a/arch/frv/include/asm/pgtable.h b/arch/frv/include/asm/pgtable.h
index 93bcf2abd1a1..07d7a7ef8bd5 100644
--- a/arch/frv/include/asm/pgtable.h
+++ b/arch/frv/include/asm/pgtable.h
@@ -123,12 +123,14 @@ extern unsigned long empty_zero_page;
123#define PGDIR_MASK (~(PGDIR_SIZE - 1)) 123#define PGDIR_MASK (~(PGDIR_SIZE - 1))
124#define PTRS_PER_PGD 64 124#define PTRS_PER_PGD 64
125 125
126#define __PAGETABLE_PUD_FOLDED
126#define PUD_SHIFT 26 127#define PUD_SHIFT 26
127#define PTRS_PER_PUD 1 128#define PTRS_PER_PUD 1
128#define PUD_SIZE (1UL << PUD_SHIFT) 129#define PUD_SIZE (1UL << PUD_SHIFT)
129#define PUD_MASK (~(PUD_SIZE - 1)) 130#define PUD_MASK (~(PUD_SIZE - 1))
130#define PUE_SIZE 256 131#define PUE_SIZE 256
131 132
133#define __PAGETABLE_PMD_FOLDED
132#define PMD_SHIFT 26 134#define PMD_SHIFT 26
133#define PMD_SIZE (1UL << PMD_SHIFT) 135#define PMD_SIZE (1UL << PMD_SHIFT)
134#define PMD_MASK (~(PMD_SIZE - 1)) 136#define PMD_MASK (~(PMD_SIZE - 1))
diff --git a/arch/m32r/include/asm/pgtable-2level.h b/arch/m32r/include/asm/pgtable-2level.h
index 8fd8ee70266a..421e6ba3a173 100644
--- a/arch/m32r/include/asm/pgtable-2level.h
+++ b/arch/m32r/include/asm/pgtable-2level.h
@@ -13,6 +13,7 @@
13 * the M32R is two-level, so we don't really have any 13 * the M32R is two-level, so we don't really have any
14 * PMD directory physically. 14 * PMD directory physically.
15 */ 15 */
16#define __PAGETABLE_PMD_FOLDED
16#define PMD_SHIFT 22 17#define PMD_SHIFT 22
17#define PTRS_PER_PMD 1 18#define PTRS_PER_PMD 1
18 19
diff --git a/arch/m68k/include/asm/pgtable_mm.h b/arch/m68k/include/asm/pgtable_mm.h
index 28a145bfbb71..35ed4a9981ae 100644
--- a/arch/m68k/include/asm/pgtable_mm.h
+++ b/arch/m68k/include/asm/pgtable_mm.h
@@ -54,10 +54,12 @@
54 */ 54 */
55#ifdef CONFIG_SUN3 55#ifdef CONFIG_SUN3
56#define PTRS_PER_PTE 16 56#define PTRS_PER_PTE 16
57#define __PAGETABLE_PMD_FOLDED
57#define PTRS_PER_PMD 1 58#define PTRS_PER_PMD 1
58#define PTRS_PER_PGD 2048 59#define PTRS_PER_PGD 2048
59#elif defined(CONFIG_COLDFIRE) 60#elif defined(CONFIG_COLDFIRE)
60#define PTRS_PER_PTE 512 61#define PTRS_PER_PTE 512
62#define __PAGETABLE_PMD_FOLDED
61#define PTRS_PER_PMD 1 63#define PTRS_PER_PMD 1
62#define PTRS_PER_PGD 1024 64#define PTRS_PER_PGD 1024
63#else 65#else
diff --git a/arch/metag/include/asm/processor.h b/arch/metag/include/asm/processor.h
index 881071c07942..13272fd5a5ba 100644
--- a/arch/metag/include/asm/processor.h
+++ b/arch/metag/include/asm/processor.h
@@ -149,8 +149,8 @@ extern void exit_thread(void);
149 149
150unsigned long get_wchan(struct task_struct *p); 150unsigned long get_wchan(struct task_struct *p);
151 151
152#define KSTK_EIP(tsk) ((tsk)->thread.kernel_context->CurrPC) 152#define KSTK_EIP(tsk) (task_pt_regs(tsk)->ctx.CurrPC)
153#define KSTK_ESP(tsk) ((tsk)->thread.kernel_context->AX[0].U0) 153#define KSTK_ESP(tsk) (task_pt_regs(tsk)->ctx.AX[0].U0)
154 154
155#define user_stack_pointer(regs) ((regs)->ctx.AX[0].U0) 155#define user_stack_pointer(regs) ((regs)->ctx.AX[0].U0)
156 156
diff --git a/arch/microblaze/kernel/entry.S b/arch/microblaze/kernel/entry.S
index 0536bc021cc6..ef548510b951 100644
--- a/arch/microblaze/kernel/entry.S
+++ b/arch/microblaze/kernel/entry.S
@@ -348,8 +348,9 @@ C_ENTRY(_user_exception):
348 * The LP register should point to the location where the called function 348 * The LP register should point to the location where the called function
349 * should return. [note that MAKE_SYS_CALL uses label 1] */ 349 * should return. [note that MAKE_SYS_CALL uses label 1] */
350 /* See if the system call number is valid */ 350 /* See if the system call number is valid */
351 blti r12, 5f
351 addi r11, r12, -__NR_syscalls; 352 addi r11, r12, -__NR_syscalls;
352 bgei r11,5f; 353 bgei r11, 5f;
353 /* Figure out which function to use for this system call. */ 354 /* Figure out which function to use for this system call. */
354 /* Note Microblaze barrel shift is optional, so don't rely on it */ 355 /* Note Microblaze barrel shift is optional, so don't rely on it */
355 add r12, r12, r12; /* convert num -> ptr */ 356 add r12, r12, r12; /* convert num -> ptr */
@@ -375,7 +376,7 @@ C_ENTRY(_user_exception):
375 376
376 /* The syscall number is invalid, return an error. */ 377 /* The syscall number is invalid, return an error. */
3775: 3785:
378 rtsd r15, 8; /* looks like a normal subroutine return */ 379 braid ret_from_trap
379 addi r3, r0, -ENOSYS; 380 addi r3, r0, -ENOSYS;
380 381
381/* Entry point used to return from a syscall/trap */ 382/* Entry point used to return from a syscall/trap */
@@ -411,7 +412,7 @@ C_ENTRY(ret_from_trap):
411 bri 1b 412 bri 1b
412 413
413 /* Maybe handle a signal */ 414 /* Maybe handle a signal */
4145: 4155:
415 andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME; 416 andi r11, r19, _TIF_SIGPENDING | _TIF_NOTIFY_RESUME;
416 beqi r11, 4f; /* Signals to handle, handle them */ 417 beqi r11, 4f; /* Signals to handle, handle them */
417 418
diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 843713c05b79..c7a16904cd03 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -54,6 +54,7 @@ config MIPS
54 select CPU_PM if CPU_IDLE 54 select CPU_PM if CPU_IDLE
55 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST 55 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
56 select ARCH_BINFMT_ELF_STATE 56 select ARCH_BINFMT_ELF_STATE
57 select SYSCTL_EXCEPTION_TRACE
57 58
58menu "Machine selection" 59menu "Machine selection"
59 60
@@ -376,8 +377,10 @@ config MIPS_MALTA
376 select SYS_HAS_CPU_MIPS32_R1 377 select SYS_HAS_CPU_MIPS32_R1
377 select SYS_HAS_CPU_MIPS32_R2 378 select SYS_HAS_CPU_MIPS32_R2
378 select SYS_HAS_CPU_MIPS32_R3_5 379 select SYS_HAS_CPU_MIPS32_R3_5
380 select SYS_HAS_CPU_MIPS32_R6
379 select SYS_HAS_CPU_MIPS64_R1 381 select SYS_HAS_CPU_MIPS64_R1
380 select SYS_HAS_CPU_MIPS64_R2 382 select SYS_HAS_CPU_MIPS64_R2
383 select SYS_HAS_CPU_MIPS64_R6
381 select SYS_HAS_CPU_NEVADA 384 select SYS_HAS_CPU_NEVADA
382 select SYS_HAS_CPU_RM7000 385 select SYS_HAS_CPU_RM7000
383 select SYS_SUPPORTS_32BIT_KERNEL 386 select SYS_SUPPORTS_32BIT_KERNEL
@@ -1033,6 +1036,9 @@ config MIPS_MACHINE
1033config NO_IOPORT_MAP 1036config NO_IOPORT_MAP
1034 def_bool n 1037 def_bool n
1035 1038
1039config GENERIC_CSUM
1040 bool
1041
1036config GENERIC_ISA_DMA 1042config GENERIC_ISA_DMA
1037 bool 1043 bool
1038 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n 1044 select ZONE_DMA if GENERIC_ISA_DMA_SUPPORT_BROKEN=n
@@ -1146,6 +1152,9 @@ config SOC_PNX8335
1146 bool 1152 bool
1147 select SOC_PNX833X 1153 select SOC_PNX833X
1148 1154
1155config MIPS_SPRAM
1156 bool
1157
1149config SWAP_IO_SPACE 1158config SWAP_IO_SPACE
1150 bool 1159 bool
1151 1160
@@ -1304,6 +1313,22 @@ config CPU_MIPS32_R2
1304 specific type of processor in your system, choose those that one 1313 specific type of processor in your system, choose those that one
1305 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system. 1314 otherwise CPU_MIPS32_R1 is a safe bet for any MIPS32 system.
1306 1315
1316config CPU_MIPS32_R6
1317 bool "MIPS32 Release 6 (EXPERIMENTAL)"
1318 depends on SYS_HAS_CPU_MIPS32_R6
1319 select CPU_HAS_PREFETCH
1320 select CPU_SUPPORTS_32BIT_KERNEL
1321 select CPU_SUPPORTS_HIGHMEM
1322 select CPU_SUPPORTS_MSA
1323 select GENERIC_CSUM
1324 select HAVE_KVM
1325 select MIPS_O32_FP64_SUPPORT
1326 help
1327 Choose this option to build a kernel for release 6 or later of the
1328 MIPS32 architecture. New MIPS processors, starting with the Warrior
1329 family, are based on a MIPS32r6 processor. If you own an older
1330 processor, you probably need to select MIPS32r1 or MIPS32r2 instead.
1331
1307config CPU_MIPS64_R1 1332config CPU_MIPS64_R1
1308 bool "MIPS64 Release 1" 1333 bool "MIPS64 Release 1"
1309 depends on SYS_HAS_CPU_MIPS64_R1 1334 depends on SYS_HAS_CPU_MIPS64_R1
@@ -1339,6 +1364,21 @@ config CPU_MIPS64_R2
1339 specific type of processor in your system, choose those that one 1364 specific type of processor in your system, choose those that one
1340 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system. 1365 otherwise CPU_MIPS64_R1 is a safe bet for any MIPS64 system.
1341 1366
1367config CPU_MIPS64_R6
1368 bool "MIPS64 Release 6 (EXPERIMENTAL)"
1369 depends on SYS_HAS_CPU_MIPS64_R6
1370 select CPU_HAS_PREFETCH
1371 select CPU_SUPPORTS_32BIT_KERNEL
1372 select CPU_SUPPORTS_64BIT_KERNEL
1373 select CPU_SUPPORTS_HIGHMEM
1374 select CPU_SUPPORTS_MSA
1375 select GENERIC_CSUM
1376 help
1377 Choose this option to build a kernel for release 6 or later of the
1378 MIPS64 architecture. New MIPS processors, starting with the Warrior
1379 family, are based on a MIPS64r6 processor. If you own an older
1380 processor, you probably need to select MIPS64r1 or MIPS64r2 instead.
1381
1342config CPU_R3000 1382config CPU_R3000
1343 bool "R3000" 1383 bool "R3000"
1344 depends on SYS_HAS_CPU_R3000 1384 depends on SYS_HAS_CPU_R3000
@@ -1539,7 +1579,7 @@ endchoice
1539config CPU_MIPS32_3_5_FEATURES 1579config CPU_MIPS32_3_5_FEATURES
1540 bool "MIPS32 Release 3.5 Features" 1580 bool "MIPS32 Release 3.5 Features"
1541 depends on SYS_HAS_CPU_MIPS32_R3_5 1581 depends on SYS_HAS_CPU_MIPS32_R3_5
1542 depends on CPU_MIPS32_R2 1582 depends on CPU_MIPS32_R2 || CPU_MIPS32_R6
1543 help 1583 help
1544 Choose this option to build a kernel for release 2 or later of the 1584 Choose this option to build a kernel for release 2 or later of the
1545 MIPS32 architecture including features from the 3.5 release such as 1585 MIPS32 architecture including features from the 3.5 release such as
@@ -1659,12 +1699,18 @@ config SYS_HAS_CPU_MIPS32_R2
1659config SYS_HAS_CPU_MIPS32_R3_5 1699config SYS_HAS_CPU_MIPS32_R3_5
1660 bool 1700 bool
1661 1701
1702config SYS_HAS_CPU_MIPS32_R6
1703 bool
1704
1662config SYS_HAS_CPU_MIPS64_R1 1705config SYS_HAS_CPU_MIPS64_R1
1663 bool 1706 bool
1664 1707
1665config SYS_HAS_CPU_MIPS64_R2 1708config SYS_HAS_CPU_MIPS64_R2
1666 bool 1709 bool
1667 1710
1711config SYS_HAS_CPU_MIPS64_R6
1712 bool
1713
1668config SYS_HAS_CPU_R3000 1714config SYS_HAS_CPU_R3000
1669 bool 1715 bool
1670 1716
@@ -1764,11 +1810,11 @@ endmenu
1764# 1810#
1765config CPU_MIPS32 1811config CPU_MIPS32
1766 bool 1812 bool
1767 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 1813 default y if CPU_MIPS32_R1 || CPU_MIPS32_R2 || CPU_MIPS32_R6
1768 1814
1769config CPU_MIPS64 1815config CPU_MIPS64
1770 bool 1816 bool
1771 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 1817 default y if CPU_MIPS64_R1 || CPU_MIPS64_R2 || CPU_MIPS64_R6
1772 1818
1773# 1819#
1774# These two indicate the revision of the architecture, either Release 1 or Release 2 1820# These two indicate the revision of the architecture, either Release 1 or Release 2
@@ -1780,6 +1826,12 @@ config CPU_MIPSR1
1780config CPU_MIPSR2 1826config CPU_MIPSR2
1781 bool 1827 bool
1782 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON 1828 default y if CPU_MIPS32_R2 || CPU_MIPS64_R2 || CPU_CAVIUM_OCTEON
1829 select MIPS_SPRAM
1830
1831config CPU_MIPSR6
1832 bool
1833 default y if CPU_MIPS32_R6 || CPU_MIPS64_R6
1834 select MIPS_SPRAM
1783 1835
1784config EVA 1836config EVA
1785 bool 1837 bool
@@ -2013,6 +2065,19 @@ config MIPS_MT_FPAFF
2013 default y 2065 default y
2014 depends on MIPS_MT_SMP 2066 depends on MIPS_MT_SMP
2015 2067
2068config MIPSR2_TO_R6_EMULATOR
2069 bool "MIPS R2-to-R6 emulator"
2070 depends on CPU_MIPSR6 && !SMP
2071 default y
2072 help
2073 Choose this option if you want to run non-R6 MIPS userland code.
2074 Even if you say 'Y' here, the emulator will still be disabled by
2075 default. You can enable it using the 'mipsr2emul' kernel option.
2076 The only reason this is a build-time option is to save ~14K from the
2077 final kernel image.
2078comment "MIPS R2-to-R6 emulator is only available for UP kernels"
2079 depends on SMP && CPU_MIPSR6
2080
2016config MIPS_VPE_LOADER 2081config MIPS_VPE_LOADER
2017 bool "VPE loader support." 2082 bool "VPE loader support."
2018 depends on SYS_SUPPORTS_MULTITHREADING && MODULES 2083 depends on SYS_SUPPORTS_MULTITHREADING && MODULES
@@ -2148,7 +2213,7 @@ config CPU_HAS_SMARTMIPS
2148 here. 2213 here.
2149 2214
2150config CPU_MICROMIPS 2215config CPU_MICROMIPS
2151 depends on 32BIT && SYS_SUPPORTS_MICROMIPS 2216 depends on 32BIT && SYS_SUPPORTS_MICROMIPS && !CPU_MIPSR6
2152 bool "microMIPS" 2217 bool "microMIPS"
2153 help 2218 help
2154 When this option is enabled the kernel will be built using the 2219 When this option is enabled the kernel will be built using the
diff --git a/arch/mips/Kconfig.debug b/arch/mips/Kconfig.debug
index 88a9f433f6fc..3a2b775e8458 100644
--- a/arch/mips/Kconfig.debug
+++ b/arch/mips/Kconfig.debug
@@ -122,17 +122,4 @@ config SPINLOCK_TEST
122 help 122 help
123 Add several files to the debugfs to test spinlock speed. 123 Add several files to the debugfs to test spinlock speed.
124 124
125config FP32XX_HYBRID_FPRS
126 bool "Run FP32 & FPXX code with hybrid FPRs"
127 depends on MIPS_O32_FP64_SUPPORT
128 help
129 The hybrid FPR scheme is normally used only when a program needs to
130 execute a mix of FP32 & FP64A code, since the trapping & emulation
131 that it entails is expensive. When enabled, this option will lead
132 to the kernel running programs which use the FP32 & FPXX FP ABIs
133 using the hybrid FPR scheme, which can be useful for debugging
134 purposes.
135
136 If unsure, say N.
137
138endmenu 125endmenu
diff --git a/arch/mips/Makefile b/arch/mips/Makefile
index 2563a088d3b8..8f57fc72d62c 100644
--- a/arch/mips/Makefile
+++ b/arch/mips/Makefile
@@ -122,26 +122,8 @@ predef-le += -DMIPSEL -D_MIPSEL -D__MIPSEL -D__MIPSEL__
122cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB $(undef-all) $(predef-be)) 122cflags-$(CONFIG_CPU_BIG_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' && echo -EB $(undef-all) $(predef-be))
123cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL $(undef-all) $(predef-le)) 123cflags-$(CONFIG_CPU_LITTLE_ENDIAN) += $(shell $(CC) -dumpmachine |grep -q 'mips.*el-.*' || echo -EL $(undef-all) $(predef-le))
124 124
125# For smartmips configurations, there are hundreds of warnings due to ISA overrides
126# in assembly and header files. smartmips is only supported for MIPS32r1 onwards
127# and there is no support for 64-bit. Various '.set mips2' or '.set mips3' or
128# similar directives in the kernel will spam the build logs with the following warnings:
129# Warning: the `smartmips' extension requires MIPS32 revision 1 or greater
130# or
131# Warning: the 64-bit MIPS architecture does not support the `smartmips' extension
132# Pass -Wa,--no-warn to disable all assembler warnings until the kernel code has
133# been fixed properly.
134cflags-$(CONFIG_CPU_HAS_SMARTMIPS) += $(call cc-option,-msmartmips) -Wa,--no-warn
135cflags-$(CONFIG_CPU_MICROMIPS) += $(call cc-option,-mmicromips)
136
137cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \ 125cflags-$(CONFIG_SB1XXX_CORELIS) += $(call cc-option,-mno-sched-prolog) \
138 -fno-omit-frame-pointer 126 -fno-omit-frame-pointer
139
140ifeq ($(CONFIG_CPU_HAS_MSA),y)
141toolchain-msa := $(call cc-option-yn,-mhard-float -mfp64 -Wa$(comma)-mmsa)
142cflags-$(toolchain-msa) += -DTOOLCHAIN_SUPPORTS_MSA
143endif
144
145# 127#
146# CPU-dependent compiler/assembler options for optimization. 128# CPU-dependent compiler/assembler options for optimization.
147# 129#
@@ -156,10 +138,12 @@ cflags-$(CONFIG_CPU_MIPS32_R1) += $(call cc-option,-march=mips32,-mips32 -U_MIPS
156 -Wa,-mips32 -Wa,--trap 138 -Wa,-mips32 -Wa,--trap
157cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \ 139cflags-$(CONFIG_CPU_MIPS32_R2) += $(call cc-option,-march=mips32r2,-mips32r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS32) \
158 -Wa,-mips32r2 -Wa,--trap 140 -Wa,-mips32r2 -Wa,--trap
141cflags-$(CONFIG_CPU_MIPS32_R6) += -march=mips32r6 -Wa,--trap
159cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \ 142cflags-$(CONFIG_CPU_MIPS64_R1) += $(call cc-option,-march=mips64,-mips64 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
160 -Wa,-mips64 -Wa,--trap 143 -Wa,-mips64 -Wa,--trap
161cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \ 144cflags-$(CONFIG_CPU_MIPS64_R2) += $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
162 -Wa,-mips64r2 -Wa,--trap 145 -Wa,-mips64r2 -Wa,--trap
146cflags-$(CONFIG_CPU_MIPS64_R6) += -march=mips64r6 -Wa,--trap
163cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap 147cflags-$(CONFIG_CPU_R5000) += -march=r5000 -Wa,--trap
164cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \ 148cflags-$(CONFIG_CPU_R5432) += $(call cc-option,-march=r5400,-march=r5000) \
165 -Wa,--trap 149 -Wa,--trap
@@ -182,6 +166,16 @@ cflags-$(CONFIG_CPU_CAVIUM_OCTEON) += -Wa,-march=octeon
182endif 166endif
183cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1 167cflags-$(CONFIG_CAVIUM_CN63XXP1) += -Wa,-mfix-cn63xxp1
184cflags-$(CONFIG_CPU_BMIPS) += -march=mips32 -Wa,-mips32 -Wa,--trap 168cflags-$(CONFIG_CPU_BMIPS) += -march=mips32 -Wa,-mips32 -Wa,--trap
169#
170# binutils from v2.25 on and gcc starting from v4.9.0 treat -march=loongson3a
171# as MIPS64 R1; older versions as just R1. This leaves the possibility open
172# that GCC might generate R2 code for -march=loongson3a which then is rejected
173# by GAS. The cc-option can't probe for this behaviour so -march=loongson3a
174# can't easily be used safely within the kbuild framework.
175#
176cflags-$(CONFIG_CPU_LOONGSON3) += \
177 $(call cc-option,-march=mips64r2,-mips64r2 -U_MIPS_ISA -D_MIPS_ISA=_MIPS_ISA_MIPS64) \
178 -Wa,-mips64r2 -Wa,--trap
185 179
186cflags-$(CONFIG_CPU_R4000_WORKAROUNDS) += $(call cc-option,-mfix-r4000,) 180cflags-$(CONFIG_CPU_R4000_WORKAROUNDS) += $(call cc-option,-mfix-r4000,)
187cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += $(call cc-option,-mfix-r4400,) 181cflags-$(CONFIG_CPU_R4400_WORKAROUNDS) += $(call cc-option,-mfix-r4400,)
@@ -194,6 +188,23 @@ KBUILD_CFLAGS_MODULE += -msb1-pass1-workarounds
194endif 188endif
195endif 189endif
196 190
191# For smartmips configurations, there are hundreds of warnings due to ISA overrides
192# in assembly and header files. smartmips is only supported for MIPS32r1 onwards
193# and there is no support for 64-bit. Various '.set mips2' or '.set mips3' or
194# similar directives in the kernel will spam the build logs with the following warnings:
195# Warning: the `smartmips' extension requires MIPS32 revision 1 or greater
196# or
197# Warning: the 64-bit MIPS architecture does not support the `smartmips' extension
198# Pass -Wa,--no-warn to disable all assembler warnings until the kernel code has
199# been fixed properly.
200mips-cflags := "$(cflags-y)"
201cflags-$(CONFIG_CPU_HAS_SMARTMIPS) += $(call cc-option,$(mips-cflags),-msmartmips) -Wa,--no-warn
202cflags-$(CONFIG_CPU_MICROMIPS) += $(call cc-option,$(mips-cflags),-mmicromips)
203ifeq ($(CONFIG_CPU_HAS_MSA),y)
204toolchain-msa := $(call cc-option-yn,-$(mips-cflags),mhard-float -mfp64 -Wa$(comma)-mmsa)
205cflags-$(toolchain-msa) += -DTOOLCHAIN_SUPPORTS_MSA
206endif
207
197# 208#
198# Firmware support 209# Firmware support
199# 210#
@@ -287,7 +298,11 @@ boot-y += vmlinux.ecoff
287boot-y += vmlinux.srec 298boot-y += vmlinux.srec
288ifeq ($(shell expr $(load-y) \< 0xffffffff80000000 2> /dev/null), 0) 299ifeq ($(shell expr $(load-y) \< 0xffffffff80000000 2> /dev/null), 0)
289boot-y += uImage 300boot-y += uImage
301boot-y += uImage.bin
302boot-y += uImage.bz2
290boot-y += uImage.gz 303boot-y += uImage.gz
304boot-y += uImage.lzma
305boot-y += uImage.lzo
291endif 306endif
292 307
293# compressed boot image targets (arch/mips/boot/compressed/) 308# compressed boot image targets (arch/mips/boot/compressed/)
@@ -386,7 +401,11 @@ define archhelp
386 echo ' vmlinuz.bin - Raw binary zboot image' 401 echo ' vmlinuz.bin - Raw binary zboot image'
387 echo ' vmlinuz.srec - SREC zboot image' 402 echo ' vmlinuz.srec - SREC zboot image'
388 echo ' uImage - U-Boot image' 403 echo ' uImage - U-Boot image'
404 echo ' uImage.bin - U-Boot image (uncompressed)'
405 echo ' uImage.bz2 - U-Boot image (bz2)'
389 echo ' uImage.gz - U-Boot image (gzip)' 406 echo ' uImage.gz - U-Boot image (gzip)'
407 echo ' uImage.lzma - U-Boot image (lzma)'
408 echo ' uImage.lzo - U-Boot image (lzo)'
390 echo ' dtbs - Device-tree blobs for enabled boards' 409 echo ' dtbs - Device-tree blobs for enabled boards'
391 echo 410 echo
392 echo ' These will be default as appropriate for a configured platform.' 411 echo ' These will be default as appropriate for a configured platform.'
diff --git a/arch/mips/alchemy/common/clock.c b/arch/mips/alchemy/common/clock.c
index 48a9dfc55b51..6a98d2cb402c 100644
--- a/arch/mips/alchemy/common/clock.c
+++ b/arch/mips/alchemy/common/clock.c
@@ -127,12 +127,20 @@ static unsigned long alchemy_clk_cpu_recalc(struct clk_hw *hw,
127 t = 396000000; 127 t = 396000000;
128 else { 128 else {
129 t = alchemy_rdsys(AU1000_SYS_CPUPLL) & 0x7f; 129 t = alchemy_rdsys(AU1000_SYS_CPUPLL) & 0x7f;
130 if (alchemy_get_cputype() < ALCHEMY_CPU_AU1300)
131 t &= 0x3f;
130 t *= parent_rate; 132 t *= parent_rate;
131 } 133 }
132 134
133 return t; 135 return t;
134} 136}
135 137
138void __init alchemy_set_lpj(void)
139{
140 preset_lpj = alchemy_clk_cpu_recalc(NULL, ALCHEMY_ROOTCLK_RATE);
141 preset_lpj /= 2 * HZ;
142}
143
136static struct clk_ops alchemy_clkops_cpu = { 144static struct clk_ops alchemy_clkops_cpu = {
137 .recalc_rate = alchemy_clk_cpu_recalc, 145 .recalc_rate = alchemy_clk_cpu_recalc,
138}; 146};
@@ -315,17 +323,26 @@ static struct clk __init *alchemy_clk_setup_mem(const char *pn, int ct)
315 323
316/* lrclk: external synchronous static bus clock ***********************/ 324/* lrclk: external synchronous static bus clock ***********************/
317 325
318static struct clk __init *alchemy_clk_setup_lrclk(const char *pn) 326static struct clk __init *alchemy_clk_setup_lrclk(const char *pn, int t)
319{ 327{
320 /* MEM_STCFG0[15:13] = divisor. 328 /* Au1000, Au1500: MEM_STCFG0[11]: If bit is set, lrclk=pclk/5,
329 * otherwise lrclk=pclk/4.
330 * All other variants: MEM_STCFG0[15:13] = divisor.
321 * L/RCLK = periph_clk / (divisor + 1) 331 * L/RCLK = periph_clk / (divisor + 1)
322 * On Au1000, Au1500, Au1100 it's called LCLK, 332 * On Au1000, Au1500, Au1100 it's called LCLK,
323 * on later models it's called RCLK, but it's the same thing. 333 * on later models it's called RCLK, but it's the same thing.
324 */ 334 */
325 struct clk *c; 335 struct clk *c;
326 unsigned long v = alchemy_rdsmem(AU1000_MEM_STCFG0) >> 13; 336 unsigned long v = alchemy_rdsmem(AU1000_MEM_STCFG0);
327 337
328 v = (v & 7) + 1; 338 switch (t) {
339 case ALCHEMY_CPU_AU1000:
340 case ALCHEMY_CPU_AU1500:
341 v = 4 + ((v >> 11) & 1);
342 break;
343 default: /* all other models */
344 v = ((v >> 13) & 7) + 1;
345 }
329 c = clk_register_fixed_factor(NULL, ALCHEMY_LR_CLK, 346 c = clk_register_fixed_factor(NULL, ALCHEMY_LR_CLK,
330 pn, 0, 1, v); 347 pn, 0, 1, v);
331 if (!IS_ERR(c)) 348 if (!IS_ERR(c))
@@ -546,6 +563,8 @@ static unsigned long alchemy_clk_fgv1_recalc(struct clk_hw *hw,
546} 563}
547 564
548static long alchemy_clk_fgv1_detr(struct clk_hw *hw, unsigned long rate, 565static long alchemy_clk_fgv1_detr(struct clk_hw *hw, unsigned long rate,
566 unsigned long min_rate,
567 unsigned long max_rate,
549 unsigned long *best_parent_rate, 568 unsigned long *best_parent_rate,
550 struct clk_hw **best_parent_clk) 569 struct clk_hw **best_parent_clk)
551{ 570{
@@ -678,6 +697,8 @@ static unsigned long alchemy_clk_fgv2_recalc(struct clk_hw *hw,
678} 697}
679 698
680static long alchemy_clk_fgv2_detr(struct clk_hw *hw, unsigned long rate, 699static long alchemy_clk_fgv2_detr(struct clk_hw *hw, unsigned long rate,
700 unsigned long min_rate,
701 unsigned long max_rate,
681 unsigned long *best_parent_rate, 702 unsigned long *best_parent_rate,
682 struct clk_hw **best_parent_clk) 703 struct clk_hw **best_parent_clk)
683{ 704{
@@ -897,6 +918,8 @@ static int alchemy_clk_csrc_setr(struct clk_hw *hw, unsigned long rate,
897} 918}
898 919
899static long alchemy_clk_csrc_detr(struct clk_hw *hw, unsigned long rate, 920static long alchemy_clk_csrc_detr(struct clk_hw *hw, unsigned long rate,
921 unsigned long min_rate,
922 unsigned long max_rate,
900 unsigned long *best_parent_rate, 923 unsigned long *best_parent_rate,
901 struct clk_hw **best_parent_clk) 924 struct clk_hw **best_parent_clk)
902{ 925{
@@ -1060,7 +1083,7 @@ static int __init alchemy_clk_init(void)
1060 ERRCK(c) 1083 ERRCK(c)
1061 1084
1062 /* L/RCLK: external static bus clock for synchronous mode */ 1085 /* L/RCLK: external static bus clock for synchronous mode */
1063 c = alchemy_clk_setup_lrclk(ALCHEMY_PERIPH_CLK); 1086 c = alchemy_clk_setup_lrclk(ALCHEMY_PERIPH_CLK, ctype);
1064 ERRCK(c) 1087 ERRCK(c)
1065 1088
1066 /* Frequency dividers 0-5 */ 1089 /* Frequency dividers 0-5 */
diff --git a/arch/mips/alchemy/common/setup.c b/arch/mips/alchemy/common/setup.c
index 4e72daf12c32..2902138b3e0f 100644
--- a/arch/mips/alchemy/common/setup.c
+++ b/arch/mips/alchemy/common/setup.c
@@ -34,10 +34,12 @@
34#include <au1000.h> 34#include <au1000.h>
35 35
36extern void __init board_setup(void); 36extern void __init board_setup(void);
37extern void set_cpuspec(void); 37extern void __init alchemy_set_lpj(void);
38 38
39void __init plat_mem_setup(void) 39void __init plat_mem_setup(void)
40{ 40{
41 alchemy_set_lpj();
42
41 if (au1xxx_cpu_needs_config_od()) 43 if (au1xxx_cpu_needs_config_od())
42 /* Various early Au1xx0 errata corrected by this */ 44 /* Various early Au1xx0 errata corrected by this */
43 set_c0_config(1 << 19); /* Set Config[OD] */ 45 set_c0_config(1 << 19); /* Set Config[OD] */
diff --git a/arch/mips/bcm3384/irq.c b/arch/mips/bcm3384/irq.c
index 0fb5134fb832..fd94fe849af6 100644
--- a/arch/mips/bcm3384/irq.c
+++ b/arch/mips/bcm3384/irq.c
@@ -180,7 +180,7 @@ static int __init intc_of_init(struct device_node *node,
180 180
181static struct of_device_id of_irq_ids[] __initdata = { 181static struct of_device_id of_irq_ids[] __initdata = {
182 { .compatible = "mti,cpu-interrupt-controller", 182 { .compatible = "mti,cpu-interrupt-controller",
183 .data = mips_cpu_intc_init }, 183 .data = mips_cpu_irq_of_init },
184 { .compatible = "brcm,bcm3384-intc", 184 { .compatible = "brcm,bcm3384-intc",
185 .data = intc_of_init }, 185 .data = intc_of_init },
186 {}, 186 {},
diff --git a/arch/mips/boot/Makefile b/arch/mips/boot/Makefile
index 1466c0026093..acb1988f354e 100644
--- a/arch/mips/boot/Makefile
+++ b/arch/mips/boot/Makefile
@@ -23,6 +23,12 @@ strip-flags := $(addprefix --remove-section=,$(drop-sections))
23 23
24hostprogs-y := elf2ecoff 24hostprogs-y := elf2ecoff
25 25
26suffix-y := bin
27suffix-$(CONFIG_KERNEL_BZIP2) := bz2
28suffix-$(CONFIG_KERNEL_GZIP) := gz
29suffix-$(CONFIG_KERNEL_LZMA) := lzma
30suffix-$(CONFIG_KERNEL_LZO) := lzo
31
26targets := vmlinux.ecoff 32targets := vmlinux.ecoff
27quiet_cmd_ecoff = ECOFF $@ 33quiet_cmd_ecoff = ECOFF $@
28 cmd_ecoff = $(obj)/elf2ecoff $(VMLINUX) $@ $(e2eflag) 34 cmd_ecoff = $(obj)/elf2ecoff $(VMLINUX) $@ $(e2eflag)
@@ -44,14 +50,53 @@ $(obj)/vmlinux.srec: $(VMLINUX) FORCE
44UIMAGE_LOADADDR = $(VMLINUX_LOAD_ADDRESS) 50UIMAGE_LOADADDR = $(VMLINUX_LOAD_ADDRESS)
45UIMAGE_ENTRYADDR = $(VMLINUX_ENTRY_ADDRESS) 51UIMAGE_ENTRYADDR = $(VMLINUX_ENTRY_ADDRESS)
46 52
53#
54# Compressed vmlinux images
55#
56
57extra-y += vmlinux.bin.bz2
58extra-y += vmlinux.bin.gz
59extra-y += vmlinux.bin.lzma
60extra-y += vmlinux.bin.lzo
61
62$(obj)/vmlinux.bin.bz2: $(obj)/vmlinux.bin FORCE
63 $(call if_changed,bzip2)
64
47$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE 65$(obj)/vmlinux.bin.gz: $(obj)/vmlinux.bin FORCE
48 $(call if_changed,gzip) 66 $(call if_changed,gzip)
49 67
68$(obj)/vmlinux.bin.lzma: $(obj)/vmlinux.bin FORCE
69 $(call if_changed,lzma)
70
71$(obj)/vmlinux.bin.lzo: $(obj)/vmlinux.bin FORCE
72 $(call if_changed,lzo)
73
74#
75# Compressed u-boot images
76#
77
78targets += uImage
79targets += uImage.bin
80targets += uImage.bz2
50targets += uImage.gz 81targets += uImage.gz
82targets += uImage.lzma
83targets += uImage.lzo
84
85$(obj)/uImage.bin: $(obj)/vmlinux.bin FORCE
86 $(call if_changed,uimage,none)
87
88$(obj)/uImage.bz2: $(obj)/vmlinux.bin.bz2 FORCE
89 $(call if_changed,uimage,bzip2)
90
51$(obj)/uImage.gz: $(obj)/vmlinux.bin.gz FORCE 91$(obj)/uImage.gz: $(obj)/vmlinux.bin.gz FORCE
52 $(call if_changed,uimage,gzip) 92 $(call if_changed,uimage,gzip)
53 93
54targets += uImage 94$(obj)/uImage.lzma: $(obj)/vmlinux.bin.lzma FORCE
55$(obj)/uImage: $(obj)/uImage.gz FORCE 95 $(call if_changed,uimage,lzma)
96
97$(obj)/uImage.lzo: $(obj)/vmlinux.bin.lzo FORCE
98 $(call if_changed,uimage,lzo)
99
100$(obj)/uImage: $(obj)/uImage.$(suffix-y)
56 @ln -sf $(notdir $<) $@ 101 @ln -sf $(notdir $<) $@
57 @echo ' Image $@ is ready' 102 @echo ' Image $@ is ready'
diff --git a/arch/mips/boot/elf2ecoff.c b/arch/mips/boot/elf2ecoff.c
index 2a4c52e27f41..266c8137e859 100644
--- a/arch/mips/boot/elf2ecoff.c
+++ b/arch/mips/boot/elf2ecoff.c
@@ -268,7 +268,6 @@ int main(int argc, char *argv[])
268 Elf32_Ehdr ex; 268 Elf32_Ehdr ex;
269 Elf32_Phdr *ph; 269 Elf32_Phdr *ph;
270 Elf32_Shdr *sh; 270 Elf32_Shdr *sh;
271 char *shstrtab;
272 int i, pad; 271 int i, pad;
273 struct sect text, data, bss; 272 struct sect text, data, bss;
274 struct filehdr efh; 273 struct filehdr efh;
@@ -336,9 +335,6 @@ int main(int argc, char *argv[])
336 "sh"); 335 "sh");
337 if (must_convert_endian) 336 if (must_convert_endian)
338 convert_elf_shdrs(sh, ex.e_shnum); 337 convert_elf_shdrs(sh, ex.e_shnum);
339 /* Read in the section string table. */
340 shstrtab = saveRead(infile, sh[ex.e_shstrndx].sh_offset,
341 sh[ex.e_shstrndx].sh_size, "shstrtab");
342 338
343 /* Figure out if we can cram the program header into an ECOFF 339 /* Figure out if we can cram the program header into an ECOFF
344 header... Basically, we can't handle anything but loadable 340 header... Basically, we can't handle anything but loadable
diff --git a/arch/mips/cavium-octeon/csrc-octeon.c b/arch/mips/cavium-octeon/csrc-octeon.c
index b752c4ed0b79..1882e6475dd0 100644
--- a/arch/mips/cavium-octeon/csrc-octeon.c
+++ b/arch/mips/cavium-octeon/csrc-octeon.c
@@ -18,7 +18,7 @@
18#include <asm/octeon/octeon.h> 18#include <asm/octeon/octeon.h>
19#include <asm/octeon/cvmx-ipd-defs.h> 19#include <asm/octeon/cvmx-ipd-defs.h>
20#include <asm/octeon/cvmx-mio-defs.h> 20#include <asm/octeon/cvmx-mio-defs.h>
21 21#include <asm/octeon/cvmx-rst-defs.h>
22 22
23static u64 f; 23static u64 f;
24static u64 rdiv; 24static u64 rdiv;
@@ -39,11 +39,20 @@ void __init octeon_setup_delays(void)
39 39
40 if (current_cpu_type() == CPU_CAVIUM_OCTEON2) { 40 if (current_cpu_type() == CPU_CAVIUM_OCTEON2) {
41 union cvmx_mio_rst_boot rst_boot; 41 union cvmx_mio_rst_boot rst_boot;
42
42 rst_boot.u64 = cvmx_read_csr(CVMX_MIO_RST_BOOT); 43 rst_boot.u64 = cvmx_read_csr(CVMX_MIO_RST_BOOT);
43 rdiv = rst_boot.s.c_mul; /* CPU clock */ 44 rdiv = rst_boot.s.c_mul; /* CPU clock */
44 sdiv = rst_boot.s.pnr_mul; /* I/O clock */ 45 sdiv = rst_boot.s.pnr_mul; /* I/O clock */
45 f = (0x8000000000000000ull / sdiv) * 2; 46 f = (0x8000000000000000ull / sdiv) * 2;
47 } else if (current_cpu_type() == CPU_CAVIUM_OCTEON3) {
48 union cvmx_rst_boot rst_boot;
49
50 rst_boot.u64 = cvmx_read_csr(CVMX_RST_BOOT);
51 rdiv = rst_boot.s.c_mul; /* CPU clock */
52 sdiv = rst_boot.s.pnr_mul; /* I/O clock */
53 f = (0x8000000000000000ull / sdiv) * 2;
46 } 54 }
55
47} 56}
48 57
49/* 58/*
diff --git a/arch/mips/cavium-octeon/dma-octeon.c b/arch/mips/cavium-octeon/dma-octeon.c
index 3778655c4a37..7d8987818ccf 100644
--- a/arch/mips/cavium-octeon/dma-octeon.c
+++ b/arch/mips/cavium-octeon/dma-octeon.c
@@ -276,7 +276,7 @@ void __init plat_swiotlb_setup(void)
276 continue; 276 continue;
277 277
278 /* These addresses map low for PCI. */ 278 /* These addresses map low for PCI. */
279 if (e->addr > 0x410000000ull && !OCTEON_IS_MODEL(OCTEON_CN6XXX)) 279 if (e->addr > 0x410000000ull && !OCTEON_IS_OCTEON2())
280 continue; 280 continue;
281 281
282 addr_size += e->size; 282 addr_size += e->size;
@@ -308,7 +308,7 @@ void __init plat_swiotlb_setup(void)
308#endif 308#endif
309#ifdef CONFIG_USB_OCTEON_OHCI 309#ifdef CONFIG_USB_OCTEON_OHCI
310 /* OCTEON II ohci is only 32-bit. */ 310 /* OCTEON II ohci is only 32-bit. */
311 if (OCTEON_IS_MODEL(OCTEON_CN6XXX) && max_addr >= 0x100000000ul) 311 if (OCTEON_IS_OCTEON2() && max_addr >= 0x100000000ul)
312 swiotlbsize = 64 * (1<<20); 312 swiotlbsize = 64 * (1<<20);
313#endif 313#endif
314 swiotlb_nslabs = swiotlbsize >> IO_TLB_SHIFT; 314 swiotlb_nslabs = swiotlbsize >> IO_TLB_SHIFT;
diff --git a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
index 5dfef84b9576..9eb0feef4417 100644
--- a/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
+++ b/arch/mips/cavium-octeon/executive/cvmx-helper-board.c
@@ -767,7 +767,7 @@ enum cvmx_helper_board_usb_clock_types __cvmx_helper_board_usb_get_clock_type(vo
767 break; 767 break;
768 } 768 }
769 /* Most boards except NIC10e use a 12MHz crystal */ 769 /* Most boards except NIC10e use a 12MHz crystal */
770 if (OCTEON_IS_MODEL(OCTEON_FAM_2)) 770 if (OCTEON_IS_OCTEON2())
771 return USB_CLOCK_TYPE_CRYSTAL_12; 771 return USB_CLOCK_TYPE_CRYSTAL_12;
772 return USB_CLOCK_TYPE_REF_48; 772 return USB_CLOCK_TYPE_REF_48;
773} 773}
diff --git a/arch/mips/cavium-octeon/octeon-irq.c b/arch/mips/cavium-octeon/octeon-irq.c
index 2bc4aa95944e..10f762557b92 100644
--- a/arch/mips/cavium-octeon/octeon-irq.c
+++ b/arch/mips/cavium-octeon/octeon-irq.c
@@ -3,12 +3,14 @@
3 * License. See the file "COPYING" in the main directory of this archive 3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details. 4 * for more details.
5 * 5 *
6 * Copyright (C) 2004-2012 Cavium, Inc. 6 * Copyright (C) 2004-2014 Cavium, Inc.
7 */ 7 */
8 8
9#include <linux/of_address.h>
9#include <linux/interrupt.h> 10#include <linux/interrupt.h>
10#include <linux/irqdomain.h> 11#include <linux/irqdomain.h>
11#include <linux/bitops.h> 12#include <linux/bitops.h>
13#include <linux/of_irq.h>
12#include <linux/percpu.h> 14#include <linux/percpu.h>
13#include <linux/slab.h> 15#include <linux/slab.h>
14#include <linux/irq.h> 16#include <linux/irq.h>
@@ -22,16 +24,25 @@ static DEFINE_PER_CPU(unsigned long, octeon_irq_ciu0_en_mirror);
22static DEFINE_PER_CPU(unsigned long, octeon_irq_ciu1_en_mirror); 24static DEFINE_PER_CPU(unsigned long, octeon_irq_ciu1_en_mirror);
23static DEFINE_PER_CPU(raw_spinlock_t, octeon_irq_ciu_spinlock); 25static DEFINE_PER_CPU(raw_spinlock_t, octeon_irq_ciu_spinlock);
24 26
27struct octeon_irq_ciu_domain_data {
28 int num_sum; /* number of sum registers (2 or 3). */
29};
30
25static __read_mostly u8 octeon_irq_ciu_to_irq[8][64]; 31static __read_mostly u8 octeon_irq_ciu_to_irq[8][64];
26 32
27union octeon_ciu_chip_data { 33struct octeon_ciu_chip_data {
28 void *p; 34 union {
29 unsigned long l; 35 struct { /* only used for ciu3 */
30 struct { 36 u64 ciu3_addr;
31 unsigned long line:6; 37 unsigned int intsn;
32 unsigned long bit:6; 38 };
33 unsigned long gpio_line:6; 39 struct { /* only used for ciu/ciu2 */
34 } s; 40 u8 line;
41 u8 bit;
42 u8 gpio_line;
43 };
44 };
45 int current_cpu; /* Next CPU expected to take this irq */
35}; 46};
36 47
37struct octeon_core_chip_data { 48struct octeon_core_chip_data {
@@ -45,27 +56,40 @@ struct octeon_core_chip_data {
45 56
46static struct octeon_core_chip_data octeon_irq_core_chip_data[MIPS_CORE_IRQ_LINES]; 57static struct octeon_core_chip_data octeon_irq_core_chip_data[MIPS_CORE_IRQ_LINES];
47 58
48static void octeon_irq_set_ciu_mapping(int irq, int line, int bit, int gpio_line, 59static int octeon_irq_set_ciu_mapping(int irq, int line, int bit, int gpio_line,
49 struct irq_chip *chip, 60 struct irq_chip *chip,
50 irq_flow_handler_t handler) 61 irq_flow_handler_t handler)
51{ 62{
52 union octeon_ciu_chip_data cd; 63 struct octeon_ciu_chip_data *cd;
64
65 cd = kzalloc(sizeof(*cd), GFP_KERNEL);
66 if (!cd)
67 return -ENOMEM;
53 68
54 irq_set_chip_and_handler(irq, chip, handler); 69 irq_set_chip_and_handler(irq, chip, handler);
55 70
56 cd.l = 0; 71 cd->line = line;
57 cd.s.line = line; 72 cd->bit = bit;
58 cd.s.bit = bit; 73 cd->gpio_line = gpio_line;
59 cd.s.gpio_line = gpio_line;
60 74
61 irq_set_chip_data(irq, cd.p); 75 irq_set_chip_data(irq, cd);
62 octeon_irq_ciu_to_irq[line][bit] = irq; 76 octeon_irq_ciu_to_irq[line][bit] = irq;
77 return 0;
63} 78}
64 79
65static void octeon_irq_force_ciu_mapping(struct irq_domain *domain, 80static void octeon_irq_free_cd(struct irq_domain *d, unsigned int irq)
66 int irq, int line, int bit)
67{ 81{
68 irq_domain_associate(domain, irq, line << 6 | bit); 82 struct irq_data *data = irq_get_irq_data(irq);
83 struct octeon_ciu_chip_data *cd = irq_data_get_irq_chip_data(data);
84
85 irq_set_chip_data(irq, NULL);
86 kfree(cd);
87}
88
89static int octeon_irq_force_ciu_mapping(struct irq_domain *domain,
90 int irq, int line, int bit)
91{
92 return irq_domain_associate(domain, irq, line << 6 | bit);
69} 93}
70 94
71static int octeon_coreid_for_cpu(int cpu) 95static int octeon_coreid_for_cpu(int cpu)
@@ -202,9 +226,10 @@ static int next_cpu_for_irq(struct irq_data *data)
202#ifdef CONFIG_SMP 226#ifdef CONFIG_SMP
203 int cpu; 227 int cpu;
204 int weight = cpumask_weight(data->affinity); 228 int weight = cpumask_weight(data->affinity);
229 struct octeon_ciu_chip_data *cd = irq_data_get_irq_chip_data(data);
205 230
206 if (weight > 1) { 231 if (weight > 1) {
207 cpu = smp_processor_id(); 232 cpu = cd->current_cpu;
208 for (;;) { 233 for (;;) {
209 cpu = cpumask_next(cpu, data->affinity); 234 cpu = cpumask_next(cpu, data->affinity);
210 if (cpu >= nr_cpu_ids) { 235 if (cpu >= nr_cpu_ids) {
@@ -219,6 +244,7 @@ static int next_cpu_for_irq(struct irq_data *data)
219 } else { 244 } else {
220 cpu = smp_processor_id(); 245 cpu = smp_processor_id();
221 } 246 }
247 cd->current_cpu = cpu;
222 return cpu; 248 return cpu;
223#else 249#else
224 return smp_processor_id(); 250 return smp_processor_id();
@@ -231,15 +257,15 @@ static void octeon_irq_ciu_enable(struct irq_data *data)
231 int coreid = octeon_coreid_for_cpu(cpu); 257 int coreid = octeon_coreid_for_cpu(cpu);
232 unsigned long *pen; 258 unsigned long *pen;
233 unsigned long flags; 259 unsigned long flags;
234 union octeon_ciu_chip_data cd; 260 struct octeon_ciu_chip_data *cd;
235 raw_spinlock_t *lock = &per_cpu(octeon_irq_ciu_spinlock, cpu); 261 raw_spinlock_t *lock = &per_cpu(octeon_irq_ciu_spinlock, cpu);
236 262
237 cd.p = irq_data_get_irq_chip_data(data); 263 cd = irq_data_get_irq_chip_data(data);
238 264
239 raw_spin_lock_irqsave(lock, flags); 265 raw_spin_lock_irqsave(lock, flags);
240 if (cd.s.line == 0) { 266 if (cd->line == 0) {
241 pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); 267 pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu);
242 __set_bit(cd.s.bit, pen); 268 __set_bit(cd->bit, pen);
243 /* 269 /*
244 * Must be visible to octeon_irq_ip{2,3}_ciu() before 270 * Must be visible to octeon_irq_ip{2,3}_ciu() before
245 * enabling the irq. 271 * enabling the irq.
@@ -248,7 +274,7 @@ static void octeon_irq_ciu_enable(struct irq_data *data)
248 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); 274 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen);
249 } else { 275 } else {
250 pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); 276 pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu);
251 __set_bit(cd.s.bit, pen); 277 __set_bit(cd->bit, pen);
252 /* 278 /*
253 * Must be visible to octeon_irq_ip{2,3}_ciu() before 279 * Must be visible to octeon_irq_ip{2,3}_ciu() before
254 * enabling the irq. 280 * enabling the irq.
@@ -263,15 +289,15 @@ static void octeon_irq_ciu_enable_local(struct irq_data *data)
263{ 289{
264 unsigned long *pen; 290 unsigned long *pen;
265 unsigned long flags; 291 unsigned long flags;
266 union octeon_ciu_chip_data cd; 292 struct octeon_ciu_chip_data *cd;
267 raw_spinlock_t *lock = this_cpu_ptr(&octeon_irq_ciu_spinlock); 293 raw_spinlock_t *lock = this_cpu_ptr(&octeon_irq_ciu_spinlock);
268 294
269 cd.p = irq_data_get_irq_chip_data(data); 295 cd = irq_data_get_irq_chip_data(data);
270 296
271 raw_spin_lock_irqsave(lock, flags); 297 raw_spin_lock_irqsave(lock, flags);
272 if (cd.s.line == 0) { 298 if (cd->line == 0) {
273 pen = this_cpu_ptr(&octeon_irq_ciu0_en_mirror); 299 pen = this_cpu_ptr(&octeon_irq_ciu0_en_mirror);
274 __set_bit(cd.s.bit, pen); 300 __set_bit(cd->bit, pen);
275 /* 301 /*
276 * Must be visible to octeon_irq_ip{2,3}_ciu() before 302 * Must be visible to octeon_irq_ip{2,3}_ciu() before
277 * enabling the irq. 303 * enabling the irq.
@@ -280,7 +306,7 @@ static void octeon_irq_ciu_enable_local(struct irq_data *data)
280 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen); 306 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen);
281 } else { 307 } else {
282 pen = this_cpu_ptr(&octeon_irq_ciu1_en_mirror); 308 pen = this_cpu_ptr(&octeon_irq_ciu1_en_mirror);
283 __set_bit(cd.s.bit, pen); 309 __set_bit(cd->bit, pen);
284 /* 310 /*
285 * Must be visible to octeon_irq_ip{2,3}_ciu() before 311 * Must be visible to octeon_irq_ip{2,3}_ciu() before
286 * enabling the irq. 312 * enabling the irq.
@@ -295,15 +321,15 @@ static void octeon_irq_ciu_disable_local(struct irq_data *data)
295{ 321{
296 unsigned long *pen; 322 unsigned long *pen;
297 unsigned long flags; 323 unsigned long flags;
298 union octeon_ciu_chip_data cd; 324 struct octeon_ciu_chip_data *cd;
299 raw_spinlock_t *lock = this_cpu_ptr(&octeon_irq_ciu_spinlock); 325 raw_spinlock_t *lock = this_cpu_ptr(&octeon_irq_ciu_spinlock);
300 326
301 cd.p = irq_data_get_irq_chip_data(data); 327 cd = irq_data_get_irq_chip_data(data);
302 328
303 raw_spin_lock_irqsave(lock, flags); 329 raw_spin_lock_irqsave(lock, flags);
304 if (cd.s.line == 0) { 330 if (cd->line == 0) {
305 pen = this_cpu_ptr(&octeon_irq_ciu0_en_mirror); 331 pen = this_cpu_ptr(&octeon_irq_ciu0_en_mirror);
306 __clear_bit(cd.s.bit, pen); 332 __clear_bit(cd->bit, pen);
307 /* 333 /*
308 * Must be visible to octeon_irq_ip{2,3}_ciu() before 334 * Must be visible to octeon_irq_ip{2,3}_ciu() before
309 * enabling the irq. 335 * enabling the irq.
@@ -312,7 +338,7 @@ static void octeon_irq_ciu_disable_local(struct irq_data *data)
312 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen); 338 cvmx_write_csr(CVMX_CIU_INTX_EN0(cvmx_get_core_num() * 2), *pen);
313 } else { 339 } else {
314 pen = this_cpu_ptr(&octeon_irq_ciu1_en_mirror); 340 pen = this_cpu_ptr(&octeon_irq_ciu1_en_mirror);
315 __clear_bit(cd.s.bit, pen); 341 __clear_bit(cd->bit, pen);
316 /* 342 /*
317 * Must be visible to octeon_irq_ip{2,3}_ciu() before 343 * Must be visible to octeon_irq_ip{2,3}_ciu() before
318 * enabling the irq. 344 * enabling the irq.
@@ -328,27 +354,27 @@ static void octeon_irq_ciu_disable_all(struct irq_data *data)
328 unsigned long flags; 354 unsigned long flags;
329 unsigned long *pen; 355 unsigned long *pen;
330 int cpu; 356 int cpu;
331 union octeon_ciu_chip_data cd; 357 struct octeon_ciu_chip_data *cd;
332 raw_spinlock_t *lock; 358 raw_spinlock_t *lock;
333 359
334 cd.p = irq_data_get_irq_chip_data(data); 360 cd = irq_data_get_irq_chip_data(data);
335 361
336 for_each_online_cpu(cpu) { 362 for_each_online_cpu(cpu) {
337 int coreid = octeon_coreid_for_cpu(cpu); 363 int coreid = octeon_coreid_for_cpu(cpu);
338 lock = &per_cpu(octeon_irq_ciu_spinlock, cpu); 364 lock = &per_cpu(octeon_irq_ciu_spinlock, cpu);
339 if (cd.s.line == 0) 365 if (cd->line == 0)
340 pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); 366 pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu);
341 else 367 else
342 pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); 368 pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu);
343 369
344 raw_spin_lock_irqsave(lock, flags); 370 raw_spin_lock_irqsave(lock, flags);
345 __clear_bit(cd.s.bit, pen); 371 __clear_bit(cd->bit, pen);
346 /* 372 /*
347 * Must be visible to octeon_irq_ip{2,3}_ciu() before 373 * Must be visible to octeon_irq_ip{2,3}_ciu() before
348 * enabling the irq. 374 * enabling the irq.
349 */ 375 */
350 wmb(); 376 wmb();
351 if (cd.s.line == 0) 377 if (cd->line == 0)
352 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); 378 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen);
353 else 379 else
354 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); 380 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen);
@@ -361,27 +387,27 @@ static void octeon_irq_ciu_enable_all(struct irq_data *data)
361 unsigned long flags; 387 unsigned long flags;
362 unsigned long *pen; 388 unsigned long *pen;
363 int cpu; 389 int cpu;
364 union octeon_ciu_chip_data cd; 390 struct octeon_ciu_chip_data *cd;
365 raw_spinlock_t *lock; 391 raw_spinlock_t *lock;
366 392
367 cd.p = irq_data_get_irq_chip_data(data); 393 cd = irq_data_get_irq_chip_data(data);
368 394
369 for_each_online_cpu(cpu) { 395 for_each_online_cpu(cpu) {
370 int coreid = octeon_coreid_for_cpu(cpu); 396 int coreid = octeon_coreid_for_cpu(cpu);
371 lock = &per_cpu(octeon_irq_ciu_spinlock, cpu); 397 lock = &per_cpu(octeon_irq_ciu_spinlock, cpu);
372 if (cd.s.line == 0) 398 if (cd->line == 0)
373 pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); 399 pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu);
374 else 400 else
375 pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); 401 pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu);
376 402
377 raw_spin_lock_irqsave(lock, flags); 403 raw_spin_lock_irqsave(lock, flags);
378 __set_bit(cd.s.bit, pen); 404 __set_bit(cd->bit, pen);
379 /* 405 /*
380 * Must be visible to octeon_irq_ip{2,3}_ciu() before 406 * Must be visible to octeon_irq_ip{2,3}_ciu() before
381 * enabling the irq. 407 * enabling the irq.
382 */ 408 */
383 wmb(); 409 wmb();
384 if (cd.s.line == 0) 410 if (cd->line == 0)
385 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); 411 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen);
386 else 412 else
387 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); 413 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen);
@@ -397,45 +423,106 @@ static void octeon_irq_ciu_enable_v2(struct irq_data *data)
397{ 423{
398 u64 mask; 424 u64 mask;
399 int cpu = next_cpu_for_irq(data); 425 int cpu = next_cpu_for_irq(data);
400 union octeon_ciu_chip_data cd; 426 struct octeon_ciu_chip_data *cd;
401 427
402 cd.p = irq_data_get_irq_chip_data(data); 428 cd = irq_data_get_irq_chip_data(data);
403 mask = 1ull << (cd.s.bit); 429 mask = 1ull << (cd->bit);
404 430
405 /* 431 /*
406 * Called under the desc lock, so these should never get out 432 * Called under the desc lock, so these should never get out
407 * of sync. 433 * of sync.
408 */ 434 */
409 if (cd.s.line == 0) { 435 if (cd->line == 0) {
410 int index = octeon_coreid_for_cpu(cpu) * 2; 436 int index = octeon_coreid_for_cpu(cpu) * 2;
411 set_bit(cd.s.bit, &per_cpu(octeon_irq_ciu0_en_mirror, cpu)); 437 set_bit(cd->bit, &per_cpu(octeon_irq_ciu0_en_mirror, cpu));
412 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); 438 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask);
413 } else { 439 } else {
414 int index = octeon_coreid_for_cpu(cpu) * 2 + 1; 440 int index = octeon_coreid_for_cpu(cpu) * 2 + 1;
415 set_bit(cd.s.bit, &per_cpu(octeon_irq_ciu1_en_mirror, cpu)); 441 set_bit(cd->bit, &per_cpu(octeon_irq_ciu1_en_mirror, cpu));
416 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); 442 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask);
417 } 443 }
418} 444}
419 445
420/* 446/*
447 * Enable the irq in the sum2 registers.
448 */
449static void octeon_irq_ciu_enable_sum2(struct irq_data *data)
450{
451 u64 mask;
452 int cpu = next_cpu_for_irq(data);
453 int index = octeon_coreid_for_cpu(cpu);
454 struct octeon_ciu_chip_data *cd;
455
456 cd = irq_data_get_irq_chip_data(data);
457 mask = 1ull << (cd->bit);
458
459 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1S(index), mask);
460}
461
462/*
463 * Disable the irq in the sum2 registers.
464 */
465static void octeon_irq_ciu_disable_local_sum2(struct irq_data *data)
466{
467 u64 mask;
468 int cpu = next_cpu_for_irq(data);
469 int index = octeon_coreid_for_cpu(cpu);
470 struct octeon_ciu_chip_data *cd;
471
472 cd = irq_data_get_irq_chip_data(data);
473 mask = 1ull << (cd->bit);
474
475 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1C(index), mask);
476}
477
478static void octeon_irq_ciu_ack_sum2(struct irq_data *data)
479{
480 u64 mask;
481 int cpu = next_cpu_for_irq(data);
482 int index = octeon_coreid_for_cpu(cpu);
483 struct octeon_ciu_chip_data *cd;
484
485 cd = irq_data_get_irq_chip_data(data);
486 mask = 1ull << (cd->bit);
487
488 cvmx_write_csr(CVMX_CIU_SUM2_PPX_IP4(index), mask);
489}
490
491static void octeon_irq_ciu_disable_all_sum2(struct irq_data *data)
492{
493 int cpu;
494 struct octeon_ciu_chip_data *cd;
495 u64 mask;
496
497 cd = irq_data_get_irq_chip_data(data);
498 mask = 1ull << (cd->bit);
499
500 for_each_online_cpu(cpu) {
501 int coreid = octeon_coreid_for_cpu(cpu);
502
503 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1C(coreid), mask);
504 }
505}
506
507/*
421 * Enable the irq on the current CPU for chips that 508 * Enable the irq on the current CPU for chips that
422 * have the EN*_W1{S,C} registers. 509 * have the EN*_W1{S,C} registers.
423 */ 510 */
424static void octeon_irq_ciu_enable_local_v2(struct irq_data *data) 511static void octeon_irq_ciu_enable_local_v2(struct irq_data *data)
425{ 512{
426 u64 mask; 513 u64 mask;
427 union octeon_ciu_chip_data cd; 514 struct octeon_ciu_chip_data *cd;
428 515
429 cd.p = irq_data_get_irq_chip_data(data); 516 cd = irq_data_get_irq_chip_data(data);
430 mask = 1ull << (cd.s.bit); 517 mask = 1ull << (cd->bit);
431 518
432 if (cd.s.line == 0) { 519 if (cd->line == 0) {
433 int index = cvmx_get_core_num() * 2; 520 int index = cvmx_get_core_num() * 2;
434 set_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu0_en_mirror)); 521 set_bit(cd->bit, this_cpu_ptr(&octeon_irq_ciu0_en_mirror));
435 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); 522 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask);
436 } else { 523 } else {
437 int index = cvmx_get_core_num() * 2 + 1; 524 int index = cvmx_get_core_num() * 2 + 1;
438 set_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu1_en_mirror)); 525 set_bit(cd->bit, this_cpu_ptr(&octeon_irq_ciu1_en_mirror));
439 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); 526 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask);
440 } 527 }
441} 528}
@@ -443,18 +530,18 @@ static void octeon_irq_ciu_enable_local_v2(struct irq_data *data)
443static void octeon_irq_ciu_disable_local_v2(struct irq_data *data) 530static void octeon_irq_ciu_disable_local_v2(struct irq_data *data)
444{ 531{
445 u64 mask; 532 u64 mask;
446 union octeon_ciu_chip_data cd; 533 struct octeon_ciu_chip_data *cd;
447 534
448 cd.p = irq_data_get_irq_chip_data(data); 535 cd = irq_data_get_irq_chip_data(data);
449 mask = 1ull << (cd.s.bit); 536 mask = 1ull << (cd->bit);
450 537
451 if (cd.s.line == 0) { 538 if (cd->line == 0) {
452 int index = cvmx_get_core_num() * 2; 539 int index = cvmx_get_core_num() * 2;
453 clear_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu0_en_mirror)); 540 clear_bit(cd->bit, this_cpu_ptr(&octeon_irq_ciu0_en_mirror));
454 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); 541 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask);
455 } else { 542 } else {
456 int index = cvmx_get_core_num() * 2 + 1; 543 int index = cvmx_get_core_num() * 2 + 1;
457 clear_bit(cd.s.bit, this_cpu_ptr(&octeon_irq_ciu1_en_mirror)); 544 clear_bit(cd->bit, this_cpu_ptr(&octeon_irq_ciu1_en_mirror));
458 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); 545 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask);
459 } 546 }
460} 547}
@@ -465,12 +552,12 @@ static void octeon_irq_ciu_disable_local_v2(struct irq_data *data)
465static void octeon_irq_ciu_ack(struct irq_data *data) 552static void octeon_irq_ciu_ack(struct irq_data *data)
466{ 553{
467 u64 mask; 554 u64 mask;
468 union octeon_ciu_chip_data cd; 555 struct octeon_ciu_chip_data *cd;
469 556
470 cd.p = irq_data_get_irq_chip_data(data); 557 cd = irq_data_get_irq_chip_data(data);
471 mask = 1ull << (cd.s.bit); 558 mask = 1ull << (cd->bit);
472 559
473 if (cd.s.line == 0) { 560 if (cd->line == 0) {
474 int index = cvmx_get_core_num() * 2; 561 int index = cvmx_get_core_num() * 2;
475 cvmx_write_csr(CVMX_CIU_INTX_SUM0(index), mask); 562 cvmx_write_csr(CVMX_CIU_INTX_SUM0(index), mask);
476 } else { 563 } else {
@@ -486,21 +573,23 @@ static void octeon_irq_ciu_disable_all_v2(struct irq_data *data)
486{ 573{
487 int cpu; 574 int cpu;
488 u64 mask; 575 u64 mask;
489 union octeon_ciu_chip_data cd; 576 struct octeon_ciu_chip_data *cd;
490 577
491 cd.p = irq_data_get_irq_chip_data(data); 578 cd = irq_data_get_irq_chip_data(data);
492 mask = 1ull << (cd.s.bit); 579 mask = 1ull << (cd->bit);
493 580
494 if (cd.s.line == 0) { 581 if (cd->line == 0) {
495 for_each_online_cpu(cpu) { 582 for_each_online_cpu(cpu) {
496 int index = octeon_coreid_for_cpu(cpu) * 2; 583 int index = octeon_coreid_for_cpu(cpu) * 2;
497 clear_bit(cd.s.bit, &per_cpu(octeon_irq_ciu0_en_mirror, cpu)); 584 clear_bit(cd->bit,
585 &per_cpu(octeon_irq_ciu0_en_mirror, cpu));
498 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); 586 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask);
499 } 587 }
500 } else { 588 } else {
501 for_each_online_cpu(cpu) { 589 for_each_online_cpu(cpu) {
502 int index = octeon_coreid_for_cpu(cpu) * 2 + 1; 590 int index = octeon_coreid_for_cpu(cpu) * 2 + 1;
503 clear_bit(cd.s.bit, &per_cpu(octeon_irq_ciu1_en_mirror, cpu)); 591 clear_bit(cd->bit,
592 &per_cpu(octeon_irq_ciu1_en_mirror, cpu));
504 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); 593 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask);
505 } 594 }
506 } 595 }
@@ -514,21 +603,23 @@ static void octeon_irq_ciu_enable_all_v2(struct irq_data *data)
514{ 603{
515 int cpu; 604 int cpu;
516 u64 mask; 605 u64 mask;
517 union octeon_ciu_chip_data cd; 606 struct octeon_ciu_chip_data *cd;
518 607
519 cd.p = irq_data_get_irq_chip_data(data); 608 cd = irq_data_get_irq_chip_data(data);
520 mask = 1ull << (cd.s.bit); 609 mask = 1ull << (cd->bit);
521 610
522 if (cd.s.line == 0) { 611 if (cd->line == 0) {
523 for_each_online_cpu(cpu) { 612 for_each_online_cpu(cpu) {
524 int index = octeon_coreid_for_cpu(cpu) * 2; 613 int index = octeon_coreid_for_cpu(cpu) * 2;
525 set_bit(cd.s.bit, &per_cpu(octeon_irq_ciu0_en_mirror, cpu)); 614 set_bit(cd->bit,
615 &per_cpu(octeon_irq_ciu0_en_mirror, cpu));
526 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); 616 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask);
527 } 617 }
528 } else { 618 } else {
529 for_each_online_cpu(cpu) { 619 for_each_online_cpu(cpu) {
530 int index = octeon_coreid_for_cpu(cpu) * 2 + 1; 620 int index = octeon_coreid_for_cpu(cpu) * 2 + 1;
531 set_bit(cd.s.bit, &per_cpu(octeon_irq_ciu1_en_mirror, cpu)); 621 set_bit(cd->bit,
622 &per_cpu(octeon_irq_ciu1_en_mirror, cpu));
532 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); 623 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask);
533 } 624 }
534 } 625 }
@@ -537,10 +628,10 @@ static void octeon_irq_ciu_enable_all_v2(struct irq_data *data)
537static void octeon_irq_gpio_setup(struct irq_data *data) 628static void octeon_irq_gpio_setup(struct irq_data *data)
538{ 629{
539 union cvmx_gpio_bit_cfgx cfg; 630 union cvmx_gpio_bit_cfgx cfg;
540 union octeon_ciu_chip_data cd; 631 struct octeon_ciu_chip_data *cd;
541 u32 t = irqd_get_trigger_type(data); 632 u32 t = irqd_get_trigger_type(data);
542 633
543 cd.p = irq_data_get_irq_chip_data(data); 634 cd = irq_data_get_irq_chip_data(data);
544 635
545 cfg.u64 = 0; 636 cfg.u64 = 0;
546 cfg.s.int_en = 1; 637 cfg.s.int_en = 1;
@@ -551,7 +642,7 @@ static void octeon_irq_gpio_setup(struct irq_data *data)
551 cfg.s.fil_cnt = 7; 642 cfg.s.fil_cnt = 7;
552 cfg.s.fil_sel = 3; 643 cfg.s.fil_sel = 3;
553 644
554 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd.s.gpio_line), cfg.u64); 645 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), cfg.u64);
555} 646}
556 647
557static void octeon_irq_ciu_enable_gpio_v2(struct irq_data *data) 648static void octeon_irq_ciu_enable_gpio_v2(struct irq_data *data)
@@ -576,36 +667,36 @@ static int octeon_irq_ciu_gpio_set_type(struct irq_data *data, unsigned int t)
576 667
577static void octeon_irq_ciu_disable_gpio_v2(struct irq_data *data) 668static void octeon_irq_ciu_disable_gpio_v2(struct irq_data *data)
578{ 669{
579 union octeon_ciu_chip_data cd; 670 struct octeon_ciu_chip_data *cd;
580 671
581 cd.p = irq_data_get_irq_chip_data(data); 672 cd = irq_data_get_irq_chip_data(data);
582 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd.s.gpio_line), 0); 673 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), 0);
583 674
584 octeon_irq_ciu_disable_all_v2(data); 675 octeon_irq_ciu_disable_all_v2(data);
585} 676}
586 677
587static void octeon_irq_ciu_disable_gpio(struct irq_data *data) 678static void octeon_irq_ciu_disable_gpio(struct irq_data *data)
588{ 679{
589 union octeon_ciu_chip_data cd; 680 struct octeon_ciu_chip_data *cd;
590 681
591 cd.p = irq_data_get_irq_chip_data(data); 682 cd = irq_data_get_irq_chip_data(data);
592 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd.s.gpio_line), 0); 683 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), 0);
593 684
594 octeon_irq_ciu_disable_all(data); 685 octeon_irq_ciu_disable_all(data);
595} 686}
596 687
597static void octeon_irq_ciu_gpio_ack(struct irq_data *data) 688static void octeon_irq_ciu_gpio_ack(struct irq_data *data)
598{ 689{
599 union octeon_ciu_chip_data cd; 690 struct octeon_ciu_chip_data *cd;
600 u64 mask; 691 u64 mask;
601 692
602 cd.p = irq_data_get_irq_chip_data(data); 693 cd = irq_data_get_irq_chip_data(data);
603 mask = 1ull << (cd.s.gpio_line); 694 mask = 1ull << (cd->gpio_line);
604 695
605 cvmx_write_csr(CVMX_GPIO_INT_CLR, mask); 696 cvmx_write_csr(CVMX_GPIO_INT_CLR, mask);
606} 697}
607 698
608static void octeon_irq_handle_gpio(unsigned int irq, struct irq_desc *desc) 699static void octeon_irq_handle_trigger(unsigned int irq, struct irq_desc *desc)
609{ 700{
610 if (irq_get_trigger_type(irq) & IRQ_TYPE_EDGE_BOTH) 701 if (irq_get_trigger_type(irq) & IRQ_TYPE_EDGE_BOTH)
611 handle_edge_irq(irq, desc); 702 handle_edge_irq(irq, desc);
@@ -644,11 +735,11 @@ static int octeon_irq_ciu_set_affinity(struct irq_data *data,
644 int cpu; 735 int cpu;
645 bool enable_one = !irqd_irq_disabled(data) && !irqd_irq_masked(data); 736 bool enable_one = !irqd_irq_disabled(data) && !irqd_irq_masked(data);
646 unsigned long flags; 737 unsigned long flags;
647 union octeon_ciu_chip_data cd; 738 struct octeon_ciu_chip_data *cd;
648 unsigned long *pen; 739 unsigned long *pen;
649 raw_spinlock_t *lock; 740 raw_spinlock_t *lock;
650 741
651 cd.p = irq_data_get_irq_chip_data(data); 742 cd = irq_data_get_irq_chip_data(data);
652 743
653 /* 744 /*
654 * For non-v2 CIU, we will allow only single CPU affinity. 745 * For non-v2 CIU, we will allow only single CPU affinity.
@@ -668,16 +759,16 @@ static int octeon_irq_ciu_set_affinity(struct irq_data *data,
668 lock = &per_cpu(octeon_irq_ciu_spinlock, cpu); 759 lock = &per_cpu(octeon_irq_ciu_spinlock, cpu);
669 raw_spin_lock_irqsave(lock, flags); 760 raw_spin_lock_irqsave(lock, flags);
670 761
671 if (cd.s.line == 0) 762 if (cd->line == 0)
672 pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); 763 pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu);
673 else 764 else
674 pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu); 765 pen = &per_cpu(octeon_irq_ciu1_en_mirror, cpu);
675 766
676 if (cpumask_test_cpu(cpu, dest) && enable_one) { 767 if (cpumask_test_cpu(cpu, dest) && enable_one) {
677 enable_one = 0; 768 enable_one = 0;
678 __set_bit(cd.s.bit, pen); 769 __set_bit(cd->bit, pen);
679 } else { 770 } else {
680 __clear_bit(cd.s.bit, pen); 771 __clear_bit(cd->bit, pen);
681 } 772 }
682 /* 773 /*
683 * Must be visible to octeon_irq_ip{2,3}_ciu() before 774 * Must be visible to octeon_irq_ip{2,3}_ciu() before
@@ -685,7 +776,7 @@ static int octeon_irq_ciu_set_affinity(struct irq_data *data,
685 */ 776 */
686 wmb(); 777 wmb();
687 778
688 if (cd.s.line == 0) 779 if (cd->line == 0)
689 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen); 780 cvmx_write_csr(CVMX_CIU_INTX_EN0(coreid * 2), *pen);
690 else 781 else
691 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen); 782 cvmx_write_csr(CVMX_CIU_INTX_EN1(coreid * 2 + 1), *pen);
@@ -706,24 +797,24 @@ static int octeon_irq_ciu_set_affinity_v2(struct irq_data *data,
706 int cpu; 797 int cpu;
707 bool enable_one = !irqd_irq_disabled(data) && !irqd_irq_masked(data); 798 bool enable_one = !irqd_irq_disabled(data) && !irqd_irq_masked(data);
708 u64 mask; 799 u64 mask;
709 union octeon_ciu_chip_data cd; 800 struct octeon_ciu_chip_data *cd;
710 801
711 if (!enable_one) 802 if (!enable_one)
712 return 0; 803 return 0;
713 804
714 cd.p = irq_data_get_irq_chip_data(data); 805 cd = irq_data_get_irq_chip_data(data);
715 mask = 1ull << cd.s.bit; 806 mask = 1ull << cd->bit;
716 807
717 if (cd.s.line == 0) { 808 if (cd->line == 0) {
718 for_each_online_cpu(cpu) { 809 for_each_online_cpu(cpu) {
719 unsigned long *pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu); 810 unsigned long *pen = &per_cpu(octeon_irq_ciu0_en_mirror, cpu);
720 int index = octeon_coreid_for_cpu(cpu) * 2; 811 int index = octeon_coreid_for_cpu(cpu) * 2;
721 if (cpumask_test_cpu(cpu, dest) && enable_one) { 812 if (cpumask_test_cpu(cpu, dest) && enable_one) {
722 enable_one = false; 813 enable_one = false;
723 set_bit(cd.s.bit, pen); 814 set_bit(cd->bit, pen);
724 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask); 815 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1S(index), mask);
725 } else { 816 } else {
726 clear_bit(cd.s.bit, pen); 817 clear_bit(cd->bit, pen);
727 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask); 818 cvmx_write_csr(CVMX_CIU_INTX_EN0_W1C(index), mask);
728 } 819 }
729 } 820 }
@@ -733,16 +824,44 @@ static int octeon_irq_ciu_set_affinity_v2(struct irq_data *data,
733 int index = octeon_coreid_for_cpu(cpu) * 2 + 1; 824 int index = octeon_coreid_for_cpu(cpu) * 2 + 1;
734 if (cpumask_test_cpu(cpu, dest) && enable_one) { 825 if (cpumask_test_cpu(cpu, dest) && enable_one) {
735 enable_one = false; 826 enable_one = false;
736 set_bit(cd.s.bit, pen); 827 set_bit(cd->bit, pen);
737 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask); 828 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1S(index), mask);
738 } else { 829 } else {
739 clear_bit(cd.s.bit, pen); 830 clear_bit(cd->bit, pen);
740 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask); 831 cvmx_write_csr(CVMX_CIU_INTX_EN1_W1C(index), mask);
741 } 832 }
742 } 833 }
743 } 834 }
744 return 0; 835 return 0;
745} 836}
837
838static int octeon_irq_ciu_set_affinity_sum2(struct irq_data *data,
839 const struct cpumask *dest,
840 bool force)
841{
842 int cpu;
843 bool enable_one = !irqd_irq_disabled(data) && !irqd_irq_masked(data);
844 u64 mask;
845 struct octeon_ciu_chip_data *cd;
846
847 if (!enable_one)
848 return 0;
849
850 cd = irq_data_get_irq_chip_data(data);
851 mask = 1ull << cd->bit;
852
853 for_each_online_cpu(cpu) {
854 int index = octeon_coreid_for_cpu(cpu);
855
856 if (cpumask_test_cpu(cpu, dest) && enable_one) {
857 enable_one = false;
858 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1S(index), mask);
859 } else {
860 cvmx_write_csr(CVMX_CIU_EN2_PPX_IP4_W1C(index), mask);
861 }
862 }
863 return 0;
864}
746#endif 865#endif
747 866
748/* 867/*
@@ -752,6 +871,18 @@ static struct irq_chip octeon_irq_chip_ciu_v2 = {
752 .name = "CIU", 871 .name = "CIU",
753 .irq_enable = octeon_irq_ciu_enable_v2, 872 .irq_enable = octeon_irq_ciu_enable_v2,
754 .irq_disable = octeon_irq_ciu_disable_all_v2, 873 .irq_disable = octeon_irq_ciu_disable_all_v2,
874 .irq_mask = octeon_irq_ciu_disable_local_v2,
875 .irq_unmask = octeon_irq_ciu_enable_v2,
876#ifdef CONFIG_SMP
877 .irq_set_affinity = octeon_irq_ciu_set_affinity_v2,
878 .irq_cpu_offline = octeon_irq_cpu_offline_ciu,
879#endif
880};
881
882static struct irq_chip octeon_irq_chip_ciu_v2_edge = {
883 .name = "CIU",
884 .irq_enable = octeon_irq_ciu_enable_v2,
885 .irq_disable = octeon_irq_ciu_disable_all_v2,
755 .irq_ack = octeon_irq_ciu_ack, 886 .irq_ack = octeon_irq_ciu_ack,
756 .irq_mask = octeon_irq_ciu_disable_local_v2, 887 .irq_mask = octeon_irq_ciu_disable_local_v2,
757 .irq_unmask = octeon_irq_ciu_enable_v2, 888 .irq_unmask = octeon_irq_ciu_enable_v2,
@@ -761,10 +892,50 @@ static struct irq_chip octeon_irq_chip_ciu_v2 = {
761#endif 892#endif
762}; 893};
763 894
895/*
896 * Newer octeon chips have support for lockless CIU operation.
897 */
898static struct irq_chip octeon_irq_chip_ciu_sum2 = {
899 .name = "CIU",
900 .irq_enable = octeon_irq_ciu_enable_sum2,
901 .irq_disable = octeon_irq_ciu_disable_all_sum2,
902 .irq_mask = octeon_irq_ciu_disable_local_sum2,
903 .irq_unmask = octeon_irq_ciu_enable_sum2,
904#ifdef CONFIG_SMP
905 .irq_set_affinity = octeon_irq_ciu_set_affinity_sum2,
906 .irq_cpu_offline = octeon_irq_cpu_offline_ciu,
907#endif
908};
909
910static struct irq_chip octeon_irq_chip_ciu_sum2_edge = {
911 .name = "CIU",
912 .irq_enable = octeon_irq_ciu_enable_sum2,
913 .irq_disable = octeon_irq_ciu_disable_all_sum2,
914 .irq_ack = octeon_irq_ciu_ack_sum2,
915 .irq_mask = octeon_irq_ciu_disable_local_sum2,
916 .irq_unmask = octeon_irq_ciu_enable_sum2,
917#ifdef CONFIG_SMP
918 .irq_set_affinity = octeon_irq_ciu_set_affinity_sum2,
919 .irq_cpu_offline = octeon_irq_cpu_offline_ciu,
920#endif
921};
922
764static struct irq_chip octeon_irq_chip_ciu = { 923static struct irq_chip octeon_irq_chip_ciu = {
765 .name = "CIU", 924 .name = "CIU",
766 .irq_enable = octeon_irq_ciu_enable, 925 .irq_enable = octeon_irq_ciu_enable,
767 .irq_disable = octeon_irq_ciu_disable_all, 926 .irq_disable = octeon_irq_ciu_disable_all,
927 .irq_mask = octeon_irq_ciu_disable_local,
928 .irq_unmask = octeon_irq_ciu_enable,
929#ifdef CONFIG_SMP
930 .irq_set_affinity = octeon_irq_ciu_set_affinity,
931 .irq_cpu_offline = octeon_irq_cpu_offline_ciu,
932#endif
933};
934
935static struct irq_chip octeon_irq_chip_ciu_edge = {
936 .name = "CIU",
937 .irq_enable = octeon_irq_ciu_enable,
938 .irq_disable = octeon_irq_ciu_disable_all,
768 .irq_ack = octeon_irq_ciu_ack, 939 .irq_ack = octeon_irq_ciu_ack,
769 .irq_mask = octeon_irq_ciu_disable_local, 940 .irq_mask = octeon_irq_ciu_disable_local,
770 .irq_unmask = octeon_irq_ciu_enable, 941 .irq_unmask = octeon_irq_ciu_enable,
@@ -970,11 +1141,12 @@ static int octeon_irq_ciu_xlat(struct irq_domain *d,
970 unsigned int *out_type) 1141 unsigned int *out_type)
971{ 1142{
972 unsigned int ciu, bit; 1143 unsigned int ciu, bit;
1144 struct octeon_irq_ciu_domain_data *dd = d->host_data;
973 1145
974 ciu = intspec[0]; 1146 ciu = intspec[0];
975 bit = intspec[1]; 1147 bit = intspec[1];
976 1148
977 if (ciu > 1 || bit > 63) 1149 if (ciu >= dd->num_sum || bit > 63)
978 return -EINVAL; 1150 return -EINVAL;
979 1151
980 *out_hwirq = (ciu << 6) | bit; 1152 *out_hwirq = (ciu << 6) | bit;
@@ -984,6 +1156,7 @@ static int octeon_irq_ciu_xlat(struct irq_domain *d,
984} 1156}
985 1157
986static struct irq_chip *octeon_irq_ciu_chip; 1158static struct irq_chip *octeon_irq_ciu_chip;
1159static struct irq_chip *octeon_irq_ciu_chip_edge;
987static struct irq_chip *octeon_irq_gpio_chip; 1160static struct irq_chip *octeon_irq_gpio_chip;
988 1161
989static bool octeon_irq_virq_in_range(unsigned int virq) 1162static bool octeon_irq_virq_in_range(unsigned int virq)
@@ -999,8 +1172,10 @@ static bool octeon_irq_virq_in_range(unsigned int virq)
999static int octeon_irq_ciu_map(struct irq_domain *d, 1172static int octeon_irq_ciu_map(struct irq_domain *d,
1000 unsigned int virq, irq_hw_number_t hw) 1173 unsigned int virq, irq_hw_number_t hw)
1001{ 1174{
1175 int rv;
1002 unsigned int line = hw >> 6; 1176 unsigned int line = hw >> 6;
1003 unsigned int bit = hw & 63; 1177 unsigned int bit = hw & 63;
1178 struct octeon_irq_ciu_domain_data *dd = d->host_data;
1004 1179
1005 if (!octeon_irq_virq_in_range(virq)) 1180 if (!octeon_irq_virq_in_range(virq))
1006 return -EINVAL; 1181 return -EINVAL;
@@ -1009,54 +1184,61 @@ static int octeon_irq_ciu_map(struct irq_domain *d,
1009 if (line == 0 && bit >= 16 && bit <32) 1184 if (line == 0 && bit >= 16 && bit <32)
1010 return 0; 1185 return 0;
1011 1186
1012 if (line > 1 || octeon_irq_ciu_to_irq[line][bit] != 0) 1187 if (line >= dd->num_sum || octeon_irq_ciu_to_irq[line][bit] != 0)
1013 return -EINVAL; 1188 return -EINVAL;
1014 1189
1015 if (octeon_irq_ciu_is_edge(line, bit)) 1190 if (line == 2) {
1016 octeon_irq_set_ciu_mapping(virq, line, bit, 0, 1191 if (octeon_irq_ciu_is_edge(line, bit))
1017 octeon_irq_ciu_chip, 1192 rv = octeon_irq_set_ciu_mapping(virq, line, bit, 0,
1018 handle_edge_irq); 1193 &octeon_irq_chip_ciu_sum2_edge,
1019 else 1194 handle_edge_irq);
1020 octeon_irq_set_ciu_mapping(virq, line, bit, 0, 1195 else
1021 octeon_irq_ciu_chip, 1196 rv = octeon_irq_set_ciu_mapping(virq, line, bit, 0,
1022 handle_level_irq); 1197 &octeon_irq_chip_ciu_sum2,
1023 1198 handle_level_irq);
1024 return 0; 1199 } else {
1200 if (octeon_irq_ciu_is_edge(line, bit))
1201 rv = octeon_irq_set_ciu_mapping(virq, line, bit, 0,
1202 octeon_irq_ciu_chip_edge,
1203 handle_edge_irq);
1204 else
1205 rv = octeon_irq_set_ciu_mapping(virq, line, bit, 0,
1206 octeon_irq_ciu_chip,
1207 handle_level_irq);
1208 }
1209 return rv;
1025} 1210}
1026 1211
1027static int octeon_irq_gpio_map_common(struct irq_domain *d, 1212static int octeon_irq_gpio_map(struct irq_domain *d,
1028 unsigned int virq, irq_hw_number_t hw, 1213 unsigned int virq, irq_hw_number_t hw)
1029 int line_limit, struct irq_chip *chip)
1030{ 1214{
1031 struct octeon_irq_gpio_domain_data *gpiod = d->host_data; 1215 struct octeon_irq_gpio_domain_data *gpiod = d->host_data;
1032 unsigned int line, bit; 1216 unsigned int line, bit;
1217 int r;
1033 1218
1034 if (!octeon_irq_virq_in_range(virq)) 1219 if (!octeon_irq_virq_in_range(virq))
1035 return -EINVAL; 1220 return -EINVAL;
1036 1221
1037 line = (hw + gpiod->base_hwirq) >> 6; 1222 line = (hw + gpiod->base_hwirq) >> 6;
1038 bit = (hw + gpiod->base_hwirq) & 63; 1223 bit = (hw + gpiod->base_hwirq) & 63;
1039 if (line > line_limit || octeon_irq_ciu_to_irq[line][bit] != 0) 1224 if (line > ARRAY_SIZE(octeon_irq_ciu_to_irq) ||
1225 octeon_irq_ciu_to_irq[line][bit] != 0)
1040 return -EINVAL; 1226 return -EINVAL;
1041 1227
1042 octeon_irq_set_ciu_mapping(virq, line, bit, hw, 1228 r = octeon_irq_set_ciu_mapping(virq, line, bit, hw,
1043 chip, octeon_irq_handle_gpio); 1229 octeon_irq_gpio_chip, octeon_irq_handle_trigger);
1044 return 0; 1230 return r;
1045}
1046
1047static int octeon_irq_gpio_map(struct irq_domain *d,
1048 unsigned int virq, irq_hw_number_t hw)
1049{
1050 return octeon_irq_gpio_map_common(d, virq, hw, 1, octeon_irq_gpio_chip);
1051} 1231}
1052 1232
1053static struct irq_domain_ops octeon_irq_domain_ciu_ops = { 1233static struct irq_domain_ops octeon_irq_domain_ciu_ops = {
1054 .map = octeon_irq_ciu_map, 1234 .map = octeon_irq_ciu_map,
1235 .unmap = octeon_irq_free_cd,
1055 .xlate = octeon_irq_ciu_xlat, 1236 .xlate = octeon_irq_ciu_xlat,
1056}; 1237};
1057 1238
1058static struct irq_domain_ops octeon_irq_domain_gpio_ops = { 1239static struct irq_domain_ops octeon_irq_domain_gpio_ops = {
1059 .map = octeon_irq_gpio_map, 1240 .map = octeon_irq_gpio_map,
1241 .unmap = octeon_irq_free_cd,
1060 .xlate = octeon_irq_gpio_xlat, 1242 .xlate = octeon_irq_gpio_xlat,
1061}; 1243};
1062 1244
@@ -1095,6 +1277,26 @@ static void octeon_irq_ip3_ciu(void)
1095 } 1277 }
1096} 1278}
1097 1279
1280static void octeon_irq_ip4_ciu(void)
1281{
1282 int coreid = cvmx_get_core_num();
1283 u64 ciu_sum = cvmx_read_csr(CVMX_CIU_SUM2_PPX_IP4(coreid));
1284 u64 ciu_en = cvmx_read_csr(CVMX_CIU_EN2_PPX_IP4(coreid));
1285
1286 ciu_sum &= ciu_en;
1287 if (likely(ciu_sum)) {
1288 int bit = fls64(ciu_sum) - 1;
1289 int irq = octeon_irq_ciu_to_irq[2][bit];
1290
1291 if (likely(irq))
1292 do_IRQ(irq);
1293 else
1294 spurious_interrupt();
1295 } else {
1296 spurious_interrupt();
1297 }
1298}
1299
1098static bool octeon_irq_use_ip4; 1300static bool octeon_irq_use_ip4;
1099 1301
1100static void octeon_irq_local_enable_ip4(void *arg) 1302static void octeon_irq_local_enable_ip4(void *arg)
@@ -1176,7 +1378,10 @@ static void octeon_irq_setup_secondary_ciu(void)
1176 1378
1177 /* Enable the CIU lines */ 1379 /* Enable the CIU lines */
1178 set_c0_status(STATUSF_IP3 | STATUSF_IP2); 1380 set_c0_status(STATUSF_IP3 | STATUSF_IP2);
1179 clear_c0_status(STATUSF_IP4); 1381 if (octeon_irq_use_ip4)
1382 set_c0_status(STATUSF_IP4);
1383 else
1384 clear_c0_status(STATUSF_IP4);
1180} 1385}
1181 1386
1182static void octeon_irq_setup_secondary_ciu2(void) 1387static void octeon_irq_setup_secondary_ciu2(void)
@@ -1192,95 +1397,194 @@ static void octeon_irq_setup_secondary_ciu2(void)
1192 clear_c0_status(STATUSF_IP4); 1397 clear_c0_status(STATUSF_IP4);
1193} 1398}
1194 1399
1195static void __init octeon_irq_init_ciu(void) 1400static int __init octeon_irq_init_ciu(
1401 struct device_node *ciu_node, struct device_node *parent)
1196{ 1402{
1197 unsigned int i; 1403 unsigned int i, r;
1198 struct irq_chip *chip; 1404 struct irq_chip *chip;
1405 struct irq_chip *chip_edge;
1199 struct irq_chip *chip_mbox; 1406 struct irq_chip *chip_mbox;
1200 struct irq_chip *chip_wd; 1407 struct irq_chip *chip_wd;
1201 struct device_node *gpio_node;
1202 struct device_node *ciu_node;
1203 struct irq_domain *ciu_domain = NULL; 1408 struct irq_domain *ciu_domain = NULL;
1409 struct octeon_irq_ciu_domain_data *dd;
1410
1411 dd = kzalloc(sizeof(*dd), GFP_KERNEL);
1412 if (!dd)
1413 return -ENOMEM;
1204 1414
1205 octeon_irq_init_ciu_percpu(); 1415 octeon_irq_init_ciu_percpu();
1206 octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu; 1416 octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu;
1207 1417
1208 octeon_irq_ip2 = octeon_irq_ip2_ciu; 1418 octeon_irq_ip2 = octeon_irq_ip2_ciu;
1209 octeon_irq_ip3 = octeon_irq_ip3_ciu; 1419 octeon_irq_ip3 = octeon_irq_ip3_ciu;
1420 if ((OCTEON_IS_OCTEON2() || OCTEON_IS_OCTEON3())
1421 && !OCTEON_IS_MODEL(OCTEON_CN63XX)) {
1422 octeon_irq_ip4 = octeon_irq_ip4_ciu;
1423 dd->num_sum = 3;
1424 octeon_irq_use_ip4 = true;
1425 } else {
1426 octeon_irq_ip4 = octeon_irq_ip4_mask;
1427 dd->num_sum = 2;
1428 octeon_irq_use_ip4 = false;
1429 }
1210 if (OCTEON_IS_MODEL(OCTEON_CN58XX_PASS2_X) || 1430 if (OCTEON_IS_MODEL(OCTEON_CN58XX_PASS2_X) ||
1211 OCTEON_IS_MODEL(OCTEON_CN56XX_PASS2_X) || 1431 OCTEON_IS_MODEL(OCTEON_CN56XX_PASS2_X) ||
1212 OCTEON_IS_MODEL(OCTEON_CN52XX_PASS2_X) || 1432 OCTEON_IS_MODEL(OCTEON_CN52XX_PASS2_X) ||
1213 OCTEON_IS_MODEL(OCTEON_CN6XXX)) { 1433 OCTEON_IS_OCTEON2() || OCTEON_IS_OCTEON3()) {
1214 chip = &octeon_irq_chip_ciu_v2; 1434 chip = &octeon_irq_chip_ciu_v2;
1435 chip_edge = &octeon_irq_chip_ciu_v2_edge;
1215 chip_mbox = &octeon_irq_chip_ciu_mbox_v2; 1436 chip_mbox = &octeon_irq_chip_ciu_mbox_v2;
1216 chip_wd = &octeon_irq_chip_ciu_wd_v2; 1437 chip_wd = &octeon_irq_chip_ciu_wd_v2;
1217 octeon_irq_gpio_chip = &octeon_irq_chip_ciu_gpio_v2; 1438 octeon_irq_gpio_chip = &octeon_irq_chip_ciu_gpio_v2;
1218 } else { 1439 } else {
1219 chip = &octeon_irq_chip_ciu; 1440 chip = &octeon_irq_chip_ciu;
1441 chip_edge = &octeon_irq_chip_ciu_edge;
1220 chip_mbox = &octeon_irq_chip_ciu_mbox; 1442 chip_mbox = &octeon_irq_chip_ciu_mbox;
1221 chip_wd = &octeon_irq_chip_ciu_wd; 1443 chip_wd = &octeon_irq_chip_ciu_wd;
1222 octeon_irq_gpio_chip = &octeon_irq_chip_ciu_gpio; 1444 octeon_irq_gpio_chip = &octeon_irq_chip_ciu_gpio;
1223 } 1445 }
1224 octeon_irq_ciu_chip = chip; 1446 octeon_irq_ciu_chip = chip;
1225 octeon_irq_ip4 = octeon_irq_ip4_mask; 1447 octeon_irq_ciu_chip_edge = chip_edge;
1226 1448
1227 /* Mips internal */ 1449 /* Mips internal */
1228 octeon_irq_init_core(); 1450 octeon_irq_init_core();
1229 1451
1230 gpio_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio"); 1452 ciu_domain = irq_domain_add_tree(
1231 if (gpio_node) { 1453 ciu_node, &octeon_irq_domain_ciu_ops, dd);
1232 struct octeon_irq_gpio_domain_data *gpiod; 1454 irq_set_default_host(ciu_domain);
1233
1234 gpiod = kzalloc(sizeof(*gpiod), GFP_KERNEL);
1235 if (gpiod) {
1236 /* gpio domain host_data is the base hwirq number. */
1237 gpiod->base_hwirq = 16;
1238 irq_domain_add_linear(gpio_node, 16, &octeon_irq_domain_gpio_ops, gpiod);
1239 of_node_put(gpio_node);
1240 } else
1241 pr_warn("Cannot allocate memory for GPIO irq_domain.\n");
1242 } else
1243 pr_warn("Cannot find device node for cavium,octeon-3860-gpio.\n");
1244
1245 ciu_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-ciu");
1246 if (ciu_node) {
1247 ciu_domain = irq_domain_add_tree(ciu_node, &octeon_irq_domain_ciu_ops, NULL);
1248 irq_set_default_host(ciu_domain);
1249 of_node_put(ciu_node);
1250 } else
1251 panic("Cannot find device node for cavium,octeon-3860-ciu.");
1252 1455
1253 /* CIU_0 */ 1456 /* CIU_0 */
1254 for (i = 0; i < 16; i++) 1457 for (i = 0; i < 16; i++) {
1255 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_WORKQ0, 0, i + 0); 1458 r = octeon_irq_force_ciu_mapping(
1459 ciu_domain, i + OCTEON_IRQ_WORKQ0, 0, i + 0);
1460 if (r)
1461 goto err;
1462 }
1463
1464 r = octeon_irq_set_ciu_mapping(
1465 OCTEON_IRQ_MBOX0, 0, 32, 0, chip_mbox, handle_percpu_irq);
1466 if (r)
1467 goto err;
1468 r = octeon_irq_set_ciu_mapping(
1469 OCTEON_IRQ_MBOX1, 0, 33, 0, chip_mbox, handle_percpu_irq);
1470 if (r)
1471 goto err;
1472
1473 for (i = 0; i < 4; i++) {
1474 r = octeon_irq_force_ciu_mapping(
1475 ciu_domain, i + OCTEON_IRQ_PCI_INT0, 0, i + 36);
1476 if (r)
1477 goto err;
1478 }
1479 for (i = 0; i < 4; i++) {
1480 r = octeon_irq_force_ciu_mapping(
1481 ciu_domain, i + OCTEON_IRQ_PCI_MSI0, 0, i + 40);
1482 if (r)
1483 goto err;
1484 }
1256 1485
1257 octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX0, 0, 32, 0, chip_mbox, handle_percpu_irq); 1486 r = octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_TWSI, 0, 45);
1258 octeon_irq_set_ciu_mapping(OCTEON_IRQ_MBOX1, 0, 33, 0, chip_mbox, handle_percpu_irq); 1487 if (r)
1488 goto err;
1259 1489
1260 for (i = 0; i < 4; i++) 1490 r = octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_RML, 0, 46);
1261 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_INT0, 0, i + 36); 1491 if (r)
1262 for (i = 0; i < 4; i++) 1492 goto err;
1263 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_MSI0, 0, i + 40);
1264 1493
1265 octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_TWSI, 0, 45); 1494 for (i = 0; i < 4; i++) {
1266 octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_RML, 0, 46); 1495 r = octeon_irq_force_ciu_mapping(
1267 for (i = 0; i < 4; i++) 1496 ciu_domain, i + OCTEON_IRQ_TIMER0, 0, i + 52);
1268 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_TIMER0, 0, i + 52); 1497 if (r)
1498 goto err;
1499 }
1500
1501 r = octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB0, 0, 56);
1502 if (r)
1503 goto err;
1269 1504
1270 octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB0, 0, 56); 1505 r = octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_TWSI2, 0, 59);
1271 octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_TWSI2, 0, 59); 1506 if (r)
1507 goto err;
1272 1508
1273 /* CIU_1 */ 1509 /* CIU_1 */
1274 for (i = 0; i < 16; i++) 1510 for (i = 0; i < 16; i++) {
1275 octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i + 0, 0, chip_wd, handle_level_irq); 1511 r = octeon_irq_set_ciu_mapping(
1512 i + OCTEON_IRQ_WDOG0, 1, i + 0, 0, chip_wd,
1513 handle_level_irq);
1514 if (r)
1515 goto err;
1516 }
1276 1517
1277 octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB1, 1, 17); 1518 r = octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB1, 1, 17);
1519 if (r)
1520 goto err;
1278 1521
1279 /* Enable the CIU lines */ 1522 /* Enable the CIU lines */
1280 set_c0_status(STATUSF_IP3 | STATUSF_IP2); 1523 set_c0_status(STATUSF_IP3 | STATUSF_IP2);
1281 clear_c0_status(STATUSF_IP4); 1524 if (octeon_irq_use_ip4)
1525 set_c0_status(STATUSF_IP4);
1526 else
1527 clear_c0_status(STATUSF_IP4);
1528
1529 return 0;
1530err:
1531 return r;
1282} 1532}
1283 1533
1534static int __init octeon_irq_init_gpio(
1535 struct device_node *gpio_node, struct device_node *parent)
1536{
1537 struct octeon_irq_gpio_domain_data *gpiod;
1538 u32 interrupt_cells;
1539 unsigned int base_hwirq;
1540 int r;
1541
1542 r = of_property_read_u32(parent, "#interrupt-cells", &interrupt_cells);
1543 if (r)
1544 return r;
1545
1546 if (interrupt_cells == 1) {
1547 u32 v;
1548
1549 r = of_property_read_u32_index(gpio_node, "interrupts", 0, &v);
1550 if (r) {
1551 pr_warn("No \"interrupts\" property.\n");
1552 return r;
1553 }
1554 base_hwirq = v;
1555 } else if (interrupt_cells == 2) {
1556 u32 v0, v1;
1557
1558 r = of_property_read_u32_index(gpio_node, "interrupts", 0, &v0);
1559 if (r) {
1560 pr_warn("No \"interrupts\" property.\n");
1561 return r;
1562 }
1563 r = of_property_read_u32_index(gpio_node, "interrupts", 1, &v1);
1564 if (r) {
1565 pr_warn("No \"interrupts\" property.\n");
1566 return r;
1567 }
1568 base_hwirq = (v0 << 6) | v1;
1569 } else {
1570 pr_warn("Bad \"#interrupt-cells\" property: %u\n",
1571 interrupt_cells);
1572 return -EINVAL;
1573 }
1574
1575 gpiod = kzalloc(sizeof(*gpiod), GFP_KERNEL);
1576 if (gpiod) {
1577 /* gpio domain host_data is the base hwirq number. */
1578 gpiod->base_hwirq = base_hwirq;
1579 irq_domain_add_linear(
1580 gpio_node, 16, &octeon_irq_domain_gpio_ops, gpiod);
1581 } else {
1582 pr_warn("Cannot allocate memory for GPIO irq_domain.\n");
1583 return -ENOMEM;
1584 }
1585
1586 return 0;
1587}
1284/* 1588/*
1285 * Watchdog interrupts are special. They are associated with a single 1589 * Watchdog interrupts are special. They are associated with a single
1286 * core, so we hardwire the affinity to that core. 1590 * core, so we hardwire the affinity to that core.
@@ -1290,12 +1594,13 @@ static void octeon_irq_ciu2_wd_enable(struct irq_data *data)
1290 u64 mask; 1594 u64 mask;
1291 u64 en_addr; 1595 u64 en_addr;
1292 int coreid = data->irq - OCTEON_IRQ_WDOG0; 1596 int coreid = data->irq - OCTEON_IRQ_WDOG0;
1293 union octeon_ciu_chip_data cd; 1597 struct octeon_ciu_chip_data *cd;
1294 1598
1295 cd.p = irq_data_get_irq_chip_data(data); 1599 cd = irq_data_get_irq_chip_data(data);
1296 mask = 1ull << (cd.s.bit); 1600 mask = 1ull << (cd->bit);
1297 1601
1298 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(coreid) + (0x1000ull * cd.s.line); 1602 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(coreid) +
1603 (0x1000ull * cd->line);
1299 cvmx_write_csr(en_addr, mask); 1604 cvmx_write_csr(en_addr, mask);
1300 1605
1301} 1606}
@@ -1306,12 +1611,13 @@ static void octeon_irq_ciu2_enable(struct irq_data *data)
1306 u64 en_addr; 1611 u64 en_addr;
1307 int cpu = next_cpu_for_irq(data); 1612 int cpu = next_cpu_for_irq(data);
1308 int coreid = octeon_coreid_for_cpu(cpu); 1613 int coreid = octeon_coreid_for_cpu(cpu);
1309 union octeon_ciu_chip_data cd; 1614 struct octeon_ciu_chip_data *cd;
1310 1615
1311 cd.p = irq_data_get_irq_chip_data(data); 1616 cd = irq_data_get_irq_chip_data(data);
1312 mask = 1ull << (cd.s.bit); 1617 mask = 1ull << (cd->bit);
1313 1618
1314 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(coreid) + (0x1000ull * cd.s.line); 1619 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(coreid) +
1620 (0x1000ull * cd->line);
1315 cvmx_write_csr(en_addr, mask); 1621 cvmx_write_csr(en_addr, mask);
1316} 1622}
1317 1623
@@ -1320,12 +1626,13 @@ static void octeon_irq_ciu2_enable_local(struct irq_data *data)
1320 u64 mask; 1626 u64 mask;
1321 u64 en_addr; 1627 u64 en_addr;
1322 int coreid = cvmx_get_core_num(); 1628 int coreid = cvmx_get_core_num();
1323 union octeon_ciu_chip_data cd; 1629 struct octeon_ciu_chip_data *cd;
1324 1630
1325 cd.p = irq_data_get_irq_chip_data(data); 1631 cd = irq_data_get_irq_chip_data(data);
1326 mask = 1ull << (cd.s.bit); 1632 mask = 1ull << (cd->bit);
1327 1633
1328 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(coreid) + (0x1000ull * cd.s.line); 1634 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(coreid) +
1635 (0x1000ull * cd->line);
1329 cvmx_write_csr(en_addr, mask); 1636 cvmx_write_csr(en_addr, mask);
1330 1637
1331} 1638}
@@ -1335,12 +1642,13 @@ static void octeon_irq_ciu2_disable_local(struct irq_data *data)
1335 u64 mask; 1642 u64 mask;
1336 u64 en_addr; 1643 u64 en_addr;
1337 int coreid = cvmx_get_core_num(); 1644 int coreid = cvmx_get_core_num();
1338 union octeon_ciu_chip_data cd; 1645 struct octeon_ciu_chip_data *cd;
1339 1646
1340 cd.p = irq_data_get_irq_chip_data(data); 1647 cd = irq_data_get_irq_chip_data(data);
1341 mask = 1ull << (cd.s.bit); 1648 mask = 1ull << (cd->bit);
1342 1649
1343 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(coreid) + (0x1000ull * cd.s.line); 1650 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(coreid) +
1651 (0x1000ull * cd->line);
1344 cvmx_write_csr(en_addr, mask); 1652 cvmx_write_csr(en_addr, mask);
1345 1653
1346} 1654}
@@ -1350,12 +1658,12 @@ static void octeon_irq_ciu2_ack(struct irq_data *data)
1350 u64 mask; 1658 u64 mask;
1351 u64 en_addr; 1659 u64 en_addr;
1352 int coreid = cvmx_get_core_num(); 1660 int coreid = cvmx_get_core_num();
1353 union octeon_ciu_chip_data cd; 1661 struct octeon_ciu_chip_data *cd;
1354 1662
1355 cd.p = irq_data_get_irq_chip_data(data); 1663 cd = irq_data_get_irq_chip_data(data);
1356 mask = 1ull << (cd.s.bit); 1664 mask = 1ull << (cd->bit);
1357 1665
1358 en_addr = CVMX_CIU2_RAW_PPX_IP2_WRKQ(coreid) + (0x1000ull * cd.s.line); 1666 en_addr = CVMX_CIU2_RAW_PPX_IP2_WRKQ(coreid) + (0x1000ull * cd->line);
1359 cvmx_write_csr(en_addr, mask); 1667 cvmx_write_csr(en_addr, mask);
1360 1668
1361} 1669}
@@ -1364,13 +1672,14 @@ static void octeon_irq_ciu2_disable_all(struct irq_data *data)
1364{ 1672{
1365 int cpu; 1673 int cpu;
1366 u64 mask; 1674 u64 mask;
1367 union octeon_ciu_chip_data cd; 1675 struct octeon_ciu_chip_data *cd;
1368 1676
1369 cd.p = irq_data_get_irq_chip_data(data); 1677 cd = irq_data_get_irq_chip_data(data);
1370 mask = 1ull << (cd.s.bit); 1678 mask = 1ull << (cd->bit);
1371 1679
1372 for_each_online_cpu(cpu) { 1680 for_each_online_cpu(cpu) {
1373 u64 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(octeon_coreid_for_cpu(cpu)) + (0x1000ull * cd.s.line); 1681 u64 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(
1682 octeon_coreid_for_cpu(cpu)) + (0x1000ull * cd->line);
1374 cvmx_write_csr(en_addr, mask); 1683 cvmx_write_csr(en_addr, mask);
1375 } 1684 }
1376} 1685}
@@ -1383,7 +1692,8 @@ static void octeon_irq_ciu2_mbox_enable_all(struct irq_data *data)
1383 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0); 1692 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0);
1384 1693
1385 for_each_online_cpu(cpu) { 1694 for_each_online_cpu(cpu) {
1386 u64 en_addr = CVMX_CIU2_EN_PPX_IP3_MBOX_W1S(octeon_coreid_for_cpu(cpu)); 1695 u64 en_addr = CVMX_CIU2_EN_PPX_IP3_MBOX_W1S(
1696 octeon_coreid_for_cpu(cpu));
1387 cvmx_write_csr(en_addr, mask); 1697 cvmx_write_csr(en_addr, mask);
1388 } 1698 }
1389} 1699}
@@ -1396,7 +1706,8 @@ static void octeon_irq_ciu2_mbox_disable_all(struct irq_data *data)
1396 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0); 1706 mask = 1ull << (data->irq - OCTEON_IRQ_MBOX0);
1397 1707
1398 for_each_online_cpu(cpu) { 1708 for_each_online_cpu(cpu) {
1399 u64 en_addr = CVMX_CIU2_EN_PPX_IP3_MBOX_W1C(octeon_coreid_for_cpu(cpu)); 1709 u64 en_addr = CVMX_CIU2_EN_PPX_IP3_MBOX_W1C(
1710 octeon_coreid_for_cpu(cpu));
1400 cvmx_write_csr(en_addr, mask); 1711 cvmx_write_csr(en_addr, mask);
1401 } 1712 }
1402} 1713}
@@ -1430,21 +1741,25 @@ static int octeon_irq_ciu2_set_affinity(struct irq_data *data,
1430 int cpu; 1741 int cpu;
1431 bool enable_one = !irqd_irq_disabled(data) && !irqd_irq_masked(data); 1742 bool enable_one = !irqd_irq_disabled(data) && !irqd_irq_masked(data);
1432 u64 mask; 1743 u64 mask;
1433 union octeon_ciu_chip_data cd; 1744 struct octeon_ciu_chip_data *cd;
1434 1745
1435 if (!enable_one) 1746 if (!enable_one)
1436 return 0; 1747 return 0;
1437 1748
1438 cd.p = irq_data_get_irq_chip_data(data); 1749 cd = irq_data_get_irq_chip_data(data);
1439 mask = 1ull << cd.s.bit; 1750 mask = 1ull << cd->bit;
1440 1751
1441 for_each_online_cpu(cpu) { 1752 for_each_online_cpu(cpu) {
1442 u64 en_addr; 1753 u64 en_addr;
1443 if (cpumask_test_cpu(cpu, dest) && enable_one) { 1754 if (cpumask_test_cpu(cpu, dest) && enable_one) {
1444 enable_one = false; 1755 enable_one = false;
1445 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(octeon_coreid_for_cpu(cpu)) + (0x1000ull * cd.s.line); 1756 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1S(
1757 octeon_coreid_for_cpu(cpu)) +
1758 (0x1000ull * cd->line);
1446 } else { 1759 } else {
1447 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(octeon_coreid_for_cpu(cpu)) + (0x1000ull * cd.s.line); 1760 en_addr = CVMX_CIU2_EN_PPX_IP2_WRKQ_W1C(
1761 octeon_coreid_for_cpu(cpu)) +
1762 (0x1000ull * cd->line);
1448 } 1763 }
1449 cvmx_write_csr(en_addr, mask); 1764 cvmx_write_csr(en_addr, mask);
1450 } 1765 }
@@ -1461,10 +1776,11 @@ static void octeon_irq_ciu2_enable_gpio(struct irq_data *data)
1461 1776
1462static void octeon_irq_ciu2_disable_gpio(struct irq_data *data) 1777static void octeon_irq_ciu2_disable_gpio(struct irq_data *data)
1463{ 1778{
1464 union octeon_ciu_chip_data cd; 1779 struct octeon_ciu_chip_data *cd;
1465 cd.p = irq_data_get_irq_chip_data(data); 1780
1781 cd = irq_data_get_irq_chip_data(data);
1466 1782
1467 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd.s.gpio_line), 0); 1783 cvmx_write_csr(CVMX_GPIO_BIT_CFGX(cd->gpio_line), 0);
1468 1784
1469 octeon_irq_ciu2_disable_all(data); 1785 octeon_irq_ciu2_disable_all(data);
1470} 1786}
@@ -1473,6 +1789,18 @@ static struct irq_chip octeon_irq_chip_ciu2 = {
1473 .name = "CIU2-E", 1789 .name = "CIU2-E",
1474 .irq_enable = octeon_irq_ciu2_enable, 1790 .irq_enable = octeon_irq_ciu2_enable,
1475 .irq_disable = octeon_irq_ciu2_disable_all, 1791 .irq_disable = octeon_irq_ciu2_disable_all,
1792 .irq_mask = octeon_irq_ciu2_disable_local,
1793 .irq_unmask = octeon_irq_ciu2_enable,
1794#ifdef CONFIG_SMP
1795 .irq_set_affinity = octeon_irq_ciu2_set_affinity,
1796 .irq_cpu_offline = octeon_irq_cpu_offline_ciu,
1797#endif
1798};
1799
1800static struct irq_chip octeon_irq_chip_ciu2_edge = {
1801 .name = "CIU2-E",
1802 .irq_enable = octeon_irq_ciu2_enable,
1803 .irq_disable = octeon_irq_ciu2_disable_all,
1476 .irq_ack = octeon_irq_ciu2_ack, 1804 .irq_ack = octeon_irq_ciu2_ack,
1477 .irq_mask = octeon_irq_ciu2_disable_local, 1805 .irq_mask = octeon_irq_ciu2_disable_local,
1478 .irq_unmask = octeon_irq_ciu2_enable, 1806 .irq_unmask = octeon_irq_ciu2_enable,
@@ -1582,7 +1910,7 @@ static int octeon_irq_ciu2_map(struct irq_domain *d,
1582 1910
1583 if (octeon_irq_ciu2_is_edge(line, bit)) 1911 if (octeon_irq_ciu2_is_edge(line, bit))
1584 octeon_irq_set_ciu_mapping(virq, line, bit, 0, 1912 octeon_irq_set_ciu_mapping(virq, line, bit, 0,
1585 &octeon_irq_chip_ciu2, 1913 &octeon_irq_chip_ciu2_edge,
1586 handle_edge_irq); 1914 handle_edge_irq);
1587 else 1915 else
1588 octeon_irq_set_ciu_mapping(virq, line, bit, 0, 1916 octeon_irq_set_ciu_mapping(virq, line, bit, 0,
@@ -1591,22 +1919,13 @@ static int octeon_irq_ciu2_map(struct irq_domain *d,
1591 1919
1592 return 0; 1920 return 0;
1593} 1921}
1594static int octeon_irq_ciu2_gpio_map(struct irq_domain *d,
1595 unsigned int virq, irq_hw_number_t hw)
1596{
1597 return octeon_irq_gpio_map_common(d, virq, hw, 7, &octeon_irq_chip_ciu2_gpio);
1598}
1599 1922
1600static struct irq_domain_ops octeon_irq_domain_ciu2_ops = { 1923static struct irq_domain_ops octeon_irq_domain_ciu2_ops = {
1601 .map = octeon_irq_ciu2_map, 1924 .map = octeon_irq_ciu2_map,
1925 .unmap = octeon_irq_free_cd,
1602 .xlate = octeon_irq_ciu2_xlat, 1926 .xlate = octeon_irq_ciu2_xlat,
1603}; 1927};
1604 1928
1605static struct irq_domain_ops octeon_irq_domain_ciu2_gpio_ops = {
1606 .map = octeon_irq_ciu2_gpio_map,
1607 .xlate = octeon_irq_gpio_xlat,
1608};
1609
1610static void octeon_irq_ciu2(void) 1929static void octeon_irq_ciu2(void)
1611{ 1930{
1612 int line; 1931 int line;
@@ -1674,16 +1993,16 @@ out:
1674 return; 1993 return;
1675} 1994}
1676 1995
1677static void __init octeon_irq_init_ciu2(void) 1996static int __init octeon_irq_init_ciu2(
1997 struct device_node *ciu_node, struct device_node *parent)
1678{ 1998{
1679 unsigned int i; 1999 unsigned int i, r;
1680 struct device_node *gpio_node;
1681 struct device_node *ciu_node;
1682 struct irq_domain *ciu_domain = NULL; 2000 struct irq_domain *ciu_domain = NULL;
1683 2001
1684 octeon_irq_init_ciu2_percpu(); 2002 octeon_irq_init_ciu2_percpu();
1685 octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu2; 2003 octeon_irq_setup_secondary = octeon_irq_setup_secondary_ciu2;
1686 2004
2005 octeon_irq_gpio_chip = &octeon_irq_chip_ciu2_gpio;
1687 octeon_irq_ip2 = octeon_irq_ciu2; 2006 octeon_irq_ip2 = octeon_irq_ciu2;
1688 octeon_irq_ip3 = octeon_irq_ciu2_mbox; 2007 octeon_irq_ip3 = octeon_irq_ciu2_mbox;
1689 octeon_irq_ip4 = octeon_irq_ip4_mask; 2008 octeon_irq_ip4 = octeon_irq_ip4_mask;
@@ -1691,47 +2010,49 @@ static void __init octeon_irq_init_ciu2(void)
1691 /* Mips internal */ 2010 /* Mips internal */
1692 octeon_irq_init_core(); 2011 octeon_irq_init_core();
1693 2012
1694 gpio_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-3860-gpio"); 2013 ciu_domain = irq_domain_add_tree(
1695 if (gpio_node) { 2014 ciu_node, &octeon_irq_domain_ciu2_ops, NULL);
1696 struct octeon_irq_gpio_domain_data *gpiod; 2015 irq_set_default_host(ciu_domain);
1697
1698 gpiod = kzalloc(sizeof(*gpiod), GFP_KERNEL);
1699 if (gpiod) {
1700 /* gpio domain host_data is the base hwirq number. */
1701 gpiod->base_hwirq = 7 << 6;
1702 irq_domain_add_linear(gpio_node, 16, &octeon_irq_domain_ciu2_gpio_ops, gpiod);
1703 of_node_put(gpio_node);
1704 } else
1705 pr_warn("Cannot allocate memory for GPIO irq_domain.\n");
1706 } else
1707 pr_warn("Cannot find device node for cavium,octeon-3860-gpio.\n");
1708
1709 ciu_node = of_find_compatible_node(NULL, NULL, "cavium,octeon-6880-ciu2");
1710 if (ciu_node) {
1711 ciu_domain = irq_domain_add_tree(ciu_node, &octeon_irq_domain_ciu2_ops, NULL);
1712 irq_set_default_host(ciu_domain);
1713 of_node_put(ciu_node);
1714 } else
1715 panic("Cannot find device node for cavium,octeon-6880-ciu2.");
1716 2016
1717 /* CUI2 */ 2017 /* CUI2 */
1718 for (i = 0; i < 64; i++) 2018 for (i = 0; i < 64; i++) {
1719 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_WORKQ0, 0, i); 2019 r = octeon_irq_force_ciu_mapping(
2020 ciu_domain, i + OCTEON_IRQ_WORKQ0, 0, i);
2021 if (r)
2022 goto err;
2023 }
1720 2024
1721 for (i = 0; i < 32; i++) 2025 for (i = 0; i < 32; i++) {
1722 octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i, 0, 2026 r = octeon_irq_set_ciu_mapping(i + OCTEON_IRQ_WDOG0, 1, i, 0,
1723 &octeon_irq_chip_ciu2_wd, handle_level_irq); 2027 &octeon_irq_chip_ciu2_wd, handle_level_irq);
2028 if (r)
2029 goto err;
2030 }
1724 2031
1725 for (i = 0; i < 4; i++) 2032 for (i = 0; i < 4; i++) {
1726 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_TIMER0, 3, i + 8); 2033 r = octeon_irq_force_ciu_mapping(
2034 ciu_domain, i + OCTEON_IRQ_TIMER0, 3, i + 8);
2035 if (r)
2036 goto err;
2037 }
1727 2038
1728 octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB0, 3, 44); 2039 r = octeon_irq_force_ciu_mapping(ciu_domain, OCTEON_IRQ_USB0, 3, 44);
2040 if (r)
2041 goto err;
1729 2042
1730 for (i = 0; i < 4; i++) 2043 for (i = 0; i < 4; i++) {
1731 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_INT0, 4, i); 2044 r = octeon_irq_force_ciu_mapping(
2045 ciu_domain, i + OCTEON_IRQ_PCI_INT0, 4, i);
2046 if (r)
2047 goto err;
2048 }
1732 2049
1733 for (i = 0; i < 4; i++) 2050 for (i = 0; i < 4; i++) {
1734 octeon_irq_force_ciu_mapping(ciu_domain, i + OCTEON_IRQ_PCI_MSI0, 4, i + 8); 2051 r = octeon_irq_force_ciu_mapping(
2052 ciu_domain, i + OCTEON_IRQ_PCI_MSI0, 4, i + 8);
2053 if (r)
2054 goto err;
2055 }
1735 2056
1736 irq_set_chip_and_handler(OCTEON_IRQ_MBOX0, &octeon_irq_chip_ciu2_mbox, handle_percpu_irq); 2057 irq_set_chip_and_handler(OCTEON_IRQ_MBOX0, &octeon_irq_chip_ciu2_mbox, handle_percpu_irq);
1737 irq_set_chip_and_handler(OCTEON_IRQ_MBOX1, &octeon_irq_chip_ciu2_mbox, handle_percpu_irq); 2058 irq_set_chip_and_handler(OCTEON_IRQ_MBOX1, &octeon_irq_chip_ciu2_mbox, handle_percpu_irq);
@@ -1741,8 +2062,242 @@ static void __init octeon_irq_init_ciu2(void)
1741 /* Enable the CIU lines */ 2062 /* Enable the CIU lines */
1742 set_c0_status(STATUSF_IP3 | STATUSF_IP2); 2063 set_c0_status(STATUSF_IP3 | STATUSF_IP2);
1743 clear_c0_status(STATUSF_IP4); 2064 clear_c0_status(STATUSF_IP4);
2065 return 0;
2066err:
2067 return r;
2068}
2069
2070struct octeon_irq_cib_host_data {
2071 raw_spinlock_t lock;
2072 u64 raw_reg;
2073 u64 en_reg;
2074 int max_bits;
2075};
2076
2077struct octeon_irq_cib_chip_data {
2078 struct octeon_irq_cib_host_data *host_data;
2079 int bit;
2080};
2081
2082static void octeon_irq_cib_enable(struct irq_data *data)
2083{
2084 unsigned long flags;
2085 u64 en;
2086 struct octeon_irq_cib_chip_data *cd = irq_data_get_irq_chip_data(data);
2087 struct octeon_irq_cib_host_data *host_data = cd->host_data;
2088
2089 raw_spin_lock_irqsave(&host_data->lock, flags);
2090 en = cvmx_read_csr(host_data->en_reg);
2091 en |= 1ull << cd->bit;
2092 cvmx_write_csr(host_data->en_reg, en);
2093 raw_spin_unlock_irqrestore(&host_data->lock, flags);
2094}
2095
2096static void octeon_irq_cib_disable(struct irq_data *data)
2097{
2098 unsigned long flags;
2099 u64 en;
2100 struct octeon_irq_cib_chip_data *cd = irq_data_get_irq_chip_data(data);
2101 struct octeon_irq_cib_host_data *host_data = cd->host_data;
2102
2103 raw_spin_lock_irqsave(&host_data->lock, flags);
2104 en = cvmx_read_csr(host_data->en_reg);
2105 en &= ~(1ull << cd->bit);
2106 cvmx_write_csr(host_data->en_reg, en);
2107 raw_spin_unlock_irqrestore(&host_data->lock, flags);
2108}
2109
2110static int octeon_irq_cib_set_type(struct irq_data *data, unsigned int t)
2111{
2112 irqd_set_trigger_type(data, t);
2113 return IRQ_SET_MASK_OK;
2114}
2115
2116static struct irq_chip octeon_irq_chip_cib = {
2117 .name = "CIB",
2118 .irq_enable = octeon_irq_cib_enable,
2119 .irq_disable = octeon_irq_cib_disable,
2120 .irq_mask = octeon_irq_cib_disable,
2121 .irq_unmask = octeon_irq_cib_enable,
2122 .irq_set_type = octeon_irq_cib_set_type,
2123};
2124
2125static int octeon_irq_cib_xlat(struct irq_domain *d,
2126 struct device_node *node,
2127 const u32 *intspec,
2128 unsigned int intsize,
2129 unsigned long *out_hwirq,
2130 unsigned int *out_type)
2131{
2132 unsigned int type = 0;
2133
2134 if (intsize == 2)
2135 type = intspec[1];
2136
2137 switch (type) {
2138 case 0: /* unofficial value, but we might as well let it work. */
2139 case 4: /* official value for level triggering. */
2140 *out_type = IRQ_TYPE_LEVEL_HIGH;
2141 break;
2142 case 1: /* official value for edge triggering. */
2143 *out_type = IRQ_TYPE_EDGE_RISING;
2144 break;
2145 default: /* Nothing else is acceptable. */
2146 return -EINVAL;
2147 }
2148
2149 *out_hwirq = intspec[0];
2150
2151 return 0;
2152}
2153
2154static int octeon_irq_cib_map(struct irq_domain *d,
2155 unsigned int virq, irq_hw_number_t hw)
2156{
2157 struct octeon_irq_cib_host_data *host_data = d->host_data;
2158 struct octeon_irq_cib_chip_data *cd;
2159
2160 if (hw >= host_data->max_bits) {
2161 pr_err("ERROR: %s mapping %u is to big!\n",
2162 d->of_node->name, (unsigned)hw);
2163 return -EINVAL;
2164 }
2165
2166 cd = kzalloc(sizeof(*cd), GFP_KERNEL);
2167 cd->host_data = host_data;
2168 cd->bit = hw;
2169
2170 irq_set_chip_and_handler(virq, &octeon_irq_chip_cib,
2171 handle_simple_irq);
2172 irq_set_chip_data(virq, cd);
2173 return 0;
1744} 2174}
1745 2175
2176static struct irq_domain_ops octeon_irq_domain_cib_ops = {
2177 .map = octeon_irq_cib_map,
2178 .unmap = octeon_irq_free_cd,
2179 .xlate = octeon_irq_cib_xlat,
2180};
2181
2182/* Chain to real handler. */
2183static irqreturn_t octeon_irq_cib_handler(int my_irq, void *data)
2184{
2185 u64 en;
2186 u64 raw;
2187 u64 bits;
2188 int i;
2189 int irq;
2190 struct irq_domain *cib_domain = data;
2191 struct octeon_irq_cib_host_data *host_data = cib_domain->host_data;
2192
2193 en = cvmx_read_csr(host_data->en_reg);
2194 raw = cvmx_read_csr(host_data->raw_reg);
2195
2196 bits = en & raw;
2197
2198 for (i = 0; i < host_data->max_bits; i++) {
2199 if ((bits & 1ull << i) == 0)
2200 continue;
2201 irq = irq_find_mapping(cib_domain, i);
2202 if (!irq) {
2203 unsigned long flags;
2204
2205 pr_err("ERROR: CIB bit %d@%llx IRQ unhandled, disabling\n",
2206 i, host_data->raw_reg);
2207 raw_spin_lock_irqsave(&host_data->lock, flags);
2208 en = cvmx_read_csr(host_data->en_reg);
2209 en &= ~(1ull << i);
2210 cvmx_write_csr(host_data->en_reg, en);
2211 cvmx_write_csr(host_data->raw_reg, 1ull << i);
2212 raw_spin_unlock_irqrestore(&host_data->lock, flags);
2213 } else {
2214 struct irq_desc *desc = irq_to_desc(irq);
2215 struct irq_data *irq_data = irq_desc_get_irq_data(desc);
2216 /* If edge, acknowledge the bit we will be sending. */
2217 if (irqd_get_trigger_type(irq_data) &
2218 IRQ_TYPE_EDGE_BOTH)
2219 cvmx_write_csr(host_data->raw_reg, 1ull << i);
2220 generic_handle_irq_desc(irq, desc);
2221 }
2222 }
2223
2224 return IRQ_HANDLED;
2225}
2226
2227static int __init octeon_irq_init_cib(struct device_node *ciu_node,
2228 struct device_node *parent)
2229{
2230 const __be32 *addr;
2231 u32 val;
2232 struct octeon_irq_cib_host_data *host_data;
2233 int parent_irq;
2234 int r;
2235 struct irq_domain *cib_domain;
2236
2237 parent_irq = irq_of_parse_and_map(ciu_node, 0);
2238 if (!parent_irq) {
2239 pr_err("ERROR: Couldn't acquire parent_irq for %s\n.",
2240 ciu_node->name);
2241 return -EINVAL;
2242 }
2243
2244 host_data = kzalloc(sizeof(*host_data), GFP_KERNEL);
2245 raw_spin_lock_init(&host_data->lock);
2246
2247 addr = of_get_address(ciu_node, 0, NULL, NULL);
2248 if (!addr) {
2249 pr_err("ERROR: Couldn't acquire reg(0) %s\n.", ciu_node->name);
2250 return -EINVAL;
2251 }
2252 host_data->raw_reg = (u64)phys_to_virt(
2253 of_translate_address(ciu_node, addr));
2254
2255 addr = of_get_address(ciu_node, 1, NULL, NULL);
2256 if (!addr) {
2257 pr_err("ERROR: Couldn't acquire reg(1) %s\n.", ciu_node->name);
2258 return -EINVAL;
2259 }
2260 host_data->en_reg = (u64)phys_to_virt(
2261 of_translate_address(ciu_node, addr));
2262
2263 r = of_property_read_u32(ciu_node, "cavium,max-bits", &val);
2264 if (r) {
2265 pr_err("ERROR: Couldn't read cavium,max-bits from %s\n.",
2266 ciu_node->name);
2267 return r;
2268 }
2269 host_data->max_bits = val;
2270
2271 cib_domain = irq_domain_add_linear(ciu_node, host_data->max_bits,
2272 &octeon_irq_domain_cib_ops,
2273 host_data);
2274 if (!cib_domain) {
2275 pr_err("ERROR: Couldn't irq_domain_add_linear()\n.");
2276 return -ENOMEM;
2277 }
2278
2279 cvmx_write_csr(host_data->en_reg, 0); /* disable all IRQs */
2280 cvmx_write_csr(host_data->raw_reg, ~0); /* ack any outstanding */
2281
2282 r = request_irq(parent_irq, octeon_irq_cib_handler,
2283 IRQF_NO_THREAD, "cib", cib_domain);
2284 if (r) {
2285 pr_err("request_irq cib failed %d\n", r);
2286 return r;
2287 }
2288 pr_info("CIB interrupt controller probed: %llx %d\n",
2289 host_data->raw_reg, host_data->max_bits);
2290 return 0;
2291}
2292
2293static struct of_device_id ciu_types[] __initdata = {
2294 {.compatible = "cavium,octeon-3860-ciu", .data = octeon_irq_init_ciu},
2295 {.compatible = "cavium,octeon-3860-gpio", .data = octeon_irq_init_gpio},
2296 {.compatible = "cavium,octeon-6880-ciu2", .data = octeon_irq_init_ciu2},
2297 {.compatible = "cavium,octeon-7130-cib", .data = octeon_irq_init_cib},
2298 {}
2299};
2300
1746void __init arch_init_irq(void) 2301void __init arch_init_irq(void)
1747{ 2302{
1748#ifdef CONFIG_SMP 2303#ifdef CONFIG_SMP
@@ -1750,10 +2305,7 @@ void __init arch_init_irq(void)
1750 cpumask_clear(irq_default_affinity); 2305 cpumask_clear(irq_default_affinity);
1751 cpumask_set_cpu(smp_processor_id(), irq_default_affinity); 2306 cpumask_set_cpu(smp_processor_id(), irq_default_affinity);
1752#endif 2307#endif
1753 if (OCTEON_IS_MODEL(OCTEON_CN68XX)) 2308 of_irq_init(ciu_types);
1754 octeon_irq_init_ciu2();
1755 else
1756 octeon_irq_init_ciu();
1757} 2309}
1758 2310
1759asmlinkage void plat_irq_dispatch(void) 2311asmlinkage void plat_irq_dispatch(void)
@@ -1767,13 +2319,13 @@ asmlinkage void plat_irq_dispatch(void)
1767 cop0_cause &= cop0_status; 2319 cop0_cause &= cop0_status;
1768 cop0_cause &= ST0_IM; 2320 cop0_cause &= ST0_IM;
1769 2321
1770 if (unlikely(cop0_cause & STATUSF_IP2)) 2322 if (cop0_cause & STATUSF_IP2)
1771 octeon_irq_ip2(); 2323 octeon_irq_ip2();
1772 else if (unlikely(cop0_cause & STATUSF_IP3)) 2324 else if (cop0_cause & STATUSF_IP3)
1773 octeon_irq_ip3(); 2325 octeon_irq_ip3();
1774 else if (unlikely(cop0_cause & STATUSF_IP4)) 2326 else if (cop0_cause & STATUSF_IP4)
1775 octeon_irq_ip4(); 2327 octeon_irq_ip4();
1776 else if (likely(cop0_cause)) 2328 else if (cop0_cause)
1777 do_IRQ(fls(cop0_cause) - 9 + MIPS_CPU_IRQ_BASE); 2329 do_IRQ(fls(cop0_cause) - 9 + MIPS_CPU_IRQ_BASE);
1778 else 2330 else
1779 break; 2331 break;
diff --git a/arch/mips/cavium-octeon/setup.c b/arch/mips/cavium-octeon/setup.c
index 94f888d3384e..a42110e7edbc 100644
--- a/arch/mips/cavium-octeon/setup.c
+++ b/arch/mips/cavium-octeon/setup.c
@@ -41,6 +41,7 @@
41#include <asm/octeon/octeon.h> 41#include <asm/octeon/octeon.h>
42#include <asm/octeon/pci-octeon.h> 42#include <asm/octeon/pci-octeon.h>
43#include <asm/octeon/cvmx-mio-defs.h> 43#include <asm/octeon/cvmx-mio-defs.h>
44#include <asm/octeon/cvmx-rst-defs.h>
44 45
45extern struct plat_smp_ops octeon_smp_ops; 46extern struct plat_smp_ops octeon_smp_ops;
46 47
@@ -579,12 +580,10 @@ void octeon_user_io_init(void)
579 /* R/W If set, CVMSEG is available for loads/stores in user 580 /* R/W If set, CVMSEG is available for loads/stores in user
580 * mode. */ 581 * mode. */
581 cvmmemctl.s.cvmsegenau = 0; 582 cvmmemctl.s.cvmsegenau = 0;
582 /* R/W Size of local memory in cache blocks, 54 (6912 bytes)
583 * is max legal value. */
584 cvmmemctl.s.lmemsz = CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE;
585 583
586 write_c0_cvmmemctl(cvmmemctl.u64); 584 write_c0_cvmmemctl(cvmmemctl.u64);
587 585
586 /* Setup of CVMSEG is done in kernel-entry-init.h */
588 if (smp_processor_id() == 0) 587 if (smp_processor_id() == 0)
589 pr_notice("CVMSEG size: %d cache lines (%d bytes)\n", 588 pr_notice("CVMSEG size: %d cache lines (%d bytes)\n",
590 CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE, 589 CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE,
@@ -615,6 +614,7 @@ void __init prom_init(void)
615 const char *arg; 614 const char *arg;
616 char *p; 615 char *p;
617 int i; 616 int i;
617 u64 t;
618 int argc; 618 int argc;
619#ifdef CONFIG_CAVIUM_RESERVE32 619#ifdef CONFIG_CAVIUM_RESERVE32
620 int64_t addr = -1; 620 int64_t addr = -1;
@@ -654,15 +654,56 @@ void __init prom_init(void)
654 sysinfo->dfa_ref_clock_hz = octeon_bootinfo->dfa_ref_clock_hz; 654 sysinfo->dfa_ref_clock_hz = octeon_bootinfo->dfa_ref_clock_hz;
655 sysinfo->bootloader_config_flags = octeon_bootinfo->config_flags; 655 sysinfo->bootloader_config_flags = octeon_bootinfo->config_flags;
656 656
657 if (OCTEON_IS_MODEL(OCTEON_CN6XXX)) { 657 if (OCTEON_IS_OCTEON2()) {
658 /* I/O clock runs at a different rate than the CPU. */ 658 /* I/O clock runs at a different rate than the CPU. */
659 union cvmx_mio_rst_boot rst_boot; 659 union cvmx_mio_rst_boot rst_boot;
660 rst_boot.u64 = cvmx_read_csr(CVMX_MIO_RST_BOOT); 660 rst_boot.u64 = cvmx_read_csr(CVMX_MIO_RST_BOOT);
661 octeon_io_clock_rate = 50000000 * rst_boot.s.pnr_mul; 661 octeon_io_clock_rate = 50000000 * rst_boot.s.pnr_mul;
662 } else if (OCTEON_IS_OCTEON3()) {
663 /* I/O clock runs at a different rate than the CPU. */
664 union cvmx_rst_boot rst_boot;
665 rst_boot.u64 = cvmx_read_csr(CVMX_RST_BOOT);
666 octeon_io_clock_rate = 50000000 * rst_boot.s.pnr_mul;
662 } else { 667 } else {
663 octeon_io_clock_rate = sysinfo->cpu_clock_hz; 668 octeon_io_clock_rate = sysinfo->cpu_clock_hz;
664 } 669 }
665 670
671 t = read_c0_cvmctl();
672 if ((t & (1ull << 27)) == 0) {
673 /*
674 * Setup the multiplier save/restore code if
675 * CvmCtl[NOMUL] clear.
676 */
677 void *save;
678 void *save_end;
679 void *restore;
680 void *restore_end;
681 int save_len;
682 int restore_len;
683 int save_max = (char *)octeon_mult_save_end -
684 (char *)octeon_mult_save;
685 int restore_max = (char *)octeon_mult_restore_end -
686 (char *)octeon_mult_restore;
687 if (current_cpu_data.cputype == CPU_CAVIUM_OCTEON3) {
688 save = octeon_mult_save3;
689 save_end = octeon_mult_save3_end;
690 restore = octeon_mult_restore3;
691 restore_end = octeon_mult_restore3_end;
692 } else {
693 save = octeon_mult_save2;
694 save_end = octeon_mult_save2_end;
695 restore = octeon_mult_restore2;
696 restore_end = octeon_mult_restore2_end;
697 }
698 save_len = (char *)save_end - (char *)save;
699 restore_len = (char *)restore_end - (char *)restore;
700 if (!WARN_ON(save_len > save_max ||
701 restore_len > restore_max)) {
702 memcpy(octeon_mult_save, save, save_len);
703 memcpy(octeon_mult_restore, restore, restore_len);
704 }
705 }
706
666 /* 707 /*
667 * Only enable the LED controller if we're running on a CN38XX, CN58XX, 708 * Only enable the LED controller if we're running on a CN38XX, CN58XX,
668 * or CN56XX. The CN30XX and CN31XX don't have an LED controller. 709 * or CN56XX. The CN30XX and CN31XX don't have an LED controller.
@@ -1004,7 +1045,7 @@ EXPORT_SYMBOL(prom_putchar);
1004 1045
1005void prom_free_prom_memory(void) 1046void prom_free_prom_memory(void)
1006{ 1047{
1007 if (OCTEON_IS_MODEL(OCTEON_CN63XX_PASS1_X)) { 1048 if (CAVIUM_OCTEON_DCACHE_PREFETCH_WAR) {
1008 /* Check for presence of Core-14449 fix. */ 1049 /* Check for presence of Core-14449 fix. */
1009 u32 insn; 1050 u32 insn;
1010 u32 *foo; 1051 u32 *foo;
@@ -1026,8 +1067,9 @@ void prom_free_prom_memory(void)
1026 panic("No PREF instruction at Core-14449 probe point."); 1067 panic("No PREF instruction at Core-14449 probe point.");
1027 1068
1028 if (((insn >> 16) & 0x1f) != 28) 1069 if (((insn >> 16) & 0x1f) != 28)
1029 panic("Core-14449 WAR not in place (%04x).\n" 1070 panic("OCTEON II DCache prefetch workaround not in place (%04x).\n"
1030 "Please build kernel with proper options (CONFIG_CAVIUM_CN63XXP1).", insn); 1071 "Please build kernel with proper options (CONFIG_CAVIUM_CN63XXP1).",
1072 insn);
1031 } 1073 }
1032} 1074}
1033 1075
diff --git a/arch/mips/configs/malta_qemu_32r6_defconfig b/arch/mips/configs/malta_qemu_32r6_defconfig
new file mode 100644
index 000000000000..4bce1f8ebe98
--- /dev/null
+++ b/arch/mips/configs/malta_qemu_32r6_defconfig
@@ -0,0 +1,193 @@
1CONFIG_MIPS_MALTA=y
2CONFIG_CPU_LITTLE_ENDIAN=y
3CONFIG_CPU_MIPS32_R6=y
4CONFIG_PAGE_SIZE_16KB=y
5CONFIG_HZ_100=y
6CONFIG_SYSVIPC=y
7CONFIG_POSIX_MQUEUE=y
8CONFIG_AUDIT=y
9CONFIG_NO_HZ=y
10CONFIG_IKCONFIG=y
11CONFIG_IKCONFIG_PROC=y
12CONFIG_LOG_BUF_SHIFT=15
13CONFIG_SYSCTL_SYSCALL=y
14CONFIG_EMBEDDED=y
15CONFIG_SLAB=y
16CONFIG_MODULES=y
17CONFIG_MODULE_UNLOAD=y
18CONFIG_MODVERSIONS=y
19CONFIG_MODULE_SRCVERSION_ALL=y
20# CONFIG_BLK_DEV_BSG is not set
21CONFIG_PCI=y
22# CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
23CONFIG_NET=y
24CONFIG_PACKET=y
25CONFIG_UNIX=y
26CONFIG_XFRM_USER=m
27CONFIG_NET_KEY=y
28CONFIG_INET=y
29CONFIG_IP_MULTICAST=y
30CONFIG_IP_ADVANCED_ROUTER=y
31CONFIG_IP_MULTIPLE_TABLES=y
32CONFIG_IP_ROUTE_MULTIPATH=y
33CONFIG_IP_ROUTE_VERBOSE=y
34CONFIG_IP_PNP=y
35CONFIG_IP_PNP_DHCP=y
36CONFIG_IP_PNP_BOOTP=y
37CONFIG_NET_IPIP=m
38CONFIG_IP_MROUTE=y
39CONFIG_IP_PIMSM_V1=y
40CONFIG_IP_PIMSM_V2=y
41CONFIG_SYN_COOKIES=y
42CONFIG_INET_AH=m
43CONFIG_INET_ESP=m
44CONFIG_INET_IPCOMP=m
45# CONFIG_INET_LRO is not set
46CONFIG_INET6_AH=m
47CONFIG_INET6_ESP=m
48CONFIG_INET6_IPCOMP=m
49CONFIG_IPV6_TUNNEL=m
50CONFIG_BRIDGE=m
51CONFIG_VLAN_8021Q=m
52CONFIG_ATALK=m
53CONFIG_DEV_APPLETALK=m
54CONFIG_IPDDP=m
55CONFIG_IPDDP_ENCAP=y
56CONFIG_NET_SCHED=y
57CONFIG_NET_SCH_CBQ=m
58CONFIG_NET_SCH_HTB=m
59CONFIG_NET_SCH_HFSC=m
60CONFIG_NET_SCH_PRIO=m
61CONFIG_NET_SCH_RED=m
62CONFIG_NET_SCH_SFQ=m
63CONFIG_NET_SCH_TEQL=m
64CONFIG_NET_SCH_TBF=m
65CONFIG_NET_SCH_GRED=m
66CONFIG_NET_SCH_DSMARK=m
67CONFIG_NET_SCH_NETEM=m
68CONFIG_NET_SCH_INGRESS=m
69CONFIG_NET_CLS_BASIC=m
70CONFIG_NET_CLS_TCINDEX=m
71CONFIG_NET_CLS_ROUTE4=m
72CONFIG_NET_CLS_FW=m
73CONFIG_NET_CLS_U32=m
74CONFIG_NET_CLS_RSVP=m
75CONFIG_NET_CLS_RSVP6=m
76CONFIG_NET_CLS_ACT=y
77CONFIG_NET_ACT_POLICE=y
78CONFIG_NET_CLS_IND=y
79# CONFIG_WIRELESS is not set
80CONFIG_DEVTMPFS=y
81CONFIG_BLK_DEV_LOOP=y
82CONFIG_BLK_DEV_CRYPTOLOOP=m
83CONFIG_IDE=y
84# CONFIG_IDE_PROC_FS is not set
85# CONFIG_IDEPCI_PCIBUS_ORDER is not set
86CONFIG_BLK_DEV_GENERIC=y
87CONFIG_BLK_DEV_PIIX=y
88CONFIG_SCSI=y
89CONFIG_BLK_DEV_SD=y
90CONFIG_CHR_DEV_SG=y
91# CONFIG_SCSI_LOWLEVEL is not set
92CONFIG_NETDEVICES=y
93# CONFIG_NET_VENDOR_3COM is not set
94# CONFIG_NET_VENDOR_ADAPTEC is not set
95# CONFIG_NET_VENDOR_ALTEON is not set
96CONFIG_PCNET32=y
97# CONFIG_NET_VENDOR_ATHEROS is not set
98# CONFIG_NET_VENDOR_BROADCOM is not set
99# CONFIG_NET_VENDOR_BROCADE is not set
100# CONFIG_NET_VENDOR_CHELSIO is not set
101# CONFIG_NET_VENDOR_CISCO is not set
102# CONFIG_NET_VENDOR_DEC is not set
103# CONFIG_NET_VENDOR_DLINK is not set
104# CONFIG_NET_VENDOR_EMULEX is not set
105# CONFIG_NET_VENDOR_EXAR is not set
106# CONFIG_NET_VENDOR_HP is not set
107# CONFIG_NET_VENDOR_INTEL is not set
108# CONFIG_NET_VENDOR_MARVELL is not set
109# CONFIG_NET_VENDOR_MELLANOX is not set
110# CONFIG_NET_VENDOR_MICREL is not set
111# CONFIG_NET_VENDOR_MYRI is not set
112# CONFIG_NET_VENDOR_NATSEMI is not set
113# CONFIG_NET_VENDOR_NVIDIA is not set
114# CONFIG_NET_VENDOR_OKI is not set
115# CONFIG_NET_PACKET_ENGINE is not set
116# CONFIG_NET_VENDOR_QLOGIC is not set
117# CONFIG_NET_VENDOR_REALTEK is not set
118# CONFIG_NET_VENDOR_RDC is not set
119# CONFIG_NET_VENDOR_SEEQ is not set
120# CONFIG_NET_VENDOR_SILAN is not set
121# CONFIG_NET_VENDOR_SIS is not set
122# CONFIG_NET_VENDOR_SMSC is not set
123# CONFIG_NET_VENDOR_STMICRO is not set
124# CONFIG_NET_VENDOR_SUN is not set
125# CONFIG_NET_VENDOR_TEHUTI is not set
126# CONFIG_NET_VENDOR_TI is not set
127# CONFIG_NET_VENDOR_TOSHIBA is not set
128# CONFIG_NET_VENDOR_VIA is not set
129# CONFIG_NET_VENDOR_WIZNET is not set
130# CONFIG_WLAN is not set
131# CONFIG_VT is not set
132CONFIG_LEGACY_PTY_COUNT=4
133CONFIG_SERIAL_8250=y
134CONFIG_SERIAL_8250_CONSOLE=y
135CONFIG_HW_RANDOM=y
136# CONFIG_HWMON is not set
137CONFIG_FB=y
138CONFIG_FIRMWARE_EDID=y
139CONFIG_FB_MATROX=y
140CONFIG_FB_MATROX_G=y
141CONFIG_USB=y
142CONFIG_USB_EHCI_HCD=y
143# CONFIG_USB_EHCI_TT_NEWSCHED is not set
144CONFIG_USB_UHCI_HCD=y
145CONFIG_USB_STORAGE=y
146CONFIG_NEW_LEDS=y
147CONFIG_LEDS_CLASS=y
148CONFIG_LEDS_TRIGGERS=y
149CONFIG_LEDS_TRIGGER_TIMER=y
150CONFIG_LEDS_TRIGGER_IDE_DISK=y
151CONFIG_LEDS_TRIGGER_HEARTBEAT=y
152CONFIG_LEDS_TRIGGER_BACKLIGHT=y
153CONFIG_LEDS_TRIGGER_DEFAULT_ON=y
154CONFIG_RTC_CLASS=y
155CONFIG_RTC_DRV_CMOS=y
156CONFIG_EXT2_FS=y
157CONFIG_EXT3_FS=y
158# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
159CONFIG_XFS_FS=y
160CONFIG_XFS_QUOTA=y
161CONFIG_XFS_POSIX_ACL=y
162CONFIG_QUOTA=y
163CONFIG_QFMT_V2=y
164CONFIG_MSDOS_FS=m
165CONFIG_VFAT_FS=m
166CONFIG_PROC_KCORE=y
167CONFIG_TMPFS=y
168CONFIG_NFS_FS=y
169CONFIG_ROOT_NFS=y
170CONFIG_CIFS=m
171CONFIG_CIFS_WEAK_PW_HASH=y
172CONFIG_CIFS_XATTR=y
173CONFIG_CIFS_POSIX=y
174CONFIG_NLS_CODEPAGE_437=m
175CONFIG_NLS_ISO8859_1=m
176# CONFIG_FTRACE is not set
177CONFIG_CRYPTO_NULL=m
178CONFIG_CRYPTO_PCBC=m
179CONFIG_CRYPTO_HMAC=y
180CONFIG_CRYPTO_MICHAEL_MIC=m
181CONFIG_CRYPTO_SHA512=m
182CONFIG_CRYPTO_TGR192=m
183CONFIG_CRYPTO_WP512=m
184CONFIG_CRYPTO_ANUBIS=m
185CONFIG_CRYPTO_BLOWFISH=m
186CONFIG_CRYPTO_CAST5=m
187CONFIG_CRYPTO_CAST6=m
188CONFIG_CRYPTO_KHAZAD=m
189CONFIG_CRYPTO_SERPENT=m
190CONFIG_CRYPTO_TEA=m
191CONFIG_CRYPTO_TWOFISH=m
192# CONFIG_CRYPTO_ANSI_CPRNG is not set
193# CONFIG_CRYPTO_HW is not set
diff --git a/arch/mips/fw/arc/misc.c b/arch/mips/fw/arc/misc.c
index f9f5307434c2..19f710117d97 100644
--- a/arch/mips/fw/arc/misc.c
+++ b/arch/mips/fw/arc/misc.c
@@ -9,6 +9,7 @@
9 * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org) 9 * Copyright (C) 1999 Ralf Baechle (ralf@gnu.org)
10 * Copyright (C) 1999 Silicon Graphics, Inc. 10 * Copyright (C) 1999 Silicon Graphics, Inc.
11 */ 11 */
12#include <linux/compiler.h>
12#include <linux/init.h> 13#include <linux/init.h>
13#include <linux/kernel.h> 14#include <linux/kernel.h>
14#include <linux/irqflags.h> 15#include <linux/irqflags.h>
@@ -19,50 +20,55 @@
19#include <asm/sgialib.h> 20#include <asm/sgialib.h>
20#include <asm/bootinfo.h> 21#include <asm/bootinfo.h>
21 22
22VOID 23VOID __noreturn
23ArcHalt(VOID) 24ArcHalt(VOID)
24{ 25{
25 bc_disable(); 26 bc_disable();
26 local_irq_disable(); 27 local_irq_disable();
27 ARC_CALL0(halt); 28 ARC_CALL0(halt);
28never: goto never; 29
30 unreachable();
29} 31}
30 32
31VOID 33VOID __noreturn
32ArcPowerDown(VOID) 34ArcPowerDown(VOID)
33{ 35{
34 bc_disable(); 36 bc_disable();
35 local_irq_disable(); 37 local_irq_disable();
36 ARC_CALL0(pdown); 38 ARC_CALL0(pdown);
37never: goto never; 39
40 unreachable();
38} 41}
39 42
40/* XXX is this a soft reset basically? XXX */ 43/* XXX is this a soft reset basically? XXX */
41VOID 44VOID __noreturn
42ArcRestart(VOID) 45ArcRestart(VOID)
43{ 46{
44 bc_disable(); 47 bc_disable();
45 local_irq_disable(); 48 local_irq_disable();
46 ARC_CALL0(restart); 49 ARC_CALL0(restart);
47never: goto never; 50
51 unreachable();
48} 52}
49 53
50VOID 54VOID __noreturn
51ArcReboot(VOID) 55ArcReboot(VOID)
52{ 56{
53 bc_disable(); 57 bc_disable();
54 local_irq_disable(); 58 local_irq_disable();
55 ARC_CALL0(reboot); 59 ARC_CALL0(reboot);
56never: goto never; 60
61 unreachable();
57} 62}
58 63
59VOID 64VOID __noreturn
60ArcEnterInteractiveMode(VOID) 65ArcEnterInteractiveMode(VOID)
61{ 66{
62 bc_disable(); 67 bc_disable();
63 local_irq_disable(); 68 local_irq_disable();
64 ARC_CALL0(imode); 69 ARC_CALL0(imode);
65never: goto never; 70
71 unreachable();
66} 72}
67 73
68LONG 74LONG
diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild
index 200efeac4181..526539cbc99f 100644
--- a/arch/mips/include/asm/Kbuild
+++ b/arch/mips/include/asm/Kbuild
@@ -1,4 +1,5 @@
1# MIPS headers 1# MIPS headers
2generic-(CONFIG_GENERIC_CSUM) += checksum.h
2generic-y += cputime.h 3generic-y += cputime.h
3generic-y += current.h 4generic-y += current.h
4generic-y += dma-contiguous.h 5generic-y += dma-contiguous.h
diff --git a/arch/mips/include/asm/asmmacro.h b/arch/mips/include/asm/asmmacro.h
index 6caf8766b80f..0cae4595e985 100644
--- a/arch/mips/include/asm/asmmacro.h
+++ b/arch/mips/include/asm/asmmacro.h
@@ -19,7 +19,7 @@
19#include <asm/asmmacro-64.h> 19#include <asm/asmmacro-64.h>
20#endif 20#endif
21 21
22#ifdef CONFIG_CPU_MIPSR2 22#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
23 .macro local_irq_enable reg=t0 23 .macro local_irq_enable reg=t0
24 ei 24 ei
25 irq_enable_hazard 25 irq_enable_hazard
@@ -104,7 +104,8 @@
104 .endm 104 .endm
105 105
106 .macro fpu_save_double thread status tmp 106 .macro fpu_save_double thread status tmp
107#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) 107#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \
108 defined(CONFIG_CPU_MIPS32_R6)
108 sll \tmp, \status, 5 109 sll \tmp, \status, 5
109 bgez \tmp, 10f 110 bgez \tmp, 10f
110 fpu_save_16odd \thread 111 fpu_save_16odd \thread
@@ -160,7 +161,8 @@
160 .endm 161 .endm
161 162
162 .macro fpu_restore_double thread status tmp 163 .macro fpu_restore_double thread status tmp
163#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) 164#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \
165 defined(CONFIG_CPU_MIPS32_R6)
164 sll \tmp, \status, 5 166 sll \tmp, \status, 5
165 bgez \tmp, 10f # 16 register mode? 167 bgez \tmp, 10f # 16 register mode?
166 168
@@ -170,16 +172,16 @@
170 fpu_restore_16even \thread \tmp 172 fpu_restore_16even \thread \tmp
171 .endm 173 .endm
172 174
173#ifdef CONFIG_CPU_MIPSR2 175#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
174 .macro _EXT rd, rs, p, s 176 .macro _EXT rd, rs, p, s
175 ext \rd, \rs, \p, \s 177 ext \rd, \rs, \p, \s
176 .endm 178 .endm
177#else /* !CONFIG_CPU_MIPSR2 */ 179#else /* !CONFIG_CPU_MIPSR2 || !CONFIG_CPU_MIPSR6 */
178 .macro _EXT rd, rs, p, s 180 .macro _EXT rd, rs, p, s
179 srl \rd, \rs, \p 181 srl \rd, \rs, \p
180 andi \rd, \rd, (1 << \s) - 1 182 andi \rd, \rd, (1 << \s) - 1
181 .endm 183 .endm
182#endif /* !CONFIG_CPU_MIPSR2 */ 184#endif /* !CONFIG_CPU_MIPSR2 || !CONFIG_CPU_MIPSR6 */
183 185
184/* 186/*
185 * Temporary until all gas have MT ASE support 187 * Temporary until all gas have MT ASE support
@@ -304,7 +306,7 @@
304 .set push 306 .set push
305 .set noat 307 .set noat
306 SET_HARDFLOAT 308 SET_HARDFLOAT
307 add $1, \base, \off 309 addu $1, \base, \off
308 .word LDD_MSA_INSN | (\wd << 6) 310 .word LDD_MSA_INSN | (\wd << 6)
309 .set pop 311 .set pop
310 .endm 312 .endm
@@ -313,7 +315,7 @@
313 .set push 315 .set push
314 .set noat 316 .set noat
315 SET_HARDFLOAT 317 SET_HARDFLOAT
316 add $1, \base, \off 318 addu $1, \base, \off
317 .word STD_MSA_INSN | (\wd << 6) 319 .word STD_MSA_INSN | (\wd << 6)
318 .set pop 320 .set pop
319 .endm 321 .endm
diff --git a/arch/mips/include/asm/atomic.h b/arch/mips/include/asm/atomic.h
index 857da84cfc92..26d436336f2e 100644
--- a/arch/mips/include/asm/atomic.h
+++ b/arch/mips/include/asm/atomic.h
@@ -54,19 +54,19 @@ static __inline__ void atomic_##op(int i, atomic_t * v) \
54 " sc %0, %1 \n" \ 54 " sc %0, %1 \n" \
55 " beqzl %0, 1b \n" \ 55 " beqzl %0, 1b \n" \
56 " .set mips0 \n" \ 56 " .set mips0 \n" \
57 : "=&r" (temp), "+" GCC_OFF12_ASM() (v->counter) \ 57 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
58 : "Ir" (i)); \ 58 : "Ir" (i)); \
59 } else if (kernel_uses_llsc) { \ 59 } else if (kernel_uses_llsc) { \
60 int temp; \ 60 int temp; \
61 \ 61 \
62 do { \ 62 do { \
63 __asm__ __volatile__( \ 63 __asm__ __volatile__( \
64 " .set arch=r4000 \n" \ 64 " .set "MIPS_ISA_LEVEL" \n" \
65 " ll %0, %1 # atomic_" #op "\n" \ 65 " ll %0, %1 # atomic_" #op "\n" \
66 " " #asm_op " %0, %2 \n" \ 66 " " #asm_op " %0, %2 \n" \
67 " sc %0, %1 \n" \ 67 " sc %0, %1 \n" \
68 " .set mips0 \n" \ 68 " .set mips0 \n" \
69 : "=&r" (temp), "+" GCC_OFF12_ASM() (v->counter) \ 69 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
70 : "Ir" (i)); \ 70 : "Ir" (i)); \
71 } while (unlikely(!temp)); \ 71 } while (unlikely(!temp)); \
72 } else { \ 72 } else { \
@@ -97,20 +97,20 @@ static __inline__ int atomic_##op##_return(int i, atomic_t * v) \
97 " " #asm_op " %0, %1, %3 \n" \ 97 " " #asm_op " %0, %1, %3 \n" \
98 " .set mips0 \n" \ 98 " .set mips0 \n" \
99 : "=&r" (result), "=&r" (temp), \ 99 : "=&r" (result), "=&r" (temp), \
100 "+" GCC_OFF12_ASM() (v->counter) \ 100 "+" GCC_OFF_SMALL_ASM() (v->counter) \
101 : "Ir" (i)); \ 101 : "Ir" (i)); \
102 } else if (kernel_uses_llsc) { \ 102 } else if (kernel_uses_llsc) { \
103 int temp; \ 103 int temp; \
104 \ 104 \
105 do { \ 105 do { \
106 __asm__ __volatile__( \ 106 __asm__ __volatile__( \
107 " .set arch=r4000 \n" \ 107 " .set "MIPS_ISA_LEVEL" \n" \
108 " ll %1, %2 # atomic_" #op "_return \n" \ 108 " ll %1, %2 # atomic_" #op "_return \n" \
109 " " #asm_op " %0, %1, %3 \n" \ 109 " " #asm_op " %0, %1, %3 \n" \
110 " sc %0, %2 \n" \ 110 " sc %0, %2 \n" \
111 " .set mips0 \n" \ 111 " .set mips0 \n" \
112 : "=&r" (result), "=&r" (temp), \ 112 : "=&r" (result), "=&r" (temp), \
113 "+" GCC_OFF12_ASM() (v->counter) \ 113 "+" GCC_OFF_SMALL_ASM() (v->counter) \
114 : "Ir" (i)); \ 114 : "Ir" (i)); \
115 } while (unlikely(!result)); \ 115 } while (unlikely(!result)); \
116 \ 116 \
@@ -171,14 +171,14 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
171 "1: \n" 171 "1: \n"
172 " .set mips0 \n" 172 " .set mips0 \n"
173 : "=&r" (result), "=&r" (temp), 173 : "=&r" (result), "=&r" (temp),
174 "+" GCC_OFF12_ASM() (v->counter) 174 "+" GCC_OFF_SMALL_ASM() (v->counter)
175 : "Ir" (i), GCC_OFF12_ASM() (v->counter) 175 : "Ir" (i), GCC_OFF_SMALL_ASM() (v->counter)
176 : "memory"); 176 : "memory");
177 } else if (kernel_uses_llsc) { 177 } else if (kernel_uses_llsc) {
178 int temp; 178 int temp;
179 179
180 __asm__ __volatile__( 180 __asm__ __volatile__(
181 " .set arch=r4000 \n" 181 " .set "MIPS_ISA_LEVEL" \n"
182 "1: ll %1, %2 # atomic_sub_if_positive\n" 182 "1: ll %1, %2 # atomic_sub_if_positive\n"
183 " subu %0, %1, %3 \n" 183 " subu %0, %1, %3 \n"
184 " bltz %0, 1f \n" 184 " bltz %0, 1f \n"
@@ -190,7 +190,7 @@ static __inline__ int atomic_sub_if_positive(int i, atomic_t * v)
190 "1: \n" 190 "1: \n"
191 " .set mips0 \n" 191 " .set mips0 \n"
192 : "=&r" (result), "=&r" (temp), 192 : "=&r" (result), "=&r" (temp),
193 "+" GCC_OFF12_ASM() (v->counter) 193 "+" GCC_OFF_SMALL_ASM() (v->counter)
194 : "Ir" (i)); 194 : "Ir" (i));
195 } else { 195 } else {
196 unsigned long flags; 196 unsigned long flags;
@@ -333,19 +333,19 @@ static __inline__ void atomic64_##op(long i, atomic64_t * v) \
333 " scd %0, %1 \n" \ 333 " scd %0, %1 \n" \
334 " beqzl %0, 1b \n" \ 334 " beqzl %0, 1b \n" \
335 " .set mips0 \n" \ 335 " .set mips0 \n" \
336 : "=&r" (temp), "+" GCC_OFF12_ASM() (v->counter) \ 336 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
337 : "Ir" (i)); \ 337 : "Ir" (i)); \
338 } else if (kernel_uses_llsc) { \ 338 } else if (kernel_uses_llsc) { \
339 long temp; \ 339 long temp; \
340 \ 340 \
341 do { \ 341 do { \
342 __asm__ __volatile__( \ 342 __asm__ __volatile__( \
343 " .set arch=r4000 \n" \ 343 " .set "MIPS_ISA_LEVEL" \n" \
344 " lld %0, %1 # atomic64_" #op "\n" \ 344 " lld %0, %1 # atomic64_" #op "\n" \
345 " " #asm_op " %0, %2 \n" \ 345 " " #asm_op " %0, %2 \n" \
346 " scd %0, %1 \n" \ 346 " scd %0, %1 \n" \
347 " .set mips0 \n" \ 347 " .set mips0 \n" \
348 : "=&r" (temp), "+" GCC_OFF12_ASM() (v->counter) \ 348 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (v->counter) \
349 : "Ir" (i)); \ 349 : "Ir" (i)); \
350 } while (unlikely(!temp)); \ 350 } while (unlikely(!temp)); \
351 } else { \ 351 } else { \
@@ -376,21 +376,21 @@ static __inline__ long atomic64_##op##_return(long i, atomic64_t * v) \
376 " " #asm_op " %0, %1, %3 \n" \ 376 " " #asm_op " %0, %1, %3 \n" \
377 " .set mips0 \n" \ 377 " .set mips0 \n" \
378 : "=&r" (result), "=&r" (temp), \ 378 : "=&r" (result), "=&r" (temp), \
379 "+" GCC_OFF12_ASM() (v->counter) \ 379 "+" GCC_OFF_SMALL_ASM() (v->counter) \
380 : "Ir" (i)); \ 380 : "Ir" (i)); \
381 } else if (kernel_uses_llsc) { \ 381 } else if (kernel_uses_llsc) { \
382 long temp; \ 382 long temp; \
383 \ 383 \
384 do { \ 384 do { \
385 __asm__ __volatile__( \ 385 __asm__ __volatile__( \
386 " .set arch=r4000 \n" \ 386 " .set "MIPS_ISA_LEVEL" \n" \
387 " lld %1, %2 # atomic64_" #op "_return\n" \ 387 " lld %1, %2 # atomic64_" #op "_return\n" \
388 " " #asm_op " %0, %1, %3 \n" \ 388 " " #asm_op " %0, %1, %3 \n" \
389 " scd %0, %2 \n" \ 389 " scd %0, %2 \n" \
390 " .set mips0 \n" \ 390 " .set mips0 \n" \
391 : "=&r" (result), "=&r" (temp), \ 391 : "=&r" (result), "=&r" (temp), \
392 "=" GCC_OFF12_ASM() (v->counter) \ 392 "=" GCC_OFF_SMALL_ASM() (v->counter) \
393 : "Ir" (i), GCC_OFF12_ASM() (v->counter) \ 393 : "Ir" (i), GCC_OFF_SMALL_ASM() (v->counter) \
394 : "memory"); \ 394 : "memory"); \
395 } while (unlikely(!result)); \ 395 } while (unlikely(!result)); \
396 \ 396 \
@@ -452,14 +452,14 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
452 "1: \n" 452 "1: \n"
453 " .set mips0 \n" 453 " .set mips0 \n"
454 : "=&r" (result), "=&r" (temp), 454 : "=&r" (result), "=&r" (temp),
455 "=" GCC_OFF12_ASM() (v->counter) 455 "=" GCC_OFF_SMALL_ASM() (v->counter)
456 : "Ir" (i), GCC_OFF12_ASM() (v->counter) 456 : "Ir" (i), GCC_OFF_SMALL_ASM() (v->counter)
457 : "memory"); 457 : "memory");
458 } else if (kernel_uses_llsc) { 458 } else if (kernel_uses_llsc) {
459 long temp; 459 long temp;
460 460
461 __asm__ __volatile__( 461 __asm__ __volatile__(
462 " .set arch=r4000 \n" 462 " .set "MIPS_ISA_LEVEL" \n"
463 "1: lld %1, %2 # atomic64_sub_if_positive\n" 463 "1: lld %1, %2 # atomic64_sub_if_positive\n"
464 " dsubu %0, %1, %3 \n" 464 " dsubu %0, %1, %3 \n"
465 " bltz %0, 1f \n" 465 " bltz %0, 1f \n"
@@ -471,7 +471,7 @@ static __inline__ long atomic64_sub_if_positive(long i, atomic64_t * v)
471 "1: \n" 471 "1: \n"
472 " .set mips0 \n" 472 " .set mips0 \n"
473 : "=&r" (result), "=&r" (temp), 473 : "=&r" (result), "=&r" (temp),
474 "+" GCC_OFF12_ASM() (v->counter) 474 "+" GCC_OFF_SMALL_ASM() (v->counter)
475 : "Ir" (i)); 475 : "Ir" (i));
476 } else { 476 } else {
477 unsigned long flags; 477 unsigned long flags;
diff --git a/arch/mips/include/asm/bitops.h b/arch/mips/include/asm/bitops.h
index 6663bcca9d0c..9f935f6aa996 100644
--- a/arch/mips/include/asm/bitops.h
+++ b/arch/mips/include/asm/bitops.h
@@ -79,28 +79,28 @@ static inline void set_bit(unsigned long nr, volatile unsigned long *addr)
79 " " __SC "%0, %1 \n" 79 " " __SC "%0, %1 \n"
80 " beqzl %0, 1b \n" 80 " beqzl %0, 1b \n"
81 " .set mips0 \n" 81 " .set mips0 \n"
82 : "=&r" (temp), "=" GCC_OFF12_ASM() (*m) 82 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*m)
83 : "ir" (1UL << bit), GCC_OFF12_ASM() (*m)); 83 : "ir" (1UL << bit), GCC_OFF_SMALL_ASM() (*m));
84#ifdef CONFIG_CPU_MIPSR2 84#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
85 } else if (kernel_uses_llsc && __builtin_constant_p(bit)) { 85 } else if (kernel_uses_llsc && __builtin_constant_p(bit)) {
86 do { 86 do {
87 __asm__ __volatile__( 87 __asm__ __volatile__(
88 " " __LL "%0, %1 # set_bit \n" 88 " " __LL "%0, %1 # set_bit \n"
89 " " __INS "%0, %3, %2, 1 \n" 89 " " __INS "%0, %3, %2, 1 \n"
90 " " __SC "%0, %1 \n" 90 " " __SC "%0, %1 \n"
91 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m) 91 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
92 : "ir" (bit), "r" (~0)); 92 : "ir" (bit), "r" (~0));
93 } while (unlikely(!temp)); 93 } while (unlikely(!temp));
94#endif /* CONFIG_CPU_MIPSR2 */ 94#endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
95 } else if (kernel_uses_llsc) { 95 } else if (kernel_uses_llsc) {
96 do { 96 do {
97 __asm__ __volatile__( 97 __asm__ __volatile__(
98 " .set arch=r4000 \n" 98 " .set "MIPS_ISA_ARCH_LEVEL" \n"
99 " " __LL "%0, %1 # set_bit \n" 99 " " __LL "%0, %1 # set_bit \n"
100 " or %0, %2 \n" 100 " or %0, %2 \n"
101 " " __SC "%0, %1 \n" 101 " " __SC "%0, %1 \n"
102 " .set mips0 \n" 102 " .set mips0 \n"
103 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m) 103 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
104 : "ir" (1UL << bit)); 104 : "ir" (1UL << bit));
105 } while (unlikely(!temp)); 105 } while (unlikely(!temp));
106 } else 106 } else
@@ -131,28 +131,28 @@ static inline void clear_bit(unsigned long nr, volatile unsigned long *addr)
131 " " __SC "%0, %1 \n" 131 " " __SC "%0, %1 \n"
132 " beqzl %0, 1b \n" 132 " beqzl %0, 1b \n"
133 " .set mips0 \n" 133 " .set mips0 \n"
134 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m) 134 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
135 : "ir" (~(1UL << bit))); 135 : "ir" (~(1UL << bit)));
136#ifdef CONFIG_CPU_MIPSR2 136#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
137 } else if (kernel_uses_llsc && __builtin_constant_p(bit)) { 137 } else if (kernel_uses_llsc && __builtin_constant_p(bit)) {
138 do { 138 do {
139 __asm__ __volatile__( 139 __asm__ __volatile__(
140 " " __LL "%0, %1 # clear_bit \n" 140 " " __LL "%0, %1 # clear_bit \n"
141 " " __INS "%0, $0, %2, 1 \n" 141 " " __INS "%0, $0, %2, 1 \n"
142 " " __SC "%0, %1 \n" 142 " " __SC "%0, %1 \n"
143 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m) 143 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
144 : "ir" (bit)); 144 : "ir" (bit));
145 } while (unlikely(!temp)); 145 } while (unlikely(!temp));
146#endif /* CONFIG_CPU_MIPSR2 */ 146#endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
147 } else if (kernel_uses_llsc) { 147 } else if (kernel_uses_llsc) {
148 do { 148 do {
149 __asm__ __volatile__( 149 __asm__ __volatile__(
150 " .set arch=r4000 \n" 150 " .set "MIPS_ISA_ARCH_LEVEL" \n"
151 " " __LL "%0, %1 # clear_bit \n" 151 " " __LL "%0, %1 # clear_bit \n"
152 " and %0, %2 \n" 152 " and %0, %2 \n"
153 " " __SC "%0, %1 \n" 153 " " __SC "%0, %1 \n"
154 " .set mips0 \n" 154 " .set mips0 \n"
155 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m) 155 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
156 : "ir" (~(1UL << bit))); 156 : "ir" (~(1UL << bit)));
157 } while (unlikely(!temp)); 157 } while (unlikely(!temp));
158 } else 158 } else
@@ -197,7 +197,7 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
197 " " __SC "%0, %1 \n" 197 " " __SC "%0, %1 \n"
198 " beqzl %0, 1b \n" 198 " beqzl %0, 1b \n"
199 " .set mips0 \n" 199 " .set mips0 \n"
200 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m) 200 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
201 : "ir" (1UL << bit)); 201 : "ir" (1UL << bit));
202 } else if (kernel_uses_llsc) { 202 } else if (kernel_uses_llsc) {
203 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); 203 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
@@ -205,12 +205,12 @@ static inline void change_bit(unsigned long nr, volatile unsigned long *addr)
205 205
206 do { 206 do {
207 __asm__ __volatile__( 207 __asm__ __volatile__(
208 " .set arch=r4000 \n" 208 " .set "MIPS_ISA_ARCH_LEVEL" \n"
209 " " __LL "%0, %1 # change_bit \n" 209 " " __LL "%0, %1 # change_bit \n"
210 " xor %0, %2 \n" 210 " xor %0, %2 \n"
211 " " __SC "%0, %1 \n" 211 " " __SC "%0, %1 \n"
212 " .set mips0 \n" 212 " .set mips0 \n"
213 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m) 213 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m)
214 : "ir" (1UL << bit)); 214 : "ir" (1UL << bit));
215 } while (unlikely(!temp)); 215 } while (unlikely(!temp));
216 } else 216 } else
@@ -245,7 +245,7 @@ static inline int test_and_set_bit(unsigned long nr,
245 " beqzl %2, 1b \n" 245 " beqzl %2, 1b \n"
246 " and %2, %0, %3 \n" 246 " and %2, %0, %3 \n"
247 " .set mips0 \n" 247 " .set mips0 \n"
248 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m), "=&r" (res) 248 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
249 : "r" (1UL << bit) 249 : "r" (1UL << bit)
250 : "memory"); 250 : "memory");
251 } else if (kernel_uses_llsc) { 251 } else if (kernel_uses_llsc) {
@@ -254,12 +254,12 @@ static inline int test_and_set_bit(unsigned long nr,
254 254
255 do { 255 do {
256 __asm__ __volatile__( 256 __asm__ __volatile__(
257 " .set arch=r4000 \n" 257 " .set "MIPS_ISA_ARCH_LEVEL" \n"
258 " " __LL "%0, %1 # test_and_set_bit \n" 258 " " __LL "%0, %1 # test_and_set_bit \n"
259 " or %2, %0, %3 \n" 259 " or %2, %0, %3 \n"
260 " " __SC "%2, %1 \n" 260 " " __SC "%2, %1 \n"
261 " .set mips0 \n" 261 " .set mips0 \n"
262 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m), "=&r" (res) 262 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
263 : "r" (1UL << bit) 263 : "r" (1UL << bit)
264 : "memory"); 264 : "memory");
265 } while (unlikely(!res)); 265 } while (unlikely(!res));
@@ -308,12 +308,12 @@ static inline int test_and_set_bit_lock(unsigned long nr,
308 308
309 do { 309 do {
310 __asm__ __volatile__( 310 __asm__ __volatile__(
311 " .set arch=r4000 \n" 311 " .set "MIPS_ISA_ARCH_LEVEL" \n"
312 " " __LL "%0, %1 # test_and_set_bit \n" 312 " " __LL "%0, %1 # test_and_set_bit \n"
313 " or %2, %0, %3 \n" 313 " or %2, %0, %3 \n"
314 " " __SC "%2, %1 \n" 314 " " __SC "%2, %1 \n"
315 " .set mips0 \n" 315 " .set mips0 \n"
316 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m), "=&r" (res) 316 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
317 : "r" (1UL << bit) 317 : "r" (1UL << bit)
318 : "memory"); 318 : "memory");
319 } while (unlikely(!res)); 319 } while (unlikely(!res));
@@ -355,10 +355,10 @@ static inline int test_and_clear_bit(unsigned long nr,
355 " beqzl %2, 1b \n" 355 " beqzl %2, 1b \n"
356 " and %2, %0, %3 \n" 356 " and %2, %0, %3 \n"
357 " .set mips0 \n" 357 " .set mips0 \n"
358 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m), "=&r" (res) 358 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
359 : "r" (1UL << bit) 359 : "r" (1UL << bit)
360 : "memory"); 360 : "memory");
361#ifdef CONFIG_CPU_MIPSR2 361#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
362 } else if (kernel_uses_llsc && __builtin_constant_p(nr)) { 362 } else if (kernel_uses_llsc && __builtin_constant_p(nr)) {
363 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG); 363 unsigned long *m = ((unsigned long *) addr) + (nr >> SZLONG_LOG);
364 unsigned long temp; 364 unsigned long temp;
@@ -369,7 +369,7 @@ static inline int test_and_clear_bit(unsigned long nr,
369 " " __EXT "%2, %0, %3, 1 \n" 369 " " __EXT "%2, %0, %3, 1 \n"
370 " " __INS "%0, $0, %3, 1 \n" 370 " " __INS "%0, $0, %3, 1 \n"
371 " " __SC "%0, %1 \n" 371 " " __SC "%0, %1 \n"
372 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m), "=&r" (res) 372 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
373 : "ir" (bit) 373 : "ir" (bit)
374 : "memory"); 374 : "memory");
375 } while (unlikely(!temp)); 375 } while (unlikely(!temp));
@@ -380,13 +380,13 @@ static inline int test_and_clear_bit(unsigned long nr,
380 380
381 do { 381 do {
382 __asm__ __volatile__( 382 __asm__ __volatile__(
383 " .set arch=r4000 \n" 383 " .set "MIPS_ISA_ARCH_LEVEL" \n"
384 " " __LL "%0, %1 # test_and_clear_bit \n" 384 " " __LL "%0, %1 # test_and_clear_bit \n"
385 " or %2, %0, %3 \n" 385 " or %2, %0, %3 \n"
386 " xor %2, %3 \n" 386 " xor %2, %3 \n"
387 " " __SC "%2, %1 \n" 387 " " __SC "%2, %1 \n"
388 " .set mips0 \n" 388 " .set mips0 \n"
389 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m), "=&r" (res) 389 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
390 : "r" (1UL << bit) 390 : "r" (1UL << bit)
391 : "memory"); 391 : "memory");
392 } while (unlikely(!res)); 392 } while (unlikely(!res));
@@ -428,7 +428,7 @@ static inline int test_and_change_bit(unsigned long nr,
428 " beqzl %2, 1b \n" 428 " beqzl %2, 1b \n"
429 " and %2, %0, %3 \n" 429 " and %2, %0, %3 \n"
430 " .set mips0 \n" 430 " .set mips0 \n"
431 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m), "=&r" (res) 431 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
432 : "r" (1UL << bit) 432 : "r" (1UL << bit)
433 : "memory"); 433 : "memory");
434 } else if (kernel_uses_llsc) { 434 } else if (kernel_uses_llsc) {
@@ -437,12 +437,12 @@ static inline int test_and_change_bit(unsigned long nr,
437 437
438 do { 438 do {
439 __asm__ __volatile__( 439 __asm__ __volatile__(
440 " .set arch=r4000 \n" 440 " .set "MIPS_ISA_ARCH_LEVEL" \n"
441 " " __LL "%0, %1 # test_and_change_bit \n" 441 " " __LL "%0, %1 # test_and_change_bit \n"
442 " xor %2, %0, %3 \n" 442 " xor %2, %0, %3 \n"
443 " " __SC "\t%2, %1 \n" 443 " " __SC "\t%2, %1 \n"
444 " .set mips0 \n" 444 " .set mips0 \n"
445 : "=&r" (temp), "+" GCC_OFF12_ASM() (*m), "=&r" (res) 445 : "=&r" (temp), "+" GCC_OFF_SMALL_ASM() (*m), "=&r" (res)
446 : "r" (1UL << bit) 446 : "r" (1UL << bit)
447 : "memory"); 447 : "memory");
448 } while (unlikely(!res)); 448 } while (unlikely(!res));
@@ -485,7 +485,7 @@ static inline unsigned long __fls(unsigned long word)
485 __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { 485 __builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) {
486 __asm__( 486 __asm__(
487 " .set push \n" 487 " .set push \n"
488 " .set mips32 \n" 488 " .set "MIPS_ISA_LEVEL" \n"
489 " clz %0, %1 \n" 489 " clz %0, %1 \n"
490 " .set pop \n" 490 " .set pop \n"
491 : "=r" (num) 491 : "=r" (num)
@@ -498,7 +498,7 @@ static inline unsigned long __fls(unsigned long word)
498 __builtin_constant_p(cpu_has_mips64) && cpu_has_mips64) { 498 __builtin_constant_p(cpu_has_mips64) && cpu_has_mips64) {
499 __asm__( 499 __asm__(
500 " .set push \n" 500 " .set push \n"
501 " .set mips64 \n" 501 " .set "MIPS_ISA_LEVEL" \n"
502 " dclz %0, %1 \n" 502 " dclz %0, %1 \n"
503 " .set pop \n" 503 " .set pop \n"
504 : "=r" (num) 504 : "=r" (num)
@@ -562,7 +562,7 @@ static inline int fls(int x)
562 if (__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) { 562 if (__builtin_constant_p(cpu_has_clo_clz) && cpu_has_clo_clz) {
563 __asm__( 563 __asm__(
564 " .set push \n" 564 " .set push \n"
565 " .set mips32 \n" 565 " .set "MIPS_ISA_LEVEL" \n"
566 " clz %0, %1 \n" 566 " clz %0, %1 \n"
567 " .set pop \n" 567 " .set pop \n"
568 : "=r" (x) 568 : "=r" (x)
diff --git a/arch/mips/include/asm/checksum.h b/arch/mips/include/asm/checksum.h
index 3418c51e1151..5c585c5c1c3e 100644
--- a/arch/mips/include/asm/checksum.h
+++ b/arch/mips/include/asm/checksum.h
@@ -12,6 +12,10 @@
12#ifndef _ASM_CHECKSUM_H 12#ifndef _ASM_CHECKSUM_H
13#define _ASM_CHECKSUM_H 13#define _ASM_CHECKSUM_H
14 14
15#ifdef CONFIG_GENERIC_CSUM
16#include <asm-generic/checksum.h>
17#else
18
15#include <linux/in6.h> 19#include <linux/in6.h>
16 20
17#include <asm/uaccess.h> 21#include <asm/uaccess.h>
@@ -99,27 +103,23 @@ __wsum csum_and_copy_to_user(const void *src, void __user *dst, int len,
99 */ 103 */
100__wsum csum_partial_copy_nocheck(const void *src, void *dst, 104__wsum csum_partial_copy_nocheck(const void *src, void *dst,
101 int len, __wsum sum); 105 int len, __wsum sum);
106#define csum_partial_copy_nocheck csum_partial_copy_nocheck
102 107
103/* 108/*
104 * Fold a partial checksum without adding pseudo headers 109 * Fold a partial checksum without adding pseudo headers
105 */ 110 */
106static inline __sum16 csum_fold(__wsum sum) 111static inline __sum16 csum_fold(__wsum csum)
107{ 112{
108 __asm__( 113 u32 sum = (__force u32)csum;;
109 " .set push # csum_fold\n"
110 " .set noat \n"
111 " sll $1, %0, 16 \n"
112 " addu %0, $1 \n"
113 " sltu $1, %0, $1 \n"
114 " srl %0, %0, 16 \n"
115 " addu %0, $1 \n"
116 " xori %0, 0xffff \n"
117 " .set pop"
118 : "=r" (sum)
119 : "0" (sum));
120 114
121 return (__force __sum16)sum; 115 sum += (sum << 16);
116 csum = (sum < csum);
117 sum >>= 16;
118 sum += csum;
119
120 return (__force __sum16)~sum;
122} 121}
122#define csum_fold csum_fold
123 123
124/* 124/*
125 * This is a version of ip_compute_csum() optimized for IP headers, 125 * This is a version of ip_compute_csum() optimized for IP headers,
@@ -158,6 +158,7 @@ static inline __sum16 ip_fast_csum(const void *iph, unsigned int ihl)
158 158
159 return csum_fold(csum); 159 return csum_fold(csum);
160} 160}
161#define ip_fast_csum ip_fast_csum
161 162
162static inline __wsum csum_tcpudp_nofold(__be32 saddr, 163static inline __wsum csum_tcpudp_nofold(__be32 saddr,
163 __be32 daddr, unsigned short len, unsigned short proto, 164 __be32 daddr, unsigned short len, unsigned short proto,
@@ -200,18 +201,7 @@ static inline __wsum csum_tcpudp_nofold(__be32 saddr,
200 201
201 return sum; 202 return sum;
202} 203}
203 204#define csum_tcpudp_nofold csum_tcpudp_nofold
204/*
205 * computes the checksum of the TCP/UDP pseudo-header
206 * returns a 16-bit checksum, already complemented
207 */
208static inline __sum16 csum_tcpudp_magic(__be32 saddr, __be32 daddr,
209 unsigned short len,
210 unsigned short proto,
211 __wsum sum)
212{
213 return csum_fold(csum_tcpudp_nofold(saddr, daddr, len, proto, sum));
214}
215 205
216/* 206/*
217 * this routine is used for miscellaneous IP-like checksums, mainly 207 * this routine is used for miscellaneous IP-like checksums, mainly
@@ -287,4 +277,7 @@ static __inline__ __sum16 csum_ipv6_magic(const struct in6_addr *saddr,
287 return csum_fold(sum); 277 return csum_fold(sum);
288} 278}
289 279
280#include <asm-generic/checksum.h>
281#endif /* CONFIG_GENERIC_CSUM */
282
290#endif /* _ASM_CHECKSUM_H */ 283#endif /* _ASM_CHECKSUM_H */
diff --git a/arch/mips/include/asm/cmpxchg.h b/arch/mips/include/asm/cmpxchg.h
index 28b1edf19501..d0a2a68ca600 100644
--- a/arch/mips/include/asm/cmpxchg.h
+++ b/arch/mips/include/asm/cmpxchg.h
@@ -31,24 +31,24 @@ static inline unsigned long __xchg_u32(volatile int * m, unsigned int val)
31 " sc %2, %1 \n" 31 " sc %2, %1 \n"
32 " beqzl %2, 1b \n" 32 " beqzl %2, 1b \n"
33 " .set mips0 \n" 33 " .set mips0 \n"
34 : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), "=&r" (dummy) 34 : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m), "=&r" (dummy)
35 : GCC_OFF12_ASM() (*m), "Jr" (val) 35 : GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
36 : "memory"); 36 : "memory");
37 } else if (kernel_uses_llsc) { 37 } else if (kernel_uses_llsc) {
38 unsigned long dummy; 38 unsigned long dummy;
39 39
40 do { 40 do {
41 __asm__ __volatile__( 41 __asm__ __volatile__(
42 " .set arch=r4000 \n" 42 " .set "MIPS_ISA_ARCH_LEVEL" \n"
43 " ll %0, %3 # xchg_u32 \n" 43 " ll %0, %3 # xchg_u32 \n"
44 " .set mips0 \n" 44 " .set mips0 \n"
45 " move %2, %z4 \n" 45 " move %2, %z4 \n"
46 " .set arch=r4000 \n" 46 " .set "MIPS_ISA_ARCH_LEVEL" \n"
47 " sc %2, %1 \n" 47 " sc %2, %1 \n"
48 " .set mips0 \n" 48 " .set mips0 \n"
49 : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), 49 : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m),
50 "=&r" (dummy) 50 "=&r" (dummy)
51 : GCC_OFF12_ASM() (*m), "Jr" (val) 51 : GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
52 : "memory"); 52 : "memory");
53 } while (unlikely(!dummy)); 53 } while (unlikely(!dummy));
54 } else { 54 } else {
@@ -82,22 +82,22 @@ static inline __u64 __xchg_u64(volatile __u64 * m, __u64 val)
82 " scd %2, %1 \n" 82 " scd %2, %1 \n"
83 " beqzl %2, 1b \n" 83 " beqzl %2, 1b \n"
84 " .set mips0 \n" 84 " .set mips0 \n"
85 : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), "=&r" (dummy) 85 : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m), "=&r" (dummy)
86 : GCC_OFF12_ASM() (*m), "Jr" (val) 86 : GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
87 : "memory"); 87 : "memory");
88 } else if (kernel_uses_llsc) { 88 } else if (kernel_uses_llsc) {
89 unsigned long dummy; 89 unsigned long dummy;
90 90
91 do { 91 do {
92 __asm__ __volatile__( 92 __asm__ __volatile__(
93 " .set arch=r4000 \n" 93 " .set "MIPS_ISA_ARCH_LEVEL" \n"
94 " lld %0, %3 # xchg_u64 \n" 94 " lld %0, %3 # xchg_u64 \n"
95 " move %2, %z4 \n" 95 " move %2, %z4 \n"
96 " scd %2, %1 \n" 96 " scd %2, %1 \n"
97 " .set mips0 \n" 97 " .set mips0 \n"
98 : "=&r" (retval), "=" GCC_OFF12_ASM() (*m), 98 : "=&r" (retval), "=" GCC_OFF_SMALL_ASM() (*m),
99 "=&r" (dummy) 99 "=&r" (dummy)
100 : GCC_OFF12_ASM() (*m), "Jr" (val) 100 : GCC_OFF_SMALL_ASM() (*m), "Jr" (val)
101 : "memory"); 101 : "memory");
102 } while (unlikely(!dummy)); 102 } while (unlikely(!dummy));
103 } else { 103 } else {
@@ -158,25 +158,25 @@ static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int siz
158 " beqzl $1, 1b \n" \ 158 " beqzl $1, 1b \n" \
159 "2: \n" \ 159 "2: \n" \
160 " .set pop \n" \ 160 " .set pop \n" \
161 : "=&r" (__ret), "=" GCC_OFF12_ASM() (*m) \ 161 : "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m) \
162 : GCC_OFF12_ASM() (*m), "Jr" (old), "Jr" (new) \ 162 : GCC_OFF_SMALL_ASM() (*m), "Jr" (old), "Jr" (new) \
163 : "memory"); \ 163 : "memory"); \
164 } else if (kernel_uses_llsc) { \ 164 } else if (kernel_uses_llsc) { \
165 __asm__ __volatile__( \ 165 __asm__ __volatile__( \
166 " .set push \n" \ 166 " .set push \n" \
167 " .set noat \n" \ 167 " .set noat \n" \
168 " .set arch=r4000 \n" \ 168 " .set "MIPS_ISA_ARCH_LEVEL" \n" \
169 "1: " ld " %0, %2 # __cmpxchg_asm \n" \ 169 "1: " ld " %0, %2 # __cmpxchg_asm \n" \
170 " bne %0, %z3, 2f \n" \ 170 " bne %0, %z3, 2f \n" \
171 " .set mips0 \n" \ 171 " .set mips0 \n" \
172 " move $1, %z4 \n" \ 172 " move $1, %z4 \n" \
173 " .set arch=r4000 \n" \ 173 " .set "MIPS_ISA_ARCH_LEVEL" \n" \
174 " " st " $1, %1 \n" \ 174 " " st " $1, %1 \n" \
175 " beqz $1, 1b \n" \ 175 " beqz $1, 1b \n" \
176 " .set pop \n" \ 176 " .set pop \n" \
177 "2: \n" \ 177 "2: \n" \
178 : "=&r" (__ret), "=" GCC_OFF12_ASM() (*m) \ 178 : "=&r" (__ret), "=" GCC_OFF_SMALL_ASM() (*m) \
179 : GCC_OFF12_ASM() (*m), "Jr" (old), "Jr" (new) \ 179 : GCC_OFF_SMALL_ASM() (*m), "Jr" (old), "Jr" (new) \
180 : "memory"); \ 180 : "memory"); \
181 } else { \ 181 } else { \
182 unsigned long __flags; \ 182 unsigned long __flags; \
diff --git a/arch/mips/include/asm/compiler.h b/arch/mips/include/asm/compiler.h
index c73815e0123a..e081a265f422 100644
--- a/arch/mips/include/asm/compiler.h
+++ b/arch/mips/include/asm/compiler.h
@@ -16,12 +16,30 @@
16#define GCC_REG_ACCUM "accum" 16#define GCC_REG_ACCUM "accum"
17#endif 17#endif
18 18
19#ifdef CONFIG_CPU_MIPSR6
20/* All MIPS R6 toolchains support the ZC constrain */
21#define GCC_OFF_SMALL_ASM() "ZC"
22#else
19#ifndef CONFIG_CPU_MICROMIPS 23#ifndef CONFIG_CPU_MICROMIPS
20#define GCC_OFF12_ASM() "R" 24#define GCC_OFF_SMALL_ASM() "R"
21#elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9) 25#elif __GNUC__ > 4 || (__GNUC__ == 4 && __GNUC_MINOR__ >= 9)
22#define GCC_OFF12_ASM() "ZC" 26#define GCC_OFF_SMALL_ASM() "ZC"
23#else 27#else
24#error "microMIPS compilation unsupported with GCC older than 4.9" 28#error "microMIPS compilation unsupported with GCC older than 4.9"
25#endif 29#endif /* CONFIG_CPU_MICROMIPS */
30#endif /* CONFIG_CPU_MIPSR6 */
31
32#ifdef CONFIG_CPU_MIPSR6
33#define MIPS_ISA_LEVEL "mips64r6"
34#define MIPS_ISA_ARCH_LEVEL MIPS_ISA_LEVEL
35#define MIPS_ISA_LEVEL_RAW mips64r6
36#define MIPS_ISA_ARCH_LEVEL_RAW MIPS_ISA_LEVEL_RAW
37#else
38/* MIPS64 is a superset of MIPS32 */
39#define MIPS_ISA_LEVEL "mips64r2"
40#define MIPS_ISA_ARCH_LEVEL "arch=r4000"
41#define MIPS_ISA_LEVEL_RAW mips64r2
42#define MIPS_ISA_ARCH_LEVEL_RAW MIPS_ISA_LEVEL_RAW
43#endif /* CONFIG_CPU_MIPSR6 */
26 44
27#endif /* _ASM_COMPILER_H */ 45#endif /* _ASM_COMPILER_H */
diff --git a/arch/mips/include/asm/cpu-features.h b/arch/mips/include/asm/cpu-features.h
index 2897cfafcaf0..0d8208de9a3f 100644
--- a/arch/mips/include/asm/cpu-features.h
+++ b/arch/mips/include/asm/cpu-features.h
@@ -38,6 +38,9 @@
38#ifndef cpu_has_maar 38#ifndef cpu_has_maar
39#define cpu_has_maar (cpu_data[0].options & MIPS_CPU_MAAR) 39#define cpu_has_maar (cpu_data[0].options & MIPS_CPU_MAAR)
40#endif 40#endif
41#ifndef cpu_has_rw_llb
42#define cpu_has_rw_llb (cpu_data[0].options & MIPS_CPU_RW_LLB)
43#endif
41 44
42/* 45/*
43 * For the moment we don't consider R6000 and R8000 so we can assume that 46 * For the moment we don't consider R6000 and R8000 so we can assume that
@@ -171,6 +174,9 @@
171#endif 174#endif
172#endif 175#endif
173 176
177#ifndef cpu_has_mips_1
178# define cpu_has_mips_1 (!cpu_has_mips_r6)
179#endif
174#ifndef cpu_has_mips_2 180#ifndef cpu_has_mips_2
175# define cpu_has_mips_2 (cpu_data[0].isa_level & MIPS_CPU_ISA_II) 181# define cpu_has_mips_2 (cpu_data[0].isa_level & MIPS_CPU_ISA_II)
176#endif 182#endif
@@ -189,12 +195,18 @@
189#ifndef cpu_has_mips32r2 195#ifndef cpu_has_mips32r2
190# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2) 196# define cpu_has_mips32r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R2)
191#endif 197#endif
198#ifndef cpu_has_mips32r6
199# define cpu_has_mips32r6 (cpu_data[0].isa_level & MIPS_CPU_ISA_M32R6)
200#endif
192#ifndef cpu_has_mips64r1 201#ifndef cpu_has_mips64r1
193# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1) 202# define cpu_has_mips64r1 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R1)
194#endif 203#endif
195#ifndef cpu_has_mips64r2 204#ifndef cpu_has_mips64r2
196# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2) 205# define cpu_has_mips64r2 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R2)
197#endif 206#endif
207#ifndef cpu_has_mips64r6
208# define cpu_has_mips64r6 (cpu_data[0].isa_level & MIPS_CPU_ISA_M64R6)
209#endif
198 210
199/* 211/*
200 * Shortcuts ... 212 * Shortcuts ...
@@ -208,17 +220,23 @@
208#define cpu_has_mips_4_5_r (cpu_has_mips_4 | cpu_has_mips_5_r) 220#define cpu_has_mips_4_5_r (cpu_has_mips_4 | cpu_has_mips_5_r)
209#define cpu_has_mips_5_r (cpu_has_mips_5 | cpu_has_mips_r) 221#define cpu_has_mips_5_r (cpu_has_mips_5 | cpu_has_mips_r)
210 222
211#define cpu_has_mips_4_5_r2 (cpu_has_mips_4_5 | cpu_has_mips_r2) 223#define cpu_has_mips_4_5_r2_r6 (cpu_has_mips_4_5 | cpu_has_mips_r2 | \
224 cpu_has_mips_r6)
212 225
213#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2) 226#define cpu_has_mips32 (cpu_has_mips32r1 | cpu_has_mips32r2 | cpu_has_mips32r6)
214#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2) 227#define cpu_has_mips64 (cpu_has_mips64r1 | cpu_has_mips64r2 | cpu_has_mips64r6)
215#define cpu_has_mips_r1 (cpu_has_mips32r1 | cpu_has_mips64r1) 228#define cpu_has_mips_r1 (cpu_has_mips32r1 | cpu_has_mips64r1)
216#define cpu_has_mips_r2 (cpu_has_mips32r2 | cpu_has_mips64r2) 229#define cpu_has_mips_r2 (cpu_has_mips32r2 | cpu_has_mips64r2)
230#define cpu_has_mips_r6 (cpu_has_mips32r6 | cpu_has_mips64r6)
217#define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \ 231#define cpu_has_mips_r (cpu_has_mips32r1 | cpu_has_mips32r2 | \
218 cpu_has_mips64r1 | cpu_has_mips64r2) 232 cpu_has_mips32r6 | cpu_has_mips64r1 | \
233 cpu_has_mips64r2 | cpu_has_mips64r6)
234
235/* MIPSR2 and MIPSR6 have a lot of similarities */
236#define cpu_has_mips_r2_r6 (cpu_has_mips_r2 | cpu_has_mips_r6)
219 237
220#ifndef cpu_has_mips_r2_exec_hazard 238#ifndef cpu_has_mips_r2_exec_hazard
221#define cpu_has_mips_r2_exec_hazard cpu_has_mips_r2 239#define cpu_has_mips_r2_exec_hazard (cpu_has_mips_r2 | cpu_has_mips_r6)
222#endif 240#endif
223 241
224/* 242/*
diff --git a/arch/mips/include/asm/cpu-info.h b/arch/mips/include/asm/cpu-info.h
index a6c9ccb33c5c..c3f4f2d2e108 100644
--- a/arch/mips/include/asm/cpu-info.h
+++ b/arch/mips/include/asm/cpu-info.h
@@ -84,6 +84,11 @@ struct cpuinfo_mips {
84 * (shifted by _CACHE_SHIFT) 84 * (shifted by _CACHE_SHIFT)
85 */ 85 */
86 unsigned int writecombine; 86 unsigned int writecombine;
87 /*
88 * Simple counter to prevent enabling HTW in nested
89 * htw_start/htw_stop calls
90 */
91 unsigned int htw_seq;
87} __attribute__((aligned(SMP_CACHE_BYTES))); 92} __attribute__((aligned(SMP_CACHE_BYTES)));
88 93
89extern struct cpuinfo_mips cpu_data[]; 94extern struct cpuinfo_mips cpu_data[];
diff --git a/arch/mips/include/asm/cpu-type.h b/arch/mips/include/asm/cpu-type.h
index b4e2bd87df50..8245875f8b33 100644
--- a/arch/mips/include/asm/cpu-type.h
+++ b/arch/mips/include/asm/cpu-type.h
@@ -54,6 +54,13 @@ static inline int __pure __get_cpu_type(const int cpu_type)
54 case CPU_M5150: 54 case CPU_M5150:
55#endif 55#endif
56 56
57#if defined(CONFIG_SYS_HAS_CPU_MIPS32_R2) || \
58 defined(CONFIG_SYS_HAS_CPU_MIPS32_R6) || \
59 defined(CONFIG_SYS_HAS_CPU_MIPS64_R2) || \
60 defined(CONFIG_SYS_HAS_CPU_MIPS64_R6)
61 case CPU_QEMU_GENERIC:
62#endif
63
57#ifdef CONFIG_SYS_HAS_CPU_MIPS64_R1 64#ifdef CONFIG_SYS_HAS_CPU_MIPS64_R1
58 case CPU_5KC: 65 case CPU_5KC:
59 case CPU_5KE: 66 case CPU_5KE:
diff --git a/arch/mips/include/asm/cpu.h b/arch/mips/include/asm/cpu.h
index 33866fce4d63..15687234d70a 100644
--- a/arch/mips/include/asm/cpu.h
+++ b/arch/mips/include/asm/cpu.h
@@ -93,6 +93,7 @@
93 * These are the PRID's for when 23:16 == PRID_COMP_MIPS 93 * These are the PRID's for when 23:16 == PRID_COMP_MIPS
94 */ 94 */
95 95
96#define PRID_IMP_QEMU_GENERIC 0x0000
96#define PRID_IMP_4KC 0x8000 97#define PRID_IMP_4KC 0x8000
97#define PRID_IMP_5KC 0x8100 98#define PRID_IMP_5KC 0x8100
98#define PRID_IMP_20KC 0x8200 99#define PRID_IMP_20KC 0x8200
@@ -312,6 +313,8 @@ enum cpu_type_enum {
312 CPU_LOONGSON3, CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS, 313 CPU_LOONGSON3, CPU_CAVIUM_OCTEON, CPU_CAVIUM_OCTEON_PLUS,
313 CPU_CAVIUM_OCTEON2, CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP, 314 CPU_CAVIUM_OCTEON2, CPU_CAVIUM_OCTEON3, CPU_XLR, CPU_XLP,
314 315
316 CPU_QEMU_GENERIC,
317
315 CPU_LAST 318 CPU_LAST
316}; 319};
317 320
@@ -329,11 +332,14 @@ enum cpu_type_enum {
329#define MIPS_CPU_ISA_M32R2 0x00000020 332#define MIPS_CPU_ISA_M32R2 0x00000020
330#define MIPS_CPU_ISA_M64R1 0x00000040 333#define MIPS_CPU_ISA_M64R1 0x00000040
331#define MIPS_CPU_ISA_M64R2 0x00000080 334#define MIPS_CPU_ISA_M64R2 0x00000080
335#define MIPS_CPU_ISA_M32R6 0x00000100
336#define MIPS_CPU_ISA_M64R6 0x00000200
332 337
333#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_II | MIPS_CPU_ISA_M32R1 | \ 338#define MIPS_CPU_ISA_32BIT (MIPS_CPU_ISA_II | MIPS_CPU_ISA_M32R1 | \
334 MIPS_CPU_ISA_M32R2) 339 MIPS_CPU_ISA_M32R2 | MIPS_CPU_ISA_M32R6)
335#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \ 340#define MIPS_CPU_ISA_64BIT (MIPS_CPU_ISA_III | MIPS_CPU_ISA_IV | \
336 MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2) 341 MIPS_CPU_ISA_V | MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2 | \
342 MIPS_CPU_ISA_M64R6)
337 343
338/* 344/*
339 * CPU Option encodings 345 * CPU Option encodings
@@ -370,6 +376,7 @@ enum cpu_type_enum {
370#define MIPS_CPU_RIXIEX 0x200000000ull /* CPU has unique exception codes for {Read, Execute}-Inhibit exceptions */ 376#define MIPS_CPU_RIXIEX 0x200000000ull /* CPU has unique exception codes for {Read, Execute}-Inhibit exceptions */
371#define MIPS_CPU_MAAR 0x400000000ull /* MAAR(I) registers are present */ 377#define MIPS_CPU_MAAR 0x400000000ull /* MAAR(I) registers are present */
372#define MIPS_CPU_FRE 0x800000000ull /* FRE & UFE bits implemented */ 378#define MIPS_CPU_FRE 0x800000000ull /* FRE & UFE bits implemented */
379#define MIPS_CPU_RW_LLB 0x1000000000ull /* LLADDR/LLB writes are allowed */
373 380
374/* 381/*
375 * CPU ASE encodings 382 * CPU ASE encodings
diff --git a/arch/mips/include/asm/edac.h b/arch/mips/include/asm/edac.h
index ae6fedcb0060..94105d3f58f4 100644
--- a/arch/mips/include/asm/edac.h
+++ b/arch/mips/include/asm/edac.h
@@ -26,8 +26,8 @@ static inline void atomic_scrub(void *va, u32 size)
26 " sc %0, %1 \n" 26 " sc %0, %1 \n"
27 " beqz %0, 1b \n" 27 " beqz %0, 1b \n"
28 " .set mips0 \n" 28 " .set mips0 \n"
29 : "=&r" (temp), "=" GCC_OFF12_ASM() (*virt_addr) 29 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*virt_addr)
30 : GCC_OFF12_ASM() (*virt_addr)); 30 : GCC_OFF_SMALL_ASM() (*virt_addr));
31 31
32 virt_addr++; 32 virt_addr++;
33 } 33 }
diff --git a/arch/mips/include/asm/elf.h b/arch/mips/include/asm/elf.h
index eb4d95de619c..535f196ffe02 100644
--- a/arch/mips/include/asm/elf.h
+++ b/arch/mips/include/asm/elf.h
@@ -417,13 +417,15 @@ extern unsigned long arch_randomize_brk(struct mm_struct *mm);
417struct arch_elf_state { 417struct arch_elf_state {
418 int fp_abi; 418 int fp_abi;
419 int interp_fp_abi; 419 int interp_fp_abi;
420 int overall_abi; 420 int overall_fp_mode;
421}; 421};
422 422
423#define MIPS_ABI_FP_UNKNOWN (-1) /* Unknown FP ABI (kernel internal) */
424
423#define INIT_ARCH_ELF_STATE { \ 425#define INIT_ARCH_ELF_STATE { \
424 .fp_abi = -1, \ 426 .fp_abi = MIPS_ABI_FP_UNKNOWN, \
425 .interp_fp_abi = -1, \ 427 .interp_fp_abi = MIPS_ABI_FP_UNKNOWN, \
426 .overall_abi = -1, \ 428 .overall_fp_mode = -1, \
427} 429}
428 430
429extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf, 431extern int arch_elf_pt_proc(void *ehdr, void *phdr, struct file *elf,
diff --git a/arch/mips/include/asm/fpu.h b/arch/mips/include/asm/fpu.h
index affebb78f5d6..dd083e999b08 100644
--- a/arch/mips/include/asm/fpu.h
+++ b/arch/mips/include/asm/fpu.h
@@ -68,7 +68,8 @@ static inline int __enable_fpu(enum fpu_mode mode)
68 goto fr_common; 68 goto fr_common;
69 69
70 case FPU_64BIT: 70 case FPU_64BIT:
71#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_64BIT)) 71#if !(defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS32_R6) \
72 || defined(CONFIG_64BIT))
72 /* we only have a 32-bit FPU */ 73 /* we only have a 32-bit FPU */
73 return SIGFPE; 74 return SIGFPE;
74#endif 75#endif
diff --git a/arch/mips/include/asm/futex.h b/arch/mips/include/asm/futex.h
index ef9987a61d88..1de190bdfb9c 100644
--- a/arch/mips/include/asm/futex.h
+++ b/arch/mips/include/asm/futex.h
@@ -45,19 +45,19 @@
45 " "__UA_ADDR "\t2b, 4b \n" \ 45 " "__UA_ADDR "\t2b, 4b \n" \
46 " .previous \n" \ 46 " .previous \n" \
47 : "=r" (ret), "=&r" (oldval), \ 47 : "=r" (ret), "=&r" (oldval), \
48 "=" GCC_OFF12_ASM() (*uaddr) \ 48 "=" GCC_OFF_SMALL_ASM() (*uaddr) \
49 : "0" (0), GCC_OFF12_ASM() (*uaddr), "Jr" (oparg), \ 49 : "0" (0), GCC_OFF_SMALL_ASM() (*uaddr), "Jr" (oparg), \
50 "i" (-EFAULT) \ 50 "i" (-EFAULT) \
51 : "memory"); \ 51 : "memory"); \
52 } else if (cpu_has_llsc) { \ 52 } else if (cpu_has_llsc) { \
53 __asm__ __volatile__( \ 53 __asm__ __volatile__( \
54 " .set push \n" \ 54 " .set push \n" \
55 " .set noat \n" \ 55 " .set noat \n" \
56 " .set arch=r4000 \n" \ 56 " .set "MIPS_ISA_ARCH_LEVEL" \n" \
57 "1: "user_ll("%1", "%4")" # __futex_atomic_op\n" \ 57 "1: "user_ll("%1", "%4")" # __futex_atomic_op\n" \
58 " .set mips0 \n" \ 58 " .set mips0 \n" \
59 " " insn " \n" \ 59 " " insn " \n" \
60 " .set arch=r4000 \n" \ 60 " .set "MIPS_ISA_ARCH_LEVEL" \n" \
61 "2: "user_sc("$1", "%2")" \n" \ 61 "2: "user_sc("$1", "%2")" \n" \
62 " beqz $1, 1b \n" \ 62 " beqz $1, 1b \n" \
63 __WEAK_LLSC_MB \ 63 __WEAK_LLSC_MB \
@@ -74,8 +74,8 @@
74 " "__UA_ADDR "\t2b, 4b \n" \ 74 " "__UA_ADDR "\t2b, 4b \n" \
75 " .previous \n" \ 75 " .previous \n" \
76 : "=r" (ret), "=&r" (oldval), \ 76 : "=r" (ret), "=&r" (oldval), \
77 "=" GCC_OFF12_ASM() (*uaddr) \ 77 "=" GCC_OFF_SMALL_ASM() (*uaddr) \
78 : "0" (0), GCC_OFF12_ASM() (*uaddr), "Jr" (oparg), \ 78 : "0" (0), GCC_OFF_SMALL_ASM() (*uaddr), "Jr" (oparg), \
79 "i" (-EFAULT) \ 79 "i" (-EFAULT) \
80 : "memory"); \ 80 : "memory"); \
81 } else \ 81 } else \
@@ -174,8 +174,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
174 " "__UA_ADDR "\t1b, 4b \n" 174 " "__UA_ADDR "\t1b, 4b \n"
175 " "__UA_ADDR "\t2b, 4b \n" 175 " "__UA_ADDR "\t2b, 4b \n"
176 " .previous \n" 176 " .previous \n"
177 : "+r" (ret), "=&r" (val), "=" GCC_OFF12_ASM() (*uaddr) 177 : "+r" (ret), "=&r" (val), "=" GCC_OFF_SMALL_ASM() (*uaddr)
178 : GCC_OFF12_ASM() (*uaddr), "Jr" (oldval), "Jr" (newval), 178 : GCC_OFF_SMALL_ASM() (*uaddr), "Jr" (oldval), "Jr" (newval),
179 "i" (-EFAULT) 179 "i" (-EFAULT)
180 : "memory"); 180 : "memory");
181 } else if (cpu_has_llsc) { 181 } else if (cpu_has_llsc) {
@@ -183,12 +183,12 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
183 "# futex_atomic_cmpxchg_inatomic \n" 183 "# futex_atomic_cmpxchg_inatomic \n"
184 " .set push \n" 184 " .set push \n"
185 " .set noat \n" 185 " .set noat \n"
186 " .set arch=r4000 \n" 186 " .set "MIPS_ISA_ARCH_LEVEL" \n"
187 "1: "user_ll("%1", "%3")" \n" 187 "1: "user_ll("%1", "%3")" \n"
188 " bne %1, %z4, 3f \n" 188 " bne %1, %z4, 3f \n"
189 " .set mips0 \n" 189 " .set mips0 \n"
190 " move $1, %z5 \n" 190 " move $1, %z5 \n"
191 " .set arch=r4000 \n" 191 " .set "MIPS_ISA_ARCH_LEVEL" \n"
192 "2: "user_sc("$1", "%2")" \n" 192 "2: "user_sc("$1", "%2")" \n"
193 " beqz $1, 1b \n" 193 " beqz $1, 1b \n"
194 __WEAK_LLSC_MB 194 __WEAK_LLSC_MB
@@ -203,8 +203,8 @@ futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
203 " "__UA_ADDR "\t1b, 4b \n" 203 " "__UA_ADDR "\t1b, 4b \n"
204 " "__UA_ADDR "\t2b, 4b \n" 204 " "__UA_ADDR "\t2b, 4b \n"
205 " .previous \n" 205 " .previous \n"
206 : "+r" (ret), "=&r" (val), "=" GCC_OFF12_ASM() (*uaddr) 206 : "+r" (ret), "=&r" (val), "=" GCC_OFF_SMALL_ASM() (*uaddr)
207 : GCC_OFF12_ASM() (*uaddr), "Jr" (oldval), "Jr" (newval), 207 : GCC_OFF_SMALL_ASM() (*uaddr), "Jr" (oldval), "Jr" (newval),
208 "i" (-EFAULT) 208 "i" (-EFAULT)
209 : "memory"); 209 : "memory");
210 } else 210 } else
diff --git a/arch/mips/include/asm/gio_device.h b/arch/mips/include/asm/gio_device.h
index 4be1a57cdbb0..71a986e9b694 100644
--- a/arch/mips/include/asm/gio_device.h
+++ b/arch/mips/include/asm/gio_device.h
@@ -25,8 +25,6 @@ struct gio_driver {
25 25
26 int (*probe)(struct gio_device *, const struct gio_device_id *); 26 int (*probe)(struct gio_device *, const struct gio_device_id *);
27 void (*remove)(struct gio_device *); 27 void (*remove)(struct gio_device *);
28 int (*suspend)(struct gio_device *, pm_message_t);
29 int (*resume)(struct gio_device *);
30 void (*shutdown)(struct gio_device *); 28 void (*shutdown)(struct gio_device *);
31 29
32 struct device_driver driver; 30 struct device_driver driver;
diff --git a/arch/mips/include/asm/hazards.h b/arch/mips/include/asm/hazards.h
index e3ee92d4dbe7..4087b47ad1cb 100644
--- a/arch/mips/include/asm/hazards.h
+++ b/arch/mips/include/asm/hazards.h
@@ -11,6 +11,7 @@
11#define _ASM_HAZARDS_H 11#define _ASM_HAZARDS_H
12 12
13#include <linux/stringify.h> 13#include <linux/stringify.h>
14#include <asm/compiler.h>
14 15
15#define ___ssnop \ 16#define ___ssnop \
16 sll $0, $0, 1 17 sll $0, $0, 1
@@ -21,7 +22,7 @@
21/* 22/*
22 * TLB hazards 23 * TLB hazards
23 */ 24 */
24#if defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_CPU_CAVIUM_OCTEON) 25#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) && !defined(CONFIG_CPU_CAVIUM_OCTEON)
25 26
26/* 27/*
27 * MIPSR2 defines ehb for hazard avoidance 28 * MIPSR2 defines ehb for hazard avoidance
@@ -58,7 +59,7 @@ do { \
58 unsigned long tmp; \ 59 unsigned long tmp; \
59 \ 60 \
60 __asm__ __volatile__( \ 61 __asm__ __volatile__( \
61 " .set mips64r2 \n" \ 62 " .set "MIPS_ISA_LEVEL" \n" \
62 " dla %0, 1f \n" \ 63 " dla %0, 1f \n" \
63 " jr.hb %0 \n" \ 64 " jr.hb %0 \n" \
64 " .set mips0 \n" \ 65 " .set mips0 \n" \
@@ -132,7 +133,7 @@ do { \
132 133
133#define instruction_hazard() \ 134#define instruction_hazard() \
134do { \ 135do { \
135 if (cpu_has_mips_r2) \ 136 if (cpu_has_mips_r2_r6) \
136 __instruction_hazard(); \ 137 __instruction_hazard(); \
137} while (0) 138} while (0)
138 139
@@ -240,7 +241,7 @@ do { \
240 241
241#define __disable_fpu_hazard 242#define __disable_fpu_hazard
242 243
243#elif defined(CONFIG_CPU_MIPSR2) 244#elif defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
244 245
245#define __enable_fpu_hazard \ 246#define __enable_fpu_hazard \
246 ___ehb 247 ___ehb
diff --git a/arch/mips/include/asm/irqflags.h b/arch/mips/include/asm/irqflags.h
index 0fa5fdcd1f01..d60cc68fa31e 100644
--- a/arch/mips/include/asm/irqflags.h
+++ b/arch/mips/include/asm/irqflags.h
@@ -15,9 +15,10 @@
15 15
16#include <linux/compiler.h> 16#include <linux/compiler.h>
17#include <linux/stringify.h> 17#include <linux/stringify.h>
18#include <asm/compiler.h>
18#include <asm/hazards.h> 19#include <asm/hazards.h>
19 20
20#ifdef CONFIG_CPU_MIPSR2 21#if defined(CONFIG_CPU_MIPSR2) || defined (CONFIG_CPU_MIPSR6)
21 22
22static inline void arch_local_irq_disable(void) 23static inline void arch_local_irq_disable(void)
23{ 24{
@@ -118,7 +119,7 @@ void arch_local_irq_disable(void);
118unsigned long arch_local_irq_save(void); 119unsigned long arch_local_irq_save(void);
119void arch_local_irq_restore(unsigned long flags); 120void arch_local_irq_restore(unsigned long flags);
120void __arch_local_irq_restore(unsigned long flags); 121void __arch_local_irq_restore(unsigned long flags);
121#endif /* CONFIG_CPU_MIPSR2 */ 122#endif /* CONFIG_CPU_MIPSR2 || CONFIG_CPU_MIPSR6 */
122 123
123static inline void arch_local_irq_enable(void) 124static inline void arch_local_irq_enable(void)
124{ 125{
@@ -126,7 +127,7 @@ static inline void arch_local_irq_enable(void)
126 " .set push \n" 127 " .set push \n"
127 " .set reorder \n" 128 " .set reorder \n"
128 " .set noat \n" 129 " .set noat \n"
129#if defined(CONFIG_CPU_MIPSR2) 130#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6)
130 " ei \n" 131 " ei \n"
131#else 132#else
132 " mfc0 $1,$12 \n" 133 " mfc0 $1,$12 \n"
diff --git a/arch/mips/include/asm/local.h b/arch/mips/include/asm/local.h
index 46dfc3c1fd49..8feaed62a2ab 100644
--- a/arch/mips/include/asm/local.h
+++ b/arch/mips/include/asm/local.h
@@ -5,6 +5,7 @@
5#include <linux/bitops.h> 5#include <linux/bitops.h>
6#include <linux/atomic.h> 6#include <linux/atomic.h>
7#include <asm/cmpxchg.h> 7#include <asm/cmpxchg.h>
8#include <asm/compiler.h>
8#include <asm/war.h> 9#include <asm/war.h>
9 10
10typedef struct 11typedef struct
@@ -47,7 +48,7 @@ static __inline__ long local_add_return(long i, local_t * l)
47 unsigned long temp; 48 unsigned long temp;
48 49
49 __asm__ __volatile__( 50 __asm__ __volatile__(
50 " .set arch=r4000 \n" 51 " .set "MIPS_ISA_ARCH_LEVEL" \n"
51 "1:" __LL "%1, %2 # local_add_return \n" 52 "1:" __LL "%1, %2 # local_add_return \n"
52 " addu %0, %1, %3 \n" 53 " addu %0, %1, %3 \n"
53 __SC "%0, %2 \n" 54 __SC "%0, %2 \n"
@@ -92,7 +93,7 @@ static __inline__ long local_sub_return(long i, local_t * l)
92 unsigned long temp; 93 unsigned long temp;
93 94
94 __asm__ __volatile__( 95 __asm__ __volatile__(
95 " .set arch=r4000 \n" 96 " .set "MIPS_ISA_ARCH_LEVEL" \n"
96 "1:" __LL "%1, %2 # local_sub_return \n" 97 "1:" __LL "%1, %2 # local_sub_return \n"
97 " subu %0, %1, %3 \n" 98 " subu %0, %1, %3 \n"
98 __SC "%0, %2 \n" 99 __SC "%0, %2 \n"
diff --git a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
index 1668ee57acb9..cf92fe733995 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/kernel-entry-init.h
@@ -8,11 +8,10 @@
8#ifndef __ASM_MACH_CAVIUM_OCTEON_KERNEL_ENTRY_H 8#ifndef __ASM_MACH_CAVIUM_OCTEON_KERNEL_ENTRY_H
9#define __ASM_MACH_CAVIUM_OCTEON_KERNEL_ENTRY_H 9#define __ASM_MACH_CAVIUM_OCTEON_KERNEL_ENTRY_H
10 10
11
12#define CP0_CYCLE_COUNTER $9, 6
13#define CP0_CVMCTL_REG $9, 7 11#define CP0_CVMCTL_REG $9, 7
14#define CP0_CVMMEMCTL_REG $11,7 12#define CP0_CVMMEMCTL_REG $11,7
15#define CP0_PRID_REG $15, 0 13#define CP0_PRID_REG $15, 0
14#define CP0_DCACHE_ERR_REG $27, 1
16#define CP0_PRID_OCTEON_PASS1 0x000d0000 15#define CP0_PRID_OCTEON_PASS1 0x000d0000
17#define CP0_PRID_OCTEON_CN30XX 0x000d0200 16#define CP0_PRID_OCTEON_CN30XX 0x000d0200
18 17
@@ -38,36 +37,55 @@
38 # Needed for octeon specific memcpy 37 # Needed for octeon specific memcpy
39 or v0, v0, 0x5001 38 or v0, v0, 0x5001
40 xor v0, v0, 0x1001 39 xor v0, v0, 0x1001
41 # Read the processor ID register
42 mfc0 v1, CP0_PRID_REG
43 # Disable instruction prefetching (Octeon Pass1 errata)
44 or v0, v0, 0x2000
45 # Skip reenable of prefetching for Octeon Pass1
46 beq v1, CP0_PRID_OCTEON_PASS1, skip
47 nop
48 # Reenable instruction prefetching, not on Pass1
49 xor v0, v0, 0x2000
50 # Strip off pass number off of processor id
51 srl v1, 8
52 sll v1, 8
53 # CN30XX needs some extra stuff turned off for better performance
54 bne v1, CP0_PRID_OCTEON_CN30XX, skip
55 nop
56 # CN30XX Use random Icache replacement
57 or v0, v0, 0x400
58 # CN30XX Disable instruction prefetching
59 or v0, v0, 0x2000
60skip:
61 # First clear off CvmCtl[IPPCI] bit and move the performance 40 # First clear off CvmCtl[IPPCI] bit and move the performance
62 # counters interrupt to IRQ 6 41 # counters interrupt to IRQ 6
63 li v1, ~(7 << 7) 42 dli v1, ~(7 << 7)
64 and v0, v0, v1 43 and v0, v0, v1
65 ori v0, v0, (6 << 7) 44 ori v0, v0, (6 << 7)
45
46 mfc0 v1, CP0_PRID_REG
47 and t1, v1, 0xfff8
48 xor t1, t1, 0x9000 # 63-P1
49 beqz t1, 4f
50 and t1, v1, 0xfff8
51 xor t1, t1, 0x9008 # 63-P2
52 beqz t1, 4f
53 and t1, v1, 0xfff8
54 xor t1, t1, 0x9100 # 68-P1
55 beqz t1, 4f
56 and t1, v1, 0xff00
57 xor t1, t1, 0x9200 # 66-PX
58 bnez t1, 5f # Skip WAR for others.
59 and t1, v1, 0x00ff
60 slti t1, t1, 2 # 66-P1.2 and later good.
61 beqz t1, 5f
62
634: # core-16057 work around
64 or v0, v0, 0x2000 # Set IPREF bit.
65
665: # No core-16057 work around
66 # Write the cavium control register 67 # Write the cavium control register
67 dmtc0 v0, CP0_CVMCTL_REG 68 dmtc0 v0, CP0_CVMCTL_REG
68 sync 69 sync
69 # Flush dcache after config change 70 # Flush dcache after config change
70 cache 9, 0($0) 71 cache 9, 0($0)
72 # Zero all of CVMSEG to make sure parity is correct
73 dli v0, CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE
74 dsll v0, 7
75 beqz v0, 2f
761: dsubu v0, 8
77 sd $0, -32768(v0)
78 bnez v0, 1b
792:
80 mfc0 v0, CP0_PRID_REG
81 bbit0 v0, 15, 1f
82 # OCTEON II or better have bit 15 set. Clear the error bits.
83 and t1, v0, 0xff00
84 dli v0, 0x9500
85 bge t1, v0, 1f # OCTEON III has no DCACHE_ERR_REG COP0
86 dli v0, 0x27
87 dmtc0 v0, CP0_DCACHE_ERR_REG
881:
71 # Get my core id 89 # Get my core id
72 rdhwr v0, $0 90 rdhwr v0, $0
73 # Jump the master to kernel_entry 91 # Jump the master to kernel_entry
diff --git a/arch/mips/include/asm/mach-cavium-octeon/war.h b/arch/mips/include/asm/mach-cavium-octeon/war.h
index eb72b35cf04b..35c80be92207 100644
--- a/arch/mips/include/asm/mach-cavium-octeon/war.h
+++ b/arch/mips/include/asm/mach-cavium-octeon/war.h
@@ -22,4 +22,7 @@
22#define R10000_LLSC_WAR 0 22#define R10000_LLSC_WAR 0
23#define MIPS34K_MISSED_ITLB_WAR 0 23#define MIPS34K_MISSED_ITLB_WAR 0
24 24
25#define CAVIUM_OCTEON_DCACHE_PREFETCH_WAR \
26 OCTEON_IS_MODEL(OCTEON_CN6XXX)
27
25#endif /* __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H */ 28#endif /* __ASM_MIPS_MACH_CAVIUM_OCTEON_WAR_H */
diff --git a/arch/mips/include/asm/mach-pmcs-msp71xx/msp_regops.h b/arch/mips/include/asm/mach-pmcs-msp71xx/msp_regops.h
index 2e54b4bff5cf..90dbe43c8d27 100644
--- a/arch/mips/include/asm/mach-pmcs-msp71xx/msp_regops.h
+++ b/arch/mips/include/asm/mach-pmcs-msp71xx/msp_regops.h
@@ -85,8 +85,8 @@ static inline void set_value_reg32(volatile u32 *const addr,
85 " "__beqz"%0, 1b \n" 85 " "__beqz"%0, 1b \n"
86 " nop \n" 86 " nop \n"
87 " .set pop \n" 87 " .set pop \n"
88 : "=&r" (temp), "=" GCC_OFF12_ASM() (*addr) 88 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*addr)
89 : "ir" (~mask), "ir" (value), GCC_OFF12_ASM() (*addr)); 89 : "ir" (~mask), "ir" (value), GCC_OFF_SMALL_ASM() (*addr));
90} 90}
91 91
92/* 92/*
@@ -106,8 +106,8 @@ static inline void set_reg32(volatile u32 *const addr,
106 " "__beqz"%0, 1b \n" 106 " "__beqz"%0, 1b \n"
107 " nop \n" 107 " nop \n"
108 " .set pop \n" 108 " .set pop \n"
109 : "=&r" (temp), "=" GCC_OFF12_ASM() (*addr) 109 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*addr)
110 : "ir" (mask), GCC_OFF12_ASM() (*addr)); 110 : "ir" (mask), GCC_OFF_SMALL_ASM() (*addr));
111} 111}
112 112
113/* 113/*
@@ -127,8 +127,8 @@ static inline void clear_reg32(volatile u32 *const addr,
127 " "__beqz"%0, 1b \n" 127 " "__beqz"%0, 1b \n"
128 " nop \n" 128 " nop \n"
129 " .set pop \n" 129 " .set pop \n"
130 : "=&r" (temp), "=" GCC_OFF12_ASM() (*addr) 130 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*addr)
131 : "ir" (~mask), GCC_OFF12_ASM() (*addr)); 131 : "ir" (~mask), GCC_OFF_SMALL_ASM() (*addr));
132} 132}
133 133
134/* 134/*
@@ -148,8 +148,8 @@ static inline void toggle_reg32(volatile u32 *const addr,
148 " "__beqz"%0, 1b \n" 148 " "__beqz"%0, 1b \n"
149 " nop \n" 149 " nop \n"
150 " .set pop \n" 150 " .set pop \n"
151 : "=&r" (temp), "=" GCC_OFF12_ASM() (*addr) 151 : "=&r" (temp), "=" GCC_OFF_SMALL_ASM() (*addr)
152 : "ir" (mask), GCC_OFF12_ASM() (*addr)); 152 : "ir" (mask), GCC_OFF_SMALL_ASM() (*addr));
153} 153}
154 154
155/* 155/*
@@ -220,8 +220,8 @@ static inline u32 blocking_read_reg32(volatile u32 *const addr)
220 " .set arch=r4000 \n" \ 220 " .set arch=r4000 \n" \
221 "1: ll %0, %1 #custom_read_reg32 \n" \ 221 "1: ll %0, %1 #custom_read_reg32 \n" \
222 " .set pop \n" \ 222 " .set pop \n" \
223 : "=r" (tmp), "=" GCC_OFF12_ASM() (*address) \ 223 : "=r" (tmp), "=" GCC_OFF_SMALL_ASM() (*address) \
224 : GCC_OFF12_ASM() (*address)) 224 : GCC_OFF_SMALL_ASM() (*address))
225 225
226#define custom_write_reg32(address, tmp) \ 226#define custom_write_reg32(address, tmp) \
227 __asm__ __volatile__( \ 227 __asm__ __volatile__( \
@@ -231,7 +231,7 @@ static inline u32 blocking_read_reg32(volatile u32 *const addr)
231 " "__beqz"%0, 1b \n" \ 231 " "__beqz"%0, 1b \n" \
232 " nop \n" \ 232 " nop \n" \
233 " .set pop \n" \ 233 " .set pop \n" \
234 : "=&r" (tmp), "=" GCC_OFF12_ASM() (*address) \ 234 : "=&r" (tmp), "=" GCC_OFF_SMALL_ASM() (*address) \
235 : "0" (tmp), GCC_OFF12_ASM() (*address)) 235 : "0" (tmp), GCC_OFF_SMALL_ASM() (*address))
236 236
237#endif /* __ASM_REGOPS_H__ */ 237#endif /* __ASM_REGOPS_H__ */
diff --git a/arch/mips/include/asm/mips-r2-to-r6-emul.h b/arch/mips/include/asm/mips-r2-to-r6-emul.h
new file mode 100644
index 000000000000..60570f2c3ba2
--- /dev/null
+++ b/arch/mips/include/asm/mips-r2-to-r6-emul.h
@@ -0,0 +1,96 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (c) 2014 Imagination Technologies Ltd.
7 * Author: Markos Chandras <markos.chandras@imgtec.com>
8 */
9
10#ifndef __ASM_MIPS_R2_TO_R6_EMUL_H
11#define __ASM_MIPS_R2_TO_R6_EMUL_H
12
13struct mips_r2_emulator_stats {
14 u64 movs;
15 u64 hilo;
16 u64 muls;
17 u64 divs;
18 u64 dsps;
19 u64 bops;
20 u64 traps;
21 u64 fpus;
22 u64 loads;
23 u64 stores;
24 u64 llsc;
25 u64 dsemul;
26};
27
28struct mips_r2br_emulator_stats {
29 u64 jrs;
30 u64 bltzl;
31 u64 bgezl;
32 u64 bltzll;
33 u64 bgezll;
34 u64 bltzall;
35 u64 bgezall;
36 u64 bltzal;
37 u64 bgezal;
38 u64 beql;
39 u64 bnel;
40 u64 blezl;
41 u64 bgtzl;
42};
43
44#ifdef CONFIG_DEBUG_FS
45
46#define MIPS_R2_STATS(M) \
47do { \
48 u32 nir; \
49 int err; \
50 \
51 preempt_disable(); \
52 __this_cpu_inc(mipsr2emustats.M); \
53 err = __get_user(nir, (u32 __user *)regs->cp0_epc); \
54 if (!err) { \
55 if (nir == BREAK_MATH) \
56 __this_cpu_inc(mipsr2bdemustats.M); \
57 } \
58 preempt_enable(); \
59} while (0)
60
61#define MIPS_R2BR_STATS(M) \
62do { \
63 preempt_disable(); \
64 __this_cpu_inc(mipsr2bremustats.M); \
65 preempt_enable(); \
66} while (0)
67
68#else
69
70#define MIPS_R2_STATS(M) do { } while (0)
71#define MIPS_R2BR_STATS(M) do { } while (0)
72
73#endif /* CONFIG_DEBUG_FS */
74
75struct r2_decoder_table {
76 u32 mask;
77 u32 code;
78 int (*func)(struct pt_regs *regs, u32 inst);
79};
80
81
82extern void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
83 const char *str);
84
85#ifndef CONFIG_MIPSR2_TO_R6_EMULATOR
86static int mipsr2_emulation;
87static __maybe_unused int mipsr2_decoder(struct pt_regs *regs, u32 inst) { return 0; };
88#else
89/* MIPS R2 Emulator ON/OFF */
90extern int mipsr2_emulation;
91extern int mipsr2_decoder(struct pt_regs *regs, u32 inst);
92#endif /* CONFIG_MIPSR2_TO_R6_EMULATOR */
93
94#define NO_R6EMU (cpu_has_mips_r6 && !mipsr2_emulation)
95
96#endif /* __ASM_MIPS_R2_TO_R6_EMUL_H */
diff --git a/arch/mips/include/asm/mipsregs.h b/arch/mips/include/asm/mipsregs.h
index 5b720d8c2745..fef004434096 100644
--- a/arch/mips/include/asm/mipsregs.h
+++ b/arch/mips/include/asm/mipsregs.h
@@ -653,6 +653,7 @@
653#define MIPS_CONF5_NF (_ULCAST_(1) << 0) 653#define MIPS_CONF5_NF (_ULCAST_(1) << 0)
654#define MIPS_CONF5_UFR (_ULCAST_(1) << 2) 654#define MIPS_CONF5_UFR (_ULCAST_(1) << 2)
655#define MIPS_CONF5_MRP (_ULCAST_(1) << 3) 655#define MIPS_CONF5_MRP (_ULCAST_(1) << 3)
656#define MIPS_CONF5_LLB (_ULCAST_(1) << 4)
656#define MIPS_CONF5_MVH (_ULCAST_(1) << 5) 657#define MIPS_CONF5_MVH (_ULCAST_(1) << 5)
657#define MIPS_CONF5_FRE (_ULCAST_(1) << 8) 658#define MIPS_CONF5_FRE (_ULCAST_(1) << 8)
658#define MIPS_CONF5_UFE (_ULCAST_(1) << 9) 659#define MIPS_CONF5_UFE (_ULCAST_(1) << 9)
@@ -1127,6 +1128,8 @@ do { \
1127#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val) 1128#define write_c0_config6(val) __write_32bit_c0_register($16, 6, val)
1128#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val) 1129#define write_c0_config7(val) __write_32bit_c0_register($16, 7, val)
1129 1130
1131#define read_c0_lladdr() __read_ulong_c0_register($17, 0)
1132#define write_c0_lladdr(val) __write_ulong_c0_register($17, 0, val)
1130#define read_c0_maar() __read_ulong_c0_register($17, 1) 1133#define read_c0_maar() __read_ulong_c0_register($17, 1)
1131#define write_c0_maar(val) __write_ulong_c0_register($17, 1, val) 1134#define write_c0_maar(val) __write_ulong_c0_register($17, 1, val)
1132#define read_c0_maari() __read_32bit_c0_register($17, 2) 1135#define read_c0_maari() __read_32bit_c0_register($17, 2)
@@ -1909,6 +1912,7 @@ __BUILD_SET_C0(config5)
1909__BUILD_SET_C0(intcontrol) 1912__BUILD_SET_C0(intcontrol)
1910__BUILD_SET_C0(intctl) 1913__BUILD_SET_C0(intctl)
1911__BUILD_SET_C0(srsmap) 1914__BUILD_SET_C0(srsmap)
1915__BUILD_SET_C0(pagegrain)
1912__BUILD_SET_C0(brcm_config_0) 1916__BUILD_SET_C0(brcm_config_0)
1913__BUILD_SET_C0(brcm_bus_pll) 1917__BUILD_SET_C0(brcm_bus_pll)
1914__BUILD_SET_C0(brcm_reset) 1918__BUILD_SET_C0(brcm_reset)
diff --git a/arch/mips/include/asm/mmu.h b/arch/mips/include/asm/mmu.h
index c436138945a8..1afa1f986df8 100644
--- a/arch/mips/include/asm/mmu.h
+++ b/arch/mips/include/asm/mmu.h
@@ -1,9 +1,12 @@
1#ifndef __ASM_MMU_H 1#ifndef __ASM_MMU_H
2#define __ASM_MMU_H 2#define __ASM_MMU_H
3 3
4#include <linux/atomic.h>
5
4typedef struct { 6typedef struct {
5 unsigned long asid[NR_CPUS]; 7 unsigned long asid[NR_CPUS];
6 void *vdso; 8 void *vdso;
9 atomic_t fp_mode_switching;
7} mm_context_t; 10} mm_context_t;
8 11
9#endif /* __ASM_MMU_H */ 12#endif /* __ASM_MMU_H */
diff --git a/arch/mips/include/asm/mmu_context.h b/arch/mips/include/asm/mmu_context.h
index 2f82568a3ee4..45914b59824c 100644
--- a/arch/mips/include/asm/mmu_context.h
+++ b/arch/mips/include/asm/mmu_context.h
@@ -25,7 +25,6 @@ do { \
25 if (cpu_has_htw) { \ 25 if (cpu_has_htw) { \
26 write_c0_pwbase(pgd); \ 26 write_c0_pwbase(pgd); \
27 back_to_back_c0_hazard(); \ 27 back_to_back_c0_hazard(); \
28 htw_reset(); \
29 } \ 28 } \
30} while (0) 29} while (0)
31 30
@@ -132,6 +131,8 @@ init_new_context(struct task_struct *tsk, struct mm_struct *mm)
132 for_each_possible_cpu(i) 131 for_each_possible_cpu(i)
133 cpu_context(i, mm) = 0; 132 cpu_context(i, mm) = 0;
134 133
134 atomic_set(&mm->context.fp_mode_switching, 0);
135
135 return 0; 136 return 0;
136} 137}
137 138
@@ -142,6 +143,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
142 unsigned long flags; 143 unsigned long flags;
143 local_irq_save(flags); 144 local_irq_save(flags);
144 145
146 htw_stop();
145 /* Check if our ASID is of an older version and thus invalid */ 147 /* Check if our ASID is of an older version and thus invalid */
146 if ((cpu_context(cpu, next) ^ asid_cache(cpu)) & ASID_VERSION_MASK) 148 if ((cpu_context(cpu, next) ^ asid_cache(cpu)) & ASID_VERSION_MASK)
147 get_new_mmu_context(next, cpu); 149 get_new_mmu_context(next, cpu);
@@ -154,6 +156,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
154 */ 156 */
155 cpumask_clear_cpu(cpu, mm_cpumask(prev)); 157 cpumask_clear_cpu(cpu, mm_cpumask(prev));
156 cpumask_set_cpu(cpu, mm_cpumask(next)); 158 cpumask_set_cpu(cpu, mm_cpumask(next));
159 htw_start();
157 160
158 local_irq_restore(flags); 161 local_irq_restore(flags);
159} 162}
@@ -180,6 +183,7 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next)
180 183
181 local_irq_save(flags); 184 local_irq_save(flags);
182 185
186 htw_stop();
183 /* Unconditionally get a new ASID. */ 187 /* Unconditionally get a new ASID. */
184 get_new_mmu_context(next, cpu); 188 get_new_mmu_context(next, cpu);
185 189
@@ -189,6 +193,7 @@ activate_mm(struct mm_struct *prev, struct mm_struct *next)
189 /* mark mmu ownership change */ 193 /* mark mmu ownership change */
190 cpumask_clear_cpu(cpu, mm_cpumask(prev)); 194 cpumask_clear_cpu(cpu, mm_cpumask(prev));
191 cpumask_set_cpu(cpu, mm_cpumask(next)); 195 cpumask_set_cpu(cpu, mm_cpumask(next));
196 htw_start();
192 197
193 local_irq_restore(flags); 198 local_irq_restore(flags);
194} 199}
@@ -203,6 +208,7 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu)
203 unsigned long flags; 208 unsigned long flags;
204 209
205 local_irq_save(flags); 210 local_irq_save(flags);
211 htw_stop();
206 212
207 if (cpumask_test_cpu(cpu, mm_cpumask(mm))) { 213 if (cpumask_test_cpu(cpu, mm_cpumask(mm))) {
208 get_new_mmu_context(mm, cpu); 214 get_new_mmu_context(mm, cpu);
@@ -211,6 +217,7 @@ drop_mmu_context(struct mm_struct *mm, unsigned cpu)
211 /* will get a new context next time */ 217 /* will get a new context next time */
212 cpu_context(cpu, mm) = 0; 218 cpu_context(cpu, mm) = 0;
213 } 219 }
220 htw_start();
214 local_irq_restore(flags); 221 local_irq_restore(flags);
215} 222}
216 223
diff --git a/arch/mips/include/asm/module.h b/arch/mips/include/asm/module.h
index 800fe578dc99..0aaf9a01ea50 100644
--- a/arch/mips/include/asm/module.h
+++ b/arch/mips/include/asm/module.h
@@ -88,10 +88,14 @@ search_module_dbetables(unsigned long addr)
88#define MODULE_PROC_FAMILY "MIPS32_R1 " 88#define MODULE_PROC_FAMILY "MIPS32_R1 "
89#elif defined CONFIG_CPU_MIPS32_R2 89#elif defined CONFIG_CPU_MIPS32_R2
90#define MODULE_PROC_FAMILY "MIPS32_R2 " 90#define MODULE_PROC_FAMILY "MIPS32_R2 "
91#elif defined CONFIG_CPU_MIPS32_R6
92#define MODULE_PROC_FAMILY "MIPS32_R6 "
91#elif defined CONFIG_CPU_MIPS64_R1 93#elif defined CONFIG_CPU_MIPS64_R1
92#define MODULE_PROC_FAMILY "MIPS64_R1 " 94#define MODULE_PROC_FAMILY "MIPS64_R1 "
93#elif defined CONFIG_CPU_MIPS64_R2 95#elif defined CONFIG_CPU_MIPS64_R2
94#define MODULE_PROC_FAMILY "MIPS64_R2 " 96#define MODULE_PROC_FAMILY "MIPS64_R2 "
97#elif defined CONFIG_CPU_MIPS64_R6
98#define MODULE_PROC_FAMILY "MIPS64_R6 "
95#elif defined CONFIG_CPU_R3000 99#elif defined CONFIG_CPU_R3000
96#define MODULE_PROC_FAMILY "R3000 " 100#define MODULE_PROC_FAMILY "R3000 "
97#elif defined CONFIG_CPU_TX39XX 101#elif defined CONFIG_CPU_TX39XX
diff --git a/arch/mips/include/asm/octeon/cvmx-cmd-queue.h b/arch/mips/include/asm/octeon/cvmx-cmd-queue.h
index 75739c83f07e..8d05d9069823 100644
--- a/arch/mips/include/asm/octeon/cvmx-cmd-queue.h
+++ b/arch/mips/include/asm/octeon/cvmx-cmd-queue.h
@@ -275,7 +275,7 @@ static inline void __cvmx_cmd_queue_lock(cvmx_cmd_queue_id_t queue_id,
275 " lbu %[ticket], %[now_serving]\n" 275 " lbu %[ticket], %[now_serving]\n"
276 "4:\n" 276 "4:\n"
277 ".set pop\n" : 277 ".set pop\n" :
278 [ticket_ptr] "=" GCC_OFF12_ASM()(__cvmx_cmd_queue_state_ptr->ticket[__cvmx_cmd_queue_get_index(queue_id)]), 278 [ticket_ptr] "=" GCC_OFF_SMALL_ASM()(__cvmx_cmd_queue_state_ptr->ticket[__cvmx_cmd_queue_get_index(queue_id)]),
279 [now_serving] "=m"(qptr->now_serving), [ticket] "=r"(tmp), 279 [now_serving] "=m"(qptr->now_serving), [ticket] "=r"(tmp),
280 [my_ticket] "=r"(my_ticket) 280 [my_ticket] "=r"(my_ticket)
281 ); 281 );
diff --git a/arch/mips/include/asm/octeon/cvmx-rst-defs.h b/arch/mips/include/asm/octeon/cvmx-rst-defs.h
new file mode 100644
index 000000000000..0c9c3e74d4ae
--- /dev/null
+++ b/arch/mips/include/asm/octeon/cvmx-rst-defs.h
@@ -0,0 +1,306 @@
1/***********************license start***************
2 * Author: Cavium Inc.
3 *
4 * Contact: support@cavium.com
5 * This file is part of the OCTEON SDK
6 *
7 * Copyright (c) 2003-2014 Cavium Inc.
8 *
9 * This file is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License, Version 2, as
11 * published by the Free Software Foundation.
12 *
13 * This file is distributed in the hope that it will be useful, but
14 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
15 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
16 * NONINFRINGEMENT. See the GNU General Public License for more
17 * details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this file; if not, write to the Free Software
21 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
22 * or visit http://www.gnu.org/licenses/.
23 *
24 * This file may also be available under a different license from Cavium.
25 * Contact Cavium Inc. for more information
26 ***********************license end**************************************/
27
28#ifndef __CVMX_RST_DEFS_H__
29#define __CVMX_RST_DEFS_H__
30
31#define CVMX_RST_BOOT (CVMX_ADD_IO_SEG(0x0001180006001600ull))
32#define CVMX_RST_CFG (CVMX_ADD_IO_SEG(0x0001180006001610ull))
33#define CVMX_RST_CKILL (CVMX_ADD_IO_SEG(0x0001180006001638ull))
34#define CVMX_RST_CTLX(offset) (CVMX_ADD_IO_SEG(0x0001180006001640ull) + ((offset) & 3) * 8)
35#define CVMX_RST_DELAY (CVMX_ADD_IO_SEG(0x0001180006001608ull))
36#define CVMX_RST_ECO (CVMX_ADD_IO_SEG(0x00011800060017B8ull))
37#define CVMX_RST_INT (CVMX_ADD_IO_SEG(0x0001180006001628ull))
38#define CVMX_RST_OCX (CVMX_ADD_IO_SEG(0x0001180006001618ull))
39#define CVMX_RST_POWER_DBG (CVMX_ADD_IO_SEG(0x0001180006001708ull))
40#define CVMX_RST_PP_POWER (CVMX_ADD_IO_SEG(0x0001180006001700ull))
41#define CVMX_RST_SOFT_PRSTX(offset) (CVMX_ADD_IO_SEG(0x00011800060016C0ull) + ((offset) & 3) * 8)
42#define CVMX_RST_SOFT_RST (CVMX_ADD_IO_SEG(0x0001180006001680ull))
43
44union cvmx_rst_boot {
45 uint64_t u64;
46 struct cvmx_rst_boot_s {
47#ifdef __BIG_ENDIAN_BITFIELD
48 uint64_t chipkill:1;
49 uint64_t jtcsrdis:1;
50 uint64_t ejtagdis:1;
51 uint64_t romen:1;
52 uint64_t ckill_ppdis:1;
53 uint64_t jt_tstmode:1;
54 uint64_t vrm_err:1;
55 uint64_t reserved_37_56:20;
56 uint64_t c_mul:7;
57 uint64_t pnr_mul:6;
58 uint64_t reserved_21_23:3;
59 uint64_t lboot_oci:3;
60 uint64_t lboot_ext:6;
61 uint64_t lboot:10;
62 uint64_t rboot:1;
63 uint64_t rboot_pin:1;
64#else
65 uint64_t rboot_pin:1;
66 uint64_t rboot:1;
67 uint64_t lboot:10;
68 uint64_t lboot_ext:6;
69 uint64_t lboot_oci:3;
70 uint64_t reserved_21_23:3;
71 uint64_t pnr_mul:6;
72 uint64_t c_mul:7;
73 uint64_t reserved_37_56:20;
74 uint64_t vrm_err:1;
75 uint64_t jt_tstmode:1;
76 uint64_t ckill_ppdis:1;
77 uint64_t romen:1;
78 uint64_t ejtagdis:1;
79 uint64_t jtcsrdis:1;
80 uint64_t chipkill:1;
81#endif
82 } s;
83 struct cvmx_rst_boot_s cn70xx;
84 struct cvmx_rst_boot_s cn70xxp1;
85 struct cvmx_rst_boot_s cn78xx;
86};
87
88union cvmx_rst_cfg {
89 uint64_t u64;
90 struct cvmx_rst_cfg_s {
91#ifdef __BIG_ENDIAN_BITFIELD
92 uint64_t bist_delay:58;
93 uint64_t reserved_3_5:3;
94 uint64_t cntl_clr_bist:1;
95 uint64_t warm_clr_bist:1;
96 uint64_t soft_clr_bist:1;
97#else
98 uint64_t soft_clr_bist:1;
99 uint64_t warm_clr_bist:1;
100 uint64_t cntl_clr_bist:1;
101 uint64_t reserved_3_5:3;
102 uint64_t bist_delay:58;
103#endif
104 } s;
105 struct cvmx_rst_cfg_s cn70xx;
106 struct cvmx_rst_cfg_s cn70xxp1;
107 struct cvmx_rst_cfg_s cn78xx;
108};
109
110union cvmx_rst_ckill {
111 uint64_t u64;
112 struct cvmx_rst_ckill_s {
113#ifdef __BIG_ENDIAN_BITFIELD
114 uint64_t reserved_47_63:17;
115 uint64_t timer:47;
116#else
117 uint64_t timer:47;
118 uint64_t reserved_47_63:17;
119#endif
120 } s;
121 struct cvmx_rst_ckill_s cn70xx;
122 struct cvmx_rst_ckill_s cn70xxp1;
123 struct cvmx_rst_ckill_s cn78xx;
124};
125
126union cvmx_rst_ctlx {
127 uint64_t u64;
128 struct cvmx_rst_ctlx_s {
129#ifdef __BIG_ENDIAN_BITFIELD
130 uint64_t reserved_10_63:54;
131 uint64_t prst_link:1;
132 uint64_t rst_done:1;
133 uint64_t rst_link:1;
134 uint64_t host_mode:1;
135 uint64_t reserved_4_5:2;
136 uint64_t rst_drv:1;
137 uint64_t rst_rcv:1;
138 uint64_t rst_chip:1;
139 uint64_t rst_val:1;
140#else
141 uint64_t rst_val:1;
142 uint64_t rst_chip:1;
143 uint64_t rst_rcv:1;
144 uint64_t rst_drv:1;
145 uint64_t reserved_4_5:2;
146 uint64_t host_mode:1;
147 uint64_t rst_link:1;
148 uint64_t rst_done:1;
149 uint64_t prst_link:1;
150 uint64_t reserved_10_63:54;
151#endif
152 } s;
153 struct cvmx_rst_ctlx_s cn70xx;
154 struct cvmx_rst_ctlx_s cn70xxp1;
155 struct cvmx_rst_ctlx_s cn78xx;
156};
157
158union cvmx_rst_delay {
159 uint64_t u64;
160 struct cvmx_rst_delay_s {
161#ifdef __BIG_ENDIAN_BITFIELD
162 uint64_t reserved_32_63:32;
163 uint64_t warm_rst_dly:16;
164 uint64_t soft_rst_dly:16;
165#else
166 uint64_t soft_rst_dly:16;
167 uint64_t warm_rst_dly:16;
168 uint64_t reserved_32_63:32;
169#endif
170 } s;
171 struct cvmx_rst_delay_s cn70xx;
172 struct cvmx_rst_delay_s cn70xxp1;
173 struct cvmx_rst_delay_s cn78xx;
174};
175
176union cvmx_rst_eco {
177 uint64_t u64;
178 struct cvmx_rst_eco_s {
179#ifdef __BIG_ENDIAN_BITFIELD
180 uint64_t reserved_32_63:32;
181 uint64_t eco_rw:32;
182#else
183 uint64_t eco_rw:32;
184 uint64_t reserved_32_63:32;
185#endif
186 } s;
187 struct cvmx_rst_eco_s cn78xx;
188};
189
190union cvmx_rst_int {
191 uint64_t u64;
192 struct cvmx_rst_int_s {
193#ifdef __BIG_ENDIAN_BITFIELD
194 uint64_t reserved_12_63:52;
195 uint64_t perst:4;
196 uint64_t reserved_4_7:4;
197 uint64_t rst_link:4;
198#else
199 uint64_t rst_link:4;
200 uint64_t reserved_4_7:4;
201 uint64_t perst:4;
202 uint64_t reserved_12_63:52;
203#endif
204 } s;
205 struct cvmx_rst_int_cn70xx {
206#ifdef __BIG_ENDIAN_BITFIELD
207 uint64_t reserved_11_63:53;
208 uint64_t perst:3;
209 uint64_t reserved_3_7:5;
210 uint64_t rst_link:3;
211#else
212 uint64_t rst_link:3;
213 uint64_t reserved_3_7:5;
214 uint64_t perst:3;
215 uint64_t reserved_11_63:53;
216#endif
217 } cn70xx;
218 struct cvmx_rst_int_cn70xx cn70xxp1;
219 struct cvmx_rst_int_s cn78xx;
220};
221
222union cvmx_rst_ocx {
223 uint64_t u64;
224 struct cvmx_rst_ocx_s {
225#ifdef __BIG_ENDIAN_BITFIELD
226 uint64_t reserved_3_63:61;
227 uint64_t rst_link:3;
228#else
229 uint64_t rst_link:3;
230 uint64_t reserved_3_63:61;
231#endif
232 } s;
233 struct cvmx_rst_ocx_s cn78xx;
234};
235
236union cvmx_rst_power_dbg {
237 uint64_t u64;
238 struct cvmx_rst_power_dbg_s {
239#ifdef __BIG_ENDIAN_BITFIELD
240 uint64_t reserved_3_63:61;
241 uint64_t str:3;
242#else
243 uint64_t str:3;
244 uint64_t reserved_3_63:61;
245#endif
246 } s;
247 struct cvmx_rst_power_dbg_s cn78xx;
248};
249
250union cvmx_rst_pp_power {
251 uint64_t u64;
252 struct cvmx_rst_pp_power_s {
253#ifdef __BIG_ENDIAN_BITFIELD
254 uint64_t reserved_48_63:16;
255 uint64_t gate:48;
256#else
257 uint64_t gate:48;
258 uint64_t reserved_48_63:16;
259#endif
260 } s;
261 struct cvmx_rst_pp_power_cn70xx {
262#ifdef __BIG_ENDIAN_BITFIELD
263 uint64_t reserved_4_63:60;
264 uint64_t gate:4;
265#else
266 uint64_t gate:4;
267 uint64_t reserved_4_63:60;
268#endif
269 } cn70xx;
270 struct cvmx_rst_pp_power_cn70xx cn70xxp1;
271 struct cvmx_rst_pp_power_s cn78xx;
272};
273
274union cvmx_rst_soft_prstx {
275 uint64_t u64;
276 struct cvmx_rst_soft_prstx_s {
277#ifdef __BIG_ENDIAN_BITFIELD
278 uint64_t reserved_1_63:63;
279 uint64_t soft_prst:1;
280#else
281 uint64_t soft_prst:1;
282 uint64_t reserved_1_63:63;
283#endif
284 } s;
285 struct cvmx_rst_soft_prstx_s cn70xx;
286 struct cvmx_rst_soft_prstx_s cn70xxp1;
287 struct cvmx_rst_soft_prstx_s cn78xx;
288};
289
290union cvmx_rst_soft_rst {
291 uint64_t u64;
292 struct cvmx_rst_soft_rst_s {
293#ifdef __BIG_ENDIAN_BITFIELD
294 uint64_t reserved_1_63:63;
295 uint64_t soft_rst:1;
296#else
297 uint64_t soft_rst:1;
298 uint64_t reserved_1_63:63;
299#endif
300 } s;
301 struct cvmx_rst_soft_rst_s cn70xx;
302 struct cvmx_rst_soft_rst_s cn70xxp1;
303 struct cvmx_rst_soft_rst_s cn78xx;
304};
305
306#endif
diff --git a/arch/mips/include/asm/octeon/octeon-model.h b/arch/mips/include/asm/octeon/octeon-model.h
index e8a1c2fd52cd..92b377e36dac 100644
--- a/arch/mips/include/asm/octeon/octeon-model.h
+++ b/arch/mips/include/asm/octeon/octeon-model.h
@@ -45,6 +45,7 @@
45 */ 45 */
46 46
47#define OCTEON_FAMILY_MASK 0x00ffff00 47#define OCTEON_FAMILY_MASK 0x00ffff00
48#define OCTEON_PRID_MASK 0x00ffffff
48 49
49/* Flag bits in top byte */ 50/* Flag bits in top byte */
50/* Ignores revision in model checks */ 51/* Ignores revision in model checks */
@@ -63,11 +64,52 @@
63#define OM_MATCH_6XXX_FAMILY_MODELS 0x40000000 64#define OM_MATCH_6XXX_FAMILY_MODELS 0x40000000
64/* Match all cnf7XXX Octeon models. */ 65/* Match all cnf7XXX Octeon models. */
65#define OM_MATCH_F7XXX_FAMILY_MODELS 0x80000000 66#define OM_MATCH_F7XXX_FAMILY_MODELS 0x80000000
67/* Match all cn7XXX Octeon models. */
68#define OM_MATCH_7XXX_FAMILY_MODELS 0x10000000
69#define OM_MATCH_FAMILY_MODELS (OM_MATCH_5XXX_FAMILY_MODELS | \
70 OM_MATCH_6XXX_FAMILY_MODELS | \
71 OM_MATCH_F7XXX_FAMILY_MODELS | \
72 OM_MATCH_7XXX_FAMILY_MODELS)
73/*
74 * CN7XXX models with new revision encoding
75 */
76
77#define OCTEON_CN73XX_PASS1_0 0x000d9700
78#define OCTEON_CN73XX (OCTEON_CN73XX_PASS1_0 | OM_IGNORE_REVISION)
79#define OCTEON_CN73XX_PASS1_X (OCTEON_CN73XX_PASS1_0 | \
80 OM_IGNORE_MINOR_REVISION)
81
82#define OCTEON_CN70XX_PASS1_0 0x000d9600
83#define OCTEON_CN70XX_PASS1_1 0x000d9601
84#define OCTEON_CN70XX_PASS1_2 0x000d9602
85
86#define OCTEON_CN70XX_PASS2_0 0x000d9608
87
88#define OCTEON_CN70XX (OCTEON_CN70XX_PASS1_0 | OM_IGNORE_REVISION)
89#define OCTEON_CN70XX_PASS1_X (OCTEON_CN70XX_PASS1_0 | \
90 OM_IGNORE_MINOR_REVISION)
91#define OCTEON_CN70XX_PASS2_X (OCTEON_CN70XX_PASS2_0 | \
92 OM_IGNORE_MINOR_REVISION)
93
94#define OCTEON_CN71XX OCTEON_CN70XX
95
96#define OCTEON_CN78XX_PASS1_0 0x000d9500
97#define OCTEON_CN78XX_PASS1_1 0x000d9501
98#define OCTEON_CN78XX_PASS2_0 0x000d9508
99
100#define OCTEON_CN78XX (OCTEON_CN78XX_PASS1_0 | OM_IGNORE_REVISION)
101#define OCTEON_CN78XX_PASS1_X (OCTEON_CN78XX_PASS1_0 | \
102 OM_IGNORE_MINOR_REVISION)
103#define OCTEON_CN78XX_PASS2_X (OCTEON_CN78XX_PASS2_0 | \
104 OM_IGNORE_MINOR_REVISION)
105
106#define OCTEON_CN76XX (0x000d9540 | OM_CHECK_SUBMODEL)
66 107
67/* 108/*
68 * CNF7XXX models with new revision encoding 109 * CNF7XXX models with new revision encoding
69 */ 110 */
70#define OCTEON_CNF71XX_PASS1_0 0x000d9400 111#define OCTEON_CNF71XX_PASS1_0 0x000d9400
112#define OCTEON_CNF71XX_PASS1_1 0x000d9401
71 113
72#define OCTEON_CNF71XX (OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_REVISION) 114#define OCTEON_CNF71XX (OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_REVISION)
73#define OCTEON_CNF71XX_PASS1_X (OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_MINOR_REVISION) 115#define OCTEON_CNF71XX_PASS1_X (OCTEON_CNF71XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
@@ -79,6 +121,8 @@
79#define OCTEON_CN68XX_PASS1_1 0x000d9101 121#define OCTEON_CN68XX_PASS1_1 0x000d9101
80#define OCTEON_CN68XX_PASS1_2 0x000d9102 122#define OCTEON_CN68XX_PASS1_2 0x000d9102
81#define OCTEON_CN68XX_PASS2_0 0x000d9108 123#define OCTEON_CN68XX_PASS2_0 0x000d9108
124#define OCTEON_CN68XX_PASS2_1 0x000d9109
125#define OCTEON_CN68XX_PASS2_2 0x000d910a
82 126
83#define OCTEON_CN68XX (OCTEON_CN68XX_PASS2_0 | OM_IGNORE_REVISION) 127#define OCTEON_CN68XX (OCTEON_CN68XX_PASS2_0 | OM_IGNORE_REVISION)
84#define OCTEON_CN68XX_PASS1_X (OCTEON_CN68XX_PASS1_0 | OM_IGNORE_MINOR_REVISION) 128#define OCTEON_CN68XX_PASS1_X (OCTEON_CN68XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
@@ -104,11 +148,18 @@
104#define OCTEON_CN63XX_PASS1_X (OCTEON_CN63XX_PASS1_0 | OM_IGNORE_MINOR_REVISION) 148#define OCTEON_CN63XX_PASS1_X (OCTEON_CN63XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
105#define OCTEON_CN63XX_PASS2_X (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_MINOR_REVISION) 149#define OCTEON_CN63XX_PASS2_X (OCTEON_CN63XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
106 150
151/* CN62XX is same as CN63XX with 1 MB cache */
152#define OCTEON_CN62XX OCTEON_CN63XX
153
107#define OCTEON_CN61XX_PASS1_0 0x000d9300 154#define OCTEON_CN61XX_PASS1_0 0x000d9300
155#define OCTEON_CN61XX_PASS1_1 0x000d9301
108 156
109#define OCTEON_CN61XX (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_REVISION) 157#define OCTEON_CN61XX (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_REVISION)
110#define OCTEON_CN61XX_PASS1_X (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_MINOR_REVISION) 158#define OCTEON_CN61XX_PASS1_X (OCTEON_CN61XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
111 159
160/* CN60XX is same as CN61XX with 512 KB cache */
161#define OCTEON_CN60XX OCTEON_CN61XX
162
112/* 163/*
113 * CN5XXX models with new revision encoding 164 * CN5XXX models with new revision encoding
114 */ 165 */
@@ -120,7 +171,7 @@
120#define OCTEON_CN58XX_PASS2_2 0x000d030a 171#define OCTEON_CN58XX_PASS2_2 0x000d030a
121#define OCTEON_CN58XX_PASS2_3 0x000d030b 172#define OCTEON_CN58XX_PASS2_3 0x000d030b
122 173
123#define OCTEON_CN58XX (OCTEON_CN58XX_PASS1_0 | OM_IGNORE_REVISION) 174#define OCTEON_CN58XX (OCTEON_CN58XX_PASS2_0 | OM_IGNORE_REVISION)
124#define OCTEON_CN58XX_PASS1_X (OCTEON_CN58XX_PASS1_0 | OM_IGNORE_MINOR_REVISION) 175#define OCTEON_CN58XX_PASS1_X (OCTEON_CN58XX_PASS1_0 | OM_IGNORE_MINOR_REVISION)
125#define OCTEON_CN58XX_PASS2_X (OCTEON_CN58XX_PASS2_0 | OM_IGNORE_MINOR_REVISION) 176#define OCTEON_CN58XX_PASS2_X (OCTEON_CN58XX_PASS2_0 | OM_IGNORE_MINOR_REVISION)
126#define OCTEON_CN58XX_PASS1 OCTEON_CN58XX_PASS1_X 177#define OCTEON_CN58XX_PASS1 OCTEON_CN58XX_PASS1_X
@@ -217,12 +268,10 @@
217#define OCTEON_CN3XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_PREVIOUS_MODELS | OM_IGNORE_REVISION) 268#define OCTEON_CN3XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_PREVIOUS_MODELS | OM_IGNORE_REVISION)
218#define OCTEON_CN5XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_5XXX_FAMILY_MODELS) 269#define OCTEON_CN5XXX (OCTEON_CN58XX_PASS1_0 | OM_MATCH_5XXX_FAMILY_MODELS)
219#define OCTEON_CN6XXX (OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS) 270#define OCTEON_CN6XXX (OCTEON_CN63XX_PASS1_0 | OM_MATCH_6XXX_FAMILY_MODELS)
220 271#define OCTEON_CNF7XXX (OCTEON_CNF71XX_PASS1_0 | \
221/* These are used to cover entire families of OCTEON processors */ 272 OM_MATCH_F7XXX_FAMILY_MODELS)
222#define OCTEON_FAM_1 (OCTEON_CN3XXX) 273#define OCTEON_CN7XXX (OCTEON_CN78XX_PASS1_0 | \
223#define OCTEON_FAM_PLUS (OCTEON_CN5XXX) 274 OM_MATCH_7XXX_FAMILY_MODELS)
224#define OCTEON_FAM_1_PLUS (OCTEON_FAM_PLUS | OM_MATCH_PREVIOUS_MODELS)
225#define OCTEON_FAM_2 (OCTEON_CN6XXX)
226 275
227/* The revision byte (low byte) has two different encodings. 276/* The revision byte (low byte) has two different encodings.
228 * CN3XXX: 277 * CN3XXX:
@@ -232,7 +281,7 @@
232 * <4>: alternate package 281 * <4>: alternate package
233 * <3:0>: revision 282 * <3:0>: revision
234 * 283 *
235 * CN5XXX: 284 * CN5XXX and older models:
236 * 285 *
237 * bits 286 * bits
238 * <7>: reserved (0) 287 * <7>: reserved (0)
@@ -251,17 +300,21 @@
251/* CN5XXX and later use different layout of bits in the revision ID field */ 300/* CN5XXX and later use different layout of bits in the revision ID field */
252#define OCTEON_58XX_FAMILY_MASK OCTEON_38XX_FAMILY_MASK 301#define OCTEON_58XX_FAMILY_MASK OCTEON_38XX_FAMILY_MASK
253#define OCTEON_58XX_FAMILY_REV_MASK 0x00ffff3f 302#define OCTEON_58XX_FAMILY_REV_MASK 0x00ffff3f
254#define OCTEON_58XX_MODEL_MASK 0x00ffffc0 303#define OCTEON_58XX_MODEL_MASK 0x00ffff40
255#define OCTEON_58XX_MODEL_REV_MASK (OCTEON_58XX_FAMILY_REV_MASK | OCTEON_58XX_MODEL_MASK) 304#define OCTEON_58XX_MODEL_REV_MASK (OCTEON_58XX_FAMILY_REV_MASK | OCTEON_58XX_MODEL_MASK)
256#define OCTEON_58XX_MODEL_MINOR_REV_MASK (OCTEON_58XX_MODEL_REV_MASK & 0x00fffff8) 305#define OCTEON_58XX_MODEL_MINOR_REV_MASK (OCTEON_58XX_MODEL_REV_MASK & 0x00ffff38)
257#define OCTEON_5XXX_MODEL_MASK 0x00ff0fc0 306#define OCTEON_5XXX_MODEL_MASK 0x00ff0fc0
258 307
259/* forward declarations */
260static inline uint32_t cvmx_get_proc_id(void) __attribute__ ((pure)); 308static inline uint32_t cvmx_get_proc_id(void) __attribute__ ((pure));
261static inline uint64_t cvmx_read_csr(uint64_t csr_addr); 309static inline uint64_t cvmx_read_csr(uint64_t csr_addr);
262 310
263#define __OCTEON_MATCH_MASK__(x, y, z) (((x) & (z)) == ((y) & (z))) 311#define __OCTEON_MATCH_MASK__(x, y, z) (((x) & (z)) == ((y) & (z)))
264 312
313/*
314 * __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model)
315 * returns true if chip_model is identical or belong to the OCTEON
316 * model group specified in arg_model.
317 */
265/* NOTE: This for internal use only! */ 318/* NOTE: This for internal use only! */
266#define __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model) \ 319#define __OCTEON_IS_MODEL_COMPILE__(arg_model, chip_model) \
267((((arg_model & OCTEON_38XX_FAMILY_MASK) < OCTEON_CN58XX_PASS1_0) && ( \ 320((((arg_model & OCTEON_38XX_FAMILY_MASK) < OCTEON_CN58XX_PASS1_0) && ( \
@@ -286,11 +339,18 @@ static inline uint64_t cvmx_read_csr(uint64_t csr_addr);
286 ((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \ 339 ((((arg_model) & (OM_FLAG_MASK)) == OM_IGNORE_REVISION) \
287 && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_MASK)) || \ 340 && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_FAMILY_MASK)) || \
288 ((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL) \ 341 ((((arg_model) & (OM_FLAG_MASK)) == OM_CHECK_SUBMODEL) \
289 && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_REV_MASK)) || \ 342 && __OCTEON_MATCH_MASK__((chip_model), (arg_model), OCTEON_58XX_MODEL_MASK)) || \
290 ((((arg_model) & (OM_MATCH_5XXX_FAMILY_MODELS)) == OM_MATCH_5XXX_FAMILY_MODELS) \ 343 ((((arg_model) & (OM_MATCH_5XXX_FAMILY_MODELS)) == OM_MATCH_5XXX_FAMILY_MODELS) \
291 && ((chip_model) >= OCTEON_CN58XX_PASS1_0) && ((chip_model) < OCTEON_CN63XX_PASS1_0)) || \ 344 && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN58XX_PASS1_0) \
345 && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN63XX_PASS1_0)) || \
292 ((((arg_model) & (OM_MATCH_6XXX_FAMILY_MODELS)) == OM_MATCH_6XXX_FAMILY_MODELS) \ 346 ((((arg_model) & (OM_MATCH_6XXX_FAMILY_MODELS)) == OM_MATCH_6XXX_FAMILY_MODELS) \
293 && ((chip_model) >= OCTEON_CN63XX_PASS1_0)) || \ 347 && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN63XX_PASS1_0) \
348 && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CNF71XX_PASS1_0)) || \
349 ((((arg_model) & (OM_MATCH_F7XXX_FAMILY_MODELS)) == OM_MATCH_F7XXX_FAMILY_MODELS) \
350 && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CNF71XX_PASS1_0) \
351 && ((chip_model & OCTEON_PRID_MASK) < OCTEON_CN78XX_PASS1_0)) || \
352 ((((arg_model) & (OM_MATCH_7XXX_FAMILY_MODELS)) == OM_MATCH_7XXX_FAMILY_MODELS) \
353 && ((chip_model & OCTEON_PRID_MASK) >= OCTEON_CN78XX_PASS1_0)) || \
294 ((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \ 354 ((((arg_model) & (OM_MATCH_PREVIOUS_MODELS)) == OM_MATCH_PREVIOUS_MODELS) \
295 && (((chip_model) & OCTEON_58XX_MODEL_MASK) < ((arg_model) & OCTEON_58XX_MODEL_MASK))) \ 355 && (((chip_model) & OCTEON_58XX_MODEL_MASK) < ((arg_model) & OCTEON_58XX_MODEL_MASK))) \
296 ))) 356 )))
@@ -300,14 +360,6 @@ static inline int __octeon_is_model_runtime__(uint32_t model)
300{ 360{
301 uint32_t cpuid = cvmx_get_proc_id(); 361 uint32_t cpuid = cvmx_get_proc_id();
302 362
303 /*
304 * Check for special case of mismarked 3005 samples. We only
305 * need to check if the sub model isn't being ignored
306 */
307 if ((model & OM_CHECK_SUBMODEL) == OM_CHECK_SUBMODEL) {
308 if (cpuid == OCTEON_CN3010_PASS1 && (cvmx_read_csr(0x80011800800007B8ull) & (1ull << 34)))
309 cpuid |= 0x10;
310 }
311 return __OCTEON_IS_MODEL_COMPILE__(model, cpuid); 363 return __OCTEON_IS_MODEL_COMPILE__(model, cpuid);
312} 364}
313 365
@@ -326,10 +378,21 @@ static inline int __octeon_is_model_runtime__(uint32_t model)
326#define OCTEON_IS_COMMON_BINARY() 1 378#define OCTEON_IS_COMMON_BINARY() 1
327#undef OCTEON_MODEL 379#undef OCTEON_MODEL
328 380
381#define OCTEON_IS_OCTEON1() OCTEON_IS_MODEL(OCTEON_CN3XXX)
382#define OCTEON_IS_OCTEONPLUS() OCTEON_IS_MODEL(OCTEON_CN5XXX)
383#define OCTEON_IS_OCTEON2() \
384 (OCTEON_IS_MODEL(OCTEON_CN6XXX) || OCTEON_IS_MODEL(OCTEON_CNF71XX))
385
386#define OCTEON_IS_OCTEON3() OCTEON_IS_MODEL(OCTEON_CN7XXX)
387
388#define OCTEON_IS_OCTEON1PLUS() (OCTEON_IS_OCTEON1() || OCTEON_IS_OCTEONPLUS())
389
329const char *__init octeon_model_get_string(uint32_t chip_id); 390const char *__init octeon_model_get_string(uint32_t chip_id);
330 391
331/* 392/*
332 * Return the octeon family, i.e., ProcessorID of the PrID register. 393 * Return the octeon family, i.e., ProcessorID of the PrID register.
394 *
395 * @return the octeon family on success, ((unint32_t)-1) on error.
333 */ 396 */
334static inline uint32_t cvmx_get_octeon_family(void) 397static inline uint32_t cvmx_get_octeon_family(void)
335{ 398{
diff --git a/arch/mips/include/asm/octeon/octeon.h b/arch/mips/include/asm/octeon/octeon.h
index 6dfefd2d5cdf..041596570856 100644
--- a/arch/mips/include/asm/octeon/octeon.h
+++ b/arch/mips/include/asm/octeon/octeon.h
@@ -9,6 +9,7 @@
9#define __ASM_OCTEON_OCTEON_H 9#define __ASM_OCTEON_OCTEON_H
10 10
11#include <asm/octeon/cvmx.h> 11#include <asm/octeon/cvmx.h>
12#include <asm/bitfield.h>
12 13
13extern uint64_t octeon_bootmem_alloc_range_phys(uint64_t size, 14extern uint64_t octeon_bootmem_alloc_range_phys(uint64_t size,
14 uint64_t alignment, 15 uint64_t alignment,
@@ -53,6 +54,7 @@ extern void octeon_io_clk_delay(unsigned long);
53#define OCTOEN_SERIAL_LEN 20 54#define OCTOEN_SERIAL_LEN 20
54 55
55struct octeon_boot_descriptor { 56struct octeon_boot_descriptor {
57#ifdef __BIG_ENDIAN_BITFIELD
56 /* Start of block referenced by assembly code - do not change! */ 58 /* Start of block referenced by assembly code - do not change! */
57 uint32_t desc_version; 59 uint32_t desc_version;
58 uint32_t desc_size; 60 uint32_t desc_size;
@@ -104,77 +106,149 @@ struct octeon_boot_descriptor {
104 uint8_t mac_addr_base[6]; 106 uint8_t mac_addr_base[6];
105 uint8_t mac_addr_count; 107 uint8_t mac_addr_count;
106 uint64_t cvmx_desc_vaddr; 108 uint64_t cvmx_desc_vaddr;
109#else
110 uint32_t desc_size;
111 uint32_t desc_version;
112 uint64_t stack_top;
113 uint64_t heap_base;
114 uint64_t heap_end;
115 /* Only used by bootloader */
116 uint64_t entry_point;
117 uint64_t desc_vaddr;
118 /* End of This block referenced by assembly code - do not change! */
119 uint32_t stack_size;
120 uint32_t exception_base_addr;
121 uint32_t argc;
122 uint32_t heap_size;
123 /*
124 * Argc count for application.
125 * Warning low bit scrambled in little-endian.
126 */
127 uint32_t argv[OCTEON_ARGV_MAX_ARGS];
128
129#define BOOT_FLAG_INIT_CORE (1 << 0)
130#define OCTEON_BL_FLAG_DEBUG (1 << 1)
131#define OCTEON_BL_FLAG_NO_MAGIC (1 << 2)
132 /* If set, use uart1 for console */
133#define OCTEON_BL_FLAG_CONSOLE_UART1 (1 << 3)
134 /* If set, use PCI console */
135#define OCTEON_BL_FLAG_CONSOLE_PCI (1 << 4)
136 /* Call exit on break on serial port */
137#define OCTEON_BL_FLAG_BREAK (1 << 5)
138
139 uint32_t core_mask;
140 uint32_t flags;
141 /* physical address of free memory descriptor block. */
142 uint32_t phy_mem_desc_addr;
143 /* DRAM size in megabyes. */
144 uint32_t dram_size;
145 /* CPU clock speed, in hz. */
146 uint32_t eclock_hz;
147 /* used to pass flags from app to debugger. */
148 uint32_t debugger_flags_base_addr;
149 /* SPI4 clock in hz. */
150 uint32_t spi_clock_hz;
151 /* DRAM clock speed, in hz. */
152 uint32_t dclock_hz;
153 uint8_t chip_rev_minor;
154 uint8_t chip_rev_major;
155 uint16_t chip_type;
156 uint8_t board_rev_minor;
157 uint8_t board_rev_major;
158 uint16_t board_type;
159
160 uint64_t unused1[4]; /* Not even filled in by bootloader. */
161
162 uint64_t cvmx_desc_vaddr;
163#endif
107}; 164};
108 165
109union octeon_cvmemctl { 166union octeon_cvmemctl {
110 uint64_t u64; 167 uint64_t u64;
111 struct { 168 struct {
112 /* RO 1 = BIST fail, 0 = BIST pass */ 169 /* RO 1 = BIST fail, 0 = BIST pass */
113 uint64_t tlbbist:1; 170 __BITFIELD_FIELD(uint64_t tlbbist:1,
114 /* RO 1 = BIST fail, 0 = BIST pass */ 171 /* RO 1 = BIST fail, 0 = BIST pass */
115 uint64_t l1cbist:1; 172 __BITFIELD_FIELD(uint64_t l1cbist:1,
116 /* RO 1 = BIST fail, 0 = BIST pass */ 173 /* RO 1 = BIST fail, 0 = BIST pass */
117 uint64_t l1dbist:1; 174 __BITFIELD_FIELD(uint64_t l1dbist:1,
118 /* RO 1 = BIST fail, 0 = BIST pass */ 175 /* RO 1 = BIST fail, 0 = BIST pass */
119 uint64_t dcmbist:1; 176 __BITFIELD_FIELD(uint64_t dcmbist:1,
120 /* RO 1 = BIST fail, 0 = BIST pass */ 177 /* RO 1 = BIST fail, 0 = BIST pass */
121 uint64_t ptgbist:1; 178 __BITFIELD_FIELD(uint64_t ptgbist:1,
122 /* RO 1 = BIST fail, 0 = BIST pass */ 179 /* RO 1 = BIST fail, 0 = BIST pass */
123 uint64_t wbfbist:1; 180 __BITFIELD_FIELD(uint64_t wbfbist:1,
124 /* Reserved */ 181 /* Reserved */
125 uint64_t reserved:22; 182 __BITFIELD_FIELD(uint64_t reserved:17,
183 /* OCTEON II - TLB replacement policy: 0 = bitmask LRU; 1 = NLU.
184 * This field selects between the TLB replacement policies:
185 * bitmask LRU or NLU. Bitmask LRU maintains a mask of
186 * recently used TLB entries and avoids them as new entries
187 * are allocated. NLU simply guarantees that the next
188 * allocation is not the last used TLB entry. */
189 __BITFIELD_FIELD(uint64_t tlbnlu:1,
190 /* OCTEON II - Selects the bit in the counter used for
191 * releasing a PAUSE. This counter trips every 2(8+PAUSETIME)
192 * cycles. If not already released, the cnMIPS II core will
193 * always release a given PAUSE instruction within
194 * 2(8+PAUSETIME). If the counter trip happens to line up,
195 * the cnMIPS II core may release the PAUSE instantly. */
196 __BITFIELD_FIELD(uint64_t pausetime:3,
197 /* OCTEON II - This field is an extension of
198 * CvmMemCtl[DIDTTO] */
199 __BITFIELD_FIELD(uint64_t didtto2:1,
126 /* R/W If set, marked write-buffer entries time out 200 /* R/W If set, marked write-buffer entries time out
127 * the same as as other entries; if clear, marked 201 * the same as as other entries; if clear, marked
128 * write-buffer entries use the maximum timeout. */ 202 * write-buffer entries use the maximum timeout. */
129 uint64_t dismarkwblongto:1; 203 __BITFIELD_FIELD(uint64_t dismarkwblongto:1,
130 /* R/W If set, a merged store does not clear the 204 /* R/W If set, a merged store does not clear the
131 * write-buffer entry timeout state. */ 205 * write-buffer entry timeout state. */
132 uint64_t dismrgclrwbto:1; 206 __BITFIELD_FIELD(uint64_t dismrgclrwbto:1,
133 /* R/W Two bits that are the MSBs of the resultant 207 /* R/W Two bits that are the MSBs of the resultant
134 * CVMSEG LM word location for an IOBDMA. The other 8 208 * CVMSEG LM word location for an IOBDMA. The other 8
135 * bits come from the SCRADDR field of the IOBDMA. */ 209 * bits come from the SCRADDR field of the IOBDMA. */
136 uint64_t iobdmascrmsb:2; 210 __BITFIELD_FIELD(uint64_t iobdmascrmsb:2,
137 /* R/W If set, SYNCWS and SYNCS only order marked 211 /* R/W If set, SYNCWS and SYNCS only order marked
138 * stores; if clear, SYNCWS and SYNCS only order 212 * stores; if clear, SYNCWS and SYNCS only order
139 * unmarked stores. SYNCWSMARKED has no effect when 213 * unmarked stores. SYNCWSMARKED has no effect when
140 * DISSYNCWS is set. */ 214 * DISSYNCWS is set. */
141 uint64_t syncwsmarked:1; 215 __BITFIELD_FIELD(uint64_t syncwsmarked:1,
142 /* R/W If set, SYNCWS acts as SYNCW and SYNCS acts as 216 /* R/W If set, SYNCWS acts as SYNCW and SYNCS acts as
143 * SYNC. */ 217 * SYNC. */
144 uint64_t dissyncws:1; 218 __BITFIELD_FIELD(uint64_t dissyncws:1,
145 /* R/W If set, no stall happens on write buffer 219 /* R/W If set, no stall happens on write buffer
146 * full. */ 220 * full. */
147 uint64_t diswbfst:1; 221 __BITFIELD_FIELD(uint64_t diswbfst:1,
148 /* R/W If set (and SX set), supervisor-level 222 /* R/W If set (and SX set), supervisor-level
149 * loads/stores can use XKPHYS addresses with 223 * loads/stores can use XKPHYS addresses with
150 * VA<48>==0 */ 224 * VA<48>==0 */
151 uint64_t xkmemenas:1; 225 __BITFIELD_FIELD(uint64_t xkmemenas:1,
152 /* R/W If set (and UX set), user-level loads/stores 226 /* R/W If set (and UX set), user-level loads/stores
153 * can use XKPHYS addresses with VA<48>==0 */ 227 * can use XKPHYS addresses with VA<48>==0 */
154 uint64_t xkmemenau:1; 228 __BITFIELD_FIELD(uint64_t xkmemenau:1,
155 /* R/W If set (and SX set), supervisor-level 229 /* R/W If set (and SX set), supervisor-level
156 * loads/stores can use XKPHYS addresses with 230 * loads/stores can use XKPHYS addresses with
157 * VA<48>==1 */ 231 * VA<48>==1 */
158 uint64_t xkioenas:1; 232 __BITFIELD_FIELD(uint64_t xkioenas:1,
159 /* R/W If set (and UX set), user-level loads/stores 233 /* R/W If set (and UX set), user-level loads/stores
160 * can use XKPHYS addresses with VA<48>==1 */ 234 * can use XKPHYS addresses with VA<48>==1 */
161 uint64_t xkioenau:1; 235 __BITFIELD_FIELD(uint64_t xkioenau:1,
162 /* R/W If set, all stores act as SYNCW (NOMERGE must 236 /* R/W If set, all stores act as SYNCW (NOMERGE must
163 * be set when this is set) RW, reset to 0. */ 237 * be set when this is set) RW, reset to 0. */
164 uint64_t allsyncw:1; 238 __BITFIELD_FIELD(uint64_t allsyncw:1,
165 /* R/W If set, no stores merge, and all stores reach 239 /* R/W If set, no stores merge, and all stores reach
166 * the coherent bus in order. */ 240 * the coherent bus in order. */
167 uint64_t nomerge:1; 241 __BITFIELD_FIELD(uint64_t nomerge:1,
168 /* R/W Selects the bit in the counter used for DID 242 /* R/W Selects the bit in the counter used for DID
169 * time-outs 0 = 231, 1 = 230, 2 = 229, 3 = 243 * time-outs 0 = 231, 1 = 230, 2 = 229, 3 =
170 * 214. Actual time-out is between 1x and 2x this 244 * 214. Actual time-out is between 1x and 2x this
171 * interval. For example, with DIDTTO=3, expiration 245 * interval. For example, with DIDTTO=3, expiration
172 * interval is between 16K and 32K. */ 246 * interval is between 16K and 32K. */
173 uint64_t didtto:2; 247 __BITFIELD_FIELD(uint64_t didtto:2,
174 /* R/W If set, the (mem) CSR clock never turns off. */ 248 /* R/W If set, the (mem) CSR clock never turns off. */
175 uint64_t csrckalwys:1; 249 __BITFIELD_FIELD(uint64_t csrckalwys:1,
176 /* R/W If set, mclk never turns off. */ 250 /* R/W If set, mclk never turns off. */
177 uint64_t mclkalwys:1; 251 __BITFIELD_FIELD(uint64_t mclkalwys:1,
178 /* R/W Selects the bit in the counter used for write 252 /* R/W Selects the bit in the counter used for write
179 * buffer flush time-outs (WBFLT+11) is the bit 253 * buffer flush time-outs (WBFLT+11) is the bit
180 * position in an internal counter used to determine 254 * position in an internal counter used to determine
@@ -182,25 +256,26 @@ union octeon_cvmemctl {
182 * 2x this interval. For example, with WBFLT = 0, a 256 * 2x this interval. For example, with WBFLT = 0, a
183 * write buffer expires between 2K and 4K cycles after 257 * write buffer expires between 2K and 4K cycles after
184 * the write buffer entry is allocated. */ 258 * the write buffer entry is allocated. */
185 uint64_t wbfltime:3; 259 __BITFIELD_FIELD(uint64_t wbfltime:3,
186 /* R/W If set, do not put Istream in the L2 cache. */ 260 /* R/W If set, do not put Istream in the L2 cache. */
187 uint64_t istrnol2:1; 261 __BITFIELD_FIELD(uint64_t istrnol2:1,
188 /* R/W The write buffer threshold. */ 262 /* R/W The write buffer threshold. */
189 uint64_t wbthresh:4; 263 __BITFIELD_FIELD(uint64_t wbthresh:4,
190 /* Reserved */ 264 /* Reserved */
191 uint64_t reserved2:2; 265 __BITFIELD_FIELD(uint64_t reserved2:2,
192 /* R/W If set, CVMSEG is available for loads/stores in 266 /* R/W If set, CVMSEG is available for loads/stores in
193 * kernel/debug mode. */ 267 * kernel/debug mode. */
194 uint64_t cvmsegenak:1; 268 __BITFIELD_FIELD(uint64_t cvmsegenak:1,
195 /* R/W If set, CVMSEG is available for loads/stores in 269 /* R/W If set, CVMSEG is available for loads/stores in
196 * supervisor mode. */ 270 * supervisor mode. */
197 uint64_t cvmsegenas:1; 271 __BITFIELD_FIELD(uint64_t cvmsegenas:1,
198 /* R/W If set, CVMSEG is available for loads/stores in 272 /* R/W If set, CVMSEG is available for loads/stores in
199 * user mode. */ 273 * user mode. */
200 uint64_t cvmsegenau:1; 274 __BITFIELD_FIELD(uint64_t cvmsegenau:1,
201 /* R/W Size of local memory in cache blocks, 54 (6912 275 /* R/W Size of local memory in cache blocks, 54 (6912
202 * bytes) is max legal value. */ 276 * bytes) is max legal value. */
203 uint64_t lmemsz:6; 277 __BITFIELD_FIELD(uint64_t lmemsz:6,
278 ;)))))))))))))))))))))))))))))))))
204 } s; 279 } s;
205}; 280};
206 281
@@ -224,6 +299,19 @@ static inline void octeon_npi_write32(uint64_t address, uint32_t val)
224 cvmx_read64_uint32(address ^ 4); 299 cvmx_read64_uint32(address ^ 4);
225} 300}
226 301
302/* Octeon multiplier save/restore routines from octeon_switch.S */
303void octeon_mult_save(void);
304void octeon_mult_restore(void);
305void octeon_mult_save_end(void);
306void octeon_mult_restore_end(void);
307void octeon_mult_save3(void);
308void octeon_mult_save3_end(void);
309void octeon_mult_save2(void);
310void octeon_mult_save2_end(void);
311void octeon_mult_restore3(void);
312void octeon_mult_restore3_end(void);
313void octeon_mult_restore2(void);
314void octeon_mult_restore2_end(void);
227 315
228/** 316/**
229 * Read a 32bit value from the Octeon NPI register space 317 * Read a 32bit value from the Octeon NPI register space
diff --git a/arch/mips/include/asm/pci.h b/arch/mips/include/asm/pci.h
index 69529624a005..193b4c6b7541 100644
--- a/arch/mips/include/asm/pci.h
+++ b/arch/mips/include/asm/pci.h
@@ -121,6 +121,7 @@ static inline void pci_dma_burst_advice(struct pci_dev *pdev,
121} 121}
122#endif 122#endif
123 123
124#ifdef CONFIG_PCI_DOMAINS
124#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index 125#define pci_domain_nr(bus) ((struct pci_controller *)(bus)->sysdata)->index
125 126
126static inline int pci_proc_domain(struct pci_bus *bus) 127static inline int pci_proc_domain(struct pci_bus *bus)
@@ -128,6 +129,7 @@ static inline int pci_proc_domain(struct pci_bus *bus)
128 struct pci_controller *hose = bus->sysdata; 129 struct pci_controller *hose = bus->sysdata;
129 return hose->need_domain_info; 130 return hose->need_domain_info;
130} 131}
132#endif /* CONFIG_PCI_DOMAINS */
131 133
132#endif /* __KERNEL__ */ 134#endif /* __KERNEL__ */
133 135
diff --git a/arch/mips/include/asm/pgtable-bits.h b/arch/mips/include/asm/pgtable-bits.h
index fc807aa5ec8d..91747c282bb3 100644
--- a/arch/mips/include/asm/pgtable-bits.h
+++ b/arch/mips/include/asm/pgtable-bits.h
@@ -35,7 +35,7 @@
35#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32) 35#if defined(CONFIG_PHYS_ADDR_T_64BIT) && defined(CONFIG_CPU_MIPS32)
36 36
37/* 37/*
38 * The following bits are directly used by the TLB hardware 38 * The following bits are implemented by the TLB hardware
39 */ 39 */
40#define _PAGE_GLOBAL_SHIFT 0 40#define _PAGE_GLOBAL_SHIFT 0
41#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) 41#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
@@ -60,43 +60,40 @@
60#define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1) 60#define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1)
61#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT) 61#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT)
62 62
63#define _PAGE_SILENT_READ _PAGE_VALID
64#define _PAGE_SILENT_WRITE _PAGE_DIRTY
65
66#define _PFN_SHIFT (PAGE_SHIFT - 12 + _CACHE_SHIFT + 3) 63#define _PFN_SHIFT (PAGE_SHIFT - 12 + _CACHE_SHIFT + 3)
67 64
68#elif defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX) 65#elif defined(CONFIG_CPU_R3000) || defined(CONFIG_CPU_TX39XX)
69 66
70/* 67/*
71 * The following are implemented by software 68 * The following bits are implemented in software
72 */ 69 */
73#define _PAGE_PRESENT_SHIFT 0 70#define _PAGE_PRESENT_SHIFT (0)
74#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT) 71#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
75#define _PAGE_READ_SHIFT 1 72#define _PAGE_READ_SHIFT (_PAGE_PRESENT_SHIFT + 1)
76#define _PAGE_READ (1 << _PAGE_READ_SHIFT) 73#define _PAGE_READ (1 << _PAGE_READ_SHIFT)
77#define _PAGE_WRITE_SHIFT 2 74#define _PAGE_WRITE_SHIFT (_PAGE_READ_SHIFT + 1)
78#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT) 75#define _PAGE_WRITE (1 << _PAGE_WRITE_SHIFT)
79#define _PAGE_ACCESSED_SHIFT 3 76#define _PAGE_ACCESSED_SHIFT (_PAGE_WRITE_SHIFT + 1)
80#define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT) 77#define _PAGE_ACCESSED (1 << _PAGE_ACCESSED_SHIFT)
81#define _PAGE_MODIFIED_SHIFT 4 78#define _PAGE_MODIFIED_SHIFT (_PAGE_ACCESSED_SHIFT + 1)
82#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT) 79#define _PAGE_MODIFIED (1 << _PAGE_MODIFIED_SHIFT)
83 80
84/* 81/*
85 * And these are the hardware TLB bits 82 * The following bits are implemented by the TLB hardware
86 */ 83 */
87#define _PAGE_GLOBAL_SHIFT 8 84#define _PAGE_GLOBAL_SHIFT (_PAGE_MODIFIED_SHIFT + 4)
88#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) 85#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
89#define _PAGE_VALID_SHIFT 9 86#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1)
90#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT) 87#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
91#define _PAGE_SILENT_READ (1 << _PAGE_VALID_SHIFT) /* synonym */ 88#define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1)
92#define _PAGE_DIRTY_SHIFT 10
93#define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT) 89#define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT)
94#define _PAGE_SILENT_WRITE (1 << _PAGE_DIRTY_SHIFT) 90#define _CACHE_UNCACHED_SHIFT (_PAGE_DIRTY_SHIFT + 1)
95#define _CACHE_UNCACHED_SHIFT 11
96#define _CACHE_UNCACHED (1 << _CACHE_UNCACHED_SHIFT) 91#define _CACHE_UNCACHED (1 << _CACHE_UNCACHED_SHIFT)
97#define _CACHE_MASK (1 << _CACHE_UNCACHED_SHIFT) 92#define _CACHE_MASK _CACHE_UNCACHED
98 93
99#else /* 'Normal' r4K case */ 94#define _PFN_SHIFT PAGE_SHIFT
95
96#else
100/* 97/*
101 * When using the RI/XI bit support, we have 13 bits of flags below 98 * When using the RI/XI bit support, we have 13 bits of flags below
102 * the physical address. The RI/XI bits are placed such that a SRL 5 99 * the physical address. The RI/XI bits are placed such that a SRL 5
@@ -107,10 +104,8 @@
107 104
108/* 105/*
109 * The following bits are implemented in software 106 * The following bits are implemented in software
110 *
111 * _PAGE_READ / _PAGE_READ_SHIFT should be unused if cpu_has_rixi.
112 */ 107 */
113#define _PAGE_PRESENT_SHIFT (0) 108#define _PAGE_PRESENT_SHIFT 0
114#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT) 109#define _PAGE_PRESENT (1 << _PAGE_PRESENT_SHIFT)
115#define _PAGE_READ_SHIFT (cpu_has_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1) 110#define _PAGE_READ_SHIFT (cpu_has_rixi ? _PAGE_PRESENT_SHIFT : _PAGE_PRESENT_SHIFT + 1)
116#define _PAGE_READ ({BUG_ON(cpu_has_rixi); 1 << _PAGE_READ_SHIFT; }) 111#define _PAGE_READ ({BUG_ON(cpu_has_rixi); 1 << _PAGE_READ_SHIFT; })
@@ -125,16 +120,11 @@
125/* huge tlb page */ 120/* huge tlb page */
126#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT + 1) 121#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT + 1)
127#define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT) 122#define _PAGE_HUGE (1 << _PAGE_HUGE_SHIFT)
128#else
129#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT)
130#define _PAGE_HUGE ({BUG(); 1; }) /* Dummy value */
131#endif
132
133#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
134/* huge tlb page */
135#define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT + 1) 123#define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT + 1)
136#define _PAGE_SPLITTING (1 << _PAGE_SPLITTING_SHIFT) 124#define _PAGE_SPLITTING (1 << _PAGE_SPLITTING_SHIFT)
137#else 125#else
126#define _PAGE_HUGE_SHIFT (_PAGE_MODIFIED_SHIFT)
127#define _PAGE_HUGE ({BUG(); 1; }) /* Dummy value */
138#define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT) 128#define _PAGE_SPLITTING_SHIFT (_PAGE_HUGE_SHIFT)
139#define _PAGE_SPLITTING ({BUG(); 1; }) /* Dummy value */ 129#define _PAGE_SPLITTING ({BUG(); 1; }) /* Dummy value */
140#endif 130#endif
@@ -149,17 +139,10 @@
149 139
150#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1) 140#define _PAGE_GLOBAL_SHIFT (_PAGE_NO_READ_SHIFT + 1)
151#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT) 141#define _PAGE_GLOBAL (1 << _PAGE_GLOBAL_SHIFT)
152
153#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1) 142#define _PAGE_VALID_SHIFT (_PAGE_GLOBAL_SHIFT + 1)
154#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT) 143#define _PAGE_VALID (1 << _PAGE_VALID_SHIFT)
155/* synonym */
156#define _PAGE_SILENT_READ (_PAGE_VALID)
157
158/* The MIPS dirty bit */
159#define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1) 144#define _PAGE_DIRTY_SHIFT (_PAGE_VALID_SHIFT + 1)
160#define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT) 145#define _PAGE_DIRTY (1 << _PAGE_DIRTY_SHIFT)
161#define _PAGE_SILENT_WRITE (_PAGE_DIRTY)
162
163#define _CACHE_SHIFT (_PAGE_DIRTY_SHIFT + 1) 146#define _CACHE_SHIFT (_PAGE_DIRTY_SHIFT + 1)
164#define _CACHE_MASK (7 << _CACHE_SHIFT) 147#define _CACHE_MASK (7 << _CACHE_SHIFT)
165 148
@@ -167,9 +150,9 @@
167 150
168#endif /* defined(CONFIG_PHYS_ADDR_T_64BIT && defined(CONFIG_CPU_MIPS32) */ 151#endif /* defined(CONFIG_PHYS_ADDR_T_64BIT && defined(CONFIG_CPU_MIPS32) */
169 152
170#ifndef _PFN_SHIFT 153#define _PAGE_SILENT_READ _PAGE_VALID
171#define _PFN_SHIFT PAGE_SHIFT 154#define _PAGE_SILENT_WRITE _PAGE_DIRTY
172#endif 155
173#define _PFN_MASK (~((1 << (_PFN_SHIFT)) - 1)) 156#define _PFN_MASK (~((1 << (_PFN_SHIFT)) - 1))
174 157
175#ifndef _PAGE_NO_READ 158#ifndef _PAGE_NO_READ
@@ -179,9 +162,6 @@
179#ifndef _PAGE_NO_EXEC 162#ifndef _PAGE_NO_EXEC
180#define _PAGE_NO_EXEC ({BUG(); 0; }) 163#define _PAGE_NO_EXEC ({BUG(); 0; })
181#endif 164#endif
182#ifndef _PAGE_GLOBAL_SHIFT
183#define _PAGE_GLOBAL_SHIFT ilog2(_PAGE_GLOBAL)
184#endif
185 165
186 166
187#ifndef __ASSEMBLY__ 167#ifndef __ASSEMBLY__
@@ -266,8 +246,9 @@ static inline uint64_t pte_to_entrylo(unsigned long pte_val)
266#endif 246#endif
267 247
268#define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (cpu_has_rixi ? 0 : _PAGE_READ)) 248#define __READABLE (_PAGE_SILENT_READ | _PAGE_ACCESSED | (cpu_has_rixi ? 0 : _PAGE_READ))
269#define __WRITEABLE (_PAGE_WRITE | _PAGE_SILENT_WRITE | _PAGE_MODIFIED) 249#define __WRITEABLE (_PAGE_SILENT_WRITE | _PAGE_WRITE | _PAGE_MODIFIED)
270 250
271#define _PAGE_CHG_MASK (_PFN_MASK | _PAGE_ACCESSED | _PAGE_MODIFIED | _CACHE_MASK) 251#define _PAGE_CHG_MASK (_PAGE_ACCESSED | _PAGE_MODIFIED | \
252 _PFN_MASK | _CACHE_MASK)
272 253
273#endif /* _ASM_PGTABLE_BITS_H */ 254#endif /* _ASM_PGTABLE_BITS_H */
diff --git a/arch/mips/include/asm/pgtable.h b/arch/mips/include/asm/pgtable.h
index 583ff4215479..bef782c4a44b 100644
--- a/arch/mips/include/asm/pgtable.h
+++ b/arch/mips/include/asm/pgtable.h
@@ -99,29 +99,35 @@ extern void paging_init(void);
99 99
100#define htw_stop() \ 100#define htw_stop() \
101do { \ 101do { \
102 if (cpu_has_htw) \ 102 unsigned long flags; \
103 write_c0_pwctl(read_c0_pwctl() & \ 103 \
104 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \ 104 if (cpu_has_htw) { \
105 local_irq_save(flags); \
106 if(!raw_current_cpu_data.htw_seq++) { \
107 write_c0_pwctl(read_c0_pwctl() & \
108 ~(1 << MIPS_PWCTL_PWEN_SHIFT)); \
109 back_to_back_c0_hazard(); \
110 } \
111 local_irq_restore(flags); \
112 } \
105} while(0) 113} while(0)
106 114
107#define htw_start() \ 115#define htw_start() \
108do { \ 116do { \
109 if (cpu_has_htw) \ 117 unsigned long flags; \
110 write_c0_pwctl(read_c0_pwctl() | \ 118 \
111 (1 << MIPS_PWCTL_PWEN_SHIFT)); \
112} while(0)
113
114
115#define htw_reset() \
116do { \
117 if (cpu_has_htw) { \ 119 if (cpu_has_htw) { \
118 htw_stop(); \ 120 local_irq_save(flags); \
119 back_to_back_c0_hazard(); \ 121 if (!--raw_current_cpu_data.htw_seq) { \
120 htw_start(); \ 122 write_c0_pwctl(read_c0_pwctl() | \
121 back_to_back_c0_hazard(); \ 123 (1 << MIPS_PWCTL_PWEN_SHIFT)); \
124 back_to_back_c0_hazard(); \
125 } \
126 local_irq_restore(flags); \
122 } \ 127 } \
123} while(0) 128} while(0)
124 129
130
125extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep, 131extern void set_pte_at(struct mm_struct *mm, unsigned long addr, pte_t *ptep,
126 pte_t pteval); 132 pte_t pteval);
127 133
@@ -153,12 +159,13 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
153{ 159{
154 pte_t null = __pte(0); 160 pte_t null = __pte(0);
155 161
162 htw_stop();
156 /* Preserve global status for the pair */ 163 /* Preserve global status for the pair */
157 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL) 164 if (ptep_buddy(ptep)->pte_low & _PAGE_GLOBAL)
158 null.pte_low = null.pte_high = _PAGE_GLOBAL; 165 null.pte_low = null.pte_high = _PAGE_GLOBAL;
159 166
160 set_pte_at(mm, addr, ptep, null); 167 set_pte_at(mm, addr, ptep, null);
161 htw_reset(); 168 htw_start();
162} 169}
163#else 170#else
164 171
@@ -188,6 +195,7 @@ static inline void set_pte(pte_t *ptep, pte_t pteval)
188 195
189static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep) 196static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *ptep)
190{ 197{
198 htw_stop();
191#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX) 199#if !defined(CONFIG_CPU_R3000) && !defined(CONFIG_CPU_TX39XX)
192 /* Preserve global status for the pair */ 200 /* Preserve global status for the pair */
193 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL) 201 if (pte_val(*ptep_buddy(ptep)) & _PAGE_GLOBAL)
@@ -195,7 +203,7 @@ static inline void pte_clear(struct mm_struct *mm, unsigned long addr, pte_t *pt
195 else 203 else
196#endif 204#endif
197 set_pte_at(mm, addr, ptep, __pte(0)); 205 set_pte_at(mm, addr, ptep, __pte(0));
198 htw_reset(); 206 htw_start();
199} 207}
200#endif 208#endif
201 209
@@ -334,7 +342,7 @@ static inline pte_t pte_mkyoung(pte_t pte)
334 return pte; 342 return pte;
335} 343}
336 344
337#ifdef _PAGE_HUGE 345#ifdef CONFIG_MIPS_HUGE_TLB_SUPPORT
338static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; } 346static inline int pte_huge(pte_t pte) { return pte_val(pte) & _PAGE_HUGE; }
339 347
340static inline pte_t pte_mkhuge(pte_t pte) 348static inline pte_t pte_mkhuge(pte_t pte)
@@ -342,7 +350,7 @@ static inline pte_t pte_mkhuge(pte_t pte)
342 pte_val(pte) |= _PAGE_HUGE; 350 pte_val(pte) |= _PAGE_HUGE;
343 return pte; 351 return pte;
344} 352}
345#endif /* _PAGE_HUGE */ 353#endif /* CONFIG_MIPS_HUGE_TLB_SUPPORT */
346#endif 354#endif
347static inline int pte_special(pte_t pte) { return 0; } 355static inline int pte_special(pte_t pte) { return 0; }
348static inline pte_t pte_mkspecial(pte_t pte) { return pte; } 356static inline pte_t pte_mkspecial(pte_t pte) { return pte; }
diff --git a/arch/mips/include/asm/processor.h b/arch/mips/include/asm/processor.h
index f1df4cb4a286..b5dcbee01fd7 100644
--- a/arch/mips/include/asm/processor.h
+++ b/arch/mips/include/asm/processor.h
@@ -54,9 +54,7 @@ extern unsigned int vced_count, vcei_count;
54#define TASK_SIZE 0x7fff8000UL 54#define TASK_SIZE 0x7fff8000UL
55#endif 55#endif
56 56
57#ifdef __KERNEL__
58#define STACK_TOP_MAX TASK_SIZE 57#define STACK_TOP_MAX TASK_SIZE
59#endif
60 58
61#define TASK_IS_32BIT_ADDR 1 59#define TASK_IS_32BIT_ADDR 1
62 60
@@ -73,11 +71,7 @@ extern unsigned int vced_count, vcei_count;
73#define TASK_SIZE32 0x7fff8000UL 71#define TASK_SIZE32 0x7fff8000UL
74#define TASK_SIZE64 0x10000000000UL 72#define TASK_SIZE64 0x10000000000UL
75#define TASK_SIZE (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE64) 73#define TASK_SIZE (test_thread_flag(TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE64)
76
77#ifdef __KERNEL__
78#define STACK_TOP_MAX TASK_SIZE64 74#define STACK_TOP_MAX TASK_SIZE64
79#endif
80
81 75
82#define TASK_SIZE_OF(tsk) \ 76#define TASK_SIZE_OF(tsk) \
83 (test_tsk_thread_flag(tsk, TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE64) 77 (test_tsk_thread_flag(tsk, TIF_32BIT_ADDR) ? TASK_SIZE32 : TASK_SIZE64)
@@ -211,6 +205,8 @@ struct octeon_cop2_state {
211 unsigned long cop2_gfm_poly; 205 unsigned long cop2_gfm_poly;
212 /* DMFC2 rt, 0x025A; DMFC2 rt, 0x025B - Pass2 */ 206 /* DMFC2 rt, 0x025A; DMFC2 rt, 0x025B - Pass2 */
213 unsigned long cop2_gfm_result[2]; 207 unsigned long cop2_gfm_result[2];
208 /* DMFC2 rt, 0x24F, DMFC2 rt, 0x50, OCTEON III */
209 unsigned long cop2_sha3[2];
214}; 210};
215#define COP2_INIT \ 211#define COP2_INIT \
216 .cp2 = {0,}, 212 .cp2 = {0,},
@@ -399,4 +395,15 @@ unsigned long get_wchan(struct task_struct *p);
399 395
400#endif 396#endif
401 397
398/*
399 * Functions & macros implementing the PR_GET_FP_MODE & PR_SET_FP_MODE options
400 * to the prctl syscall.
401 */
402extern int mips_get_process_fp_mode(struct task_struct *task);
403extern int mips_set_process_fp_mode(struct task_struct *task,
404 unsigned int value);
405
406#define GET_FP_MODE(task) mips_get_process_fp_mode(task)
407#define SET_FP_MODE(task,value) mips_set_process_fp_mode(task, value)
408
402#endif /* _ASM_PROCESSOR_H */ 409#endif /* _ASM_PROCESSOR_H */
diff --git a/arch/mips/include/asm/prom.h b/arch/mips/include/asm/prom.h
index eaa26270a5e5..8ebc2aa5f3e1 100644
--- a/arch/mips/include/asm/prom.h
+++ b/arch/mips/include/asm/prom.h
@@ -24,13 +24,6 @@ struct boot_param_header;
24extern void __dt_setup_arch(void *bph); 24extern void __dt_setup_arch(void *bph);
25extern int __dt_register_buses(const char *bus0, const char *bus1); 25extern int __dt_register_buses(const char *bus0, const char *bus1);
26 26
27#define dt_setup_arch(sym) \
28({ \
29 extern char __dtb_##sym##_begin[]; \
30 \
31 __dt_setup_arch(__dtb_##sym##_begin); \
32})
33
34#else /* CONFIG_OF */ 27#else /* CONFIG_OF */
35static inline void device_tree_init(void) { } 28static inline void device_tree_init(void) { }
36#endif /* CONFIG_OF */ 29#endif /* CONFIG_OF */
diff --git a/arch/mips/include/asm/ptrace.h b/arch/mips/include/asm/ptrace.h
index fc783f843bdc..ffc320389f40 100644
--- a/arch/mips/include/asm/ptrace.h
+++ b/arch/mips/include/asm/ptrace.h
@@ -40,8 +40,8 @@ struct pt_regs {
40 unsigned long cp0_cause; 40 unsigned long cp0_cause;
41 unsigned long cp0_epc; 41 unsigned long cp0_epc;
42#ifdef CONFIG_CPU_CAVIUM_OCTEON 42#ifdef CONFIG_CPU_CAVIUM_OCTEON
43 unsigned long long mpl[3]; /* MTM{0,1,2} */ 43 unsigned long long mpl[6]; /* MTM{0-5} */
44 unsigned long long mtp[3]; /* MTP{0,1,2} */ 44 unsigned long long mtp[6]; /* MTP{0-5} */
45#endif 45#endif
46} __aligned(8); 46} __aligned(8);
47 47
diff --git a/arch/mips/include/asm/r4kcache.h b/arch/mips/include/asm/r4kcache.h
index e293a8d89a6d..1b22d2da88a1 100644
--- a/arch/mips/include/asm/r4kcache.h
+++ b/arch/mips/include/asm/r4kcache.h
@@ -14,6 +14,7 @@
14 14
15#include <asm/asm.h> 15#include <asm/asm.h>
16#include <asm/cacheops.h> 16#include <asm/cacheops.h>
17#include <asm/compiler.h>
17#include <asm/cpu-features.h> 18#include <asm/cpu-features.h>
18#include <asm/cpu-type.h> 19#include <asm/cpu-type.h>
19#include <asm/mipsmtregs.h> 20#include <asm/mipsmtregs.h>
@@ -39,7 +40,7 @@ extern void (*r4k_blast_icache)(void);
39 __asm__ __volatile__( \ 40 __asm__ __volatile__( \
40 " .set push \n" \ 41 " .set push \n" \
41 " .set noreorder \n" \ 42 " .set noreorder \n" \
42 " .set arch=r4000 \n" \ 43 " .set "MIPS_ISA_ARCH_LEVEL" \n" \
43 " cache %0, %1 \n" \ 44 " cache %0, %1 \n" \
44 " .set pop \n" \ 45 " .set pop \n" \
45 : \ 46 : \
@@ -147,7 +148,7 @@ static inline void flush_scache_line(unsigned long addr)
147 __asm__ __volatile__( \ 148 __asm__ __volatile__( \
148 " .set push \n" \ 149 " .set push \n" \
149 " .set noreorder \n" \ 150 " .set noreorder \n" \
150 " .set arch=r4000 \n" \ 151 " .set "MIPS_ISA_ARCH_LEVEL" \n" \
151 "1: cache %0, (%1) \n" \ 152 "1: cache %0, (%1) \n" \
152 "2: .set pop \n" \ 153 "2: .set pop \n" \
153 " .section __ex_table,\"a\" \n" \ 154 " .section __ex_table,\"a\" \n" \
@@ -218,6 +219,7 @@ static inline void invalidate_tcache_page(unsigned long addr)
218 cache_op(Page_Invalidate_T, addr); 219 cache_op(Page_Invalidate_T, addr);
219} 220}
220 221
222#ifndef CONFIG_CPU_MIPSR6
221#define cache16_unroll32(base,op) \ 223#define cache16_unroll32(base,op) \
222 __asm__ __volatile__( \ 224 __asm__ __volatile__( \
223 " .set push \n" \ 225 " .set push \n" \
@@ -322,6 +324,150 @@ static inline void invalidate_tcache_page(unsigned long addr)
322 : "r" (base), \ 324 : "r" (base), \
323 "i" (op)); 325 "i" (op));
324 326
327#else
328/*
329 * MIPS R6 changed the cache opcode and moved to a 8-bit offset field.
330 * This means we now need to increment the base register before we flush
331 * more cache lines
332 */
333#define cache16_unroll32(base,op) \
334 __asm__ __volatile__( \
335 " .set push\n" \
336 " .set noreorder\n" \
337 " .set mips64r6\n" \
338 " .set noat\n" \
339 " cache %1, 0x000(%0); cache %1, 0x010(%0)\n" \
340 " cache %1, 0x020(%0); cache %1, 0x030(%0)\n" \
341 " cache %1, 0x040(%0); cache %1, 0x050(%0)\n" \
342 " cache %1, 0x060(%0); cache %1, 0x070(%0)\n" \
343 " cache %1, 0x080(%0); cache %1, 0x090(%0)\n" \
344 " cache %1, 0x0a0(%0); cache %1, 0x0b0(%0)\n" \
345 " cache %1, 0x0c0(%0); cache %1, 0x0d0(%0)\n" \
346 " cache %1, 0x0e0(%0); cache %1, 0x0f0(%0)\n" \
347 " addiu $1, $0, 0x100 \n" \
348 " cache %1, 0x000($1); cache %1, 0x010($1)\n" \
349 " cache %1, 0x020($1); cache %1, 0x030($1)\n" \
350 " cache %1, 0x040($1); cache %1, 0x050($1)\n" \
351 " cache %1, 0x060($1); cache %1, 0x070($1)\n" \
352 " cache %1, 0x080($1); cache %1, 0x090($1)\n" \
353 " cache %1, 0x0a0($1); cache %1, 0x0b0($1)\n" \
354 " cache %1, 0x0c0($1); cache %1, 0x0d0($1)\n" \
355 " cache %1, 0x0e0($1); cache %1, 0x0f0($1)\n" \
356 " .set pop\n" \
357 : \
358 : "r" (base), \
359 "i" (op));
360
361#define cache32_unroll32(base,op) \
362 __asm__ __volatile__( \
363 " .set push\n" \
364 " .set noreorder\n" \
365 " .set mips64r6\n" \
366 " .set noat\n" \
367 " cache %1, 0x000(%0); cache %1, 0x020(%0)\n" \
368 " cache %1, 0x040(%0); cache %1, 0x060(%0)\n" \
369 " cache %1, 0x080(%0); cache %1, 0x0a0(%0)\n" \
370 " cache %1, 0x0c0(%0); cache %1, 0x0e0(%0)\n" \
371 " addiu $1, %0, 0x100\n" \
372 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \
373 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \
374 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
375 " cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \
376 " addiu $1, $1, 0x100\n" \
377 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \
378 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \
379 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
380 " cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \
381 " addiu $1, $1, 0x100\n" \
382 " cache %1, 0x000($1); cache %1, 0x020($1)\n" \
383 " cache %1, 0x040($1); cache %1, 0x060($1)\n" \
384 " cache %1, 0x080($1); cache %1, 0x0a0($1)\n" \
385 " cache %1, 0x0c0($1); cache %1, 0x0e0($1)\n" \
386 " .set pop\n" \
387 : \
388 : "r" (base), \
389 "i" (op));
390
391#define cache64_unroll32(base,op) \
392 __asm__ __volatile__( \
393 " .set push\n" \
394 " .set noreorder\n" \
395 " .set mips64r6\n" \
396 " .set noat\n" \
397 " cache %1, 0x000(%0); cache %1, 0x040(%0)\n" \
398 " cache %1, 0x080(%0); cache %1, 0x0c0(%0)\n" \
399 " addiu $1, %0, 0x100\n" \
400 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
401 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
402 " addiu $1, %0, 0x100\n" \
403 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
404 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
405 " addiu $1, %0, 0x100\n" \
406 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
407 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
408 " addiu $1, %0, 0x100\n" \
409 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
410 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
411 " addiu $1, %0, 0x100\n" \
412 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
413 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
414 " addiu $1, %0, 0x100\n" \
415 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
416 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
417 " addiu $1, %0, 0x100\n" \
418 " cache %1, 0x000($1); cache %1, 0x040($1)\n" \
419 " cache %1, 0x080($1); cache %1, 0x0c0($1)\n" \
420 " .set pop\n" \
421 : \
422 : "r" (base), \
423 "i" (op));
424
425#define cache128_unroll32(base,op) \
426 __asm__ __volatile__( \
427 " .set push\n" \
428 " .set noreorder\n" \
429 " .set mips64r6\n" \
430 " .set noat\n" \
431 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
432 " addiu $1, %0, 0x100\n" \
433 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
434 " addiu $1, %0, 0x100\n" \
435 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
436 " addiu $1, %0, 0x100\n" \
437 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
438 " addiu $1, %0, 0x100\n" \
439 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
440 " addiu $1, %0, 0x100\n" \
441 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
442 " addiu $1, %0, 0x100\n" \
443 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
444 " addiu $1, %0, 0x100\n" \
445 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
446 " addiu $1, %0, 0x100\n" \
447 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
448 " addiu $1, %0, 0x100\n" \
449 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
450 " addiu $1, %0, 0x100\n" \
451 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
452 " addiu $1, %0, 0x100\n" \
453 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
454 " addiu $1, %0, 0x100\n" \
455 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
456 " addiu $1, %0, 0x100\n" \
457 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
458 " addiu $1, %0, 0x100\n" \
459 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
460 " addiu $1, %0, 0x100\n" \
461 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
462 " addiu $1, %0, 0x100\n" \
463 " cache %1, 0x000(%0); cache %1, 0x080(%0)\n" \
464 " addiu $1, %0, 0x100\n" \
465 " .set pop\n" \
466 : \
467 : "r" (base), \
468 "i" (op));
469#endif /* CONFIG_CPU_MIPSR6 */
470
325/* 471/*
326 * Perform the cache operation specified by op using a user mode virtual 472 * Perform the cache operation specified by op using a user mode virtual
327 * address while in kernel mode. 473 * address while in kernel mode.
diff --git a/arch/mips/include/asm/sgialib.h b/arch/mips/include/asm/sgialib.h
index 753275accd18..195db5045ae5 100644
--- a/arch/mips/include/asm/sgialib.h
+++ b/arch/mips/include/asm/sgialib.h
@@ -11,6 +11,7 @@
11#ifndef _ASM_SGIALIB_H 11#ifndef _ASM_SGIALIB_H
12#define _ASM_SGIALIB_H 12#define _ASM_SGIALIB_H
13 13
14#include <linux/compiler.h>
14#include <asm/sgiarcs.h> 15#include <asm/sgiarcs.h>
15 16
16extern struct linux_romvec *romvec; 17extern struct linux_romvec *romvec;
@@ -70,8 +71,11 @@ extern LONG ArcRead(ULONG fd, PVOID buf, ULONG num, PULONG cnt);
70extern LONG ArcWrite(ULONG fd, PVOID buf, ULONG num, PULONG cnt); 71extern LONG ArcWrite(ULONG fd, PVOID buf, ULONG num, PULONG cnt);
71 72
72/* Misc. routines. */ 73/* Misc. routines. */
73extern VOID ArcReboot(VOID) __attribute__((noreturn)); 74extern VOID ArcHalt(VOID) __noreturn;
74extern VOID ArcEnterInteractiveMode(VOID) __attribute__((noreturn)); 75extern VOID ArcPowerDown(VOID) __noreturn;
76extern VOID ArcRestart(VOID) __noreturn;
77extern VOID ArcReboot(VOID) __noreturn;
78extern VOID ArcEnterInteractiveMode(VOID) __noreturn;
75extern VOID ArcFlushAllCaches(VOID); 79extern VOID ArcFlushAllCaches(VOID);
76extern DISPLAY_STATUS *ArcGetDisplayStatus(ULONG FileID); 80extern DISPLAY_STATUS *ArcGetDisplayStatus(ULONG FileID);
77 81
diff --git a/arch/mips/include/asm/siginfo.h b/arch/mips/include/asm/siginfo.h
deleted file mode 100644
index dd9a762646fc..000000000000
--- a/arch/mips/include/asm/siginfo.h
+++ /dev/null
@@ -1,29 +0,0 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (C) 1998, 1999, 2001, 2003 Ralf Baechle
7 * Copyright (C) 2000, 2001 Silicon Graphics, Inc.
8 */
9#ifndef _ASM_SIGINFO_H
10#define _ASM_SIGINFO_H
11
12#include <uapi/asm/siginfo.h>
13
14
15/*
16 * Duplicated here because of <asm-generic/siginfo.h> braindamage ...
17 */
18#include <linux/string.h>
19
20static inline void copy_siginfo(struct siginfo *to, struct siginfo *from)
21{
22 if (from->si_code < 0)
23 memcpy(to, from, sizeof(*to));
24 else
25 /* _sigchld is currently the largest know union member */
26 memcpy(to, from, 3*sizeof(int) + sizeof(from->_sifields._sigchld));
27}
28
29#endif /* _ASM_SIGINFO_H */
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index c6d06d383ef9..b4548690ade9 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -89,7 +89,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
89 " subu %[ticket], %[ticket], 1 \n" 89 " subu %[ticket], %[ticket], 1 \n"
90 " .previous \n" 90 " .previous \n"
91 " .set pop \n" 91 " .set pop \n"
92 : [ticket_ptr] "+" GCC_OFF12_ASM() (lock->lock), 92 : [ticket_ptr] "+" GCC_OFF_SMALL_ASM() (lock->lock),
93 [serving_now_ptr] "+m" (lock->h.serving_now), 93 [serving_now_ptr] "+m" (lock->h.serving_now),
94 [ticket] "=&r" (tmp), 94 [ticket] "=&r" (tmp),
95 [my_ticket] "=&r" (my_ticket) 95 [my_ticket] "=&r" (my_ticket)
@@ -122,7 +122,7 @@ static inline void arch_spin_lock(arch_spinlock_t *lock)
122 " subu %[ticket], %[ticket], 1 \n" 122 " subu %[ticket], %[ticket], 1 \n"
123 " .previous \n" 123 " .previous \n"
124 " .set pop \n" 124 " .set pop \n"
125 : [ticket_ptr] "+" GCC_OFF12_ASM() (lock->lock), 125 : [ticket_ptr] "+" GCC_OFF_SMALL_ASM() (lock->lock),
126 [serving_now_ptr] "+m" (lock->h.serving_now), 126 [serving_now_ptr] "+m" (lock->h.serving_now),
127 [ticket] "=&r" (tmp), 127 [ticket] "=&r" (tmp),
128 [my_ticket] "=&r" (my_ticket) 128 [my_ticket] "=&r" (my_ticket)
@@ -164,7 +164,7 @@ static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock)
164 " li %[ticket], 0 \n" 164 " li %[ticket], 0 \n"
165 " .previous \n" 165 " .previous \n"
166 " .set pop \n" 166 " .set pop \n"
167 : [ticket_ptr] "+" GCC_OFF12_ASM() (lock->lock), 167 : [ticket_ptr] "+" GCC_OFF_SMALL_ASM() (lock->lock),
168 [ticket] "=&r" (tmp), 168 [ticket] "=&r" (tmp),
169 [my_ticket] "=&r" (tmp2), 169 [my_ticket] "=&r" (tmp2),
170 [now_serving] "=&r" (tmp3) 170 [now_serving] "=&r" (tmp3)
@@ -188,7 +188,7 @@ static inline unsigned int arch_spin_trylock(arch_spinlock_t *lock)
188 " li %[ticket], 0 \n" 188 " li %[ticket], 0 \n"
189 " .previous \n" 189 " .previous \n"
190 " .set pop \n" 190 " .set pop \n"
191 : [ticket_ptr] "+" GCC_OFF12_ASM() (lock->lock), 191 : [ticket_ptr] "+" GCC_OFF_SMALL_ASM() (lock->lock),
192 [ticket] "=&r" (tmp), 192 [ticket] "=&r" (tmp),
193 [my_ticket] "=&r" (tmp2), 193 [my_ticket] "=&r" (tmp2),
194 [now_serving] "=&r" (tmp3) 194 [now_serving] "=&r" (tmp3)
@@ -235,8 +235,8 @@ static inline void arch_read_lock(arch_rwlock_t *rw)
235 " beqzl %1, 1b \n" 235 " beqzl %1, 1b \n"
236 " nop \n" 236 " nop \n"
237 " .set reorder \n" 237 " .set reorder \n"
238 : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) 238 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp)
239 : GCC_OFF12_ASM() (rw->lock) 239 : GCC_OFF_SMALL_ASM() (rw->lock)
240 : "memory"); 240 : "memory");
241 } else { 241 } else {
242 do { 242 do {
@@ -245,8 +245,8 @@ static inline void arch_read_lock(arch_rwlock_t *rw)
245 " bltz %1, 1b \n" 245 " bltz %1, 1b \n"
246 " addu %1, 1 \n" 246 " addu %1, 1 \n"
247 "2: sc %1, %0 \n" 247 "2: sc %1, %0 \n"
248 : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) 248 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp)
249 : GCC_OFF12_ASM() (rw->lock) 249 : GCC_OFF_SMALL_ASM() (rw->lock)
250 : "memory"); 250 : "memory");
251 } while (unlikely(!tmp)); 251 } while (unlikely(!tmp));
252 } 252 }
@@ -254,9 +254,6 @@ static inline void arch_read_lock(arch_rwlock_t *rw)
254 smp_llsc_mb(); 254 smp_llsc_mb();
255} 255}
256 256
257/* Note the use of sub, not subu which will make the kernel die with an
258 overflow exception if we ever try to unlock an rwlock that is already
259 unlocked or is being held by a writer. */
260static inline void arch_read_unlock(arch_rwlock_t *rw) 257static inline void arch_read_unlock(arch_rwlock_t *rw)
261{ 258{
262 unsigned int tmp; 259 unsigned int tmp;
@@ -266,20 +263,20 @@ static inline void arch_read_unlock(arch_rwlock_t *rw)
266 if (R10000_LLSC_WAR) { 263 if (R10000_LLSC_WAR) {
267 __asm__ __volatile__( 264 __asm__ __volatile__(
268 "1: ll %1, %2 # arch_read_unlock \n" 265 "1: ll %1, %2 # arch_read_unlock \n"
269 " sub %1, 1 \n" 266 " addiu %1, 1 \n"
270 " sc %1, %0 \n" 267 " sc %1, %0 \n"
271 " beqzl %1, 1b \n" 268 " beqzl %1, 1b \n"
272 : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) 269 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp)
273 : GCC_OFF12_ASM() (rw->lock) 270 : GCC_OFF_SMALL_ASM() (rw->lock)
274 : "memory"); 271 : "memory");
275 } else { 272 } else {
276 do { 273 do {
277 __asm__ __volatile__( 274 __asm__ __volatile__(
278 "1: ll %1, %2 # arch_read_unlock \n" 275 "1: ll %1, %2 # arch_read_unlock \n"
279 " sub %1, 1 \n" 276 " addiu %1, -1 \n"
280 " sc %1, %0 \n" 277 " sc %1, %0 \n"
281 : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) 278 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp)
282 : GCC_OFF12_ASM() (rw->lock) 279 : GCC_OFF_SMALL_ASM() (rw->lock)
283 : "memory"); 280 : "memory");
284 } while (unlikely(!tmp)); 281 } while (unlikely(!tmp));
285 } 282 }
@@ -299,8 +296,8 @@ static inline void arch_write_lock(arch_rwlock_t *rw)
299 " beqzl %1, 1b \n" 296 " beqzl %1, 1b \n"
300 " nop \n" 297 " nop \n"
301 " .set reorder \n" 298 " .set reorder \n"
302 : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) 299 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp)
303 : GCC_OFF12_ASM() (rw->lock) 300 : GCC_OFF_SMALL_ASM() (rw->lock)
304 : "memory"); 301 : "memory");
305 } else { 302 } else {
306 do { 303 do {
@@ -309,8 +306,8 @@ static inline void arch_write_lock(arch_rwlock_t *rw)
309 " bnez %1, 1b \n" 306 " bnez %1, 1b \n"
310 " lui %1, 0x8000 \n" 307 " lui %1, 0x8000 \n"
311 "2: sc %1, %0 \n" 308 "2: sc %1, %0 \n"
312 : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp) 309 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp)
313 : GCC_OFF12_ASM() (rw->lock) 310 : GCC_OFF_SMALL_ASM() (rw->lock)
314 : "memory"); 311 : "memory");
315 } while (unlikely(!tmp)); 312 } while (unlikely(!tmp));
316 } 313 }
@@ -349,8 +346,8 @@ static inline int arch_read_trylock(arch_rwlock_t *rw)
349 __WEAK_LLSC_MB 346 __WEAK_LLSC_MB
350 " li %2, 1 \n" 347 " li %2, 1 \n"
351 "2: \n" 348 "2: \n"
352 : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp), "=&r" (ret) 349 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp), "=&r" (ret)
353 : GCC_OFF12_ASM() (rw->lock) 350 : GCC_OFF_SMALL_ASM() (rw->lock)
354 : "memory"); 351 : "memory");
355 } else { 352 } else {
356 __asm__ __volatile__( 353 __asm__ __volatile__(
@@ -366,8 +363,8 @@ static inline int arch_read_trylock(arch_rwlock_t *rw)
366 __WEAK_LLSC_MB 363 __WEAK_LLSC_MB
367 " li %2, 1 \n" 364 " li %2, 1 \n"
368 "2: \n" 365 "2: \n"
369 : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp), "=&r" (ret) 366 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp), "=&r" (ret)
370 : GCC_OFF12_ASM() (rw->lock) 367 : GCC_OFF_SMALL_ASM() (rw->lock)
371 : "memory"); 368 : "memory");
372 } 369 }
373 370
@@ -393,8 +390,8 @@ static inline int arch_write_trylock(arch_rwlock_t *rw)
393 " li %2, 1 \n" 390 " li %2, 1 \n"
394 " .set reorder \n" 391 " .set reorder \n"
395 "2: \n" 392 "2: \n"
396 : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp), "=&r" (ret) 393 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp), "=&r" (ret)
397 : GCC_OFF12_ASM() (rw->lock) 394 : GCC_OFF_SMALL_ASM() (rw->lock)
398 : "memory"); 395 : "memory");
399 } else { 396 } else {
400 do { 397 do {
@@ -406,9 +403,9 @@ static inline int arch_write_trylock(arch_rwlock_t *rw)
406 " sc %1, %0 \n" 403 " sc %1, %0 \n"
407 " li %2, 1 \n" 404 " li %2, 1 \n"
408 "2: \n" 405 "2: \n"
409 : "=" GCC_OFF12_ASM() (rw->lock), "=&r" (tmp), 406 : "=" GCC_OFF_SMALL_ASM() (rw->lock), "=&r" (tmp),
410 "=&r" (ret) 407 "=&r" (ret)
411 : GCC_OFF12_ASM() (rw->lock) 408 : GCC_OFF_SMALL_ASM() (rw->lock)
412 : "memory"); 409 : "memory");
413 } while (unlikely(!tmp)); 410 } while (unlikely(!tmp));
414 411
diff --git a/arch/mips/include/asm/spram.h b/arch/mips/include/asm/spram.h
index 0b89006e4907..0f90d88e464d 100644
--- a/arch/mips/include/asm/spram.h
+++ b/arch/mips/include/asm/spram.h
@@ -1,10 +1,10 @@
1#ifndef _MIPS_SPRAM_H 1#ifndef _MIPS_SPRAM_H
2#define _MIPS_SPRAM_H 2#define _MIPS_SPRAM_H
3 3
4#ifdef CONFIG_CPU_MIPSR2 4#if defined(CONFIG_MIPS_SPRAM)
5extern __init void spram_config(void); 5extern __init void spram_config(void);
6#else 6#else
7static inline void spram_config(void) { }; 7static inline void spram_config(void) { };
8#endif /* CONFIG_CPU_MIPSR2 */ 8#endif /* CONFIG_MIPS_SPRAM */
9 9
10#endif /* _MIPS_SPRAM_H */ 10#endif /* _MIPS_SPRAM_H */
diff --git a/arch/mips/include/asm/stackframe.h b/arch/mips/include/asm/stackframe.h
index b188c797565c..28d6d9364bd1 100644
--- a/arch/mips/include/asm/stackframe.h
+++ b/arch/mips/include/asm/stackframe.h
@@ -40,7 +40,7 @@
40 LONG_S v1, PT_HI(sp) 40 LONG_S v1, PT_HI(sp)
41 mflhxu v1 41 mflhxu v1
42 LONG_S v1, PT_ACX(sp) 42 LONG_S v1, PT_ACX(sp)
43#else 43#elif !defined(CONFIG_CPU_MIPSR6)
44 mfhi v1 44 mfhi v1
45#endif 45#endif
46#ifdef CONFIG_32BIT 46#ifdef CONFIG_32BIT
@@ -50,7 +50,7 @@
50 LONG_S $10, PT_R10(sp) 50 LONG_S $10, PT_R10(sp)
51 LONG_S $11, PT_R11(sp) 51 LONG_S $11, PT_R11(sp)
52 LONG_S $12, PT_R12(sp) 52 LONG_S $12, PT_R12(sp)
53#ifndef CONFIG_CPU_HAS_SMARTMIPS 53#if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
54 LONG_S v1, PT_HI(sp) 54 LONG_S v1, PT_HI(sp)
55 mflo v1 55 mflo v1
56#endif 56#endif
@@ -58,7 +58,7 @@
58 LONG_S $14, PT_R14(sp) 58 LONG_S $14, PT_R14(sp)
59 LONG_S $15, PT_R15(sp) 59 LONG_S $15, PT_R15(sp)
60 LONG_S $24, PT_R24(sp) 60 LONG_S $24, PT_R24(sp)
61#ifndef CONFIG_CPU_HAS_SMARTMIPS 61#if !defined(CONFIG_CPU_HAS_SMARTMIPS) && !defined(CONFIG_CPU_MIPSR6)
62 LONG_S v1, PT_LO(sp) 62 LONG_S v1, PT_LO(sp)
63#endif 63#endif
64#ifdef CONFIG_CPU_CAVIUM_OCTEON 64#ifdef CONFIG_CPU_CAVIUM_OCTEON
@@ -226,7 +226,7 @@
226 mtlhx $24 226 mtlhx $24
227 LONG_L $24, PT_LO(sp) 227 LONG_L $24, PT_LO(sp)
228 mtlhx $24 228 mtlhx $24
229#else 229#elif !defined(CONFIG_CPU_MIPSR6)
230 LONG_L $24, PT_LO(sp) 230 LONG_L $24, PT_LO(sp)
231 mtlo $24 231 mtlo $24
232 LONG_L $24, PT_HI(sp) 232 LONG_L $24, PT_HI(sp)
diff --git a/arch/mips/include/asm/switch_to.h b/arch/mips/include/asm/switch_to.h
index b928b6f898cd..e92d6c4b5ed1 100644
--- a/arch/mips/include/asm/switch_to.h
+++ b/arch/mips/include/asm/switch_to.h
@@ -75,9 +75,12 @@ do { \
75#endif 75#endif
76 76
77#define __clear_software_ll_bit() \ 77#define __clear_software_ll_bit() \
78do { \ 78do { if (cpu_has_rw_llb) { \
79 if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc) \ 79 write_c0_lladdr(0); \
80 ll_bit = 0; \ 80 } else { \
81 if (!__builtin_constant_p(cpu_has_llsc) || !cpu_has_llsc)\
82 ll_bit = 0; \
83 } \
81} while (0) 84} while (0)
82 85
83#define switch_to(prev, next, last) \ 86#define switch_to(prev, next, last) \
diff --git a/arch/mips/include/asm/thread_info.h b/arch/mips/include/asm/thread_info.h
index 9e1295f874f0..55ed6602204c 100644
--- a/arch/mips/include/asm/thread_info.h
+++ b/arch/mips/include/asm/thread_info.h
@@ -28,7 +28,7 @@ struct thread_info {
28 unsigned long tp_value; /* thread pointer */ 28 unsigned long tp_value; /* thread pointer */
29 __u32 cpu; /* current CPU */ 29 __u32 cpu; /* current CPU */
30 int preempt_count; /* 0 => preemptable, <0 => BUG */ 30 int preempt_count; /* 0 => preemptable, <0 => BUG */
31 31 int r2_emul_return; /* 1 => Returning from R2 emulator */
32 mm_segment_t addr_limit; /* 32 mm_segment_t addr_limit; /*
33 * thread address space limit: 33 * thread address space limit:
34 * 0x7fffffff for user-thead 34 * 0x7fffffff for user-thead
diff --git a/arch/mips/include/uapi/asm/inst.h b/arch/mips/include/uapi/asm/inst.h
index 89c22433b1c6..fc0cf5ac0cf7 100644
--- a/arch/mips/include/uapi/asm/inst.h
+++ b/arch/mips/include/uapi/asm/inst.h
@@ -21,20 +21,20 @@
21enum major_op { 21enum major_op {
22 spec_op, bcond_op, j_op, jal_op, 22 spec_op, bcond_op, j_op, jal_op,
23 beq_op, bne_op, blez_op, bgtz_op, 23 beq_op, bne_op, blez_op, bgtz_op,
24 addi_op, addiu_op, slti_op, sltiu_op, 24 addi_op, cbcond0_op = addi_op, addiu_op, slti_op, sltiu_op,
25 andi_op, ori_op, xori_op, lui_op, 25 andi_op, ori_op, xori_op, lui_op,
26 cop0_op, cop1_op, cop2_op, cop1x_op, 26 cop0_op, cop1_op, cop2_op, cop1x_op,
27 beql_op, bnel_op, blezl_op, bgtzl_op, 27 beql_op, bnel_op, blezl_op, bgtzl_op,
28 daddi_op, daddiu_op, ldl_op, ldr_op, 28 daddi_op, cbcond1_op = daddi_op, daddiu_op, ldl_op, ldr_op,
29 spec2_op, jalx_op, mdmx_op, spec3_op, 29 spec2_op, jalx_op, mdmx_op, spec3_op,
30 lb_op, lh_op, lwl_op, lw_op, 30 lb_op, lh_op, lwl_op, lw_op,
31 lbu_op, lhu_op, lwr_op, lwu_op, 31 lbu_op, lhu_op, lwr_op, lwu_op,
32 sb_op, sh_op, swl_op, sw_op, 32 sb_op, sh_op, swl_op, sw_op,
33 sdl_op, sdr_op, swr_op, cache_op, 33 sdl_op, sdr_op, swr_op, cache_op,
34 ll_op, lwc1_op, lwc2_op, pref_op, 34 ll_op, lwc1_op, lwc2_op, bc6_op = lwc2_op, pref_op,
35 lld_op, ldc1_op, ldc2_op, ld_op, 35 lld_op, ldc1_op, ldc2_op, beqzcjic_op = ldc2_op, ld_op,
36 sc_op, swc1_op, swc2_op, major_3b_op, 36 sc_op, swc1_op, swc2_op, balc6_op = swc2_op, major_3b_op,
37 scd_op, sdc1_op, sdc2_op, sd_op 37 scd_op, sdc1_op, sdc2_op, bnezcjialc_op = sdc2_op, sd_op
38}; 38};
39 39
40/* 40/*
@@ -83,9 +83,12 @@ enum spec3_op {
83 swe_op = 0x1f, bshfl_op = 0x20, 83 swe_op = 0x1f, bshfl_op = 0x20,
84 swle_op = 0x21, swre_op = 0x22, 84 swle_op = 0x21, swre_op = 0x22,
85 prefe_op = 0x23, dbshfl_op = 0x24, 85 prefe_op = 0x23, dbshfl_op = 0x24,
86 lbue_op = 0x28, lhue_op = 0x29, 86 cache6_op = 0x25, sc6_op = 0x26,
87 lbe_op = 0x2c, lhe_op = 0x2d, 87 scd6_op = 0x27, lbue_op = 0x28,
88 lle_op = 0x2e, lwe_op = 0x2f, 88 lhue_op = 0x29, lbe_op = 0x2c,
89 lhe_op = 0x2d, lle_op = 0x2e,
90 lwe_op = 0x2f, pref6_op = 0x35,
91 ll6_op = 0x36, lld6_op = 0x37,
89 rdhwr_op = 0x3b 92 rdhwr_op = 0x3b
90}; 93};
91 94
@@ -112,7 +115,8 @@ enum cop_op {
112 mfhc_op = 0x03, mtc_op = 0x04, 115 mfhc_op = 0x03, mtc_op = 0x04,
113 dmtc_op = 0x05, ctc_op = 0x06, 116 dmtc_op = 0x05, ctc_op = 0x06,
114 mthc0_op = 0x06, mthc_op = 0x07, 117 mthc0_op = 0x06, mthc_op = 0x07,
115 bc_op = 0x08, cop_op = 0x10, 118 bc_op = 0x08, bc1eqz_op = 0x09,
119 bc1nez_op = 0x0d, cop_op = 0x10,
116 copm_op = 0x18 120 copm_op = 0x18
117}; 121};
118 122
diff --git a/arch/mips/include/uapi/asm/siginfo.h b/arch/mips/include/uapi/asm/siginfo.h
index d08f83f19db5..2cb7fdead570 100644
--- a/arch/mips/include/uapi/asm/siginfo.h
+++ b/arch/mips/include/uapi/asm/siginfo.h
@@ -16,13 +16,6 @@
16#define HAVE_ARCH_SIGINFO_T 16#define HAVE_ARCH_SIGINFO_T
17 17
18/* 18/*
19 * We duplicate the generic versions - <asm-generic/siginfo.h> is just borked
20 * by design ...
21 */
22#define HAVE_ARCH_COPY_SIGINFO
23struct siginfo;
24
25/*
26 * Careful to keep union _sifields from shifting ... 19 * Careful to keep union _sifields from shifting ...
27 */ 20 */
28#if _MIPS_SZLONG == 32 21#if _MIPS_SZLONG == 32
@@ -35,8 +28,9 @@ struct siginfo;
35 28
36#define __ARCH_SIGSYS 29#define __ARCH_SIGSYS
37 30
38#include <asm-generic/siginfo.h> 31#include <uapi/asm-generic/siginfo.h>
39 32
33/* We can't use generic siginfo_t, because our si_code and si_errno are swapped */
40typedef struct siginfo { 34typedef struct siginfo {
41 int si_signo; 35 int si_signo;
42 int si_code; 36 int si_code;
@@ -124,5 +118,6 @@ typedef struct siginfo {
124#define SI_TIMER __SI_CODE(__SI_TIMER, -3) /* sent by timer expiration */ 118#define SI_TIMER __SI_CODE(__SI_TIMER, -3) /* sent by timer expiration */
125#define SI_MESGQ __SI_CODE(__SI_MESGQ, -4) /* sent by real time mesq state change */ 119#define SI_MESGQ __SI_CODE(__SI_MESGQ, -4) /* sent by real time mesq state change */
126 120
121#include <asm-generic/siginfo.h>
127 122
128#endif /* _UAPI_ASM_SIGINFO_H */ 123#endif /* _UAPI_ASM_SIGINFO_H */
diff --git a/arch/mips/kernel/Makefile b/arch/mips/kernel/Makefile
index 92987d1bbe5f..d3d2ff2d76dc 100644
--- a/arch/mips/kernel/Makefile
+++ b/arch/mips/kernel/Makefile
@@ -52,7 +52,7 @@ obj-$(CONFIG_MIPS_MT_SMP) += smp-mt.o
52obj-$(CONFIG_MIPS_CMP) += smp-cmp.o 52obj-$(CONFIG_MIPS_CMP) += smp-cmp.o
53obj-$(CONFIG_MIPS_CPS) += smp-cps.o cps-vec.o 53obj-$(CONFIG_MIPS_CPS) += smp-cps.o cps-vec.o
54obj-$(CONFIG_MIPS_GIC_IPI) += smp-gic.o 54obj-$(CONFIG_MIPS_GIC_IPI) += smp-gic.o
55obj-$(CONFIG_CPU_MIPSR2) += spram.o 55obj-$(CONFIG_MIPS_SPRAM) += spram.o
56 56
57obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o 57obj-$(CONFIG_MIPS_VPE_LOADER) += vpe.o
58obj-$(CONFIG_MIPS_VPE_LOADER_CMP) += vpe-cmp.o 58obj-$(CONFIG_MIPS_VPE_LOADER_CMP) += vpe-cmp.o
@@ -90,6 +90,7 @@ obj-$(CONFIG_EARLY_PRINTK) += early_printk.o
90obj-$(CONFIG_EARLY_PRINTK_8250) += early_printk_8250.o 90obj-$(CONFIG_EARLY_PRINTK_8250) += early_printk_8250.o
91obj-$(CONFIG_SPINLOCK_TEST) += spinlock_test.o 91obj-$(CONFIG_SPINLOCK_TEST) += spinlock_test.o
92obj-$(CONFIG_MIPS_MACHINE) += mips_machine.o 92obj-$(CONFIG_MIPS_MACHINE) += mips_machine.o
93obj-$(CONFIG_MIPSR2_TO_R6_EMULATOR) += mips-r2-to-r6-emul.o
93 94
94CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(KBUILD_CFLAGS) -Wa,-mdaddi -c -o /dev/null -x c /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi) 95CFLAGS_cpu-bugs64.o = $(shell if $(CC) $(KBUILD_CFLAGS) -Wa,-mdaddi -c -o /dev/null -x c /dev/null >/dev/null 2>&1; then echo "-DHAVE_AS_SET_DADDI"; fi)
95 96
diff --git a/arch/mips/kernel/asm-offsets.c b/arch/mips/kernel/asm-offsets.c
index 3b2dfdb4865f..750d67ac41e9 100644
--- a/arch/mips/kernel/asm-offsets.c
+++ b/arch/mips/kernel/asm-offsets.c
@@ -97,6 +97,7 @@ void output_thread_info_defines(void)
97 OFFSET(TI_TP_VALUE, thread_info, tp_value); 97 OFFSET(TI_TP_VALUE, thread_info, tp_value);
98 OFFSET(TI_CPU, thread_info, cpu); 98 OFFSET(TI_CPU, thread_info, cpu);
99 OFFSET(TI_PRE_COUNT, thread_info, preempt_count); 99 OFFSET(TI_PRE_COUNT, thread_info, preempt_count);
100 OFFSET(TI_R2_EMUL_RET, thread_info, r2_emul_return);
100 OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit); 101 OFFSET(TI_ADDR_LIMIT, thread_info, addr_limit);
101 OFFSET(TI_REGS, thread_info, regs); 102 OFFSET(TI_REGS, thread_info, regs);
102 DEFINE(_THREAD_SIZE, THREAD_SIZE); 103 DEFINE(_THREAD_SIZE, THREAD_SIZE);
@@ -381,6 +382,7 @@ void output_octeon_cop2_state_defines(void)
381 OFFSET(OCTEON_CP2_GFM_RESULT, octeon_cop2_state, cop2_gfm_result); 382 OFFSET(OCTEON_CP2_GFM_RESULT, octeon_cop2_state, cop2_gfm_result);
382 OFFSET(OCTEON_CP2_HSH_DATW, octeon_cop2_state, cop2_hsh_datw); 383 OFFSET(OCTEON_CP2_HSH_DATW, octeon_cop2_state, cop2_hsh_datw);
383 OFFSET(OCTEON_CP2_HSH_IVW, octeon_cop2_state, cop2_hsh_ivw); 384 OFFSET(OCTEON_CP2_HSH_IVW, octeon_cop2_state, cop2_hsh_ivw);
385 OFFSET(OCTEON_CP2_SHA3, octeon_cop2_state, cop2_sha3);
384 OFFSET(THREAD_CP2, task_struct, thread.cp2); 386 OFFSET(THREAD_CP2, task_struct, thread.cp2);
385 OFFSET(THREAD_CVMSEG, task_struct, thread.cvmseg.cvmseg); 387 OFFSET(THREAD_CVMSEG, task_struct, thread.cvmseg.cvmseg);
386 BLANK(); 388 BLANK();
diff --git a/arch/mips/kernel/branch.c b/arch/mips/kernel/branch.c
index 4d7d99d601cc..c2e0f45ddf6c 100644
--- a/arch/mips/kernel/branch.c
+++ b/arch/mips/kernel/branch.c
@@ -16,6 +16,7 @@
16#include <asm/fpu.h> 16#include <asm/fpu.h>
17#include <asm/fpu_emulator.h> 17#include <asm/fpu_emulator.h>
18#include <asm/inst.h> 18#include <asm/inst.h>
19#include <asm/mips-r2-to-r6-emul.h>
19#include <asm/ptrace.h> 20#include <asm/ptrace.h>
20#include <asm/uaccess.h> 21#include <asm/uaccess.h>
21 22
@@ -399,11 +400,21 @@ int __MIPS16e_compute_return_epc(struct pt_regs *regs)
399 * @returns: -EFAULT on error and forces SIGBUS, and on success 400 * @returns: -EFAULT on error and forces SIGBUS, and on success
400 * returns 0 or BRANCH_LIKELY_TAKEN as appropriate after 401 * returns 0 or BRANCH_LIKELY_TAKEN as appropriate after
401 * evaluating the branch. 402 * evaluating the branch.
403 *
404 * MIPS R6 Compact branches and forbidden slots:
405 * Compact branches do not throw exceptions because they do
406 * not have delay slots. The forbidden slot instruction ($PC+4)
407 * is only executed if the branch was not taken. Otherwise the
408 * forbidden slot is skipped entirely. This means that the
409 * only possible reason to be here because of a MIPS R6 compact
410 * branch instruction is that the forbidden slot has thrown one.
411 * In that case the branch was not taken, so the EPC can be safely
412 * set to EPC + 8.
402 */ 413 */
403int __compute_return_epc_for_insn(struct pt_regs *regs, 414int __compute_return_epc_for_insn(struct pt_regs *regs,
404 union mips_instruction insn) 415 union mips_instruction insn)
405{ 416{
406 unsigned int bit, fcr31, dspcontrol; 417 unsigned int bit, fcr31, dspcontrol, reg;
407 long epc = regs->cp0_epc; 418 long epc = regs->cp0_epc;
408 int ret = 0; 419 int ret = 0;
409 420
@@ -417,6 +428,8 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
417 regs->regs[insn.r_format.rd] = epc + 8; 428 regs->regs[insn.r_format.rd] = epc + 8;
418 /* Fall through */ 429 /* Fall through */
419 case jr_op: 430 case jr_op:
431 if (NO_R6EMU && insn.r_format.func == jr_op)
432 goto sigill_r6;
420 regs->cp0_epc = regs->regs[insn.r_format.rs]; 433 regs->cp0_epc = regs->regs[insn.r_format.rs];
421 break; 434 break;
422 } 435 }
@@ -429,8 +442,10 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
429 */ 442 */
430 case bcond_op: 443 case bcond_op:
431 switch (insn.i_format.rt) { 444 switch (insn.i_format.rt) {
432 case bltz_op:
433 case bltzl_op: 445 case bltzl_op:
446 if (NO_R6EMU)
447 goto sigill_r6;
448 case bltz_op:
434 if ((long)regs->regs[insn.i_format.rs] < 0) { 449 if ((long)regs->regs[insn.i_format.rs] < 0) {
435 epc = epc + 4 + (insn.i_format.simmediate << 2); 450 epc = epc + 4 + (insn.i_format.simmediate << 2);
436 if (insn.i_format.rt == bltzl_op) 451 if (insn.i_format.rt == bltzl_op)
@@ -440,8 +455,10 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
440 regs->cp0_epc = epc; 455 regs->cp0_epc = epc;
441 break; 456 break;
442 457
443 case bgez_op:
444 case bgezl_op: 458 case bgezl_op:
459 if (NO_R6EMU)
460 goto sigill_r6;
461 case bgez_op:
445 if ((long)regs->regs[insn.i_format.rs] >= 0) { 462 if ((long)regs->regs[insn.i_format.rs] >= 0) {
446 epc = epc + 4 + (insn.i_format.simmediate << 2); 463 epc = epc + 4 + (insn.i_format.simmediate << 2);
447 if (insn.i_format.rt == bgezl_op) 464 if (insn.i_format.rt == bgezl_op)
@@ -453,7 +470,29 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
453 470
454 case bltzal_op: 471 case bltzal_op:
455 case bltzall_op: 472 case bltzall_op:
473 if (NO_R6EMU && (insn.i_format.rs ||
474 insn.i_format.rt == bltzall_op)) {
475 ret = -SIGILL;
476 break;
477 }
456 regs->regs[31] = epc + 8; 478 regs->regs[31] = epc + 8;
479 /*
480 * OK we are here either because we hit a NAL
481 * instruction or because we are emulating an
482 * old bltzal{,l} one. Lets figure out what the
483 * case really is.
484 */
485 if (!insn.i_format.rs) {
486 /*
487 * NAL or BLTZAL with rs == 0
488 * Doesn't matter if we are R6 or not. The
489 * result is the same
490 */
491 regs->cp0_epc += 4 +
492 (insn.i_format.simmediate << 2);
493 break;
494 }
495 /* Now do the real thing for non-R6 BLTZAL{,L} */
457 if ((long)regs->regs[insn.i_format.rs] < 0) { 496 if ((long)regs->regs[insn.i_format.rs] < 0) {
458 epc = epc + 4 + (insn.i_format.simmediate << 2); 497 epc = epc + 4 + (insn.i_format.simmediate << 2);
459 if (insn.i_format.rt == bltzall_op) 498 if (insn.i_format.rt == bltzall_op)
@@ -465,7 +504,29 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
465 504
466 case bgezal_op: 505 case bgezal_op:
467 case bgezall_op: 506 case bgezall_op:
507 if (NO_R6EMU && (insn.i_format.rs ||
508 insn.i_format.rt == bgezall_op)) {
509 ret = -SIGILL;
510 break;
511 }
468 regs->regs[31] = epc + 8; 512 regs->regs[31] = epc + 8;
513 /*
514 * OK we are here either because we hit a BAL
515 * instruction or because we are emulating an
516 * old bgezal{,l} one. Lets figure out what the
517 * case really is.
518 */
519 if (!insn.i_format.rs) {
520 /*
521 * BAL or BGEZAL with rs == 0
522 * Doesn't matter if we are R6 or not. The
523 * result is the same
524 */
525 regs->cp0_epc += 4 +
526 (insn.i_format.simmediate << 2);
527 break;
528 }
529 /* Now do the real thing for non-R6 BGEZAL{,L} */
469 if ((long)regs->regs[insn.i_format.rs] >= 0) { 530 if ((long)regs->regs[insn.i_format.rs] >= 0) {
470 epc = epc + 4 + (insn.i_format.simmediate << 2); 531 epc = epc + 4 + (insn.i_format.simmediate << 2);
471 if (insn.i_format.rt == bgezall_op) 532 if (insn.i_format.rt == bgezall_op)
@@ -477,7 +538,7 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
477 538
478 case bposge32_op: 539 case bposge32_op:
479 if (!cpu_has_dsp) 540 if (!cpu_has_dsp)
480 goto sigill; 541 goto sigill_dsp;
481 542
482 dspcontrol = rddsp(0x01); 543 dspcontrol = rddsp(0x01);
483 544
@@ -508,8 +569,10 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
508 /* 569 /*
509 * These are conditional and in i_format. 570 * These are conditional and in i_format.
510 */ 571 */
511 case beq_op:
512 case beql_op: 572 case beql_op:
573 if (NO_R6EMU)
574 goto sigill_r6;
575 case beq_op:
513 if (regs->regs[insn.i_format.rs] == 576 if (regs->regs[insn.i_format.rs] ==
514 regs->regs[insn.i_format.rt]) { 577 regs->regs[insn.i_format.rt]) {
515 epc = epc + 4 + (insn.i_format.simmediate << 2); 578 epc = epc + 4 + (insn.i_format.simmediate << 2);
@@ -520,8 +583,10 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
520 regs->cp0_epc = epc; 583 regs->cp0_epc = epc;
521 break; 584 break;
522 585
523 case bne_op:
524 case bnel_op: 586 case bnel_op:
587 if (NO_R6EMU)
588 goto sigill_r6;
589 case bne_op:
525 if (regs->regs[insn.i_format.rs] != 590 if (regs->regs[insn.i_format.rs] !=
526 regs->regs[insn.i_format.rt]) { 591 regs->regs[insn.i_format.rt]) {
527 epc = epc + 4 + (insn.i_format.simmediate << 2); 592 epc = epc + 4 + (insn.i_format.simmediate << 2);
@@ -532,8 +597,31 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
532 regs->cp0_epc = epc; 597 regs->cp0_epc = epc;
533 break; 598 break;
534 599
535 case blez_op: /* not really i_format */ 600 case blezl_op: /* not really i_format */
536 case blezl_op: 601 if (NO_R6EMU)
602 goto sigill_r6;
603 case blez_op:
604 /*
605 * Compact branches for R6 for the
606 * blez and blezl opcodes.
607 * BLEZ | rs = 0 | rt != 0 == BLEZALC
608 * BLEZ | rs = rt != 0 == BGEZALC
609 * BLEZ | rs != 0 | rt != 0 == BGEUC
610 * BLEZL | rs = 0 | rt != 0 == BLEZC
611 * BLEZL | rs = rt != 0 == BGEZC
612 * BLEZL | rs != 0 | rt != 0 == BGEC
613 *
614 * For real BLEZ{,L}, rt is always 0.
615 */
616
617 if (cpu_has_mips_r6 && insn.i_format.rt) {
618 if ((insn.i_format.opcode == blez_op) &&
619 ((!insn.i_format.rs && insn.i_format.rt) ||
620 (insn.i_format.rs == insn.i_format.rt)))
621 regs->regs[31] = epc + 4;
622 regs->cp0_epc += 8;
623 break;
624 }
537 /* rt field assumed to be zero */ 625 /* rt field assumed to be zero */
538 if ((long)regs->regs[insn.i_format.rs] <= 0) { 626 if ((long)regs->regs[insn.i_format.rs] <= 0) {
539 epc = epc + 4 + (insn.i_format.simmediate << 2); 627 epc = epc + 4 + (insn.i_format.simmediate << 2);
@@ -544,8 +632,32 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
544 regs->cp0_epc = epc; 632 regs->cp0_epc = epc;
545 break; 633 break;
546 634
547 case bgtz_op:
548 case bgtzl_op: 635 case bgtzl_op:
636 if (NO_R6EMU)
637 goto sigill_r6;
638 case bgtz_op:
639 /*
640 * Compact branches for R6 for the
641 * bgtz and bgtzl opcodes.
642 * BGTZ | rs = 0 | rt != 0 == BGTZALC
643 * BGTZ | rs = rt != 0 == BLTZALC
644 * BGTZ | rs != 0 | rt != 0 == BLTUC
645 * BGTZL | rs = 0 | rt != 0 == BGTZC
646 * BGTZL | rs = rt != 0 == BLTZC
647 * BGTZL | rs != 0 | rt != 0 == BLTC
648 *
649 * *ZALC varint for BGTZ &&& rt != 0
650 * For real GTZ{,L}, rt is always 0.
651 */
652 if (cpu_has_mips_r6 && insn.i_format.rt) {
653 if ((insn.i_format.opcode == blez_op) &&
654 ((!insn.i_format.rs && insn.i_format.rt) ||
655 (insn.i_format.rs == insn.i_format.rt)))
656 regs->regs[31] = epc + 4;
657 regs->cp0_epc += 8;
658 break;
659 }
660
549 /* rt field assumed to be zero */ 661 /* rt field assumed to be zero */
550 if ((long)regs->regs[insn.i_format.rs] > 0) { 662 if ((long)regs->regs[insn.i_format.rs] > 0) {
551 epc = epc + 4 + (insn.i_format.simmediate << 2); 663 epc = epc + 4 + (insn.i_format.simmediate << 2);
@@ -560,40 +672,83 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
560 * And now the FPA/cp1 branch instructions. 672 * And now the FPA/cp1 branch instructions.
561 */ 673 */
562 case cop1_op: 674 case cop1_op:
563 preempt_disable(); 675 if (cpu_has_mips_r6 &&
564 if (is_fpu_owner()) 676 ((insn.i_format.rs == bc1eqz_op) ||
565 fcr31 = read_32bit_cp1_register(CP1_STATUS); 677 (insn.i_format.rs == bc1nez_op))) {
566 else 678 if (!used_math()) { /* First time FPU user */
567 fcr31 = current->thread.fpu.fcr31; 679 ret = init_fpu();
568 preempt_enable(); 680 if (ret && NO_R6EMU) {
569 681 ret = -ret;
570 bit = (insn.i_format.rt >> 2); 682 break;
571 bit += (bit != 0); 683 }
572 bit += 23; 684 ret = 0;
573 switch (insn.i_format.rt & 3) { 685 set_used_math();
574 case 0: /* bc1f */ 686 }
575 case 2: /* bc1fl */ 687 lose_fpu(1); /* Save FPU state for the emulator. */
576 if (~fcr31 & (1 << bit)) { 688 reg = insn.i_format.rt;
577 epc = epc + 4 + (insn.i_format.simmediate << 2); 689 bit = 0;
578 if (insn.i_format.rt == 2) 690 switch (insn.i_format.rs) {
579 ret = BRANCH_LIKELY_TAKEN; 691 case bc1eqz_op:
580 } else 692 /* Test bit 0 */
693 if (get_fpr32(&current->thread.fpu.fpr[reg], 0)
694 & 0x1)
695 bit = 1;
696 break;
697 case bc1nez_op:
698 /* Test bit 0 */
699 if (!(get_fpr32(&current->thread.fpu.fpr[reg], 0)
700 & 0x1))
701 bit = 1;
702 break;
703 }
704 own_fpu(1);
705 if (bit)
706 epc = epc + 4 +
707 (insn.i_format.simmediate << 2);
708 else
581 epc += 8; 709 epc += 8;
582 regs->cp0_epc = epc; 710 regs->cp0_epc = epc;
711
583 break; 712 break;
713 } else {
584 714
585 case 1: /* bc1t */ 715 preempt_disable();
586 case 3: /* bc1tl */ 716 if (is_fpu_owner())
587 if (fcr31 & (1 << bit)) { 717 fcr31 = read_32bit_cp1_register(CP1_STATUS);
588 epc = epc + 4 + (insn.i_format.simmediate << 2); 718 else
589 if (insn.i_format.rt == 3) 719 fcr31 = current->thread.fpu.fcr31;
590 ret = BRANCH_LIKELY_TAKEN; 720 preempt_enable();
591 } else 721
592 epc += 8; 722 bit = (insn.i_format.rt >> 2);
593 regs->cp0_epc = epc; 723 bit += (bit != 0);
724 bit += 23;
725 switch (insn.i_format.rt & 3) {
726 case 0: /* bc1f */
727 case 2: /* bc1fl */
728 if (~fcr31 & (1 << bit)) {
729 epc = epc + 4 +
730 (insn.i_format.simmediate << 2);
731 if (insn.i_format.rt == 2)
732 ret = BRANCH_LIKELY_TAKEN;
733 } else
734 epc += 8;
735 regs->cp0_epc = epc;
736 break;
737
738 case 1: /* bc1t */
739 case 3: /* bc1tl */
740 if (fcr31 & (1 << bit)) {
741 epc = epc + 4 +
742 (insn.i_format.simmediate << 2);
743 if (insn.i_format.rt == 3)
744 ret = BRANCH_LIKELY_TAKEN;
745 } else
746 epc += 8;
747 regs->cp0_epc = epc;
748 break;
749 }
594 break; 750 break;
595 } 751 }
596 break;
597#ifdef CONFIG_CPU_CAVIUM_OCTEON 752#ifdef CONFIG_CPU_CAVIUM_OCTEON
598 case lwc2_op: /* This is bbit0 on Octeon */ 753 case lwc2_op: /* This is bbit0 on Octeon */
599 if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) 754 if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt))
@@ -626,15 +781,72 @@ int __compute_return_epc_for_insn(struct pt_regs *regs,
626 epc += 8; 781 epc += 8;
627 regs->cp0_epc = epc; 782 regs->cp0_epc = epc;
628 break; 783 break;
784#else
785 case bc6_op:
786 /* Only valid for MIPS R6 */
787 if (!cpu_has_mips_r6) {
788 ret = -SIGILL;
789 break;
790 }
791 regs->cp0_epc += 8;
792 break;
793 case balc6_op:
794 if (!cpu_has_mips_r6) {
795 ret = -SIGILL;
796 break;
797 }
798 /* Compact branch: BALC */
799 regs->regs[31] = epc + 4;
800 epc += 4 + (insn.i_format.simmediate << 2);
801 regs->cp0_epc = epc;
802 break;
803 case beqzcjic_op:
804 if (!cpu_has_mips_r6) {
805 ret = -SIGILL;
806 break;
807 }
808 /* Compact branch: BEQZC || JIC */
809 regs->cp0_epc += 8;
810 break;
811 case bnezcjialc_op:
812 if (!cpu_has_mips_r6) {
813 ret = -SIGILL;
814 break;
815 }
816 /* Compact branch: BNEZC || JIALC */
817 if (insn.i_format.rs)
818 regs->regs[31] = epc + 4;
819 regs->cp0_epc += 8;
820 break;
629#endif 821#endif
822 case cbcond0_op:
823 case cbcond1_op:
824 /* Only valid for MIPS R6 */
825 if (!cpu_has_mips_r6) {
826 ret = -SIGILL;
827 break;
828 }
829 /*
830 * Compact branches:
831 * bovc, beqc, beqzalc, bnvc, bnec, bnezlac
832 */
833 if (insn.i_format.rt && !insn.i_format.rs)
834 regs->regs[31] = epc + 4;
835 regs->cp0_epc += 8;
836 break;
630 } 837 }
631 838
632 return ret; 839 return ret;
633 840
634sigill: 841sigill_dsp:
635 printk("%s: DSP branch but not DSP ASE - sending SIGBUS.\n", current->comm); 842 printk("%s: DSP branch but not DSP ASE - sending SIGBUS.\n", current->comm);
636 force_sig(SIGBUS, current); 843 force_sig(SIGBUS, current);
637 return -EFAULT; 844 return -EFAULT;
845sigill_r6:
846 pr_info("%s: R2 branch but r2-to-r6 emulator is not preset - sending SIGILL.\n",
847 current->comm);
848 force_sig(SIGILL, current);
849 return -EFAULT;
638} 850}
639EXPORT_SYMBOL_GPL(__compute_return_epc_for_insn); 851EXPORT_SYMBOL_GPL(__compute_return_epc_for_insn);
640 852
diff --git a/arch/mips/kernel/cevt-r4k.c b/arch/mips/kernel/cevt-r4k.c
index 6acaad0480af..82bd2b278a24 100644
--- a/arch/mips/kernel/cevt-r4k.c
+++ b/arch/mips/kernel/cevt-r4k.c
@@ -11,7 +11,6 @@
11#include <linux/percpu.h> 11#include <linux/percpu.h>
12#include <linux/smp.h> 12#include <linux/smp.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/irqchip/mips-gic.h>
15 14
16#include <asm/time.h> 15#include <asm/time.h>
17#include <asm/cevt-r4k.h> 16#include <asm/cevt-r4k.h>
@@ -40,7 +39,7 @@ int cp0_timer_irq_installed;
40 39
41irqreturn_t c0_compare_interrupt(int irq, void *dev_id) 40irqreturn_t c0_compare_interrupt(int irq, void *dev_id)
42{ 41{
43 const int r2 = cpu_has_mips_r2; 42 const int r2 = cpu_has_mips_r2_r6;
44 struct clock_event_device *cd; 43 struct clock_event_device *cd;
45 int cpu = smp_processor_id(); 44 int cpu = smp_processor_id();
46 45
@@ -85,10 +84,7 @@ void mips_event_handler(struct clock_event_device *dev)
85 */ 84 */
86static int c0_compare_int_pending(void) 85static int c0_compare_int_pending(void)
87{ 86{
88#ifdef CONFIG_MIPS_GIC 87 /* When cpu_has_mips_r2, this checks Cause.TI instead of Cause.IP7 */
89 if (gic_present)
90 return gic_get_timer_pending();
91#endif
92 return (read_c0_cause() >> cp0_compare_irq_shift) & (1ul << CAUSEB_IP); 88 return (read_c0_cause() >> cp0_compare_irq_shift) & (1ul << CAUSEB_IP);
93} 89}
94 90
diff --git a/arch/mips/kernel/cps-vec.S b/arch/mips/kernel/cps-vec.S
index 0384b05ab5a0..55b759a0019e 100644
--- a/arch/mips/kernel/cps-vec.S
+++ b/arch/mips/kernel/cps-vec.S
@@ -99,11 +99,11 @@ not_nmi:
99 xori t2, t1, 0x7 99 xori t2, t1, 0x7
100 beqz t2, 1f 100 beqz t2, 1f
101 li t3, 32 101 li t3, 32
102 addi t1, t1, 1 102 addiu t1, t1, 1
103 sllv t1, t3, t1 103 sllv t1, t3, t1
1041: /* At this point t1 == I-cache sets per way */ 1041: /* At this point t1 == I-cache sets per way */
105 _EXT t2, v0, MIPS_CONF1_IA_SHF, MIPS_CONF1_IA_SZ 105 _EXT t2, v0, MIPS_CONF1_IA_SHF, MIPS_CONF1_IA_SZ
106 addi t2, t2, 1 106 addiu t2, t2, 1
107 mul t1, t1, t0 107 mul t1, t1, t0
108 mul t1, t1, t2 108 mul t1, t1, t2
109 109
@@ -126,11 +126,11 @@ icache_done:
126 xori t2, t1, 0x7 126 xori t2, t1, 0x7
127 beqz t2, 1f 127 beqz t2, 1f
128 li t3, 32 128 li t3, 32
129 addi t1, t1, 1 129 addiu t1, t1, 1
130 sllv t1, t3, t1 130 sllv t1, t3, t1
1311: /* At this point t1 == D-cache sets per way */ 1311: /* At this point t1 == D-cache sets per way */
132 _EXT t2, v0, MIPS_CONF1_DA_SHF, MIPS_CONF1_DA_SZ 132 _EXT t2, v0, MIPS_CONF1_DA_SHF, MIPS_CONF1_DA_SZ
133 addi t2, t2, 1 133 addiu t2, t2, 1
134 mul t1, t1, t0 134 mul t1, t1, t0
135 mul t1, t1, t2 135 mul t1, t1, t2
136 136
@@ -250,7 +250,7 @@ LEAF(mips_cps_core_init)
250 mfc0 t0, CP0_MVPCONF0 250 mfc0 t0, CP0_MVPCONF0
251 srl t0, t0, MVPCONF0_PVPE_SHIFT 251 srl t0, t0, MVPCONF0_PVPE_SHIFT
252 andi t0, t0, (MVPCONF0_PVPE >> MVPCONF0_PVPE_SHIFT) 252 andi t0, t0, (MVPCONF0_PVPE >> MVPCONF0_PVPE_SHIFT)
253 addi t7, t0, 1 253 addiu t7, t0, 1
254 254
255 /* If there's only 1, we're done */ 255 /* If there's only 1, we're done */
256 beqz t0, 2f 256 beqz t0, 2f
@@ -280,7 +280,7 @@ LEAF(mips_cps_core_init)
280 mttc0 t0, CP0_TCHALT 280 mttc0 t0, CP0_TCHALT
281 281
282 /* Next VPE */ 282 /* Next VPE */
283 addi t5, t5, 1 283 addiu t5, t5, 1
284 slt t0, t5, t7 284 slt t0, t5, t7
285 bnez t0, 1b 285 bnez t0, 1b
286 nop 286 nop
@@ -317,7 +317,7 @@ LEAF(mips_cps_boot_vpes)
317 mfc0 t1, CP0_MVPCONF0 317 mfc0 t1, CP0_MVPCONF0
318 srl t1, t1, MVPCONF0_PVPE_SHIFT 318 srl t1, t1, MVPCONF0_PVPE_SHIFT
319 andi t1, t1, MVPCONF0_PVPE >> MVPCONF0_PVPE_SHIFT 319 andi t1, t1, MVPCONF0_PVPE >> MVPCONF0_PVPE_SHIFT
320 addi t1, t1, 1 320 addiu t1, t1, 1
321 321
322 /* Calculate a mask for the VPE ID from EBase.CPUNum */ 322 /* Calculate a mask for the VPE ID from EBase.CPUNum */
323 clz t1, t1 323 clz t1, t1
@@ -424,7 +424,7 @@ LEAF(mips_cps_boot_vpes)
424 424
425 /* Next VPE */ 425 /* Next VPE */
4262: srl t6, t6, 1 4262: srl t6, t6, 1
427 addi t5, t5, 1 427 addiu t5, t5, 1
428 bnez t6, 1b 428 bnez t6, 1b
429 nop 429 nop
430 430
diff --git a/arch/mips/kernel/cpu-bugs64.c b/arch/mips/kernel/cpu-bugs64.c
index 2d80b5f1aeae..09f4034f239f 100644
--- a/arch/mips/kernel/cpu-bugs64.c
+++ b/arch/mips/kernel/cpu-bugs64.c
@@ -244,7 +244,7 @@ static inline void check_daddi(void)
244 panic(bug64hit, !DADDI_WAR ? daddiwar : nowar); 244 panic(bug64hit, !DADDI_WAR ? daddiwar : nowar);
245} 245}
246 246
247int daddiu_bug = -1; 247int daddiu_bug = config_enabled(CONFIG_CPU_MIPSR6) ? 0 : -1;
248 248
249static inline void check_daddiu(void) 249static inline void check_daddiu(void)
250{ 250{
@@ -314,11 +314,14 @@ static inline void check_daddiu(void)
314 314
315void __init check_bugs64_early(void) 315void __init check_bugs64_early(void)
316{ 316{
317 check_mult_sh(); 317 if (!config_enabled(CONFIG_CPU_MIPSR6)) {
318 check_daddiu(); 318 check_mult_sh();
319 check_daddiu();
320 }
319} 321}
320 322
321void __init check_bugs64(void) 323void __init check_bugs64(void)
322{ 324{
323 check_daddi(); 325 if (!config_enabled(CONFIG_CPU_MIPSR6))
326 check_daddi();
324} 327}
diff --git a/arch/mips/kernel/cpu-probe.c b/arch/mips/kernel/cpu-probe.c
index 5342674842f5..48dfb9de853d 100644
--- a/arch/mips/kernel/cpu-probe.c
+++ b/arch/mips/kernel/cpu-probe.c
@@ -237,6 +237,13 @@ static void set_isa(struct cpuinfo_mips *c, unsigned int isa)
237 c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III; 237 c->isa_level |= MIPS_CPU_ISA_II | MIPS_CPU_ISA_III;
238 break; 238 break;
239 239
240 /* R6 incompatible with everything else */
241 case MIPS_CPU_ISA_M64R6:
242 c->isa_level |= MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R6;
243 case MIPS_CPU_ISA_M32R6:
244 c->isa_level |= MIPS_CPU_ISA_M32R6;
245 /* Break here so we don't add incompatible ISAs */
246 break;
240 case MIPS_CPU_ISA_M32R2: 247 case MIPS_CPU_ISA_M32R2:
241 c->isa_level |= MIPS_CPU_ISA_M32R2; 248 c->isa_level |= MIPS_CPU_ISA_M32R2;
242 case MIPS_CPU_ISA_M32R1: 249 case MIPS_CPU_ISA_M32R1:
@@ -326,6 +333,9 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c)
326 case 1: 333 case 1:
327 set_isa(c, MIPS_CPU_ISA_M32R2); 334 set_isa(c, MIPS_CPU_ISA_M32R2);
328 break; 335 break;
336 case 2:
337 set_isa(c, MIPS_CPU_ISA_M32R6);
338 break;
329 default: 339 default:
330 goto unknown; 340 goto unknown;
331 } 341 }
@@ -338,6 +348,9 @@ static inline unsigned int decode_config0(struct cpuinfo_mips *c)
338 case 1: 348 case 1:
339 set_isa(c, MIPS_CPU_ISA_M64R2); 349 set_isa(c, MIPS_CPU_ISA_M64R2);
340 break; 350 break;
351 case 2:
352 set_isa(c, MIPS_CPU_ISA_M64R6);
353 break;
341 default: 354 default:
342 goto unknown; 355 goto unknown;
343 } 356 }
@@ -424,8 +437,10 @@ static inline unsigned int decode_config3(struct cpuinfo_mips *c)
424 if (config3 & MIPS_CONF3_MSA) 437 if (config3 & MIPS_CONF3_MSA)
425 c->ases |= MIPS_ASE_MSA; 438 c->ases |= MIPS_ASE_MSA;
426 /* Only tested on 32-bit cores */ 439 /* Only tested on 32-bit cores */
427 if ((config3 & MIPS_CONF3_PW) && config_enabled(CONFIG_32BIT)) 440 if ((config3 & MIPS_CONF3_PW) && config_enabled(CONFIG_32BIT)) {
441 c->htw_seq = 0;
428 c->options |= MIPS_CPU_HTW; 442 c->options |= MIPS_CPU_HTW;
443 }
429 444
430 return config3 & MIPS_CONF_M; 445 return config3 & MIPS_CONF_M;
431} 446}
@@ -499,6 +514,8 @@ static inline unsigned int decode_config5(struct cpuinfo_mips *c)
499 c->options |= MIPS_CPU_EVA; 514 c->options |= MIPS_CPU_EVA;
500 if (config5 & MIPS_CONF5_MRP) 515 if (config5 & MIPS_CONF5_MRP)
501 c->options |= MIPS_CPU_MAAR; 516 c->options |= MIPS_CPU_MAAR;
517 if (config5 & MIPS_CONF5_LLB)
518 c->options |= MIPS_CPU_RW_LLB;
502 519
503 return config5 & MIPS_CONF_M; 520 return config5 & MIPS_CONF_M;
504} 521}
@@ -533,7 +550,7 @@ static void decode_configs(struct cpuinfo_mips *c)
533 550
534 if (cpu_has_rixi) { 551 if (cpu_has_rixi) {
535 /* Enable the RIXI exceptions */ 552 /* Enable the RIXI exceptions */
536 write_c0_pagegrain(read_c0_pagegrain() | PG_IEC); 553 set_c0_pagegrain(PG_IEC);
537 back_to_back_c0_hazard(); 554 back_to_back_c0_hazard();
538 /* Verify the IEC bit is set */ 555 /* Verify the IEC bit is set */
539 if (read_c0_pagegrain() & PG_IEC) 556 if (read_c0_pagegrain() & PG_IEC)
@@ -541,7 +558,7 @@ static void decode_configs(struct cpuinfo_mips *c)
541 } 558 }
542 559
543#ifndef CONFIG_MIPS_CPS 560#ifndef CONFIG_MIPS_CPS
544 if (cpu_has_mips_r2) { 561 if (cpu_has_mips_r2_r6) {
545 c->core = get_ebase_cpunum(); 562 c->core = get_ebase_cpunum();
546 if (cpu_has_mipsmt) 563 if (cpu_has_mipsmt)
547 c->core >>= fls(core_nvpes()) - 1; 564 c->core >>= fls(core_nvpes()) - 1;
@@ -896,6 +913,11 @@ static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
896{ 913{
897 c->writecombine = _CACHE_UNCACHED_ACCELERATED; 914 c->writecombine = _CACHE_UNCACHED_ACCELERATED;
898 switch (c->processor_id & PRID_IMP_MASK) { 915 switch (c->processor_id & PRID_IMP_MASK) {
916 case PRID_IMP_QEMU_GENERIC:
917 c->writecombine = _CACHE_UNCACHED;
918 c->cputype = CPU_QEMU_GENERIC;
919 __cpu_name[cpu] = "MIPS GENERIC QEMU";
920 break;
899 case PRID_IMP_4KC: 921 case PRID_IMP_4KC:
900 c->cputype = CPU_4KC; 922 c->cputype = CPU_4KC;
901 c->writecombine = _CACHE_UNCACHED; 923 c->writecombine = _CACHE_UNCACHED;
@@ -1345,8 +1367,7 @@ void cpu_probe(void)
1345 if (c->options & MIPS_CPU_FPU) { 1367 if (c->options & MIPS_CPU_FPU) {
1346 c->fpu_id = cpu_get_fpu_id(); 1368 c->fpu_id = cpu_get_fpu_id();
1347 1369
1348 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 | 1370 if (c->isa_level & cpu_has_mips_r) {
1349 MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)) {
1350 if (c->fpu_id & MIPS_FPIR_3D) 1371 if (c->fpu_id & MIPS_FPIR_3D)
1351 c->ases |= MIPS_ASE_MIPS3D; 1372 c->ases |= MIPS_ASE_MIPS3D;
1352 if (c->fpu_id & MIPS_FPIR_FREP) 1373 if (c->fpu_id & MIPS_FPIR_FREP)
@@ -1354,7 +1375,7 @@ void cpu_probe(void)
1354 } 1375 }
1355 } 1376 }
1356 1377
1357 if (cpu_has_mips_r2) { 1378 if (cpu_has_mips_r2_r6) {
1358 c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1; 1379 c->srsets = ((read_c0_srsctl() >> 26) & 0x0f) + 1;
1359 /* R2 has Performance Counter Interrupt indicator */ 1380 /* R2 has Performance Counter Interrupt indicator */
1360 c->options |= MIPS_CPU_PCI; 1381 c->options |= MIPS_CPU_PCI;
diff --git a/arch/mips/kernel/elf.c b/arch/mips/kernel/elf.c
index a5b5b56485c1..d2c09f6475c5 100644
--- a/arch/mips/kernel/elf.c
+++ b/arch/mips/kernel/elf.c
@@ -11,29 +11,112 @@
11#include <linux/elf.h> 11#include <linux/elf.h>
12#include <linux/sched.h> 12#include <linux/sched.h>
13 13
14/* FPU modes */
14enum { 15enum {
15 FP_ERROR = -1, 16 FP_FRE,
16 FP_DOUBLE_64A = -2, 17 FP_FR0,
18 FP_FR1,
17}; 19};
18 20
21/**
22 * struct mode_req - ABI FPU mode requirements
23 * @single: The program being loaded needs an FPU but it will only issue
24 * single precision instructions meaning that it can execute in
25 * either FR0 or FR1.
26 * @soft: The soft(-float) requirement means that the program being
27 * loaded needs has no FPU dependency at all (i.e. it has no
28 * FPU instructions).
29 * @fr1: The program being loaded depends on FPU being in FR=1 mode.
30 * @frdefault: The program being loaded depends on the default FPU mode.
31 * That is FR0 for O32 and FR1 for N32/N64.
32 * @fre: The program being loaded depends on FPU with FRE=1. This mode is
33 * a bridge which uses FR=1 whilst still being able to maintain
34 * full compatibility with pre-existing code using the O32 FP32
35 * ABI.
36 *
37 * More information about the FP ABIs can be found here:
38 *
39 * https://dmz-portal.mips.com/wiki/MIPS_O32_ABI_-_FR0_and_FR1_Interlinking#10.4.1._Basic_mode_set-up
40 *
41 */
42
43struct mode_req {
44 bool single;
45 bool soft;
46 bool fr1;
47 bool frdefault;
48 bool fre;
49};
50
51static const struct mode_req fpu_reqs[] = {
52 [MIPS_ABI_FP_ANY] = { true, true, true, true, true },
53 [MIPS_ABI_FP_DOUBLE] = { false, false, false, true, true },
54 [MIPS_ABI_FP_SINGLE] = { true, false, false, false, false },
55 [MIPS_ABI_FP_SOFT] = { false, true, false, false, false },
56 [MIPS_ABI_FP_OLD_64] = { false, false, false, false, false },
57 [MIPS_ABI_FP_XX] = { false, false, true, true, true },
58 [MIPS_ABI_FP_64] = { false, false, true, false, false },
59 [MIPS_ABI_FP_64A] = { false, false, true, false, true }
60};
61
62/*
63 * Mode requirements when .MIPS.abiflags is not present in the ELF.
64 * Not present means that everything is acceptable except FR1.
65 */
66static struct mode_req none_req = { true, true, false, true, true };
67
19int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf, 68int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
20 bool is_interp, struct arch_elf_state *state) 69 bool is_interp, struct arch_elf_state *state)
21{ 70{
22 struct elf32_hdr *ehdr = _ehdr; 71 struct elf32_hdr *ehdr32 = _ehdr;
23 struct elf32_phdr *phdr = _phdr; 72 struct elf32_phdr *phdr32 = _phdr;
73 struct elf64_phdr *phdr64 = _phdr;
24 struct mips_elf_abiflags_v0 abiflags; 74 struct mips_elf_abiflags_v0 abiflags;
25 int ret; 75 int ret;
26 76
27 if (config_enabled(CONFIG_64BIT) && 77 /* Lets see if this is an O32 ELF */
28 (ehdr->e_ident[EI_CLASS] != ELFCLASS32)) 78 if (ehdr32->e_ident[EI_CLASS] == ELFCLASS32) {
29 return 0; 79 /* FR = 1 for N32 */
30 if (phdr->p_type != PT_MIPS_ABIFLAGS) 80 if (ehdr32->e_flags & EF_MIPS_ABI2)
31 return 0; 81 state->overall_fp_mode = FP_FR1;
32 if (phdr->p_filesz < sizeof(abiflags)) 82 else
33 return -EINVAL; 83 /* Set a good default FPU mode for O32 */
84 state->overall_fp_mode = cpu_has_mips_r6 ?
85 FP_FRE : FP_FR0;
86
87 if (ehdr32->e_flags & EF_MIPS_FP64) {
88 /*
89 * Set MIPS_ABI_FP_OLD_64 for EF_MIPS_FP64. We will override it
90 * later if needed
91 */
92 if (is_interp)
93 state->interp_fp_abi = MIPS_ABI_FP_OLD_64;
94 else
95 state->fp_abi = MIPS_ABI_FP_OLD_64;
96 }
97 if (phdr32->p_type != PT_MIPS_ABIFLAGS)
98 return 0;
99
100 if (phdr32->p_filesz < sizeof(abiflags))
101 return -EINVAL;
102
103 ret = kernel_read(elf, phdr32->p_offset,
104 (char *)&abiflags,
105 sizeof(abiflags));
106 } else {
107 /* FR=1 is really the only option for 64-bit */
108 state->overall_fp_mode = FP_FR1;
109
110 if (phdr64->p_type != PT_MIPS_ABIFLAGS)
111 return 0;
112 if (phdr64->p_filesz < sizeof(abiflags))
113 return -EINVAL;
114
115 ret = kernel_read(elf, phdr64->p_offset,
116 (char *)&abiflags,
117 sizeof(abiflags));
118 }
34 119
35 ret = kernel_read(elf, phdr->p_offset, (char *)&abiflags,
36 sizeof(abiflags));
37 if (ret < 0) 120 if (ret < 0)
38 return ret; 121 return ret;
39 if (ret != sizeof(abiflags)) 122 if (ret != sizeof(abiflags))
@@ -48,35 +131,30 @@ int arch_elf_pt_proc(void *_ehdr, void *_phdr, struct file *elf,
48 return 0; 131 return 0;
49} 132}
50 133
51static inline unsigned get_fp_abi(struct elf32_hdr *ehdr, int in_abi) 134static inline unsigned get_fp_abi(int in_abi)
52{ 135{
53 /* If the ABI requirement is provided, simply return that */ 136 /* If the ABI requirement is provided, simply return that */
54 if (in_abi != -1) 137 if (in_abi != MIPS_ABI_FP_UNKNOWN)
55 return in_abi; 138 return in_abi;
56 139
57 /* If the EF_MIPS_FP64 flag was set, return MIPS_ABI_FP_64 */ 140 /* Unknown ABI */
58 if (ehdr->e_flags & EF_MIPS_FP64) 141 return MIPS_ABI_FP_UNKNOWN;
59 return MIPS_ABI_FP_64;
60
61 /* Default to MIPS_ABI_FP_DOUBLE */
62 return MIPS_ABI_FP_DOUBLE;
63} 142}
64 143
65int arch_check_elf(void *_ehdr, bool has_interpreter, 144int arch_check_elf(void *_ehdr, bool has_interpreter,
66 struct arch_elf_state *state) 145 struct arch_elf_state *state)
67{ 146{
68 struct elf32_hdr *ehdr = _ehdr; 147 struct elf32_hdr *ehdr = _ehdr;
69 unsigned fp_abi, interp_fp_abi, abi0, abi1; 148 struct mode_req prog_req, interp_req;
149 int fp_abi, interp_fp_abi, abi0, abi1, max_abi;
70 150
71 /* Ignore non-O32 binaries */ 151 if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
72 if (config_enabled(CONFIG_64BIT) &&
73 (ehdr->e_ident[EI_CLASS] != ELFCLASS32))
74 return 0; 152 return 0;
75 153
76 fp_abi = get_fp_abi(ehdr, state->fp_abi); 154 fp_abi = get_fp_abi(state->fp_abi);
77 155
78 if (has_interpreter) { 156 if (has_interpreter) {
79 interp_fp_abi = get_fp_abi(ehdr, state->interp_fp_abi); 157 interp_fp_abi = get_fp_abi(state->interp_fp_abi);
80 158
81 abi0 = min(fp_abi, interp_fp_abi); 159 abi0 = min(fp_abi, interp_fp_abi);
82 abi1 = max(fp_abi, interp_fp_abi); 160 abi1 = max(fp_abi, interp_fp_abi);
@@ -84,108 +162,103 @@ int arch_check_elf(void *_ehdr, bool has_interpreter,
84 abi0 = abi1 = fp_abi; 162 abi0 = abi1 = fp_abi;
85 } 163 }
86 164
87 state->overall_abi = FP_ERROR; 165 /* ABI limits. O32 = FP_64A, N32/N64 = FP_SOFT */
88 166 max_abi = ((ehdr->e_ident[EI_CLASS] == ELFCLASS32) &&
89 if (abi0 == abi1) { 167 (!(ehdr->e_flags & EF_MIPS_ABI2))) ?
90 state->overall_abi = abi0; 168 MIPS_ABI_FP_64A : MIPS_ABI_FP_SOFT;
91 } else if (abi0 == MIPS_ABI_FP_ANY) {
92 state->overall_abi = abi1;
93 } else if (abi0 == MIPS_ABI_FP_DOUBLE) {
94 switch (abi1) {
95 case MIPS_ABI_FP_XX:
96 state->overall_abi = MIPS_ABI_FP_DOUBLE;
97 break;
98
99 case MIPS_ABI_FP_64A:
100 state->overall_abi = FP_DOUBLE_64A;
101 break;
102 }
103 } else if (abi0 == MIPS_ABI_FP_SINGLE ||
104 abi0 == MIPS_ABI_FP_SOFT) {
105 /* Cannot link with other ABIs */
106 } else if (abi0 == MIPS_ABI_FP_OLD_64) {
107 switch (abi1) {
108 case MIPS_ABI_FP_XX:
109 case MIPS_ABI_FP_64:
110 case MIPS_ABI_FP_64A:
111 state->overall_abi = MIPS_ABI_FP_64;
112 break;
113 }
114 } else if (abi0 == MIPS_ABI_FP_XX ||
115 abi0 == MIPS_ABI_FP_64 ||
116 abi0 == MIPS_ABI_FP_64A) {
117 state->overall_abi = MIPS_ABI_FP_64;
118 }
119 169
120 switch (state->overall_abi) { 170 if ((abi0 > max_abi && abi0 != MIPS_ABI_FP_UNKNOWN) ||
121 case MIPS_ABI_FP_64: 171 (abi1 > max_abi && abi1 != MIPS_ABI_FP_UNKNOWN))
122 case MIPS_ABI_FP_64A: 172 return -ELIBBAD;
123 case FP_DOUBLE_64A: 173
124 if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT)) 174 /* It's time to determine the FPU mode requirements */
125 return -ELIBBAD; 175 prog_req = (abi0 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi0];
126 break; 176 interp_req = (abi1 == MIPS_ABI_FP_UNKNOWN) ? none_req : fpu_reqs[abi1];
127 177
128 case FP_ERROR: 178 /*
179 * Check whether the program's and interp's ABIs have a matching FPU
180 * mode requirement.
181 */
182 prog_req.single = interp_req.single && prog_req.single;
183 prog_req.soft = interp_req.soft && prog_req.soft;
184 prog_req.fr1 = interp_req.fr1 && prog_req.fr1;
185 prog_req.frdefault = interp_req.frdefault && prog_req.frdefault;
186 prog_req.fre = interp_req.fre && prog_req.fre;
187
188 /*
189 * Determine the desired FPU mode
190 *
191 * Decision making:
192 *
193 * - We want FR_FRE if FRE=1 and both FR=1 and FR=0 are false. This
194 * means that we have a combination of program and interpreter
195 * that inherently require the hybrid FP mode.
196 * - If FR1 and FRDEFAULT is true, that means we hit the any-abi or
197 * fpxx case. This is because, in any-ABI (or no-ABI) we have no FPU
198 * instructions so we don't care about the mode. We will simply use
199 * the one preferred by the hardware. In fpxx case, that ABI can
200 * handle both FR=1 and FR=0, so, again, we simply choose the one
201 * preferred by the hardware. Next, if we only use single-precision
202 * FPU instructions, and the default ABI FPU mode is not good
203 * (ie single + any ABI combination), we set again the FPU mode to the
204 * one is preferred by the hardware. Next, if we know that the code
205 * will only use single-precision instructions, shown by single being
206 * true but frdefault being false, then we again set the FPU mode to
207 * the one that is preferred by the hardware.
208 * - We want FP_FR1 if that's the only matching mode and the default one
209 * is not good.
210 * - Return with -ELIBADD if we can't find a matching FPU mode.
211 */
212 if (prog_req.fre && !prog_req.frdefault && !prog_req.fr1)
213 state->overall_fp_mode = FP_FRE;
214 else if ((prog_req.fr1 && prog_req.frdefault) ||
215 (prog_req.single && !prog_req.frdefault))
216 /* Make sure 64-bit MIPS III/IV/64R1 will not pick FR1 */
217 state->overall_fp_mode = ((current_cpu_data.fpu_id & MIPS_FPIR_F64) &&
218 cpu_has_mips_r2_r6) ?
219 FP_FR1 : FP_FR0;
220 else if (prog_req.fr1)
221 state->overall_fp_mode = FP_FR1;
222 else if (!prog_req.fre && !prog_req.frdefault &&
223 !prog_req.fr1 && !prog_req.single && !prog_req.soft)
129 return -ELIBBAD; 224 return -ELIBBAD;
130 }
131 225
132 return 0; 226 return 0;
133} 227}
134 228
135void mips_set_personality_fp(struct arch_elf_state *state) 229static inline void set_thread_fp_mode(int hybrid, int regs32)
136{ 230{
137 if (config_enabled(CONFIG_FP32XX_HYBRID_FPRS)) { 231 if (hybrid)
138 /* 232 set_thread_flag(TIF_HYBRID_FPREGS);
139 * Use hybrid FPRs for all code which can correctly execute 233 else
140 * with that mode.
141 */
142 switch (state->overall_abi) {
143 case MIPS_ABI_FP_DOUBLE:
144 case MIPS_ABI_FP_SINGLE:
145 case MIPS_ABI_FP_SOFT:
146 case MIPS_ABI_FP_XX:
147 case MIPS_ABI_FP_ANY:
148 /* FR=1, FRE=1 */
149 clear_thread_flag(TIF_32BIT_FPREGS);
150 set_thread_flag(TIF_HYBRID_FPREGS);
151 return;
152 }
153 }
154
155 switch (state->overall_abi) {
156 case MIPS_ABI_FP_DOUBLE:
157 case MIPS_ABI_FP_SINGLE:
158 case MIPS_ABI_FP_SOFT:
159 /* FR=0 */
160 set_thread_flag(TIF_32BIT_FPREGS);
161 clear_thread_flag(TIF_HYBRID_FPREGS); 234 clear_thread_flag(TIF_HYBRID_FPREGS);
162 break; 235 if (regs32)
163 236 set_thread_flag(TIF_32BIT_FPREGS);
164 case FP_DOUBLE_64A: 237 else
165 /* FR=1, FRE=1 */
166 clear_thread_flag(TIF_32BIT_FPREGS); 238 clear_thread_flag(TIF_32BIT_FPREGS);
167 set_thread_flag(TIF_HYBRID_FPREGS); 239}
168 break;
169 240
170 case MIPS_ABI_FP_64: 241void mips_set_personality_fp(struct arch_elf_state *state)
171 case MIPS_ABI_FP_64A: 242{
172 /* FR=1, FRE=0 */ 243 /*
173 clear_thread_flag(TIF_32BIT_FPREGS); 244 * This function is only ever called for O32 ELFs so we should
174 clear_thread_flag(TIF_HYBRID_FPREGS); 245 * not be worried about N32/N64 binaries.
175 break; 246 */
176 247
177 case MIPS_ABI_FP_XX: 248 if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
178 case MIPS_ABI_FP_ANY: 249 return;
179 if (!config_enabled(CONFIG_MIPS_O32_FP64_SUPPORT))
180 set_thread_flag(TIF_32BIT_FPREGS);
181 else
182 clear_thread_flag(TIF_32BIT_FPREGS);
183 250
184 clear_thread_flag(TIF_HYBRID_FPREGS); 251 switch (state->overall_fp_mode) {
252 case FP_FRE:
253 set_thread_fp_mode(1, 0);
254 break;
255 case FP_FR0:
256 set_thread_fp_mode(0, 1);
257 break;
258 case FP_FR1:
259 set_thread_fp_mode(0, 0);
185 break; 260 break;
186
187 default: 261 default:
188 case FP_ERROR:
189 BUG(); 262 BUG();
190 } 263 }
191} 264}
diff --git a/arch/mips/kernel/entry.S b/arch/mips/kernel/entry.S
index 4353d323f017..af41ba6db960 100644
--- a/arch/mips/kernel/entry.S
+++ b/arch/mips/kernel/entry.S
@@ -46,6 +46,11 @@ resume_userspace:
46 local_irq_disable # make sure we dont miss an 46 local_irq_disable # make sure we dont miss an
47 # interrupt setting need_resched 47 # interrupt setting need_resched
48 # between sampling and return 48 # between sampling and return
49#ifdef CONFIG_MIPSR2_TO_R6_EMULATOR
50 lw k0, TI_R2_EMUL_RET($28)
51 bnez k0, restore_all_from_r2_emul
52#endif
53
49 LONG_L a2, TI_FLAGS($28) # current->work 54 LONG_L a2, TI_FLAGS($28) # current->work
50 andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace) 55 andi t0, a2, _TIF_WORK_MASK # (ignoring syscall_trace)
51 bnez t0, work_pending 56 bnez t0, work_pending
@@ -114,6 +119,19 @@ restore_partial: # restore partial frame
114 RESTORE_SP_AND_RET 119 RESTORE_SP_AND_RET
115 .set at 120 .set at
116 121
122#ifdef CONFIG_MIPSR2_TO_R6_EMULATOR
123restore_all_from_r2_emul: # restore full frame
124 .set noat
125 sw zero, TI_R2_EMUL_RET($28) # reset it
126 RESTORE_TEMP
127 RESTORE_AT
128 RESTORE_STATIC
129 RESTORE_SOME
130 LONG_L sp, PT_R29(sp)
131 eretnc
132 .set at
133#endif
134
117work_pending: 135work_pending:
118 andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS 136 andi t0, a2, _TIF_NEED_RESCHED # a2 is preloaded with TI_FLAGS
119 beqz t0, work_notifysig 137 beqz t0, work_notifysig
@@ -158,7 +176,8 @@ syscall_exit_work:
158 jal syscall_trace_leave 176 jal syscall_trace_leave
159 b resume_userspace 177 b resume_userspace
160 178
161#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_MIPS_MT) 179#if defined(CONFIG_CPU_MIPSR2) || defined(CONFIG_CPU_MIPSR6) || \
180 defined(CONFIG_MIPS_MT)
162 181
163/* 182/*
164 * MIPS32R2 Instruction Hazard Barrier - must be called 183 * MIPS32R2 Instruction Hazard Barrier - must be called
@@ -171,4 +190,4 @@ LEAF(mips_ihb)
171 nop 190 nop
172 END(mips_ihb) 191 END(mips_ihb)
173 192
174#endif /* CONFIG_CPU_MIPSR2 or CONFIG_MIPS_MT */ 193#endif /* CONFIG_CPU_MIPSR2 or CONFIG_CPU_MIPSR6 or CONFIG_MIPS_MT */
diff --git a/arch/mips/kernel/genex.S b/arch/mips/kernel/genex.S
index a5e26dd90592..2ebaabe3af15 100644
--- a/arch/mips/kernel/genex.S
+++ b/arch/mips/kernel/genex.S
@@ -125,7 +125,7 @@ LEAF(__r4k_wait)
125 nop 125 nop
126 nop 126 nop
127#endif 127#endif
128 .set arch=r4000 128 .set MIPS_ISA_ARCH_LEVEL_RAW
129 wait 129 wait
130 /* end of rollback region (the region size must be power of two) */ 130 /* end of rollback region (the region size must be power of two) */
1311: 1311:
diff --git a/arch/mips/kernel/idle.c b/arch/mips/kernel/idle.c
index 0b9082b6b683..368c88b7eb6c 100644
--- a/arch/mips/kernel/idle.c
+++ b/arch/mips/kernel/idle.c
@@ -186,6 +186,7 @@ void __init check_wait(void)
186 case CPU_PROAPTIV: 186 case CPU_PROAPTIV:
187 case CPU_P5600: 187 case CPU_P5600:
188 case CPU_M5150: 188 case CPU_M5150:
189 case CPU_QEMU_GENERIC:
189 cpu_wait = r4k_wait; 190 cpu_wait = r4k_wait;
190 if (read_c0_config7() & MIPS_CONF7_WII) 191 if (read_c0_config7() & MIPS_CONF7_WII)
191 cpu_wait = r4k_wait_irqoff; 192 cpu_wait = r4k_wait_irqoff;
diff --git a/arch/mips/kernel/mips-r2-to-r6-emul.c b/arch/mips/kernel/mips-r2-to-r6-emul.c
new file mode 100644
index 000000000000..64d17e41093b
--- /dev/null
+++ b/arch/mips/kernel/mips-r2-to-r6-emul.c
@@ -0,0 +1,2378 @@
1/*
2 * This file is subject to the terms and conditions of the GNU General Public
3 * License. See the file "COPYING" in the main directory of this archive
4 * for more details.
5 *
6 * Copyright (c) 2014 Imagination Technologies Ltd.
7 * Author: Leonid Yegoshin <Leonid.Yegoshin@imgtec.com>
8 * Author: Markos Chandras <markos.chandras@imgtec.com>
9 *
10 * MIPS R2 user space instruction emulator for MIPS R6
11 *
12 */
13#include <linux/bug.h>
14#include <linux/compiler.h>
15#include <linux/debugfs.h>
16#include <linux/init.h>
17#include <linux/kernel.h>
18#include <linux/module.h>
19#include <linux/ptrace.h>
20#include <linux/seq_file.h>
21
22#include <asm/asm.h>
23#include <asm/branch.h>
24#include <asm/break.h>
25#include <asm/fpu.h>
26#include <asm/fpu_emulator.h>
27#include <asm/inst.h>
28#include <asm/mips-r2-to-r6-emul.h>
29#include <asm/local.h>
30#include <asm/ptrace.h>
31#include <asm/uaccess.h>
32
33#ifdef CONFIG_64BIT
34#define ADDIU "daddiu "
35#define INS "dins "
36#define EXT "dext "
37#else
38#define ADDIU "addiu "
39#define INS "ins "
40#define EXT "ext "
41#endif /* CONFIG_64BIT */
42
43#define SB "sb "
44#define LB "lb "
45#define LL "ll "
46#define SC "sc "
47
48DEFINE_PER_CPU(struct mips_r2_emulator_stats, mipsr2emustats);
49DEFINE_PER_CPU(struct mips_r2_emulator_stats, mipsr2bdemustats);
50DEFINE_PER_CPU(struct mips_r2br_emulator_stats, mipsr2bremustats);
51
52extern const unsigned int fpucondbit[8];
53
54#define MIPS_R2_EMUL_TOTAL_PASS 10
55
56int mipsr2_emulation = 0;
57
58static int __init mipsr2emu_enable(char *s)
59{
60 mipsr2_emulation = 1;
61
62 pr_info("MIPS R2-to-R6 Emulator Enabled!");
63
64 return 1;
65}
66__setup("mipsr2emu", mipsr2emu_enable);
67
68/**
69 * mipsr6_emul - Emulate some frequent R2/R5/R6 instructions in delay slot
70 * for performance instead of the traditional way of using a stack trampoline
71 * which is rather slow.
72 * @regs: Process register set
73 * @ir: Instruction
74 */
75static inline int mipsr6_emul(struct pt_regs *regs, u32 ir)
76{
77 switch (MIPSInst_OPCODE(ir)) {
78 case addiu_op:
79 if (MIPSInst_RT(ir))
80 regs->regs[MIPSInst_RT(ir)] =
81 (s32)regs->regs[MIPSInst_RS(ir)] +
82 (s32)MIPSInst_SIMM(ir);
83 return 0;
84 case daddiu_op:
85 if (config_enabled(CONFIG_32BIT))
86 break;
87
88 if (MIPSInst_RT(ir))
89 regs->regs[MIPSInst_RT(ir)] =
90 (s64)regs->regs[MIPSInst_RS(ir)] +
91 (s64)MIPSInst_SIMM(ir);
92 return 0;
93 case lwc1_op:
94 case swc1_op:
95 case cop1_op:
96 case cop1x_op:
97 /* FPU instructions in delay slot */
98 return -SIGFPE;
99 case spec_op:
100 switch (MIPSInst_FUNC(ir)) {
101 case or_op:
102 if (MIPSInst_RD(ir))
103 regs->regs[MIPSInst_RD(ir)] =
104 regs->regs[MIPSInst_RS(ir)] |
105 regs->regs[MIPSInst_RT(ir)];
106 return 0;
107 case sll_op:
108 if (MIPSInst_RS(ir))
109 break;
110
111 if (MIPSInst_RD(ir))
112 regs->regs[MIPSInst_RD(ir)] =
113 (s32)(((u32)regs->regs[MIPSInst_RT(ir)]) <<
114 MIPSInst_FD(ir));
115 return 0;
116 case srl_op:
117 if (MIPSInst_RS(ir))
118 break;
119
120 if (MIPSInst_RD(ir))
121 regs->regs[MIPSInst_RD(ir)] =
122 (s32)(((u32)regs->regs[MIPSInst_RT(ir)]) >>
123 MIPSInst_FD(ir));
124 return 0;
125 case addu_op:
126 if (MIPSInst_FD(ir))
127 break;
128
129 if (MIPSInst_RD(ir))
130 regs->regs[MIPSInst_RD(ir)] =
131 (s32)((u32)regs->regs[MIPSInst_RS(ir)] +
132 (u32)regs->regs[MIPSInst_RT(ir)]);
133 return 0;
134 case subu_op:
135 if (MIPSInst_FD(ir))
136 break;
137
138 if (MIPSInst_RD(ir))
139 regs->regs[MIPSInst_RD(ir)] =
140 (s32)((u32)regs->regs[MIPSInst_RS(ir)] -
141 (u32)regs->regs[MIPSInst_RT(ir)]);
142 return 0;
143 case dsll_op:
144 if (config_enabled(CONFIG_32BIT) || MIPSInst_RS(ir))
145 break;
146
147 if (MIPSInst_RD(ir))
148 regs->regs[MIPSInst_RD(ir)] =
149 (s64)(((u64)regs->regs[MIPSInst_RT(ir)]) <<
150 MIPSInst_FD(ir));
151 return 0;
152 case dsrl_op:
153 if (config_enabled(CONFIG_32BIT) || MIPSInst_RS(ir))
154 break;
155
156 if (MIPSInst_RD(ir))
157 regs->regs[MIPSInst_RD(ir)] =
158 (s64)(((u64)regs->regs[MIPSInst_RT(ir)]) >>
159 MIPSInst_FD(ir));
160 return 0;
161 case daddu_op:
162 if (config_enabled(CONFIG_32BIT) || MIPSInst_FD(ir))
163 break;
164
165 if (MIPSInst_RD(ir))
166 regs->regs[MIPSInst_RD(ir)] =
167 (u64)regs->regs[MIPSInst_RS(ir)] +
168 (u64)regs->regs[MIPSInst_RT(ir)];
169 return 0;
170 case dsubu_op:
171 if (config_enabled(CONFIG_32BIT) || MIPSInst_FD(ir))
172 break;
173
174 if (MIPSInst_RD(ir))
175 regs->regs[MIPSInst_RD(ir)] =
176 (s64)((u64)regs->regs[MIPSInst_RS(ir)] -
177 (u64)regs->regs[MIPSInst_RT(ir)]);
178 return 0;
179 }
180 break;
181 default:
182 pr_debug("No fastpath BD emulation for instruction 0x%08x (op: %02x)\n",
183 ir, MIPSInst_OPCODE(ir));
184 }
185
186 return SIGILL;
187}
188
189/**
190 * movt_func - Emulate a MOVT instruction
191 * @regs: Process register set
192 * @ir: Instruction
193 *
194 * Returns 0 since it always succeeds.
195 */
196static int movf_func(struct pt_regs *regs, u32 ir)
197{
198 u32 csr;
199 u32 cond;
200
201 csr = current->thread.fpu.fcr31;
202 cond = fpucondbit[MIPSInst_RT(ir) >> 2];
203 if (((csr & cond) == 0) && MIPSInst_RD(ir))
204 regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
205 MIPS_R2_STATS(movs);
206 return 0;
207}
208
209/**
210 * movt_func - Emulate a MOVT instruction
211 * @regs: Process register set
212 * @ir: Instruction
213 *
214 * Returns 0 since it always succeeds.
215 */
216static int movt_func(struct pt_regs *regs, u32 ir)
217{
218 u32 csr;
219 u32 cond;
220
221 csr = current->thread.fpu.fcr31;
222 cond = fpucondbit[MIPSInst_RT(ir) >> 2];
223
224 if (((csr & cond) != 0) && MIPSInst_RD(ir))
225 regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
226
227 MIPS_R2_STATS(movs);
228
229 return 0;
230}
231
232/**
233 * jr_func - Emulate a JR instruction.
234 * @pt_regs: Process register set
235 * @ir: Instruction
236 *
237 * Returns SIGILL if JR was in delay slot, SIGEMT if we
238 * can't compute the EPC, SIGSEGV if we can't access the
239 * userland instruction or 0 on success.
240 */
241static int jr_func(struct pt_regs *regs, u32 ir)
242{
243 int err;
244 unsigned long cepc, epc, nepc;
245 u32 nir;
246
247 if (delay_slot(regs))
248 return SIGILL;
249
250 /* EPC after the RI/JR instruction */
251 nepc = regs->cp0_epc;
252 /* Roll back to the reserved R2 JR instruction */
253 regs->cp0_epc -= 4;
254 epc = regs->cp0_epc;
255 err = __compute_return_epc(regs);
256
257 if (err < 0)
258 return SIGEMT;
259
260
261 /* Computed EPC */
262 cepc = regs->cp0_epc;
263
264 /* Get DS instruction */
265 err = __get_user(nir, (u32 __user *)nepc);
266 if (err)
267 return SIGSEGV;
268
269 MIPS_R2BR_STATS(jrs);
270
271 /* If nir == 0(NOP), then nothing else to do */
272 if (nir) {
273 /*
274 * Negative err means FPU instruction in BD-slot,
275 * Zero err means 'BD-slot emulation done'
276 * For anything else we go back to trampoline emulation.
277 */
278 err = mipsr6_emul(regs, nir);
279 if (err > 0) {
280 regs->cp0_epc = nepc;
281 err = mips_dsemul(regs, nir, cepc);
282 if (err == SIGILL)
283 err = SIGEMT;
284 MIPS_R2_STATS(dsemul);
285 }
286 }
287
288 return err;
289}
290
291/**
292 * movz_func - Emulate a MOVZ instruction
293 * @regs: Process register set
294 * @ir: Instruction
295 *
296 * Returns 0 since it always succeeds.
297 */
298static int movz_func(struct pt_regs *regs, u32 ir)
299{
300 if (((regs->regs[MIPSInst_RT(ir)]) == 0) && MIPSInst_RD(ir))
301 regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
302 MIPS_R2_STATS(movs);
303
304 return 0;
305}
306
307/**
308 * movn_func - Emulate a MOVZ instruction
309 * @regs: Process register set
310 * @ir: Instruction
311 *
312 * Returns 0 since it always succeeds.
313 */
314static int movn_func(struct pt_regs *regs, u32 ir)
315{
316 if (((regs->regs[MIPSInst_RT(ir)]) != 0) && MIPSInst_RD(ir))
317 regs->regs[MIPSInst_RD(ir)] = regs->regs[MIPSInst_RS(ir)];
318 MIPS_R2_STATS(movs);
319
320 return 0;
321}
322
323/**
324 * mfhi_func - Emulate a MFHI instruction
325 * @regs: Process register set
326 * @ir: Instruction
327 *
328 * Returns 0 since it always succeeds.
329 */
330static int mfhi_func(struct pt_regs *regs, u32 ir)
331{
332 if (MIPSInst_RD(ir))
333 regs->regs[MIPSInst_RD(ir)] = regs->hi;
334
335 MIPS_R2_STATS(hilo);
336
337 return 0;
338}
339
340/**
341 * mthi_func - Emulate a MTHI instruction
342 * @regs: Process register set
343 * @ir: Instruction
344 *
345 * Returns 0 since it always succeeds.
346 */
347static int mthi_func(struct pt_regs *regs, u32 ir)
348{
349 regs->hi = regs->regs[MIPSInst_RS(ir)];
350
351 MIPS_R2_STATS(hilo);
352
353 return 0;
354}
355
356/**
357 * mflo_func - Emulate a MFLO instruction
358 * @regs: Process register set
359 * @ir: Instruction
360 *
361 * Returns 0 since it always succeeds.
362 */
363static int mflo_func(struct pt_regs *regs, u32 ir)
364{
365 if (MIPSInst_RD(ir))
366 regs->regs[MIPSInst_RD(ir)] = regs->lo;
367
368 MIPS_R2_STATS(hilo);
369
370 return 0;
371}
372
373/**
374 * mtlo_func - Emulate a MTLO instruction
375 * @regs: Process register set
376 * @ir: Instruction
377 *
378 * Returns 0 since it always succeeds.
379 */
380static int mtlo_func(struct pt_regs *regs, u32 ir)
381{
382 regs->lo = regs->regs[MIPSInst_RS(ir)];
383
384 MIPS_R2_STATS(hilo);
385
386 return 0;
387}
388
389/**
390 * mult_func - Emulate a MULT instruction
391 * @regs: Process register set
392 * @ir: Instruction
393 *
394 * Returns 0 since it always succeeds.
395 */
396static int mult_func(struct pt_regs *regs, u32 ir)
397{
398 s64 res;
399 s32 rt, rs;
400
401 rt = regs->regs[MIPSInst_RT(ir)];
402 rs = regs->regs[MIPSInst_RS(ir)];
403 res = (s64)rt * (s64)rs;
404
405 rs = res;
406 regs->lo = (s64)rs;
407 rt = res >> 32;
408 res = (s64)rt;
409 regs->hi = res;
410
411 MIPS_R2_STATS(muls);
412
413 return 0;
414}
415
416/**
417 * multu_func - Emulate a MULTU instruction
418 * @regs: Process register set
419 * @ir: Instruction
420 *
421 * Returns 0 since it always succeeds.
422 */
423static int multu_func(struct pt_regs *regs, u32 ir)
424{
425 u64 res;
426 u32 rt, rs;
427
428 rt = regs->regs[MIPSInst_RT(ir)];
429 rs = regs->regs[MIPSInst_RS(ir)];
430 res = (u64)rt * (u64)rs;
431 rt = res;
432 regs->lo = (s64)rt;
433 regs->hi = (s64)(res >> 32);
434
435 MIPS_R2_STATS(muls);
436
437 return 0;
438}
439
440/**
441 * div_func - Emulate a DIV instruction
442 * @regs: Process register set
443 * @ir: Instruction
444 *
445 * Returns 0 since it always succeeds.
446 */
447static int div_func(struct pt_regs *regs, u32 ir)
448{
449 s32 rt, rs;
450
451 rt = regs->regs[MIPSInst_RT(ir)];
452 rs = regs->regs[MIPSInst_RS(ir)];
453
454 regs->lo = (s64)(rs / rt);
455 regs->hi = (s64)(rs % rt);
456
457 MIPS_R2_STATS(divs);
458
459 return 0;
460}
461
462/**
463 * divu_func - Emulate a DIVU instruction
464 * @regs: Process register set
465 * @ir: Instruction
466 *
467 * Returns 0 since it always succeeds.
468 */
469static int divu_func(struct pt_regs *regs, u32 ir)
470{
471 u32 rt, rs;
472
473 rt = regs->regs[MIPSInst_RT(ir)];
474 rs = regs->regs[MIPSInst_RS(ir)];
475
476 regs->lo = (s64)(rs / rt);
477 regs->hi = (s64)(rs % rt);
478
479 MIPS_R2_STATS(divs);
480
481 return 0;
482}
483
484/**
485 * dmult_func - Emulate a DMULT instruction
486 * @regs: Process register set
487 * @ir: Instruction
488 *
489 * Returns 0 on success or SIGILL for 32-bit kernels.
490 */
491static int dmult_func(struct pt_regs *regs, u32 ir)
492{
493 s64 res;
494 s64 rt, rs;
495
496 if (config_enabled(CONFIG_32BIT))
497 return SIGILL;
498
499 rt = regs->regs[MIPSInst_RT(ir)];
500 rs = regs->regs[MIPSInst_RS(ir)];
501 res = rt * rs;
502
503 regs->lo = res;
504 __asm__ __volatile__(
505 "dmuh %0, %1, %2\t\n"
506 : "=r"(res)
507 : "r"(rt), "r"(rs));
508
509 regs->hi = res;
510
511 MIPS_R2_STATS(muls);
512
513 return 0;
514}
515
516/**
517 * dmultu_func - Emulate a DMULTU instruction
518 * @regs: Process register set
519 * @ir: Instruction
520 *
521 * Returns 0 on success or SIGILL for 32-bit kernels.
522 */
523static int dmultu_func(struct pt_regs *regs, u32 ir)
524{
525 u64 res;
526 u64 rt, rs;
527
528 if (config_enabled(CONFIG_32BIT))
529 return SIGILL;
530
531 rt = regs->regs[MIPSInst_RT(ir)];
532 rs = regs->regs[MIPSInst_RS(ir)];
533 res = rt * rs;
534
535 regs->lo = res;
536 __asm__ __volatile__(
537 "dmuhu %0, %1, %2\t\n"
538 : "=r"(res)
539 : "r"(rt), "r"(rs));
540
541 regs->hi = res;
542
543 MIPS_R2_STATS(muls);
544
545 return 0;
546}
547
548/**
549 * ddiv_func - Emulate a DDIV instruction
550 * @regs: Process register set
551 * @ir: Instruction
552 *
553 * Returns 0 on success or SIGILL for 32-bit kernels.
554 */
555static int ddiv_func(struct pt_regs *regs, u32 ir)
556{
557 s64 rt, rs;
558
559 if (config_enabled(CONFIG_32BIT))
560 return SIGILL;
561
562 rt = regs->regs[MIPSInst_RT(ir)];
563 rs = regs->regs[MIPSInst_RS(ir)];
564
565 regs->lo = rs / rt;
566 regs->hi = rs % rt;
567
568 MIPS_R2_STATS(divs);
569
570 return 0;
571}
572
573/**
574 * ddivu_func - Emulate a DDIVU instruction
575 * @regs: Process register set
576 * @ir: Instruction
577 *
578 * Returns 0 on success or SIGILL for 32-bit kernels.
579 */
580static int ddivu_func(struct pt_regs *regs, u32 ir)
581{
582 u64 rt, rs;
583
584 if (config_enabled(CONFIG_32BIT))
585 return SIGILL;
586
587 rt = regs->regs[MIPSInst_RT(ir)];
588 rs = regs->regs[MIPSInst_RS(ir)];
589
590 regs->lo = rs / rt;
591 regs->hi = rs % rt;
592
593 MIPS_R2_STATS(divs);
594
595 return 0;
596}
597
598/* R6 removed instructions for the SPECIAL opcode */
599static struct r2_decoder_table spec_op_table[] = {
600 { 0xfc1ff83f, 0x00000008, jr_func },
601 { 0xfc00ffff, 0x00000018, mult_func },
602 { 0xfc00ffff, 0x00000019, multu_func },
603 { 0xfc00ffff, 0x0000001c, dmult_func },
604 { 0xfc00ffff, 0x0000001d, dmultu_func },
605 { 0xffff07ff, 0x00000010, mfhi_func },
606 { 0xfc1fffff, 0x00000011, mthi_func },
607 { 0xffff07ff, 0x00000012, mflo_func },
608 { 0xfc1fffff, 0x00000013, mtlo_func },
609 { 0xfc0307ff, 0x00000001, movf_func },
610 { 0xfc0307ff, 0x00010001, movt_func },
611 { 0xfc0007ff, 0x0000000a, movz_func },
612 { 0xfc0007ff, 0x0000000b, movn_func },
613 { 0xfc00ffff, 0x0000001a, div_func },
614 { 0xfc00ffff, 0x0000001b, divu_func },
615 { 0xfc00ffff, 0x0000001e, ddiv_func },
616 { 0xfc00ffff, 0x0000001f, ddivu_func },
617 {}
618};
619
620/**
621 * madd_func - Emulate a MADD instruction
622 * @regs: Process register set
623 * @ir: Instruction
624 *
625 * Returns 0 since it always succeeds.
626 */
627static int madd_func(struct pt_regs *regs, u32 ir)
628{
629 s64 res;
630 s32 rt, rs;
631
632 rt = regs->regs[MIPSInst_RT(ir)];
633 rs = regs->regs[MIPSInst_RS(ir)];
634 res = (s64)rt * (s64)rs;
635 rt = regs->hi;
636 rs = regs->lo;
637 res += ((((s64)rt) << 32) | (u32)rs);
638
639 rt = res;
640 regs->lo = (s64)rt;
641 rs = res >> 32;
642 regs->hi = (s64)rs;
643
644 MIPS_R2_STATS(dsps);
645
646 return 0;
647}
648
649/**
650 * maddu_func - Emulate a MADDU instruction
651 * @regs: Process register set
652 * @ir: Instruction
653 *
654 * Returns 0 since it always succeeds.
655 */
656static int maddu_func(struct pt_regs *regs, u32 ir)
657{
658 u64 res;
659 u32 rt, rs;
660
661 rt = regs->regs[MIPSInst_RT(ir)];
662 rs = regs->regs[MIPSInst_RS(ir)];
663 res = (u64)rt * (u64)rs;
664 rt = regs->hi;
665 rs = regs->lo;
666 res += ((((s64)rt) << 32) | (u32)rs);
667
668 rt = res;
669 regs->lo = (s64)rt;
670 rs = res >> 32;
671 regs->hi = (s64)rs;
672
673 MIPS_R2_STATS(dsps);
674
675 return 0;
676}
677
678/**
679 * msub_func - Emulate a MSUB instruction
680 * @regs: Process register set
681 * @ir: Instruction
682 *
683 * Returns 0 since it always succeeds.
684 */
685static int msub_func(struct pt_regs *regs, u32 ir)
686{
687 s64 res;
688 s32 rt, rs;
689
690 rt = regs->regs[MIPSInst_RT(ir)];
691 rs = regs->regs[MIPSInst_RS(ir)];
692 res = (s64)rt * (s64)rs;
693 rt = regs->hi;
694 rs = regs->lo;
695 res = ((((s64)rt) << 32) | (u32)rs) - res;
696
697 rt = res;
698 regs->lo = (s64)rt;
699 rs = res >> 32;
700 regs->hi = (s64)rs;
701
702 MIPS_R2_STATS(dsps);
703
704 return 0;
705}
706
707/**
708 * msubu_func - Emulate a MSUBU instruction
709 * @regs: Process register set
710 * @ir: Instruction
711 *
712 * Returns 0 since it always succeeds.
713 */
714static int msubu_func(struct pt_regs *regs, u32 ir)
715{
716 u64 res;
717 u32 rt, rs;
718
719 rt = regs->regs[MIPSInst_RT(ir)];
720 rs = regs->regs[MIPSInst_RS(ir)];
721 res = (u64)rt * (u64)rs;
722 rt = regs->hi;
723 rs = regs->lo;
724 res = ((((s64)rt) << 32) | (u32)rs) - res;
725
726 rt = res;
727 regs->lo = (s64)rt;
728 rs = res >> 32;
729 regs->hi = (s64)rs;
730
731 MIPS_R2_STATS(dsps);
732
733 return 0;
734}
735
736/**
737 * mul_func - Emulate a MUL instruction
738 * @regs: Process register set
739 * @ir: Instruction
740 *
741 * Returns 0 since it always succeeds.
742 */
743static int mul_func(struct pt_regs *regs, u32 ir)
744{
745 s64 res;
746 s32 rt, rs;
747
748 if (!MIPSInst_RD(ir))
749 return 0;
750 rt = regs->regs[MIPSInst_RT(ir)];
751 rs = regs->regs[MIPSInst_RS(ir)];
752 res = (s64)rt * (s64)rs;
753
754 rs = res;
755 regs->regs[MIPSInst_RD(ir)] = (s64)rs;
756
757 MIPS_R2_STATS(muls);
758
759 return 0;
760}
761
762/**
763 * clz_func - Emulate a CLZ instruction
764 * @regs: Process register set
765 * @ir: Instruction
766 *
767 * Returns 0 since it always succeeds.
768 */
769static int clz_func(struct pt_regs *regs, u32 ir)
770{
771 u32 res;
772 u32 rs;
773
774 if (!MIPSInst_RD(ir))
775 return 0;
776
777 rs = regs->regs[MIPSInst_RS(ir)];
778 __asm__ __volatile__("clz %0, %1" : "=r"(res) : "r"(rs));
779 regs->regs[MIPSInst_RD(ir)] = res;
780
781 MIPS_R2_STATS(bops);
782
783 return 0;
784}
785
786/**
787 * clo_func - Emulate a CLO instruction
788 * @regs: Process register set
789 * @ir: Instruction
790 *
791 * Returns 0 since it always succeeds.
792 */
793
794static int clo_func(struct pt_regs *regs, u32 ir)
795{
796 u32 res;
797 u32 rs;
798
799 if (!MIPSInst_RD(ir))
800 return 0;
801
802 rs = regs->regs[MIPSInst_RS(ir)];
803 __asm__ __volatile__("clo %0, %1" : "=r"(res) : "r"(rs));
804 regs->regs[MIPSInst_RD(ir)] = res;
805
806 MIPS_R2_STATS(bops);
807
808 return 0;
809}
810
811/**
812 * dclz_func - Emulate a DCLZ instruction
813 * @regs: Process register set
814 * @ir: Instruction
815 *
816 * Returns 0 since it always succeeds.
817 */
818static int dclz_func(struct pt_regs *regs, u32 ir)
819{
820 u64 res;
821 u64 rs;
822
823 if (config_enabled(CONFIG_32BIT))
824 return SIGILL;
825
826 if (!MIPSInst_RD(ir))
827 return 0;
828
829 rs = regs->regs[MIPSInst_RS(ir)];
830 __asm__ __volatile__("dclz %0, %1" : "=r"(res) : "r"(rs));
831 regs->regs[MIPSInst_RD(ir)] = res;
832
833 MIPS_R2_STATS(bops);
834
835 return 0;
836}
837
838/**
839 * dclo_func - Emulate a DCLO instruction
840 * @regs: Process register set
841 * @ir: Instruction
842 *
843 * Returns 0 since it always succeeds.
844 */
845static int dclo_func(struct pt_regs *regs, u32 ir)
846{
847 u64 res;
848 u64 rs;
849
850 if (config_enabled(CONFIG_32BIT))
851 return SIGILL;
852
853 if (!MIPSInst_RD(ir))
854 return 0;
855
856 rs = regs->regs[MIPSInst_RS(ir)];
857 __asm__ __volatile__("dclo %0, %1" : "=r"(res) : "r"(rs));
858 regs->regs[MIPSInst_RD(ir)] = res;
859
860 MIPS_R2_STATS(bops);
861
862 return 0;
863}
864
865/* R6 removed instructions for the SPECIAL2 opcode */
866static struct r2_decoder_table spec2_op_table[] = {
867 { 0xfc00ffff, 0x70000000, madd_func },
868 { 0xfc00ffff, 0x70000001, maddu_func },
869 { 0xfc0007ff, 0x70000002, mul_func },
870 { 0xfc00ffff, 0x70000004, msub_func },
871 { 0xfc00ffff, 0x70000005, msubu_func },
872 { 0xfc0007ff, 0x70000020, clz_func },
873 { 0xfc0007ff, 0x70000021, clo_func },
874 { 0xfc0007ff, 0x70000024, dclz_func },
875 { 0xfc0007ff, 0x70000025, dclo_func },
876 { }
877};
878
879static inline int mipsr2_find_op_func(struct pt_regs *regs, u32 inst,
880 struct r2_decoder_table *table)
881{
882 struct r2_decoder_table *p;
883 int err;
884
885 for (p = table; p->func; p++) {
886 if ((inst & p->mask) == p->code) {
887 err = (p->func)(regs, inst);
888 return err;
889 }
890 }
891 return SIGILL;
892}
893
894/**
895 * mipsr2_decoder: Decode and emulate a MIPS R2 instruction
896 * @regs: Process register set
897 * @inst: Instruction to decode and emulate
898 */
899int mipsr2_decoder(struct pt_regs *regs, u32 inst)
900{
901 int err = 0;
902 unsigned long vaddr;
903 u32 nir;
904 unsigned long cpc, epc, nepc, r31, res, rs, rt;
905
906 void __user *fault_addr = NULL;
907 int pass = 0;
908
909repeat:
910 r31 = regs->regs[31];
911 epc = regs->cp0_epc;
912 err = compute_return_epc(regs);
913 if (err < 0) {
914 BUG();
915 return SIGEMT;
916 }
917 pr_debug("Emulating the 0x%08x R2 instruction @ 0x%08lx (pass=%d))\n",
918 inst, epc, pass);
919
920 switch (MIPSInst_OPCODE(inst)) {
921 case spec_op:
922 err = mipsr2_find_op_func(regs, inst, spec_op_table);
923 if (err < 0) {
924 /* FPU instruction under JR */
925 regs->cp0_cause |= CAUSEF_BD;
926 goto fpu_emul;
927 }
928 break;
929 case spec2_op:
930 err = mipsr2_find_op_func(regs, inst, spec2_op_table);
931 break;
932 case bcond_op:
933 rt = MIPSInst_RT(inst);
934 rs = MIPSInst_RS(inst);
935 switch (rt) {
936 case tgei_op:
937 if ((long)regs->regs[rs] >= MIPSInst_SIMM(inst))
938 do_trap_or_bp(regs, 0, "TGEI");
939
940 MIPS_R2_STATS(traps);
941
942 break;
943 case tgeiu_op:
944 if (regs->regs[rs] >= MIPSInst_UIMM(inst))
945 do_trap_or_bp(regs, 0, "TGEIU");
946
947 MIPS_R2_STATS(traps);
948
949 break;
950 case tlti_op:
951 if ((long)regs->regs[rs] < MIPSInst_SIMM(inst))
952 do_trap_or_bp(regs, 0, "TLTI");
953
954 MIPS_R2_STATS(traps);
955
956 break;
957 case tltiu_op:
958 if (regs->regs[rs] < MIPSInst_UIMM(inst))
959 do_trap_or_bp(regs, 0, "TLTIU");
960
961 MIPS_R2_STATS(traps);
962
963 break;
964 case teqi_op:
965 if (regs->regs[rs] == MIPSInst_SIMM(inst))
966 do_trap_or_bp(regs, 0, "TEQI");
967
968 MIPS_R2_STATS(traps);
969
970 break;
971 case tnei_op:
972 if (regs->regs[rs] != MIPSInst_SIMM(inst))
973 do_trap_or_bp(regs, 0, "TNEI");
974
975 MIPS_R2_STATS(traps);
976
977 break;
978 case bltzl_op:
979 case bgezl_op:
980 case bltzall_op:
981 case bgezall_op:
982 if (delay_slot(regs)) {
983 err = SIGILL;
984 break;
985 }
986 regs->regs[31] = r31;
987 regs->cp0_epc = epc;
988 err = __compute_return_epc(regs);
989 if (err < 0)
990 return SIGEMT;
991 if (err != BRANCH_LIKELY_TAKEN)
992 break;
993 cpc = regs->cp0_epc;
994 nepc = epc + 4;
995 err = __get_user(nir, (u32 __user *)nepc);
996 if (err) {
997 err = SIGSEGV;
998 break;
999 }
1000 /*
1001 * This will probably be optimized away when
1002 * CONFIG_DEBUG_FS is not enabled
1003 */
1004 switch (rt) {
1005 case bltzl_op:
1006 MIPS_R2BR_STATS(bltzl);
1007 break;
1008 case bgezl_op:
1009 MIPS_R2BR_STATS(bgezl);
1010 break;
1011 case bltzall_op:
1012 MIPS_R2BR_STATS(bltzall);
1013 break;
1014 case bgezall_op:
1015 MIPS_R2BR_STATS(bgezall);
1016 break;
1017 }
1018
1019 switch (MIPSInst_OPCODE(nir)) {
1020 case cop1_op:
1021 case cop1x_op:
1022 case lwc1_op:
1023 case swc1_op:
1024 regs->cp0_cause |= CAUSEF_BD;
1025 goto fpu_emul;
1026 }
1027 if (nir) {
1028 err = mipsr6_emul(regs, nir);
1029 if (err > 0) {
1030 err = mips_dsemul(regs, nir, cpc);
1031 if (err == SIGILL)
1032 err = SIGEMT;
1033 MIPS_R2_STATS(dsemul);
1034 }
1035 }
1036 break;
1037 case bltzal_op:
1038 case bgezal_op:
1039 if (delay_slot(regs)) {
1040 err = SIGILL;
1041 break;
1042 }
1043 regs->regs[31] = r31;
1044 regs->cp0_epc = epc;
1045 err = __compute_return_epc(regs);
1046 if (err < 0)
1047 return SIGEMT;
1048 cpc = regs->cp0_epc;
1049 nepc = epc + 4;
1050 err = __get_user(nir, (u32 __user *)nepc);
1051 if (err) {
1052 err = SIGSEGV;
1053 break;
1054 }
1055 /*
1056 * This will probably be optimized away when
1057 * CONFIG_DEBUG_FS is not enabled
1058 */
1059 switch (rt) {
1060 case bltzal_op:
1061 MIPS_R2BR_STATS(bltzal);
1062 break;
1063 case bgezal_op:
1064 MIPS_R2BR_STATS(bgezal);
1065 break;
1066 }
1067
1068 switch (MIPSInst_OPCODE(nir)) {
1069 case cop1_op:
1070 case cop1x_op:
1071 case lwc1_op:
1072 case swc1_op:
1073 regs->cp0_cause |= CAUSEF_BD;
1074 goto fpu_emul;
1075 }
1076 if (nir) {
1077 err = mipsr6_emul(regs, nir);
1078 if (err > 0) {
1079 err = mips_dsemul(regs, nir, cpc);
1080 if (err == SIGILL)
1081 err = SIGEMT;
1082 MIPS_R2_STATS(dsemul);
1083 }
1084 }
1085 break;
1086 default:
1087 regs->regs[31] = r31;
1088 regs->cp0_epc = epc;
1089 err = SIGILL;
1090 break;
1091 }
1092 break;
1093
1094 case beql_op:
1095 case bnel_op:
1096 case blezl_op:
1097 case bgtzl_op:
1098 if (delay_slot(regs)) {
1099 err = SIGILL;
1100 break;
1101 }
1102 regs->regs[31] = r31;
1103 regs->cp0_epc = epc;
1104 err = __compute_return_epc(regs);
1105 if (err < 0)
1106 return SIGEMT;
1107 if (err != BRANCH_LIKELY_TAKEN)
1108 break;
1109 cpc = regs->cp0_epc;
1110 nepc = epc + 4;
1111 err = __get_user(nir, (u32 __user *)nepc);
1112 if (err) {
1113 err = SIGSEGV;
1114 break;
1115 }
1116 /*
1117 * This will probably be optimized away when
1118 * CONFIG_DEBUG_FS is not enabled
1119 */
1120 switch (MIPSInst_OPCODE(inst)) {
1121 case beql_op:
1122 MIPS_R2BR_STATS(beql);
1123 break;
1124 case bnel_op:
1125 MIPS_R2BR_STATS(bnel);
1126 break;
1127 case blezl_op:
1128 MIPS_R2BR_STATS(blezl);
1129 break;
1130 case bgtzl_op:
1131 MIPS_R2BR_STATS(bgtzl);
1132 break;
1133 }
1134
1135 switch (MIPSInst_OPCODE(nir)) {
1136 case cop1_op:
1137 case cop1x_op:
1138 case lwc1_op:
1139 case swc1_op:
1140 regs->cp0_cause |= CAUSEF_BD;
1141 goto fpu_emul;
1142 }
1143 if (nir) {
1144 err = mipsr6_emul(regs, nir);
1145 if (err > 0) {
1146 err = mips_dsemul(regs, nir, cpc);
1147 if (err == SIGILL)
1148 err = SIGEMT;
1149 MIPS_R2_STATS(dsemul);
1150 }
1151 }
1152 break;
1153 case lwc1_op:
1154 case swc1_op:
1155 case cop1_op:
1156 case cop1x_op:
1157fpu_emul:
1158 regs->regs[31] = r31;
1159 regs->cp0_epc = epc;
1160 if (!used_math()) { /* First time FPU user. */
1161 err = init_fpu();
1162 set_used_math();
1163 }
1164 lose_fpu(1); /* Save FPU state for the emulator. */
1165
1166 err = fpu_emulator_cop1Handler(regs, &current->thread.fpu, 0,
1167 &fault_addr);
1168
1169 /*
1170 * this is a tricky issue - lose_fpu() uses LL/SC atomics
1171 * if FPU is owned and effectively cancels user level LL/SC.
1172 * So, it could be logical to don't restore FPU ownership here.
1173 * But the sequence of multiple FPU instructions is much much
1174 * more often than LL-FPU-SC and I prefer loop here until
1175 * next scheduler cycle cancels FPU ownership
1176 */
1177 own_fpu(1); /* Restore FPU state. */
1178
1179 if (err)
1180 current->thread.cp0_baduaddr = (unsigned long)fault_addr;
1181
1182 MIPS_R2_STATS(fpus);
1183
1184 break;
1185
1186 case lwl_op:
1187 rt = regs->regs[MIPSInst_RT(inst)];
1188 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
1189 if (!access_ok(VERIFY_READ, vaddr, 4)) {
1190 current->thread.cp0_baduaddr = vaddr;
1191 err = SIGSEGV;
1192 break;
1193 }
1194 __asm__ __volatile__(
1195 " .set push\n"
1196 " .set reorder\n"
1197#ifdef CONFIG_CPU_LITTLE_ENDIAN
1198 "1:" LB "%1, 0(%2)\n"
1199 INS "%0, %1, 24, 8\n"
1200 " andi %1, %2, 0x3\n"
1201 " beq $0, %1, 9f\n"
1202 ADDIU "%2, %2, -1\n"
1203 "2:" LB "%1, 0(%2)\n"
1204 INS "%0, %1, 16, 8\n"
1205 " andi %1, %2, 0x3\n"
1206 " beq $0, %1, 9f\n"
1207 ADDIU "%2, %2, -1\n"
1208 "3:" LB "%1, 0(%2)\n"
1209 INS "%0, %1, 8, 8\n"
1210 " andi %1, %2, 0x3\n"
1211 " beq $0, %1, 9f\n"
1212 ADDIU "%2, %2, -1\n"
1213 "4:" LB "%1, 0(%2)\n"
1214 INS "%0, %1, 0, 8\n"
1215#else /* !CONFIG_CPU_LITTLE_ENDIAN */
1216 "1:" LB "%1, 0(%2)\n"
1217 INS "%0, %1, 24, 8\n"
1218 ADDIU "%2, %2, 1\n"
1219 " andi %1, %2, 0x3\n"
1220 " beq $0, %1, 9f\n"
1221 "2:" LB "%1, 0(%2)\n"
1222 INS "%0, %1, 16, 8\n"
1223 ADDIU "%2, %2, 1\n"
1224 " andi %1, %2, 0x3\n"
1225 " beq $0, %1, 9f\n"
1226 "3:" LB "%1, 0(%2)\n"
1227 INS "%0, %1, 8, 8\n"
1228 ADDIU "%2, %2, 1\n"
1229 " andi %1, %2, 0x3\n"
1230 " beq $0, %1, 9f\n"
1231 "4:" LB "%1, 0(%2)\n"
1232 INS "%0, %1, 0, 8\n"
1233#endif /* CONFIG_CPU_LITTLE_ENDIAN */
1234 "9: sll %0, %0, 0\n"
1235 "10:\n"
1236 " .insn\n"
1237 " .section .fixup,\"ax\"\n"
1238 "8: li %3,%4\n"
1239 " j 10b\n"
1240 " .previous\n"
1241 " .section __ex_table,\"a\"\n"
1242 " .word 1b,8b\n"
1243 " .word 2b,8b\n"
1244 " .word 3b,8b\n"
1245 " .word 4b,8b\n"
1246 " .previous\n"
1247 " .set pop\n"
1248 : "+&r"(rt), "=&r"(rs),
1249 "+&r"(vaddr), "+&r"(err)
1250 : "i"(SIGSEGV));
1251
1252 if (MIPSInst_RT(inst) && !err)
1253 regs->regs[MIPSInst_RT(inst)] = rt;
1254
1255 MIPS_R2_STATS(loads);
1256
1257 break;
1258
1259 case lwr_op:
1260 rt = regs->regs[MIPSInst_RT(inst)];
1261 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
1262 if (!access_ok(VERIFY_READ, vaddr, 4)) {
1263 current->thread.cp0_baduaddr = vaddr;
1264 err = SIGSEGV;
1265 break;
1266 }
1267 __asm__ __volatile__(
1268 " .set push\n"
1269 " .set reorder\n"
1270#ifdef CONFIG_CPU_LITTLE_ENDIAN
1271 "1:" LB "%1, 0(%2)\n"
1272 INS "%0, %1, 0, 8\n"
1273 ADDIU "%2, %2, 1\n"
1274 " andi %1, %2, 0x3\n"
1275 " beq $0, %1, 9f\n"
1276 "2:" LB "%1, 0(%2)\n"
1277 INS "%0, %1, 8, 8\n"
1278 ADDIU "%2, %2, 1\n"
1279 " andi %1, %2, 0x3\n"
1280 " beq $0, %1, 9f\n"
1281 "3:" LB "%1, 0(%2)\n"
1282 INS "%0, %1, 16, 8\n"
1283 ADDIU "%2, %2, 1\n"
1284 " andi %1, %2, 0x3\n"
1285 " beq $0, %1, 9f\n"
1286 "4:" LB "%1, 0(%2)\n"
1287 INS "%0, %1, 24, 8\n"
1288 " sll %0, %0, 0\n"
1289#else /* !CONFIG_CPU_LITTLE_ENDIAN */
1290 "1:" LB "%1, 0(%2)\n"
1291 INS "%0, %1, 0, 8\n"
1292 " andi %1, %2, 0x3\n"
1293 " beq $0, %1, 9f\n"
1294 ADDIU "%2, %2, -1\n"
1295 "2:" LB "%1, 0(%2)\n"
1296 INS "%0, %1, 8, 8\n"
1297 " andi %1, %2, 0x3\n"
1298 " beq $0, %1, 9f\n"
1299 ADDIU "%2, %2, -1\n"
1300 "3:" LB "%1, 0(%2)\n"
1301 INS "%0, %1, 16, 8\n"
1302 " andi %1, %2, 0x3\n"
1303 " beq $0, %1, 9f\n"
1304 ADDIU "%2, %2, -1\n"
1305 "4:" LB "%1, 0(%2)\n"
1306 INS "%0, %1, 24, 8\n"
1307 " sll %0, %0, 0\n"
1308#endif /* CONFIG_CPU_LITTLE_ENDIAN */
1309 "9:\n"
1310 "10:\n"
1311 " .insn\n"
1312 " .section .fixup,\"ax\"\n"
1313 "8: li %3,%4\n"
1314 " j 10b\n"
1315 " .previous\n"
1316 " .section __ex_table,\"a\"\n"
1317 " .word 1b,8b\n"
1318 " .word 2b,8b\n"
1319 " .word 3b,8b\n"
1320 " .word 4b,8b\n"
1321 " .previous\n"
1322 " .set pop\n"
1323 : "+&r"(rt), "=&r"(rs),
1324 "+&r"(vaddr), "+&r"(err)
1325 : "i"(SIGSEGV));
1326 if (MIPSInst_RT(inst) && !err)
1327 regs->regs[MIPSInst_RT(inst)] = rt;
1328
1329 MIPS_R2_STATS(loads);
1330
1331 break;
1332
1333 case swl_op:
1334 rt = regs->regs[MIPSInst_RT(inst)];
1335 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
1336 if (!access_ok(VERIFY_WRITE, vaddr, 4)) {
1337 current->thread.cp0_baduaddr = vaddr;
1338 err = SIGSEGV;
1339 break;
1340 }
1341 __asm__ __volatile__(
1342 " .set push\n"
1343 " .set reorder\n"
1344#ifdef CONFIG_CPU_LITTLE_ENDIAN
1345 EXT "%1, %0, 24, 8\n"
1346 "1:" SB "%1, 0(%2)\n"
1347 " andi %1, %2, 0x3\n"
1348 " beq $0, %1, 9f\n"
1349 ADDIU "%2, %2, -1\n"
1350 EXT "%1, %0, 16, 8\n"
1351 "2:" SB "%1, 0(%2)\n"
1352 " andi %1, %2, 0x3\n"
1353 " beq $0, %1, 9f\n"
1354 ADDIU "%2, %2, -1\n"
1355 EXT "%1, %0, 8, 8\n"
1356 "3:" SB "%1, 0(%2)\n"
1357 " andi %1, %2, 0x3\n"
1358 " beq $0, %1, 9f\n"
1359 ADDIU "%2, %2, -1\n"
1360 EXT "%1, %0, 0, 8\n"
1361 "4:" SB "%1, 0(%2)\n"
1362#else /* !CONFIG_CPU_LITTLE_ENDIAN */
1363 EXT "%1, %0, 24, 8\n"
1364 "1:" SB "%1, 0(%2)\n"
1365 ADDIU "%2, %2, 1\n"
1366 " andi %1, %2, 0x3\n"
1367 " beq $0, %1, 9f\n"
1368 EXT "%1, %0, 16, 8\n"
1369 "2:" SB "%1, 0(%2)\n"
1370 ADDIU "%2, %2, 1\n"
1371 " andi %1, %2, 0x3\n"
1372 " beq $0, %1, 9f\n"
1373 EXT "%1, %0, 8, 8\n"
1374 "3:" SB "%1, 0(%2)\n"
1375 ADDIU "%2, %2, 1\n"
1376 " andi %1, %2, 0x3\n"
1377 " beq $0, %1, 9f\n"
1378 EXT "%1, %0, 0, 8\n"
1379 "4:" SB "%1, 0(%2)\n"
1380#endif /* CONFIG_CPU_LITTLE_ENDIAN */
1381 "9:\n"
1382 " .insn\n"
1383 " .section .fixup,\"ax\"\n"
1384 "8: li %3,%4\n"
1385 " j 9b\n"
1386 " .previous\n"
1387 " .section __ex_table,\"a\"\n"
1388 " .word 1b,8b\n"
1389 " .word 2b,8b\n"
1390 " .word 3b,8b\n"
1391 " .word 4b,8b\n"
1392 " .previous\n"
1393 " .set pop\n"
1394 : "+&r"(rt), "=&r"(rs),
1395 "+&r"(vaddr), "+&r"(err)
1396 : "i"(SIGSEGV)
1397 : "memory");
1398
1399 MIPS_R2_STATS(stores);
1400
1401 break;
1402
1403 case swr_op:
1404 rt = regs->regs[MIPSInst_RT(inst)];
1405 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
1406 if (!access_ok(VERIFY_WRITE, vaddr, 4)) {
1407 current->thread.cp0_baduaddr = vaddr;
1408 err = SIGSEGV;
1409 break;
1410 }
1411 __asm__ __volatile__(
1412 " .set push\n"
1413 " .set reorder\n"
1414#ifdef CONFIG_CPU_LITTLE_ENDIAN
1415 EXT "%1, %0, 0, 8\n"
1416 "1:" SB "%1, 0(%2)\n"
1417 ADDIU "%2, %2, 1\n"
1418 " andi %1, %2, 0x3\n"
1419 " beq $0, %1, 9f\n"
1420 EXT "%1, %0, 8, 8\n"
1421 "2:" SB "%1, 0(%2)\n"
1422 ADDIU "%2, %2, 1\n"
1423 " andi %1, %2, 0x3\n"
1424 " beq $0, %1, 9f\n"
1425 EXT "%1, %0, 16, 8\n"
1426 "3:" SB "%1, 0(%2)\n"
1427 ADDIU "%2, %2, 1\n"
1428 " andi %1, %2, 0x3\n"
1429 " beq $0, %1, 9f\n"
1430 EXT "%1, %0, 24, 8\n"
1431 "4:" SB "%1, 0(%2)\n"
1432#else /* !CONFIG_CPU_LITTLE_ENDIAN */
1433 EXT "%1, %0, 0, 8\n"
1434 "1:" SB "%1, 0(%2)\n"
1435 " andi %1, %2, 0x3\n"
1436 " beq $0, %1, 9f\n"
1437 ADDIU "%2, %2, -1\n"
1438 EXT "%1, %0, 8, 8\n"
1439 "2:" SB "%1, 0(%2)\n"
1440 " andi %1, %2, 0x3\n"
1441 " beq $0, %1, 9f\n"
1442 ADDIU "%2, %2, -1\n"
1443 EXT "%1, %0, 16, 8\n"
1444 "3:" SB "%1, 0(%2)\n"
1445 " andi %1, %2, 0x3\n"
1446 " beq $0, %1, 9f\n"
1447 ADDIU "%2, %2, -1\n"
1448 EXT "%1, %0, 24, 8\n"
1449 "4:" SB "%1, 0(%2)\n"
1450#endif /* CONFIG_CPU_LITTLE_ENDIAN */
1451 "9:\n"
1452 " .insn\n"
1453 " .section .fixup,\"ax\"\n"
1454 "8: li %3,%4\n"
1455 " j 9b\n"
1456 " .previous\n"
1457 " .section __ex_table,\"a\"\n"
1458 " .word 1b,8b\n"
1459 " .word 2b,8b\n"
1460 " .word 3b,8b\n"
1461 " .word 4b,8b\n"
1462 " .previous\n"
1463 " .set pop\n"
1464 : "+&r"(rt), "=&r"(rs),
1465 "+&r"(vaddr), "+&r"(err)
1466 : "i"(SIGSEGV)
1467 : "memory");
1468
1469 MIPS_R2_STATS(stores);
1470
1471 break;
1472
1473 case ldl_op:
1474 if (config_enabled(CONFIG_32BIT)) {
1475 err = SIGILL;
1476 break;
1477 }
1478
1479 rt = regs->regs[MIPSInst_RT(inst)];
1480 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
1481 if (!access_ok(VERIFY_READ, vaddr, 8)) {
1482 current->thread.cp0_baduaddr = vaddr;
1483 err = SIGSEGV;
1484 break;
1485 }
1486 __asm__ __volatile__(
1487 " .set push\n"
1488 " .set reorder\n"
1489#ifdef CONFIG_CPU_LITTLE_ENDIAN
1490 "1: lb %1, 0(%2)\n"
1491 " dinsu %0, %1, 56, 8\n"
1492 " andi %1, %2, 0x7\n"
1493 " beq $0, %1, 9f\n"
1494 " daddiu %2, %2, -1\n"
1495 "2: lb %1, 0(%2)\n"
1496 " dinsu %0, %1, 48, 8\n"
1497 " andi %1, %2, 0x7\n"
1498 " beq $0, %1, 9f\n"
1499 " daddiu %2, %2, -1\n"
1500 "3: lb %1, 0(%2)\n"
1501 " dinsu %0, %1, 40, 8\n"
1502 " andi %1, %2, 0x7\n"
1503 " beq $0, %1, 9f\n"
1504 " daddiu %2, %2, -1\n"
1505 "4: lb %1, 0(%2)\n"
1506 " dinsu %0, %1, 32, 8\n"
1507 " andi %1, %2, 0x7\n"
1508 " beq $0, %1, 9f\n"
1509 " daddiu %2, %2, -1\n"
1510 "5: lb %1, 0(%2)\n"
1511 " dins %0, %1, 24, 8\n"
1512 " andi %1, %2, 0x7\n"
1513 " beq $0, %1, 9f\n"
1514 " daddiu %2, %2, -1\n"
1515 "6: lb %1, 0(%2)\n"
1516 " dins %0, %1, 16, 8\n"
1517 " andi %1, %2, 0x7\n"
1518 " beq $0, %1, 9f\n"
1519 " daddiu %2, %2, -1\n"
1520 "7: lb %1, 0(%2)\n"
1521 " dins %0, %1, 8, 8\n"
1522 " andi %1, %2, 0x7\n"
1523 " beq $0, %1, 9f\n"
1524 " daddiu %2, %2, -1\n"
1525 "0: lb %1, 0(%2)\n"
1526 " dins %0, %1, 0, 8\n"
1527#else /* !CONFIG_CPU_LITTLE_ENDIAN */
1528 "1: lb %1, 0(%2)\n"
1529 " dinsu %0, %1, 56, 8\n"
1530 " daddiu %2, %2, 1\n"
1531 " andi %1, %2, 0x7\n"
1532 " beq $0, %1, 9f\n"
1533 "2: lb %1, 0(%2)\n"
1534 " dinsu %0, %1, 48, 8\n"
1535 " daddiu %2, %2, 1\n"
1536 " andi %1, %2, 0x7\n"
1537 " beq $0, %1, 9f\n"
1538 "3: lb %1, 0(%2)\n"
1539 " dinsu %0, %1, 40, 8\n"
1540 " daddiu %2, %2, 1\n"
1541 " andi %1, %2, 0x7\n"
1542 " beq $0, %1, 9f\n"
1543 "4: lb %1, 0(%2)\n"
1544 " dinsu %0, %1, 32, 8\n"
1545 " daddiu %2, %2, 1\n"
1546 " andi %1, %2, 0x7\n"
1547 " beq $0, %1, 9f\n"
1548 "5: lb %1, 0(%2)\n"
1549 " dins %0, %1, 24, 8\n"
1550 " daddiu %2, %2, 1\n"
1551 " andi %1, %2, 0x7\n"
1552 " beq $0, %1, 9f\n"
1553 "6: lb %1, 0(%2)\n"
1554 " dins %0, %1, 16, 8\n"
1555 " daddiu %2, %2, 1\n"
1556 " andi %1, %2, 0x7\n"
1557 " beq $0, %1, 9f\n"
1558 "7: lb %1, 0(%2)\n"
1559 " dins %0, %1, 8, 8\n"
1560 " daddiu %2, %2, 1\n"
1561 " andi %1, %2, 0x7\n"
1562 " beq $0, %1, 9f\n"
1563 "0: lb %1, 0(%2)\n"
1564 " dins %0, %1, 0, 8\n"
1565#endif /* CONFIG_CPU_LITTLE_ENDIAN */
1566 "9:\n"
1567 " .insn\n"
1568 " .section .fixup,\"ax\"\n"
1569 "8: li %3,%4\n"
1570 " j 9b\n"
1571 " .previous\n"
1572 " .section __ex_table,\"a\"\n"
1573 " .word 1b,8b\n"
1574 " .word 2b,8b\n"
1575 " .word 3b,8b\n"
1576 " .word 4b,8b\n"
1577 " .word 5b,8b\n"
1578 " .word 6b,8b\n"
1579 " .word 7b,8b\n"
1580 " .word 0b,8b\n"
1581 " .previous\n"
1582 " .set pop\n"
1583 : "+&r"(rt), "=&r"(rs),
1584 "+&r"(vaddr), "+&r"(err)
1585 : "i"(SIGSEGV));
1586 if (MIPSInst_RT(inst) && !err)
1587 regs->regs[MIPSInst_RT(inst)] = rt;
1588
1589 MIPS_R2_STATS(loads);
1590 break;
1591
1592 case ldr_op:
1593 if (config_enabled(CONFIG_32BIT)) {
1594 err = SIGILL;
1595 break;
1596 }
1597
1598 rt = regs->regs[MIPSInst_RT(inst)];
1599 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
1600 if (!access_ok(VERIFY_READ, vaddr, 8)) {
1601 current->thread.cp0_baduaddr = vaddr;
1602 err = SIGSEGV;
1603 break;
1604 }
1605 __asm__ __volatile__(
1606 " .set push\n"
1607 " .set reorder\n"
1608#ifdef CONFIG_CPU_LITTLE_ENDIAN
1609 "1: lb %1, 0(%2)\n"
1610 " dins %0, %1, 0, 8\n"
1611 " daddiu %2, %2, 1\n"
1612 " andi %1, %2, 0x7\n"
1613 " beq $0, %1, 9f\n"
1614 "2: lb %1, 0(%2)\n"
1615 " dins %0, %1, 8, 8\n"
1616 " daddiu %2, %2, 1\n"
1617 " andi %1, %2, 0x7\n"
1618 " beq $0, %1, 9f\n"
1619 "3: lb %1, 0(%2)\n"
1620 " dins %0, %1, 16, 8\n"
1621 " daddiu %2, %2, 1\n"
1622 " andi %1, %2, 0x7\n"
1623 " beq $0, %1, 9f\n"
1624 "4: lb %1, 0(%2)\n"
1625 " dins %0, %1, 24, 8\n"
1626 " daddiu %2, %2, 1\n"
1627 " andi %1, %2, 0x7\n"
1628 " beq $0, %1, 9f\n"
1629 "5: lb %1, 0(%2)\n"
1630 " dinsu %0, %1, 32, 8\n"
1631 " daddiu %2, %2, 1\n"
1632 " andi %1, %2, 0x7\n"
1633 " beq $0, %1, 9f\n"
1634 "6: lb %1, 0(%2)\n"
1635 " dinsu %0, %1, 40, 8\n"
1636 " daddiu %2, %2, 1\n"
1637 " andi %1, %2, 0x7\n"
1638 " beq $0, %1, 9f\n"
1639 "7: lb %1, 0(%2)\n"
1640 " dinsu %0, %1, 48, 8\n"
1641 " daddiu %2, %2, 1\n"
1642 " andi %1, %2, 0x7\n"
1643 " beq $0, %1, 9f\n"
1644 "0: lb %1, 0(%2)\n"
1645 " dinsu %0, %1, 56, 8\n"
1646#else /* !CONFIG_CPU_LITTLE_ENDIAN */
1647 "1: lb %1, 0(%2)\n"
1648 " dins %0, %1, 0, 8\n"
1649 " andi %1, %2, 0x7\n"
1650 " beq $0, %1, 9f\n"
1651 " daddiu %2, %2, -1\n"
1652 "2: lb %1, 0(%2)\n"
1653 " dins %0, %1, 8, 8\n"
1654 " andi %1, %2, 0x7\n"
1655 " beq $0, %1, 9f\n"
1656 " daddiu %2, %2, -1\n"
1657 "3: lb %1, 0(%2)\n"
1658 " dins %0, %1, 16, 8\n"
1659 " andi %1, %2, 0x7\n"
1660 " beq $0, %1, 9f\n"
1661 " daddiu %2, %2, -1\n"
1662 "4: lb %1, 0(%2)\n"
1663 " dins %0, %1, 24, 8\n"
1664 " andi %1, %2, 0x7\n"
1665 " beq $0, %1, 9f\n"
1666 " daddiu %2, %2, -1\n"
1667 "5: lb %1, 0(%2)\n"
1668 " dinsu %0, %1, 32, 8\n"
1669 " andi %1, %2, 0x7\n"
1670 " beq $0, %1, 9f\n"
1671 " daddiu %2, %2, -1\n"
1672 "6: lb %1, 0(%2)\n"
1673 " dinsu %0, %1, 40, 8\n"
1674 " andi %1, %2, 0x7\n"
1675 " beq $0, %1, 9f\n"
1676 " daddiu %2, %2, -1\n"
1677 "7: lb %1, 0(%2)\n"
1678 " dinsu %0, %1, 48, 8\n"
1679 " andi %1, %2, 0x7\n"
1680 " beq $0, %1, 9f\n"
1681 " daddiu %2, %2, -1\n"
1682 "0: lb %1, 0(%2)\n"
1683 " dinsu %0, %1, 56, 8\n"
1684#endif /* CONFIG_CPU_LITTLE_ENDIAN */
1685 "9:\n"
1686 " .insn\n"
1687 " .section .fixup,\"ax\"\n"
1688 "8: li %3,%4\n"
1689 " j 9b\n"
1690 " .previous\n"
1691 " .section __ex_table,\"a\"\n"
1692 " .word 1b,8b\n"
1693 " .word 2b,8b\n"
1694 " .word 3b,8b\n"
1695 " .word 4b,8b\n"
1696 " .word 5b,8b\n"
1697 " .word 6b,8b\n"
1698 " .word 7b,8b\n"
1699 " .word 0b,8b\n"
1700 " .previous\n"
1701 " .set pop\n"
1702 : "+&r"(rt), "=&r"(rs),
1703 "+&r"(vaddr), "+&r"(err)
1704 : "i"(SIGSEGV));
1705 if (MIPSInst_RT(inst) && !err)
1706 regs->regs[MIPSInst_RT(inst)] = rt;
1707
1708 MIPS_R2_STATS(loads);
1709 break;
1710
1711 case sdl_op:
1712 if (config_enabled(CONFIG_32BIT)) {
1713 err = SIGILL;
1714 break;
1715 }
1716
1717 rt = regs->regs[MIPSInst_RT(inst)];
1718 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
1719 if (!access_ok(VERIFY_WRITE, vaddr, 8)) {
1720 current->thread.cp0_baduaddr = vaddr;
1721 err = SIGSEGV;
1722 break;
1723 }
1724 __asm__ __volatile__(
1725 " .set push\n"
1726 " .set reorder\n"
1727#ifdef CONFIG_CPU_LITTLE_ENDIAN
1728 " dextu %1, %0, 56, 8\n"
1729 "1: sb %1, 0(%2)\n"
1730 " andi %1, %2, 0x7\n"
1731 " beq $0, %1, 9f\n"
1732 " daddiu %2, %2, -1\n"
1733 " dextu %1, %0, 48, 8\n"
1734 "2: sb %1, 0(%2)\n"
1735 " andi %1, %2, 0x7\n"
1736 " beq $0, %1, 9f\n"
1737 " daddiu %2, %2, -1\n"
1738 " dextu %1, %0, 40, 8\n"
1739 "3: sb %1, 0(%2)\n"
1740 " andi %1, %2, 0x7\n"
1741 " beq $0, %1, 9f\n"
1742 " daddiu %2, %2, -1\n"
1743 " dextu %1, %0, 32, 8\n"
1744 "4: sb %1, 0(%2)\n"
1745 " andi %1, %2, 0x7\n"
1746 " beq $0, %1, 9f\n"
1747 " daddiu %2, %2, -1\n"
1748 " dext %1, %0, 24, 8\n"
1749 "5: sb %1, 0(%2)\n"
1750 " andi %1, %2, 0x7\n"
1751 " beq $0, %1, 9f\n"
1752 " daddiu %2, %2, -1\n"
1753 " dext %1, %0, 16, 8\n"
1754 "6: sb %1, 0(%2)\n"
1755 " andi %1, %2, 0x7\n"
1756 " beq $0, %1, 9f\n"
1757 " daddiu %2, %2, -1\n"
1758 " dext %1, %0, 8, 8\n"
1759 "7: sb %1, 0(%2)\n"
1760 " andi %1, %2, 0x7\n"
1761 " beq $0, %1, 9f\n"
1762 " daddiu %2, %2, -1\n"
1763 " dext %1, %0, 0, 8\n"
1764 "0: sb %1, 0(%2)\n"
1765#else /* !CONFIG_CPU_LITTLE_ENDIAN */
1766 " dextu %1, %0, 56, 8\n"
1767 "1: sb %1, 0(%2)\n"
1768 " daddiu %2, %2, 1\n"
1769 " andi %1, %2, 0x7\n"
1770 " beq $0, %1, 9f\n"
1771 " dextu %1, %0, 48, 8\n"
1772 "2: sb %1, 0(%2)\n"
1773 " daddiu %2, %2, 1\n"
1774 " andi %1, %2, 0x7\n"
1775 " beq $0, %1, 9f\n"
1776 " dextu %1, %0, 40, 8\n"
1777 "3: sb %1, 0(%2)\n"
1778 " daddiu %2, %2, 1\n"
1779 " andi %1, %2, 0x7\n"
1780 " beq $0, %1, 9f\n"
1781 " dextu %1, %0, 32, 8\n"
1782 "4: sb %1, 0(%2)\n"
1783 " daddiu %2, %2, 1\n"
1784 " andi %1, %2, 0x7\n"
1785 " beq $0, %1, 9f\n"
1786 " dext %1, %0, 24, 8\n"
1787 "5: sb %1, 0(%2)\n"
1788 " daddiu %2, %2, 1\n"
1789 " andi %1, %2, 0x7\n"
1790 " beq $0, %1, 9f\n"
1791 " dext %1, %0, 16, 8\n"
1792 "6: sb %1, 0(%2)\n"
1793 " daddiu %2, %2, 1\n"
1794 " andi %1, %2, 0x7\n"
1795 " beq $0, %1, 9f\n"
1796 " dext %1, %0, 8, 8\n"
1797 "7: sb %1, 0(%2)\n"
1798 " daddiu %2, %2, 1\n"
1799 " andi %1, %2, 0x7\n"
1800 " beq $0, %1, 9f\n"
1801 " dext %1, %0, 0, 8\n"
1802 "0: sb %1, 0(%2)\n"
1803#endif /* CONFIG_CPU_LITTLE_ENDIAN */
1804 "9:\n"
1805 " .insn\n"
1806 " .section .fixup,\"ax\"\n"
1807 "8: li %3,%4\n"
1808 " j 9b\n"
1809 " .previous\n"
1810 " .section __ex_table,\"a\"\n"
1811 " .word 1b,8b\n"
1812 " .word 2b,8b\n"
1813 " .word 3b,8b\n"
1814 " .word 4b,8b\n"
1815 " .word 5b,8b\n"
1816 " .word 6b,8b\n"
1817 " .word 7b,8b\n"
1818 " .word 0b,8b\n"
1819 " .previous\n"
1820 " .set pop\n"
1821 : "+&r"(rt), "=&r"(rs),
1822 "+&r"(vaddr), "+&r"(err)
1823 : "i"(SIGSEGV)
1824 : "memory");
1825
1826 MIPS_R2_STATS(stores);
1827 break;
1828
1829 case sdr_op:
1830 if (config_enabled(CONFIG_32BIT)) {
1831 err = SIGILL;
1832 break;
1833 }
1834
1835 rt = regs->regs[MIPSInst_RT(inst)];
1836 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
1837 if (!access_ok(VERIFY_WRITE, vaddr, 8)) {
1838 current->thread.cp0_baduaddr = vaddr;
1839 err = SIGSEGV;
1840 break;
1841 }
1842 __asm__ __volatile__(
1843 " .set push\n"
1844 " .set reorder\n"
1845#ifdef CONFIG_CPU_LITTLE_ENDIAN
1846 " dext %1, %0, 0, 8\n"
1847 "1: sb %1, 0(%2)\n"
1848 " daddiu %2, %2, 1\n"
1849 " andi %1, %2, 0x7\n"
1850 " beq $0, %1, 9f\n"
1851 " dext %1, %0, 8, 8\n"
1852 "2: sb %1, 0(%2)\n"
1853 " daddiu %2, %2, 1\n"
1854 " andi %1, %2, 0x7\n"
1855 " beq $0, %1, 9f\n"
1856 " dext %1, %0, 16, 8\n"
1857 "3: sb %1, 0(%2)\n"
1858 " daddiu %2, %2, 1\n"
1859 " andi %1, %2, 0x7\n"
1860 " beq $0, %1, 9f\n"
1861 " dext %1, %0, 24, 8\n"
1862 "4: sb %1, 0(%2)\n"
1863 " daddiu %2, %2, 1\n"
1864 " andi %1, %2, 0x7\n"
1865 " beq $0, %1, 9f\n"
1866 " dextu %1, %0, 32, 8\n"
1867 "5: sb %1, 0(%2)\n"
1868 " daddiu %2, %2, 1\n"
1869 " andi %1, %2, 0x7\n"
1870 " beq $0, %1, 9f\n"
1871 " dextu %1, %0, 40, 8\n"
1872 "6: sb %1, 0(%2)\n"
1873 " daddiu %2, %2, 1\n"
1874 " andi %1, %2, 0x7\n"
1875 " beq $0, %1, 9f\n"
1876 " dextu %1, %0, 48, 8\n"
1877 "7: sb %1, 0(%2)\n"
1878 " daddiu %2, %2, 1\n"
1879 " andi %1, %2, 0x7\n"
1880 " beq $0, %1, 9f\n"
1881 " dextu %1, %0, 56, 8\n"
1882 "0: sb %1, 0(%2)\n"
1883#else /* !CONFIG_CPU_LITTLE_ENDIAN */
1884 " dext %1, %0, 0, 8\n"
1885 "1: sb %1, 0(%2)\n"
1886 " andi %1, %2, 0x7\n"
1887 " beq $0, %1, 9f\n"
1888 " daddiu %2, %2, -1\n"
1889 " dext %1, %0, 8, 8\n"
1890 "2: sb %1, 0(%2)\n"
1891 " andi %1, %2, 0x7\n"
1892 " beq $0, %1, 9f\n"
1893 " daddiu %2, %2, -1\n"
1894 " dext %1, %0, 16, 8\n"
1895 "3: sb %1, 0(%2)\n"
1896 " andi %1, %2, 0x7\n"
1897 " beq $0, %1, 9f\n"
1898 " daddiu %2, %2, -1\n"
1899 " dext %1, %0, 24, 8\n"
1900 "4: sb %1, 0(%2)\n"
1901 " andi %1, %2, 0x7\n"
1902 " beq $0, %1, 9f\n"
1903 " daddiu %2, %2, -1\n"
1904 " dextu %1, %0, 32, 8\n"
1905 "5: sb %1, 0(%2)\n"
1906 " andi %1, %2, 0x7\n"
1907 " beq $0, %1, 9f\n"
1908 " daddiu %2, %2, -1\n"
1909 " dextu %1, %0, 40, 8\n"
1910 "6: sb %1, 0(%2)\n"
1911 " andi %1, %2, 0x7\n"
1912 " beq $0, %1, 9f\n"
1913 " daddiu %2, %2, -1\n"
1914 " dextu %1, %0, 48, 8\n"
1915 "7: sb %1, 0(%2)\n"
1916 " andi %1, %2, 0x7\n"
1917 " beq $0, %1, 9f\n"
1918 " daddiu %2, %2, -1\n"
1919 " dextu %1, %0, 56, 8\n"
1920 "0: sb %1, 0(%2)\n"
1921#endif /* CONFIG_CPU_LITTLE_ENDIAN */
1922 "9:\n"
1923 " .insn\n"
1924 " .section .fixup,\"ax\"\n"
1925 "8: li %3,%4\n"
1926 " j 9b\n"
1927 " .previous\n"
1928 " .section __ex_table,\"a\"\n"
1929 " .word 1b,8b\n"
1930 " .word 2b,8b\n"
1931 " .word 3b,8b\n"
1932 " .word 4b,8b\n"
1933 " .word 5b,8b\n"
1934 " .word 6b,8b\n"
1935 " .word 7b,8b\n"
1936 " .word 0b,8b\n"
1937 " .previous\n"
1938 " .set pop\n"
1939 : "+&r"(rt), "=&r"(rs),
1940 "+&r"(vaddr), "+&r"(err)
1941 : "i"(SIGSEGV)
1942 : "memory");
1943
1944 MIPS_R2_STATS(stores);
1945
1946 break;
1947 case ll_op:
1948 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
1949 if (vaddr & 0x3) {
1950 current->thread.cp0_baduaddr = vaddr;
1951 err = SIGBUS;
1952 break;
1953 }
1954 if (!access_ok(VERIFY_READ, vaddr, 4)) {
1955 current->thread.cp0_baduaddr = vaddr;
1956 err = SIGBUS;
1957 break;
1958 }
1959
1960 if (!cpu_has_rw_llb) {
1961 /*
1962 * An LL/SC block can't be safely emulated without
1963 * a Config5/LLB availability. So it's probably time to
1964 * kill our process before things get any worse. This is
1965 * because Config5/LLB allows us to use ERETNC so that
1966 * the LLAddr/LLB bit is not cleared when we return from
1967 * an exception. MIPS R2 LL/SC instructions trap with an
1968 * RI exception so once we emulate them here, we return
1969 * back to userland with ERETNC. That preserves the
1970 * LLAddr/LLB so the subsequent SC instruction will
1971 * succeed preserving the atomic semantics of the LL/SC
1972 * block. Without that, there is no safe way to emulate
1973 * an LL/SC block in MIPSR2 userland.
1974 */
1975 pr_err("Can't emulate MIPSR2 LL/SC without Config5/LLB\n");
1976 err = SIGKILL;
1977 break;
1978 }
1979
1980 __asm__ __volatile__(
1981 "1:\n"
1982 "ll %0, 0(%2)\n"
1983 "2:\n"
1984 ".insn\n"
1985 ".section .fixup,\"ax\"\n"
1986 "3:\n"
1987 "li %1, %3\n"
1988 "j 2b\n"
1989 ".previous\n"
1990 ".section __ex_table,\"a\"\n"
1991 ".word 1b, 3b\n"
1992 ".previous\n"
1993 : "=&r"(res), "+&r"(err)
1994 : "r"(vaddr), "i"(SIGSEGV)
1995 : "memory");
1996
1997 if (MIPSInst_RT(inst) && !err)
1998 regs->regs[MIPSInst_RT(inst)] = res;
1999 MIPS_R2_STATS(llsc);
2000
2001 break;
2002
2003 case sc_op:
2004 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
2005 if (vaddr & 0x3) {
2006 current->thread.cp0_baduaddr = vaddr;
2007 err = SIGBUS;
2008 break;
2009 }
2010 if (!access_ok(VERIFY_WRITE, vaddr, 4)) {
2011 current->thread.cp0_baduaddr = vaddr;
2012 err = SIGBUS;
2013 break;
2014 }
2015
2016 if (!cpu_has_rw_llb) {
2017 /*
2018 * An LL/SC block can't be safely emulated without
2019 * a Config5/LLB availability. So it's probably time to
2020 * kill our process before things get any worse. This is
2021 * because Config5/LLB allows us to use ERETNC so that
2022 * the LLAddr/LLB bit is not cleared when we return from
2023 * an exception. MIPS R2 LL/SC instructions trap with an
2024 * RI exception so once we emulate them here, we return
2025 * back to userland with ERETNC. That preserves the
2026 * LLAddr/LLB so the subsequent SC instruction will
2027 * succeed preserving the atomic semantics of the LL/SC
2028 * block. Without that, there is no safe way to emulate
2029 * an LL/SC block in MIPSR2 userland.
2030 */
2031 pr_err("Can't emulate MIPSR2 LL/SC without Config5/LLB\n");
2032 err = SIGKILL;
2033 break;
2034 }
2035
2036 res = regs->regs[MIPSInst_RT(inst)];
2037
2038 __asm__ __volatile__(
2039 "1:\n"
2040 "sc %0, 0(%2)\n"
2041 "2:\n"
2042 ".insn\n"
2043 ".section .fixup,\"ax\"\n"
2044 "3:\n"
2045 "li %1, %3\n"
2046 "j 2b\n"
2047 ".previous\n"
2048 ".section __ex_table,\"a\"\n"
2049 ".word 1b, 3b\n"
2050 ".previous\n"
2051 : "+&r"(res), "+&r"(err)
2052 : "r"(vaddr), "i"(SIGSEGV));
2053
2054 if (MIPSInst_RT(inst) && !err)
2055 regs->regs[MIPSInst_RT(inst)] = res;
2056
2057 MIPS_R2_STATS(llsc);
2058
2059 break;
2060
2061 case lld_op:
2062 if (config_enabled(CONFIG_32BIT)) {
2063 err = SIGILL;
2064 break;
2065 }
2066
2067 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
2068 if (vaddr & 0x7) {
2069 current->thread.cp0_baduaddr = vaddr;
2070 err = SIGBUS;
2071 break;
2072 }
2073 if (!access_ok(VERIFY_READ, vaddr, 8)) {
2074 current->thread.cp0_baduaddr = vaddr;
2075 err = SIGBUS;
2076 break;
2077 }
2078
2079 if (!cpu_has_rw_llb) {
2080 /*
2081 * An LL/SC block can't be safely emulated without
2082 * a Config5/LLB availability. So it's probably time to
2083 * kill our process before things get any worse. This is
2084 * because Config5/LLB allows us to use ERETNC so that
2085 * the LLAddr/LLB bit is not cleared when we return from
2086 * an exception. MIPS R2 LL/SC instructions trap with an
2087 * RI exception so once we emulate them here, we return
2088 * back to userland with ERETNC. That preserves the
2089 * LLAddr/LLB so the subsequent SC instruction will
2090 * succeed preserving the atomic semantics of the LL/SC
2091 * block. Without that, there is no safe way to emulate
2092 * an LL/SC block in MIPSR2 userland.
2093 */
2094 pr_err("Can't emulate MIPSR2 LL/SC without Config5/LLB\n");
2095 err = SIGKILL;
2096 break;
2097 }
2098
2099 __asm__ __volatile__(
2100 "1:\n"
2101 "lld %0, 0(%2)\n"
2102 "2:\n"
2103 ".insn\n"
2104 ".section .fixup,\"ax\"\n"
2105 "3:\n"
2106 "li %1, %3\n"
2107 "j 2b\n"
2108 ".previous\n"
2109 ".section __ex_table,\"a\"\n"
2110 ".word 1b, 3b\n"
2111 ".previous\n"
2112 : "=&r"(res), "+&r"(err)
2113 : "r"(vaddr), "i"(SIGSEGV)
2114 : "memory");
2115 if (MIPSInst_RT(inst) && !err)
2116 regs->regs[MIPSInst_RT(inst)] = res;
2117
2118 MIPS_R2_STATS(llsc);
2119
2120 break;
2121
2122 case scd_op:
2123 if (config_enabled(CONFIG_32BIT)) {
2124 err = SIGILL;
2125 break;
2126 }
2127
2128 vaddr = regs->regs[MIPSInst_RS(inst)] + MIPSInst_SIMM(inst);
2129 if (vaddr & 0x7) {
2130 current->thread.cp0_baduaddr = vaddr;
2131 err = SIGBUS;
2132 break;
2133 }
2134 if (!access_ok(VERIFY_WRITE, vaddr, 8)) {
2135 current->thread.cp0_baduaddr = vaddr;
2136 err = SIGBUS;
2137 break;
2138 }
2139
2140 if (!cpu_has_rw_llb) {
2141 /*
2142 * An LL/SC block can't be safely emulated without
2143 * a Config5/LLB availability. So it's probably time to
2144 * kill our process before things get any worse. This is
2145 * because Config5/LLB allows us to use ERETNC so that
2146 * the LLAddr/LLB bit is not cleared when we return from
2147 * an exception. MIPS R2 LL/SC instructions trap with an
2148 * RI exception so once we emulate them here, we return
2149 * back to userland with ERETNC. That preserves the
2150 * LLAddr/LLB so the subsequent SC instruction will
2151 * succeed preserving the atomic semantics of the LL/SC
2152 * block. Without that, there is no safe way to emulate
2153 * an LL/SC block in MIPSR2 userland.
2154 */
2155 pr_err("Can't emulate MIPSR2 LL/SC without Config5/LLB\n");
2156 err = SIGKILL;
2157 break;
2158 }
2159
2160 res = regs->regs[MIPSInst_RT(inst)];
2161
2162 __asm__ __volatile__(
2163 "1:\n"
2164 "scd %0, 0(%2)\n"
2165 "2:\n"
2166 ".insn\n"
2167 ".section .fixup,\"ax\"\n"
2168 "3:\n"
2169 "li %1, %3\n"
2170 "j 2b\n"
2171 ".previous\n"
2172 ".section __ex_table,\"a\"\n"
2173 ".word 1b, 3b\n"
2174 ".previous\n"
2175 : "+&r"(res), "+&r"(err)
2176 : "r"(vaddr), "i"(SIGSEGV));
2177
2178 if (MIPSInst_RT(inst) && !err)
2179 regs->regs[MIPSInst_RT(inst)] = res;
2180
2181 MIPS_R2_STATS(llsc);
2182
2183 break;
2184 case pref_op:
2185 /* skip it */
2186 break;
2187 default:
2188 err = SIGILL;
2189 }
2190
2191 /*
2192 * Lets not return to userland just yet. It's constly and
2193 * it's likely we have more R2 instructions to emulate
2194 */
2195 if (!err && (pass++ < MIPS_R2_EMUL_TOTAL_PASS)) {
2196 regs->cp0_cause &= ~CAUSEF_BD;
2197 err = get_user(inst, (u32 __user *)regs->cp0_epc);
2198 if (!err)
2199 goto repeat;
2200
2201 if (err < 0)
2202 err = SIGSEGV;
2203 }
2204
2205 if (err && (err != SIGEMT)) {
2206 regs->regs[31] = r31;
2207 regs->cp0_epc = epc;
2208 }
2209
2210 /* Likely a MIPS R6 compatible instruction */
2211 if (pass && (err == SIGILL))
2212 err = 0;
2213
2214 return err;
2215}
2216
2217#ifdef CONFIG_DEBUG_FS
2218
2219static int mipsr2_stats_show(struct seq_file *s, void *unused)
2220{
2221
2222 seq_printf(s, "Instruction\tTotal\tBDslot\n------------------------------\n");
2223 seq_printf(s, "movs\t\t%ld\t%ld\n",
2224 (unsigned long)__this_cpu_read(mipsr2emustats.movs),
2225 (unsigned long)__this_cpu_read(mipsr2bdemustats.movs));
2226 seq_printf(s, "hilo\t\t%ld\t%ld\n",
2227 (unsigned long)__this_cpu_read(mipsr2emustats.hilo),
2228 (unsigned long)__this_cpu_read(mipsr2bdemustats.hilo));
2229 seq_printf(s, "muls\t\t%ld\t%ld\n",
2230 (unsigned long)__this_cpu_read(mipsr2emustats.muls),
2231 (unsigned long)__this_cpu_read(mipsr2bdemustats.muls));
2232 seq_printf(s, "divs\t\t%ld\t%ld\n",
2233 (unsigned long)__this_cpu_read(mipsr2emustats.divs),
2234 (unsigned long)__this_cpu_read(mipsr2bdemustats.divs));
2235 seq_printf(s, "dsps\t\t%ld\t%ld\n",
2236 (unsigned long)__this_cpu_read(mipsr2emustats.dsps),
2237 (unsigned long)__this_cpu_read(mipsr2bdemustats.dsps));
2238 seq_printf(s, "bops\t\t%ld\t%ld\n",
2239 (unsigned long)__this_cpu_read(mipsr2emustats.bops),
2240 (unsigned long)__this_cpu_read(mipsr2bdemustats.bops));
2241 seq_printf(s, "traps\t\t%ld\t%ld\n",
2242 (unsigned long)__this_cpu_read(mipsr2emustats.traps),
2243 (unsigned long)__this_cpu_read(mipsr2bdemustats.traps));
2244 seq_printf(s, "fpus\t\t%ld\t%ld\n",
2245 (unsigned long)__this_cpu_read(mipsr2emustats.fpus),
2246 (unsigned long)__this_cpu_read(mipsr2bdemustats.fpus));
2247 seq_printf(s, "loads\t\t%ld\t%ld\n",
2248 (unsigned long)__this_cpu_read(mipsr2emustats.loads),
2249 (unsigned long)__this_cpu_read(mipsr2bdemustats.loads));
2250 seq_printf(s, "stores\t\t%ld\t%ld\n",
2251 (unsigned long)__this_cpu_read(mipsr2emustats.stores),
2252 (unsigned long)__this_cpu_read(mipsr2bdemustats.stores));
2253 seq_printf(s, "llsc\t\t%ld\t%ld\n",
2254 (unsigned long)__this_cpu_read(mipsr2emustats.llsc),
2255 (unsigned long)__this_cpu_read(mipsr2bdemustats.llsc));
2256 seq_printf(s, "dsemul\t\t%ld\t%ld\n",
2257 (unsigned long)__this_cpu_read(mipsr2emustats.dsemul),
2258 (unsigned long)__this_cpu_read(mipsr2bdemustats.dsemul));
2259 seq_printf(s, "jr\t\t%ld\n",
2260 (unsigned long)__this_cpu_read(mipsr2bremustats.jrs));
2261 seq_printf(s, "bltzl\t\t%ld\n",
2262 (unsigned long)__this_cpu_read(mipsr2bremustats.bltzl));
2263 seq_printf(s, "bgezl\t\t%ld\n",
2264 (unsigned long)__this_cpu_read(mipsr2bremustats.bgezl));
2265 seq_printf(s, "bltzll\t\t%ld\n",
2266 (unsigned long)__this_cpu_read(mipsr2bremustats.bltzll));
2267 seq_printf(s, "bgezll\t\t%ld\n",
2268 (unsigned long)__this_cpu_read(mipsr2bremustats.bgezll));
2269 seq_printf(s, "bltzal\t\t%ld\n",
2270 (unsigned long)__this_cpu_read(mipsr2bremustats.bltzal));
2271 seq_printf(s, "bgezal\t\t%ld\n",
2272 (unsigned long)__this_cpu_read(mipsr2bremustats.bgezal));
2273 seq_printf(s, "beql\t\t%ld\n",
2274 (unsigned long)__this_cpu_read(mipsr2bremustats.beql));
2275 seq_printf(s, "bnel\t\t%ld\n",
2276 (unsigned long)__this_cpu_read(mipsr2bremustats.bnel));
2277 seq_printf(s, "blezl\t\t%ld\n",
2278 (unsigned long)__this_cpu_read(mipsr2bremustats.blezl));
2279 seq_printf(s, "bgtzl\t\t%ld\n",
2280 (unsigned long)__this_cpu_read(mipsr2bremustats.bgtzl));
2281
2282 return 0;
2283}
2284
2285static int mipsr2_stats_clear_show(struct seq_file *s, void *unused)
2286{
2287 mipsr2_stats_show(s, unused);
2288
2289 __this_cpu_write((mipsr2emustats).movs, 0);
2290 __this_cpu_write((mipsr2bdemustats).movs, 0);
2291 __this_cpu_write((mipsr2emustats).hilo, 0);
2292 __this_cpu_write((mipsr2bdemustats).hilo, 0);
2293 __this_cpu_write((mipsr2emustats).muls, 0);
2294 __this_cpu_write((mipsr2bdemustats).muls, 0);
2295 __this_cpu_write((mipsr2emustats).divs, 0);
2296 __this_cpu_write((mipsr2bdemustats).divs, 0);
2297 __this_cpu_write((mipsr2emustats).dsps, 0);
2298 __this_cpu_write((mipsr2bdemustats).dsps, 0);
2299 __this_cpu_write((mipsr2emustats).bops, 0);
2300 __this_cpu_write((mipsr2bdemustats).bops, 0);
2301 __this_cpu_write((mipsr2emustats).traps, 0);
2302 __this_cpu_write((mipsr2bdemustats).traps, 0);
2303 __this_cpu_write((mipsr2emustats).fpus, 0);
2304 __this_cpu_write((mipsr2bdemustats).fpus, 0);
2305 __this_cpu_write((mipsr2emustats).loads, 0);
2306 __this_cpu_write((mipsr2bdemustats).loads, 0);
2307 __this_cpu_write((mipsr2emustats).stores, 0);
2308 __this_cpu_write((mipsr2bdemustats).stores, 0);
2309 __this_cpu_write((mipsr2emustats).llsc, 0);
2310 __this_cpu_write((mipsr2bdemustats).llsc, 0);
2311 __this_cpu_write((mipsr2emustats).dsemul, 0);
2312 __this_cpu_write((mipsr2bdemustats).dsemul, 0);
2313 __this_cpu_write((mipsr2bremustats).jrs, 0);
2314 __this_cpu_write((mipsr2bremustats).bltzl, 0);
2315 __this_cpu_write((mipsr2bremustats).bgezl, 0);
2316 __this_cpu_write((mipsr2bremustats).bltzll, 0);
2317 __this_cpu_write((mipsr2bremustats).bgezll, 0);
2318 __this_cpu_write((mipsr2bremustats).bltzal, 0);
2319 __this_cpu_write((mipsr2bremustats).bgezal, 0);
2320 __this_cpu_write((mipsr2bremustats).beql, 0);
2321 __this_cpu_write((mipsr2bremustats).bnel, 0);
2322 __this_cpu_write((mipsr2bremustats).blezl, 0);
2323 __this_cpu_write((mipsr2bremustats).bgtzl, 0);
2324
2325 return 0;
2326}
2327
2328static int mipsr2_stats_open(struct inode *inode, struct file *file)
2329{
2330 return single_open(file, mipsr2_stats_show, inode->i_private);
2331}
2332
2333static int mipsr2_stats_clear_open(struct inode *inode, struct file *file)
2334{
2335 return single_open(file, mipsr2_stats_clear_show, inode->i_private);
2336}
2337
2338static const struct file_operations mipsr2_emul_fops = {
2339 .open = mipsr2_stats_open,
2340 .read = seq_read,
2341 .llseek = seq_lseek,
2342 .release = single_release,
2343};
2344
2345static const struct file_operations mipsr2_clear_fops = {
2346 .open = mipsr2_stats_clear_open,
2347 .read = seq_read,
2348 .llseek = seq_lseek,
2349 .release = single_release,
2350};
2351
2352
2353static int __init mipsr2_init_debugfs(void)
2354{
2355 extern struct dentry *mips_debugfs_dir;
2356 struct dentry *mipsr2_emul;
2357
2358 if (!mips_debugfs_dir)
2359 return -ENODEV;
2360
2361 mipsr2_emul = debugfs_create_file("r2_emul_stats", S_IRUGO,
2362 mips_debugfs_dir, NULL,
2363 &mipsr2_emul_fops);
2364 if (!mipsr2_emul)
2365 return -ENOMEM;
2366
2367 mipsr2_emul = debugfs_create_file("r2_emul_stats_clear", S_IRUGO,
2368 mips_debugfs_dir, NULL,
2369 &mipsr2_clear_fops);
2370 if (!mipsr2_emul)
2371 return -ENOMEM;
2372
2373 return 0;
2374}
2375
2376device_initcall(mipsr2_init_debugfs);
2377
2378#endif /* CONFIG_DEBUG_FS */
diff --git a/arch/mips/kernel/mips_ksyms.c b/arch/mips/kernel/mips_ksyms.c
index 17eaf0cf760c..291af0b5c482 100644
--- a/arch/mips/kernel/mips_ksyms.c
+++ b/arch/mips/kernel/mips_ksyms.c
@@ -14,6 +14,8 @@
14#include <linux/mm.h> 14#include <linux/mm.h>
15#include <asm/uaccess.h> 15#include <asm/uaccess.h>
16#include <asm/ftrace.h> 16#include <asm/ftrace.h>
17#include <asm/fpu.h>
18#include <asm/msa.h>
17 19
18extern void *__bzero(void *__s, size_t __count); 20extern void *__bzero(void *__s, size_t __count);
19extern long __strncpy_from_kernel_nocheck_asm(char *__to, 21extern long __strncpy_from_kernel_nocheck_asm(char *__to,
@@ -32,6 +34,14 @@ extern long __strnlen_user_nocheck_asm(const char *s);
32extern long __strnlen_user_asm(const char *s); 34extern long __strnlen_user_asm(const char *s);
33 35
34/* 36/*
37 * Core architecture code
38 */
39EXPORT_SYMBOL_GPL(_save_fp);
40#ifdef CONFIG_CPU_HAS_MSA
41EXPORT_SYMBOL_GPL(_save_msa);
42#endif
43
44/*
35 * String functions 45 * String functions
36 */ 46 */
37EXPORT_SYMBOL(memset); 47EXPORT_SYMBOL(memset);
@@ -67,11 +77,13 @@ EXPORT_SYMBOL(__strnlen_kernel_asm);
67EXPORT_SYMBOL(__strnlen_user_nocheck_asm); 77EXPORT_SYMBOL(__strnlen_user_nocheck_asm);
68EXPORT_SYMBOL(__strnlen_user_asm); 78EXPORT_SYMBOL(__strnlen_user_asm);
69 79
80#ifndef CONFIG_CPU_MIPSR6
70EXPORT_SYMBOL(csum_partial); 81EXPORT_SYMBOL(csum_partial);
71EXPORT_SYMBOL(csum_partial_copy_nocheck); 82EXPORT_SYMBOL(csum_partial_copy_nocheck);
72EXPORT_SYMBOL(__csum_partial_copy_kernel); 83EXPORT_SYMBOL(__csum_partial_copy_kernel);
73EXPORT_SYMBOL(__csum_partial_copy_to_user); 84EXPORT_SYMBOL(__csum_partial_copy_to_user);
74EXPORT_SYMBOL(__csum_partial_copy_from_user); 85EXPORT_SYMBOL(__csum_partial_copy_from_user);
86#endif
75 87
76EXPORT_SYMBOL(invalid_pte_table); 88EXPORT_SYMBOL(invalid_pte_table);
77#ifdef CONFIG_FUNCTION_TRACER 89#ifdef CONFIG_FUNCTION_TRACER
diff --git a/arch/mips/kernel/octeon_switch.S b/arch/mips/kernel/octeon_switch.S
index f6547680c81c..423ae83af1fb 100644
--- a/arch/mips/kernel/octeon_switch.S
+++ b/arch/mips/kernel/octeon_switch.S
@@ -31,15 +31,11 @@
31 /* 31 /*
32 * check if we need to save FPU registers 32 * check if we need to save FPU registers
33 */ 33 */
34 PTR_L t3, TASK_THREAD_INFO(a0) 34 .set push
35 LONG_L t0, TI_FLAGS(t3) 35 .set noreorder
36 li t1, _TIF_USEDFPU 36 beqz a3, 1f
37 and t2, t0, t1 37 PTR_L t3, TASK_THREAD_INFO(a0)
38 beqz t2, 1f 38 .set pop
39 nor t1, zero, t1
40
41 and t0, t0, t1
42 LONG_S t0, TI_FLAGS(t3)
43 39
44 /* 40 /*
45 * clear saved user stack CU1 bit 41 * clear saved user stack CU1 bit
@@ -56,36 +52,9 @@
56 .set pop 52 .set pop
571: 531:
58 54
59 /* check if we need to save COP2 registers */
60 PTR_L t2, TASK_THREAD_INFO(a0)
61 LONG_L t0, ST_OFF(t2)
62 bbit0 t0, 30, 1f
63
64 /* Disable COP2 in the stored process state */
65 li t1, ST0_CU2
66 xor t0, t1
67 LONG_S t0, ST_OFF(t2)
68
69 /* Enable COP2 so we can save it */
70 mfc0 t0, CP0_STATUS
71 or t0, t1
72 mtc0 t0, CP0_STATUS
73
74 /* Save COP2 */
75 daddu a0, THREAD_CP2
76 jal octeon_cop2_save
77 dsubu a0, THREAD_CP2
78
79 /* Disable COP2 now that we are done */
80 mfc0 t0, CP0_STATUS
81 li t1, ST0_CU2
82 xor t0, t1
83 mtc0 t0, CP0_STATUS
84
851:
86#if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0 55#if CONFIG_CAVIUM_OCTEON_CVMSEG_SIZE > 0
87 /* Check if we need to store CVMSEG state */ 56 /* Check if we need to store CVMSEG state */
88 mfc0 t0, $11,7 /* CvmMemCtl */ 57 dmfc0 t0, $11,7 /* CvmMemCtl */
89 bbit0 t0, 6, 3f /* Is user access enabled? */ 58 bbit0 t0, 6, 3f /* Is user access enabled? */
90 59
91 /* Store the CVMSEG state */ 60 /* Store the CVMSEG state */
@@ -109,9 +78,9 @@
109 .set reorder 78 .set reorder
110 79
111 /* Disable access to CVMSEG */ 80 /* Disable access to CVMSEG */
112 mfc0 t0, $11,7 /* CvmMemCtl */ 81 dmfc0 t0, $11,7 /* CvmMemCtl */
113 xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */ 82 xori t0, t0, 0x40 /* Bit 6 is CVMSEG user enable */
114 mtc0 t0, $11,7 /* CvmMemCtl */ 83 dmtc0 t0, $11,7 /* CvmMemCtl */
115#endif 84#endif
1163: 853:
117 86
@@ -147,6 +116,8 @@
147 * void octeon_cop2_save(struct octeon_cop2_state *a0) 116 * void octeon_cop2_save(struct octeon_cop2_state *a0)
148 */ 117 */
149 .align 7 118 .align 7
119 .set push
120 .set noreorder
150 LEAF(octeon_cop2_save) 121 LEAF(octeon_cop2_save)
151 122
152 dmfc0 t9, $9,7 /* CvmCtl register. */ 123 dmfc0 t9, $9,7 /* CvmCtl register. */
@@ -157,17 +128,17 @@
157 dmfc2 t2, 0x0200 128 dmfc2 t2, 0x0200
158 sd t0, OCTEON_CP2_CRC_IV(a0) 129 sd t0, OCTEON_CP2_CRC_IV(a0)
159 sd t1, OCTEON_CP2_CRC_LENGTH(a0) 130 sd t1, OCTEON_CP2_CRC_LENGTH(a0)
160 sd t2, OCTEON_CP2_CRC_POLY(a0)
161 /* Skip next instructions if CvmCtl[NODFA_CP2] set */ 131 /* Skip next instructions if CvmCtl[NODFA_CP2] set */
162 bbit1 t9, 28, 1f 132 bbit1 t9, 28, 1f
133 sd t2, OCTEON_CP2_CRC_POLY(a0)
163 134
164 /* Save the LLM state */ 135 /* Save the LLM state */
165 dmfc2 t0, 0x0402 136 dmfc2 t0, 0x0402
166 dmfc2 t1, 0x040A 137 dmfc2 t1, 0x040A
167 sd t0, OCTEON_CP2_LLM_DAT(a0) 138 sd t0, OCTEON_CP2_LLM_DAT(a0)
168 sd t1, OCTEON_CP2_LLM_DAT+8(a0)
169 139
1701: bbit1 t9, 26, 3f /* done if CvmCtl[NOCRYPTO] set */ 1401: bbit1 t9, 26, 3f /* done if CvmCtl[NOCRYPTO] set */
141 sd t1, OCTEON_CP2_LLM_DAT+8(a0)
171 142
172 /* Save the COP2 crypto state */ 143 /* Save the COP2 crypto state */
173 /* this part is mostly common to both pass 1 and later revisions */ 144 /* this part is mostly common to both pass 1 and later revisions */
@@ -198,18 +169,20 @@
198 sd t2, OCTEON_CP2_AES_KEY+16(a0) 169 sd t2, OCTEON_CP2_AES_KEY+16(a0)
199 dmfc2 t2, 0x0101 170 dmfc2 t2, 0x0101
200 sd t3, OCTEON_CP2_AES_KEY+24(a0) 171 sd t3, OCTEON_CP2_AES_KEY+24(a0)
201 mfc0 t3, $15,0 /* Get the processor ID register */ 172 mfc0 v0, $15,0 /* Get the processor ID register */
202 sd t0, OCTEON_CP2_AES_KEYLEN(a0) 173 sd t0, OCTEON_CP2_AES_KEYLEN(a0)
203 li t0, 0x000d0000 /* This is the processor ID of Octeon Pass1 */ 174 li v1, 0x000d0000 /* This is the processor ID of Octeon Pass1 */
204 sd t1, OCTEON_CP2_AES_RESULT(a0) 175 sd t1, OCTEON_CP2_AES_RESULT(a0)
205 sd t2, OCTEON_CP2_AES_RESULT+8(a0)
206 /* Skip to the Pass1 version of the remainder of the COP2 state */ 176 /* Skip to the Pass1 version of the remainder of the COP2 state */
207 beq t3, t0, 2f 177 beq v0, v1, 2f
178 sd t2, OCTEON_CP2_AES_RESULT+8(a0)
208 179
209 /* the non-pass1 state when !CvmCtl[NOCRYPTO] */ 180 /* the non-pass1 state when !CvmCtl[NOCRYPTO] */
210 dmfc2 t1, 0x0240 181 dmfc2 t1, 0x0240
211 dmfc2 t2, 0x0241 182 dmfc2 t2, 0x0241
183 ori v1, v1, 0x9500 /* lowest OCTEON III PrId*/
212 dmfc2 t3, 0x0242 184 dmfc2 t3, 0x0242
185 subu v1, v0, v1 /* prid - lowest OCTEON III PrId */
213 dmfc2 t0, 0x0243 186 dmfc2 t0, 0x0243
214 sd t1, OCTEON_CP2_HSH_DATW(a0) 187 sd t1, OCTEON_CP2_HSH_DATW(a0)
215 dmfc2 t1, 0x0244 188 dmfc2 t1, 0x0244
@@ -262,8 +235,16 @@
262 sd t1, OCTEON_CP2_GFM_MULT+8(a0) 235 sd t1, OCTEON_CP2_GFM_MULT+8(a0)
263 sd t2, OCTEON_CP2_GFM_POLY(a0) 236 sd t2, OCTEON_CP2_GFM_POLY(a0)
264 sd t3, OCTEON_CP2_GFM_RESULT(a0) 237 sd t3, OCTEON_CP2_GFM_RESULT(a0)
265 sd t0, OCTEON_CP2_GFM_RESULT+8(a0) 238 bltz v1, 4f
239 sd t0, OCTEON_CP2_GFM_RESULT+8(a0)
240 /* OCTEON III things*/
241 dmfc2 t0, 0x024F
242 dmfc2 t1, 0x0050
243 sd t0, OCTEON_CP2_SHA3(a0)
244 sd t1, OCTEON_CP2_SHA3+8(a0)
2454:
266 jr ra 246 jr ra
247 nop
267 248
2682: /* pass 1 special stuff when !CvmCtl[NOCRYPTO] */ 2492: /* pass 1 special stuff when !CvmCtl[NOCRYPTO] */
269 dmfc2 t3, 0x0040 250 dmfc2 t3, 0x0040
@@ -289,7 +270,9 @@
289 270
2903: /* pass 1 or CvmCtl[NOCRYPTO] set */ 2713: /* pass 1 or CvmCtl[NOCRYPTO] set */
291 jr ra 272 jr ra
273 nop
292 END(octeon_cop2_save) 274 END(octeon_cop2_save)
275 .set pop
293 276
294/* 277/*
295 * void octeon_cop2_restore(struct octeon_cop2_state *a0) 278 * void octeon_cop2_restore(struct octeon_cop2_state *a0)
@@ -354,9 +337,9 @@
354 ld t2, OCTEON_CP2_AES_RESULT+8(a0) 337 ld t2, OCTEON_CP2_AES_RESULT+8(a0)
355 mfc0 t3, $15,0 /* Get the processor ID register */ 338 mfc0 t3, $15,0 /* Get the processor ID register */
356 dmtc2 t0, 0x0110 339 dmtc2 t0, 0x0110
357 li t0, 0x000d0000 /* This is the processor ID of Octeon Pass1 */ 340 li v0, 0x000d0000 /* This is the processor ID of Octeon Pass1 */
358 dmtc2 t1, 0x0100 341 dmtc2 t1, 0x0100
359 bne t0, t3, 3f /* Skip the next stuff for non-pass1 */ 342 bne v0, t3, 3f /* Skip the next stuff for non-pass1 */
360 dmtc2 t2, 0x0101 343 dmtc2 t2, 0x0101
361 344
362 /* this code is specific for pass 1 */ 345 /* this code is specific for pass 1 */
@@ -384,6 +367,7 @@
384 367
3853: /* this is post-pass1 code */ 3683: /* this is post-pass1 code */
386 ld t2, OCTEON_CP2_HSH_DATW(a0) 369 ld t2, OCTEON_CP2_HSH_DATW(a0)
370 ori v0, v0, 0x9500 /* lowest OCTEON III PrId*/
387 ld t0, OCTEON_CP2_HSH_DATW+8(a0) 371 ld t0, OCTEON_CP2_HSH_DATW+8(a0)
388 ld t1, OCTEON_CP2_HSH_DATW+16(a0) 372 ld t1, OCTEON_CP2_HSH_DATW+16(a0)
389 dmtc2 t2, 0x0240 373 dmtc2 t2, 0x0240
@@ -437,9 +421,15 @@
437 dmtc2 t2, 0x0259 421 dmtc2 t2, 0x0259
438 ld t2, OCTEON_CP2_GFM_RESULT+8(a0) 422 ld t2, OCTEON_CP2_GFM_RESULT+8(a0)
439 dmtc2 t0, 0x025E 423 dmtc2 t0, 0x025E
424 subu v0, t3, v0 /* prid - lowest OCTEON III PrId */
440 dmtc2 t1, 0x025A 425 dmtc2 t1, 0x025A
441 dmtc2 t2, 0x025B 426 bltz v0, done_restore
442 427 dmtc2 t2, 0x025B
428 /* OCTEON III things*/
429 ld t0, OCTEON_CP2_SHA3(a0)
430 ld t1, OCTEON_CP2_SHA3+8(a0)
431 dmtc2 t0, 0x0051
432 dmtc2 t1, 0x0050
443done_restore: 433done_restore:
444 jr ra 434 jr ra
445 nop 435 nop
@@ -450,18 +440,23 @@ done_restore:
450 * void octeon_mult_save() 440 * void octeon_mult_save()
451 * sp is assumed to point to a struct pt_regs 441 * sp is assumed to point to a struct pt_regs
452 * 442 *
453 * NOTE: This is called in SAVE_SOME in stackframe.h. It can only 443 * NOTE: This is called in SAVE_TEMP in stackframe.h. It can
454 * safely modify k0 and k1. 444 * safely modify v1,k0, k1,$10-$15, and $24. It will
445 * be overwritten with a processor specific version of the code.
455 */ 446 */
456 .align 7 447 .p2align 7
457 .set push 448 .set push
458 .set noreorder 449 .set noreorder
459 LEAF(octeon_mult_save) 450 LEAF(octeon_mult_save)
460 dmfc0 k0, $9,7 /* CvmCtl register. */ 451 jr ra
461 bbit1 k0, 27, 1f /* Skip CvmCtl[NOMUL] */
462 nop 452 nop
453 .space 30 * 4, 0
454octeon_mult_save_end:
455 EXPORT(octeon_mult_save_end)
456 END(octeon_mult_save)
463 457
464 /* Save the multiplier state */ 458 LEAF(octeon_mult_save2)
459 /* Save the multiplier state OCTEON II and earlier*/
465 v3mulu k0, $0, $0 460 v3mulu k0, $0, $0
466 v3mulu k1, $0, $0 461 v3mulu k1, $0, $0
467 sd k0, PT_MTP(sp) /* PT_MTP has P0 */ 462 sd k0, PT_MTP(sp) /* PT_MTP has P0 */
@@ -476,44 +471,107 @@ done_restore:
476 sd k0, PT_MPL+8(sp) /* PT_MPL+8 has MPL1 */ 471 sd k0, PT_MPL+8(sp) /* PT_MPL+8 has MPL1 */
477 jr ra 472 jr ra
478 sd k1, PT_MPL+16(sp) /* PT_MPL+16 has MPL2 */ 473 sd k1, PT_MPL+16(sp) /* PT_MPL+16 has MPL2 */
479 474octeon_mult_save2_end:
4801: /* Resume here if CvmCtl[NOMUL] */ 475 EXPORT(octeon_mult_save2_end)
476 END(octeon_mult_save2)
477
478 LEAF(octeon_mult_save3)
479 /* Save the multiplier state OCTEON III */
480 v3mulu $10, $0, $0 /* read P0 */
481 v3mulu $11, $0, $0 /* read P1 */
482 v3mulu $12, $0, $0 /* read P2 */
483 sd $10, PT_MTP+(0*8)(sp) /* store P0 */
484 v3mulu $10, $0, $0 /* read P3 */
485 sd $11, PT_MTP+(1*8)(sp) /* store P1 */
486 v3mulu $11, $0, $0 /* read P4 */
487 sd $12, PT_MTP+(2*8)(sp) /* store P2 */
488 ori $13, $0, 1
489 v3mulu $12, $0, $0 /* read P5 */
490 sd $10, PT_MTP+(3*8)(sp) /* store P3 */
491 v3mulu $13, $13, $0 /* P4-P0 = MPL5-MPL1, $13 = MPL0 */
492 sd $11, PT_MTP+(4*8)(sp) /* store P4 */
493 v3mulu $10, $0, $0 /* read MPL1 */
494 sd $12, PT_MTP+(5*8)(sp) /* store P5 */
495 v3mulu $11, $0, $0 /* read MPL2 */
496 sd $13, PT_MPL+(0*8)(sp) /* store MPL0 */
497 v3mulu $12, $0, $0 /* read MPL3 */
498 sd $10, PT_MPL+(1*8)(sp) /* store MPL1 */
499 v3mulu $10, $0, $0 /* read MPL4 */
500 sd $11, PT_MPL+(2*8)(sp) /* store MPL2 */
501 v3mulu $11, $0, $0 /* read MPL5 */
502 sd $12, PT_MPL+(3*8)(sp) /* store MPL3 */
503 sd $10, PT_MPL+(4*8)(sp) /* store MPL4 */
481 jr ra 504 jr ra
482 END(octeon_mult_save) 505 sd $11, PT_MPL+(5*8)(sp) /* store MPL5 */
506octeon_mult_save3_end:
507 EXPORT(octeon_mult_save3_end)
508 END(octeon_mult_save3)
483 .set pop 509 .set pop
484 510
485/* 511/*
486 * void octeon_mult_restore() 512 * void octeon_mult_restore()
487 * sp is assumed to point to a struct pt_regs 513 * sp is assumed to point to a struct pt_regs
488 * 514 *
489 * NOTE: This is called in RESTORE_SOME in stackframe.h. 515 * NOTE: This is called in RESTORE_TEMP in stackframe.h.
490 */ 516 */
491 .align 7 517 .p2align 7
492 .set push 518 .set push
493 .set noreorder 519 .set noreorder
494 LEAF(octeon_mult_restore) 520 LEAF(octeon_mult_restore)
495 dmfc0 k1, $9,7 /* CvmCtl register. */ 521 jr ra
496 ld v0, PT_MPL(sp) /* MPL0 */ 522 nop
497 ld v1, PT_MPL+8(sp) /* MPL1 */ 523 .space 30 * 4, 0
498 ld k0, PT_MPL+16(sp) /* MPL2 */ 524octeon_mult_restore_end:
499 bbit1 k1, 27, 1f /* Skip CvmCtl[NOMUL] */ 525 EXPORT(octeon_mult_restore_end)
500 /* Normally falls through, so no time wasted here */ 526 END(octeon_mult_restore)
501 nop
502 527
528 LEAF(octeon_mult_restore2)
529 ld v0, PT_MPL(sp) /* MPL0 */
530 ld v1, PT_MPL+8(sp) /* MPL1 */
531 ld k0, PT_MPL+16(sp) /* MPL2 */
503 /* Restore the multiplier state */ 532 /* Restore the multiplier state */
504 ld k1, PT_MTP+16(sp) /* P2 */ 533 ld k1, PT_MTP+16(sp) /* P2 */
505 MTM0 v0 /* MPL0 */ 534 mtm0 v0 /* MPL0 */
506 ld v0, PT_MTP+8(sp) /* P1 */ 535 ld v0, PT_MTP+8(sp) /* P1 */
507 MTM1 v1 /* MPL1 */ 536 mtm1 v1 /* MPL1 */
508 ld v1, PT_MTP(sp) /* P0 */ 537 ld v1, PT_MTP(sp) /* P0 */
509 MTM2 k0 /* MPL2 */ 538 mtm2 k0 /* MPL2 */
510 MTP2 k1 /* P2 */ 539 mtp2 k1 /* P2 */
511 MTP1 v0 /* P1 */ 540 mtp1 v0 /* P1 */
512 jr ra 541 jr ra
513 MTP0 v1 /* P0 */ 542 mtp0 v1 /* P0 */
514 543octeon_mult_restore2_end:
5151: /* Resume here if CvmCtl[NOMUL] */ 544 EXPORT(octeon_mult_restore2_end)
545 END(octeon_mult_restore2)
546
547 LEAF(octeon_mult_restore3)
548 ld $12, PT_MPL+(0*8)(sp) /* read MPL0 */
549 ld $13, PT_MPL+(3*8)(sp) /* read MPL3 */
550 ld $10, PT_MPL+(1*8)(sp) /* read MPL1 */
551 ld $11, PT_MPL+(4*8)(sp) /* read MPL4 */
552 .word 0x718d0008
553 /* mtm0 $12, $13 restore MPL0 and MPL3 */
554 ld $12, PT_MPL+(2*8)(sp) /* read MPL2 */
555 .word 0x714b000c
556 /* mtm1 $10, $11 restore MPL1 and MPL4 */
557 ld $13, PT_MPL+(5*8)(sp) /* read MPL5 */
558 ld $10, PT_MTP+(0*8)(sp) /* read P0 */
559 ld $11, PT_MTP+(3*8)(sp) /* read P3 */
560 .word 0x718d000d
561 /* mtm2 $12, $13 restore MPL2 and MPL5 */
562 ld $12, PT_MTP+(1*8)(sp) /* read P1 */
563 .word 0x714b0009
564 /* mtp0 $10, $11 restore P0 and P3 */
565 ld $13, PT_MTP+(4*8)(sp) /* read P4 */
566 ld $10, PT_MTP+(2*8)(sp) /* read P2 */
567 ld $11, PT_MTP+(5*8)(sp) /* read P5 */
568 .word 0x718d000a
569 /* mtp1 $12, $13 restore P1 and P4 */
516 jr ra 570 jr ra
517 nop 571 .word 0x714b000b
518 END(octeon_mult_restore) 572 /* mtp2 $10, $11 restore P2 and P5 */
573
574octeon_mult_restore3_end:
575 EXPORT(octeon_mult_restore3_end)
576 END(octeon_mult_restore3)
519 .set pop 577 .set pop
diff --git a/arch/mips/kernel/proc.c b/arch/mips/kernel/proc.c
index 097fc8d14e42..130af7d26a9c 100644
--- a/arch/mips/kernel/proc.c
+++ b/arch/mips/kernel/proc.c
@@ -82,7 +82,9 @@ static int show_cpuinfo(struct seq_file *m, void *v)
82 seq_printf(m, "]\n"); 82 seq_printf(m, "]\n");
83 } 83 }
84 84
85 seq_printf(m, "isa\t\t\t: mips1"); 85 seq_printf(m, "isa\t\t\t:");
86 if (cpu_has_mips_r1)
87 seq_printf(m, " mips1");
86 if (cpu_has_mips_2) 88 if (cpu_has_mips_2)
87 seq_printf(m, "%s", " mips2"); 89 seq_printf(m, "%s", " mips2");
88 if (cpu_has_mips_3) 90 if (cpu_has_mips_3)
@@ -95,10 +97,14 @@ static int show_cpuinfo(struct seq_file *m, void *v)
95 seq_printf(m, "%s", " mips32r1"); 97 seq_printf(m, "%s", " mips32r1");
96 if (cpu_has_mips32r2) 98 if (cpu_has_mips32r2)
97 seq_printf(m, "%s", " mips32r2"); 99 seq_printf(m, "%s", " mips32r2");
100 if (cpu_has_mips32r6)
101 seq_printf(m, "%s", " mips32r6");
98 if (cpu_has_mips64r1) 102 if (cpu_has_mips64r1)
99 seq_printf(m, "%s", " mips64r1"); 103 seq_printf(m, "%s", " mips64r1");
100 if (cpu_has_mips64r2) 104 if (cpu_has_mips64r2)
101 seq_printf(m, "%s", " mips64r2"); 105 seq_printf(m, "%s", " mips64r2");
106 if (cpu_has_mips64r6)
107 seq_printf(m, "%s", " mips64r6");
102 seq_printf(m, "\n"); 108 seq_printf(m, "\n");
103 109
104 seq_printf(m, "ASEs implemented\t:"); 110 seq_printf(m, "ASEs implemented\t:");
diff --git a/arch/mips/kernel/process.c b/arch/mips/kernel/process.c
index 85bff5d513e5..bf85cc180d91 100644
--- a/arch/mips/kernel/process.c
+++ b/arch/mips/kernel/process.c
@@ -25,6 +25,7 @@
25#include <linux/completion.h> 25#include <linux/completion.h>
26#include <linux/kallsyms.h> 26#include <linux/kallsyms.h>
27#include <linux/random.h> 27#include <linux/random.h>
28#include <linux/prctl.h>
28 29
29#include <asm/asm.h> 30#include <asm/asm.h>
30#include <asm/bootinfo.h> 31#include <asm/bootinfo.h>
@@ -562,3 +563,98 @@ void arch_trigger_all_cpu_backtrace(bool include_self)
562{ 563{
563 smp_call_function(arch_dump_stack, NULL, 1); 564 smp_call_function(arch_dump_stack, NULL, 1);
564} 565}
566
567int mips_get_process_fp_mode(struct task_struct *task)
568{
569 int value = 0;
570
571 if (!test_tsk_thread_flag(task, TIF_32BIT_FPREGS))
572 value |= PR_FP_MODE_FR;
573 if (test_tsk_thread_flag(task, TIF_HYBRID_FPREGS))
574 value |= PR_FP_MODE_FRE;
575
576 return value;
577}
578
579int mips_set_process_fp_mode(struct task_struct *task, unsigned int value)
580{
581 const unsigned int known_bits = PR_FP_MODE_FR | PR_FP_MODE_FRE;
582 unsigned long switch_count;
583 struct task_struct *t;
584
585 /* Check the value is valid */
586 if (value & ~known_bits)
587 return -EOPNOTSUPP;
588
589 /* Avoid inadvertently triggering emulation */
590 if ((value & PR_FP_MODE_FR) && cpu_has_fpu &&
591 !(current_cpu_data.fpu_id & MIPS_FPIR_F64))
592 return -EOPNOTSUPP;
593 if ((value & PR_FP_MODE_FRE) && cpu_has_fpu && !cpu_has_fre)
594 return -EOPNOTSUPP;
595
596 /* FR = 0 not supported in MIPS R6 */
597 if (!(value & PR_FP_MODE_FR) && cpu_has_fpu && cpu_has_mips_r6)
598 return -EOPNOTSUPP;
599
600 /* Save FP & vector context, then disable FPU & MSA */
601 if (task->signal == current->signal)
602 lose_fpu(1);
603
604 /* Prevent any threads from obtaining live FP context */
605 atomic_set(&task->mm->context.fp_mode_switching, 1);
606 smp_mb__after_atomic();
607
608 /*
609 * If there are multiple online CPUs then wait until all threads whose
610 * FP mode is about to change have been context switched. This approach
611 * allows us to only worry about whether an FP mode switch is in
612 * progress when FP is first used in a tasks time slice. Pretty much all
613 * of the mode switch overhead can thus be confined to cases where mode
614 * switches are actually occuring. That is, to here. However for the
615 * thread performing the mode switch it may take a while...
616 */
617 if (num_online_cpus() > 1) {
618 spin_lock_irq(&task->sighand->siglock);
619
620 for_each_thread(task, t) {
621 if (t == current)
622 continue;
623
624 switch_count = t->nvcsw + t->nivcsw;
625
626 do {
627 spin_unlock_irq(&task->sighand->siglock);
628 cond_resched();
629 spin_lock_irq(&task->sighand->siglock);
630 } while ((t->nvcsw + t->nivcsw) == switch_count);
631 }
632
633 spin_unlock_irq(&task->sighand->siglock);
634 }
635
636 /*
637 * There are now no threads of the process with live FP context, so it
638 * is safe to proceed with the FP mode switch.
639 */
640 for_each_thread(task, t) {
641 /* Update desired FP register width */
642 if (value & PR_FP_MODE_FR) {
643 clear_tsk_thread_flag(t, TIF_32BIT_FPREGS);
644 } else {
645 set_tsk_thread_flag(t, TIF_32BIT_FPREGS);
646 clear_tsk_thread_flag(t, TIF_MSA_CTX_LIVE);
647 }
648
649 /* Update desired FP single layout */
650 if (value & PR_FP_MODE_FRE)
651 set_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
652 else
653 clear_tsk_thread_flag(t, TIF_HYBRID_FPREGS);
654 }
655
656 /* Allow threads to use FP again */
657 atomic_set(&task->mm->context.fp_mode_switching, 0);
658
659 return 0;
660}
diff --git a/arch/mips/kernel/r4k_fpu.S b/arch/mips/kernel/r4k_fpu.S
index 6c160c67984c..676c5030a953 100644
--- a/arch/mips/kernel/r4k_fpu.S
+++ b/arch/mips/kernel/r4k_fpu.S
@@ -34,7 +34,7 @@
34 .endm 34 .endm
35 35
36 .set noreorder 36 .set noreorder
37 .set arch=r4000 37 .set MIPS_ISA_ARCH_LEVEL_RAW
38 38
39LEAF(_save_fp_context) 39LEAF(_save_fp_context)
40 .set push 40 .set push
@@ -42,7 +42,8 @@ LEAF(_save_fp_context)
42 cfc1 t1, fcr31 42 cfc1 t1, fcr31
43 .set pop 43 .set pop
44 44
45#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) 45#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \
46 defined(CONFIG_CPU_MIPS32_R6)
46 .set push 47 .set push
47 SET_HARDFLOAT 48 SET_HARDFLOAT
48#ifdef CONFIG_CPU_MIPS32_R2 49#ifdef CONFIG_CPU_MIPS32_R2
@@ -105,10 +106,12 @@ LEAF(_save_fp_context32)
105 SET_HARDFLOAT 106 SET_HARDFLOAT
106 cfc1 t1, fcr31 107 cfc1 t1, fcr31
107 108
109#ifndef CONFIG_CPU_MIPS64_R6
108 mfc0 t0, CP0_STATUS 110 mfc0 t0, CP0_STATUS
109 sll t0, t0, 5 111 sll t0, t0, 5
110 bgez t0, 1f # skip storing odd if FR=0 112 bgez t0, 1f # skip storing odd if FR=0
111 nop 113 nop
114#endif
112 115
113 /* Store the 16 odd double precision registers */ 116 /* Store the 16 odd double precision registers */
114 EX sdc1 $f1, SC32_FPREGS+8(a0) 117 EX sdc1 $f1, SC32_FPREGS+8(a0)
@@ -163,7 +166,8 @@ LEAF(_save_fp_context32)
163LEAF(_restore_fp_context) 166LEAF(_restore_fp_context)
164 EX lw t1, SC_FPC_CSR(a0) 167 EX lw t1, SC_FPC_CSR(a0)
165 168
166#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) 169#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \
170 defined(CONFIG_CPU_MIPS32_R6)
167 .set push 171 .set push
168 SET_HARDFLOAT 172 SET_HARDFLOAT
169#ifdef CONFIG_CPU_MIPS32_R2 173#ifdef CONFIG_CPU_MIPS32_R2
@@ -223,10 +227,12 @@ LEAF(_restore_fp_context32)
223 SET_HARDFLOAT 227 SET_HARDFLOAT
224 EX lw t1, SC32_FPC_CSR(a0) 228 EX lw t1, SC32_FPC_CSR(a0)
225 229
230#ifndef CONFIG_CPU_MIPS64_R6
226 mfc0 t0, CP0_STATUS 231 mfc0 t0, CP0_STATUS
227 sll t0, t0, 5 232 sll t0, t0, 5
228 bgez t0, 1f # skip loading odd if FR=0 233 bgez t0, 1f # skip loading odd if FR=0
229 nop 234 nop
235#endif
230 236
231 EX ldc1 $f1, SC32_FPREGS+8(a0) 237 EX ldc1 $f1, SC32_FPREGS+8(a0)
232 EX ldc1 $f3, SC32_FPREGS+24(a0) 238 EX ldc1 $f3, SC32_FPREGS+24(a0)
diff --git a/arch/mips/kernel/r4k_switch.S b/arch/mips/kernel/r4k_switch.S
index 64591e671878..3b1a36f13a7d 100644
--- a/arch/mips/kernel/r4k_switch.S
+++ b/arch/mips/kernel/r4k_switch.S
@@ -115,7 +115,8 @@
115 * Save a thread's fp context. 115 * Save a thread's fp context.
116 */ 116 */
117LEAF(_save_fp) 117LEAF(_save_fp)
118#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) 118#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \
119 defined(CONFIG_CPU_MIPS32_R6)
119 mfc0 t0, CP0_STATUS 120 mfc0 t0, CP0_STATUS
120#endif 121#endif
121 fpu_save_double a0 t0 t1 # clobbers t1 122 fpu_save_double a0 t0 t1 # clobbers t1
@@ -126,7 +127,8 @@ LEAF(_save_fp)
126 * Restore a thread's fp context. 127 * Restore a thread's fp context.
127 */ 128 */
128LEAF(_restore_fp) 129LEAF(_restore_fp)
129#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) 130#if defined(CONFIG_64BIT) || defined(CONFIG_CPU_MIPS32_R2) || \
131 defined(CONFIG_CPU_MIPS32_R6)
130 mfc0 t0, CP0_STATUS 132 mfc0 t0, CP0_STATUS
131#endif 133#endif
132 fpu_restore_double a0 t0 t1 # clobbers t1 134 fpu_restore_double a0 t0 t1 # clobbers t1
@@ -240,9 +242,9 @@ LEAF(_init_fpu)
240 mtc1 t1, $f30 242 mtc1 t1, $f30
241 mtc1 t1, $f31 243 mtc1 t1, $f31
242 244
243#ifdef CONFIG_CPU_MIPS32_R2 245#if defined(CONFIG_CPU_MIPS32_R2) || defined(CONFIG_CPU_MIPS32_R6)
244 .set push 246 .set push
245 .set mips32r2 247 .set MIPS_ISA_LEVEL_RAW
246 .set fp=64 248 .set fp=64
247 sll t0, t0, 5 # is Status.FR set? 249 sll t0, t0, 5 # is Status.FR set?
248 bgez t0, 1f # no: skip setting upper 32b 250 bgez t0, 1f # no: skip setting upper 32b
@@ -280,9 +282,9 @@ LEAF(_init_fpu)
280 mthc1 t1, $f30 282 mthc1 t1, $f30
281 mthc1 t1, $f31 283 mthc1 t1, $f31
2821: .set pop 2841: .set pop
283#endif /* CONFIG_CPU_MIPS32_R2 */ 285#endif /* CONFIG_CPU_MIPS32_R2 || CONFIG_CPU_MIPS32_R6 */
284#else 286#else
285 .set arch=r4000 287 .set MIPS_ISA_ARCH_LEVEL_RAW
286 dmtc1 t1, $f0 288 dmtc1 t1, $f0
287 dmtc1 t1, $f2 289 dmtc1 t1, $f2
288 dmtc1 t1, $f4 290 dmtc1 t1, $f4
diff --git a/arch/mips/kernel/spram.c b/arch/mips/kernel/spram.c
index 67f2495def1c..d1168d7c31e8 100644
--- a/arch/mips/kernel/spram.c
+++ b/arch/mips/kernel/spram.c
@@ -208,6 +208,7 @@ void spram_config(void)
208 case CPU_INTERAPTIV: 208 case CPU_INTERAPTIV:
209 case CPU_PROAPTIV: 209 case CPU_PROAPTIV:
210 case CPU_P5600: 210 case CPU_P5600:
211 case CPU_QEMU_GENERIC:
211 config0 = read_c0_config(); 212 config0 = read_c0_config();
212 /* FIXME: addresses are Malta specific */ 213 /* FIXME: addresses are Malta specific */
213 if (config0 & (1<<24)) { 214 if (config0 & (1<<24)) {
diff --git a/arch/mips/kernel/syscall.c b/arch/mips/kernel/syscall.c
index 604b558809c4..53a7ef9a8f32 100644
--- a/arch/mips/kernel/syscall.c
+++ b/arch/mips/kernel/syscall.c
@@ -136,7 +136,7 @@ static inline int mips_atomic_set(unsigned long addr, unsigned long new)
136 : "memory"); 136 : "memory");
137 } else if (cpu_has_llsc) { 137 } else if (cpu_has_llsc) {
138 __asm__ __volatile__ ( 138 __asm__ __volatile__ (
139 " .set arch=r4000 \n" 139 " .set "MIPS_ISA_ARCH_LEVEL" \n"
140 " li %[err], 0 \n" 140 " li %[err], 0 \n"
141 "1: ll %[old], (%[addr]) \n" 141 "1: ll %[old], (%[addr]) \n"
142 " move %[tmp], %[new] \n" 142 " move %[tmp], %[new] \n"
diff --git a/arch/mips/kernel/traps.c b/arch/mips/kernel/traps.c
index c3b41e24c05a..33984c04b60b 100644
--- a/arch/mips/kernel/traps.c
+++ b/arch/mips/kernel/traps.c
@@ -46,6 +46,7 @@
46#include <asm/fpu.h> 46#include <asm/fpu.h>
47#include <asm/fpu_emulator.h> 47#include <asm/fpu_emulator.h>
48#include <asm/idle.h> 48#include <asm/idle.h>
49#include <asm/mips-r2-to-r6-emul.h>
49#include <asm/mipsregs.h> 50#include <asm/mipsregs.h>
50#include <asm/mipsmtregs.h> 51#include <asm/mipsmtregs.h>
51#include <asm/module.h> 52#include <asm/module.h>
@@ -837,7 +838,7 @@ out:
837 exception_exit(prev_state); 838 exception_exit(prev_state);
838} 839}
839 840
840static void do_trap_or_bp(struct pt_regs *regs, unsigned int code, 841void do_trap_or_bp(struct pt_regs *regs, unsigned int code,
841 const char *str) 842 const char *str)
842{ 843{
843 siginfo_t info; 844 siginfo_t info;
@@ -1027,7 +1028,34 @@ asmlinkage void do_ri(struct pt_regs *regs)
1027 unsigned int opcode = 0; 1028 unsigned int opcode = 0;
1028 int status = -1; 1029 int status = -1;
1029 1030
1031 /*
1032 * Avoid any kernel code. Just emulate the R2 instruction
1033 * as quickly as possible.
1034 */
1035 if (mipsr2_emulation && cpu_has_mips_r6 &&
1036 likely(user_mode(regs))) {
1037 if (likely(get_user(opcode, epc) >= 0)) {
1038 status = mipsr2_decoder(regs, opcode);
1039 switch (status) {
1040 case 0:
1041 case SIGEMT:
1042 task_thread_info(current)->r2_emul_return = 1;
1043 return;
1044 case SIGILL:
1045 goto no_r2_instr;
1046 default:
1047 process_fpemu_return(status,
1048 &current->thread.cp0_baduaddr);
1049 task_thread_info(current)->r2_emul_return = 1;
1050 return;
1051 }
1052 }
1053 }
1054
1055no_r2_instr:
1056
1030 prev_state = exception_enter(); 1057 prev_state = exception_enter();
1058
1031 if (notify_die(DIE_RI, "RI Fault", regs, 0, regs_to_trapnr(regs), 1059 if (notify_die(DIE_RI, "RI Fault", regs, 0, regs_to_trapnr(regs),
1032 SIGILL) == NOTIFY_STOP) 1060 SIGILL) == NOTIFY_STOP)
1033 goto out; 1061 goto out;
@@ -1134,10 +1162,29 @@ static int default_cu2_call(struct notifier_block *nfb, unsigned long action,
1134 return NOTIFY_OK; 1162 return NOTIFY_OK;
1135} 1163}
1136 1164
1165static int wait_on_fp_mode_switch(atomic_t *p)
1166{
1167 /*
1168 * The FP mode for this task is currently being switched. That may
1169 * involve modifications to the format of this tasks FP context which
1170 * make it unsafe to proceed with execution for the moment. Instead,
1171 * schedule some other task.
1172 */
1173 schedule();
1174 return 0;
1175}
1176
1137static int enable_restore_fp_context(int msa) 1177static int enable_restore_fp_context(int msa)
1138{ 1178{
1139 int err, was_fpu_owner, prior_msa; 1179 int err, was_fpu_owner, prior_msa;
1140 1180
1181 /*
1182 * If an FP mode switch is currently underway, wait for it to
1183 * complete before proceeding.
1184 */
1185 wait_on_atomic_t(&current->mm->context.fp_mode_switching,
1186 wait_on_fp_mode_switch, TASK_KILLABLE);
1187
1141 if (!used_math()) { 1188 if (!used_math()) {
1142 /* First time FP context user. */ 1189 /* First time FP context user. */
1143 preempt_disable(); 1190 preempt_disable();
@@ -1541,6 +1588,7 @@ static inline void parity_protection_init(void)
1541 case CPU_INTERAPTIV: 1588 case CPU_INTERAPTIV:
1542 case CPU_PROAPTIV: 1589 case CPU_PROAPTIV:
1543 case CPU_P5600: 1590 case CPU_P5600:
1591 case CPU_QEMU_GENERIC:
1544 { 1592 {
1545#define ERRCTL_PE 0x80000000 1593#define ERRCTL_PE 0x80000000
1546#define ERRCTL_L2P 0x00800000 1594#define ERRCTL_L2P 0x00800000
@@ -1630,7 +1678,7 @@ asmlinkage void cache_parity_error(void)
1630 printk("Decoded c0_cacheerr: %s cache fault in %s reference.\n", 1678 printk("Decoded c0_cacheerr: %s cache fault in %s reference.\n",
1631 reg_val & (1<<30) ? "secondary" : "primary", 1679 reg_val & (1<<30) ? "secondary" : "primary",
1632 reg_val & (1<<31) ? "data" : "insn"); 1680 reg_val & (1<<31) ? "data" : "insn");
1633 if (cpu_has_mips_r2 && 1681 if ((cpu_has_mips_r2_r6) &&
1634 ((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS)) { 1682 ((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS)) {
1635 pr_err("Error bits: %s%s%s%s%s%s%s%s\n", 1683 pr_err("Error bits: %s%s%s%s%s%s%s%s\n",
1636 reg_val & (1<<29) ? "ED " : "", 1684 reg_val & (1<<29) ? "ED " : "",
@@ -1670,7 +1718,7 @@ asmlinkage void do_ftlb(void)
1670 unsigned int reg_val; 1718 unsigned int reg_val;
1671 1719
1672 /* For the moment, report the problem and hang. */ 1720 /* For the moment, report the problem and hang. */
1673 if (cpu_has_mips_r2 && 1721 if ((cpu_has_mips_r2_r6) &&
1674 ((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS)) { 1722 ((current_cpu_data.processor_id & 0xff0000) == PRID_COMP_MIPS)) {
1675 pr_err("FTLB error exception, cp0_ecc=0x%08x:\n", 1723 pr_err("FTLB error exception, cp0_ecc=0x%08x:\n",
1676 read_c0_ecc()); 1724 read_c0_ecc());
@@ -1959,7 +2007,7 @@ static void configure_hwrena(void)
1959{ 2007{
1960 unsigned int hwrena = cpu_hwrena_impl_bits; 2008 unsigned int hwrena = cpu_hwrena_impl_bits;
1961 2009
1962 if (cpu_has_mips_r2) 2010 if (cpu_has_mips_r2_r6)
1963 hwrena |= 0x0000000f; 2011 hwrena |= 0x0000000f;
1964 2012
1965 if (!noulri && cpu_has_userlocal) 2013 if (!noulri && cpu_has_userlocal)
@@ -2003,7 +2051,7 @@ void per_cpu_trap_init(bool is_boot_cpu)
2003 * o read IntCtl.IPTI to determine the timer interrupt 2051 * o read IntCtl.IPTI to determine the timer interrupt
2004 * o read IntCtl.IPPCI to determine the performance counter interrupt 2052 * o read IntCtl.IPPCI to determine the performance counter interrupt
2005 */ 2053 */
2006 if (cpu_has_mips_r2) { 2054 if (cpu_has_mips_r2_r6) {
2007 cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP; 2055 cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
2008 cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7; 2056 cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
2009 cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7; 2057 cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
@@ -2094,7 +2142,7 @@ void __init trap_init(void)
2094#else 2142#else
2095 ebase = CKSEG0; 2143 ebase = CKSEG0;
2096#endif 2144#endif
2097 if (cpu_has_mips_r2) 2145 if (cpu_has_mips_r2_r6)
2098 ebase += (read_c0_ebase() & 0x3ffff000); 2146 ebase += (read_c0_ebase() & 0x3ffff000);
2099 } 2147 }
2100 2148
diff --git a/arch/mips/kernel/unaligned.c b/arch/mips/kernel/unaligned.c
index e11906dff885..bbb69695a0a1 100644
--- a/arch/mips/kernel/unaligned.c
+++ b/arch/mips/kernel/unaligned.c
@@ -129,6 +129,7 @@ extern void show_registers(struct pt_regs *regs);
129 : "=&r" (value), "=r" (res) \ 129 : "=&r" (value), "=r" (res) \
130 : "r" (addr), "i" (-EFAULT)); 130 : "r" (addr), "i" (-EFAULT));
131 131
132#ifndef CONFIG_CPU_MIPSR6
132#define LoadW(addr, value, res) \ 133#define LoadW(addr, value, res) \
133 __asm__ __volatile__ ( \ 134 __asm__ __volatile__ ( \
134 "1:\t"user_lwl("%0", "(%2)")"\n" \ 135 "1:\t"user_lwl("%0", "(%2)")"\n" \
@@ -146,6 +147,39 @@ extern void show_registers(struct pt_regs *regs);
146 ".previous" \ 147 ".previous" \
147 : "=&r" (value), "=r" (res) \ 148 : "=&r" (value), "=r" (res) \
148 : "r" (addr), "i" (-EFAULT)); 149 : "r" (addr), "i" (-EFAULT));
150#else
151/* MIPSR6 has no lwl instruction */
152#define LoadW(addr, value, res) \
153 __asm__ __volatile__ ( \
154 ".set\tpush\n" \
155 ".set\tnoat\n\t" \
156 "1:"user_lb("%0", "0(%2)")"\n\t" \
157 "2:"user_lbu("$1", "1(%2)")"\n\t" \
158 "sll\t%0, 0x8\n\t" \
159 "or\t%0, $1\n\t" \
160 "3:"user_lbu("$1", "2(%2)")"\n\t" \
161 "sll\t%0, 0x8\n\t" \
162 "or\t%0, $1\n\t" \
163 "4:"user_lbu("$1", "3(%2)")"\n\t" \
164 "sll\t%0, 0x8\n\t" \
165 "or\t%0, $1\n\t" \
166 "li\t%1, 0\n" \
167 ".set\tpop\n" \
168 "10:\n\t" \
169 ".insn\n\t" \
170 ".section\t.fixup,\"ax\"\n\t" \
171 "11:\tli\t%1, %3\n\t" \
172 "j\t10b\n\t" \
173 ".previous\n\t" \
174 ".section\t__ex_table,\"a\"\n\t" \
175 STR(PTR)"\t1b, 11b\n\t" \
176 STR(PTR)"\t2b, 11b\n\t" \
177 STR(PTR)"\t3b, 11b\n\t" \
178 STR(PTR)"\t4b, 11b\n\t" \
179 ".previous" \
180 : "=&r" (value), "=r" (res) \
181 : "r" (addr), "i" (-EFAULT));
182#endif /* CONFIG_CPU_MIPSR6 */
149 183
150#define LoadHWU(addr, value, res) \ 184#define LoadHWU(addr, value, res) \
151 __asm__ __volatile__ ( \ 185 __asm__ __volatile__ ( \
@@ -169,6 +203,7 @@ extern void show_registers(struct pt_regs *regs);
169 : "=&r" (value), "=r" (res) \ 203 : "=&r" (value), "=r" (res) \
170 : "r" (addr), "i" (-EFAULT)); 204 : "r" (addr), "i" (-EFAULT));
171 205
206#ifndef CONFIG_CPU_MIPSR6
172#define LoadWU(addr, value, res) \ 207#define LoadWU(addr, value, res) \
173 __asm__ __volatile__ ( \ 208 __asm__ __volatile__ ( \
174 "1:\t"user_lwl("%0", "(%2)")"\n" \ 209 "1:\t"user_lwl("%0", "(%2)")"\n" \
@@ -206,6 +241,87 @@ extern void show_registers(struct pt_regs *regs);
206 ".previous" \ 241 ".previous" \
207 : "=&r" (value), "=r" (res) \ 242 : "=&r" (value), "=r" (res) \
208 : "r" (addr), "i" (-EFAULT)); 243 : "r" (addr), "i" (-EFAULT));
244#else
245/* MIPSR6 has not lwl and ldl instructions */
246#define LoadWU(addr, value, res) \
247 __asm__ __volatile__ ( \
248 ".set\tpush\n\t" \
249 ".set\tnoat\n\t" \
250 "1:"user_lbu("%0", "0(%2)")"\n\t" \
251 "2:"user_lbu("$1", "1(%2)")"\n\t" \
252 "sll\t%0, 0x8\n\t" \
253 "or\t%0, $1\n\t" \
254 "3:"user_lbu("$1", "2(%2)")"\n\t" \
255 "sll\t%0, 0x8\n\t" \
256 "or\t%0, $1\n\t" \
257 "4:"user_lbu("$1", "3(%2)")"\n\t" \
258 "sll\t%0, 0x8\n\t" \
259 "or\t%0, $1\n\t" \
260 "li\t%1, 0\n" \
261 ".set\tpop\n" \
262 "10:\n\t" \
263 ".insn\n\t" \
264 ".section\t.fixup,\"ax\"\n\t" \
265 "11:\tli\t%1, %3\n\t" \
266 "j\t10b\n\t" \
267 ".previous\n\t" \
268 ".section\t__ex_table,\"a\"\n\t" \
269 STR(PTR)"\t1b, 11b\n\t" \
270 STR(PTR)"\t2b, 11b\n\t" \
271 STR(PTR)"\t3b, 11b\n\t" \
272 STR(PTR)"\t4b, 11b\n\t" \
273 ".previous" \
274 : "=&r" (value), "=r" (res) \
275 : "r" (addr), "i" (-EFAULT));
276
277#define LoadDW(addr, value, res) \
278 __asm__ __volatile__ ( \
279 ".set\tpush\n\t" \
280 ".set\tnoat\n\t" \
281 "1:lb\t%0, 0(%2)\n\t" \
282 "2:lbu\t $1, 1(%2)\n\t" \
283 "dsll\t%0, 0x8\n\t" \
284 "or\t%0, $1\n\t" \
285 "3:lbu\t$1, 2(%2)\n\t" \
286 "dsll\t%0, 0x8\n\t" \
287 "or\t%0, $1\n\t" \
288 "4:lbu\t$1, 3(%2)\n\t" \
289 "dsll\t%0, 0x8\n\t" \
290 "or\t%0, $1\n\t" \
291 "5:lbu\t$1, 4(%2)\n\t" \
292 "dsll\t%0, 0x8\n\t" \
293 "or\t%0, $1\n\t" \
294 "6:lbu\t$1, 5(%2)\n\t" \
295 "dsll\t%0, 0x8\n\t" \
296 "or\t%0, $1\n\t" \
297 "7:lbu\t$1, 6(%2)\n\t" \
298 "dsll\t%0, 0x8\n\t" \
299 "or\t%0, $1\n\t" \
300 "8:lbu\t$1, 7(%2)\n\t" \
301 "dsll\t%0, 0x8\n\t" \
302 "or\t%0, $1\n\t" \
303 "li\t%1, 0\n" \
304 ".set\tpop\n\t" \
305 "10:\n\t" \
306 ".insn\n\t" \
307 ".section\t.fixup,\"ax\"\n\t" \
308 "11:\tli\t%1, %3\n\t" \
309 "j\t10b\n\t" \
310 ".previous\n\t" \
311 ".section\t__ex_table,\"a\"\n\t" \
312 STR(PTR)"\t1b, 11b\n\t" \
313 STR(PTR)"\t2b, 11b\n\t" \
314 STR(PTR)"\t3b, 11b\n\t" \
315 STR(PTR)"\t4b, 11b\n\t" \
316 STR(PTR)"\t5b, 11b\n\t" \
317 STR(PTR)"\t6b, 11b\n\t" \
318 STR(PTR)"\t7b, 11b\n\t" \
319 STR(PTR)"\t8b, 11b\n\t" \
320 ".previous" \
321 : "=&r" (value), "=r" (res) \
322 : "r" (addr), "i" (-EFAULT));
323#endif /* CONFIG_CPU_MIPSR6 */
324
209 325
210#define StoreHW(addr, value, res) \ 326#define StoreHW(addr, value, res) \
211 __asm__ __volatile__ ( \ 327 __asm__ __volatile__ ( \
@@ -228,6 +344,7 @@ extern void show_registers(struct pt_regs *regs);
228 : "=r" (res) \ 344 : "=r" (res) \
229 : "r" (value), "r" (addr), "i" (-EFAULT)); 345 : "r" (value), "r" (addr), "i" (-EFAULT));
230 346
347#ifndef CONFIG_CPU_MIPSR6
231#define StoreW(addr, value, res) \ 348#define StoreW(addr, value, res) \
232 __asm__ __volatile__ ( \ 349 __asm__ __volatile__ ( \
233 "1:\t"user_swl("%1", "(%2)")"\n" \ 350 "1:\t"user_swl("%1", "(%2)")"\n" \
@@ -263,9 +380,82 @@ extern void show_registers(struct pt_regs *regs);
263 ".previous" \ 380 ".previous" \
264 : "=r" (res) \ 381 : "=r" (res) \
265 : "r" (value), "r" (addr), "i" (-EFAULT)); 382 : "r" (value), "r" (addr), "i" (-EFAULT));
266#endif 383#else
384/* MIPSR6 has no swl and sdl instructions */
385#define StoreW(addr, value, res) \
386 __asm__ __volatile__ ( \
387 ".set\tpush\n\t" \
388 ".set\tnoat\n\t" \
389 "1:"user_sb("%1", "3(%2)")"\n\t" \
390 "srl\t$1, %1, 0x8\n\t" \
391 "2:"user_sb("$1", "2(%2)")"\n\t" \
392 "srl\t$1, $1, 0x8\n\t" \
393 "3:"user_sb("$1", "1(%2)")"\n\t" \
394 "srl\t$1, $1, 0x8\n\t" \
395 "4:"user_sb("$1", "0(%2)")"\n\t" \
396 ".set\tpop\n\t" \
397 "li\t%0, 0\n" \
398 "10:\n\t" \
399 ".insn\n\t" \
400 ".section\t.fixup,\"ax\"\n\t" \
401 "11:\tli\t%0, %3\n\t" \
402 "j\t10b\n\t" \
403 ".previous\n\t" \
404 ".section\t__ex_table,\"a\"\n\t" \
405 STR(PTR)"\t1b, 11b\n\t" \
406 STR(PTR)"\t2b, 11b\n\t" \
407 STR(PTR)"\t3b, 11b\n\t" \
408 STR(PTR)"\t4b, 11b\n\t" \
409 ".previous" \
410 : "=&r" (res) \
411 : "r" (value), "r" (addr), "i" (-EFAULT) \
412 : "memory");
413
414#define StoreDW(addr, value, res) \
415 __asm__ __volatile__ ( \
416 ".set\tpush\n\t" \
417 ".set\tnoat\n\t" \
418 "1:sb\t%1, 7(%2)\n\t" \
419 "dsrl\t$1, %1, 0x8\n\t" \
420 "2:sb\t$1, 6(%2)\n\t" \
421 "dsrl\t$1, $1, 0x8\n\t" \
422 "3:sb\t$1, 5(%2)\n\t" \
423 "dsrl\t$1, $1, 0x8\n\t" \
424 "4:sb\t$1, 4(%2)\n\t" \
425 "dsrl\t$1, $1, 0x8\n\t" \
426 "5:sb\t$1, 3(%2)\n\t" \
427 "dsrl\t$1, $1, 0x8\n\t" \
428 "6:sb\t$1, 2(%2)\n\t" \
429 "dsrl\t$1, $1, 0x8\n\t" \
430 "7:sb\t$1, 1(%2)\n\t" \
431 "dsrl\t$1, $1, 0x8\n\t" \
432 "8:sb\t$1, 0(%2)\n\t" \
433 "dsrl\t$1, $1, 0x8\n\t" \
434 ".set\tpop\n\t" \
435 "li\t%0, 0\n" \
436 "10:\n\t" \
437 ".insn\n\t" \
438 ".section\t.fixup,\"ax\"\n\t" \
439 "11:\tli\t%0, %3\n\t" \
440 "j\t10b\n\t" \
441 ".previous\n\t" \
442 ".section\t__ex_table,\"a\"\n\t" \
443 STR(PTR)"\t1b, 11b\n\t" \
444 STR(PTR)"\t2b, 11b\n\t" \
445 STR(PTR)"\t3b, 11b\n\t" \
446 STR(PTR)"\t4b, 11b\n\t" \
447 STR(PTR)"\t5b, 11b\n\t" \
448 STR(PTR)"\t6b, 11b\n\t" \
449 STR(PTR)"\t7b, 11b\n\t" \
450 STR(PTR)"\t8b, 11b\n\t" \
451 ".previous" \
452 : "=&r" (res) \
453 : "r" (value), "r" (addr), "i" (-EFAULT) \
454 : "memory");
455#endif /* CONFIG_CPU_MIPSR6 */
456
457#else /* __BIG_ENDIAN */
267 458
268#ifdef __LITTLE_ENDIAN
269#define LoadHW(addr, value, res) \ 459#define LoadHW(addr, value, res) \
270 __asm__ __volatile__ (".set\tnoat\n" \ 460 __asm__ __volatile__ (".set\tnoat\n" \
271 "1:\t"user_lb("%0", "1(%2)")"\n" \ 461 "1:\t"user_lb("%0", "1(%2)")"\n" \
@@ -286,6 +476,7 @@ extern void show_registers(struct pt_regs *regs);
286 : "=&r" (value), "=r" (res) \ 476 : "=&r" (value), "=r" (res) \
287 : "r" (addr), "i" (-EFAULT)); 477 : "r" (addr), "i" (-EFAULT));
288 478
479#ifndef CONFIG_CPU_MIPSR6
289#define LoadW(addr, value, res) \ 480#define LoadW(addr, value, res) \
290 __asm__ __volatile__ ( \ 481 __asm__ __volatile__ ( \
291 "1:\t"user_lwl("%0", "3(%2)")"\n" \ 482 "1:\t"user_lwl("%0", "3(%2)")"\n" \
@@ -303,6 +494,40 @@ extern void show_registers(struct pt_regs *regs);
303 ".previous" \ 494 ".previous" \
304 : "=&r" (value), "=r" (res) \ 495 : "=&r" (value), "=r" (res) \
305 : "r" (addr), "i" (-EFAULT)); 496 : "r" (addr), "i" (-EFAULT));
497#else
498/* MIPSR6 has no lwl instruction */
499#define LoadW(addr, value, res) \
500 __asm__ __volatile__ ( \
501 ".set\tpush\n" \
502 ".set\tnoat\n\t" \
503 "1:"user_lb("%0", "3(%2)")"\n\t" \
504 "2:"user_lbu("$1", "2(%2)")"\n\t" \
505 "sll\t%0, 0x8\n\t" \
506 "or\t%0, $1\n\t" \
507 "3:"user_lbu("$1", "1(%2)")"\n\t" \
508 "sll\t%0, 0x8\n\t" \
509 "or\t%0, $1\n\t" \
510 "4:"user_lbu("$1", "0(%2)")"\n\t" \
511 "sll\t%0, 0x8\n\t" \
512 "or\t%0, $1\n\t" \
513 "li\t%1, 0\n" \
514 ".set\tpop\n" \
515 "10:\n\t" \
516 ".insn\n\t" \
517 ".section\t.fixup,\"ax\"\n\t" \
518 "11:\tli\t%1, %3\n\t" \
519 "j\t10b\n\t" \
520 ".previous\n\t" \
521 ".section\t__ex_table,\"a\"\n\t" \
522 STR(PTR)"\t1b, 11b\n\t" \
523 STR(PTR)"\t2b, 11b\n\t" \
524 STR(PTR)"\t3b, 11b\n\t" \
525 STR(PTR)"\t4b, 11b\n\t" \
526 ".previous" \
527 : "=&r" (value), "=r" (res) \
528 : "r" (addr), "i" (-EFAULT));
529#endif /* CONFIG_CPU_MIPSR6 */
530
306 531
307#define LoadHWU(addr, value, res) \ 532#define LoadHWU(addr, value, res) \
308 __asm__ __volatile__ ( \ 533 __asm__ __volatile__ ( \
@@ -326,6 +551,7 @@ extern void show_registers(struct pt_regs *regs);
326 : "=&r" (value), "=r" (res) \ 551 : "=&r" (value), "=r" (res) \
327 : "r" (addr), "i" (-EFAULT)); 552 : "r" (addr), "i" (-EFAULT));
328 553
554#ifndef CONFIG_CPU_MIPSR6
329#define LoadWU(addr, value, res) \ 555#define LoadWU(addr, value, res) \
330 __asm__ __volatile__ ( \ 556 __asm__ __volatile__ ( \
331 "1:\t"user_lwl("%0", "3(%2)")"\n" \ 557 "1:\t"user_lwl("%0", "3(%2)")"\n" \
@@ -363,6 +589,86 @@ extern void show_registers(struct pt_regs *regs);
363 ".previous" \ 589 ".previous" \
364 : "=&r" (value), "=r" (res) \ 590 : "=&r" (value), "=r" (res) \
365 : "r" (addr), "i" (-EFAULT)); 591 : "r" (addr), "i" (-EFAULT));
592#else
593/* MIPSR6 has not lwl and ldl instructions */
594#define LoadWU(addr, value, res) \
595 __asm__ __volatile__ ( \
596 ".set\tpush\n\t" \
597 ".set\tnoat\n\t" \
598 "1:"user_lbu("%0", "3(%2)")"\n\t" \
599 "2:"user_lbu("$1", "2(%2)")"\n\t" \
600 "sll\t%0, 0x8\n\t" \
601 "or\t%0, $1\n\t" \
602 "3:"user_lbu("$1", "1(%2)")"\n\t" \
603 "sll\t%0, 0x8\n\t" \
604 "or\t%0, $1\n\t" \
605 "4:"user_lbu("$1", "0(%2)")"\n\t" \
606 "sll\t%0, 0x8\n\t" \
607 "or\t%0, $1\n\t" \
608 "li\t%1, 0\n" \
609 ".set\tpop\n" \
610 "10:\n\t" \
611 ".insn\n\t" \
612 ".section\t.fixup,\"ax\"\n\t" \
613 "11:\tli\t%1, %3\n\t" \
614 "j\t10b\n\t" \
615 ".previous\n\t" \
616 ".section\t__ex_table,\"a\"\n\t" \
617 STR(PTR)"\t1b, 11b\n\t" \
618 STR(PTR)"\t2b, 11b\n\t" \
619 STR(PTR)"\t3b, 11b\n\t" \
620 STR(PTR)"\t4b, 11b\n\t" \
621 ".previous" \
622 : "=&r" (value), "=r" (res) \
623 : "r" (addr), "i" (-EFAULT));
624
625#define LoadDW(addr, value, res) \
626 __asm__ __volatile__ ( \
627 ".set\tpush\n\t" \
628 ".set\tnoat\n\t" \
629 "1:lb\t%0, 7(%2)\n\t" \
630 "2:lbu\t$1, 6(%2)\n\t" \
631 "dsll\t%0, 0x8\n\t" \
632 "or\t%0, $1\n\t" \
633 "3:lbu\t$1, 5(%2)\n\t" \
634 "dsll\t%0, 0x8\n\t" \
635 "or\t%0, $1\n\t" \
636 "4:lbu\t$1, 4(%2)\n\t" \
637 "dsll\t%0, 0x8\n\t" \
638 "or\t%0, $1\n\t" \
639 "5:lbu\t$1, 3(%2)\n\t" \
640 "dsll\t%0, 0x8\n\t" \
641 "or\t%0, $1\n\t" \
642 "6:lbu\t$1, 2(%2)\n\t" \
643 "dsll\t%0, 0x8\n\t" \
644 "or\t%0, $1\n\t" \
645 "7:lbu\t$1, 1(%2)\n\t" \
646 "dsll\t%0, 0x8\n\t" \
647 "or\t%0, $1\n\t" \
648 "8:lbu\t$1, 0(%2)\n\t" \
649 "dsll\t%0, 0x8\n\t" \
650 "or\t%0, $1\n\t" \
651 "li\t%1, 0\n" \
652 ".set\tpop\n\t" \
653 "10:\n\t" \
654 ".insn\n\t" \
655 ".section\t.fixup,\"ax\"\n\t" \
656 "11:\tli\t%1, %3\n\t" \
657 "j\t10b\n\t" \
658 ".previous\n\t" \
659 ".section\t__ex_table,\"a\"\n\t" \
660 STR(PTR)"\t1b, 11b\n\t" \
661 STR(PTR)"\t2b, 11b\n\t" \
662 STR(PTR)"\t3b, 11b\n\t" \
663 STR(PTR)"\t4b, 11b\n\t" \
664 STR(PTR)"\t5b, 11b\n\t" \
665 STR(PTR)"\t6b, 11b\n\t" \
666 STR(PTR)"\t7b, 11b\n\t" \
667 STR(PTR)"\t8b, 11b\n\t" \
668 ".previous" \
669 : "=&r" (value), "=r" (res) \
670 : "r" (addr), "i" (-EFAULT));
671#endif /* CONFIG_CPU_MIPSR6 */
366 672
367#define StoreHW(addr, value, res) \ 673#define StoreHW(addr, value, res) \
368 __asm__ __volatile__ ( \ 674 __asm__ __volatile__ ( \
@@ -384,7 +690,7 @@ extern void show_registers(struct pt_regs *regs);
384 ".previous" \ 690 ".previous" \
385 : "=r" (res) \ 691 : "=r" (res) \
386 : "r" (value), "r" (addr), "i" (-EFAULT)); 692 : "r" (value), "r" (addr), "i" (-EFAULT));
387 693#ifndef CONFIG_CPU_MIPSR6
388#define StoreW(addr, value, res) \ 694#define StoreW(addr, value, res) \
389 __asm__ __volatile__ ( \ 695 __asm__ __volatile__ ( \
390 "1:\t"user_swl("%1", "3(%2)")"\n" \ 696 "1:\t"user_swl("%1", "3(%2)")"\n" \
@@ -420,6 +726,79 @@ extern void show_registers(struct pt_regs *regs);
420 ".previous" \ 726 ".previous" \
421 : "=r" (res) \ 727 : "=r" (res) \
422 : "r" (value), "r" (addr), "i" (-EFAULT)); 728 : "r" (value), "r" (addr), "i" (-EFAULT));
729#else
730/* MIPSR6 has no swl and sdl instructions */
731#define StoreW(addr, value, res) \
732 __asm__ __volatile__ ( \
733 ".set\tpush\n\t" \
734 ".set\tnoat\n\t" \
735 "1:"user_sb("%1", "0(%2)")"\n\t" \
736 "srl\t$1, %1, 0x8\n\t" \
737 "2:"user_sb("$1", "1(%2)")"\n\t" \
738 "srl\t$1, $1, 0x8\n\t" \
739 "3:"user_sb("$1", "2(%2)")"\n\t" \
740 "srl\t$1, $1, 0x8\n\t" \
741 "4:"user_sb("$1", "3(%2)")"\n\t" \
742 ".set\tpop\n\t" \
743 "li\t%0, 0\n" \
744 "10:\n\t" \
745 ".insn\n\t" \
746 ".section\t.fixup,\"ax\"\n\t" \
747 "11:\tli\t%0, %3\n\t" \
748 "j\t10b\n\t" \
749 ".previous\n\t" \
750 ".section\t__ex_table,\"a\"\n\t" \
751 STR(PTR)"\t1b, 11b\n\t" \
752 STR(PTR)"\t2b, 11b\n\t" \
753 STR(PTR)"\t3b, 11b\n\t" \
754 STR(PTR)"\t4b, 11b\n\t" \
755 ".previous" \
756 : "=&r" (res) \
757 : "r" (value), "r" (addr), "i" (-EFAULT) \
758 : "memory");
759
760#define StoreDW(addr, value, res) \
761 __asm__ __volatile__ ( \
762 ".set\tpush\n\t" \
763 ".set\tnoat\n\t" \
764 "1:sb\t%1, 0(%2)\n\t" \
765 "dsrl\t$1, %1, 0x8\n\t" \
766 "2:sb\t$1, 1(%2)\n\t" \
767 "dsrl\t$1, $1, 0x8\n\t" \
768 "3:sb\t$1, 2(%2)\n\t" \
769 "dsrl\t$1, $1, 0x8\n\t" \
770 "4:sb\t$1, 3(%2)\n\t" \
771 "dsrl\t$1, $1, 0x8\n\t" \
772 "5:sb\t$1, 4(%2)\n\t" \
773 "dsrl\t$1, $1, 0x8\n\t" \
774 "6:sb\t$1, 5(%2)\n\t" \
775 "dsrl\t$1, $1, 0x8\n\t" \
776 "7:sb\t$1, 6(%2)\n\t" \
777 "dsrl\t$1, $1, 0x8\n\t" \
778 "8:sb\t$1, 7(%2)\n\t" \
779 "dsrl\t$1, $1, 0x8\n\t" \
780 ".set\tpop\n\t" \
781 "li\t%0, 0\n" \
782 "10:\n\t" \
783 ".insn\n\t" \
784 ".section\t.fixup,\"ax\"\n\t" \
785 "11:\tli\t%0, %3\n\t" \
786 "j\t10b\n\t" \
787 ".previous\n\t" \
788 ".section\t__ex_table,\"a\"\n\t" \
789 STR(PTR)"\t1b, 11b\n\t" \
790 STR(PTR)"\t2b, 11b\n\t" \
791 STR(PTR)"\t3b, 11b\n\t" \
792 STR(PTR)"\t4b, 11b\n\t" \
793 STR(PTR)"\t5b, 11b\n\t" \
794 STR(PTR)"\t6b, 11b\n\t" \
795 STR(PTR)"\t7b, 11b\n\t" \
796 STR(PTR)"\t8b, 11b\n\t" \
797 ".previous" \
798 : "=&r" (res) \
799 : "r" (value), "r" (addr), "i" (-EFAULT) \
800 : "memory");
801#endif /* CONFIG_CPU_MIPSR6 */
423#endif 802#endif
424 803
425static void emulate_load_store_insn(struct pt_regs *regs, 804static void emulate_load_store_insn(struct pt_regs *regs,
@@ -703,10 +1082,13 @@ static void emulate_load_store_insn(struct pt_regs *regs,
703 break; 1082 break;
704 return; 1083 return;
705 1084
1085#ifndef CONFIG_CPU_MIPSR6
706 /* 1086 /*
707 * COP2 is available to implementor for application specific use. 1087 * COP2 is available to implementor for application specific use.
708 * It's up to applications to register a notifier chain and do 1088 * It's up to applications to register a notifier chain and do
709 * whatever they have to do, including possible sending of signals. 1089 * whatever they have to do, including possible sending of signals.
1090 *
1091 * This instruction has been reallocated in Release 6
710 */ 1092 */
711 case lwc2_op: 1093 case lwc2_op:
712 cu2_notifier_call_chain(CU2_LWC2_OP, regs); 1094 cu2_notifier_call_chain(CU2_LWC2_OP, regs);
@@ -723,7 +1105,7 @@ static void emulate_load_store_insn(struct pt_regs *regs,
723 case sdc2_op: 1105 case sdc2_op:
724 cu2_notifier_call_chain(CU2_SDC2_OP, regs); 1106 cu2_notifier_call_chain(CU2_SDC2_OP, regs);
725 break; 1107 break;
726 1108#endif
727 default: 1109 default:
728 /* 1110 /*
729 * Pheeee... We encountered an yet unknown instruction or 1111 * Pheeee... We encountered an yet unknown instruction or
diff --git a/arch/mips/kvm/tlb.c b/arch/mips/kvm/tlb.c
index bbcd82242059..b6beb0e07b1b 100644
--- a/arch/mips/kvm/tlb.c
+++ b/arch/mips/kvm/tlb.c
@@ -216,6 +216,7 @@ int kvm_mips_host_tlb_write(struct kvm_vcpu *vcpu, unsigned long entryhi,
216 if (idx > current_cpu_data.tlbsize) { 216 if (idx > current_cpu_data.tlbsize) {
217 kvm_err("%s: Invalid Index: %d\n", __func__, idx); 217 kvm_err("%s: Invalid Index: %d\n", __func__, idx);
218 kvm_mips_dump_host_tlbs(); 218 kvm_mips_dump_host_tlbs();
219 local_irq_restore(flags);
219 return -1; 220 return -1;
220 } 221 }
221 222
diff --git a/arch/mips/kvm/trace.h b/arch/mips/kvm/trace.h
index c1388d40663b..bd6437f67dc0 100644
--- a/arch/mips/kvm/trace.h
+++ b/arch/mips/kvm/trace.h
@@ -24,18 +24,18 @@ TRACE_EVENT(kvm_exit,
24 TP_PROTO(struct kvm_vcpu *vcpu, unsigned int reason), 24 TP_PROTO(struct kvm_vcpu *vcpu, unsigned int reason),
25 TP_ARGS(vcpu, reason), 25 TP_ARGS(vcpu, reason),
26 TP_STRUCT__entry( 26 TP_STRUCT__entry(
27 __field(struct kvm_vcpu *, vcpu) 27 __field(unsigned long, pc)
28 __field(unsigned int, reason) 28 __field(unsigned int, reason)
29 ), 29 ),
30 30
31 TP_fast_assign( 31 TP_fast_assign(
32 __entry->vcpu = vcpu; 32 __entry->pc = vcpu->arch.pc;
33 __entry->reason = reason; 33 __entry->reason = reason;
34 ), 34 ),
35 35
36 TP_printk("[%s]PC: 0x%08lx", 36 TP_printk("[%s]PC: 0x%08lx",
37 kvm_mips_exit_types_str[__entry->reason], 37 kvm_mips_exit_types_str[__entry->reason],
38 __entry->vcpu->arch.pc) 38 __entry->pc)
39); 39);
40 40
41#endif /* _TRACE_KVM_H */ 41#endif /* _TRACE_KVM_H */
diff --git a/arch/mips/lib/Makefile b/arch/mips/lib/Makefile
index eeddc58802e1..1e9e900cd3c3 100644
--- a/arch/mips/lib/Makefile
+++ b/arch/mips/lib/Makefile
@@ -8,6 +8,7 @@ lib-y += bitops.o csum_partial.o delay.o memcpy.o memset.o \
8 8
9obj-y += iomap.o 9obj-y += iomap.o
10obj-$(CONFIG_PCI) += iomap-pci.o 10obj-$(CONFIG_PCI) += iomap-pci.o
11lib-$(CONFIG_GENERIC_CSUM) := $(filter-out csum_partial.o, $(lib-y))
11 12
12obj-$(CONFIG_CPU_GENERIC_DUMP_TLB) += dump_tlb.o 13obj-$(CONFIG_CPU_GENERIC_DUMP_TLB) += dump_tlb.o
13obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o 14obj-$(CONFIG_CPU_R3000) += r3k_dump_tlb.o
diff --git a/arch/mips/lib/memcpy.S b/arch/mips/lib/memcpy.S
index 5d3238af9b5c..9245e1705e69 100644
--- a/arch/mips/lib/memcpy.S
+++ b/arch/mips/lib/memcpy.S
@@ -293,9 +293,14 @@
293 and t0, src, ADDRMASK 293 and t0, src, ADDRMASK
294 PREFS( 0, 2*32(src) ) 294 PREFS( 0, 2*32(src) )
295 PREFD( 1, 2*32(dst) ) 295 PREFD( 1, 2*32(dst) )
296#ifndef CONFIG_CPU_MIPSR6
296 bnez t1, .Ldst_unaligned\@ 297 bnez t1, .Ldst_unaligned\@
297 nop 298 nop
298 bnez t0, .Lsrc_unaligned_dst_aligned\@ 299 bnez t0, .Lsrc_unaligned_dst_aligned\@
300#else
301 or t0, t0, t1
302 bnez t0, .Lcopy_unaligned_bytes\@
303#endif
299 /* 304 /*
300 * use delay slot for fall-through 305 * use delay slot for fall-through
301 * src and dst are aligned; need to compute rem 306 * src and dst are aligned; need to compute rem
@@ -376,6 +381,7 @@
376 bne rem, len, 1b 381 bne rem, len, 1b
377 .set noreorder 382 .set noreorder
378 383
384#ifndef CONFIG_CPU_MIPSR6
379 /* 385 /*
380 * src and dst are aligned, need to copy rem bytes (rem < NBYTES) 386 * src and dst are aligned, need to copy rem bytes (rem < NBYTES)
381 * A loop would do only a byte at a time with possible branch 387 * A loop would do only a byte at a time with possible branch
@@ -477,6 +483,7 @@
477 bne len, rem, 1b 483 bne len, rem, 1b
478 .set noreorder 484 .set noreorder
479 485
486#endif /* !CONFIG_CPU_MIPSR6 */
480.Lcopy_bytes_checklen\@: 487.Lcopy_bytes_checklen\@:
481 beqz len, .Ldone\@ 488 beqz len, .Ldone\@
482 nop 489 nop
@@ -504,6 +511,22 @@
504.Ldone\@: 511.Ldone\@:
505 jr ra 512 jr ra
506 nop 513 nop
514
515#ifdef CONFIG_CPU_MIPSR6
516.Lcopy_unaligned_bytes\@:
5171:
518 COPY_BYTE(0)
519 COPY_BYTE(1)
520 COPY_BYTE(2)
521 COPY_BYTE(3)
522 COPY_BYTE(4)
523 COPY_BYTE(5)
524 COPY_BYTE(6)
525 COPY_BYTE(7)
526 ADD src, src, 8
527 b 1b
528 ADD dst, dst, 8
529#endif /* CONFIG_CPU_MIPSR6 */
507 .if __memcpy == 1 530 .if __memcpy == 1
508 END(memcpy) 531 END(memcpy)
509 .set __memcpy, 0 532 .set __memcpy, 0
diff --git a/arch/mips/lib/memset.S b/arch/mips/lib/memset.S
index c8fe6b1968fb..b8e63fd00375 100644
--- a/arch/mips/lib/memset.S
+++ b/arch/mips/lib/memset.S
@@ -111,6 +111,7 @@
111 .set at 111 .set at
112#endif 112#endif
113 113
114#ifndef CONFIG_CPU_MIPSR6
114 R10KCBARRIER(0(ra)) 115 R10KCBARRIER(0(ra))
115#ifdef __MIPSEB__ 116#ifdef __MIPSEB__
116 EX(LONG_S_L, a1, (a0), .Lfirst_fixup\@) /* make word/dword aligned */ 117 EX(LONG_S_L, a1, (a0), .Lfirst_fixup\@) /* make word/dword aligned */
@@ -120,6 +121,30 @@
120 PTR_SUBU a0, t0 /* long align ptr */ 121 PTR_SUBU a0, t0 /* long align ptr */
121 PTR_ADDU a2, t0 /* correct size */ 122 PTR_ADDU a2, t0 /* correct size */
122 123
124#else /* CONFIG_CPU_MIPSR6 */
125#define STORE_BYTE(N) \
126 EX(sb, a1, N(a0), .Lbyte_fixup\@); \
127 beqz t0, 0f; \
128 PTR_ADDU t0, 1;
129
130 PTR_ADDU a2, t0 /* correct size */
131 PTR_ADDU t0, 1
132 STORE_BYTE(0)
133 STORE_BYTE(1)
134#if LONGSIZE == 4
135 EX(sb, a1, 2(a0), .Lbyte_fixup\@)
136#else
137 STORE_BYTE(2)
138 STORE_BYTE(3)
139 STORE_BYTE(4)
140 STORE_BYTE(5)
141 EX(sb, a1, 6(a0), .Lbyte_fixup\@)
142#endif
1430:
144 ori a0, STORMASK
145 xori a0, STORMASK
146 PTR_ADDIU a0, STORSIZE
147#endif /* CONFIG_CPU_MIPSR6 */
1231: ori t1, a2, 0x3f /* # of full blocks */ 1481: ori t1, a2, 0x3f /* # of full blocks */
124 xori t1, 0x3f 149 xori t1, 0x3f
125 beqz t1, .Lmemset_partial\@ /* no block to fill */ 150 beqz t1, .Lmemset_partial\@ /* no block to fill */
@@ -159,6 +184,7 @@
159 andi a2, STORMASK /* At most one long to go */ 184 andi a2, STORMASK /* At most one long to go */
160 185
161 beqz a2, 1f 186 beqz a2, 1f
187#ifndef CONFIG_CPU_MIPSR6
162 PTR_ADDU a0, a2 /* What's left */ 188 PTR_ADDU a0, a2 /* What's left */
163 R10KCBARRIER(0(ra)) 189 R10KCBARRIER(0(ra))
164#ifdef __MIPSEB__ 190#ifdef __MIPSEB__
@@ -166,6 +192,22 @@
166#else 192#else
167 EX(LONG_S_L, a1, -1(a0), .Llast_fixup\@) 193 EX(LONG_S_L, a1, -1(a0), .Llast_fixup\@)
168#endif 194#endif
195#else
196 PTR_SUBU t0, $0, a2
197 PTR_ADDIU t0, 1
198 STORE_BYTE(0)
199 STORE_BYTE(1)
200#if LONGSIZE == 4
201 EX(sb, a1, 2(a0), .Lbyte_fixup\@)
202#else
203 STORE_BYTE(2)
204 STORE_BYTE(3)
205 STORE_BYTE(4)
206 STORE_BYTE(5)
207 EX(sb, a1, 6(a0), .Lbyte_fixup\@)
208#endif
2090:
210#endif
1691: jr ra 2111: jr ra
170 move a2, zero 212 move a2, zero
171 213
@@ -186,6 +228,11 @@
186 .hidden __memset 228 .hidden __memset
187 .endif 229 .endif
188 230
231.Lbyte_fixup\@:
232 PTR_SUBU a2, $0, t0
233 jr ra
234 PTR_ADDIU a2, 1
235
189.Lfirst_fixup\@: 236.Lfirst_fixup\@:
190 jr ra 237 jr ra
191 nop 238 nop
diff --git a/arch/mips/lib/mips-atomic.c b/arch/mips/lib/mips-atomic.c
index be777d9a3f85..272af8ac2425 100644
--- a/arch/mips/lib/mips-atomic.c
+++ b/arch/mips/lib/mips-atomic.c
@@ -15,7 +15,7 @@
15#include <linux/export.h> 15#include <linux/export.h>
16#include <linux/stringify.h> 16#include <linux/stringify.h>
17 17
18#ifndef CONFIG_CPU_MIPSR2 18#if !defined(CONFIG_CPU_MIPSR2) && !defined(CONFIG_CPU_MIPSR6)
19 19
20/* 20/*
21 * For cli() we have to insert nops to make sure that the new value 21 * For cli() we have to insert nops to make sure that the new value
diff --git a/arch/mips/math-emu/cp1emu.c b/arch/mips/math-emu/cp1emu.c
index 9dfcd7fc1bc3..b30bf65c7d7d 100644
--- a/arch/mips/math-emu/cp1emu.c
+++ b/arch/mips/math-emu/cp1emu.c
@@ -48,6 +48,7 @@
48#include <asm/processor.h> 48#include <asm/processor.h>
49#include <asm/fpu_emulator.h> 49#include <asm/fpu_emulator.h>
50#include <asm/fpu.h> 50#include <asm/fpu.h>
51#include <asm/mips-r2-to-r6-emul.h>
51 52
52#include "ieee754.h" 53#include "ieee754.h"
53 54
@@ -68,7 +69,7 @@ static int fpux_emu(struct pt_regs *,
68#define modeindex(v) ((v) & FPU_CSR_RM) 69#define modeindex(v) ((v) & FPU_CSR_RM)
69 70
70/* convert condition code register number to csr bit */ 71/* convert condition code register number to csr bit */
71static const unsigned int fpucondbit[8] = { 72const unsigned int fpucondbit[8] = {
72 FPU_CSR_COND0, 73 FPU_CSR_COND0,
73 FPU_CSR_COND1, 74 FPU_CSR_COND1,
74 FPU_CSR_COND2, 75 FPU_CSR_COND2,
@@ -448,6 +449,9 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
448 dec_insn.next_pc_inc; 449 dec_insn.next_pc_inc;
449 /* Fall through */ 450 /* Fall through */
450 case jr_op: 451 case jr_op:
452 /* For R6, JR already emulated in jalr_op */
453 if (NO_R6EMU && insn.r_format.opcode == jr_op)
454 break;
451 *contpc = regs->regs[insn.r_format.rs]; 455 *contpc = regs->regs[insn.r_format.rs];
452 return 1; 456 return 1;
453 } 457 }
@@ -456,12 +460,18 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
456 switch (insn.i_format.rt) { 460 switch (insn.i_format.rt) {
457 case bltzal_op: 461 case bltzal_op:
458 case bltzall_op: 462 case bltzall_op:
463 if (NO_R6EMU && (insn.i_format.rs ||
464 insn.i_format.rt == bltzall_op))
465 break;
466
459 regs->regs[31] = regs->cp0_epc + 467 regs->regs[31] = regs->cp0_epc +
460 dec_insn.pc_inc + 468 dec_insn.pc_inc +
461 dec_insn.next_pc_inc; 469 dec_insn.next_pc_inc;
462 /* Fall through */ 470 /* Fall through */
463 case bltz_op:
464 case bltzl_op: 471 case bltzl_op:
472 if (NO_R6EMU)
473 break;
474 case bltz_op:
465 if ((long)regs->regs[insn.i_format.rs] < 0) 475 if ((long)regs->regs[insn.i_format.rs] < 0)
466 *contpc = regs->cp0_epc + 476 *contpc = regs->cp0_epc +
467 dec_insn.pc_inc + 477 dec_insn.pc_inc +
@@ -473,12 +483,18 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
473 return 1; 483 return 1;
474 case bgezal_op: 484 case bgezal_op:
475 case bgezall_op: 485 case bgezall_op:
486 if (NO_R6EMU && (insn.i_format.rs ||
487 insn.i_format.rt == bgezall_op))
488 break;
489
476 regs->regs[31] = regs->cp0_epc + 490 regs->regs[31] = regs->cp0_epc +
477 dec_insn.pc_inc + 491 dec_insn.pc_inc +
478 dec_insn.next_pc_inc; 492 dec_insn.next_pc_inc;
479 /* Fall through */ 493 /* Fall through */
480 case bgez_op:
481 case bgezl_op: 494 case bgezl_op:
495 if (NO_R6EMU)
496 break;
497 case bgez_op:
482 if ((long)regs->regs[insn.i_format.rs] >= 0) 498 if ((long)regs->regs[insn.i_format.rs] >= 0)
483 *contpc = regs->cp0_epc + 499 *contpc = regs->cp0_epc +
484 dec_insn.pc_inc + 500 dec_insn.pc_inc +
@@ -505,8 +521,10 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
505 /* Set microMIPS mode bit: XOR for jalx. */ 521 /* Set microMIPS mode bit: XOR for jalx. */
506 *contpc ^= bit; 522 *contpc ^= bit;
507 return 1; 523 return 1;
508 case beq_op:
509 case beql_op: 524 case beql_op:
525 if (NO_R6EMU)
526 break;
527 case beq_op:
510 if (regs->regs[insn.i_format.rs] == 528 if (regs->regs[insn.i_format.rs] ==
511 regs->regs[insn.i_format.rt]) 529 regs->regs[insn.i_format.rt])
512 *contpc = regs->cp0_epc + 530 *contpc = regs->cp0_epc +
@@ -517,8 +535,10 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
517 dec_insn.pc_inc + 535 dec_insn.pc_inc +
518 dec_insn.next_pc_inc; 536 dec_insn.next_pc_inc;
519 return 1; 537 return 1;
520 case bne_op:
521 case bnel_op: 538 case bnel_op:
539 if (NO_R6EMU)
540 break;
541 case bne_op:
522 if (regs->regs[insn.i_format.rs] != 542 if (regs->regs[insn.i_format.rs] !=
523 regs->regs[insn.i_format.rt]) 543 regs->regs[insn.i_format.rt])
524 *contpc = regs->cp0_epc + 544 *contpc = regs->cp0_epc +
@@ -529,8 +549,34 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
529 dec_insn.pc_inc + 549 dec_insn.pc_inc +
530 dec_insn.next_pc_inc; 550 dec_insn.next_pc_inc;
531 return 1; 551 return 1;
532 case blez_op:
533 case blezl_op: 552 case blezl_op:
553 if (NO_R6EMU)
554 break;
555 case blez_op:
556
557 /*
558 * Compact branches for R6 for the
559 * blez and blezl opcodes.
560 * BLEZ | rs = 0 | rt != 0 == BLEZALC
561 * BLEZ | rs = rt != 0 == BGEZALC
562 * BLEZ | rs != 0 | rt != 0 == BGEUC
563 * BLEZL | rs = 0 | rt != 0 == BLEZC
564 * BLEZL | rs = rt != 0 == BGEZC
565 * BLEZL | rs != 0 | rt != 0 == BGEC
566 *
567 * For real BLEZ{,L}, rt is always 0.
568 */
569 if (cpu_has_mips_r6 && insn.i_format.rt) {
570 if ((insn.i_format.opcode == blez_op) &&
571 ((!insn.i_format.rs && insn.i_format.rt) ||
572 (insn.i_format.rs == insn.i_format.rt)))
573 regs->regs[31] = regs->cp0_epc +
574 dec_insn.pc_inc;
575 *contpc = regs->cp0_epc + dec_insn.pc_inc +
576 dec_insn.next_pc_inc;
577
578 return 1;
579 }
534 if ((long)regs->regs[insn.i_format.rs] <= 0) 580 if ((long)regs->regs[insn.i_format.rs] <= 0)
535 *contpc = regs->cp0_epc + 581 *contpc = regs->cp0_epc +
536 dec_insn.pc_inc + 582 dec_insn.pc_inc +
@@ -540,8 +586,35 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
540 dec_insn.pc_inc + 586 dec_insn.pc_inc +
541 dec_insn.next_pc_inc; 587 dec_insn.next_pc_inc;
542 return 1; 588 return 1;
543 case bgtz_op:
544 case bgtzl_op: 589 case bgtzl_op:
590 if (NO_R6EMU)
591 break;
592 case bgtz_op:
593 /*
594 * Compact branches for R6 for the
595 * bgtz and bgtzl opcodes.
596 * BGTZ | rs = 0 | rt != 0 == BGTZALC
597 * BGTZ | rs = rt != 0 == BLTZALC
598 * BGTZ | rs != 0 | rt != 0 == BLTUC
599 * BGTZL | rs = 0 | rt != 0 == BGTZC
600 * BGTZL | rs = rt != 0 == BLTZC
601 * BGTZL | rs != 0 | rt != 0 == BLTC
602 *
603 * *ZALC varint for BGTZ &&& rt != 0
604 * For real GTZ{,L}, rt is always 0.
605 */
606 if (cpu_has_mips_r6 && insn.i_format.rt) {
607 if ((insn.i_format.opcode == blez_op) &&
608 ((!insn.i_format.rs && insn.i_format.rt) ||
609 (insn.i_format.rs == insn.i_format.rt)))
610 regs->regs[31] = regs->cp0_epc +
611 dec_insn.pc_inc;
612 *contpc = regs->cp0_epc + dec_insn.pc_inc +
613 dec_insn.next_pc_inc;
614
615 return 1;
616 }
617
545 if ((long)regs->regs[insn.i_format.rs] > 0) 618 if ((long)regs->regs[insn.i_format.rs] > 0)
546 *contpc = regs->cp0_epc + 619 *contpc = regs->cp0_epc +
547 dec_insn.pc_inc + 620 dec_insn.pc_inc +
@@ -551,6 +624,16 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
551 dec_insn.pc_inc + 624 dec_insn.pc_inc +
552 dec_insn.next_pc_inc; 625 dec_insn.next_pc_inc;
553 return 1; 626 return 1;
627 case cbcond0_op:
628 case cbcond1_op:
629 if (!cpu_has_mips_r6)
630 break;
631 if (insn.i_format.rt && !insn.i_format.rs)
632 regs->regs[31] = regs->cp0_epc + 4;
633 *contpc = regs->cp0_epc + dec_insn.pc_inc +
634 dec_insn.next_pc_inc;
635
636 return 1;
554#ifdef CONFIG_CPU_CAVIUM_OCTEON 637#ifdef CONFIG_CPU_CAVIUM_OCTEON
555 case lwc2_op: /* This is bbit0 on Octeon */ 638 case lwc2_op: /* This is bbit0 on Octeon */
556 if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) == 0) 639 if ((regs->regs[insn.i_format.rs] & (1ull<<insn.i_format.rt)) == 0)
@@ -576,9 +659,73 @@ static int isBranchInstr(struct pt_regs *regs, struct mm_decoded_insn dec_insn,
576 else 659 else
577 *contpc = regs->cp0_epc + 8; 660 *contpc = regs->cp0_epc + 8;
578 return 1; 661 return 1;
662#else
663 case bc6_op:
664 /*
665 * Only valid for MIPS R6 but we can still end up
666 * here from a broken userland so just tell emulator
667 * this is not a branch and let it break later on.
668 */
669 if (!cpu_has_mips_r6)
670 break;
671 *contpc = regs->cp0_epc + dec_insn.pc_inc +
672 dec_insn.next_pc_inc;
673
674 return 1;
675 case balc6_op:
676 if (!cpu_has_mips_r6)
677 break;
678 regs->regs[31] = regs->cp0_epc + 4;
679 *contpc = regs->cp0_epc + dec_insn.pc_inc +
680 dec_insn.next_pc_inc;
681
682 return 1;
683 case beqzcjic_op:
684 if (!cpu_has_mips_r6)
685 break;
686 *contpc = regs->cp0_epc + dec_insn.pc_inc +
687 dec_insn.next_pc_inc;
688
689 return 1;
690 case bnezcjialc_op:
691 if (!cpu_has_mips_r6)
692 break;
693 if (!insn.i_format.rs)
694 regs->regs[31] = regs->cp0_epc + 4;
695 *contpc = regs->cp0_epc + dec_insn.pc_inc +
696 dec_insn.next_pc_inc;
697
698 return 1;
579#endif 699#endif
580 case cop0_op: 700 case cop0_op:
581 case cop1_op: 701 case cop1_op:
702 /* Need to check for R6 bc1nez and bc1eqz branches */
703 if (cpu_has_mips_r6 &&
704 ((insn.i_format.rs == bc1eqz_op) ||
705 (insn.i_format.rs == bc1nez_op))) {
706 bit = 0;
707 switch (insn.i_format.rs) {
708 case bc1eqz_op:
709 if (get_fpr32(&current->thread.fpu.fpr[insn.i_format.rt], 0) & 0x1)
710 bit = 1;
711 break;
712 case bc1nez_op:
713 if (!(get_fpr32(&current->thread.fpu.fpr[insn.i_format.rt], 0) & 0x1))
714 bit = 1;
715 break;
716 }
717 if (bit)
718 *contpc = regs->cp0_epc +
719 dec_insn.pc_inc +
720 (insn.i_format.simmediate << 2);
721 else
722 *contpc = regs->cp0_epc +
723 dec_insn.pc_inc +
724 dec_insn.next_pc_inc;
725
726 return 1;
727 }
728 /* R2/R6 compatible cop1 instruction. Fall through */
582 case cop2_op: 729 case cop2_op:
583 case cop1x_op: 730 case cop1x_op:
584 if (insn.i_format.rs == bc_op) { 731 if (insn.i_format.rs == bc_op) {
@@ -1414,14 +1561,14 @@ static int fpu_emu(struct pt_regs *xcp, struct mips_fpu_struct *ctx,
1414 * achieve full IEEE-754 accuracy - however this emulator does. 1561 * achieve full IEEE-754 accuracy - however this emulator does.
1415 */ 1562 */
1416 case frsqrt_op: 1563 case frsqrt_op:
1417 if (!cpu_has_mips_4_5_r2) 1564 if (!cpu_has_mips_4_5_r2_r6)
1418 return SIGILL; 1565 return SIGILL;
1419 1566
1420 handler.u = fpemu_sp_rsqrt; 1567 handler.u = fpemu_sp_rsqrt;
1421 goto scopuop; 1568 goto scopuop;
1422 1569
1423 case frecip_op: 1570 case frecip_op:
1424 if (!cpu_has_mips_4_5_r2) 1571 if (!cpu_has_mips_4_5_r2_r6)
1425 return SIGILL; 1572 return SIGILL;
1426 1573
1427 handler.u = fpemu_sp_recip; 1574 handler.u = fpemu_sp_recip;
@@ -1616,13 +1763,13 @@ copcsr:
1616 * achieve full IEEE-754 accuracy - however this emulator does. 1763 * achieve full IEEE-754 accuracy - however this emulator does.
1617 */ 1764 */
1618 case frsqrt_op: 1765 case frsqrt_op:
1619 if (!cpu_has_mips_4_5_r2) 1766 if (!cpu_has_mips_4_5_r2_r6)
1620 return SIGILL; 1767 return SIGILL;
1621 1768
1622 handler.u = fpemu_dp_rsqrt; 1769 handler.u = fpemu_dp_rsqrt;
1623 goto dcopuop; 1770 goto dcopuop;
1624 case frecip_op: 1771 case frecip_op:
1625 if (!cpu_has_mips_4_5_r2) 1772 if (!cpu_has_mips_4_5_r2_r6)
1626 return SIGILL; 1773 return SIGILL;
1627 1774
1628 handler.u = fpemu_dp_recip; 1775 handler.u = fpemu_dp_recip;
diff --git a/arch/mips/mm/c-r4k.c b/arch/mips/mm/c-r4k.c
index dd261df005c2..3f8059602765 100644
--- a/arch/mips/mm/c-r4k.c
+++ b/arch/mips/mm/c-r4k.c
@@ -794,7 +794,7 @@ static void local_r4k_flush_cache_sigtramp(void * arg)
794 __asm__ __volatile__ ( 794 __asm__ __volatile__ (
795 ".set push\n\t" 795 ".set push\n\t"
796 ".set noat\n\t" 796 ".set noat\n\t"
797 ".set mips3\n\t" 797 ".set "MIPS_ISA_LEVEL"\n\t"
798#ifdef CONFIG_32BIT 798#ifdef CONFIG_32BIT
799 "la $at,1f\n\t" 799 "la $at,1f\n\t"
800#endif 800#endif
@@ -1255,6 +1255,7 @@ static void probe_pcache(void)
1255 case CPU_P5600: 1255 case CPU_P5600:
1256 case CPU_PROAPTIV: 1256 case CPU_PROAPTIV:
1257 case CPU_M5150: 1257 case CPU_M5150:
1258 case CPU_QEMU_GENERIC:
1258 if (!(read_c0_config7() & MIPS_CONF7_IAR) && 1259 if (!(read_c0_config7() & MIPS_CONF7_IAR) &&
1259 (c->icache.waysize > PAGE_SIZE)) 1260 (c->icache.waysize > PAGE_SIZE))
1260 c->icache.flags |= MIPS_CACHE_ALIASES; 1261 c->icache.flags |= MIPS_CACHE_ALIASES;
@@ -1472,7 +1473,8 @@ static void setup_scache(void)
1472 1473
1473 default: 1474 default:
1474 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 | 1475 if (c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 |
1475 MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2)) { 1476 MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R1 |
1477 MIPS_CPU_ISA_M64R2 | MIPS_CPU_ISA_M64R6)) {
1476#ifdef CONFIG_MIPS_CPU_SCACHE 1478#ifdef CONFIG_MIPS_CPU_SCACHE
1477 if (mips_sc_init ()) { 1479 if (mips_sc_init ()) {
1478 scache_size = c->scache.ways * c->scache.sets * c->scache.linesz; 1480 scache_size = c->scache.ways * c->scache.sets * c->scache.linesz;
diff --git a/arch/mips/mm/fault.c b/arch/mips/mm/fault.c
index 70ab5d664332..7ff8637e530d 100644
--- a/arch/mips/mm/fault.c
+++ b/arch/mips/mm/fault.c
@@ -14,6 +14,7 @@
14#include <linux/string.h> 14#include <linux/string.h>
15#include <linux/types.h> 15#include <linux/types.h>
16#include <linux/ptrace.h> 16#include <linux/ptrace.h>
17#include <linux/ratelimit.h>
17#include <linux/mman.h> 18#include <linux/mman.h>
18#include <linux/mm.h> 19#include <linux/mm.h>
19#include <linux/smp.h> 20#include <linux/smp.h>
@@ -28,6 +29,8 @@
28#include <asm/highmem.h> /* For VMALLOC_END */ 29#include <asm/highmem.h> /* For VMALLOC_END */
29#include <linux/kdebug.h> 30#include <linux/kdebug.h>
30 31
32int show_unhandled_signals = 1;
33
31/* 34/*
32 * This routine handles page faults. It determines the address, 35 * This routine handles page faults. It determines the address,
33 * and the problem, and then passes it off to one of the appropriate 36 * and the problem, and then passes it off to one of the appropriate
@@ -44,6 +47,8 @@ static void __kprobes __do_page_fault(struct pt_regs *regs, unsigned long write,
44 int fault; 47 int fault;
45 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE; 48 unsigned int flags = FAULT_FLAG_ALLOW_RETRY | FAULT_FLAG_KILLABLE;
46 49
50 static DEFINE_RATELIMIT_STATE(ratelimit_state, 5 * HZ, 10);
51
47#if 0 52#if 0
48 printk("Cpu%d[%s:%d:%0*lx:%ld:%0*lx]\n", raw_smp_processor_id(), 53 printk("Cpu%d[%s:%d:%0*lx:%ld:%0*lx]\n", raw_smp_processor_id(),
49 current->comm, current->pid, field, address, write, 54 current->comm, current->pid, field, address, write,
@@ -203,15 +208,21 @@ bad_area_nosemaphore:
203 if (user_mode(regs)) { 208 if (user_mode(regs)) {
204 tsk->thread.cp0_badvaddr = address; 209 tsk->thread.cp0_badvaddr = address;
205 tsk->thread.error_code = write; 210 tsk->thread.error_code = write;
206#if 0 211 if (show_unhandled_signals &&
207 printk("do_page_fault() #2: sending SIGSEGV to %s for " 212 unhandled_signal(tsk, SIGSEGV) &&
208 "invalid %s\n%0*lx (epc == %0*lx, ra == %0*lx)\n", 213 __ratelimit(&ratelimit_state)) {
209 tsk->comm, 214 pr_info("\ndo_page_fault(): sending SIGSEGV to %s for invalid %s %0*lx",
210 write ? "write access to" : "read access from", 215 tsk->comm,
211 field, address, 216 write ? "write access to" : "read access from",
212 field, (unsigned long) regs->cp0_epc, 217 field, address);
213 field, (unsigned long) regs->regs[31]); 218 pr_info("epc = %0*lx in", field,
214#endif 219 (unsigned long) regs->cp0_epc);
220 print_vma_addr(" ", regs->cp0_epc);
221 pr_info("ra = %0*lx in", field,
222 (unsigned long) regs->regs[31]);
223 print_vma_addr(" ", regs->regs[31]);
224 pr_info("\n");
225 }
215 info.si_signo = SIGSEGV; 226 info.si_signo = SIGSEGV;
216 info.si_errno = 0; 227 info.si_errno = 0;
217 /* info.si_code has been set above */ 228 /* info.si_code has been set above */
diff --git a/arch/mips/mm/page.c b/arch/mips/mm/page.c
index b611102e23b5..3f85f921801b 100644
--- a/arch/mips/mm/page.c
+++ b/arch/mips/mm/page.c
@@ -72,6 +72,20 @@ static struct uasm_reloc relocs[5];
72#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x00002010) 72#define cpu_is_r4600_v1_x() ((read_c0_prid() & 0xfffffff0) == 0x00002010)
73#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x00002020) 73#define cpu_is_r4600_v2_x() ((read_c0_prid() & 0xfffffff0) == 0x00002020)
74 74
75/*
76 * R6 has a limited offset of the pref instruction.
77 * Skip it if the offset is more than 9 bits.
78 */
79#define _uasm_i_pref(a, b, c, d) \
80do { \
81 if (cpu_has_mips_r6) { \
82 if (c <= 0xff && c >= -0x100) \
83 uasm_i_pref(a, b, c, d);\
84 } else { \
85 uasm_i_pref(a, b, c, d); \
86 } \
87} while(0)
88
75static int pref_bias_clear_store; 89static int pref_bias_clear_store;
76static int pref_bias_copy_load; 90static int pref_bias_copy_load;
77static int pref_bias_copy_store; 91static int pref_bias_copy_store;
@@ -178,7 +192,15 @@ static void set_prefetch_parameters(void)
178 pref_bias_copy_load = 256; 192 pref_bias_copy_load = 256;
179 pref_bias_copy_store = 128; 193 pref_bias_copy_store = 128;
180 pref_src_mode = Pref_LoadStreamed; 194 pref_src_mode = Pref_LoadStreamed;
181 pref_dst_mode = Pref_PrepareForStore; 195 if (cpu_has_mips_r6)
196 /*
197 * Bit 30 (Pref_PrepareForStore) has been
198 * removed from MIPS R6. Use bit 5
199 * (Pref_StoreStreamed).
200 */
201 pref_dst_mode = Pref_StoreStreamed;
202 else
203 pref_dst_mode = Pref_PrepareForStore;
182 break; 204 break;
183 } 205 }
184 } else { 206 } else {
@@ -214,7 +236,7 @@ static inline void build_clear_pref(u32 **buf, int off)
214 return; 236 return;
215 237
216 if (pref_bias_clear_store) { 238 if (pref_bias_clear_store) {
217 uasm_i_pref(buf, pref_dst_mode, pref_bias_clear_store + off, 239 _uasm_i_pref(buf, pref_dst_mode, pref_bias_clear_store + off,
218 A0); 240 A0);
219 } else if (cache_line_size == (half_clear_loop_size << 1)) { 241 } else if (cache_line_size == (half_clear_loop_size << 1)) {
220 if (cpu_has_cache_cdex_s) { 242 if (cpu_has_cache_cdex_s) {
@@ -357,7 +379,7 @@ static inline void build_copy_load_pref(u32 **buf, int off)
357 return; 379 return;
358 380
359 if (pref_bias_copy_load) 381 if (pref_bias_copy_load)
360 uasm_i_pref(buf, pref_src_mode, pref_bias_copy_load + off, A1); 382 _uasm_i_pref(buf, pref_src_mode, pref_bias_copy_load + off, A1);
361} 383}
362 384
363static inline void build_copy_store_pref(u32 **buf, int off) 385static inline void build_copy_store_pref(u32 **buf, int off)
@@ -366,7 +388,7 @@ static inline void build_copy_store_pref(u32 **buf, int off)
366 return; 388 return;
367 389
368 if (pref_bias_copy_store) { 390 if (pref_bias_copy_store) {
369 uasm_i_pref(buf, pref_dst_mode, pref_bias_copy_store + off, 391 _uasm_i_pref(buf, pref_dst_mode, pref_bias_copy_store + off,
370 A0); 392 A0);
371 } else if (cache_line_size == (half_copy_loop_size << 1)) { 393 } else if (cache_line_size == (half_copy_loop_size << 1)) {
372 if (cpu_has_cache_cdex_s) { 394 if (cpu_has_cache_cdex_s) {
diff --git a/arch/mips/mm/sc-mips.c b/arch/mips/mm/sc-mips.c
index 99eb8fabab60..4ceafd13870c 100644
--- a/arch/mips/mm/sc-mips.c
+++ b/arch/mips/mm/sc-mips.c
@@ -81,6 +81,7 @@ static inline int mips_sc_is_activated(struct cpuinfo_mips *c)
81 case CPU_PROAPTIV: 81 case CPU_PROAPTIV:
82 case CPU_P5600: 82 case CPU_P5600:
83 case CPU_BMIPS5000: 83 case CPU_BMIPS5000:
84 case CPU_QEMU_GENERIC:
84 if (config2 & (1 << 12)) 85 if (config2 & (1 << 12))
85 return 0; 86 return 0;
86 } 87 }
@@ -104,7 +105,8 @@ static inline int __init mips_sc_probe(void)
104 105
105 /* Ignore anything but MIPSxx processors */ 106 /* Ignore anything but MIPSxx processors */
106 if (!(c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 | 107 if (!(c->isa_level & (MIPS_CPU_ISA_M32R1 | MIPS_CPU_ISA_M32R2 |
107 MIPS_CPU_ISA_M64R1 | MIPS_CPU_ISA_M64R2))) 108 MIPS_CPU_ISA_M32R6 | MIPS_CPU_ISA_M64R1 |
109 MIPS_CPU_ISA_M64R2 | MIPS_CPU_ISA_M64R6)))
108 return 0; 110 return 0;
109 111
110 /* Does this MIPS32/MIPS64 CPU have a config2 register? */ 112 /* Does this MIPS32/MIPS64 CPU have a config2 register? */
diff --git a/arch/mips/mm/tlb-r4k.c b/arch/mips/mm/tlb-r4k.c
index 30639a6e9b8c..b2afa49beab0 100644
--- a/arch/mips/mm/tlb-r4k.c
+++ b/arch/mips/mm/tlb-r4k.c
@@ -485,13 +485,11 @@ static void r4k_tlb_configure(void)
485 * Enable the no read, no exec bits, and enable large virtual 485 * Enable the no read, no exec bits, and enable large virtual
486 * address. 486 * address.
487 */ 487 */
488 u32 pg = PG_RIE | PG_XIE;
489#ifdef CONFIG_64BIT 488#ifdef CONFIG_64BIT
490 pg |= PG_ELPA; 489 set_c0_pagegrain(PG_RIE | PG_XIE | PG_ELPA);
490#else
491 set_c0_pagegrain(PG_RIE | PG_XIE);
491#endif 492#endif
492 if (cpu_has_rixiex)
493 pg |= PG_IEC;
494 write_c0_pagegrain(pg);
495 } 493 }
496 494
497 temp_tlb_entry = current_cpu_data.tlbsize - 1; 495 temp_tlb_entry = current_cpu_data.tlbsize - 1;
diff --git a/arch/mips/mm/tlbex.c b/arch/mips/mm/tlbex.c
index 3978a3d81366..d75ff73a2012 100644
--- a/arch/mips/mm/tlbex.c
+++ b/arch/mips/mm/tlbex.c
@@ -501,7 +501,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
501 case tlb_indexed: tlbw = uasm_i_tlbwi; break; 501 case tlb_indexed: tlbw = uasm_i_tlbwi; break;
502 } 502 }
503 503
504 if (cpu_has_mips_r2) { 504 if (cpu_has_mips_r2_exec_hazard) {
505 /* 505 /*
506 * The architecture spec says an ehb is required here, 506 * The architecture spec says an ehb is required here,
507 * but a number of cores do not have the hazard and 507 * but a number of cores do not have the hazard and
@@ -514,6 +514,7 @@ static void build_tlb_write_entry(u32 **p, struct uasm_label **l,
514 case CPU_PROAPTIV: 514 case CPU_PROAPTIV:
515 case CPU_P5600: 515 case CPU_P5600:
516 case CPU_M5150: 516 case CPU_M5150:
517 case CPU_QEMU_GENERIC:
517 break; 518 break;
518 519
519 default: 520 default:
@@ -1952,7 +1953,7 @@ static void build_r4000_tlb_load_handler(void)
1952 1953
1953 switch (current_cpu_type()) { 1954 switch (current_cpu_type()) {
1954 default: 1955 default:
1955 if (cpu_has_mips_r2) { 1956 if (cpu_has_mips_r2_exec_hazard) {
1956 uasm_i_ehb(&p); 1957 uasm_i_ehb(&p);
1957 1958
1958 case CPU_CAVIUM_OCTEON: 1959 case CPU_CAVIUM_OCTEON:
@@ -2019,7 +2020,7 @@ static void build_r4000_tlb_load_handler(void)
2019 2020
2020 switch (current_cpu_type()) { 2021 switch (current_cpu_type()) {
2021 default: 2022 default:
2022 if (cpu_has_mips_r2) { 2023 if (cpu_has_mips_r2_exec_hazard) {
2023 uasm_i_ehb(&p); 2024 uasm_i_ehb(&p);
2024 2025
2025 case CPU_CAVIUM_OCTEON: 2026 case CPU_CAVIUM_OCTEON:
diff --git a/arch/mips/mm/uasm-micromips.c b/arch/mips/mm/uasm-micromips.c
index 8399ddf03a02..d78178daea4b 100644
--- a/arch/mips/mm/uasm-micromips.c
+++ b/arch/mips/mm/uasm-micromips.c
@@ -38,14 +38,6 @@
38 | (e) << RE_SH \ 38 | (e) << RE_SH \
39 | (f) << FUNC_SH) 39 | (f) << FUNC_SH)
40 40
41/* Define these when we are not the ISA the kernel is being compiled with. */
42#ifndef CONFIG_CPU_MICROMIPS
43#define MM_uasm_i_b(buf, off) ISAOPC(_beq)(buf, 0, 0, off)
44#define MM_uasm_i_beqz(buf, rs, off) ISAOPC(_beq)(buf, rs, 0, off)
45#define MM_uasm_i_beqzl(buf, rs, off) ISAOPC(_beql)(buf, rs, 0, off)
46#define MM_uasm_i_bnez(buf, rs, off) ISAOPC(_bne)(buf, rs, 0, off)
47#endif
48
49#include "uasm.c" 41#include "uasm.c"
50 42
51static struct insn insn_table_MM[] = { 43static struct insn insn_table_MM[] = {
diff --git a/arch/mips/mm/uasm-mips.c b/arch/mips/mm/uasm-mips.c
index 8e02291cfc0c..b4a837893562 100644
--- a/arch/mips/mm/uasm-mips.c
+++ b/arch/mips/mm/uasm-mips.c
@@ -38,13 +38,13 @@
38 | (e) << RE_SH \ 38 | (e) << RE_SH \
39 | (f) << FUNC_SH) 39 | (f) << FUNC_SH)
40 40
41/* Define these when we are not the ISA the kernel is being compiled with. */ 41/* This macro sets the non-variable bits of an R6 instruction. */
42#ifdef CONFIG_CPU_MICROMIPS 42#define M6(a, b, c, d, e) \
43#define CL_uasm_i_b(buf, off) ISAOPC(_beq)(buf, 0, 0, off) 43 ((a) << OP_SH \
44#define CL_uasm_i_beqz(buf, rs, off) ISAOPC(_beq)(buf, rs, 0, off) 44 | (b) << RS_SH \
45#define CL_uasm_i_beqzl(buf, rs, off) ISAOPC(_beql)(buf, rs, 0, off) 45 | (c) << RT_SH \
46#define CL_uasm_i_bnez(buf, rs, off) ISAOPC(_bne)(buf, rs, 0, off) 46 | (d) << SIMM9_SH \
47#endif 47 | (e) << FUNC_SH)
48 48
49#include "uasm.c" 49#include "uasm.c"
50 50
@@ -62,7 +62,11 @@ static struct insn insn_table[] = {
62 { insn_bltzl, M(bcond_op, 0, bltzl_op, 0, 0, 0), RS | BIMM }, 62 { insn_bltzl, M(bcond_op, 0, bltzl_op, 0, 0, 0), RS | BIMM },
63 { insn_bltz, M(bcond_op, 0, bltz_op, 0, 0, 0), RS | BIMM }, 63 { insn_bltz, M(bcond_op, 0, bltz_op, 0, 0, 0), RS | BIMM },
64 { insn_bne, M(bne_op, 0, 0, 0, 0, 0), RS | RT | BIMM }, 64 { insn_bne, M(bne_op, 0, 0, 0, 0, 0), RS | RT | BIMM },
65#ifndef CONFIG_CPU_MIPSR6
65 { insn_cache, M(cache_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 66 { insn_cache, M(cache_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
67#else
68 { insn_cache, M6(cache_op, 0, 0, 0, cache6_op), RS | RT | SIMM9 },
69#endif
66 { insn_daddiu, M(daddiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 70 { insn_daddiu, M(daddiu_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
67 { insn_daddu, M(spec_op, 0, 0, 0, 0, daddu_op), RS | RT | RD }, 71 { insn_daddu, M(spec_op, 0, 0, 0, 0, daddu_op), RS | RT | RD },
68 { insn_dinsm, M(spec3_op, 0, 0, 0, 0, dinsm_op), RS | RT | RD | RE }, 72 { insn_dinsm, M(spec3_op, 0, 0, 0, 0, dinsm_op), RS | RT | RD | RE },
@@ -85,13 +89,22 @@ static struct insn insn_table[] = {
85 { insn_jal, M(jal_op, 0, 0, 0, 0, 0), JIMM }, 89 { insn_jal, M(jal_op, 0, 0, 0, 0, 0), JIMM },
86 { insn_jalr, M(spec_op, 0, 0, 0, 0, jalr_op), RS | RD }, 90 { insn_jalr, M(spec_op, 0, 0, 0, 0, jalr_op), RS | RD },
87 { insn_j, M(j_op, 0, 0, 0, 0, 0), JIMM }, 91 { insn_j, M(j_op, 0, 0, 0, 0, 0), JIMM },
92#ifndef CONFIG_CPU_MIPSR6
88 { insn_jr, M(spec_op, 0, 0, 0, 0, jr_op), RS }, 93 { insn_jr, M(spec_op, 0, 0, 0, 0, jr_op), RS },
94#else
95 { insn_jr, M(spec_op, 0, 0, 0, 0, jalr_op), RS },
96#endif
89 { insn_lb, M(lb_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 97 { insn_lb, M(lb_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
90 { insn_ld, M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 98 { insn_ld, M(ld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
91 { insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD }, 99 { insn_ldx, M(spec3_op, 0, 0, 0, ldx_op, lx_op), RS | RT | RD },
92 { insn_lh, M(lh_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 100 { insn_lh, M(lh_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
101#ifndef CONFIG_CPU_MIPSR6
93 { insn_lld, M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 102 { insn_lld, M(lld_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
94 { insn_ll, M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 103 { insn_ll, M(ll_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
104#else
105 { insn_lld, M6(spec3_op, 0, 0, 0, lld6_op), RS | RT | SIMM9 },
106 { insn_ll, M6(spec3_op, 0, 0, 0, ll6_op), RS | RT | SIMM9 },
107#endif
95 { insn_lui, M(lui_op, 0, 0, 0, 0, 0), RT | SIMM }, 108 { insn_lui, M(lui_op, 0, 0, 0, 0, 0), RT | SIMM },
96 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 109 { insn_lw, M(lw_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
97 { insn_lwx, M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD }, 110 { insn_lwx, M(spec3_op, 0, 0, 0, lwx_op, lx_op), RS | RT | RD },
@@ -104,11 +117,20 @@ static struct insn insn_table[] = {
104 { insn_mul, M(spec2_op, 0, 0, 0, 0, mul_op), RS | RT | RD}, 117 { insn_mul, M(spec2_op, 0, 0, 0, 0, mul_op), RS | RT | RD},
105 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM }, 118 { insn_ori, M(ori_op, 0, 0, 0, 0, 0), RS | RT | UIMM },
106 { insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD }, 119 { insn_or, M(spec_op, 0, 0, 0, 0, or_op), RS | RT | RD },
120#ifndef CONFIG_CPU_MIPSR6
107 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 121 { insn_pref, M(pref_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
122#else
123 { insn_pref, M6(spec3_op, 0, 0, 0, pref6_op), RS | RT | SIMM9 },
124#endif
108 { insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 }, 125 { insn_rfe, M(cop0_op, cop_op, 0, 0, 0, rfe_op), 0 },
109 { insn_rotr, M(spec_op, 1, 0, 0, 0, srl_op), RT | RD | RE }, 126 { insn_rotr, M(spec_op, 1, 0, 0, 0, srl_op), RT | RD | RE },
127#ifndef CONFIG_CPU_MIPSR6
110 { insn_scd, M(scd_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 128 { insn_scd, M(scd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
111 { insn_sc, M(sc_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 129 { insn_sc, M(sc_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
130#else
131 { insn_scd, M6(spec3_op, 0, 0, 0, scd6_op), RS | RT | SIMM9 },
132 { insn_sc, M6(spec3_op, 0, 0, 0, sc6_op), RS | RT | SIMM9 },
133#endif
112 { insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM }, 134 { insn_sd, M(sd_op, 0, 0, 0, 0, 0), RS | RT | SIMM },
113 { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE }, 135 { insn_sll, M(spec_op, 0, 0, 0, 0, sll_op), RT | RD | RE },
114 { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD }, 136 { insn_sllv, M(spec_op, 0, 0, 0, 0, sllv_op), RS | RT | RD },
@@ -198,6 +220,8 @@ static void build_insn(u32 **buf, enum opcode opc, ...)
198 op |= build_set(va_arg(ap, u32)); 220 op |= build_set(va_arg(ap, u32));
199 if (ip->fields & SCIMM) 221 if (ip->fields & SCIMM)
200 op |= build_scimm(va_arg(ap, u32)); 222 op |= build_scimm(va_arg(ap, u32));
223 if (ip->fields & SIMM9)
224 op |= build_scimm9(va_arg(ap, u32));
201 va_end(ap); 225 va_end(ap);
202 226
203 **buf = op; 227 **buf = op;
diff --git a/arch/mips/mm/uasm.c b/arch/mips/mm/uasm.c
index 4adf30284813..319051c34343 100644
--- a/arch/mips/mm/uasm.c
+++ b/arch/mips/mm/uasm.c
@@ -24,7 +24,8 @@ enum fields {
24 JIMM = 0x080, 24 JIMM = 0x080,
25 FUNC = 0x100, 25 FUNC = 0x100,
26 SET = 0x200, 26 SET = 0x200,
27 SCIMM = 0x400 27 SCIMM = 0x400,
28 SIMM9 = 0x800,
28}; 29};
29 30
30#define OP_MASK 0x3f 31#define OP_MASK 0x3f
@@ -41,6 +42,8 @@ enum fields {
41#define FUNC_SH 0 42#define FUNC_SH 0
42#define SET_MASK 0x7 43#define SET_MASK 0x7
43#define SET_SH 0 44#define SET_SH 0
45#define SIMM9_SH 7
46#define SIMM9_MASK 0x1ff
44 47
45enum opcode { 48enum opcode {
46 insn_invalid, 49 insn_invalid,
@@ -116,6 +119,14 @@ static inline u32 build_scimm(u32 arg)
116 return (arg & SCIMM_MASK) << SCIMM_SH; 119 return (arg & SCIMM_MASK) << SCIMM_SH;
117} 120}
118 121
122static inline u32 build_scimm9(s32 arg)
123{
124 WARN((arg > 0xff || arg < -0x100),
125 KERN_WARNING "Micro-assembler field overflow\n");
126
127 return (arg & SIMM9_MASK) << SIMM9_SH;
128}
129
119static inline u32 build_func(u32 arg) 130static inline u32 build_func(u32 arg)
120{ 131{
121 WARN(arg & ~FUNC_MASK, KERN_WARNING "Micro-assembler field overflow\n"); 132 WARN(arg & ~FUNC_MASK, KERN_WARNING "Micro-assembler field overflow\n");
@@ -330,7 +341,7 @@ I_u3u1u2(_ldx)
330void ISAFUNC(uasm_i_pref)(u32 **buf, unsigned int a, signed int b, 341void ISAFUNC(uasm_i_pref)(u32 **buf, unsigned int a, signed int b,
331 unsigned int c) 342 unsigned int c)
332{ 343{
333 if (OCTEON_IS_MODEL(OCTEON_CN63XX_PASS1_X) && a <= 24 && a != 5) 344 if (CAVIUM_OCTEON_DCACHE_PREFETCH_WAR && a <= 24 && a != 5)
334 /* 345 /*
335 * As per erratum Core-14449, replace prefetches 0-4, 346 * As per erratum Core-14449, replace prefetches 0-4,
336 * 6-24 with 'pref 28'. 347 * 6-24 with 'pref 28'.
diff --git a/arch/mips/mti-sead3/sead3-time.c b/arch/mips/mti-sead3/sead3-time.c
index ec1dd2491f96..e1d69895fb1d 100644
--- a/arch/mips/mti-sead3/sead3-time.c
+++ b/arch/mips/mti-sead3/sead3-time.c
@@ -72,7 +72,7 @@ void read_persistent_clock(struct timespec *ts)
72int get_c0_perfcount_int(void) 72int get_c0_perfcount_int(void)
73{ 73{
74 if (gic_present) 74 if (gic_present)
75 return gic_get_c0_compare_int(); 75 return gic_get_c0_perfcount_int();
76 if (cp0_perfcount_irq >= 0) 76 if (cp0_perfcount_irq >= 0)
77 return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq; 77 return MIPS_CPU_IRQ_BASE + cp0_perfcount_irq;
78 return -1; 78 return -1;
diff --git a/arch/mips/pci/pci-bcm1480.c b/arch/mips/pci/pci-bcm1480.c
index f2355e3e65a1..f97e169393bc 100644
--- a/arch/mips/pci/pci-bcm1480.c
+++ b/arch/mips/pci/pci-bcm1480.c
@@ -173,8 +173,8 @@ static int bcm1480_pcibios_write(struct pci_bus *bus, unsigned int devfn,
173} 173}
174 174
175struct pci_ops bcm1480_pci_ops = { 175struct pci_ops bcm1480_pci_ops = {
176 .read = bcm1480_pcibios_read, 176 .read = bcm1480_pcibios_read,
177 .write = bcm1480_pcibios_write, 177 .write = bcm1480_pcibios_write,
178}; 178};
179 179
180static struct resource bcm1480_mem_resource = { 180static struct resource bcm1480_mem_resource = {
diff --git a/arch/mips/pci/pci-octeon.c b/arch/mips/pci/pci-octeon.c
index bedb72bd3a27..a04af55d89f1 100644
--- a/arch/mips/pci/pci-octeon.c
+++ b/arch/mips/pci/pci-octeon.c
@@ -327,8 +327,8 @@ static int octeon_write_config(struct pci_bus *bus, unsigned int devfn,
327 327
328 328
329static struct pci_ops octeon_pci_ops = { 329static struct pci_ops octeon_pci_ops = {
330 .read = octeon_read_config, 330 .read = octeon_read_config,
331 .write = octeon_write_config, 331 .write = octeon_write_config,
332}; 332};
333 333
334static struct resource octeon_pci_mem_resource = { 334static struct resource octeon_pci_mem_resource = {
diff --git a/arch/mips/pci/pcie-octeon.c b/arch/mips/pci/pcie-octeon.c
index eb4a17ba4a53..1bb0b2bf8d6e 100644
--- a/arch/mips/pci/pcie-octeon.c
+++ b/arch/mips/pci/pcie-octeon.c
@@ -1792,8 +1792,8 @@ static int octeon_dummy_write_config(struct pci_bus *bus, unsigned int devfn,
1792} 1792}
1793 1793
1794static struct pci_ops octeon_pcie0_ops = { 1794static struct pci_ops octeon_pcie0_ops = {
1795 .read = octeon_pcie0_read_config, 1795 .read = octeon_pcie0_read_config,
1796 .write = octeon_pcie0_write_config, 1796 .write = octeon_pcie0_write_config,
1797}; 1797};
1798 1798
1799static struct resource octeon_pcie0_mem_resource = { 1799static struct resource octeon_pcie0_mem_resource = {
@@ -1813,8 +1813,8 @@ static struct pci_controller octeon_pcie0_controller = {
1813}; 1813};
1814 1814
1815static struct pci_ops octeon_pcie1_ops = { 1815static struct pci_ops octeon_pcie1_ops = {
1816 .read = octeon_pcie1_read_config, 1816 .read = octeon_pcie1_read_config,
1817 .write = octeon_pcie1_write_config, 1817 .write = octeon_pcie1_write_config,
1818}; 1818};
1819 1819
1820static struct resource octeon_pcie1_mem_resource = { 1820static struct resource octeon_pcie1_mem_resource = {
@@ -1834,8 +1834,8 @@ static struct pci_controller octeon_pcie1_controller = {
1834}; 1834};
1835 1835
1836static struct pci_ops octeon_dummy_ops = { 1836static struct pci_ops octeon_dummy_ops = {
1837 .read = octeon_dummy_read_config, 1837 .read = octeon_dummy_read_config,
1838 .write = octeon_dummy_write_config, 1838 .write = octeon_dummy_write_config,
1839}; 1839};
1840 1840
1841static struct resource octeon_dummy_mem_resource = { 1841static struct resource octeon_dummy_mem_resource = {
diff --git a/arch/mips/sgi-ip22/ip22-gio.c b/arch/mips/sgi-ip22/ip22-gio.c
index 8f1b86d4da84..cdf187600010 100644
--- a/arch/mips/sgi-ip22/ip22-gio.c
+++ b/arch/mips/sgi-ip22/ip22-gio.c
@@ -152,28 +152,6 @@ static int gio_device_remove(struct device *dev)
152 return 0; 152 return 0;
153} 153}
154 154
155static int gio_device_suspend(struct device *dev, pm_message_t state)
156{
157 struct gio_device *gio_dev = to_gio_device(dev);
158 struct gio_driver *drv = to_gio_driver(dev->driver);
159 int error = 0;
160
161 if (dev->driver && drv->suspend)
162 error = drv->suspend(gio_dev, state);
163 return error;
164}
165
166static int gio_device_resume(struct device *dev)
167{
168 struct gio_device *gio_dev = to_gio_device(dev);
169 struct gio_driver *drv = to_gio_driver(dev->driver);
170 int error = 0;
171
172 if (dev->driver && drv->resume)
173 error = drv->resume(gio_dev);
174 return error;
175}
176
177static void gio_device_shutdown(struct device *dev) 155static void gio_device_shutdown(struct device *dev)
178{ 156{
179 struct gio_device *gio_dev = to_gio_device(dev); 157 struct gio_device *gio_dev = to_gio_device(dev);
@@ -400,8 +378,6 @@ static struct bus_type gio_bus_type = {
400 .match = gio_bus_match, 378 .match = gio_bus_match,
401 .probe = gio_device_probe, 379 .probe = gio_device_probe,
402 .remove = gio_device_remove, 380 .remove = gio_device_remove,
403 .suspend = gio_device_suspend,
404 .resume = gio_device_resume,
405 .shutdown = gio_device_shutdown, 381 .shutdown = gio_device_shutdown,
406 .uevent = gio_device_uevent, 382 .uevent = gio_device_uevent,
407}; 383};
diff --git a/arch/mips/sgi-ip27/ip27-reset.c b/arch/mips/sgi-ip27/ip27-reset.c
index ac37e54b3d5e..e44a15d4f573 100644
--- a/arch/mips/sgi-ip27/ip27-reset.c
+++ b/arch/mips/sgi-ip27/ip27-reset.c
@@ -8,6 +8,7 @@
8 * Copyright (C) 1997, 1998, 1999, 2000, 06 by Ralf Baechle 8 * Copyright (C) 1997, 1998, 1999, 2000, 06 by Ralf Baechle
9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc. 9 * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
10 */ 10 */
11#include <linux/compiler.h>
11#include <linux/kernel.h> 12#include <linux/kernel.h>
12#include <linux/sched.h> 13#include <linux/sched.h>
13#include <linux/timer.h> 14#include <linux/timer.h>
@@ -25,9 +26,9 @@
25#include <asm/sn/gda.h> 26#include <asm/sn/gda.h>
26#include <asm/sn/sn0/hub.h> 27#include <asm/sn/sn0/hub.h>
27 28
28void machine_restart(char *command) __attribute__((noreturn)); 29void machine_restart(char *command) __noreturn;
29void machine_halt(void) __attribute__((noreturn)); 30void machine_halt(void) __noreturn;
30void machine_power_off(void) __attribute__((noreturn)); 31void machine_power_off(void) __noreturn;
31 32
32#define noreturn while(1); /* Silence gcc. */ 33#define noreturn while(1); /* Silence gcc. */
33 34
diff --git a/arch/mips/sgi-ip32/ip32-reset.c b/arch/mips/sgi-ip32/ip32-reset.c
index 1f823da4c77b..44b3470a0bbb 100644
--- a/arch/mips/sgi-ip32/ip32-reset.c
+++ b/arch/mips/sgi-ip32/ip32-reset.c
@@ -8,6 +8,7 @@
8 * Copyright (C) 2003 Guido Guenther <agx@sigxcpu.org> 8 * Copyright (C) 2003 Guido Guenther <agx@sigxcpu.org>
9 */ 9 */
10 10
11#include <linux/compiler.h>
11#include <linux/init.h> 12#include <linux/init.h>
12#include <linux/kernel.h> 13#include <linux/kernel.h>
13#include <linux/sched.h> 14#include <linux/sched.h>
@@ -35,9 +36,9 @@
35static struct timer_list power_timer, blink_timer, debounce_timer; 36static struct timer_list power_timer, blink_timer, debounce_timer;
36static int has_panicked, shuting_down; 37static int has_panicked, shuting_down;
37 38
38static void ip32_machine_restart(char *command) __attribute__((noreturn)); 39static void ip32_machine_restart(char *command) __noreturn;
39static void ip32_machine_halt(void) __attribute__((noreturn)); 40static void ip32_machine_halt(void) __noreturn;
40static void ip32_machine_power_off(void) __attribute__((noreturn)); 41static void ip32_machine_power_off(void) __noreturn;
41 42
42static void ip32_machine_restart(char *cmd) 43static void ip32_machine_restart(char *cmd)
43{ 44{
diff --git a/arch/mn10300/include/asm/pgtable.h b/arch/mn10300/include/asm/pgtable.h
index afab728ab65e..96d3f9deb59c 100644
--- a/arch/mn10300/include/asm/pgtable.h
+++ b/arch/mn10300/include/asm/pgtable.h
@@ -56,7 +56,9 @@ extern void paging_init(void);
56#define PGDIR_SHIFT 22 56#define PGDIR_SHIFT 22
57#define PTRS_PER_PGD 1024 57#define PTRS_PER_PGD 1024
58#define PTRS_PER_PUD 1 /* we don't really have any PUD physically */ 58#define PTRS_PER_PUD 1 /* we don't really have any PUD physically */
59#define __PAGETABLE_PUD_FOLDED
59#define PTRS_PER_PMD 1 /* we don't really have any PMD physically */ 60#define PTRS_PER_PMD 1 /* we don't really have any PMD physically */
61#define __PAGETABLE_PMD_FOLDED
60#define PTRS_PER_PTE 1024 62#define PTRS_PER_PTE 1024
61 63
62#define PGD_SIZE PAGE_SIZE 64#define PGD_SIZE PAGE_SIZE
diff --git a/arch/nios2/include/asm/ptrace.h b/arch/nios2/include/asm/ptrace.h
index 20fb1cf2dab6..642462144872 100644
--- a/arch/nios2/include/asm/ptrace.h
+++ b/arch/nios2/include/asm/ptrace.h
@@ -15,7 +15,54 @@
15 15
16#include <uapi/asm/ptrace.h> 16#include <uapi/asm/ptrace.h>
17 17
18/* This struct defines the way the registers are stored on the
19 stack during a system call. */
20
18#ifndef __ASSEMBLY__ 21#ifndef __ASSEMBLY__
22struct pt_regs {
23 unsigned long r8; /* r8-r15 Caller-saved GP registers */
24 unsigned long r9;
25 unsigned long r10;
26 unsigned long r11;
27 unsigned long r12;
28 unsigned long r13;
29 unsigned long r14;
30 unsigned long r15;
31 unsigned long r1; /* Assembler temporary */
32 unsigned long r2; /* Retval LS 32bits */
33 unsigned long r3; /* Retval MS 32bits */
34 unsigned long r4; /* r4-r7 Register arguments */
35 unsigned long r5;
36 unsigned long r6;
37 unsigned long r7;
38 unsigned long orig_r2; /* Copy of r2 ?? */
39 unsigned long ra; /* Return address */
40 unsigned long fp; /* Frame pointer */
41 unsigned long sp; /* Stack pointer */
42 unsigned long gp; /* Global pointer */
43 unsigned long estatus;
44 unsigned long ea; /* Exception return address (pc) */
45 unsigned long orig_r7;
46};
47
48/*
49 * This is the extended stack used by signal handlers and the context
50 * switcher: it's pushed after the normal "struct pt_regs".
51 */
52struct switch_stack {
53 unsigned long r16; /* r16-r23 Callee-saved GP registers */
54 unsigned long r17;
55 unsigned long r18;
56 unsigned long r19;
57 unsigned long r20;
58 unsigned long r21;
59 unsigned long r22;
60 unsigned long r23;
61 unsigned long fp;
62 unsigned long gp;
63 unsigned long ra;
64};
65
19#define user_mode(regs) (((regs)->estatus & ESTATUS_EU)) 66#define user_mode(regs) (((regs)->estatus & ESTATUS_EU))
20 67
21#define instruction_pointer(regs) ((regs)->ra) 68#define instruction_pointer(regs) ((regs)->ra)
diff --git a/arch/nios2/include/asm/ucontext.h b/arch/nios2/include/asm/ucontext.h
deleted file mode 100644
index 2c87614b0f6e..000000000000
--- a/arch/nios2/include/asm/ucontext.h
+++ /dev/null
@@ -1,32 +0,0 @@
1/*
2 * Copyright (C) 2010 Tobias Klauser <tklauser@distanz.ch>
3 * Copyright (C) 2004 Microtronix Datacom Ltd
4 *
5 * This file is subject to the terms and conditions of the GNU General Public
6 * License. See the file "COPYING" in the main directory of this archive
7 * for more details.
8 */
9
10#ifndef _ASM_NIOS2_UCONTEXT_H
11#define _ASM_NIOS2_UCONTEXT_H
12
13typedef int greg_t;
14#define NGREG 32
15typedef greg_t gregset_t[NGREG];
16
17struct mcontext {
18 int version;
19 gregset_t gregs;
20};
21
22#define MCONTEXT_VERSION 2
23
24struct ucontext {
25 unsigned long uc_flags;
26 struct ucontext *uc_link;
27 stack_t uc_stack;
28 struct mcontext uc_mcontext;
29 sigset_t uc_sigmask; /* mask last for extensibility */
30};
31
32#endif
diff --git a/arch/nios2/include/uapi/asm/Kbuild b/arch/nios2/include/uapi/asm/Kbuild
index 4f07ca3f8d10..e0bb972a50d7 100644
--- a/arch/nios2/include/uapi/asm/Kbuild
+++ b/arch/nios2/include/uapi/asm/Kbuild
@@ -1,4 +1,5 @@
1include include/uapi/asm-generic/Kbuild.asm 1include include/uapi/asm-generic/Kbuild.asm
2 2
3header-y += elf.h 3header-y += elf.h
4header-y += ucontext.h 4
5generic-y += ucontext.h
diff --git a/arch/nios2/include/uapi/asm/elf.h b/arch/nios2/include/uapi/asm/elf.h
index a5b91ae5cf56..6f06d3b2949e 100644
--- a/arch/nios2/include/uapi/asm/elf.h
+++ b/arch/nios2/include/uapi/asm/elf.h
@@ -50,9 +50,7 @@
50 50
51typedef unsigned long elf_greg_t; 51typedef unsigned long elf_greg_t;
52 52
53#define ELF_NGREG \ 53#define ELF_NGREG 49
54 ((sizeof(struct pt_regs) + sizeof(struct switch_stack)) / \
55 sizeof(elf_greg_t))
56typedef elf_greg_t elf_gregset_t[ELF_NGREG]; 54typedef elf_greg_t elf_gregset_t[ELF_NGREG];
57 55
58typedef unsigned long elf_fpregset_t; 56typedef unsigned long elf_fpregset_t;
diff --git a/arch/nios2/include/uapi/asm/ptrace.h b/arch/nios2/include/uapi/asm/ptrace.h
index e83a7c9d1c36..71a330597adf 100644
--- a/arch/nios2/include/uapi/asm/ptrace.h
+++ b/arch/nios2/include/uapi/asm/ptrace.h
@@ -67,53 +67,9 @@
67 67
68#define NUM_PTRACE_REG (PTR_TLBMISC + 1) 68#define NUM_PTRACE_REG (PTR_TLBMISC + 1)
69 69
70/* this struct defines the way the registers are stored on the 70/* User structures for general purpose registers. */
71 stack during a system call. 71struct user_pt_regs {
72 72 __u32 regs[49];
73 There is a fake_regs in setup.c that has to match pt_regs.*/
74
75struct pt_regs {
76 unsigned long r8; /* r8-r15 Caller-saved GP registers */
77 unsigned long r9;
78 unsigned long r10;
79 unsigned long r11;
80 unsigned long r12;
81 unsigned long r13;
82 unsigned long r14;
83 unsigned long r15;
84 unsigned long r1; /* Assembler temporary */
85 unsigned long r2; /* Retval LS 32bits */
86 unsigned long r3; /* Retval MS 32bits */
87 unsigned long r4; /* r4-r7 Register arguments */
88 unsigned long r5;
89 unsigned long r6;
90 unsigned long r7;
91 unsigned long orig_r2; /* Copy of r2 ?? */
92 unsigned long ra; /* Return address */
93 unsigned long fp; /* Frame pointer */
94 unsigned long sp; /* Stack pointer */
95 unsigned long gp; /* Global pointer */
96 unsigned long estatus;
97 unsigned long ea; /* Exception return address (pc) */
98 unsigned long orig_r7;
99};
100
101/*
102 * This is the extended stack used by signal handlers and the context
103 * switcher: it's pushed after the normal "struct pt_regs".
104 */
105struct switch_stack {
106 unsigned long r16; /* r16-r23 Callee-saved GP registers */
107 unsigned long r17;
108 unsigned long r18;
109 unsigned long r19;
110 unsigned long r20;
111 unsigned long r21;
112 unsigned long r22;
113 unsigned long r23;
114 unsigned long fp;
115 unsigned long gp;
116 unsigned long ra;
117}; 73};
118 74
119#endif /* __ASSEMBLY__ */ 75#endif /* __ASSEMBLY__ */
diff --git a/arch/nios2/include/uapi/asm/sigcontext.h b/arch/nios2/include/uapi/asm/sigcontext.h
index 7b8bb41867d4..b67944a50927 100644
--- a/arch/nios2/include/uapi/asm/sigcontext.h
+++ b/arch/nios2/include/uapi/asm/sigcontext.h
@@ -15,14 +15,16 @@
15 * details. 15 * details.
16 */ 16 */
17 17
18#ifndef _ASM_NIOS2_SIGCONTEXT_H 18#ifndef _UAPI__ASM_SIGCONTEXT_H
19#define _ASM_NIOS2_SIGCONTEXT_H 19#define _UAPI__ASM_SIGCONTEXT_H
20 20
21#include <asm/ptrace.h> 21#include <linux/types.h>
22
23#define MCONTEXT_VERSION 2
22 24
23struct sigcontext { 25struct sigcontext {
24 struct pt_regs regs; 26 int version;
25 unsigned long sc_mask; /* old sigmask */ 27 unsigned long gregs[32];
26}; 28};
27 29
28#endif 30#endif
diff --git a/arch/nios2/kernel/signal.c b/arch/nios2/kernel/signal.c
index 2d0ea25be171..dda41e4fe707 100644
--- a/arch/nios2/kernel/signal.c
+++ b/arch/nios2/kernel/signal.c
@@ -39,7 +39,7 @@ static inline int rt_restore_ucontext(struct pt_regs *regs,
39 struct ucontext *uc, int *pr2) 39 struct ucontext *uc, int *pr2)
40{ 40{
41 int temp; 41 int temp;
42 greg_t *gregs = uc->uc_mcontext.gregs; 42 unsigned long *gregs = uc->uc_mcontext.gregs;
43 int err; 43 int err;
44 44
45 /* Always make any pending restarted system calls return -EINTR */ 45 /* Always make any pending restarted system calls return -EINTR */
@@ -127,7 +127,7 @@ badframe:
127static inline int rt_setup_ucontext(struct ucontext *uc, struct pt_regs *regs) 127static inline int rt_setup_ucontext(struct ucontext *uc, struct pt_regs *regs)
128{ 128{
129 struct switch_stack *sw = (struct switch_stack *)regs - 1; 129 struct switch_stack *sw = (struct switch_stack *)regs - 1;
130 greg_t *gregs = uc->uc_mcontext.gregs; 130 unsigned long *gregs = uc->uc_mcontext.gregs;
131 int err = 0; 131 int err = 0;
132 132
133 err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version); 133 err |= __put_user(MCONTEXT_VERSION, &uc->uc_mcontext.version);
diff --git a/arch/nios2/mm/fault.c b/arch/nios2/mm/fault.c
index 0d231adfe576..0c9b6afe69e9 100644
--- a/arch/nios2/mm/fault.c
+++ b/arch/nios2/mm/fault.c
@@ -126,7 +126,6 @@ good_area:
126 break; 126 break;
127 } 127 }
128 128
129survive:
130 /* 129 /*
131 * If for any reason at all we couldn't handle the fault, 130 * If for any reason at all we couldn't handle the fault,
132 * make sure we exit gracefully rather than endlessly redo 131 * make sure we exit gracefully rather than endlessly redo
@@ -220,11 +219,6 @@ no_context:
220 */ 219 */
221out_of_memory: 220out_of_memory:
222 up_read(&mm->mmap_sem); 221 up_read(&mm->mmap_sem);
223 if (is_global_init(tsk)) {
224 yield();
225 down_read(&mm->mmap_sem);
226 goto survive;
227 }
228 if (!user_mode(regs)) 222 if (!user_mode(regs))
229 goto no_context; 223 goto no_context;
230 pagefault_out_of_memory(); 224 pagefault_out_of_memory();
diff --git a/arch/parisc/include/asm/pgtable.h b/arch/parisc/include/asm/pgtable.h
index 8c966b2270aa..15207b9362bf 100644
--- a/arch/parisc/include/asm/pgtable.h
+++ b/arch/parisc/include/asm/pgtable.h
@@ -96,6 +96,7 @@ extern void purge_tlb_entries(struct mm_struct *, unsigned long);
96#if PT_NLEVELS == 3 96#if PT_NLEVELS == 3
97#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY) 97#define BITS_PER_PMD (PAGE_SHIFT + PMD_ORDER - BITS_PER_PMD_ENTRY)
98#else 98#else
99#define __PAGETABLE_PMD_FOLDED
99#define BITS_PER_PMD 0 100#define BITS_PER_PMD 0
100#endif 101#endif
101#define PTRS_PER_PMD (1UL << BITS_PER_PMD) 102#define PTRS_PER_PMD (1UL << BITS_PER_PMD)
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index 51866f170684..ca7957b09a3c 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -142,6 +142,7 @@ CONFIG_VIRT_DRIVERS=y
142CONFIG_FSL_HV_MANAGER=y 142CONFIG_FSL_HV_MANAGER=y
143CONFIG_STAGING=y 143CONFIG_STAGING=y
144CONFIG_FSL_CORENET_CF=y 144CONFIG_FSL_CORENET_CF=y
145CONFIG_CLK_QORIQ=y
145CONFIG_EXT2_FS=y 146CONFIG_EXT2_FS=y
146CONFIG_EXT3_FS=y 147CONFIG_EXT3_FS=y
147# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set 148# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index d6c0c8198952..04737aaa8b6b 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -122,6 +122,7 @@ CONFIG_DMADEVICES=y
122CONFIG_FSL_DMA=y 122CONFIG_FSL_DMA=y
123CONFIG_VIRT_DRIVERS=y 123CONFIG_VIRT_DRIVERS=y
124CONFIG_FSL_HV_MANAGER=y 124CONFIG_FSL_HV_MANAGER=y
125CONFIG_CLK_QORIQ=y
125CONFIG_FSL_CORENET_CF=y 126CONFIG_FSL_CORENET_CF=y
126CONFIG_EXT2_FS=y 127CONFIG_EXT2_FS=y
127CONFIG_EXT3_FS=y 128CONFIG_EXT3_FS=y
diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index 9cfa3706a1b8..f1ea5972f6ec 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -113,6 +113,7 @@ extern void iommu_register_group(struct iommu_table *tbl,
113 int pci_domain_number, unsigned long pe_num); 113 int pci_domain_number, unsigned long pe_num);
114extern int iommu_add_device(struct device *dev); 114extern int iommu_add_device(struct device *dev);
115extern void iommu_del_device(struct device *dev); 115extern void iommu_del_device(struct device *dev);
116extern int __init tce_iommu_bus_notifier_init(void);
116#else 117#else
117static inline void iommu_register_group(struct iommu_table *tbl, 118static inline void iommu_register_group(struct iommu_table *tbl,
118 int pci_domain_number, 119 int pci_domain_number,
@@ -128,6 +129,11 @@ static inline int iommu_add_device(struct device *dev)
128static inline void iommu_del_device(struct device *dev) 129static inline void iommu_del_device(struct device *dev)
129{ 130{
130} 131}
132
133static inline int __init tce_iommu_bus_notifier_init(void)
134{
135 return 0;
136}
131#endif /* !CONFIG_IOMMU_API */ 137#endif /* !CONFIG_IOMMU_API */
132 138
133static inline void set_iommu_table_base_and_group(struct device *dev, 139static inline void set_iommu_table_base_and_group(struct device *dev,
diff --git a/arch/powerpc/include/asm/irq_work.h b/arch/powerpc/include/asm/irq_work.h
new file mode 100644
index 000000000000..744fd54de374
--- /dev/null
+++ b/arch/powerpc/include/asm/irq_work.h
@@ -0,0 +1,9 @@
1#ifndef _ASM_POWERPC_IRQ_WORK_H
2#define _ASM_POWERPC_IRQ_WORK_H
3
4static inline bool arch_irq_work_has_interrupt(void)
5{
6 return true;
7}
8
9#endif /* _ASM_POWERPC_IRQ_WORK_H */
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index 5d3968c4d799..b054f33ab1fb 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -1175,4 +1175,30 @@ void iommu_del_device(struct device *dev)
1175} 1175}
1176EXPORT_SYMBOL_GPL(iommu_del_device); 1176EXPORT_SYMBOL_GPL(iommu_del_device);
1177 1177
1178static int tce_iommu_bus_notifier(struct notifier_block *nb,
1179 unsigned long action, void *data)
1180{
1181 struct device *dev = data;
1182
1183 switch (action) {
1184 case BUS_NOTIFY_ADD_DEVICE:
1185 return iommu_add_device(dev);
1186 case BUS_NOTIFY_DEL_DEVICE:
1187 if (dev->iommu_group)
1188 iommu_del_device(dev);
1189 return 0;
1190 default:
1191 return 0;
1192 }
1193}
1194
1195static struct notifier_block tce_iommu_bus_nb = {
1196 .notifier_call = tce_iommu_bus_notifier,
1197};
1198
1199int __init tce_iommu_bus_notifier_init(void)
1200{
1201 bus_register_notifier(&pci_bus_type, &tce_iommu_bus_nb);
1202 return 0;
1203}
1178#endif /* CONFIG_IOMMU_API */ 1204#endif /* CONFIG_IOMMU_API */
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 6e19afa35a15..ec9ec2058d2d 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -541,8 +541,8 @@ int __cpu_up(unsigned int cpu, struct task_struct *tidle)
541 if (smp_ops->give_timebase) 541 if (smp_ops->give_timebase)
542 smp_ops->give_timebase(); 542 smp_ops->give_timebase();
543 543
544 /* Wait until cpu puts itself in the online map */ 544 /* Wait until cpu puts itself in the online & active maps */
545 while (!cpu_online(cpu)) 545 while (!cpu_online(cpu) || !cpu_active(cpu))
546 cpu_relax(); 546 cpu_relax();
547 547
548 return 0; 548 return 0;
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 7316dd15278a..2d7b33fab953 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -54,6 +54,7 @@
54#include <linux/irq.h> 54#include <linux/irq.h>
55#include <linux/delay.h> 55#include <linux/delay.h>
56#include <linux/irq_work.h> 56#include <linux/irq_work.h>
57#include <linux/clk-provider.h>
57#include <asm/trace.h> 58#include <asm/trace.h>
58 59
59#include <asm/io.h> 60#include <asm/io.h>
@@ -975,6 +976,10 @@ void __init time_init(void)
975 976
976 init_decrementer_clockevent(); 977 init_decrementer_clockevent();
977 tick_setup_hrtimer_broadcast(); 978 tick_setup_hrtimer_broadcast();
979
980#ifdef CONFIG_COMMON_CLK
981 of_clk_init(NULL);
982#endif
978} 983}
979 984
980 985
diff --git a/arch/powerpc/platforms/512x/clock-commonclk.c b/arch/powerpc/platforms/512x/clock-commonclk.c
index 6eb614a271fb..f691bcabd710 100644
--- a/arch/powerpc/platforms/512x/clock-commonclk.c
+++ b/arch/powerpc/platforms/512x/clock-commonclk.c
@@ -1168,6 +1168,11 @@ static void mpc5121_clk_provide_backwards_compat(void)
1168 } 1168 }
1169} 1169}
1170 1170
1171/*
1172 * The "fixed-clock" nodes (which includes the oscillator node if the board's
1173 * DT provides one) has already been scanned by the of_clk_init() in
1174 * time_init().
1175 */
1171int __init mpc5121_clk_init(void) 1176int __init mpc5121_clk_init(void)
1172{ 1177{
1173 struct device_node *clk_np; 1178 struct device_node *clk_np;
@@ -1187,12 +1192,6 @@ int __init mpc5121_clk_init(void)
1187 mpc512x_clk_preset_data(); 1192 mpc512x_clk_preset_data();
1188 1193
1189 /* 1194 /*
1190 * have the device tree scanned for "fixed-clock" nodes (which
1191 * includes the oscillator node if the board's DT provides one)
1192 */
1193 of_clk_init(NULL);
1194
1195 /*
1196 * add a dummy clock for those situations where a clock spec is 1195 * add a dummy clock for those situations where a clock spec is
1197 * required yet no real clock is involved 1196 * required yet no real clock is involved
1198 */ 1197 */
diff --git a/arch/powerpc/platforms/powernv/pci.c b/arch/powerpc/platforms/powernv/pci.c
index e69142f4af08..54323d6b5166 100644
--- a/arch/powerpc/platforms/powernv/pci.c
+++ b/arch/powerpc/platforms/powernv/pci.c
@@ -836,30 +836,4 @@ void __init pnv_pci_init(void)
836#endif 836#endif
837} 837}
838 838
839static int tce_iommu_bus_notifier(struct notifier_block *nb,
840 unsigned long action, void *data)
841{
842 struct device *dev = data;
843
844 switch (action) {
845 case BUS_NOTIFY_ADD_DEVICE:
846 return iommu_add_device(dev);
847 case BUS_NOTIFY_DEL_DEVICE:
848 if (dev->iommu_group)
849 iommu_del_device(dev);
850 return 0;
851 default:
852 return 0;
853 }
854}
855
856static struct notifier_block tce_iommu_bus_nb = {
857 .notifier_call = tce_iommu_bus_notifier,
858};
859
860static int __init tce_iommu_bus_notifier_init(void)
861{
862 bus_register_notifier(&pci_bus_type, &tce_iommu_bus_nb);
863 return 0;
864}
865machine_subsys_initcall_sync(powernv, tce_iommu_bus_notifier_init); 839machine_subsys_initcall_sync(powernv, tce_iommu_bus_notifier_init);
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 1d3d52dc3ff3..7803a19adb31 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -1340,3 +1340,5 @@ static int __init disable_multitce(char *str)
1340} 1340}
1341 1341
1342__setup("multitce=", disable_multitce); 1342__setup("multitce=", disable_multitce);
1343
1344machine_subsys_initcall_sync(pseries, tce_iommu_bus_notifier_init);
diff --git a/arch/s390/hypfs/inode.c b/arch/s390/hypfs/inode.c
index 4c8008dd938e..99824ff8dd35 100644
--- a/arch/s390/hypfs/inode.c
+++ b/arch/s390/hypfs/inode.c
@@ -74,7 +74,7 @@ static void hypfs_remove(struct dentry *dentry)
74 parent = dentry->d_parent; 74 parent = dentry->d_parent;
75 mutex_lock(&parent->d_inode->i_mutex); 75 mutex_lock(&parent->d_inode->i_mutex);
76 if (hypfs_positive(dentry)) { 76 if (hypfs_positive(dentry)) {
77 if (S_ISDIR(dentry->d_inode->i_mode)) 77 if (d_is_dir(dentry))
78 simple_rmdir(parent->d_inode, dentry); 78 simple_rmdir(parent->d_inode, dentry);
79 else 79 else
80 simple_unlink(parent->d_inode, dentry); 80 simple_unlink(parent->d_inode, dentry);
@@ -144,36 +144,32 @@ static int hypfs_open(struct inode *inode, struct file *filp)
144 return nonseekable_open(inode, filp); 144 return nonseekable_open(inode, filp);
145} 145}
146 146
147static ssize_t hypfs_aio_read(struct kiocb *iocb, const struct iovec *iov, 147static ssize_t hypfs_read_iter(struct kiocb *iocb, struct iov_iter *to)
148 unsigned long nr_segs, loff_t offset)
149{ 148{
150 char *data; 149 struct file *file = iocb->ki_filp;
151 ssize_t ret; 150 char *data = file->private_data;
152 struct file *filp = iocb->ki_filp; 151 size_t available = strlen(data);
153 /* XXX: temporary */ 152 loff_t pos = iocb->ki_pos;
154 char __user *buf = iov[0].iov_base; 153 size_t count;
155 size_t count = iov[0].iov_len;
156
157 if (nr_segs != 1)
158 return -EINVAL;
159
160 data = filp->private_data;
161 ret = simple_read_from_buffer(buf, count, &offset, data, strlen(data));
162 if (ret <= 0)
163 return ret;
164 154
165 iocb->ki_pos += ret; 155 if (pos < 0)
166 file_accessed(filp); 156 return -EINVAL;
167 157 if (pos >= available || !iov_iter_count(to))
168 return ret; 158 return 0;
159 count = copy_to_iter(data + pos, available - pos, to);
160 if (!count)
161 return -EFAULT;
162 iocb->ki_pos = pos + count;
163 file_accessed(file);
164 return count;
169} 165}
170static ssize_t hypfs_aio_write(struct kiocb *iocb, const struct iovec *iov, 166
171 unsigned long nr_segs, loff_t offset) 167static ssize_t hypfs_write_iter(struct kiocb *iocb, struct iov_iter *from)
172{ 168{
173 int rc; 169 int rc;
174 struct super_block *sb = file_inode(iocb->ki_filp)->i_sb; 170 struct super_block *sb = file_inode(iocb->ki_filp)->i_sb;
175 struct hypfs_sb_info *fs_info = sb->s_fs_info; 171 struct hypfs_sb_info *fs_info = sb->s_fs_info;
176 size_t count = iov_length(iov, nr_segs); 172 size_t count = iov_iter_count(from);
177 173
178 /* 174 /*
179 * Currently we only allow one update per second for two reasons: 175 * Currently we only allow one update per second for two reasons:
@@ -202,6 +198,7 @@ static ssize_t hypfs_aio_write(struct kiocb *iocb, const struct iovec *iov,
202 } 198 }
203 hypfs_update_update(sb); 199 hypfs_update_update(sb);
204 rc = count; 200 rc = count;
201 iov_iter_advance(from, count);
205out: 202out:
206 mutex_unlock(&fs_info->lock); 203 mutex_unlock(&fs_info->lock);
207 return rc; 204 return rc;
@@ -440,10 +437,10 @@ struct dentry *hypfs_create_str(struct dentry *dir,
440static const struct file_operations hypfs_file_ops = { 437static const struct file_operations hypfs_file_ops = {
441 .open = hypfs_open, 438 .open = hypfs_open,
442 .release = hypfs_release, 439 .release = hypfs_release,
443 .read = do_sync_read, 440 .read = new_sync_read,
444 .write = do_sync_write, 441 .write = new_sync_write,
445 .aio_read = hypfs_aio_read, 442 .read_iter = hypfs_read_iter,
446 .aio_write = hypfs_aio_write, 443 .write_iter = hypfs_write_iter,
447 .llseek = no_llseek, 444 .llseek = no_llseek,
448}; 445};
449 446
diff --git a/arch/s390/include/asm/kvm_host.h b/arch/s390/include/asm/kvm_host.h
index d84559e31f32..f407bbf5ee94 100644
--- a/arch/s390/include/asm/kvm_host.h
+++ b/arch/s390/include/asm/kvm_host.h
@@ -515,15 +515,15 @@ struct s390_io_adapter {
515#define S390_ARCH_FAC_MASK_SIZE_U64 \ 515#define S390_ARCH_FAC_MASK_SIZE_U64 \
516 (S390_ARCH_FAC_MASK_SIZE_BYTE / sizeof(u64)) 516 (S390_ARCH_FAC_MASK_SIZE_BYTE / sizeof(u64))
517 517
518struct s390_model_fac { 518struct kvm_s390_fac {
519 /* facilities used in SIE context */ 519 /* facility list requested by guest */
520 __u64 sie[S390_ARCH_FAC_LIST_SIZE_U64]; 520 __u64 list[S390_ARCH_FAC_LIST_SIZE_U64];
521 /* subset enabled by kvm */ 521 /* facility mask supported by kvm & hosting machine */
522 __u64 kvm[S390_ARCH_FAC_LIST_SIZE_U64]; 522 __u64 mask[S390_ARCH_FAC_LIST_SIZE_U64];
523}; 523};
524 524
525struct kvm_s390_cpu_model { 525struct kvm_s390_cpu_model {
526 struct s390_model_fac *fac; 526 struct kvm_s390_fac *fac;
527 struct cpuid cpu_id; 527 struct cpuid cpu_id;
528 unsigned short ibc; 528 unsigned short ibc;
529}; 529};
diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h
index f49b71954654..8fb3802f8fad 100644
--- a/arch/s390/include/asm/mmu_context.h
+++ b/arch/s390/include/asm/mmu_context.h
@@ -62,6 +62,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
62{ 62{
63 int cpu = smp_processor_id(); 63 int cpu = smp_processor_id();
64 64
65 S390_lowcore.user_asce = next->context.asce_bits | __pa(next->pgd);
65 if (prev == next) 66 if (prev == next)
66 return; 67 return;
67 if (MACHINE_HAS_TLB_LC) 68 if (MACHINE_HAS_TLB_LC)
@@ -73,7 +74,6 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
73 atomic_dec(&prev->context.attach_count); 74 atomic_dec(&prev->context.attach_count);
74 if (MACHINE_HAS_TLB_LC) 75 if (MACHINE_HAS_TLB_LC)
75 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask); 76 cpumask_clear_cpu(cpu, &prev->context.cpu_attach_mask);
76 S390_lowcore.user_asce = next->context.asce_bits | __pa(next->pgd);
77} 77}
78 78
79#define finish_arch_post_lock_switch finish_arch_post_lock_switch 79#define finish_arch_post_lock_switch finish_arch_post_lock_switch
diff --git a/arch/s390/include/asm/page.h b/arch/s390/include/asm/page.h
index 7b2ac6e44166..53eacbd4f09b 100644
--- a/arch/s390/include/asm/page.h
+++ b/arch/s390/include/asm/page.h
@@ -37,16 +37,7 @@ static inline void storage_key_init_range(unsigned long start, unsigned long end
37#endif 37#endif
38} 38}
39 39
40static inline void clear_page(void *page) 40#define clear_page(page) memset((page), 0, PAGE_SIZE)
41{
42 register unsigned long reg1 asm ("1") = 0;
43 register void *reg2 asm ("2") = page;
44 register unsigned long reg3 asm ("3") = 4096;
45 asm volatile(
46 " mvcl 2,0"
47 : "+d" (reg2), "+d" (reg3) : "d" (reg1)
48 : "memory", "cc");
49}
50 41
51/* 42/*
52 * copy_page uses the mvcl instruction with 0xb0 padding byte in order to 43 * copy_page uses the mvcl instruction with 0xb0 padding byte in order to
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index fbb5ee3ae57c..e08ec38f8c6e 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -91,7 +91,9 @@ extern unsigned long zero_page_mask;
91 */ 91 */
92#define PTRS_PER_PTE 256 92#define PTRS_PER_PTE 256
93#ifndef CONFIG_64BIT 93#ifndef CONFIG_64BIT
94#define __PAGETABLE_PUD_FOLDED
94#define PTRS_PER_PMD 1 95#define PTRS_PER_PMD 1
96#define __PAGETABLE_PMD_FOLDED
95#define PTRS_PER_PUD 1 97#define PTRS_PER_PUD 1
96#else /* CONFIG_64BIT */ 98#else /* CONFIG_64BIT */
97#define PTRS_PER_PMD 2048 99#define PTRS_PER_PMD 2048
diff --git a/arch/s390/include/asm/topology.h b/arch/s390/include/asm/topology.h
index c4fbb9527c5c..b1453a2ae1ca 100644
--- a/arch/s390/include/asm/topology.h
+++ b/arch/s390/include/asm/topology.h
@@ -18,15 +18,15 @@ struct cpu_topology_s390 {
18 cpumask_t book_mask; 18 cpumask_t book_mask;
19}; 19};
20 20
21extern struct cpu_topology_s390 cpu_topology[NR_CPUS]; 21DECLARE_PER_CPU(struct cpu_topology_s390, cpu_topology);
22 22
23#define topology_physical_package_id(cpu) (cpu_topology[cpu].socket_id) 23#define topology_physical_package_id(cpu) (per_cpu(cpu_topology, cpu).socket_id)
24#define topology_thread_id(cpu) (cpu_topology[cpu].thread_id) 24#define topology_thread_id(cpu) (per_cpu(cpu_topology, cpu).thread_id)
25#define topology_thread_cpumask(cpu) (&cpu_topology[cpu].thread_mask) 25#define topology_thread_cpumask(cpu) (&per_cpu(cpu_topology, cpu).thread_mask)
26#define topology_core_id(cpu) (cpu_topology[cpu].core_id) 26#define topology_core_id(cpu) (per_cpu(cpu_topology, cpu).core_id)
27#define topology_core_cpumask(cpu) (&cpu_topology[cpu].core_mask) 27#define topology_core_cpumask(cpu) (&per_cpu(cpu_topology, cpu).core_mask)
28#define topology_book_id(cpu) (cpu_topology[cpu].book_id) 28#define topology_book_id(cpu) (per_cpu(cpu_topology, cpu).book_id)
29#define topology_book_cpumask(cpu) (&cpu_topology[cpu].book_mask) 29#define topology_book_cpumask(cpu) (&per_cpu(cpu_topology, cpu).book_mask)
30 30
31#define mc_capable() 1 31#define mc_capable() 1
32 32
@@ -51,14 +51,6 @@ static inline void topology_expect_change(void) { }
51#define POLARIZATION_VM (2) 51#define POLARIZATION_VM (2)
52#define POLARIZATION_VH (3) 52#define POLARIZATION_VH (3)
53 53
54#ifdef CONFIG_SCHED_BOOK
55void s390_init_cpu_topology(void);
56#else
57static inline void s390_init_cpu_topology(void)
58{
59};
60#endif
61
62#include <asm-generic/topology.h> 54#include <asm-generic/topology.h>
63 55
64#endif /* _ASM_S390_TOPOLOGY_H */ 56#endif /* _ASM_S390_TOPOLOGY_H */
diff --git a/arch/s390/kernel/cache.c b/arch/s390/kernel/cache.c
index 632fa06ea162..0969d113b3d6 100644
--- a/arch/s390/kernel/cache.c
+++ b/arch/s390/kernel/cache.c
@@ -91,12 +91,9 @@ static inline enum cache_type get_cache_type(struct cache_info *ci, int level)
91{ 91{
92 if (level >= CACHE_MAX_LEVEL) 92 if (level >= CACHE_MAX_LEVEL)
93 return CACHE_TYPE_NOCACHE; 93 return CACHE_TYPE_NOCACHE;
94
95 ci += level; 94 ci += level;
96
97 if (ci->scope != CACHE_SCOPE_SHARED && ci->scope != CACHE_SCOPE_PRIVATE) 95 if (ci->scope != CACHE_SCOPE_SHARED && ci->scope != CACHE_SCOPE_PRIVATE)
98 return CACHE_TYPE_NOCACHE; 96 return CACHE_TYPE_NOCACHE;
99
100 return cache_type_map[ci->type]; 97 return cache_type_map[ci->type];
101} 98}
102 99
@@ -111,23 +108,19 @@ static inline unsigned long ecag(int ai, int li, int ti)
111} 108}
112 109
113static void ci_leaf_init(struct cacheinfo *this_leaf, int private, 110static void ci_leaf_init(struct cacheinfo *this_leaf, int private,
114 enum cache_type type, unsigned int level) 111 enum cache_type type, unsigned int level, int cpu)
115{ 112{
116 int ti, num_sets; 113 int ti, num_sets;
117 int cpu = smp_processor_id();
118 114
119 if (type == CACHE_TYPE_INST) 115 if (type == CACHE_TYPE_INST)
120 ti = CACHE_TI_INSTRUCTION; 116 ti = CACHE_TI_INSTRUCTION;
121 else 117 else
122 ti = CACHE_TI_UNIFIED; 118 ti = CACHE_TI_UNIFIED;
123
124 this_leaf->level = level + 1; 119 this_leaf->level = level + 1;
125 this_leaf->type = type; 120 this_leaf->type = type;
126 this_leaf->coherency_line_size = ecag(EXTRACT_LINE_SIZE, level, ti); 121 this_leaf->coherency_line_size = ecag(EXTRACT_LINE_SIZE, level, ti);
127 this_leaf->ways_of_associativity = ecag(EXTRACT_ASSOCIATIVITY, 122 this_leaf->ways_of_associativity = ecag(EXTRACT_ASSOCIATIVITY, level, ti);
128 level, ti);
129 this_leaf->size = ecag(EXTRACT_SIZE, level, ti); 123 this_leaf->size = ecag(EXTRACT_SIZE, level, ti);
130
131 num_sets = this_leaf->size / this_leaf->coherency_line_size; 124 num_sets = this_leaf->size / this_leaf->coherency_line_size;
132 num_sets /= this_leaf->ways_of_associativity; 125 num_sets /= this_leaf->ways_of_associativity;
133 this_leaf->number_of_sets = num_sets; 126 this_leaf->number_of_sets = num_sets;
@@ -145,7 +138,6 @@ int init_cache_level(unsigned int cpu)
145 138
146 if (!this_cpu_ci) 139 if (!this_cpu_ci)
147 return -EINVAL; 140 return -EINVAL;
148
149 ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0); 141 ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0);
150 do { 142 do {
151 ctype = get_cache_type(&ct.ci[0], level); 143 ctype = get_cache_type(&ct.ci[0], level);
@@ -154,34 +146,31 @@ int init_cache_level(unsigned int cpu)
154 /* Separate instruction and data caches */ 146 /* Separate instruction and data caches */
155 leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1; 147 leaves += (ctype == CACHE_TYPE_SEPARATE) ? 2 : 1;
156 } while (++level < CACHE_MAX_LEVEL); 148 } while (++level < CACHE_MAX_LEVEL);
157
158 this_cpu_ci->num_levels = level; 149 this_cpu_ci->num_levels = level;
159 this_cpu_ci->num_leaves = leaves; 150 this_cpu_ci->num_leaves = leaves;
160
161 return 0; 151 return 0;
162} 152}
163 153
164int populate_cache_leaves(unsigned int cpu) 154int populate_cache_leaves(unsigned int cpu)
165{ 155{
156 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
157 struct cacheinfo *this_leaf = this_cpu_ci->info_list;
166 unsigned int level, idx, pvt; 158 unsigned int level, idx, pvt;
167 union cache_topology ct; 159 union cache_topology ct;
168 enum cache_type ctype; 160 enum cache_type ctype;
169 struct cpu_cacheinfo *this_cpu_ci = get_cpu_cacheinfo(cpu);
170 struct cacheinfo *this_leaf = this_cpu_ci->info_list;
171 161
172 ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0); 162 ct.raw = ecag(EXTRACT_TOPOLOGY, 0, 0);
173 for (idx = 0, level = 0; level < this_cpu_ci->num_levels && 163 for (idx = 0, level = 0; level < this_cpu_ci->num_levels &&
174 idx < this_cpu_ci->num_leaves; idx++, level++) { 164 idx < this_cpu_ci->num_leaves; idx++, level++) {
175 if (!this_leaf) 165 if (!this_leaf)
176 return -EINVAL; 166 return -EINVAL;
177
178 pvt = (ct.ci[level].scope == CACHE_SCOPE_PRIVATE) ? 1 : 0; 167 pvt = (ct.ci[level].scope == CACHE_SCOPE_PRIVATE) ? 1 : 0;
179 ctype = get_cache_type(&ct.ci[0], level); 168 ctype = get_cache_type(&ct.ci[0], level);
180 if (ctype == CACHE_TYPE_SEPARATE) { 169 if (ctype == CACHE_TYPE_SEPARATE) {
181 ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_DATA, level); 170 ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_DATA, level, cpu);
182 ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_INST, level); 171 ci_leaf_init(this_leaf++, pvt, CACHE_TYPE_INST, level, cpu);
183 } else { 172 } else {
184 ci_leaf_init(this_leaf++, pvt, ctype, level); 173 ci_leaf_init(this_leaf++, pvt, ctype, level, cpu);
185 } 174 }
186 } 175 }
187 return 0; 176 return 0;
diff --git a/arch/s390/kernel/early.c b/arch/s390/kernel/early.c
index 70a329450901..4427ab7ac23a 100644
--- a/arch/s390/kernel/early.c
+++ b/arch/s390/kernel/early.c
@@ -393,17 +393,19 @@ static __init void detect_machine_facilities(void)
393 S390_lowcore.machine_flags |= MACHINE_FLAG_TLB_LC; 393 S390_lowcore.machine_flags |= MACHINE_FLAG_TLB_LC;
394 if (test_facility(129)) 394 if (test_facility(129))
395 S390_lowcore.machine_flags |= MACHINE_FLAG_VX; 395 S390_lowcore.machine_flags |= MACHINE_FLAG_VX;
396 if (test_facility(128))
397 S390_lowcore.machine_flags |= MACHINE_FLAG_CAD;
398#endif 396#endif
399} 397}
400 398
401static int __init nocad_setup(char *str) 399static int __init cad_setup(char *str)
402{ 400{
403 S390_lowcore.machine_flags &= ~MACHINE_FLAG_CAD; 401 int val;
402
403 get_option(&str, &val);
404 if (val && test_facility(128))
405 S390_lowcore.machine_flags |= MACHINE_FLAG_CAD;
404 return 0; 406 return 0;
405} 407}
406early_param("nocad", nocad_setup); 408early_param("cad", cad_setup);
407 409
408static int __init cad_init(void) 410static int __init cad_init(void)
409{ 411{
diff --git a/arch/s390/kernel/jump_label.c b/arch/s390/kernel/jump_label.c
index cb2d51e779df..830066f936c8 100644
--- a/arch/s390/kernel/jump_label.c
+++ b/arch/s390/kernel/jump_label.c
@@ -36,16 +36,20 @@ static void jump_label_make_branch(struct jump_entry *entry, struct insn *insn)
36 insn->offset = (entry->target - entry->code) >> 1; 36 insn->offset = (entry->target - entry->code) >> 1;
37} 37}
38 38
39static void jump_label_bug(struct jump_entry *entry, struct insn *insn) 39static void jump_label_bug(struct jump_entry *entry, struct insn *expected,
40 struct insn *new)
40{ 41{
41 unsigned char *ipc = (unsigned char *)entry->code; 42 unsigned char *ipc = (unsigned char *)entry->code;
42 unsigned char *ipe = (unsigned char *)insn; 43 unsigned char *ipe = (unsigned char *)expected;
44 unsigned char *ipn = (unsigned char *)new;
43 45
44 pr_emerg("Jump label code mismatch at %pS [%p]\n", ipc, ipc); 46 pr_emerg("Jump label code mismatch at %pS [%p]\n", ipc, ipc);
45 pr_emerg("Found: %02x %02x %02x %02x %02x %02x\n", 47 pr_emerg("Found: %02x %02x %02x %02x %02x %02x\n",
46 ipc[0], ipc[1], ipc[2], ipc[3], ipc[4], ipc[5]); 48 ipc[0], ipc[1], ipc[2], ipc[3], ipc[4], ipc[5]);
47 pr_emerg("Expected: %02x %02x %02x %02x %02x %02x\n", 49 pr_emerg("Expected: %02x %02x %02x %02x %02x %02x\n",
48 ipe[0], ipe[1], ipe[2], ipe[3], ipe[4], ipe[5]); 50 ipe[0], ipe[1], ipe[2], ipe[3], ipe[4], ipe[5]);
51 pr_emerg("New: %02x %02x %02x %02x %02x %02x\n",
52 ipn[0], ipn[1], ipn[2], ipn[3], ipn[4], ipn[5]);
49 panic("Corrupted kernel text"); 53 panic("Corrupted kernel text");
50} 54}
51 55
@@ -69,10 +73,10 @@ static void __jump_label_transform(struct jump_entry *entry,
69 } 73 }
70 if (init) { 74 if (init) {
71 if (memcmp((void *)entry->code, &orignop, sizeof(orignop))) 75 if (memcmp((void *)entry->code, &orignop, sizeof(orignop)))
72 jump_label_bug(entry, &old); 76 jump_label_bug(entry, &orignop, &new);
73 } else { 77 } else {
74 if (memcmp((void *)entry->code, &old, sizeof(old))) 78 if (memcmp((void *)entry->code, &old, sizeof(old)))
75 jump_label_bug(entry, &old); 79 jump_label_bug(entry, &old, &new);
76 } 80 }
77 probe_kernel_write((void *)entry->code, &new, sizeof(new)); 81 probe_kernel_write((void *)entry->code, &new, sizeof(new));
78} 82}
diff --git a/arch/s390/kernel/module.c b/arch/s390/kernel/module.c
index 36154a2f1814..2ca95862e336 100644
--- a/arch/s390/kernel/module.c
+++ b/arch/s390/kernel/module.c
@@ -436,6 +436,7 @@ int module_finalize(const Elf_Ehdr *hdr,
436 const Elf_Shdr *sechdrs, 436 const Elf_Shdr *sechdrs,
437 struct module *me) 437 struct module *me)
438{ 438{
439 jump_label_apply_nops(me);
439 vfree(me->arch.syminfo); 440 vfree(me->arch.syminfo);
440 me->arch.syminfo = NULL; 441 me->arch.syminfo = NULL;
441 return 0; 442 return 0;
diff --git a/arch/s390/kernel/processor.c b/arch/s390/kernel/processor.c
index 26108232fcaa..dc488e13b7e3 100644
--- a/arch/s390/kernel/processor.c
+++ b/arch/s390/kernel/processor.c
@@ -18,7 +18,7 @@
18 18
19static DEFINE_PER_CPU(struct cpuid, cpu_id); 19static DEFINE_PER_CPU(struct cpuid, cpu_id);
20 20
21void cpu_relax(void) 21void notrace cpu_relax(void)
22{ 22{
23 if (!smp_cpu_mtid && MACHINE_HAS_DIAG44) 23 if (!smp_cpu_mtid && MACHINE_HAS_DIAG44)
24 asm volatile("diag 0,0,0x44"); 24 asm volatile("diag 0,0,0x44");
diff --git a/arch/s390/kernel/setup.c b/arch/s390/kernel/setup.c
index bfac77ada4f2..a5ea8bc17cb3 100644
--- a/arch/s390/kernel/setup.c
+++ b/arch/s390/kernel/setup.c
@@ -909,7 +909,6 @@ void __init setup_arch(char **cmdline_p)
909 setup_lowcore(); 909 setup_lowcore();
910 smp_fill_possible_mask(); 910 smp_fill_possible_mask();
911 cpu_init(); 911 cpu_init();
912 s390_init_cpu_topology();
913 912
914 /* 913 /*
915 * Setup capabilities (ELF_HWCAP & ELF_PLATFORM). 914 * Setup capabilities (ELF_HWCAP & ELF_PLATFORM).
diff --git a/arch/s390/kernel/smp.c b/arch/s390/kernel/smp.c
index a668993ff577..db8f1115a3bf 100644
--- a/arch/s390/kernel/smp.c
+++ b/arch/s390/kernel/smp.c
@@ -59,14 +59,13 @@ enum {
59 CPU_STATE_CONFIGURED, 59 CPU_STATE_CONFIGURED,
60}; 60};
61 61
62static DEFINE_PER_CPU(struct cpu *, cpu_device);
63
62struct pcpu { 64struct pcpu {
63 struct cpu *cpu;
64 struct _lowcore *lowcore; /* lowcore page(s) for the cpu */ 65 struct _lowcore *lowcore; /* lowcore page(s) for the cpu */
65 unsigned long async_stack; /* async stack for the cpu */
66 unsigned long panic_stack; /* panic stack for the cpu */
67 unsigned long ec_mask; /* bit mask for ec_xxx functions */ 66 unsigned long ec_mask; /* bit mask for ec_xxx functions */
68 int state; /* physical cpu state */ 67 signed char state; /* physical cpu state */
69 int polarization; /* physical polarization */ 68 signed char polarization; /* physical polarization */
70 u16 address; /* physical cpu address */ 69 u16 address; /* physical cpu address */
71}; 70};
72 71
@@ -173,25 +172,30 @@ static void pcpu_ec_call(struct pcpu *pcpu, int ec_bit)
173 pcpu_sigp_retry(pcpu, order, 0); 172 pcpu_sigp_retry(pcpu, order, 0);
174} 173}
175 174
175#define ASYNC_FRAME_OFFSET (ASYNC_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
176#define PANIC_FRAME_OFFSET (PAGE_SIZE - STACK_FRAME_OVERHEAD - __PT_SIZE)
177
176static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu) 178static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
177{ 179{
180 unsigned long async_stack, panic_stack;
178 struct _lowcore *lc; 181 struct _lowcore *lc;
179 182
180 if (pcpu != &pcpu_devices[0]) { 183 if (pcpu != &pcpu_devices[0]) {
181 pcpu->lowcore = (struct _lowcore *) 184 pcpu->lowcore = (struct _lowcore *)
182 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER); 185 __get_free_pages(GFP_KERNEL | GFP_DMA, LC_ORDER);
183 pcpu->async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER); 186 async_stack = __get_free_pages(GFP_KERNEL, ASYNC_ORDER);
184 pcpu->panic_stack = __get_free_page(GFP_KERNEL); 187 panic_stack = __get_free_page(GFP_KERNEL);
185 if (!pcpu->lowcore || !pcpu->panic_stack || !pcpu->async_stack) 188 if (!pcpu->lowcore || !panic_stack || !async_stack)
186 goto out; 189 goto out;
190 } else {
191 async_stack = pcpu->lowcore->async_stack - ASYNC_FRAME_OFFSET;
192 panic_stack = pcpu->lowcore->panic_stack - PANIC_FRAME_OFFSET;
187 } 193 }
188 lc = pcpu->lowcore; 194 lc = pcpu->lowcore;
189 memcpy(lc, &S390_lowcore, 512); 195 memcpy(lc, &S390_lowcore, 512);
190 memset((char *) lc + 512, 0, sizeof(*lc) - 512); 196 memset((char *) lc + 512, 0, sizeof(*lc) - 512);
191 lc->async_stack = pcpu->async_stack + ASYNC_SIZE 197 lc->async_stack = async_stack + ASYNC_FRAME_OFFSET;
192 - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs); 198 lc->panic_stack = panic_stack + PANIC_FRAME_OFFSET;
193 lc->panic_stack = pcpu->panic_stack + PAGE_SIZE
194 - STACK_FRAME_OVERHEAD - sizeof(struct pt_regs);
195 lc->cpu_nr = cpu; 199 lc->cpu_nr = cpu;
196 lc->spinlock_lockval = arch_spin_lockval(cpu); 200 lc->spinlock_lockval = arch_spin_lockval(cpu);
197#ifndef CONFIG_64BIT 201#ifndef CONFIG_64BIT
@@ -212,8 +216,8 @@ static int pcpu_alloc_lowcore(struct pcpu *pcpu, int cpu)
212 return 0; 216 return 0;
213out: 217out:
214 if (pcpu != &pcpu_devices[0]) { 218 if (pcpu != &pcpu_devices[0]) {
215 free_page(pcpu->panic_stack); 219 free_page(panic_stack);
216 free_pages(pcpu->async_stack, ASYNC_ORDER); 220 free_pages(async_stack, ASYNC_ORDER);
217 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 221 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
218 } 222 }
219 return -ENOMEM; 223 return -ENOMEM;
@@ -235,11 +239,11 @@ static void pcpu_free_lowcore(struct pcpu *pcpu)
235#else 239#else
236 vdso_free_per_cpu(pcpu->lowcore); 240 vdso_free_per_cpu(pcpu->lowcore);
237#endif 241#endif
238 if (pcpu != &pcpu_devices[0]) { 242 if (pcpu == &pcpu_devices[0])
239 free_page(pcpu->panic_stack); 243 return;
240 free_pages(pcpu->async_stack, ASYNC_ORDER); 244 free_page(pcpu->lowcore->panic_stack-PANIC_FRAME_OFFSET);
241 free_pages((unsigned long) pcpu->lowcore, LC_ORDER); 245 free_pages(pcpu->lowcore->async_stack-ASYNC_FRAME_OFFSET, ASYNC_ORDER);
242 } 246 free_pages((unsigned long) pcpu->lowcore, LC_ORDER);
243} 247}
244 248
245#endif /* CONFIG_HOTPLUG_CPU */ 249#endif /* CONFIG_HOTPLUG_CPU */
@@ -366,7 +370,8 @@ void smp_call_online_cpu(void (*func)(void *), void *data)
366void smp_call_ipl_cpu(void (*func)(void *), void *data) 370void smp_call_ipl_cpu(void (*func)(void *), void *data)
367{ 371{
368 pcpu_delegate(&pcpu_devices[0], func, data, 372 pcpu_delegate(&pcpu_devices[0], func, data,
369 pcpu_devices->panic_stack + PAGE_SIZE); 373 pcpu_devices->lowcore->panic_stack -
374 PANIC_FRAME_OFFSET + PAGE_SIZE);
370} 375}
371 376
372int smp_find_processor_id(u16 address) 377int smp_find_processor_id(u16 address)
@@ -935,10 +940,6 @@ void __init smp_prepare_boot_cpu(void)
935 pcpu->state = CPU_STATE_CONFIGURED; 940 pcpu->state = CPU_STATE_CONFIGURED;
936 pcpu->address = stap(); 941 pcpu->address = stap();
937 pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix(); 942 pcpu->lowcore = (struct _lowcore *)(unsigned long) store_prefix();
938 pcpu->async_stack = S390_lowcore.async_stack - ASYNC_SIZE
939 + STACK_FRAME_OVERHEAD + sizeof(struct pt_regs);
940 pcpu->panic_stack = S390_lowcore.panic_stack - PAGE_SIZE
941 + STACK_FRAME_OVERHEAD + sizeof(struct pt_regs);
942 S390_lowcore.percpu_offset = __per_cpu_offset[0]; 943 S390_lowcore.percpu_offset = __per_cpu_offset[0];
943 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN); 944 smp_cpu_set_polarization(0, POLARIZATION_UNKNOWN);
944 set_cpu_present(0, true); 945 set_cpu_present(0, true);
@@ -1078,8 +1079,7 @@ static int smp_cpu_notify(struct notifier_block *self, unsigned long action,
1078 void *hcpu) 1079 void *hcpu)
1079{ 1080{
1080 unsigned int cpu = (unsigned int)(long)hcpu; 1081 unsigned int cpu = (unsigned int)(long)hcpu;
1081 struct cpu *c = pcpu_devices[cpu].cpu; 1082 struct device *s = &per_cpu(cpu_device, cpu)->dev;
1082 struct device *s = &c->dev;
1083 int err = 0; 1083 int err = 0;
1084 1084
1085 switch (action & ~CPU_TASKS_FROZEN) { 1085 switch (action & ~CPU_TASKS_FROZEN) {
@@ -1102,7 +1102,7 @@ static int smp_add_present_cpu(int cpu)
1102 c = kzalloc(sizeof(*c), GFP_KERNEL); 1102 c = kzalloc(sizeof(*c), GFP_KERNEL);
1103 if (!c) 1103 if (!c)
1104 return -ENOMEM; 1104 return -ENOMEM;
1105 pcpu_devices[cpu].cpu = c; 1105 per_cpu(cpu_device, cpu) = c;
1106 s = &c->dev; 1106 s = &c->dev;
1107 c->hotpluggable = 1; 1107 c->hotpluggable = 1;
1108 rc = register_cpu(c, cpu); 1108 rc = register_cpu(c, cpu);
diff --git a/arch/s390/kernel/topology.c b/arch/s390/kernel/topology.c
index 24ee33f1af24..14da43b801d9 100644
--- a/arch/s390/kernel/topology.c
+++ b/arch/s390/kernel/topology.c
@@ -7,14 +7,14 @@
7#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt 7#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
8 8
9#include <linux/workqueue.h> 9#include <linux/workqueue.h>
10#include <linux/bootmem.h>
11#include <linux/cpuset.h> 10#include <linux/cpuset.h>
12#include <linux/device.h> 11#include <linux/device.h>
13#include <linux/export.h> 12#include <linux/export.h>
14#include <linux/kernel.h> 13#include <linux/kernel.h>
15#include <linux/sched.h> 14#include <linux/sched.h>
16#include <linux/init.h>
17#include <linux/delay.h> 15#include <linux/delay.h>
16#include <linux/init.h>
17#include <linux/slab.h>
18#include <linux/cpu.h> 18#include <linux/cpu.h>
19#include <linux/smp.h> 19#include <linux/smp.h>
20#include <linux/mm.h> 20#include <linux/mm.h>
@@ -42,8 +42,8 @@ static DEFINE_SPINLOCK(topology_lock);
42static struct mask_info socket_info; 42static struct mask_info socket_info;
43static struct mask_info book_info; 43static struct mask_info book_info;
44 44
45struct cpu_topology_s390 cpu_topology[NR_CPUS]; 45DEFINE_PER_CPU(struct cpu_topology_s390, cpu_topology);
46EXPORT_SYMBOL_GPL(cpu_topology); 46EXPORT_PER_CPU_SYMBOL_GPL(cpu_topology);
47 47
48static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu) 48static cpumask_t cpu_group_map(struct mask_info *info, unsigned int cpu)
49{ 49{
@@ -90,15 +90,15 @@ static struct mask_info *add_cpus_to_mask(struct topology_core *tl_core,
90 if (lcpu < 0) 90 if (lcpu < 0)
91 continue; 91 continue;
92 for (i = 0; i <= smp_cpu_mtid; i++) { 92 for (i = 0; i <= smp_cpu_mtid; i++) {
93 cpu_topology[lcpu + i].book_id = book->id; 93 per_cpu(cpu_topology, lcpu + i).book_id = book->id;
94 cpu_topology[lcpu + i].core_id = rcore; 94 per_cpu(cpu_topology, lcpu + i).core_id = rcore;
95 cpu_topology[lcpu + i].thread_id = lcpu + i; 95 per_cpu(cpu_topology, lcpu + i).thread_id = lcpu + i;
96 cpumask_set_cpu(lcpu + i, &book->mask); 96 cpumask_set_cpu(lcpu + i, &book->mask);
97 cpumask_set_cpu(lcpu + i, &socket->mask); 97 cpumask_set_cpu(lcpu + i, &socket->mask);
98 if (one_socket_per_cpu) 98 if (one_socket_per_cpu)
99 cpu_topology[lcpu + i].socket_id = rcore; 99 per_cpu(cpu_topology, lcpu + i).socket_id = rcore;
100 else 100 else
101 cpu_topology[lcpu + i].socket_id = socket->id; 101 per_cpu(cpu_topology, lcpu + i).socket_id = socket->id;
102 smp_cpu_set_polarization(lcpu + i, tl_core->pp); 102 smp_cpu_set_polarization(lcpu + i, tl_core->pp);
103 } 103 }
104 if (one_socket_per_cpu) 104 if (one_socket_per_cpu)
@@ -249,14 +249,14 @@ static void update_cpu_masks(void)
249 249
250 spin_lock_irqsave(&topology_lock, flags); 250 spin_lock_irqsave(&topology_lock, flags);
251 for_each_possible_cpu(cpu) { 251 for_each_possible_cpu(cpu) {
252 cpu_topology[cpu].thread_mask = cpu_thread_map(cpu); 252 per_cpu(cpu_topology, cpu).thread_mask = cpu_thread_map(cpu);
253 cpu_topology[cpu].core_mask = cpu_group_map(&socket_info, cpu); 253 per_cpu(cpu_topology, cpu).core_mask = cpu_group_map(&socket_info, cpu);
254 cpu_topology[cpu].book_mask = cpu_group_map(&book_info, cpu); 254 per_cpu(cpu_topology, cpu).book_mask = cpu_group_map(&book_info, cpu);
255 if (!MACHINE_HAS_TOPOLOGY) { 255 if (!MACHINE_HAS_TOPOLOGY) {
256 cpu_topology[cpu].thread_id = cpu; 256 per_cpu(cpu_topology, cpu).thread_id = cpu;
257 cpu_topology[cpu].core_id = cpu; 257 per_cpu(cpu_topology, cpu).core_id = cpu;
258 cpu_topology[cpu].socket_id = cpu; 258 per_cpu(cpu_topology, cpu).socket_id = cpu;
259 cpu_topology[cpu].book_id = cpu; 259 per_cpu(cpu_topology, cpu).book_id = cpu;
260 } 260 }
261 } 261 }
262 spin_unlock_irqrestore(&topology_lock, flags); 262 spin_unlock_irqrestore(&topology_lock, flags);
@@ -334,50 +334,6 @@ void topology_expect_change(void)
334 set_topology_timer(); 334 set_topology_timer();
335} 335}
336 336
337static int __init early_parse_topology(char *p)
338{
339 if (strncmp(p, "off", 3))
340 return 0;
341 topology_enabled = 0;
342 return 0;
343}
344early_param("topology", early_parse_topology);
345
346static void __init alloc_masks(struct sysinfo_15_1_x *info,
347 struct mask_info *mask, int offset)
348{
349 int i, nr_masks;
350
351 nr_masks = info->mag[TOPOLOGY_NR_MAG - offset];
352 for (i = 0; i < info->mnest - offset; i++)
353 nr_masks *= info->mag[TOPOLOGY_NR_MAG - offset - 1 - i];
354 nr_masks = max(nr_masks, 1);
355 for (i = 0; i < nr_masks; i++) {
356 mask->next = alloc_bootmem_align(
357 roundup_pow_of_two(sizeof(struct mask_info)),
358 roundup_pow_of_two(sizeof(struct mask_info)));
359 mask = mask->next;
360 }
361}
362
363void __init s390_init_cpu_topology(void)
364{
365 struct sysinfo_15_1_x *info;
366 int i;
367
368 if (!MACHINE_HAS_TOPOLOGY)
369 return;
370 tl_info = alloc_bootmem_pages(PAGE_SIZE);
371 info = tl_info;
372 store_topology(info);
373 pr_info("The CPU configuration topology of the machine is:");
374 for (i = 0; i < TOPOLOGY_NR_MAG; i++)
375 printk(KERN_CONT " %d", info->mag[i]);
376 printk(KERN_CONT " / %d\n", info->mnest);
377 alloc_masks(info, &socket_info, 1);
378 alloc_masks(info, &book_info, 2);
379}
380
381static int cpu_management; 337static int cpu_management;
382 338
383static ssize_t dispatching_show(struct device *dev, 339static ssize_t dispatching_show(struct device *dev,
@@ -467,20 +423,29 @@ int topology_cpu_init(struct cpu *cpu)
467 423
468const struct cpumask *cpu_thread_mask(int cpu) 424const struct cpumask *cpu_thread_mask(int cpu)
469{ 425{
470 return &cpu_topology[cpu].thread_mask; 426 return &per_cpu(cpu_topology, cpu).thread_mask;
471} 427}
472 428
473 429
474const struct cpumask *cpu_coregroup_mask(int cpu) 430const struct cpumask *cpu_coregroup_mask(int cpu)
475{ 431{
476 return &cpu_topology[cpu].core_mask; 432 return &per_cpu(cpu_topology, cpu).core_mask;
477} 433}
478 434
479static const struct cpumask *cpu_book_mask(int cpu) 435static const struct cpumask *cpu_book_mask(int cpu)
480{ 436{
481 return &cpu_topology[cpu].book_mask; 437 return &per_cpu(cpu_topology, cpu).book_mask;
482} 438}
483 439
440static int __init early_parse_topology(char *p)
441{
442 if (strncmp(p, "off", 3))
443 return 0;
444 topology_enabled = 0;
445 return 0;
446}
447early_param("topology", early_parse_topology);
448
484static struct sched_domain_topology_level s390_topology[] = { 449static struct sched_domain_topology_level s390_topology[] = {
485 { cpu_thread_mask, cpu_smt_flags, SD_INIT_NAME(SMT) }, 450 { cpu_thread_mask, cpu_smt_flags, SD_INIT_NAME(SMT) },
486 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) }, 451 { cpu_coregroup_mask, cpu_core_flags, SD_INIT_NAME(MC) },
@@ -489,6 +454,42 @@ static struct sched_domain_topology_level s390_topology[] = {
489 { NULL, }, 454 { NULL, },
490}; 455};
491 456
457static void __init alloc_masks(struct sysinfo_15_1_x *info,
458 struct mask_info *mask, int offset)
459{
460 int i, nr_masks;
461
462 nr_masks = info->mag[TOPOLOGY_NR_MAG - offset];
463 for (i = 0; i < info->mnest - offset; i++)
464 nr_masks *= info->mag[TOPOLOGY_NR_MAG - offset - 1 - i];
465 nr_masks = max(nr_masks, 1);
466 for (i = 0; i < nr_masks; i++) {
467 mask->next = kzalloc(sizeof(*mask->next), GFP_KERNEL);
468 mask = mask->next;
469 }
470}
471
472static int __init s390_topology_init(void)
473{
474 struct sysinfo_15_1_x *info;
475 int i;
476
477 if (!MACHINE_HAS_TOPOLOGY)
478 return 0;
479 tl_info = (struct sysinfo_15_1_x *)__get_free_page(GFP_KERNEL);
480 info = tl_info;
481 store_topology(info);
482 pr_info("The CPU configuration topology of the machine is:");
483 for (i = 0; i < TOPOLOGY_NR_MAG; i++)
484 printk(KERN_CONT " %d", info->mag[i]);
485 printk(KERN_CONT " / %d\n", info->mnest);
486 alloc_masks(info, &socket_info, 1);
487 alloc_masks(info, &book_info, 2);
488 set_sched_topology(s390_topology);
489 return 0;
490}
491early_initcall(s390_topology_init);
492
492static int __init topology_init(void) 493static int __init topology_init(void)
493{ 494{
494 if (MACHINE_HAS_TOPOLOGY) 495 if (MACHINE_HAS_TOPOLOGY)
@@ -498,10 +499,3 @@ static int __init topology_init(void)
498 return device_create_file(cpu_subsys.dev_root, &dev_attr_dispatching); 499 return device_create_file(cpu_subsys.dev_root, &dev_attr_dispatching);
499} 500}
500device_initcall(topology_init); 501device_initcall(topology_init);
501
502static int __init early_topology_init(void)
503{
504 set_sched_topology(s390_topology);
505 return 0;
506}
507early_initcall(early_topology_init);
diff --git a/arch/s390/kernel/vdso64/clock_gettime.S b/arch/s390/kernel/vdso64/clock_gettime.S
index 7699e735ae28..61541fb93dc6 100644
--- a/arch/s390/kernel/vdso64/clock_gettime.S
+++ b/arch/s390/kernel/vdso64/clock_gettime.S
@@ -25,9 +25,7 @@ __kernel_clock_gettime:
25 je 4f 25 je 4f
26 cghi %r2,__CLOCK_REALTIME 26 cghi %r2,__CLOCK_REALTIME
27 je 5f 27 je 5f
28 cghi %r2,__CLOCK_THREAD_CPUTIME_ID 28 cghi %r2,-3 /* Per-thread CPUCLOCK with PID=0, VIRT=1 */
29 je 9f
30 cghi %r2,-2 /* Per-thread CPUCLOCK with PID=0, VIRT=1 */
31 je 9f 29 je 9f
32 cghi %r2,__CLOCK_MONOTONIC_COARSE 30 cghi %r2,__CLOCK_MONOTONIC_COARSE
33 je 3f 31 je 3f
@@ -106,7 +104,7 @@ __kernel_clock_gettime:
106 aghi %r15,16 104 aghi %r15,16
107 br %r14 105 br %r14
108 106
109 /* CLOCK_THREAD_CPUTIME_ID for this thread */ 107 /* CPUCLOCK_VIRT for this thread */
1109: icm %r0,15,__VDSO_ECTG_OK(%r5) 1089: icm %r0,15,__VDSO_ECTG_OK(%r5)
111 jz 12f 109 jz 12f
112 ear %r2,%a4 110 ear %r2,%a4
diff --git a/arch/s390/kvm/kvm-s390.c b/arch/s390/kvm/kvm-s390.c
index 0c3623927563..19e17bd7aec0 100644
--- a/arch/s390/kvm/kvm-s390.c
+++ b/arch/s390/kvm/kvm-s390.c
@@ -165,7 +165,6 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
165 case KVM_CAP_ONE_REG: 165 case KVM_CAP_ONE_REG:
166 case KVM_CAP_ENABLE_CAP: 166 case KVM_CAP_ENABLE_CAP:
167 case KVM_CAP_S390_CSS_SUPPORT: 167 case KVM_CAP_S390_CSS_SUPPORT:
168 case KVM_CAP_IRQFD:
169 case KVM_CAP_IOEVENTFD: 168 case KVM_CAP_IOEVENTFD:
170 case KVM_CAP_DEVICE_CTRL: 169 case KVM_CAP_DEVICE_CTRL:
171 case KVM_CAP_ENABLE_CAP_VM: 170 case KVM_CAP_ENABLE_CAP_VM:
@@ -522,7 +521,7 @@ static int kvm_s390_set_processor(struct kvm *kvm, struct kvm_device_attr *attr)
522 memcpy(&kvm->arch.model.cpu_id, &proc->cpuid, 521 memcpy(&kvm->arch.model.cpu_id, &proc->cpuid,
523 sizeof(struct cpuid)); 522 sizeof(struct cpuid));
524 kvm->arch.model.ibc = proc->ibc; 523 kvm->arch.model.ibc = proc->ibc;
525 memcpy(kvm->arch.model.fac->kvm, proc->fac_list, 524 memcpy(kvm->arch.model.fac->list, proc->fac_list,
526 S390_ARCH_FAC_LIST_SIZE_BYTE); 525 S390_ARCH_FAC_LIST_SIZE_BYTE);
527 } else 526 } else
528 ret = -EFAULT; 527 ret = -EFAULT;
@@ -556,7 +555,7 @@ static int kvm_s390_get_processor(struct kvm *kvm, struct kvm_device_attr *attr)
556 } 555 }
557 memcpy(&proc->cpuid, &kvm->arch.model.cpu_id, sizeof(struct cpuid)); 556 memcpy(&proc->cpuid, &kvm->arch.model.cpu_id, sizeof(struct cpuid));
558 proc->ibc = kvm->arch.model.ibc; 557 proc->ibc = kvm->arch.model.ibc;
559 memcpy(&proc->fac_list, kvm->arch.model.fac->kvm, S390_ARCH_FAC_LIST_SIZE_BYTE); 558 memcpy(&proc->fac_list, kvm->arch.model.fac->list, S390_ARCH_FAC_LIST_SIZE_BYTE);
560 if (copy_to_user((void __user *)attr->addr, proc, sizeof(*proc))) 559 if (copy_to_user((void __user *)attr->addr, proc, sizeof(*proc)))
561 ret = -EFAULT; 560 ret = -EFAULT;
562 kfree(proc); 561 kfree(proc);
@@ -576,10 +575,10 @@ static int kvm_s390_get_machine(struct kvm *kvm, struct kvm_device_attr *attr)
576 } 575 }
577 get_cpu_id((struct cpuid *) &mach->cpuid); 576 get_cpu_id((struct cpuid *) &mach->cpuid);
578 mach->ibc = sclp_get_ibc(); 577 mach->ibc = sclp_get_ibc();
579 memcpy(&mach->fac_mask, kvm_s390_fac_list_mask, 578 memcpy(&mach->fac_mask, kvm->arch.model.fac->mask,
580 kvm_s390_fac_list_mask_size() * sizeof(u64)); 579 S390_ARCH_FAC_LIST_SIZE_BYTE);
581 memcpy((unsigned long *)&mach->fac_list, S390_lowcore.stfle_fac_list, 580 memcpy((unsigned long *)&mach->fac_list, S390_lowcore.stfle_fac_list,
582 S390_ARCH_FAC_LIST_SIZE_U64); 581 S390_ARCH_FAC_LIST_SIZE_BYTE);
583 if (copy_to_user((void __user *)attr->addr, mach, sizeof(*mach))) 582 if (copy_to_user((void __user *)attr->addr, mach, sizeof(*mach)))
584 ret = -EFAULT; 583 ret = -EFAULT;
585 kfree(mach); 584 kfree(mach);
@@ -778,15 +777,18 @@ long kvm_arch_vm_ioctl(struct file *filp,
778static int kvm_s390_query_ap_config(u8 *config) 777static int kvm_s390_query_ap_config(u8 *config)
779{ 778{
780 u32 fcn_code = 0x04000000UL; 779 u32 fcn_code = 0x04000000UL;
781 u32 cc; 780 u32 cc = 0;
782 781
782 memset(config, 0, 128);
783 asm volatile( 783 asm volatile(
784 "lgr 0,%1\n" 784 "lgr 0,%1\n"
785 "lgr 2,%2\n" 785 "lgr 2,%2\n"
786 ".long 0xb2af0000\n" /* PQAP(QCI) */ 786 ".long 0xb2af0000\n" /* PQAP(QCI) */
787 "ipm %0\n" 787 "0: ipm %0\n"
788 "srl %0,28\n" 788 "srl %0,28\n"
789 : "=r" (cc) 789 "1:\n"
790 EX_TABLE(0b, 1b)
791 : "+r" (cc)
790 : "r" (fcn_code), "r" (config) 792 : "r" (fcn_code), "r" (config)
791 : "cc", "0", "2", "memory" 793 : "cc", "0", "2", "memory"
792 ); 794 );
@@ -839,9 +841,13 @@ static int kvm_s390_crypto_init(struct kvm *kvm)
839 841
840 kvm_s390_set_crycb_format(kvm); 842 kvm_s390_set_crycb_format(kvm);
841 843
842 /* Disable AES/DEA protected key functions by default */ 844 /* Enable AES/DEA protected key functions by default */
843 kvm->arch.crypto.aes_kw = 0; 845 kvm->arch.crypto.aes_kw = 1;
844 kvm->arch.crypto.dea_kw = 0; 846 kvm->arch.crypto.dea_kw = 1;
847 get_random_bytes(kvm->arch.crypto.crycb->aes_wrapping_key_mask,
848 sizeof(kvm->arch.crypto.crycb->aes_wrapping_key_mask));
849 get_random_bytes(kvm->arch.crypto.crycb->dea_wrapping_key_mask,
850 sizeof(kvm->arch.crypto.crycb->dea_wrapping_key_mask));
845 851
846 return 0; 852 return 0;
847} 853}
@@ -886,40 +892,29 @@ int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
886 /* 892 /*
887 * The architectural maximum amount of facilities is 16 kbit. To store 893 * The architectural maximum amount of facilities is 16 kbit. To store
888 * this amount, 2 kbyte of memory is required. Thus we need a full 894 * this amount, 2 kbyte of memory is required. Thus we need a full
889 * page to hold the active copy (arch.model.fac->sie) and the current 895 * page to hold the guest facility list (arch.model.fac->list) and the
890 * facilities set (arch.model.fac->kvm). Its address size has to be 896 * facility mask (arch.model.fac->mask). Its address size has to be
891 * 31 bits and word aligned. 897 * 31 bits and word aligned.
892 */ 898 */
893 kvm->arch.model.fac = 899 kvm->arch.model.fac =
894 (struct s390_model_fac *) get_zeroed_page(GFP_KERNEL | GFP_DMA); 900 (struct kvm_s390_fac *) get_zeroed_page(GFP_KERNEL | GFP_DMA);
895 if (!kvm->arch.model.fac) 901 if (!kvm->arch.model.fac)
896 goto out_nofac; 902 goto out_nofac;
897 903
898 memcpy(kvm->arch.model.fac->kvm, S390_lowcore.stfle_fac_list, 904 /* Populate the facility mask initially. */
899 S390_ARCH_FAC_LIST_SIZE_U64); 905 memcpy(kvm->arch.model.fac->mask, S390_lowcore.stfle_fac_list,
900 906 S390_ARCH_FAC_LIST_SIZE_BYTE);
901 /*
902 * If this KVM host runs *not* in a LPAR, relax the facility bits
903 * of the kvm facility mask by all missing facilities. This will allow
904 * to determine the right CPU model by means of the remaining facilities.
905 * Live guest migration must prohibit the migration of KVMs running in
906 * a LPAR to non LPAR hosts.
907 */
908 if (!MACHINE_IS_LPAR)
909 for (i = 0; i < kvm_s390_fac_list_mask_size(); i++)
910 kvm_s390_fac_list_mask[i] &= kvm->arch.model.fac->kvm[i];
911
912 /*
913 * Apply the kvm facility mask to limit the kvm supported/tolerated
914 * facility list.
915 */
916 for (i = 0; i < S390_ARCH_FAC_LIST_SIZE_U64; i++) { 907 for (i = 0; i < S390_ARCH_FAC_LIST_SIZE_U64; i++) {
917 if (i < kvm_s390_fac_list_mask_size()) 908 if (i < kvm_s390_fac_list_mask_size())
918 kvm->arch.model.fac->kvm[i] &= kvm_s390_fac_list_mask[i]; 909 kvm->arch.model.fac->mask[i] &= kvm_s390_fac_list_mask[i];
919 else 910 else
920 kvm->arch.model.fac->kvm[i] = 0UL; 911 kvm->arch.model.fac->mask[i] = 0UL;
921 } 912 }
922 913
914 /* Populate the facility list initially. */
915 memcpy(kvm->arch.model.fac->list, kvm->arch.model.fac->mask,
916 S390_ARCH_FAC_LIST_SIZE_BYTE);
917
923 kvm_s390_get_cpu_id(&kvm->arch.model.cpu_id); 918 kvm_s390_get_cpu_id(&kvm->arch.model.cpu_id);
924 kvm->arch.model.ibc = sclp_get_ibc() & 0x0fff; 919 kvm->arch.model.ibc = sclp_get_ibc() & 0x0fff;
925 920
@@ -1165,8 +1160,6 @@ int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
1165 1160
1166 mutex_lock(&vcpu->kvm->lock); 1161 mutex_lock(&vcpu->kvm->lock);
1167 vcpu->arch.cpu_id = vcpu->kvm->arch.model.cpu_id; 1162 vcpu->arch.cpu_id = vcpu->kvm->arch.model.cpu_id;
1168 memcpy(vcpu->kvm->arch.model.fac->sie, vcpu->kvm->arch.model.fac->kvm,
1169 S390_ARCH_FAC_LIST_SIZE_BYTE);
1170 vcpu->arch.sie_block->ibc = vcpu->kvm->arch.model.ibc; 1163 vcpu->arch.sie_block->ibc = vcpu->kvm->arch.model.ibc;
1171 mutex_unlock(&vcpu->kvm->lock); 1164 mutex_unlock(&vcpu->kvm->lock);
1172 1165
@@ -1212,7 +1205,7 @@ struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
1212 vcpu->arch.sie_block->scaol = (__u32)(__u64)kvm->arch.sca; 1205 vcpu->arch.sie_block->scaol = (__u32)(__u64)kvm->arch.sca;
1213 set_bit(63 - id, (unsigned long *) &kvm->arch.sca->mcn); 1206 set_bit(63 - id, (unsigned long *) &kvm->arch.sca->mcn);
1214 } 1207 }
1215 vcpu->arch.sie_block->fac = (int) (long) kvm->arch.model.fac->sie; 1208 vcpu->arch.sie_block->fac = (int) (long) kvm->arch.model.fac->list;
1216 1209
1217 spin_lock_init(&vcpu->arch.local_int.lock); 1210 spin_lock_init(&vcpu->arch.local_int.lock);
1218 vcpu->arch.local_int.float_int = &kvm->arch.float_int; 1211 vcpu->arch.local_int.float_int = &kvm->arch.float_int;
diff --git a/arch/s390/kvm/kvm-s390.h b/arch/s390/kvm/kvm-s390.h
index 985c2114d7ef..c34109aa552d 100644
--- a/arch/s390/kvm/kvm-s390.h
+++ b/arch/s390/kvm/kvm-s390.h
@@ -128,7 +128,8 @@ static inline void kvm_s390_set_psw_cc(struct kvm_vcpu *vcpu, unsigned long cc)
128/* test availability of facility in a kvm intance */ 128/* test availability of facility in a kvm intance */
129static inline int test_kvm_facility(struct kvm *kvm, unsigned long nr) 129static inline int test_kvm_facility(struct kvm *kvm, unsigned long nr)
130{ 130{
131 return __test_facility(nr, kvm->arch.model.fac->kvm); 131 return __test_facility(nr, kvm->arch.model.fac->mask) &&
132 __test_facility(nr, kvm->arch.model.fac->list);
132} 133}
133 134
134/* are cpu states controlled by user space */ 135/* are cpu states controlled by user space */
diff --git a/arch/s390/kvm/priv.c b/arch/s390/kvm/priv.c
index bdd9b5b17e03..351116939ea2 100644
--- a/arch/s390/kvm/priv.c
+++ b/arch/s390/kvm/priv.c
@@ -348,7 +348,7 @@ static int handle_stfl(struct kvm_vcpu *vcpu)
348 * We need to shift the lower 32 facility bits (bit 0-31) from a u64 348 * We need to shift the lower 32 facility bits (bit 0-31) from a u64
349 * into a u32 memory representation. They will remain bits 0-31. 349 * into a u32 memory representation. They will remain bits 0-31.
350 */ 350 */
351 fac = *vcpu->kvm->arch.model.fac->sie >> 32; 351 fac = *vcpu->kvm->arch.model.fac->list >> 32;
352 rc = write_guest_lc(vcpu, offsetof(struct _lowcore, stfl_fac_list), 352 rc = write_guest_lc(vcpu, offsetof(struct _lowcore, stfl_fac_list),
353 &fac, sizeof(fac)); 353 &fac, sizeof(fac));
354 if (rc) 354 if (rc)
diff --git a/arch/s390/mm/mmap.c b/arch/s390/mm/mmap.c
index d008f638b2cd..179a2c20b01f 100644
--- a/arch/s390/mm/mmap.c
+++ b/arch/s390/mm/mmap.c
@@ -183,7 +183,10 @@ unsigned long randomize_et_dyn(void)
183{ 183{
184 unsigned long base; 184 unsigned long base;
185 185
186 base = (STACK_TOP / 3 * 2) & (~mmap_align_mask << PAGE_SHIFT); 186 base = STACK_TOP / 3 * 2;
187 if (!is_32bit_task())
188 /* Align to 4GB */
189 base &= ~((1UL << 32) - 1);
187 return base + mmap_rnd(); 190 return base + mmap_rnd();
188} 191}
189 192
diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c
index 753a56731951..f0b85443e060 100644
--- a/arch/s390/pci/pci.c
+++ b/arch/s390/pci/pci.c
@@ -287,7 +287,7 @@ void __iomem *pci_iomap_range(struct pci_dev *pdev,
287 addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48); 287 addr = ZPCI_IOMAP_ADDR_BASE | ((u64) idx << 48);
288 return (void __iomem *) addr + offset; 288 return (void __iomem *) addr + offset;
289} 289}
290EXPORT_SYMBOL_GPL(pci_iomap_range); 290EXPORT_SYMBOL(pci_iomap_range);
291 291
292void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen) 292void __iomem *pci_iomap(struct pci_dev *dev, int bar, unsigned long maxlen)
293{ 293{
@@ -309,7 +309,7 @@ void pci_iounmap(struct pci_dev *pdev, void __iomem *addr)
309 } 309 }
310 spin_unlock(&zpci_iomap_lock); 310 spin_unlock(&zpci_iomap_lock);
311} 311}
312EXPORT_SYMBOL_GPL(pci_iounmap); 312EXPORT_SYMBOL(pci_iounmap);
313 313
314static int pci_read(struct pci_bus *bus, unsigned int devfn, int where, 314static int pci_read(struct pci_bus *bus, unsigned int devfn, int where,
315 int size, u32 *val) 315 int size, u32 *val)
@@ -483,9 +483,8 @@ void arch_teardown_msi_irqs(struct pci_dev *pdev)
483 airq_iv_free_bit(zpci_aisb_iv, zdev->aisb); 483 airq_iv_free_bit(zpci_aisb_iv, zdev->aisb);
484} 484}
485 485
486static void zpci_map_resources(struct zpci_dev *zdev) 486static void zpci_map_resources(struct pci_dev *pdev)
487{ 487{
488 struct pci_dev *pdev = zdev->pdev;
489 resource_size_t len; 488 resource_size_t len;
490 int i; 489 int i;
491 490
@@ -499,9 +498,8 @@ static void zpci_map_resources(struct zpci_dev *zdev)
499 } 498 }
500} 499}
501 500
502static void zpci_unmap_resources(struct zpci_dev *zdev) 501static void zpci_unmap_resources(struct pci_dev *pdev)
503{ 502{
504 struct pci_dev *pdev = zdev->pdev;
505 resource_size_t len; 503 resource_size_t len;
506 int i; 504 int i;
507 505
@@ -651,7 +649,7 @@ int pcibios_add_device(struct pci_dev *pdev)
651 649
652 zdev->pdev = pdev; 650 zdev->pdev = pdev;
653 pdev->dev.groups = zpci_attr_groups; 651 pdev->dev.groups = zpci_attr_groups;
654 zpci_map_resources(zdev); 652 zpci_map_resources(pdev);
655 653
656 for (i = 0; i < PCI_BAR_COUNT; i++) { 654 for (i = 0; i < PCI_BAR_COUNT; i++) {
657 res = &pdev->resource[i]; 655 res = &pdev->resource[i];
@@ -663,6 +661,11 @@ int pcibios_add_device(struct pci_dev *pdev)
663 return 0; 661 return 0;
664} 662}
665 663
664void pcibios_release_device(struct pci_dev *pdev)
665{
666 zpci_unmap_resources(pdev);
667}
668
666int pcibios_enable_device(struct pci_dev *pdev, int mask) 669int pcibios_enable_device(struct pci_dev *pdev, int mask)
667{ 670{
668 struct zpci_dev *zdev = get_zdev(pdev); 671 struct zpci_dev *zdev = get_zdev(pdev);
@@ -670,7 +673,6 @@ int pcibios_enable_device(struct pci_dev *pdev, int mask)
670 zdev->pdev = pdev; 673 zdev->pdev = pdev;
671 zpci_debug_init_device(zdev); 674 zpci_debug_init_device(zdev);
672 zpci_fmb_enable_device(zdev); 675 zpci_fmb_enable_device(zdev);
673 zpci_map_resources(zdev);
674 676
675 return pci_enable_resources(pdev, mask); 677 return pci_enable_resources(pdev, mask);
676} 678}
@@ -679,7 +681,6 @@ void pcibios_disable_device(struct pci_dev *pdev)
679{ 681{
680 struct zpci_dev *zdev = get_zdev(pdev); 682 struct zpci_dev *zdev = get_zdev(pdev);
681 683
682 zpci_unmap_resources(zdev);
683 zpci_fmb_disable_device(zdev); 684 zpci_fmb_disable_device(zdev);
684 zpci_debug_exit_device(zdev); 685 zpci_debug_exit_device(zdev);
685 zdev->pdev = NULL; 686 zdev->pdev = NULL;
@@ -688,7 +689,8 @@ void pcibios_disable_device(struct pci_dev *pdev)
688#ifdef CONFIG_HIBERNATE_CALLBACKS 689#ifdef CONFIG_HIBERNATE_CALLBACKS
689static int zpci_restore(struct device *dev) 690static int zpci_restore(struct device *dev)
690{ 691{
691 struct zpci_dev *zdev = get_zdev(to_pci_dev(dev)); 692 struct pci_dev *pdev = to_pci_dev(dev);
693 struct zpci_dev *zdev = get_zdev(pdev);
692 int ret = 0; 694 int ret = 0;
693 695
694 if (zdev->state != ZPCI_FN_STATE_ONLINE) 696 if (zdev->state != ZPCI_FN_STATE_ONLINE)
@@ -698,7 +700,7 @@ static int zpci_restore(struct device *dev)
698 if (ret) 700 if (ret)
699 goto out; 701 goto out;
700 702
701 zpci_map_resources(zdev); 703 zpci_map_resources(pdev);
702 zpci_register_ioat(zdev, 0, zdev->start_dma + PAGE_OFFSET, 704 zpci_register_ioat(zdev, 0, zdev->start_dma + PAGE_OFFSET,
703 zdev->start_dma + zdev->iommu_size - 1, 705 zdev->start_dma + zdev->iommu_size - 1,
704 (u64) zdev->dma_table); 706 (u64) zdev->dma_table);
@@ -709,12 +711,14 @@ out:
709 711
710static int zpci_freeze(struct device *dev) 712static int zpci_freeze(struct device *dev)
711{ 713{
712 struct zpci_dev *zdev = get_zdev(to_pci_dev(dev)); 714 struct pci_dev *pdev = to_pci_dev(dev);
715 struct zpci_dev *zdev = get_zdev(pdev);
713 716
714 if (zdev->state != ZPCI_FN_STATE_ONLINE) 717 if (zdev->state != ZPCI_FN_STATE_ONLINE)
715 return 0; 718 return 0;
716 719
717 zpci_unregister_ioat(zdev, 0); 720 zpci_unregister_ioat(zdev, 0);
721 zpci_unmap_resources(pdev);
718 return clp_disable_fh(zdev); 722 return clp_disable_fh(zdev);
719} 723}
720 724
diff --git a/arch/s390/pci/pci_mmio.c b/arch/s390/pci/pci_mmio.c
index 8aa271b3d1ad..b1bb2b72302c 100644
--- a/arch/s390/pci/pci_mmio.c
+++ b/arch/s390/pci/pci_mmio.c
@@ -64,8 +64,7 @@ SYSCALL_DEFINE3(s390_pci_mmio_write, unsigned long, mmio_addr,
64 if (copy_from_user(buf, user_buffer, length)) 64 if (copy_from_user(buf, user_buffer, length))
65 goto out; 65 goto out;
66 66
67 memcpy_toio(io_addr, buf, length); 67 ret = zpci_memcpy_toio(io_addr, buf, length);
68 ret = 0;
69out: 68out:
70 if (buf != local_buf) 69 if (buf != local_buf)
71 kfree(buf); 70 kfree(buf);
@@ -98,16 +97,16 @@ SYSCALL_DEFINE3(s390_pci_mmio_read, unsigned long, mmio_addr,
98 goto out; 97 goto out;
99 io_addr = (void __iomem *)((pfn << PAGE_SHIFT) | (mmio_addr & ~PAGE_MASK)); 98 io_addr = (void __iomem *)((pfn << PAGE_SHIFT) | (mmio_addr & ~PAGE_MASK));
100 99
101 ret = -EFAULT; 100 if ((unsigned long) io_addr < ZPCI_IOMAP_ADDR_BASE) {
102 if ((unsigned long) io_addr < ZPCI_IOMAP_ADDR_BASE) 101 ret = -EFAULT;
103 goto out; 102 goto out;
104 103 }
105 memcpy_fromio(buf, io_addr, length); 104 ret = zpci_memcpy_fromio(buf, io_addr, length);
106 105 if (ret)
107 if (copy_to_user(user_buffer, buf, length))
108 goto out; 106 goto out;
107 if (copy_to_user(user_buffer, buf, length))
108 ret = -EFAULT;
109 109
110 ret = 0;
111out: 110out:
112 if (buf != local_buf) 111 if (buf != local_buf)
113 kfree(buf); 112 kfree(buf);
diff --git a/arch/sparc/Kconfig b/arch/sparc/Kconfig
index 96ac69c5eba0..efb00ec75805 100644
--- a/arch/sparc/Kconfig
+++ b/arch/sparc/Kconfig
@@ -86,6 +86,9 @@ config ARCH_DEFCONFIG
86 default "arch/sparc/configs/sparc32_defconfig" if SPARC32 86 default "arch/sparc/configs/sparc32_defconfig" if SPARC32
87 default "arch/sparc/configs/sparc64_defconfig" if SPARC64 87 default "arch/sparc/configs/sparc64_defconfig" if SPARC64
88 88
89config ARCH_PROC_KCORE_TEXT
90 def_bool y
91
89config IOMMU_HELPER 92config IOMMU_HELPER
90 bool 93 bool
91 default y if SPARC64 94 default y if SPARC64
diff --git a/arch/sparc/include/asm/io_64.h b/arch/sparc/include/asm/io_64.h
index 9b672be70dda..50d4840d9aeb 100644
--- a/arch/sparc/include/asm/io_64.h
+++ b/arch/sparc/include/asm/io_64.h
@@ -407,16 +407,16 @@ static inline void iounmap(volatile void __iomem *addr)
407{ 407{
408} 408}
409 409
410#define ioread8(X) readb(X) 410#define ioread8 readb
411#define ioread16(X) readw(X) 411#define ioread16 readw
412#define ioread16be(X) __raw_readw(X) 412#define ioread16be __raw_readw
413#define ioread32(X) readl(X) 413#define ioread32 readl
414#define ioread32be(X) __raw_readl(X) 414#define ioread32be __raw_readl
415#define iowrite8(val,X) writeb(val,X) 415#define iowrite8 writeb
416#define iowrite16(val,X) writew(val,X) 416#define iowrite16 writew
417#define iowrite16be(val,X) __raw_writew(val,X) 417#define iowrite16be __raw_writew
418#define iowrite32(val,X) writel(val,X) 418#define iowrite32 writel
419#define iowrite32be(val,X) __raw_writel(val,X) 419#define iowrite32be __raw_writel
420 420
421/* Create a virtual mapping cookie for an IO port range */ 421/* Create a virtual mapping cookie for an IO port range */
422void __iomem *ioport_map(unsigned long port, unsigned int nr); 422void __iomem *ioport_map(unsigned long port, unsigned int nr);
diff --git a/arch/sparc/include/asm/starfire.h b/arch/sparc/include/asm/starfire.h
index c100dc27a0a9..176fa0ad19f1 100644
--- a/arch/sparc/include/asm/starfire.h
+++ b/arch/sparc/include/asm/starfire.h
@@ -12,7 +12,6 @@
12extern int this_is_starfire; 12extern int this_is_starfire;
13 13
14void check_if_starfire(void); 14void check_if_starfire(void);
15int starfire_hard_smp_processor_id(void);
16void starfire_hookup(int); 15void starfire_hookup(int);
17unsigned int starfire_translate(unsigned long imap, unsigned int upaid); 16unsigned int starfire_translate(unsigned long imap, unsigned int upaid);
18 17
diff --git a/arch/sparc/kernel/entry.h b/arch/sparc/kernel/entry.h
index 88d322b67fac..07cc49e541f4 100644
--- a/arch/sparc/kernel/entry.h
+++ b/arch/sparc/kernel/entry.h
@@ -98,11 +98,7 @@ void sun4v_do_mna(struct pt_regs *regs,
98void do_privop(struct pt_regs *regs); 98void do_privop(struct pt_regs *regs);
99void do_privact(struct pt_regs *regs); 99void do_privact(struct pt_regs *regs);
100void do_cee(struct pt_regs *regs); 100void do_cee(struct pt_regs *regs);
101void do_cee_tl1(struct pt_regs *regs);
102void do_dae_tl1(struct pt_regs *regs);
103void do_iae_tl1(struct pt_regs *regs);
104void do_div0_tl1(struct pt_regs *regs); 101void do_div0_tl1(struct pt_regs *regs);
105void do_fpdis_tl1(struct pt_regs *regs);
106void do_fpieee_tl1(struct pt_regs *regs); 102void do_fpieee_tl1(struct pt_regs *regs);
107void do_fpother_tl1(struct pt_regs *regs); 103void do_fpother_tl1(struct pt_regs *regs);
108void do_ill_tl1(struct pt_regs *regs); 104void do_ill_tl1(struct pt_regs *regs);
diff --git a/arch/sparc/kernel/smp_64.c b/arch/sparc/kernel/smp_64.c
index da6f1a7fc4db..61139d9924ca 100644
--- a/arch/sparc/kernel/smp_64.c
+++ b/arch/sparc/kernel/smp_64.c
@@ -1406,11 +1406,32 @@ void __irq_entry smp_receive_signal_client(int irq, struct pt_regs *regs)
1406 scheduler_ipi(); 1406 scheduler_ipi();
1407} 1407}
1408 1408
1409/* This is a nop because we capture all other cpus 1409static void stop_this_cpu(void *dummy)
1410 * anyways when making the PROM active. 1410{
1411 */ 1411 prom_stopself();
1412}
1413
1412void smp_send_stop(void) 1414void smp_send_stop(void)
1413{ 1415{
1416 int cpu;
1417
1418 if (tlb_type == hypervisor) {
1419 for_each_online_cpu(cpu) {
1420 if (cpu == smp_processor_id())
1421 continue;
1422#ifdef CONFIG_SUN_LDOMS
1423 if (ldom_domaining_enabled) {
1424 unsigned long hv_err;
1425 hv_err = sun4v_cpu_stop(cpu);
1426 if (hv_err)
1427 printk(KERN_ERR "sun4v_cpu_stop() "
1428 "failed err=%lu\n", hv_err);
1429 } else
1430#endif
1431 prom_stopcpu_cpuid(cpu);
1432 }
1433 } else
1434 smp_call_function(stop_this_cpu, NULL, 0);
1414} 1435}
1415 1436
1416/** 1437/**
diff --git a/arch/sparc/kernel/starfire.c b/arch/sparc/kernel/starfire.c
index 82281a566bb8..167fdfd9c837 100644
--- a/arch/sparc/kernel/starfire.c
+++ b/arch/sparc/kernel/starfire.c
@@ -28,11 +28,6 @@ void check_if_starfire(void)
28 this_is_starfire = 1; 28 this_is_starfire = 1;
29} 29}
30 30
31int starfire_hard_smp_processor_id(void)
32{
33 return upa_readl(0x1fff40000d0UL);
34}
35
36/* 31/*
37 * Each Starfire board has 32 registers which perform translation 32 * Each Starfire board has 32 registers which perform translation
38 * and delivery of traditional interrupt packets into the extended 33 * and delivery of traditional interrupt packets into the extended
diff --git a/arch/sparc/kernel/sys_sparc_64.c b/arch/sparc/kernel/sys_sparc_64.c
index c85403d0496c..30e7ddb27a3a 100644
--- a/arch/sparc/kernel/sys_sparc_64.c
+++ b/arch/sparc/kernel/sys_sparc_64.c
@@ -333,7 +333,7 @@ SYSCALL_DEFINE6(sparc_ipc, unsigned int, call, int, first, unsigned long, second
333 long err; 333 long err;
334 334
335 /* No need for backward compatibility. We can start fresh... */ 335 /* No need for backward compatibility. We can start fresh... */
336 if (call <= SEMCTL) { 336 if (call <= SEMTIMEDOP) {
337 switch (call) { 337 switch (call) {
338 case SEMOP: 338 case SEMOP:
339 err = sys_semtimedop(first, ptr, 339 err = sys_semtimedop(first, ptr,
diff --git a/arch/sparc/kernel/traps_64.c b/arch/sparc/kernel/traps_64.c
index a27651e866e7..0e699745d643 100644
--- a/arch/sparc/kernel/traps_64.c
+++ b/arch/sparc/kernel/traps_64.c
@@ -2427,6 +2427,8 @@ void __noreturn die_if_kernel(char *str, struct pt_regs *regs)
2427 } 2427 }
2428 user_instruction_dump ((unsigned int __user *) regs->tpc); 2428 user_instruction_dump ((unsigned int __user *) regs->tpc);
2429 } 2429 }
2430 if (panic_on_oops)
2431 panic("Fatal exception");
2430 if (regs->tstate & TSTATE_PRIV) 2432 if (regs->tstate & TSTATE_PRIV)
2431 do_exit(SIGKILL); 2433 do_exit(SIGKILL);
2432 do_exit(SIGSEGV); 2434 do_exit(SIGSEGV);
@@ -2564,27 +2566,6 @@ void do_cee(struct pt_regs *regs)
2564 die_if_kernel("TL0: Cache Error Exception", regs); 2566 die_if_kernel("TL0: Cache Error Exception", regs);
2565} 2567}
2566 2568
2567void do_cee_tl1(struct pt_regs *regs)
2568{
2569 exception_enter();
2570 dump_tl1_traplog((struct tl1_traplog *)(regs + 1));
2571 die_if_kernel("TL1: Cache Error Exception", regs);
2572}
2573
2574void do_dae_tl1(struct pt_regs *regs)
2575{
2576 exception_enter();
2577 dump_tl1_traplog((struct tl1_traplog *)(regs + 1));
2578 die_if_kernel("TL1: Data Access Exception", regs);
2579}
2580
2581void do_iae_tl1(struct pt_regs *regs)
2582{
2583 exception_enter();
2584 dump_tl1_traplog((struct tl1_traplog *)(regs + 1));
2585 die_if_kernel("TL1: Instruction Access Exception", regs);
2586}
2587
2588void do_div0_tl1(struct pt_regs *regs) 2569void do_div0_tl1(struct pt_regs *regs)
2589{ 2570{
2590 exception_enter(); 2571 exception_enter();
@@ -2592,13 +2573,6 @@ void do_div0_tl1(struct pt_regs *regs)
2592 die_if_kernel("TL1: DIV0 Exception", regs); 2573 die_if_kernel("TL1: DIV0 Exception", regs);
2593} 2574}
2594 2575
2595void do_fpdis_tl1(struct pt_regs *regs)
2596{
2597 exception_enter();
2598 dump_tl1_traplog((struct tl1_traplog *)(regs + 1));
2599 die_if_kernel("TL1: FPU Disabled", regs);
2600}
2601
2602void do_fpieee_tl1(struct pt_regs *regs) 2576void do_fpieee_tl1(struct pt_regs *regs)
2603{ 2577{
2604 exception_enter(); 2578 exception_enter();
diff --git a/arch/sparc/mm/init_64.c b/arch/sparc/mm/init_64.c
index 3ea267c53320..4ca0d6ba5ec8 100644
--- a/arch/sparc/mm/init_64.c
+++ b/arch/sparc/mm/init_64.c
@@ -2820,7 +2820,7 @@ static int __init report_memory(void)
2820 2820
2821 return 0; 2821 return 0;
2822} 2822}
2823device_initcall(report_memory); 2823arch_initcall(report_memory);
2824 2824
2825#ifdef CONFIG_SMP 2825#ifdef CONFIG_SMP
2826#define do_flush_tlb_kernel_range smp_flush_tlb_kernel_range 2826#define do_flush_tlb_kernel_range smp_flush_tlb_kernel_range
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index eb1cf898ed3c..b7d31ca55187 100644
--- a/arch/x86/Kconfig
+++ b/arch/x86/Kconfig
@@ -488,6 +488,23 @@ config X86_INTEL_MID
488 Intel MID platforms are based on an Intel processor and chipset which 488 Intel MID platforms are based on an Intel processor and chipset which
489 consume less power than most of the x86 derivatives. 489 consume less power than most of the x86 derivatives.
490 490
491config X86_INTEL_QUARK
492 bool "Intel Quark platform support"
493 depends on X86_32
494 depends on X86_EXTENDED_PLATFORM
495 depends on X86_PLATFORM_DEVICES
496 depends on X86_TSC
497 depends on PCI
498 depends on PCI_GOANY
499 depends on X86_IO_APIC
500 select IOSF_MBI
501 select INTEL_IMR
502 select COMMON_CLK
503 ---help---
504 Select to include support for Quark X1000 SoC.
505 Say Y here if you have a Quark based system such as the Arduino
506 compatible Intel Galileo.
507
491config X86_INTEL_LPSS 508config X86_INTEL_LPSS
492 bool "Intel Low Power Subsystem Support" 509 bool "Intel Low Power Subsystem Support"
493 depends on ACPI 510 depends on ACPI
diff --git a/arch/x86/Kconfig.debug b/arch/x86/Kconfig.debug
index 61bd2ad94281..20028da8ae18 100644
--- a/arch/x86/Kconfig.debug
+++ b/arch/x86/Kconfig.debug
@@ -313,6 +313,19 @@ config DEBUG_NMI_SELFTEST
313 313
314 If unsure, say N. 314 If unsure, say N.
315 315
316config DEBUG_IMR_SELFTEST
317 bool "Isolated Memory Region self test"
318 default n
319 depends on INTEL_IMR
320 ---help---
321 This option enables automated sanity testing of the IMR code.
322 Some simple tests are run to verify IMR bounds checking, alignment
323 and overlapping. This option is really only useful if you are
324 debugging an IMR memory map or are modifying the IMR code and want to
325 test your changes.
326
327 If unsure say N here.
328
316config X86_DEBUG_STATIC_CPU_HAS 329config X86_DEBUG_STATIC_CPU_HAS
317 bool "Debug alternatives" 330 bool "Debug alternatives"
318 depends on DEBUG_KERNEL 331 depends on DEBUG_KERNEL
diff --git a/arch/x86/boot/compressed/Makefile b/arch/x86/boot/compressed/Makefile
index 843feb3eb20b..0a291cdfaf77 100644
--- a/arch/x86/boot/compressed/Makefile
+++ b/arch/x86/boot/compressed/Makefile
@@ -51,6 +51,7 @@ $(obj)/eboot.o: KBUILD_CFLAGS += -fshort-wchar -mno-red-zone
51 51
52vmlinux-objs-$(CONFIG_EFI_STUB) += $(obj)/eboot.o $(obj)/efi_stub_$(BITS).o \ 52vmlinux-objs-$(CONFIG_EFI_STUB) += $(obj)/eboot.o $(obj)/efi_stub_$(BITS).o \
53 $(objtree)/drivers/firmware/efi/libstub/lib.a 53 $(objtree)/drivers/firmware/efi/libstub/lib.a
54vmlinux-objs-$(CONFIG_EFI_MIXED) += $(obj)/efi_thunk_$(BITS).o
54 55
55$(obj)/vmlinux: $(vmlinux-objs-y) FORCE 56$(obj)/vmlinux: $(vmlinux-objs-y) FORCE
56 $(call if_changed,ld) 57 $(call if_changed,ld)
diff --git a/arch/x86/boot/compressed/efi_stub_64.S b/arch/x86/boot/compressed/efi_stub_64.S
index 7ff3632806b1..99494dff2113 100644
--- a/arch/x86/boot/compressed/efi_stub_64.S
+++ b/arch/x86/boot/compressed/efi_stub_64.S
@@ -3,28 +3,3 @@
3#include <asm/processor-flags.h> 3#include <asm/processor-flags.h>
4 4
5#include "../../platform/efi/efi_stub_64.S" 5#include "../../platform/efi/efi_stub_64.S"
6
7#ifdef CONFIG_EFI_MIXED
8 .code64
9 .text
10ENTRY(efi64_thunk)
11 push %rbp
12 push %rbx
13
14 subq $16, %rsp
15 leaq efi_exit32(%rip), %rax
16 movl %eax, 8(%rsp)
17 leaq efi_gdt64(%rip), %rax
18 movl %eax, 4(%rsp)
19 movl %eax, 2(%rax) /* Fixup the gdt base address */
20 leaq efi32_boot_gdt(%rip), %rax
21 movl %eax, (%rsp)
22
23 call __efi64_thunk
24
25 addq $16, %rsp
26 pop %rbx
27 pop %rbp
28 ret
29ENDPROC(efi64_thunk)
30#endif /* CONFIG_EFI_MIXED */
diff --git a/arch/x86/boot/compressed/efi_thunk_64.S b/arch/x86/boot/compressed/efi_thunk_64.S
new file mode 100644
index 000000000000..630384a4c14a
--- /dev/null
+++ b/arch/x86/boot/compressed/efi_thunk_64.S
@@ -0,0 +1,196 @@
1/*
2 * Copyright (C) 2014, 2015 Intel Corporation; author Matt Fleming
3 *
4 * Early support for invoking 32-bit EFI services from a 64-bit kernel.
5 *
6 * Because this thunking occurs before ExitBootServices() we have to
7 * restore the firmware's 32-bit GDT before we make EFI serivce calls,
8 * since the firmware's 32-bit IDT is still currently installed and it
9 * needs to be able to service interrupts.
10 *
11 * On the plus side, we don't have to worry about mangling 64-bit
12 * addresses into 32-bits because we're executing with an identify
13 * mapped pagetable and haven't transitioned to 64-bit virtual addresses
14 * yet.
15 */
16
17#include <linux/linkage.h>
18#include <asm/msr.h>
19#include <asm/page_types.h>
20#include <asm/processor-flags.h>
21#include <asm/segment.h>
22
23 .code64
24 .text
25ENTRY(efi64_thunk)
26 push %rbp
27 push %rbx
28
29 subq $8, %rsp
30 leaq efi_exit32(%rip), %rax
31 movl %eax, 4(%rsp)
32 leaq efi_gdt64(%rip), %rax
33 movl %eax, (%rsp)
34 movl %eax, 2(%rax) /* Fixup the gdt base address */
35
36 movl %ds, %eax
37 push %rax
38 movl %es, %eax
39 push %rax
40 movl %ss, %eax
41 push %rax
42
43 /*
44 * Convert x86-64 ABI params to i386 ABI
45 */
46 subq $32, %rsp
47 movl %esi, 0x0(%rsp)
48 movl %edx, 0x4(%rsp)
49 movl %ecx, 0x8(%rsp)
50 movq %r8, %rsi
51 movl %esi, 0xc(%rsp)
52 movq %r9, %rsi
53 movl %esi, 0x10(%rsp)
54
55 sgdt save_gdt(%rip)
56
57 leaq 1f(%rip), %rbx
58 movq %rbx, func_rt_ptr(%rip)
59
60 /*
61 * Switch to gdt with 32-bit segments. This is the firmware GDT
62 * that was installed when the kernel started executing. This
63 * pointer was saved at the EFI stub entry point in head_64.S.
64 */
65 leaq efi32_boot_gdt(%rip), %rax
66 lgdt (%rax)
67
68 pushq $__KERNEL_CS
69 leaq efi_enter32(%rip), %rax
70 pushq %rax
71 lretq
72
731: addq $32, %rsp
74
75 lgdt save_gdt(%rip)
76
77 pop %rbx
78 movl %ebx, %ss
79 pop %rbx
80 movl %ebx, %es
81 pop %rbx
82 movl %ebx, %ds
83
84 /*
85 * Convert 32-bit status code into 64-bit.
86 */
87 test %rax, %rax
88 jz 1f
89 movl %eax, %ecx
90 andl $0x0fffffff, %ecx
91 andl $0xf0000000, %eax
92 shl $32, %rax
93 or %rcx, %rax
941:
95 addq $8, %rsp
96 pop %rbx
97 pop %rbp
98 ret
99ENDPROC(efi64_thunk)
100
101ENTRY(efi_exit32)
102 movq func_rt_ptr(%rip), %rax
103 push %rax
104 mov %rdi, %rax
105 ret
106ENDPROC(efi_exit32)
107
108 .code32
109/*
110 * EFI service pointer must be in %edi.
111 *
112 * The stack should represent the 32-bit calling convention.
113 */
114ENTRY(efi_enter32)
115 movl $__KERNEL_DS, %eax
116 movl %eax, %ds
117 movl %eax, %es
118 movl %eax, %ss
119
120 /* Reload pgtables */
121 movl %cr3, %eax
122 movl %eax, %cr3
123
124 /* Disable paging */
125 movl %cr0, %eax
126 btrl $X86_CR0_PG_BIT, %eax
127 movl %eax, %cr0
128
129 /* Disable long mode via EFER */
130 movl $MSR_EFER, %ecx
131 rdmsr
132 btrl $_EFER_LME, %eax
133 wrmsr
134
135 call *%edi
136
137 /* We must preserve return value */
138 movl %eax, %edi
139
140 /*
141 * Some firmware will return with interrupts enabled. Be sure to
142 * disable them before we switch GDTs.
143 */
144 cli
145
146 movl 56(%esp), %eax
147 movl %eax, 2(%eax)
148 lgdtl (%eax)
149
150 movl %cr4, %eax
151 btsl $(X86_CR4_PAE_BIT), %eax
152 movl %eax, %cr4
153
154 movl %cr3, %eax
155 movl %eax, %cr3
156
157 movl $MSR_EFER, %ecx
158 rdmsr
159 btsl $_EFER_LME, %eax
160 wrmsr
161
162 xorl %eax, %eax
163 lldt %ax
164
165 movl 60(%esp), %eax
166 pushl $__KERNEL_CS
167 pushl %eax
168
169 /* Enable paging */
170 movl %cr0, %eax
171 btsl $X86_CR0_PG_BIT, %eax
172 movl %eax, %cr0
173 lret
174ENDPROC(efi_enter32)
175
176 .data
177 .balign 8
178 .global efi32_boot_gdt
179efi32_boot_gdt: .word 0
180 .quad 0
181
182save_gdt: .word 0
183 .quad 0
184func_rt_ptr: .quad 0
185
186 .global efi_gdt64
187efi_gdt64:
188 .word efi_gdt64_end - efi_gdt64
189 .long 0 /* Filled out by user */
190 .word 0
191 .quad 0x0000000000000000 /* NULL descriptor */
192 .quad 0x00af9a000000ffff /* __KERNEL_CS */
193 .quad 0x00cf92000000ffff /* __KERNEL_DS */
194 .quad 0x0080890000000000 /* TS descriptor */
195 .quad 0x0000000000000000 /* TS continued */
196efi_gdt64_end:
diff --git a/arch/x86/crypto/aesni-intel_glue.c b/arch/x86/crypto/aesni-intel_glue.c
index 947c6bf52c33..54f60ab41c63 100644
--- a/arch/x86/crypto/aesni-intel_glue.c
+++ b/arch/x86/crypto/aesni-intel_glue.c
@@ -1155,7 +1155,7 @@ static int __driver_rfc4106_decrypt(struct aead_request *req)
1155 src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC); 1155 src = kmalloc(req->cryptlen + req->assoclen, GFP_ATOMIC);
1156 if (!src) 1156 if (!src)
1157 return -ENOMEM; 1157 return -ENOMEM;
1158 assoc = (src + req->cryptlen + auth_tag_len); 1158 assoc = (src + req->cryptlen);
1159 scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0); 1159 scatterwalk_map_and_copy(src, req->src, 0, req->cryptlen, 0);
1160 scatterwalk_map_and_copy(assoc, req->assoc, 0, 1160 scatterwalk_map_and_copy(assoc, req->assoc, 0,
1161 req->assoclen, 0); 1161 req->assoclen, 0);
@@ -1180,7 +1180,7 @@ static int __driver_rfc4106_decrypt(struct aead_request *req)
1180 scatterwalk_done(&src_sg_walk, 0, 0); 1180 scatterwalk_done(&src_sg_walk, 0, 0);
1181 scatterwalk_done(&assoc_sg_walk, 0, 0); 1181 scatterwalk_done(&assoc_sg_walk, 0, 0);
1182 } else { 1182 } else {
1183 scatterwalk_map_and_copy(dst, req->dst, 0, req->cryptlen, 1); 1183 scatterwalk_map_and_copy(dst, req->dst, 0, tempCipherLen, 1);
1184 kfree(src); 1184 kfree(src);
1185 } 1185 }
1186 return retval; 1186 return retval;
diff --git a/arch/x86/include/asm/apic.h b/arch/x86/include/asm/apic.h
index 92003f3c8a42..efc3b22d896e 100644
--- a/arch/x86/include/asm/apic.h
+++ b/arch/x86/include/asm/apic.h
@@ -213,7 +213,15 @@ void register_lapic_address(unsigned long address);
213extern void setup_boot_APIC_clock(void); 213extern void setup_boot_APIC_clock(void);
214extern void setup_secondary_APIC_clock(void); 214extern void setup_secondary_APIC_clock(void);
215extern int APIC_init_uniprocessor(void); 215extern int APIC_init_uniprocessor(void);
216
217#ifdef CONFIG_X86_64
218static inline int apic_force_enable(unsigned long addr)
219{
220 return -1;
221}
222#else
216extern int apic_force_enable(unsigned long addr); 223extern int apic_force_enable(unsigned long addr);
224#endif
217 225
218extern int apic_bsp_setup(bool upmode); 226extern int apic_bsp_setup(bool upmode);
219extern void apic_ap_setup(void); 227extern void apic_ap_setup(void);
diff --git a/arch/x86/include/asm/fpu-internal.h b/arch/x86/include/asm/fpu-internal.h
index 0dbc08282291..72ba21a8b5fc 100644
--- a/arch/x86/include/asm/fpu-internal.h
+++ b/arch/x86/include/asm/fpu-internal.h
@@ -370,7 +370,7 @@ static inline void drop_fpu(struct task_struct *tsk)
370 preempt_disable(); 370 preempt_disable();
371 tsk->thread.fpu_counter = 0; 371 tsk->thread.fpu_counter = 0;
372 __drop_fpu(tsk); 372 __drop_fpu(tsk);
373 clear_used_math(); 373 clear_stopped_child_used_math(tsk);
374 preempt_enable(); 374 preempt_enable();
375} 375}
376 376
diff --git a/arch/x86/include/asm/imr.h b/arch/x86/include/asm/imr.h
new file mode 100644
index 000000000000..cd2ce4068441
--- /dev/null
+++ b/arch/x86/include/asm/imr.h
@@ -0,0 +1,60 @@
1/*
2 * imr.h: Isolated Memory Region API
3 *
4 * Copyright(c) 2013 Intel Corporation.
5 * Copyright(c) 2015 Bryan O'Donoghue <pure.logic@nexus-software.ie>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2
10 * of the License.
11 */
12#ifndef _IMR_H
13#define _IMR_H
14
15#include <linux/types.h>
16
17/*
18 * IMR agent access mask bits
19 * See section 12.7.4.7 from quark-x1000-datasheet.pdf for register
20 * definitions.
21 */
22#define IMR_ESRAM_FLUSH BIT(31)
23#define IMR_CPU_SNOOP BIT(30) /* Applicable only to write */
24#define IMR_RMU BIT(29)
25#define IMR_VC1_SAI_ID3 BIT(15)
26#define IMR_VC1_SAI_ID2 BIT(14)
27#define IMR_VC1_SAI_ID1 BIT(13)
28#define IMR_VC1_SAI_ID0 BIT(12)
29#define IMR_VC0_SAI_ID3 BIT(11)
30#define IMR_VC0_SAI_ID2 BIT(10)
31#define IMR_VC0_SAI_ID1 BIT(9)
32#define IMR_VC0_SAI_ID0 BIT(8)
33#define IMR_CPU_0 BIT(1) /* SMM mode */
34#define IMR_CPU BIT(0) /* Non SMM mode */
35#define IMR_ACCESS_NONE 0
36
37/*
38 * Read/Write access-all bits here include some reserved bits
39 * These are the values firmware uses and are accepted by hardware.
40 * The kernel defines read/write access-all in the same way as firmware
41 * in order to have a consistent and crisp definition across firmware,
42 * bootloader and kernel.
43 */
44#define IMR_READ_ACCESS_ALL 0xBFFFFFFF
45#define IMR_WRITE_ACCESS_ALL 0xFFFFFFFF
46
47/* Number of IMRs provided by Quark X1000 SoC */
48#define QUARK_X1000_IMR_MAX 0x08
49#define QUARK_X1000_IMR_REGBASE 0x40
50
51/* IMR alignment bits - only bits 31:10 are checked for IMR validity */
52#define IMR_ALIGN 0x400
53#define IMR_MASK (IMR_ALIGN - 1)
54
55int imr_add_range(phys_addr_t base, size_t size,
56 unsigned int rmask, unsigned int wmask, bool lock);
57
58int imr_remove_range(phys_addr_t base, size_t size);
59
60#endif /* _IMR_H */
diff --git a/arch/x86/include/asm/pci_x86.h b/arch/x86/include/asm/pci_x86.h
index fa1195dae425..164e3f8d3c3d 100644
--- a/arch/x86/include/asm/pci_x86.h
+++ b/arch/x86/include/asm/pci_x86.h
@@ -93,6 +93,8 @@ extern raw_spinlock_t pci_config_lock;
93extern int (*pcibios_enable_irq)(struct pci_dev *dev); 93extern int (*pcibios_enable_irq)(struct pci_dev *dev);
94extern void (*pcibios_disable_irq)(struct pci_dev *dev); 94extern void (*pcibios_disable_irq)(struct pci_dev *dev);
95 95
96extern bool mp_should_keep_irq(struct device *dev);
97
96struct pci_raw_ops { 98struct pci_raw_ops {
97 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn, 99 int (*read)(unsigned int domain, unsigned int bus, unsigned int devfn,
98 int reg, int len, u32 *val); 100 int reg, int len, u32 *val);
diff --git a/arch/x86/include/asm/spinlock.h b/arch/x86/include/asm/spinlock.h
index 7050d864f520..cf87de3fc390 100644
--- a/arch/x86/include/asm/spinlock.h
+++ b/arch/x86/include/asm/spinlock.h
@@ -46,7 +46,7 @@ static __always_inline bool static_key_false(struct static_key *key);
46 46
47static inline void __ticket_enter_slowpath(arch_spinlock_t *lock) 47static inline void __ticket_enter_slowpath(arch_spinlock_t *lock)
48{ 48{
49 set_bit(0, (volatile unsigned long *)&lock->tickets.tail); 49 set_bit(0, (volatile unsigned long *)&lock->tickets.head);
50} 50}
51 51
52#else /* !CONFIG_PARAVIRT_SPINLOCKS */ 52#else /* !CONFIG_PARAVIRT_SPINLOCKS */
@@ -60,10 +60,30 @@ static inline void __ticket_unlock_kick(arch_spinlock_t *lock,
60} 60}
61 61
62#endif /* CONFIG_PARAVIRT_SPINLOCKS */ 62#endif /* CONFIG_PARAVIRT_SPINLOCKS */
63static inline int __tickets_equal(__ticket_t one, __ticket_t two)
64{
65 return !((one ^ two) & ~TICKET_SLOWPATH_FLAG);
66}
67
68static inline void __ticket_check_and_clear_slowpath(arch_spinlock_t *lock,
69 __ticket_t head)
70{
71 if (head & TICKET_SLOWPATH_FLAG) {
72 arch_spinlock_t old, new;
73
74 old.tickets.head = head;
75 new.tickets.head = head & ~TICKET_SLOWPATH_FLAG;
76 old.tickets.tail = new.tickets.head + TICKET_LOCK_INC;
77 new.tickets.tail = old.tickets.tail;
78
79 /* try to clear slowpath flag when there are no contenders */
80 cmpxchg(&lock->head_tail, old.head_tail, new.head_tail);
81 }
82}
63 83
64static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock) 84static __always_inline int arch_spin_value_unlocked(arch_spinlock_t lock)
65{ 85{
66 return lock.tickets.head == lock.tickets.tail; 86 return __tickets_equal(lock.tickets.head, lock.tickets.tail);
67} 87}
68 88
69/* 89/*
@@ -87,18 +107,21 @@ static __always_inline void arch_spin_lock(arch_spinlock_t *lock)
87 if (likely(inc.head == inc.tail)) 107 if (likely(inc.head == inc.tail))
88 goto out; 108 goto out;
89 109
90 inc.tail &= ~TICKET_SLOWPATH_FLAG;
91 for (;;) { 110 for (;;) {
92 unsigned count = SPIN_THRESHOLD; 111 unsigned count = SPIN_THRESHOLD;
93 112
94 do { 113 do {
95 if (READ_ONCE(lock->tickets.head) == inc.tail) 114 inc.head = READ_ONCE(lock->tickets.head);
96 goto out; 115 if (__tickets_equal(inc.head, inc.tail))
116 goto clear_slowpath;
97 cpu_relax(); 117 cpu_relax();
98 } while (--count); 118 } while (--count);
99 __ticket_lock_spinning(lock, inc.tail); 119 __ticket_lock_spinning(lock, inc.tail);
100 } 120 }
101out: barrier(); /* make sure nothing creeps before the lock is taken */ 121clear_slowpath:
122 __ticket_check_and_clear_slowpath(lock, inc.head);
123out:
124 barrier(); /* make sure nothing creeps before the lock is taken */
102} 125}
103 126
104static __always_inline int arch_spin_trylock(arch_spinlock_t *lock) 127static __always_inline int arch_spin_trylock(arch_spinlock_t *lock)
@@ -106,56 +129,30 @@ static __always_inline int arch_spin_trylock(arch_spinlock_t *lock)
106 arch_spinlock_t old, new; 129 arch_spinlock_t old, new;
107 130
108 old.tickets = READ_ONCE(lock->tickets); 131 old.tickets = READ_ONCE(lock->tickets);
109 if (old.tickets.head != (old.tickets.tail & ~TICKET_SLOWPATH_FLAG)) 132 if (!__tickets_equal(old.tickets.head, old.tickets.tail))
110 return 0; 133 return 0;
111 134
112 new.head_tail = old.head_tail + (TICKET_LOCK_INC << TICKET_SHIFT); 135 new.head_tail = old.head_tail + (TICKET_LOCK_INC << TICKET_SHIFT);
136 new.head_tail &= ~TICKET_SLOWPATH_FLAG;
113 137
114 /* cmpxchg is a full barrier, so nothing can move before it */ 138 /* cmpxchg is a full barrier, so nothing can move before it */
115 return cmpxchg(&lock->head_tail, old.head_tail, new.head_tail) == old.head_tail; 139 return cmpxchg(&lock->head_tail, old.head_tail, new.head_tail) == old.head_tail;
116} 140}
117 141
118static inline void __ticket_unlock_slowpath(arch_spinlock_t *lock,
119 arch_spinlock_t old)
120{
121 arch_spinlock_t new;
122
123 BUILD_BUG_ON(((__ticket_t)NR_CPUS) != NR_CPUS);
124
125 /* Perform the unlock on the "before" copy */
126 old.tickets.head += TICKET_LOCK_INC;
127
128 /* Clear the slowpath flag */
129 new.head_tail = old.head_tail & ~(TICKET_SLOWPATH_FLAG << TICKET_SHIFT);
130
131 /*
132 * If the lock is uncontended, clear the flag - use cmpxchg in
133 * case it changes behind our back though.
134 */
135 if (new.tickets.head != new.tickets.tail ||
136 cmpxchg(&lock->head_tail, old.head_tail,
137 new.head_tail) != old.head_tail) {
138 /*
139 * Lock still has someone queued for it, so wake up an
140 * appropriate waiter.
141 */
142 __ticket_unlock_kick(lock, old.tickets.head);
143 }
144}
145
146static __always_inline void arch_spin_unlock(arch_spinlock_t *lock) 142static __always_inline void arch_spin_unlock(arch_spinlock_t *lock)
147{ 143{
148 if (TICKET_SLOWPATH_FLAG && 144 if (TICKET_SLOWPATH_FLAG &&
149 static_key_false(&paravirt_ticketlocks_enabled)) { 145 static_key_false(&paravirt_ticketlocks_enabled)) {
150 arch_spinlock_t prev; 146 __ticket_t head;
151 147
152 prev = *lock; 148 BUILD_BUG_ON(((__ticket_t)NR_CPUS) != NR_CPUS);
153 add_smp(&lock->tickets.head, TICKET_LOCK_INC);
154 149
155 /* add_smp() is a full mb() */ 150 head = xadd(&lock->tickets.head, TICKET_LOCK_INC);
156 151
157 if (unlikely(lock->tickets.tail & TICKET_SLOWPATH_FLAG)) 152 if (unlikely(head & TICKET_SLOWPATH_FLAG)) {
158 __ticket_unlock_slowpath(lock, prev); 153 head &= ~TICKET_SLOWPATH_FLAG;
154 __ticket_unlock_kick(lock, (head + TICKET_LOCK_INC));
155 }
159 } else 156 } else
160 __add(&lock->tickets.head, TICKET_LOCK_INC, UNLOCK_LOCK_PREFIX); 157 __add(&lock->tickets.head, TICKET_LOCK_INC, UNLOCK_LOCK_PREFIX);
161} 158}
@@ -164,14 +161,15 @@ static inline int arch_spin_is_locked(arch_spinlock_t *lock)
164{ 161{
165 struct __raw_tickets tmp = READ_ONCE(lock->tickets); 162 struct __raw_tickets tmp = READ_ONCE(lock->tickets);
166 163
167 return tmp.tail != tmp.head; 164 return !__tickets_equal(tmp.tail, tmp.head);
168} 165}
169 166
170static inline int arch_spin_is_contended(arch_spinlock_t *lock) 167static inline int arch_spin_is_contended(arch_spinlock_t *lock)
171{ 168{
172 struct __raw_tickets tmp = READ_ONCE(lock->tickets); 169 struct __raw_tickets tmp = READ_ONCE(lock->tickets);
173 170
174 return (__ticket_t)(tmp.tail - tmp.head) > TICKET_LOCK_INC; 171 tmp.head &= ~TICKET_SLOWPATH_FLAG;
172 return (tmp.tail - tmp.head) > TICKET_LOCK_INC;
175} 173}
176#define arch_spin_is_contended arch_spin_is_contended 174#define arch_spin_is_contended arch_spin_is_contended
177 175
@@ -191,8 +189,8 @@ static inline void arch_spin_unlock_wait(arch_spinlock_t *lock)
191 * We need to check "unlocked" in a loop, tmp.head == head 189 * We need to check "unlocked" in a loop, tmp.head == head
192 * can be false positive because of overflow. 190 * can be false positive because of overflow.
193 */ 191 */
194 if (tmp.head == (tmp.tail & ~TICKET_SLOWPATH_FLAG) || 192 if (__tickets_equal(tmp.head, tmp.tail) ||
195 tmp.head != head) 193 !__tickets_equal(tmp.head, head))
196 break; 194 break;
197 195
198 cpu_relax(); 196 cpu_relax();
diff --git a/arch/x86/include/asm/xsave.h b/arch/x86/include/asm/xsave.h
index 5fa9770035dc..c9a6d68b8d62 100644
--- a/arch/x86/include/asm/xsave.h
+++ b/arch/x86/include/asm/xsave.h
@@ -82,18 +82,15 @@ static inline int xsave_state_booting(struct xsave_struct *fx, u64 mask)
82 if (boot_cpu_has(X86_FEATURE_XSAVES)) 82 if (boot_cpu_has(X86_FEATURE_XSAVES))
83 asm volatile("1:"XSAVES"\n\t" 83 asm volatile("1:"XSAVES"\n\t"
84 "2:\n\t" 84 "2:\n\t"
85 : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) 85 xstate_fault
86 : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
86 : "memory"); 87 : "memory");
87 else 88 else
88 asm volatile("1:"XSAVE"\n\t" 89 asm volatile("1:"XSAVE"\n\t"
89 "2:\n\t" 90 "2:\n\t"
90 : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) 91 xstate_fault
92 : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
91 : "memory"); 93 : "memory");
92
93 asm volatile(xstate_fault
94 : "0" (0)
95 : "memory");
96
97 return err; 94 return err;
98} 95}
99 96
@@ -112,18 +109,15 @@ static inline int xrstor_state_booting(struct xsave_struct *fx, u64 mask)
112 if (boot_cpu_has(X86_FEATURE_XSAVES)) 109 if (boot_cpu_has(X86_FEATURE_XSAVES))
113 asm volatile("1:"XRSTORS"\n\t" 110 asm volatile("1:"XRSTORS"\n\t"
114 "2:\n\t" 111 "2:\n\t"
115 : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) 112 xstate_fault
113 : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
116 : "memory"); 114 : "memory");
117 else 115 else
118 asm volatile("1:"XRSTOR"\n\t" 116 asm volatile("1:"XRSTOR"\n\t"
119 "2:\n\t" 117 "2:\n\t"
120 : : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) 118 xstate_fault
119 : "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
121 : "memory"); 120 : "memory");
122
123 asm volatile(xstate_fault
124 : "0" (0)
125 : "memory");
126
127 return err; 121 return err;
128} 122}
129 123
@@ -149,9 +143,9 @@ static inline int xsave_state(struct xsave_struct *fx, u64 mask)
149 */ 143 */
150 alternative_input_2( 144 alternative_input_2(
151 "1:"XSAVE, 145 "1:"XSAVE,
152 "1:"XSAVEOPT, 146 XSAVEOPT,
153 X86_FEATURE_XSAVEOPT, 147 X86_FEATURE_XSAVEOPT,
154 "1:"XSAVES, 148 XSAVES,
155 X86_FEATURE_XSAVES, 149 X86_FEATURE_XSAVES,
156 [fx] "D" (fx), "a" (lmask), "d" (hmask) : 150 [fx] "D" (fx), "a" (lmask), "d" (hmask) :
157 "memory"); 151 "memory");
@@ -178,7 +172,7 @@ static inline int xrstor_state(struct xsave_struct *fx, u64 mask)
178 */ 172 */
179 alternative_input( 173 alternative_input(
180 "1: " XRSTOR, 174 "1: " XRSTOR,
181 "1: " XRSTORS, 175 XRSTORS,
182 X86_FEATURE_XSAVES, 176 X86_FEATURE_XSAVES,
183 "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask) 177 "D" (fx), "m" (*fx), "a" (lmask), "d" (hmask)
184 : "memory"); 178 : "memory");
diff --git a/arch/x86/kernel/acpi/boot.c b/arch/x86/kernel/acpi/boot.c
index ae97ed0873c6..803b684676ff 100644
--- a/arch/x86/kernel/acpi/boot.c
+++ b/arch/x86/kernel/acpi/boot.c
@@ -613,6 +613,11 @@ int acpi_gsi_to_irq(u32 gsi, unsigned int *irqp)
613{ 613{
614 int rc, irq, trigger, polarity; 614 int rc, irq, trigger, polarity;
615 615
616 if (acpi_irq_model == ACPI_IRQ_MODEL_PIC) {
617 *irqp = gsi;
618 return 0;
619 }
620
616 rc = acpi_get_override_irq(gsi, &trigger, &polarity); 621 rc = acpi_get_override_irq(gsi, &trigger, &polarity);
617 if (rc == 0) { 622 if (rc == 0) {
618 trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE; 623 trigger = trigger ? ACPI_LEVEL_SENSITIVE : ACPI_EDGE_SENSITIVE;
@@ -1333,6 +1338,26 @@ static int __init dmi_ignore_irq0_timer_override(const struct dmi_system_id *d)
1333} 1338}
1334 1339
1335/* 1340/*
1341 * ACPI offers an alternative platform interface model that removes
1342 * ACPI hardware requirements for platforms that do not implement
1343 * the PC Architecture.
1344 *
1345 * We initialize the Hardware-reduced ACPI model here:
1346 */
1347static void __init acpi_reduced_hw_init(void)
1348{
1349 if (acpi_gbl_reduced_hardware) {
1350 /*
1351 * Override x86_init functions and bypass legacy pic
1352 * in Hardware-reduced ACPI mode
1353 */
1354 x86_init.timers.timer_init = x86_init_noop;
1355 x86_init.irqs.pre_vector_init = x86_init_noop;
1356 legacy_pic = &null_legacy_pic;
1357 }
1358}
1359
1360/*
1336 * If your system is blacklisted here, but you find that acpi=force 1361 * If your system is blacklisted here, but you find that acpi=force
1337 * works for you, please contact linux-acpi@vger.kernel.org 1362 * works for you, please contact linux-acpi@vger.kernel.org
1338 */ 1363 */
@@ -1531,6 +1556,11 @@ int __init early_acpi_boot_init(void)
1531 */ 1556 */
1532 early_acpi_process_madt(); 1557 early_acpi_process_madt();
1533 1558
1559 /*
1560 * Hardware-reduced ACPI mode initialization:
1561 */
1562 acpi_reduced_hw_init();
1563
1534 return 0; 1564 return 0;
1535} 1565}
1536 1566
diff --git a/arch/x86/kernel/apic/apic_numachip.c b/arch/x86/kernel/apic/apic_numachip.c
index c2fd21fed002..017149cded07 100644
--- a/arch/x86/kernel/apic/apic_numachip.c
+++ b/arch/x86/kernel/apic/apic_numachip.c
@@ -37,10 +37,12 @@ static const struct apic apic_numachip;
37static unsigned int get_apic_id(unsigned long x) 37static unsigned int get_apic_id(unsigned long x)
38{ 38{
39 unsigned long value; 39 unsigned long value;
40 unsigned int id; 40 unsigned int id = (x >> 24) & 0xff;
41 41
42 rdmsrl(MSR_FAM10H_NODE_ID, value); 42 if (static_cpu_has_safe(X86_FEATURE_NODEID_MSR)) {
43 id = ((x >> 24) & 0xffU) | ((value << 2) & 0xff00U); 43 rdmsrl(MSR_FAM10H_NODE_ID, value);
44 id |= (value << 2) & 0xff00;
45 }
44 46
45 return id; 47 return id;
46} 48}
@@ -155,10 +157,18 @@ static int __init numachip_probe(void)
155 157
156static void fixup_cpu_id(struct cpuinfo_x86 *c, int node) 158static void fixup_cpu_id(struct cpuinfo_x86 *c, int node)
157{ 159{
158 if (c->phys_proc_id != node) { 160 u64 val;
159 c->phys_proc_id = node; 161 u32 nodes = 1;
160 per_cpu(cpu_llc_id, smp_processor_id()) = node; 162
163 this_cpu_write(cpu_llc_id, node);
164
165 /* Account for nodes per socket in multi-core-module processors */
166 if (static_cpu_has_safe(X86_FEATURE_NODEID_MSR)) {
167 rdmsrl(MSR_FAM10H_NODE_ID, val);
168 nodes = ((val >> 3) & 7) + 1;
161 } 169 }
170
171 c->phys_proc_id = node / nodes;
162} 172}
163 173
164static int __init numachip_system_init(void) 174static int __init numachip_system_init(void)
diff --git a/arch/x86/kernel/cpu/common.c b/arch/x86/kernel/cpu/common.c
index b5c8ff5e9dfc..2346c95c6ab1 100644
--- a/arch/x86/kernel/cpu/common.c
+++ b/arch/x86/kernel/cpu/common.c
@@ -1396,6 +1396,12 @@ void cpu_init(void)
1396 1396
1397 wait_for_master_cpu(cpu); 1397 wait_for_master_cpu(cpu);
1398 1398
1399 /*
1400 * Initialize the CR4 shadow before doing anything that could
1401 * try to read it.
1402 */
1403 cr4_init_shadow();
1404
1399 show_ucode_info_early(); 1405 show_ucode_info_early();
1400 1406
1401 printk(KERN_INFO "Initializing CPU#%d\n", cpu); 1407 printk(KERN_INFO "Initializing CPU#%d\n", cpu);
diff --git a/arch/x86/kernel/cpu/intel.c b/arch/x86/kernel/cpu/intel.c
index 94d7dcb12145..50163fa9034f 100644
--- a/arch/x86/kernel/cpu/intel.c
+++ b/arch/x86/kernel/cpu/intel.c
@@ -565,8 +565,8 @@ static const struct _tlb_table intel_tlb_table[] = {
565 { 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" }, 565 { 0xb2, TLB_INST_4K, 64, " TLB_INST 4KByte pages, 4-way set associative" },
566 { 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" }, 566 { 0xb3, TLB_DATA_4K, 128, " TLB_DATA 4 KByte pages, 4-way set associative" },
567 { 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" }, 567 { 0xb4, TLB_DATA_4K, 256, " TLB_DATA 4 KByte pages, 4-way associative" },
568 { 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set ssociative" }, 568 { 0xb5, TLB_INST_4K, 64, " TLB_INST 4 KByte pages, 8-way set associative" },
569 { 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set ssociative" }, 569 { 0xb6, TLB_INST_4K, 128, " TLB_INST 4 KByte pages, 8-way set associative" },
570 { 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" }, 570 { 0xba, TLB_DATA_4K, 64, " TLB_DATA 4 KByte pages, 4-way associative" },
571 { 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" }, 571 { 0xc0, TLB_DATA_4K_4M, 8, " TLB_DATA 4 KByte and 4 MByte pages, 4-way associative" },
572 { 0xc1, STLB_4K_2M, 1024, " STLB 4 KByte and 2 MByte pages, 8-way associative" }, 572 { 0xc1, STLB_4K_2M, 1024, " STLB 4 KByte and 2 MByte pages, 8-way associative" },
diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c
index c6826d1e8082..746e7fd08aad 100644
--- a/arch/x86/kernel/cpu/microcode/intel.c
+++ b/arch/x86/kernel/cpu/microcode/intel.c
@@ -196,6 +196,11 @@ static enum ucode_state generic_load_microcode(int cpu, void *data, size_t size,
196 struct microcode_header_intel mc_header; 196 struct microcode_header_intel mc_header;
197 unsigned int mc_size; 197 unsigned int mc_size;
198 198
199 if (leftover < sizeof(mc_header)) {
200 pr_err("error! Truncated header in microcode data file\n");
201 break;
202 }
203
199 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header))) 204 if (get_ucode_data(&mc_header, ucode_ptr, sizeof(mc_header)))
200 break; 205 break;
201 206
diff --git a/arch/x86/kernel/cpu/microcode/intel_early.c b/arch/x86/kernel/cpu/microcode/intel_early.c
index ec9df6f9cd47..420eb933189c 100644
--- a/arch/x86/kernel/cpu/microcode/intel_early.c
+++ b/arch/x86/kernel/cpu/microcode/intel_early.c
@@ -321,7 +321,11 @@ get_matching_model_microcode(int cpu, unsigned long start,
321 unsigned int mc_saved_count = mc_saved_data->mc_saved_count; 321 unsigned int mc_saved_count = mc_saved_data->mc_saved_count;
322 int i; 322 int i;
323 323
324 while (leftover) { 324 while (leftover && mc_saved_count < ARRAY_SIZE(mc_saved_tmp)) {
325
326 if (leftover < sizeof(mc_header))
327 break;
328
325 mc_header = (struct microcode_header_intel *)ucode_ptr; 329 mc_header = (struct microcode_header_intel *)ucode_ptr;
326 330
327 mc_size = get_totalsize(mc_header); 331 mc_size = get_totalsize(mc_header);
diff --git a/arch/x86/kernel/entry_32.S b/arch/x86/kernel/entry_32.S
index 000d4199b03e..31e2d5bf3e38 100644
--- a/arch/x86/kernel/entry_32.S
+++ b/arch/x86/kernel/entry_32.S
@@ -982,6 +982,9 @@ ENTRY(xen_hypervisor_callback)
982ENTRY(xen_do_upcall) 982ENTRY(xen_do_upcall)
9831: mov %esp, %eax 9831: mov %esp, %eax
984 call xen_evtchn_do_upcall 984 call xen_evtchn_do_upcall
985#ifndef CONFIG_PREEMPT
986 call xen_maybe_preempt_hcall
987#endif
985 jmp ret_from_intr 988 jmp ret_from_intr
986 CFI_ENDPROC 989 CFI_ENDPROC
987ENDPROC(xen_hypervisor_callback) 990ENDPROC(xen_hypervisor_callback)
diff --git a/arch/x86/kernel/entry_64.S b/arch/x86/kernel/entry_64.S
index db13655c3a2a..1d74d161687c 100644
--- a/arch/x86/kernel/entry_64.S
+++ b/arch/x86/kernel/entry_64.S
@@ -269,11 +269,14 @@ ENTRY(ret_from_fork)
269 testl $3, CS-ARGOFFSET(%rsp) # from kernel_thread? 269 testl $3, CS-ARGOFFSET(%rsp) # from kernel_thread?
270 jz 1f 270 jz 1f
271 271
272 testl $_TIF_IA32, TI_flags(%rcx) # 32-bit compat task needs IRET 272 /*
273 jnz int_ret_from_sys_call 273 * By the time we get here, we have no idea whether our pt_regs,
274 274 * ti flags, and ti status came from the 64-bit SYSCALL fast path,
275 RESTORE_TOP_OF_STACK %rdi, -ARGOFFSET 275 * the slow path, or one of the ia32entry paths.
276 jmp ret_from_sys_call # go to the SYSRET fastpath 276 * Use int_ret_from_sys_call to return, since it can safely handle
277 * all of the above.
278 */
279 jmp int_ret_from_sys_call
277 280
2781: 2811:
279 subq $REST_SKIP, %rsp # leave space for volatiles 282 subq $REST_SKIP, %rsp # leave space for volatiles
@@ -1208,6 +1211,9 @@ ENTRY(xen_do_hypervisor_callback) # do_hypervisor_callback(struct *pt_regs)
1208 popq %rsp 1211 popq %rsp
1209 CFI_DEF_CFA_REGISTER rsp 1212 CFI_DEF_CFA_REGISTER rsp
1210 decl PER_CPU_VAR(irq_count) 1213 decl PER_CPU_VAR(irq_count)
1214#ifndef CONFIG_PREEMPT
1215 call xen_maybe_preempt_hcall
1216#endif
1211 jmp error_exit 1217 jmp error_exit
1212 CFI_ENDPROC 1218 CFI_ENDPROC
1213END(xen_do_hypervisor_callback) 1219END(xen_do_hypervisor_callback)
diff --git a/arch/x86/kernel/irq.c b/arch/x86/kernel/irq.c
index 705ef8d48e2d..67b1cbe0093a 100644
--- a/arch/x86/kernel/irq.c
+++ b/arch/x86/kernel/irq.c
@@ -302,6 +302,9 @@ int check_irq_vectors_for_cpu_disable(void)
302 irq = __this_cpu_read(vector_irq[vector]); 302 irq = __this_cpu_read(vector_irq[vector]);
303 if (irq >= 0) { 303 if (irq >= 0) {
304 desc = irq_to_desc(irq); 304 desc = irq_to_desc(irq);
305 if (!desc)
306 continue;
307
305 data = irq_desc_get_irq_data(desc); 308 data = irq_desc_get_irq_data(desc);
306 cpumask_copy(&affinity_new, data->affinity); 309 cpumask_copy(&affinity_new, data->affinity);
307 cpu_clear(this_cpu, affinity_new); 310 cpu_clear(this_cpu, affinity_new);
diff --git a/arch/x86/kernel/kprobes/core.c b/arch/x86/kernel/kprobes/core.c
index 98f654d466e5..4e3d5a9621fe 100644
--- a/arch/x86/kernel/kprobes/core.c
+++ b/arch/x86/kernel/kprobes/core.c
@@ -84,7 +84,7 @@ static volatile u32 twobyte_is_boostable[256 / 32] = {
84 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 84 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
85 /* ---------------------------------------------- */ 85 /* ---------------------------------------------- */
86 W(0x00, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0) | /* 00 */ 86 W(0x00, 0, 0, 1, 1, 0, 0, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0) | /* 00 */
87 W(0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) , /* 10 */ 87 W(0x10, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1) , /* 10 */
88 W(0x20, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) | /* 20 */ 88 W(0x20, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) | /* 20 */
89 W(0x30, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) , /* 30 */ 89 W(0x30, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) , /* 30 */
90 W(0x40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 40 */ 90 W(0x40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 40 */
@@ -223,27 +223,48 @@ static unsigned long
223__recover_probed_insn(kprobe_opcode_t *buf, unsigned long addr) 223__recover_probed_insn(kprobe_opcode_t *buf, unsigned long addr)
224{ 224{
225 struct kprobe *kp; 225 struct kprobe *kp;
226 unsigned long faddr;
226 227
227 kp = get_kprobe((void *)addr); 228 kp = get_kprobe((void *)addr);
228 /* There is no probe, return original address */ 229 faddr = ftrace_location(addr);
229 if (!kp) 230 /*
231 * Addresses inside the ftrace location are refused by
232 * arch_check_ftrace_location(). Something went terribly wrong
233 * if such an address is checked here.
234 */
235 if (WARN_ON(faddr && faddr != addr))
236 return 0UL;
237 /*
238 * Use the current code if it is not modified by Kprobe
239 * and it cannot be modified by ftrace.
240 */
241 if (!kp && !faddr)
230 return addr; 242 return addr;
231 243
232 /* 244 /*
233 * Basically, kp->ainsn.insn has an original instruction. 245 * Basically, kp->ainsn.insn has an original instruction.
234 * However, RIP-relative instruction can not do single-stepping 246 * However, RIP-relative instruction can not do single-stepping
235 * at different place, __copy_instruction() tweaks the displacement of 247 * at different place, __copy_instruction() tweaks the displacement of
236 * that instruction. In that case, we can't recover the instruction 248 * that instruction. In that case, we can't recover the instruction
237 * from the kp->ainsn.insn. 249 * from the kp->ainsn.insn.
238 * 250 *
239 * On the other hand, kp->opcode has a copy of the first byte of 251 * On the other hand, in case on normal Kprobe, kp->opcode has a copy
240 * the probed instruction, which is overwritten by int3. And 252 * of the first byte of the probed instruction, which is overwritten
241 * the instruction at kp->addr is not modified by kprobes except 253 * by int3. And the instruction at kp->addr is not modified by kprobes
242 * for the first byte, we can recover the original instruction 254 * except for the first byte, we can recover the original instruction
243 * from it and kp->opcode. 255 * from it and kp->opcode.
256 *
257 * In case of Kprobes using ftrace, we do not have a copy of
258 * the original instruction. In fact, the ftrace location might
259 * be modified at anytime and even could be in an inconsistent state.
260 * Fortunately, we know that the original code is the ideal 5-byte
261 * long NOP.
244 */ 262 */
245 memcpy(buf, kp->addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t)); 263 memcpy(buf, (void *)addr, MAX_INSN_SIZE * sizeof(kprobe_opcode_t));
246 buf[0] = kp->opcode; 264 if (faddr)
265 memcpy(buf, ideal_nops[NOP_ATOMIC5], 5);
266 else
267 buf[0] = kp->opcode;
247 return (unsigned long)buf; 268 return (unsigned long)buf;
248} 269}
249 270
@@ -251,6 +272,7 @@ __recover_probed_insn(kprobe_opcode_t *buf, unsigned long addr)
251 * Recover the probed instruction at addr for further analysis. 272 * Recover the probed instruction at addr for further analysis.
252 * Caller must lock kprobes by kprobe_mutex, or disable preemption 273 * Caller must lock kprobes by kprobe_mutex, or disable preemption
253 * for preventing to release referencing kprobes. 274 * for preventing to release referencing kprobes.
275 * Returns zero if the instruction can not get recovered.
254 */ 276 */
255unsigned long recover_probed_instruction(kprobe_opcode_t *buf, unsigned long addr) 277unsigned long recover_probed_instruction(kprobe_opcode_t *buf, unsigned long addr)
256{ 278{
@@ -285,6 +307,8 @@ static int can_probe(unsigned long paddr)
285 * normally used, we just go through if there is no kprobe. 307 * normally used, we just go through if there is no kprobe.
286 */ 308 */
287 __addr = recover_probed_instruction(buf, addr); 309 __addr = recover_probed_instruction(buf, addr);
310 if (!__addr)
311 return 0;
288 kernel_insn_init(&insn, (void *)__addr, MAX_INSN_SIZE); 312 kernel_insn_init(&insn, (void *)__addr, MAX_INSN_SIZE);
289 insn_get_length(&insn); 313 insn_get_length(&insn);
290 314
@@ -333,6 +357,8 @@ int __copy_instruction(u8 *dest, u8 *src)
333 unsigned long recovered_insn = 357 unsigned long recovered_insn =
334 recover_probed_instruction(buf, (unsigned long)src); 358 recover_probed_instruction(buf, (unsigned long)src);
335 359
360 if (!recovered_insn)
361 return 0;
336 kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE); 362 kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE);
337 insn_get_length(&insn); 363 insn_get_length(&insn);
338 /* Another subsystem puts a breakpoint, failed to recover */ 364 /* Another subsystem puts a breakpoint, failed to recover */
diff --git a/arch/x86/kernel/kprobes/opt.c b/arch/x86/kernel/kprobes/opt.c
index 0dd8d089c315..7b3b9d15c47a 100644
--- a/arch/x86/kernel/kprobes/opt.c
+++ b/arch/x86/kernel/kprobes/opt.c
@@ -259,6 +259,8 @@ static int can_optimize(unsigned long paddr)
259 */ 259 */
260 return 0; 260 return 0;
261 recovered_insn = recover_probed_instruction(buf, addr); 261 recovered_insn = recover_probed_instruction(buf, addr);
262 if (!recovered_insn)
263 return 0;
262 kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE); 264 kernel_insn_init(&insn, (void *)recovered_insn, MAX_INSN_SIZE);
263 insn_get_length(&insn); 265 insn_get_length(&insn);
264 /* Another subsystem puts a breakpoint */ 266 /* Another subsystem puts a breakpoint */
diff --git a/arch/x86/kernel/kvm.c b/arch/x86/kernel/kvm.c
index 94f643484300..e354cc6446ab 100644
--- a/arch/x86/kernel/kvm.c
+++ b/arch/x86/kernel/kvm.c
@@ -609,7 +609,7 @@ static inline void check_zero(void)
609 u8 ret; 609 u8 ret;
610 u8 old; 610 u8 old;
611 611
612 old = ACCESS_ONCE(zero_stats); 612 old = READ_ONCE(zero_stats);
613 if (unlikely(old)) { 613 if (unlikely(old)) {
614 ret = cmpxchg(&zero_stats, old, 0); 614 ret = cmpxchg(&zero_stats, old, 0);
615 /* This ensures only one fellow resets the stat */ 615 /* This ensures only one fellow resets the stat */
@@ -727,6 +727,7 @@ __visible void kvm_lock_spinning(struct arch_spinlock *lock, __ticket_t want)
727 int cpu; 727 int cpu;
728 u64 start; 728 u64 start;
729 unsigned long flags; 729 unsigned long flags;
730 __ticket_t head;
730 731
731 if (in_nmi()) 732 if (in_nmi())
732 return; 733 return;
@@ -768,11 +769,15 @@ __visible void kvm_lock_spinning(struct arch_spinlock *lock, __ticket_t want)
768 */ 769 */
769 __ticket_enter_slowpath(lock); 770 __ticket_enter_slowpath(lock);
770 771
772 /* make sure enter_slowpath, which is atomic does not cross the read */
773 smp_mb__after_atomic();
774
771 /* 775 /*
772 * check again make sure it didn't become free while 776 * check again make sure it didn't become free while
773 * we weren't looking. 777 * we weren't looking.
774 */ 778 */
775 if (ACCESS_ONCE(lock->tickets.head) == want) { 779 head = READ_ONCE(lock->tickets.head);
780 if (__tickets_equal(head, want)) {
776 add_stats(TAKEN_SLOW_PICKUP, 1); 781 add_stats(TAKEN_SLOW_PICKUP, 1);
777 goto out; 782 goto out;
778 } 783 }
@@ -803,8 +808,8 @@ static void kvm_unlock_kick(struct arch_spinlock *lock, __ticket_t ticket)
803 add_stats(RELEASED_SLOW, 1); 808 add_stats(RELEASED_SLOW, 1);
804 for_each_cpu(cpu, &waiting_cpus) { 809 for_each_cpu(cpu, &waiting_cpus) {
805 const struct kvm_lock_waiting *w = &per_cpu(klock_waiting, cpu); 810 const struct kvm_lock_waiting *w = &per_cpu(klock_waiting, cpu);
806 if (ACCESS_ONCE(w->lock) == lock && 811 if (READ_ONCE(w->lock) == lock &&
807 ACCESS_ONCE(w->want) == ticket) { 812 READ_ONCE(w->want) == ticket) {
808 add_stats(RELEASED_SLOW_KICKED, 1); 813 add_stats(RELEASED_SLOW_KICKED, 1);
809 kvm_kick_cpu(cpu); 814 kvm_kick_cpu(cpu);
810 break; 815 break;
diff --git a/arch/x86/kernel/traps.c b/arch/x86/kernel/traps.c
index 9d2073e2ecc9..4ff5d162ff9f 100644
--- a/arch/x86/kernel/traps.c
+++ b/arch/x86/kernel/traps.c
@@ -384,7 +384,7 @@ dotraplinkage void do_bounds(struct pt_regs *regs, long error_code)
384 goto exit; 384 goto exit;
385 conditional_sti(regs); 385 conditional_sti(regs);
386 386
387 if (!user_mode(regs)) 387 if (!user_mode_vm(regs))
388 die("bounds", regs, error_code); 388 die("bounds", regs, error_code);
389 389
390 if (!cpu_feature_enabled(X86_FEATURE_MPX)) { 390 if (!cpu_feature_enabled(X86_FEATURE_MPX)) {
@@ -637,7 +637,7 @@ dotraplinkage void do_debug(struct pt_regs *regs, long error_code)
637 * then it's very likely the result of an icebp/int01 trap. 637 * then it's very likely the result of an icebp/int01 trap.
638 * User wants a sigtrap for that. 638 * User wants a sigtrap for that.
639 */ 639 */
640 if (!dr6 && user_mode(regs)) 640 if (!dr6 && user_mode_vm(regs))
641 user_icebp = 1; 641 user_icebp = 1;
642 642
643 /* Catch kmemcheck conditions first of all! */ 643 /* Catch kmemcheck conditions first of all! */
diff --git a/arch/x86/kernel/uprobes.c b/arch/x86/kernel/uprobes.c
index 8b96a947021f..81f8adb0679e 100644
--- a/arch/x86/kernel/uprobes.c
+++ b/arch/x86/kernel/uprobes.c
@@ -66,27 +66,54 @@
66 * Good-instruction tables for 32-bit apps. This is non-const and volatile 66 * Good-instruction tables for 32-bit apps. This is non-const and volatile
67 * to keep gcc from statically optimizing it out, as variable_test_bit makes 67 * to keep gcc from statically optimizing it out, as variable_test_bit makes
68 * some versions of gcc to think only *(unsigned long*) is used. 68 * some versions of gcc to think only *(unsigned long*) is used.
69 *
70 * Opcodes we'll probably never support:
71 * 6c-6f - ins,outs. SEGVs if used in userspace
72 * e4-e7 - in,out imm. SEGVs if used in userspace
73 * ec-ef - in,out acc. SEGVs if used in userspace
74 * cc - int3. SIGTRAP if used in userspace
75 * ce - into. Not used in userspace - no kernel support to make it useful. SEGVs
76 * (why we support bound (62) then? it's similar, and similarly unused...)
77 * f1 - int1. SIGTRAP if used in userspace
78 * f4 - hlt. SEGVs if used in userspace
79 * fa - cli. SEGVs if used in userspace
80 * fb - sti. SEGVs if used in userspace
81 *
82 * Opcodes which need some work to be supported:
83 * 07,17,1f - pop es/ss/ds
84 * Normally not used in userspace, but would execute if used.
85 * Can cause GP or stack exception if tries to load wrong segment descriptor.
86 * We hesitate to run them under single step since kernel's handling
87 * of userspace single-stepping (TF flag) is fragile.
88 * We can easily refuse to support push es/cs/ss/ds (06/0e/16/1e)
89 * on the same grounds that they are never used.
90 * cd - int N.
91 * Used by userspace for "int 80" syscall entry. (Other "int N"
92 * cause GP -> SEGV since their IDT gates don't allow calls from CPL 3).
93 * Not supported since kernel's handling of userspace single-stepping
94 * (TF flag) is fragile.
95 * cf - iret. Normally not used in userspace. Doesn't SEGV unless arguments are bad
69 */ 96 */
70#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION) 97#if defined(CONFIG_X86_32) || defined(CONFIG_IA32_EMULATION)
71static volatile u32 good_insns_32[256 / 32] = { 98static volatile u32 good_insns_32[256 / 32] = {
72 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 99 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
73 /* ---------------------------------------------- */ 100 /* ---------------------------------------------- */
74 W(0x00, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0) | /* 00 */ 101 W(0x00, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1) | /* 00 */
75 W(0x10, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0) , /* 10 */ 102 W(0x10, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0) , /* 10 */
76 W(0x20, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1) | /* 20 */ 103 W(0x20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 20 */
77 W(0x30, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0, 1) , /* 30 */ 104 W(0x30, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 30 */
78 W(0x40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 40 */ 105 W(0x40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 40 */
79 W(0x50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 50 */ 106 W(0x50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 50 */
80 W(0x60, 1, 1, 1, 0, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* 60 */ 107 W(0x60, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* 60 */
81 W(0x70, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 70 */ 108 W(0x70, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 70 */
82 W(0x80, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 80 */ 109 W(0x80, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 80 */
83 W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 90 */ 110 W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 90 */
84 W(0xa0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* a0 */ 111 W(0xa0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* a0 */
85 W(0xb0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* b0 */ 112 W(0xb0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* b0 */
86 W(0xc0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* c0 */ 113 W(0xc0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* c0 */
87 W(0xd0, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */ 114 W(0xd0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */
88 W(0xe0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* e0 */ 115 W(0xe0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* e0 */
89 W(0xf0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1) /* f0 */ 116 W(0xf0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1) /* f0 */
90 /* ---------------------------------------------- */ 117 /* ---------------------------------------------- */
91 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 118 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
92}; 119};
@@ -94,27 +121,61 @@ static volatile u32 good_insns_32[256 / 32] = {
94#define good_insns_32 NULL 121#define good_insns_32 NULL
95#endif 122#endif
96 123
97/* Good-instruction tables for 64-bit apps */ 124/* Good-instruction tables for 64-bit apps.
125 *
126 * Genuinely invalid opcodes:
127 * 06,07 - formerly push/pop es
128 * 0e - formerly push cs
129 * 16,17 - formerly push/pop ss
130 * 1e,1f - formerly push/pop ds
131 * 27,2f,37,3f - formerly daa/das/aaa/aas
132 * 60,61 - formerly pusha/popa
133 * 62 - formerly bound. EVEX prefix for AVX512 (not yet supported)
134 * 82 - formerly redundant encoding of Group1
135 * 9a - formerly call seg:ofs
136 * ce - formerly into
137 * d4,d5 - formerly aam/aad
138 * d6 - formerly undocumented salc
139 * ea - formerly jmp seg:ofs
140 *
141 * Opcodes we'll probably never support:
142 * 6c-6f - ins,outs. SEGVs if used in userspace
143 * e4-e7 - in,out imm. SEGVs if used in userspace
144 * ec-ef - in,out acc. SEGVs if used in userspace
145 * cc - int3. SIGTRAP if used in userspace
146 * f1 - int1. SIGTRAP if used in userspace
147 * f4 - hlt. SEGVs if used in userspace
148 * fa - cli. SEGVs if used in userspace
149 * fb - sti. SEGVs if used in userspace
150 *
151 * Opcodes which need some work to be supported:
152 * cd - int N.
153 * Used by userspace for "int 80" syscall entry. (Other "int N"
154 * cause GP -> SEGV since their IDT gates don't allow calls from CPL 3).
155 * Not supported since kernel's handling of userspace single-stepping
156 * (TF flag) is fragile.
157 * cf - iret. Normally not used in userspace. Doesn't SEGV unless arguments are bad
158 */
98#if defined(CONFIG_X86_64) 159#if defined(CONFIG_X86_64)
99static volatile u32 good_insns_64[256 / 32] = { 160static volatile u32 good_insns_64[256 / 32] = {
100 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 161 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
101 /* ---------------------------------------------- */ 162 /* ---------------------------------------------- */
102 W(0x00, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) | /* 00 */ 163 W(0x00, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1) | /* 00 */
103 W(0x10, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) , /* 10 */ 164 W(0x10, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) , /* 10 */
104 W(0x20, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) | /* 20 */ 165 W(0x20, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0) | /* 20 */
105 W(0x30, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0) , /* 30 */ 166 W(0x30, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 0) , /* 30 */
106 W(0x40, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) | /* 40 */ 167 W(0x40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 40 */
107 W(0x50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 50 */ 168 W(0x50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 50 */
108 W(0x60, 0, 0, 0, 1, 1, 1, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* 60 */ 169 W(0x60, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* 60 */
109 W(0x70, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 70 */ 170 W(0x70, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 70 */
110 W(0x80, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 80 */ 171 W(0x80, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 80 */
111 W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 90 */ 172 W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1) , /* 90 */
112 W(0xa0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* a0 */ 173 W(0xa0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* a0 */
113 W(0xb0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* b0 */ 174 W(0xb0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* b0 */
114 W(0xc0, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* c0 */ 175 W(0xc0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0) | /* c0 */
115 W(0xd0, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */ 176 W(0xd0, 1, 1, 1, 1, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */
116 W(0xe0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 0, 0, 0, 0) | /* e0 */ 177 W(0xe0, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 0, 1, 0, 0, 0, 0) | /* e0 */
117 W(0xf0, 0, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1) /* f0 */ 178 W(0xf0, 1, 0, 1, 1, 0, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1) /* f0 */
118 /* ---------------------------------------------- */ 179 /* ---------------------------------------------- */
119 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 180 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
120}; 181};
@@ -122,49 +183,55 @@ static volatile u32 good_insns_64[256 / 32] = {
122#define good_insns_64 NULL 183#define good_insns_64 NULL
123#endif 184#endif
124 185
125/* Using this for both 64-bit and 32-bit apps */ 186/* Using this for both 64-bit and 32-bit apps.
187 * Opcodes we don't support:
188 * 0f 00 - SLDT/STR/LLDT/LTR/VERR/VERW/-/- group. System insns
189 * 0f 01 - SGDT/SIDT/LGDT/LIDT/SMSW/-/LMSW/INVLPG group.
190 * Also encodes tons of other system insns if mod=11.
191 * Some are in fact non-system: xend, xtest, rdtscp, maybe more
192 * 0f 05 - syscall
193 * 0f 06 - clts (CPL0 insn)
194 * 0f 07 - sysret
195 * 0f 08 - invd (CPL0 insn)
196 * 0f 09 - wbinvd (CPL0 insn)
197 * 0f 0b - ud2
198 * 0f 30 - wrmsr (CPL0 insn) (then why rdmsr is allowed, it's also CPL0 insn?)
199 * 0f 34 - sysenter
200 * 0f 35 - sysexit
201 * 0f 37 - getsec
202 * 0f 78 - vmread (Intel VMX. CPL0 insn)
203 * 0f 79 - vmwrite (Intel VMX. CPL0 insn)
204 * Note: with prefixes, these two opcodes are
205 * extrq/insertq/AVX512 convert vector ops.
206 * 0f ae - group15: [f]xsave,[f]xrstor,[v]{ld,st}mxcsr,clflush[opt],
207 * {rd,wr}{fs,gs}base,{s,l,m}fence.
208 * Why? They are all user-executable.
209 */
126static volatile u32 good_2byte_insns[256 / 32] = { 210static volatile u32 good_2byte_insns[256 / 32] = {
127 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 211 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
128 /* ---------------------------------------------- */ 212 /* ---------------------------------------------- */
129 W(0x00, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1) | /* 00 */ 213 W(0x00, 0, 0, 1, 1, 1, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1, 1) | /* 00 */
130 W(0x10, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1) , /* 10 */ 214 W(0x10, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 10 */
131 W(0x20, 1, 1, 1, 1, 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1) | /* 20 */ 215 W(0x20, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 20 */
132 W(0x30, 0, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0) , /* 30 */ 216 W(0x30, 0, 1, 1, 1, 0, 0, 1, 0, 1, 1, 1, 1, 1, 1, 1, 1) , /* 30 */
133 W(0x40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 40 */ 217 W(0x40, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 40 */
134 W(0x50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 50 */ 218 W(0x50, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 50 */
135 W(0x60, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 60 */ 219 W(0x60, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 60 */
136 W(0x70, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 1, 1) , /* 70 */ 220 W(0x70, 1, 1, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1) , /* 70 */
137 W(0x80, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 80 */ 221 W(0x80, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* 80 */
138 W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 90 */ 222 W(0x90, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* 90 */
139 W(0xa0, 1, 1, 1, 1, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 1) | /* a0 */ 223 W(0xa0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1) | /* a0 */
140 W(0xb0, 1, 1, 1, 1, 1, 1, 1, 1, 0, 1, 1, 1, 1, 1, 1, 1) , /* b0 */ 224 W(0xb0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* b0 */
141 W(0xc0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* c0 */ 225 W(0xc0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* c0 */
142 W(0xd0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */ 226 W(0xd0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) , /* d0 */
143 W(0xe0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* e0 */ 227 W(0xe0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) | /* e0 */
144 W(0xf0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 0) /* f0 */ 228 W(0xf0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1) /* f0 */
145 /* ---------------------------------------------- */ 229 /* ---------------------------------------------- */
146 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */ 230 /* 0 1 2 3 4 5 6 7 8 9 a b c d e f */
147}; 231};
148#undef W 232#undef W
149 233
150/* 234/*
151 * opcodes we'll probably never support:
152 *
153 * 6c-6d, e4-e5, ec-ed - in
154 * 6e-6f, e6-e7, ee-ef - out
155 * cc, cd - int3, int
156 * cf - iret
157 * d6 - illegal instruction
158 * f1 - int1/icebp
159 * f4 - hlt
160 * fa, fb - cli, sti
161 * 0f - lar, lsl, syscall, clts, sysret, sysenter, sysexit, invd, wbinvd, ud2
162 *
163 * invalid opcodes in 64-bit mode:
164 *
165 * 06, 0e, 16, 1e, 27, 2f, 37, 3f, 60-62, 82, c4-c5, d4-d5
166 * 63 - we support this opcode in x86_64 but not in i386.
167 *
168 * opcodes we may need to refine support for: 235 * opcodes we may need to refine support for:
169 * 236 *
170 * 0f - 2-byte instructions: For many of these instructions, the validity 237 * 0f - 2-byte instructions: For many of these instructions, the validity
diff --git a/arch/x86/kernel/xsave.c b/arch/x86/kernel/xsave.c
index 34f66e58a896..cdc6cf903078 100644
--- a/arch/x86/kernel/xsave.c
+++ b/arch/x86/kernel/xsave.c
@@ -379,7 +379,7 @@ int __restore_xstate_sig(void __user *buf, void __user *buf_fx, int size)
379 * thread's fpu state, reconstruct fxstate from the fsave 379 * thread's fpu state, reconstruct fxstate from the fsave
380 * header. Sanitize the copied state etc. 380 * header. Sanitize the copied state etc.
381 */ 381 */
382 struct xsave_struct *xsave = &tsk->thread.fpu.state->xsave; 382 struct fpu *fpu = &tsk->thread.fpu;
383 struct user_i387_ia32_struct env; 383 struct user_i387_ia32_struct env;
384 int err = 0; 384 int err = 0;
385 385
@@ -393,14 +393,15 @@ int __restore_xstate_sig(void __user *buf, void __user *buf_fx, int size)
393 */ 393 */
394 drop_fpu(tsk); 394 drop_fpu(tsk);
395 395
396 if (__copy_from_user(xsave, buf_fx, state_size) || 396 if (__copy_from_user(&fpu->state->xsave, buf_fx, state_size) ||
397 __copy_from_user(&env, buf, sizeof(env))) { 397 __copy_from_user(&env, buf, sizeof(env))) {
398 fpu_finit(fpu);
398 err = -1; 399 err = -1;
399 } else { 400 } else {
400 sanitize_restored_xstate(tsk, &env, xstate_bv, fx_only); 401 sanitize_restored_xstate(tsk, &env, xstate_bv, fx_only);
401 set_used_math();
402 } 402 }
403 403
404 set_used_math();
404 if (use_eager_fpu()) { 405 if (use_eager_fpu()) {
405 preempt_disable(); 406 preempt_disable();
406 math_state_restore(); 407 math_state_restore();
diff --git a/arch/x86/kvm/emulate.c b/arch/x86/kvm/emulate.c
index e0b794a84c35..106c01557f2b 100644
--- a/arch/x86/kvm/emulate.c
+++ b/arch/x86/kvm/emulate.c
@@ -4950,7 +4950,8 @@ int x86_emulate_insn(struct x86_emulate_ctxt *ctxt)
4950 goto done; 4950 goto done;
4951 } 4951 }
4952 } 4952 }
4953 ctxt->dst.orig_val = ctxt->dst.val; 4953 /* Copy full 64-bit value for CMPXCHG8B. */
4954 ctxt->dst.orig_val64 = ctxt->dst.val64;
4954 4955
4955special_insn: 4956special_insn:
4956 4957
diff --git a/arch/x86/kvm/i8259.c b/arch/x86/kvm/i8259.c
index cc31f7c06d3d..9541ba34126b 100644
--- a/arch/x86/kvm/i8259.c
+++ b/arch/x86/kvm/i8259.c
@@ -507,6 +507,7 @@ static int picdev_read(struct kvm_pic *s,
507 return -EOPNOTSUPP; 507 return -EOPNOTSUPP;
508 508
509 if (len != 1) { 509 if (len != 1) {
510 memset(val, 0, len);
510 pr_pic_unimpl("non byte read\n"); 511 pr_pic_unimpl("non byte read\n");
511 return 0; 512 return 0;
512 } 513 }
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index e55b5fc344eb..bd4e34de24c7 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -1572,7 +1572,7 @@ void kvm_lapic_reset(struct kvm_vcpu *vcpu)
1572 apic_set_reg(apic, APIC_TMR + 0x10 * i, 0); 1572 apic_set_reg(apic, APIC_TMR + 0x10 * i, 0);
1573 } 1573 }
1574 apic->irr_pending = kvm_apic_vid_enabled(vcpu->kvm); 1574 apic->irr_pending = kvm_apic_vid_enabled(vcpu->kvm);
1575 apic->isr_count = kvm_apic_vid_enabled(vcpu->kvm); 1575 apic->isr_count = kvm_x86_ops->hwapic_isr_update ? 1 : 0;
1576 apic->highest_isr_cache = -1; 1576 apic->highest_isr_cache = -1;
1577 update_divide_count(apic); 1577 update_divide_count(apic);
1578 atomic_set(&apic->lapic_timer.pending, 0); 1578 atomic_set(&apic->lapic_timer.pending, 0);
@@ -1782,7 +1782,7 @@ void kvm_apic_post_state_restore(struct kvm_vcpu *vcpu,
1782 update_divide_count(apic); 1782 update_divide_count(apic);
1783 start_apic_timer(apic); 1783 start_apic_timer(apic);
1784 apic->irr_pending = true; 1784 apic->irr_pending = true;
1785 apic->isr_count = kvm_apic_vid_enabled(vcpu->kvm) ? 1785 apic->isr_count = kvm_x86_ops->hwapic_isr_update ?
1786 1 : count_vectors(apic->regs + APIC_ISR); 1786 1 : count_vectors(apic->regs + APIC_ISR);
1787 apic->highest_isr_cache = -1; 1787 apic->highest_isr_cache = -1;
1788 if (kvm_x86_ops->hwapic_irr_update) 1788 if (kvm_x86_ops->hwapic_irr_update)
diff --git a/arch/x86/kvm/svm.c b/arch/x86/kvm/svm.c
index d319e0c24758..cc618c882f90 100644
--- a/arch/x86/kvm/svm.c
+++ b/arch/x86/kvm/svm.c
@@ -3649,11 +3649,6 @@ static void svm_load_eoi_exitmap(struct kvm_vcpu *vcpu, u64 *eoi_exit_bitmap)
3649 return; 3649 return;
3650} 3650}
3651 3651
3652static void svm_hwapic_isr_update(struct kvm *kvm, int isr)
3653{
3654 return;
3655}
3656
3657static void svm_sync_pir_to_irr(struct kvm_vcpu *vcpu) 3652static void svm_sync_pir_to_irr(struct kvm_vcpu *vcpu)
3658{ 3653{
3659 return; 3654 return;
@@ -4403,7 +4398,6 @@ static struct kvm_x86_ops svm_x86_ops = {
4403 .set_virtual_x2apic_mode = svm_set_virtual_x2apic_mode, 4398 .set_virtual_x2apic_mode = svm_set_virtual_x2apic_mode,
4404 .vm_has_apicv = svm_vm_has_apicv, 4399 .vm_has_apicv = svm_vm_has_apicv,
4405 .load_eoi_exitmap = svm_load_eoi_exitmap, 4400 .load_eoi_exitmap = svm_load_eoi_exitmap,
4406 .hwapic_isr_update = svm_hwapic_isr_update,
4407 .sync_pir_to_irr = svm_sync_pir_to_irr, 4401 .sync_pir_to_irr = svm_sync_pir_to_irr,
4408 4402
4409 .set_tss_addr = svm_set_tss_addr, 4403 .set_tss_addr = svm_set_tss_addr,
diff --git a/arch/x86/kvm/vmx.c b/arch/x86/kvm/vmx.c
index 14c1a18d206a..10a481b7674d 100644
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -2168,7 +2168,10 @@ static void vmx_set_msr_bitmap(struct kvm_vcpu *vcpu)
2168{ 2168{
2169 unsigned long *msr_bitmap; 2169 unsigned long *msr_bitmap;
2170 2170
2171 if (irqchip_in_kernel(vcpu->kvm) && apic_x2apic_mode(vcpu->arch.apic)) { 2171 if (is_guest_mode(vcpu))
2172 msr_bitmap = vmx_msr_bitmap_nested;
2173 else if (irqchip_in_kernel(vcpu->kvm) &&
2174 apic_x2apic_mode(vcpu->arch.apic)) {
2172 if (is_long_mode(vcpu)) 2175 if (is_long_mode(vcpu))
2173 msr_bitmap = vmx_msr_bitmap_longmode_x2apic; 2176 msr_bitmap = vmx_msr_bitmap_longmode_x2apic;
2174 else 2177 else
@@ -4367,6 +4370,18 @@ static int vmx_complete_nested_posted_interrupt(struct kvm_vcpu *vcpu)
4367 return 0; 4370 return 0;
4368} 4371}
4369 4372
4373static inline bool kvm_vcpu_trigger_posted_interrupt(struct kvm_vcpu *vcpu)
4374{
4375#ifdef CONFIG_SMP
4376 if (vcpu->mode == IN_GUEST_MODE) {
4377 apic->send_IPI_mask(get_cpu_mask(vcpu->cpu),
4378 POSTED_INTR_VECTOR);
4379 return true;
4380 }
4381#endif
4382 return false;
4383}
4384
4370static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu, 4385static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu,
4371 int vector) 4386 int vector)
4372{ 4387{
@@ -4375,9 +4390,7 @@ static int vmx_deliver_nested_posted_interrupt(struct kvm_vcpu *vcpu,
4375 if (is_guest_mode(vcpu) && 4390 if (is_guest_mode(vcpu) &&
4376 vector == vmx->nested.posted_intr_nv) { 4391 vector == vmx->nested.posted_intr_nv) {
4377 /* the PIR and ON have been set by L1. */ 4392 /* the PIR and ON have been set by L1. */
4378 if (vcpu->mode == IN_GUEST_MODE) 4393 kvm_vcpu_trigger_posted_interrupt(vcpu);
4379 apic->send_IPI_mask(get_cpu_mask(vcpu->cpu),
4380 POSTED_INTR_VECTOR);
4381 /* 4394 /*
4382 * If a posted intr is not recognized by hardware, 4395 * If a posted intr is not recognized by hardware,
4383 * we will accomplish it in the next vmentry. 4396 * we will accomplish it in the next vmentry.
@@ -4409,12 +4422,7 @@ static void vmx_deliver_posted_interrupt(struct kvm_vcpu *vcpu, int vector)
4409 4422
4410 r = pi_test_and_set_on(&vmx->pi_desc); 4423 r = pi_test_and_set_on(&vmx->pi_desc);
4411 kvm_make_request(KVM_REQ_EVENT, vcpu); 4424 kvm_make_request(KVM_REQ_EVENT, vcpu);
4412#ifdef CONFIG_SMP 4425 if (r || !kvm_vcpu_trigger_posted_interrupt(vcpu))
4413 if (!r && (vcpu->mode == IN_GUEST_MODE))
4414 apic->send_IPI_mask(get_cpu_mask(vcpu->cpu),
4415 POSTED_INTR_VECTOR);
4416 else
4417#endif
4418 kvm_vcpu_kick(vcpu); 4426 kvm_vcpu_kick(vcpu);
4419} 4427}
4420 4428
@@ -9213,9 +9221,9 @@ static void prepare_vmcs02(struct kvm_vcpu *vcpu, struct vmcs12 *vmcs12)
9213 } 9221 }
9214 9222
9215 if (cpu_has_vmx_msr_bitmap() && 9223 if (cpu_has_vmx_msr_bitmap() &&
9216 exec_control & CPU_BASED_USE_MSR_BITMAPS && 9224 exec_control & CPU_BASED_USE_MSR_BITMAPS) {
9217 nested_vmx_merge_msr_bitmap(vcpu, vmcs12)) { 9225 nested_vmx_merge_msr_bitmap(vcpu, vmcs12);
9218 vmcs_write64(MSR_BITMAP, __pa(vmx_msr_bitmap_nested)); 9226 /* MSR_BITMAP will be set by following vmx_set_efer. */
9219 } else 9227 } else
9220 exec_control &= ~CPU_BASED_USE_MSR_BITMAPS; 9228 exec_control &= ~CPU_BASED_USE_MSR_BITMAPS;
9221 9229
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index bd7a70be41b3..32bf19ef3115 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -2744,7 +2744,6 @@ int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2744 case KVM_CAP_USER_NMI: 2744 case KVM_CAP_USER_NMI:
2745 case KVM_CAP_REINJECT_CONTROL: 2745 case KVM_CAP_REINJECT_CONTROL:
2746 case KVM_CAP_IRQ_INJECT_STATUS: 2746 case KVM_CAP_IRQ_INJECT_STATUS:
2747 case KVM_CAP_IRQFD:
2748 case KVM_CAP_IOEVENTFD: 2747 case KVM_CAP_IOEVENTFD:
2749 case KVM_CAP_IOEVENTFD_NO_LENGTH: 2748 case KVM_CAP_IOEVENTFD_NO_LENGTH:
2750 case KVM_CAP_PIT2: 2749 case KVM_CAP_PIT2:
diff --git a/arch/x86/lguest/Kconfig b/arch/x86/lguest/Kconfig
index 4a0890f815c4..08f41caada45 100644
--- a/arch/x86/lguest/Kconfig
+++ b/arch/x86/lguest/Kconfig
@@ -1,6 +1,6 @@
1config LGUEST_GUEST 1config LGUEST_GUEST
2 bool "Lguest guest support" 2 bool "Lguest guest support"
3 depends on X86_32 && PARAVIRT 3 depends on X86_32 && PARAVIRT && PCI
4 select TTY 4 select TTY
5 select VIRTUALIZATION 5 select VIRTUALIZATION
6 select VIRTIO 6 select VIRTIO
@@ -8,7 +8,7 @@ config LGUEST_GUEST
8 help 8 help
9 Lguest is a tiny in-kernel hypervisor. Selecting this will 9 Lguest is a tiny in-kernel hypervisor. Selecting this will
10 allow your kernel to boot under lguest. This option will increase 10 allow your kernel to boot under lguest. This option will increase
11 your kernel size by about 6k. If in doubt, say N. 11 your kernel size by about 10k. If in doubt, say N.
12 12
13 If you say Y here, make sure you say Y (or M) to the virtio block 13 If you say Y here, make sure you say Y (or M) to the virtio block
14 and net drivers which lguest needs. 14 and net drivers which lguest needs.
diff --git a/arch/x86/mm/init.c b/arch/x86/mm/init.c
index 553c094b9cd7..a110efca6d06 100644
--- a/arch/x86/mm/init.c
+++ b/arch/x86/mm/init.c
@@ -238,6 +238,31 @@ static void __init_refok adjust_range_page_size_mask(struct map_range *mr,
238 } 238 }
239} 239}
240 240
241static const char *page_size_string(struct map_range *mr)
242{
243 static const char str_1g[] = "1G";
244 static const char str_2m[] = "2M";
245 static const char str_4m[] = "4M";
246 static const char str_4k[] = "4k";
247
248 if (mr->page_size_mask & (1<<PG_LEVEL_1G))
249 return str_1g;
250 /*
251 * 32-bit without PAE has a 4M large page size.
252 * PG_LEVEL_2M is misnamed, but we can at least
253 * print out the right size in the string.
254 */
255 if (IS_ENABLED(CONFIG_X86_32) &&
256 !IS_ENABLED(CONFIG_X86_PAE) &&
257 mr->page_size_mask & (1<<PG_LEVEL_2M))
258 return str_4m;
259
260 if (mr->page_size_mask & (1<<PG_LEVEL_2M))
261 return str_2m;
262
263 return str_4k;
264}
265
241static int __meminit split_mem_range(struct map_range *mr, int nr_range, 266static int __meminit split_mem_range(struct map_range *mr, int nr_range,
242 unsigned long start, 267 unsigned long start,
243 unsigned long end) 268 unsigned long end)
@@ -333,8 +358,7 @@ static int __meminit split_mem_range(struct map_range *mr, int nr_range,
333 for (i = 0; i < nr_range; i++) 358 for (i = 0; i < nr_range; i++)
334 printk(KERN_DEBUG " [mem %#010lx-%#010lx] page %s\n", 359 printk(KERN_DEBUG " [mem %#010lx-%#010lx] page %s\n",
335 mr[i].start, mr[i].end - 1, 360 mr[i].start, mr[i].end - 1,
336 (mr[i].page_size_mask & (1<<PG_LEVEL_1G))?"1G":( 361 page_size_string(&mr[i]));
337 (mr[i].page_size_mask & (1<<PG_LEVEL_2M))?"2M":"4k"));
338 362
339 return nr_range; 363 return nr_range;
340} 364}
diff --git a/arch/x86/mm/mmap.c b/arch/x86/mm/mmap.c
index 919b91205cd4..df4552bd239e 100644
--- a/arch/x86/mm/mmap.c
+++ b/arch/x86/mm/mmap.c
@@ -35,12 +35,12 @@ struct va_alignment __read_mostly va_align = {
35 .flags = -1, 35 .flags = -1,
36}; 36};
37 37
38static unsigned int stack_maxrandom_size(void) 38static unsigned long stack_maxrandom_size(void)
39{ 39{
40 unsigned int max = 0; 40 unsigned long max = 0;
41 if ((current->flags & PF_RANDOMIZE) && 41 if ((current->flags & PF_RANDOMIZE) &&
42 !(current->personality & ADDR_NO_RANDOMIZE)) { 42 !(current->personality & ADDR_NO_RANDOMIZE)) {
43 max = ((-1U) & STACK_RND_MASK) << PAGE_SHIFT; 43 max = ((-1UL) & STACK_RND_MASK) << PAGE_SHIFT;
44 } 44 }
45 45
46 return max; 46 return max;
diff --git a/arch/x86/pci/acpi.c b/arch/x86/pci/acpi.c
index 6ac273832f28..e4695985f9de 100644
--- a/arch/x86/pci/acpi.c
+++ b/arch/x86/pci/acpi.c
@@ -331,7 +331,7 @@ static void probe_pci_root_info(struct pci_root_info *info,
331 struct list_head *list) 331 struct list_head *list)
332{ 332{
333 int ret; 333 int ret;
334 struct resource_entry *entry; 334 struct resource_entry *entry, *tmp;
335 335
336 sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum); 336 sprintf(info->name, "PCI Bus %04x:%02x", domain, busnum);
337 info->bridge = device; 337 info->bridge = device;
@@ -345,8 +345,13 @@ static void probe_pci_root_info(struct pci_root_info *info,
345 dev_dbg(&device->dev, 345 dev_dbg(&device->dev,
346 "no IO and memory resources present in _CRS\n"); 346 "no IO and memory resources present in _CRS\n");
347 else 347 else
348 resource_list_for_each_entry(entry, list) 348 resource_list_for_each_entry_safe(entry, tmp, list) {
349 entry->res->name = info->name; 349 if ((entry->res->flags & IORESOURCE_WINDOW) == 0 ||
350 (entry->res->flags & IORESOURCE_DISABLED))
351 resource_list_destroy_entry(entry);
352 else
353 entry->res->name = info->name;
354 }
350} 355}
351 356
352struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root) 357struct pci_bus *pci_acpi_scan_root(struct acpi_pci_root *root)
diff --git a/arch/x86/pci/common.c b/arch/x86/pci/common.c
index 3d2612b68694..2fb384724ebb 100644
--- a/arch/x86/pci/common.c
+++ b/arch/x86/pci/common.c
@@ -513,31 +513,6 @@ void __init pcibios_set_cache_line_size(void)
513 } 513 }
514} 514}
515 515
516/*
517 * Some device drivers assume dev->irq won't change after calling
518 * pci_disable_device(). So delay releasing of IRQ resource to driver
519 * unbinding time. Otherwise it will break PM subsystem and drivers
520 * like xen-pciback etc.
521 */
522static int pci_irq_notifier(struct notifier_block *nb, unsigned long action,
523 void *data)
524{
525 struct pci_dev *dev = to_pci_dev(data);
526
527 if (action != BUS_NOTIFY_UNBOUND_DRIVER)
528 return NOTIFY_DONE;
529
530 if (pcibios_disable_irq)
531 pcibios_disable_irq(dev);
532
533 return NOTIFY_OK;
534}
535
536static struct notifier_block pci_irq_nb = {
537 .notifier_call = pci_irq_notifier,
538 .priority = INT_MIN,
539};
540
541int __init pcibios_init(void) 516int __init pcibios_init(void)
542{ 517{
543 if (!raw_pci_ops) { 518 if (!raw_pci_ops) {
@@ -550,9 +525,6 @@ int __init pcibios_init(void)
550 525
551 if (pci_bf_sort >= pci_force_bf) 526 if (pci_bf_sort >= pci_force_bf)
552 pci_sort_breadthfirst(); 527 pci_sort_breadthfirst();
553
554 bus_register_notifier(&pci_bus_type, &pci_irq_nb);
555
556 return 0; 528 return 0;
557} 529}
558 530
@@ -711,6 +683,12 @@ int pcibios_enable_device(struct pci_dev *dev, int mask)
711 return 0; 683 return 0;
712} 684}
713 685
686void pcibios_disable_device (struct pci_dev *dev)
687{
688 if (!pci_dev_msi_enabled(dev) && pcibios_disable_irq)
689 pcibios_disable_irq(dev);
690}
691
714int pci_ext_cfg_avail(void) 692int pci_ext_cfg_avail(void)
715{ 693{
716 if (raw_pci_ext_ops) 694 if (raw_pci_ext_ops)
diff --git a/arch/x86/pci/intel_mid_pci.c b/arch/x86/pci/intel_mid_pci.c
index efb849323c74..852aa4c92da0 100644
--- a/arch/x86/pci/intel_mid_pci.c
+++ b/arch/x86/pci/intel_mid_pci.c
@@ -234,10 +234,10 @@ static int intel_mid_pci_irq_enable(struct pci_dev *dev)
234 234
235static void intel_mid_pci_irq_disable(struct pci_dev *dev) 235static void intel_mid_pci_irq_disable(struct pci_dev *dev)
236{ 236{
237 if (dev->irq_managed && dev->irq > 0) { 237 if (!mp_should_keep_irq(&dev->dev) && dev->irq_managed &&
238 dev->irq > 0) {
238 mp_unmap_irq(dev->irq); 239 mp_unmap_irq(dev->irq);
239 dev->irq_managed = 0; 240 dev->irq_managed = 0;
240 dev->irq = 0;
241 } 241 }
242} 242}
243 243
diff --git a/arch/x86/pci/irq.c b/arch/x86/pci/irq.c
index e71b3dbd87b8..5dc6ca5e1741 100644
--- a/arch/x86/pci/irq.c
+++ b/arch/x86/pci/irq.c
@@ -1256,9 +1256,22 @@ static int pirq_enable_irq(struct pci_dev *dev)
1256 return 0; 1256 return 0;
1257} 1257}
1258 1258
1259bool mp_should_keep_irq(struct device *dev)
1260{
1261 if (dev->power.is_prepared)
1262 return true;
1263#ifdef CONFIG_PM
1264 if (dev->power.runtime_status == RPM_SUSPENDING)
1265 return true;
1266#endif
1267
1268 return false;
1269}
1270
1259static void pirq_disable_irq(struct pci_dev *dev) 1271static void pirq_disable_irq(struct pci_dev *dev)
1260{ 1272{
1261 if (io_apic_assign_pci_irqs && dev->irq_managed && dev->irq) { 1273 if (io_apic_assign_pci_irqs && !mp_should_keep_irq(&dev->dev) &&
1274 dev->irq_managed && dev->irq) {
1262 mp_unmap_irq(dev->irq); 1275 mp_unmap_irq(dev->irq);
1263 dev->irq = 0; 1276 dev->irq = 0;
1264 dev->irq_managed = 0; 1277 dev->irq_managed = 0;
diff --git a/arch/x86/platform/Makefile b/arch/x86/platform/Makefile
index 85afde1fa3e5..a62e0be3a2f1 100644
--- a/arch/x86/platform/Makefile
+++ b/arch/x86/platform/Makefile
@@ -5,6 +5,7 @@ obj-y += geode/
5obj-y += goldfish/ 5obj-y += goldfish/
6obj-y += iris/ 6obj-y += iris/
7obj-y += intel-mid/ 7obj-y += intel-mid/
8obj-y += intel-quark/
8obj-y += olpc/ 9obj-y += olpc/
9obj-y += scx200/ 10obj-y += scx200/
10obj-y += sfi/ 11obj-y += sfi/
diff --git a/arch/x86/platform/efi/efi_stub_64.S b/arch/x86/platform/efi/efi_stub_64.S
index 5fcda7272550..86d0f9e08dd9 100644
--- a/arch/x86/platform/efi/efi_stub_64.S
+++ b/arch/x86/platform/efi/efi_stub_64.S
@@ -91,167 +91,6 @@ ENTRY(efi_call)
91 ret 91 ret
92ENDPROC(efi_call) 92ENDPROC(efi_call)
93 93
94#ifdef CONFIG_EFI_MIXED
95
96/*
97 * We run this function from the 1:1 mapping.
98 *
99 * This function must be invoked with a 1:1 mapped stack.
100 */
101ENTRY(__efi64_thunk)
102 movl %ds, %eax
103 push %rax
104 movl %es, %eax
105 push %rax
106 movl %ss, %eax
107 push %rax
108
109 subq $32, %rsp
110 movl %esi, 0x0(%rsp)
111 movl %edx, 0x4(%rsp)
112 movl %ecx, 0x8(%rsp)
113 movq %r8, %rsi
114 movl %esi, 0xc(%rsp)
115 movq %r9, %rsi
116 movl %esi, 0x10(%rsp)
117
118 sgdt save_gdt(%rip)
119
120 leaq 1f(%rip), %rbx
121 movq %rbx, func_rt_ptr(%rip)
122
123 /* Switch to gdt with 32-bit segments */
124 movl 64(%rsp), %eax
125 lgdt (%rax)
126
127 leaq efi_enter32(%rip), %rax
128 pushq $__KERNEL_CS
129 pushq %rax
130 lretq
131
1321: addq $32, %rsp
133
134 lgdt save_gdt(%rip)
135
136 pop %rbx
137 movl %ebx, %ss
138 pop %rbx
139 movl %ebx, %es
140 pop %rbx
141 movl %ebx, %ds
142
143 /*
144 * Convert 32-bit status code into 64-bit.
145 */
146 test %rax, %rax
147 jz 1f
148 movl %eax, %ecx
149 andl $0x0fffffff, %ecx
150 andl $0xf0000000, %eax
151 shl $32, %rax
152 or %rcx, %rax
1531:
154 ret
155ENDPROC(__efi64_thunk)
156
157ENTRY(efi_exit32)
158 movq func_rt_ptr(%rip), %rax
159 push %rax
160 mov %rdi, %rax
161 ret
162ENDPROC(efi_exit32)
163
164 .code32
165/*
166 * EFI service pointer must be in %edi.
167 *
168 * The stack should represent the 32-bit calling convention.
169 */
170ENTRY(efi_enter32)
171 movl $__KERNEL_DS, %eax
172 movl %eax, %ds
173 movl %eax, %es
174 movl %eax, %ss
175
176 /* Reload pgtables */
177 movl %cr3, %eax
178 movl %eax, %cr3
179
180 /* Disable paging */
181 movl %cr0, %eax
182 btrl $X86_CR0_PG_BIT, %eax
183 movl %eax, %cr0
184
185 /* Disable long mode via EFER */
186 movl $MSR_EFER, %ecx
187 rdmsr
188 btrl $_EFER_LME, %eax
189 wrmsr
190
191 call *%edi
192
193 /* We must preserve return value */
194 movl %eax, %edi
195
196 /*
197 * Some firmware will return with interrupts enabled. Be sure to
198 * disable them before we switch GDTs.
199 */
200 cli
201
202 movl 68(%esp), %eax
203 movl %eax, 2(%eax)
204 lgdtl (%eax)
205
206 movl %cr4, %eax
207 btsl $(X86_CR4_PAE_BIT), %eax
208 movl %eax, %cr4
209
210 movl %cr3, %eax
211 movl %eax, %cr3
212
213 movl $MSR_EFER, %ecx
214 rdmsr
215 btsl $_EFER_LME, %eax
216 wrmsr
217
218 xorl %eax, %eax
219 lldt %ax
220
221 movl 72(%esp), %eax
222 pushl $__KERNEL_CS
223 pushl %eax
224
225 /* Enable paging */
226 movl %cr0, %eax
227 btsl $X86_CR0_PG_BIT, %eax
228 movl %eax, %cr0
229 lret
230ENDPROC(efi_enter32)
231
232 .data
233 .balign 8
234 .global efi32_boot_gdt
235efi32_boot_gdt: .word 0
236 .quad 0
237
238save_gdt: .word 0
239 .quad 0
240func_rt_ptr: .quad 0
241
242 .global efi_gdt64
243efi_gdt64:
244 .word efi_gdt64_end - efi_gdt64
245 .long 0 /* Filled out by user */
246 .word 0
247 .quad 0x0000000000000000 /* NULL descriptor */
248 .quad 0x00af9a000000ffff /* __KERNEL_CS */
249 .quad 0x00cf92000000ffff /* __KERNEL_DS */
250 .quad 0x0080890000000000 /* TS descriptor */
251 .quad 0x0000000000000000 /* TS continued */
252efi_gdt64_end:
253#endif /* CONFIG_EFI_MIXED */
254
255 .data 94 .data
256ENTRY(efi_scratch) 95ENTRY(efi_scratch)
257 .fill 3,8,0 96 .fill 3,8,0
diff --git a/arch/x86/platform/efi/efi_thunk_64.S b/arch/x86/platform/efi/efi_thunk_64.S
index 8806fa73e6e6..ff85d28c50f2 100644
--- a/arch/x86/platform/efi/efi_thunk_64.S
+++ b/arch/x86/platform/efi/efi_thunk_64.S
@@ -1,9 +1,26 @@
1/* 1/*
2 * Copyright (C) 2014 Intel Corporation; author Matt Fleming 2 * Copyright (C) 2014 Intel Corporation; author Matt Fleming
3 *
4 * Support for invoking 32-bit EFI runtime services from a 64-bit
5 * kernel.
6 *
7 * The below thunking functions are only used after ExitBootServices()
8 * has been called. This simplifies things considerably as compared with
9 * the early EFI thunking because we can leave all the kernel state
10 * intact (GDT, IDT, etc) and simply invoke the the 32-bit EFI runtime
11 * services from __KERNEL32_CS. This means we can continue to service
12 * interrupts across an EFI mixed mode call.
13 *
14 * We do however, need to handle the fact that we're running in a full
15 * 64-bit virtual address space. Things like the stack and instruction
16 * addresses need to be accessible by the 32-bit firmware, so we rely on
17 * using the identity mappings in the EFI page table to access the stack
18 * and kernel text (see efi_setup_page_tables()).
3 */ 19 */
4 20
5#include <linux/linkage.h> 21#include <linux/linkage.h>
6#include <asm/page_types.h> 22#include <asm/page_types.h>
23#include <asm/segment.h>
7 24
8 .text 25 .text
9 .code64 26 .code64
@@ -33,14 +50,6 @@ ENTRY(efi64_thunk)
33 leaq efi_exit32(%rip), %rbx 50 leaq efi_exit32(%rip), %rbx
34 subq %rax, %rbx 51 subq %rax, %rbx
35 movl %ebx, 8(%rsp) 52 movl %ebx, 8(%rsp)
36 leaq efi_gdt64(%rip), %rbx
37 subq %rax, %rbx
38 movl %ebx, 2(%ebx)
39 movl %ebx, 4(%rsp)
40 leaq efi_gdt32(%rip), %rbx
41 subq %rax, %rbx
42 movl %ebx, 2(%ebx)
43 movl %ebx, (%rsp)
44 53
45 leaq __efi64_thunk(%rip), %rbx 54 leaq __efi64_thunk(%rip), %rbx
46 subq %rax, %rbx 55 subq %rax, %rbx
@@ -52,14 +61,92 @@ ENTRY(efi64_thunk)
52 retq 61 retq
53ENDPROC(efi64_thunk) 62ENDPROC(efi64_thunk)
54 63
55 .data 64/*
56efi_gdt32: 65 * We run this function from the 1:1 mapping.
57 .word efi_gdt32_end - efi_gdt32 66 *
58 .long 0 /* Filled out above */ 67 * This function must be invoked with a 1:1 mapped stack.
59 .word 0 68 */
60 .quad 0x0000000000000000 /* NULL descriptor */ 69ENTRY(__efi64_thunk)
61 .quad 0x00cf9a000000ffff /* __KERNEL_CS */ 70 movl %ds, %eax
62 .quad 0x00cf93000000ffff /* __KERNEL_DS */ 71 push %rax
63efi_gdt32_end: 72 movl %es, %eax
73 push %rax
74 movl %ss, %eax
75 push %rax
76
77 subq $32, %rsp
78 movl %esi, 0x0(%rsp)
79 movl %edx, 0x4(%rsp)
80 movl %ecx, 0x8(%rsp)
81 movq %r8, %rsi
82 movl %esi, 0xc(%rsp)
83 movq %r9, %rsi
84 movl %esi, 0x10(%rsp)
85
86 leaq 1f(%rip), %rbx
87 movq %rbx, func_rt_ptr(%rip)
88
89 /* Switch to 32-bit descriptor */
90 pushq $__KERNEL32_CS
91 leaq efi_enter32(%rip), %rax
92 pushq %rax
93 lretq
94
951: addq $32, %rsp
96
97 pop %rbx
98 movl %ebx, %ss
99 pop %rbx
100 movl %ebx, %es
101 pop %rbx
102 movl %ebx, %ds
64 103
104 /*
105 * Convert 32-bit status code into 64-bit.
106 */
107 test %rax, %rax
108 jz 1f
109 movl %eax, %ecx
110 andl $0x0fffffff, %ecx
111 andl $0xf0000000, %eax
112 shl $32, %rax
113 or %rcx, %rax
1141:
115 ret
116ENDPROC(__efi64_thunk)
117
118ENTRY(efi_exit32)
119 movq func_rt_ptr(%rip), %rax
120 push %rax
121 mov %rdi, %rax
122 ret
123ENDPROC(efi_exit32)
124
125 .code32
126/*
127 * EFI service pointer must be in %edi.
128 *
129 * The stack should represent the 32-bit calling convention.
130 */
131ENTRY(efi_enter32)
132 movl $__KERNEL_DS, %eax
133 movl %eax, %ds
134 movl %eax, %es
135 movl %eax, %ss
136
137 call *%edi
138
139 /* We must preserve return value */
140 movl %eax, %edi
141
142 movl 72(%esp), %eax
143 pushl $__KERNEL_CS
144 pushl %eax
145
146 lret
147ENDPROC(efi_enter32)
148
149 .data
150 .balign 8
151func_rt_ptr: .quad 0
65efi_saved_sp: .quad 0 152efi_saved_sp: .quad 0
diff --git a/arch/x86/platform/intel-mid/intel-mid.c b/arch/x86/platform/intel-mid/intel-mid.c
index 1bbedc4b0f88..3005f0c89f2e 100644
--- a/arch/x86/platform/intel-mid/intel-mid.c
+++ b/arch/x86/platform/intel-mid/intel-mid.c
@@ -130,7 +130,7 @@ static void intel_mid_arch_setup(void)
130 intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip](); 130 intel_mid_ops = get_intel_mid_ops[__intel_mid_cpu_chip]();
131 else { 131 else {
132 intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL](); 132 intel_mid_ops = get_intel_mid_ops[INTEL_MID_CPU_CHIP_PENWELL]();
133 pr_info("ARCH: Uknown SoC, assuming PENWELL!\n"); 133 pr_info("ARCH: Unknown SoC, assuming PENWELL!\n");
134 } 134 }
135 135
136out: 136out:
diff --git a/arch/x86/platform/intel-quark/Makefile b/arch/x86/platform/intel-quark/Makefile
new file mode 100644
index 000000000000..9cc57ed36022
--- /dev/null
+++ b/arch/x86/platform/intel-quark/Makefile
@@ -0,0 +1,2 @@
1obj-$(CONFIG_INTEL_IMR) += imr.o
2obj-$(CONFIG_DEBUG_IMR_SELFTEST) += imr_selftest.o
diff --git a/arch/x86/platform/intel-quark/imr.c b/arch/x86/platform/intel-quark/imr.c
new file mode 100644
index 000000000000..0ee619f9fcb7
--- /dev/null
+++ b/arch/x86/platform/intel-quark/imr.c
@@ -0,0 +1,661 @@
1/**
2 * imr.c
3 *
4 * Copyright(c) 2013 Intel Corporation.
5 * Copyright(c) 2015 Bryan O'Donoghue <pure.logic@nexus-software.ie>
6 *
7 * IMR registers define an isolated region of memory that can
8 * be masked to prohibit certain system agents from accessing memory.
9 * When a device behind a masked port performs an access - snooped or
10 * not, an IMR may optionally prevent that transaction from changing
11 * the state of memory or from getting correct data in response to the
12 * operation.
13 *
14 * Write data will be dropped and reads will return 0xFFFFFFFF, the
15 * system will reset and system BIOS will print out an error message to
16 * inform the user that an IMR has been violated.
17 *
18 * This code is based on the Linux MTRR code and reference code from
19 * Intel's Quark BSP EFI, Linux and grub code.
20 *
21 * See quark-x1000-datasheet.pdf for register definitions.
22 * http://www.intel.com/content/dam/www/public/us/en/documents/datasheets/quark-x1000-datasheet.pdf
23 */
24
25#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
26
27#include <asm-generic/sections.h>
28#include <asm/cpu_device_id.h>
29#include <asm/imr.h>
30#include <asm/iosf_mbi.h>
31#include <linux/debugfs.h>
32#include <linux/init.h>
33#include <linux/mm.h>
34#include <linux/module.h>
35#include <linux/types.h>
36
37struct imr_device {
38 struct dentry *file;
39 bool init;
40 struct mutex lock;
41 int max_imr;
42 int reg_base;
43};
44
45static struct imr_device imr_dev;
46
47/*
48 * IMR read/write mask control registers.
49 * See quark-x1000-datasheet.pdf sections 12.7.4.5 and 12.7.4.6 for
50 * bit definitions.
51 *
52 * addr_hi
53 * 31 Lock bit
54 * 30:24 Reserved
55 * 23:2 1 KiB aligned lo address
56 * 1:0 Reserved
57 *
58 * addr_hi
59 * 31:24 Reserved
60 * 23:2 1 KiB aligned hi address
61 * 1:0 Reserved
62 */
63#define IMR_LOCK BIT(31)
64
65struct imr_regs {
66 u32 addr_lo;
67 u32 addr_hi;
68 u32 rmask;
69 u32 wmask;
70};
71
72#define IMR_NUM_REGS (sizeof(struct imr_regs)/sizeof(u32))
73#define IMR_SHIFT 8
74#define imr_to_phys(x) ((x) << IMR_SHIFT)
75#define phys_to_imr(x) ((x) >> IMR_SHIFT)
76
77/**
78 * imr_is_enabled - true if an IMR is enabled false otherwise.
79 *
80 * Determines if an IMR is enabled based on address range and read/write
81 * mask. An IMR set with an address range set to zero and a read/write
82 * access mask set to all is considered to be disabled. An IMR in any
83 * other state - for example set to zero but without read/write access
84 * all is considered to be enabled. This definition of disabled is how
85 * firmware switches off an IMR and is maintained in kernel for
86 * consistency.
87 *
88 * @imr: pointer to IMR descriptor.
89 * @return: true if IMR enabled false if disabled.
90 */
91static inline int imr_is_enabled(struct imr_regs *imr)
92{
93 return !(imr->rmask == IMR_READ_ACCESS_ALL &&
94 imr->wmask == IMR_WRITE_ACCESS_ALL &&
95 imr_to_phys(imr->addr_lo) == 0 &&
96 imr_to_phys(imr->addr_hi) == 0);
97}
98
99/**
100 * imr_read - read an IMR at a given index.
101 *
102 * Requires caller to hold imr mutex.
103 *
104 * @idev: pointer to imr_device structure.
105 * @imr_id: IMR entry to read.
106 * @imr: IMR structure representing address and access masks.
107 * @return: 0 on success or error code passed from mbi_iosf on failure.
108 */
109static int imr_read(struct imr_device *idev, u32 imr_id, struct imr_regs *imr)
110{
111 u32 reg = imr_id * IMR_NUM_REGS + idev->reg_base;
112 int ret;
113
114 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ,
115 reg++, &imr->addr_lo);
116 if (ret)
117 return ret;
118
119 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ,
120 reg++, &imr->addr_hi);
121 if (ret)
122 return ret;
123
124 ret = iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ,
125 reg++, &imr->rmask);
126 if (ret)
127 return ret;
128
129 return iosf_mbi_read(QRK_MBI_UNIT_MM, QRK_MBI_MM_READ,
130 reg++, &imr->wmask);
131}
132
133/**
134 * imr_write - write an IMR at a given index.
135 *
136 * Requires caller to hold imr mutex.
137 * Note lock bits need to be written independently of address bits.
138 *
139 * @idev: pointer to imr_device structure.
140 * @imr_id: IMR entry to write.
141 * @imr: IMR structure representing address and access masks.
142 * @lock: indicates if the IMR lock bit should be applied.
143 * @return: 0 on success or error code passed from mbi_iosf on failure.
144 */
145static int imr_write(struct imr_device *idev, u32 imr_id,
146 struct imr_regs *imr, bool lock)
147{
148 unsigned long flags;
149 u32 reg = imr_id * IMR_NUM_REGS + idev->reg_base;
150 int ret;
151
152 local_irq_save(flags);
153
154 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE, reg++,
155 imr->addr_lo);
156 if (ret)
157 goto failed;
158
159 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE,
160 reg++, imr->addr_hi);
161 if (ret)
162 goto failed;
163
164 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE,
165 reg++, imr->rmask);
166 if (ret)
167 goto failed;
168
169 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE,
170 reg++, imr->wmask);
171 if (ret)
172 goto failed;
173
174 /* Lock bit must be set separately to addr_lo address bits. */
175 if (lock) {
176 imr->addr_lo |= IMR_LOCK;
177 ret = iosf_mbi_write(QRK_MBI_UNIT_MM, QRK_MBI_MM_WRITE,
178 reg - IMR_NUM_REGS, imr->addr_lo);
179 if (ret)
180 goto failed;
181 }
182
183 local_irq_restore(flags);
184 return 0;
185failed:
186 /*
187 * If writing to the IOSF failed then we're in an unknown state,
188 * likely a very bad state. An IMR in an invalid state will almost
189 * certainly lead to a memory access violation.
190 */
191 local_irq_restore(flags);
192 WARN(ret, "IOSF-MBI write fail range 0x%08x-0x%08x unreliable\n",
193 imr_to_phys(imr->addr_lo), imr_to_phys(imr->addr_hi) + IMR_MASK);
194
195 return ret;
196}
197
198/**
199 * imr_dbgfs_state_show - print state of IMR registers.
200 *
201 * @s: pointer to seq_file for output.
202 * @unused: unused parameter.
203 * @return: 0 on success or error code passed from mbi_iosf on failure.
204 */
205static int imr_dbgfs_state_show(struct seq_file *s, void *unused)
206{
207 phys_addr_t base;
208 phys_addr_t end;
209 int i;
210 struct imr_device *idev = s->private;
211 struct imr_regs imr;
212 size_t size;
213 int ret = -ENODEV;
214
215 mutex_lock(&idev->lock);
216
217 for (i = 0; i < idev->max_imr; i++) {
218
219 ret = imr_read(idev, i, &imr);
220 if (ret)
221 break;
222
223 /*
224 * Remember to add IMR_ALIGN bytes to size to indicate the
225 * inherent IMR_ALIGN size bytes contained in the masked away
226 * lower ten bits.
227 */
228 if (imr_is_enabled(&imr)) {
229 base = imr_to_phys(imr.addr_lo);
230 end = imr_to_phys(imr.addr_hi) + IMR_MASK;
231 } else {
232 base = 0;
233 end = 0;
234 }
235 size = end - base;
236 seq_printf(s, "imr%02i: base=%pa, end=%pa, size=0x%08zx "
237 "rmask=0x%08x, wmask=0x%08x, %s, %s\n", i,
238 &base, &end, size, imr.rmask, imr.wmask,
239 imr_is_enabled(&imr) ? "enabled " : "disabled",
240 imr.addr_lo & IMR_LOCK ? "locked" : "unlocked");
241 }
242
243 mutex_unlock(&idev->lock);
244 return ret;
245}
246
247/**
248 * imr_state_open - debugfs open callback.
249 *
250 * @inode: pointer to struct inode.
251 * @file: pointer to struct file.
252 * @return: result of single open.
253 */
254static int imr_state_open(struct inode *inode, struct file *file)
255{
256 return single_open(file, imr_dbgfs_state_show, inode->i_private);
257}
258
259static const struct file_operations imr_state_ops = {
260 .open = imr_state_open,
261 .read = seq_read,
262 .llseek = seq_lseek,
263 .release = single_release,
264};
265
266/**
267 * imr_debugfs_register - register debugfs hooks.
268 *
269 * @idev: pointer to imr_device structure.
270 * @return: 0 on success - errno on failure.
271 */
272static int imr_debugfs_register(struct imr_device *idev)
273{
274 idev->file = debugfs_create_file("imr_state", S_IFREG | S_IRUGO, NULL,
275 idev, &imr_state_ops);
276 return PTR_ERR_OR_ZERO(idev->file);
277}
278
279/**
280 * imr_debugfs_unregister - unregister debugfs hooks.
281 *
282 * @idev: pointer to imr_device structure.
283 * @return:
284 */
285static void imr_debugfs_unregister(struct imr_device *idev)
286{
287 debugfs_remove(idev->file);
288}
289
290/**
291 * imr_check_params - check passed address range IMR alignment and non-zero size
292 *
293 * @base: base address of intended IMR.
294 * @size: size of intended IMR.
295 * @return: zero on valid range -EINVAL on unaligned base/size.
296 */
297static int imr_check_params(phys_addr_t base, size_t size)
298{
299 if ((base & IMR_MASK) || (size & IMR_MASK)) {
300 pr_err("base %pa size 0x%08zx must align to 1KiB\n",
301 &base, size);
302 return -EINVAL;
303 }
304 if (size == 0)
305 return -EINVAL;
306
307 return 0;
308}
309
310/**
311 * imr_raw_size - account for the IMR_ALIGN bytes that addr_hi appends.
312 *
313 * IMR addr_hi has a built in offset of plus IMR_ALIGN (0x400) bytes from the
314 * value in the register. We need to subtract IMR_ALIGN bytes from input sizes
315 * as a result.
316 *
317 * @size: input size bytes.
318 * @return: reduced size.
319 */
320static inline size_t imr_raw_size(size_t size)
321{
322 return size - IMR_ALIGN;
323}
324
325/**
326 * imr_address_overlap - detects an address overlap.
327 *
328 * @addr: address to check against an existing IMR.
329 * @imr: imr being checked.
330 * @return: true for overlap false for no overlap.
331 */
332static inline int imr_address_overlap(phys_addr_t addr, struct imr_regs *imr)
333{
334 return addr >= imr_to_phys(imr->addr_lo) && addr <= imr_to_phys(imr->addr_hi);
335}
336
337/**
338 * imr_add_range - add an Isolated Memory Region.
339 *
340 * @base: physical base address of region aligned to 1KiB.
341 * @size: physical size of region in bytes must be aligned to 1KiB.
342 * @read_mask: read access mask.
343 * @write_mask: write access mask.
344 * @lock: indicates whether or not to permanently lock this region.
345 * @return: zero on success or negative value indicating error.
346 */
347int imr_add_range(phys_addr_t base, size_t size,
348 unsigned int rmask, unsigned int wmask, bool lock)
349{
350 phys_addr_t end;
351 unsigned int i;
352 struct imr_device *idev = &imr_dev;
353 struct imr_regs imr;
354 size_t raw_size;
355 int reg;
356 int ret;
357
358 if (WARN_ONCE(idev->init == false, "driver not initialized"))
359 return -ENODEV;
360
361 ret = imr_check_params(base, size);
362 if (ret)
363 return ret;
364
365 /* Tweak the size value. */
366 raw_size = imr_raw_size(size);
367 end = base + raw_size;
368
369 /*
370 * Check for reserved IMR value common to firmware, kernel and grub
371 * indicating a disabled IMR.
372 */
373 imr.addr_lo = phys_to_imr(base);
374 imr.addr_hi = phys_to_imr(end);
375 imr.rmask = rmask;
376 imr.wmask = wmask;
377 if (!imr_is_enabled(&imr))
378 return -ENOTSUPP;
379
380 mutex_lock(&idev->lock);
381
382 /*
383 * Find a free IMR while checking for an existing overlapping range.
384 * Note there's no restriction in silicon to prevent IMR overlaps.
385 * For the sake of simplicity and ease in defining/debugging an IMR
386 * memory map we exclude IMR overlaps.
387 */
388 reg = -1;
389 for (i = 0; i < idev->max_imr; i++) {
390 ret = imr_read(idev, i, &imr);
391 if (ret)
392 goto failed;
393
394 /* Find overlap @ base or end of requested range. */
395 ret = -EINVAL;
396 if (imr_is_enabled(&imr)) {
397 if (imr_address_overlap(base, &imr))
398 goto failed;
399 if (imr_address_overlap(end, &imr))
400 goto failed;
401 } else {
402 reg = i;
403 }
404 }
405
406 /* Error out if we have no free IMR entries. */
407 if (reg == -1) {
408 ret = -ENOMEM;
409 goto failed;
410 }
411
412 pr_debug("add %d phys %pa-%pa size %zx mask 0x%08x wmask 0x%08x\n",
413 reg, &base, &end, raw_size, rmask, wmask);
414
415 /* Enable IMR at specified range and access mask. */
416 imr.addr_lo = phys_to_imr(base);
417 imr.addr_hi = phys_to_imr(end);
418 imr.rmask = rmask;
419 imr.wmask = wmask;
420
421 ret = imr_write(idev, reg, &imr, lock);
422 if (ret < 0) {
423 /*
424 * In the highly unlikely event iosf_mbi_write failed
425 * attempt to rollback the IMR setup skipping the trapping
426 * of further IOSF write failures.
427 */
428 imr.addr_lo = 0;
429 imr.addr_hi = 0;
430 imr.rmask = IMR_READ_ACCESS_ALL;
431 imr.wmask = IMR_WRITE_ACCESS_ALL;
432 imr_write(idev, reg, &imr, false);
433 }
434failed:
435 mutex_unlock(&idev->lock);
436 return ret;
437}
438EXPORT_SYMBOL_GPL(imr_add_range);
439
440/**
441 * __imr_remove_range - delete an Isolated Memory Region.
442 *
443 * This function allows you to delete an IMR by its index specified by reg or
444 * by address range specified by base and size respectively. If you specify an
445 * index on its own the base and size parameters are ignored.
446 * imr_remove_range(0, base, size); delete IMR at index 0 base/size ignored.
447 * imr_remove_range(-1, base, size); delete IMR from base to base+size.
448 *
449 * @reg: imr index to remove.
450 * @base: physical base address of region aligned to 1 KiB.
451 * @size: physical size of region in bytes aligned to 1 KiB.
452 * @return: -EINVAL on invalid range or out or range id
453 * -ENODEV if reg is valid but no IMR exists or is locked
454 * 0 on success.
455 */
456static int __imr_remove_range(int reg, phys_addr_t base, size_t size)
457{
458 phys_addr_t end;
459 bool found = false;
460 unsigned int i;
461 struct imr_device *idev = &imr_dev;
462 struct imr_regs imr;
463 size_t raw_size;
464 int ret = 0;
465
466 if (WARN_ONCE(idev->init == false, "driver not initialized"))
467 return -ENODEV;
468
469 /*
470 * Validate address range if deleting by address, else we are
471 * deleting by index where base and size will be ignored.
472 */
473 if (reg == -1) {
474 ret = imr_check_params(base, size);
475 if (ret)
476 return ret;
477 }
478
479 /* Tweak the size value. */
480 raw_size = imr_raw_size(size);
481 end = base + raw_size;
482
483 mutex_lock(&idev->lock);
484
485 if (reg >= 0) {
486 /* If a specific IMR is given try to use it. */
487 ret = imr_read(idev, reg, &imr);
488 if (ret)
489 goto failed;
490
491 if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK) {
492 ret = -ENODEV;
493 goto failed;
494 }
495 found = true;
496 } else {
497 /* Search for match based on address range. */
498 for (i = 0; i < idev->max_imr; i++) {
499 ret = imr_read(idev, i, &imr);
500 if (ret)
501 goto failed;
502
503 if (!imr_is_enabled(&imr) || imr.addr_lo & IMR_LOCK)
504 continue;
505
506 if ((imr_to_phys(imr.addr_lo) == base) &&
507 (imr_to_phys(imr.addr_hi) == end)) {
508 found = true;
509 reg = i;
510 break;
511 }
512 }
513 }
514
515 if (!found) {
516 ret = -ENODEV;
517 goto failed;
518 }
519
520 pr_debug("remove %d phys %pa-%pa size %zx\n", reg, &base, &end, raw_size);
521
522 /* Tear down the IMR. */
523 imr.addr_lo = 0;
524 imr.addr_hi = 0;
525 imr.rmask = IMR_READ_ACCESS_ALL;
526 imr.wmask = IMR_WRITE_ACCESS_ALL;
527
528 ret = imr_write(idev, reg, &imr, false);
529
530failed:
531 mutex_unlock(&idev->lock);
532 return ret;
533}
534
535/**
536 * imr_remove_range - delete an Isolated Memory Region by address
537 *
538 * This function allows you to delete an IMR by an address range specified
539 * by base and size respectively.
540 * imr_remove_range(base, size); delete IMR from base to base+size.
541 *
542 * @base: physical base address of region aligned to 1 KiB.
543 * @size: physical size of region in bytes aligned to 1 KiB.
544 * @return: -EINVAL on invalid range or out or range id
545 * -ENODEV if reg is valid but no IMR exists or is locked
546 * 0 on success.
547 */
548int imr_remove_range(phys_addr_t base, size_t size)
549{
550 return __imr_remove_range(-1, base, size);
551}
552EXPORT_SYMBOL_GPL(imr_remove_range);
553
554/**
555 * imr_clear - delete an Isolated Memory Region by index
556 *
557 * This function allows you to delete an IMR by an address range specified
558 * by the index of the IMR. Useful for initial sanitization of the IMR
559 * address map.
560 * imr_ge(base, size); delete IMR from base to base+size.
561 *
562 * @reg: imr index to remove.
563 * @return: -EINVAL on invalid range or out or range id
564 * -ENODEV if reg is valid but no IMR exists or is locked
565 * 0 on success.
566 */
567static inline int imr_clear(int reg)
568{
569 return __imr_remove_range(reg, 0, 0);
570}
571
572/**
573 * imr_fixup_memmap - Tear down IMRs used during bootup.
574 *
575 * BIOS and Grub both setup IMRs around compressed kernel, initrd memory
576 * that need to be removed before the kernel hands out one of the IMR
577 * encased addresses to a downstream DMA agent such as the SD or Ethernet.
578 * IMRs on Galileo are setup to immediately reset the system on violation.
579 * As a result if you're running a root filesystem from SD - you'll need
580 * the boot-time IMRs torn down or you'll find seemingly random resets when
581 * using your filesystem.
582 *
583 * @idev: pointer to imr_device structure.
584 * @return:
585 */
586static void __init imr_fixup_memmap(struct imr_device *idev)
587{
588 phys_addr_t base = virt_to_phys(&_text);
589 size_t size = virt_to_phys(&__end_rodata) - base;
590 int i;
591 int ret;
592
593 /* Tear down all existing unlocked IMRs. */
594 for (i = 0; i < idev->max_imr; i++)
595 imr_clear(i);
596
597 /*
598 * Setup a locked IMR around the physical extent of the kernel
599 * from the beginning of the .text secton to the end of the
600 * .rodata section as one physically contiguous block.
601 */
602 ret = imr_add_range(base, size, IMR_CPU, IMR_CPU, true);
603 if (ret < 0) {
604 pr_err("unable to setup IMR for kernel: (%p - %p)\n",
605 &_text, &__end_rodata);
606 } else {
607 pr_info("protecting kernel .text - .rodata: %zu KiB (%p - %p)\n",
608 size / 1024, &_text, &__end_rodata);
609 }
610
611}
612
613static const struct x86_cpu_id imr_ids[] __initconst = {
614 { X86_VENDOR_INTEL, 5, 9 }, /* Intel Quark SoC X1000. */
615 {}
616};
617MODULE_DEVICE_TABLE(x86cpu, imr_ids);
618
619/**
620 * imr_init - entry point for IMR driver.
621 *
622 * return: -ENODEV for no IMR support 0 if good to go.
623 */
624static int __init imr_init(void)
625{
626 struct imr_device *idev = &imr_dev;
627 int ret;
628
629 if (!x86_match_cpu(imr_ids) || !iosf_mbi_available())
630 return -ENODEV;
631
632 idev->max_imr = QUARK_X1000_IMR_MAX;
633 idev->reg_base = QUARK_X1000_IMR_REGBASE;
634 idev->init = true;
635
636 mutex_init(&idev->lock);
637 ret = imr_debugfs_register(idev);
638 if (ret != 0)
639 pr_warn("debugfs register failed!\n");
640 imr_fixup_memmap(idev);
641 return 0;
642}
643
644/**
645 * imr_exit - exit point for IMR code.
646 *
647 * Deregisters debugfs, leave IMR state as-is.
648 *
649 * return:
650 */
651static void __exit imr_exit(void)
652{
653 imr_debugfs_unregister(&imr_dev);
654}
655
656module_init(imr_init);
657module_exit(imr_exit);
658
659MODULE_AUTHOR("Bryan O'Donoghue <pure.logic@nexus-software.ie>");
660MODULE_DESCRIPTION("Intel Isolated Memory Region driver");
661MODULE_LICENSE("Dual BSD/GPL");
diff --git a/arch/x86/platform/intel-quark/imr_selftest.c b/arch/x86/platform/intel-quark/imr_selftest.c
new file mode 100644
index 000000000000..c9a0838890e2
--- /dev/null
+++ b/arch/x86/platform/intel-quark/imr_selftest.c
@@ -0,0 +1,129 @@
1/**
2 * imr_selftest.c
3 *
4 * Copyright(c) 2013 Intel Corporation.
5 * Copyright(c) 2015 Bryan O'Donoghue <pure.logic@nexus-software.ie>
6 *
7 * IMR self test. The purpose of this module is to run a set of tests on the
8 * IMR API to validate it's sanity. We check for overlapping, reserved
9 * addresses and setup/teardown sanity.
10 *
11 */
12
13#include <asm-generic/sections.h>
14#include <asm/imr.h>
15#include <linux/init.h>
16#include <linux/mm.h>
17#include <linux/module.h>
18#include <linux/types.h>
19
20#define SELFTEST KBUILD_MODNAME ": "
21/**
22 * imr_self_test_result - Print result string for self test.
23 *
24 * @res: result code - true if test passed false otherwise.
25 * @fmt: format string.
26 * ... variadic argument list.
27 */
28static void __init imr_self_test_result(int res, const char *fmt, ...)
29{
30 va_list vlist;
31
32 /* Print pass/fail. */
33 if (res)
34 pr_info(SELFTEST "pass ");
35 else
36 pr_info(SELFTEST "fail ");
37
38 /* Print variable string. */
39 va_start(vlist, fmt);
40 vprintk(fmt, vlist);
41 va_end(vlist);
42
43 /* Optional warning. */
44 WARN(res == 0, "test failed");
45}
46#undef SELFTEST
47
48/**
49 * imr_self_test
50 *
51 * Verify IMR self_test with some simple tests to verify overlap,
52 * zero sized allocations and 1 KiB sized areas.
53 *
54 */
55static void __init imr_self_test(void)
56{
57 phys_addr_t base = virt_to_phys(&_text);
58 size_t size = virt_to_phys(&__end_rodata) - base;
59 const char *fmt_over = "overlapped IMR @ (0x%08lx - 0x%08lx)\n";
60 int ret;
61
62 /* Test zero zero. */
63 ret = imr_add_range(0, 0, 0, 0, false);
64 imr_self_test_result(ret < 0, "zero sized IMR\n");
65
66 /* Test exact overlap. */
67 ret = imr_add_range(base, size, IMR_CPU, IMR_CPU, false);
68 imr_self_test_result(ret < 0, fmt_over, __va(base), __va(base + size));
69
70 /* Test overlap with base inside of existing. */
71 base += size - IMR_ALIGN;
72 ret = imr_add_range(base, size, IMR_CPU, IMR_CPU, false);
73 imr_self_test_result(ret < 0, fmt_over, __va(base), __va(base + size));
74
75 /* Test overlap with end inside of existing. */
76 base -= size + IMR_ALIGN * 2;
77 ret = imr_add_range(base, size, IMR_CPU, IMR_CPU, false);
78 imr_self_test_result(ret < 0, fmt_over, __va(base), __va(base + size));
79
80 /* Test that a 1 KiB IMR @ zero with read/write all will bomb out. */
81 ret = imr_add_range(0, IMR_ALIGN, IMR_READ_ACCESS_ALL,
82 IMR_WRITE_ACCESS_ALL, false);
83 imr_self_test_result(ret < 0, "1KiB IMR @ 0x00000000 - access-all\n");
84
85 /* Test that a 1 KiB IMR @ zero with CPU only will work. */
86 ret = imr_add_range(0, IMR_ALIGN, IMR_CPU, IMR_CPU, false);
87 imr_self_test_result(ret >= 0, "1KiB IMR @ 0x00000000 - cpu-access\n");
88 if (ret >= 0) {
89 ret = imr_remove_range(0, IMR_ALIGN);
90 imr_self_test_result(ret == 0, "teardown - cpu-access\n");
91 }
92
93 /* Test 2 KiB works. */
94 size = IMR_ALIGN * 2;
95 ret = imr_add_range(0, size, IMR_READ_ACCESS_ALL,
96 IMR_WRITE_ACCESS_ALL, false);
97 imr_self_test_result(ret >= 0, "2KiB IMR @ 0x00000000\n");
98 if (ret >= 0) {
99 ret = imr_remove_range(0, size);
100 imr_self_test_result(ret == 0, "teardown 2KiB\n");
101 }
102}
103
104/**
105 * imr_self_test_init - entry point for IMR driver.
106 *
107 * return: -ENODEV for no IMR support 0 if good to go.
108 */
109static int __init imr_self_test_init(void)
110{
111 imr_self_test();
112 return 0;
113}
114
115/**
116 * imr_self_test_exit - exit point for IMR code.
117 *
118 * return:
119 */
120static void __exit imr_self_test_exit(void)
121{
122}
123
124module_init(imr_self_test_init);
125module_exit(imr_self_test_exit);
126
127MODULE_AUTHOR("Bryan O'Donoghue <pure.logic@nexus-software.ie>");
128MODULE_DESCRIPTION("Intel Isolated Memory Region self-test driver");
129MODULE_LICENSE("Dual BSD/GPL");
diff --git a/arch/x86/vdso/vdso32/sigreturn.S b/arch/x86/vdso/vdso32/sigreturn.S
index 31776d0efc8c..d7ec4e251c0a 100644
--- a/arch/x86/vdso/vdso32/sigreturn.S
+++ b/arch/x86/vdso/vdso32/sigreturn.S
@@ -17,6 +17,7 @@
17 .text 17 .text
18 .globl __kernel_sigreturn 18 .globl __kernel_sigreturn
19 .type __kernel_sigreturn,@function 19 .type __kernel_sigreturn,@function
20 nop /* this guy is needed for .LSTARTFDEDLSI1 below (watch for HACK) */
20 ALIGN 21 ALIGN
21__kernel_sigreturn: 22__kernel_sigreturn:
22.LSTART_sigreturn: 23.LSTART_sigreturn:
diff --git a/arch/x86/xen/enlighten.c b/arch/x86/xen/enlighten.c
index bd8b8459c3d0..5240f563076d 100644
--- a/arch/x86/xen/enlighten.c
+++ b/arch/x86/xen/enlighten.c
@@ -1070,6 +1070,23 @@ static inline void xen_write_cr8(unsigned long val)
1070 BUG_ON(val); 1070 BUG_ON(val);
1071} 1071}
1072#endif 1072#endif
1073
1074static u64 xen_read_msr_safe(unsigned int msr, int *err)
1075{
1076 u64 val;
1077
1078 val = native_read_msr_safe(msr, err);
1079 switch (msr) {
1080 case MSR_IA32_APICBASE:
1081#ifdef CONFIG_X86_X2APIC
1082 if (!(cpuid_ecx(1) & (1 << (X86_FEATURE_X2APIC & 31))))
1083#endif
1084 val &= ~X2APIC_ENABLE;
1085 break;
1086 }
1087 return val;
1088}
1089
1073static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high) 1090static int xen_write_msr_safe(unsigned int msr, unsigned low, unsigned high)
1074{ 1091{
1075 int ret; 1092 int ret;
@@ -1240,7 +1257,7 @@ static const struct pv_cpu_ops xen_cpu_ops __initconst = {
1240 1257
1241 .wbinvd = native_wbinvd, 1258 .wbinvd = native_wbinvd,
1242 1259
1243 .read_msr = native_read_msr_safe, 1260 .read_msr = xen_read_msr_safe,
1244 .write_msr = xen_write_msr_safe, 1261 .write_msr = xen_write_msr_safe,
1245 1262
1246 .read_tsc = native_read_tsc, 1263 .read_tsc = native_read_tsc,
@@ -1741,6 +1758,7 @@ asmlinkage __visible void __init xen_start_kernel(void)
1741#ifdef CONFIG_X86_32 1758#ifdef CONFIG_X86_32
1742 i386_start_kernel(); 1759 i386_start_kernel();
1743#else 1760#else
1761 cr4_init_shadow(); /* 32b kernel does this in i386_start_kernel() */
1744 x86_64_start_reservations((char *)__pa_symbol(&boot_params)); 1762 x86_64_start_reservations((char *)__pa_symbol(&boot_params));
1745#endif 1763#endif
1746} 1764}
diff --git a/arch/x86/xen/p2m.c b/arch/x86/xen/p2m.c
index 740ae3026a14..9f93af56a5fc 100644
--- a/arch/x86/xen/p2m.c
+++ b/arch/x86/xen/p2m.c
@@ -563,7 +563,7 @@ static bool alloc_p2m(unsigned long pfn)
563 if (p2m_pfn == PFN_DOWN(__pa(p2m_missing))) 563 if (p2m_pfn == PFN_DOWN(__pa(p2m_missing)))
564 p2m_init(p2m); 564 p2m_init(p2m);
565 else 565 else
566 p2m_init_identity(p2m, pfn); 566 p2m_init_identity(p2m, pfn & ~(P2M_PER_PAGE - 1));
567 567
568 spin_lock_irqsave(&p2m_update_lock, flags); 568 spin_lock_irqsave(&p2m_update_lock, flags);
569 569
diff --git a/arch/x86/xen/spinlock.c b/arch/x86/xen/spinlock.c
index 23b45eb9a89c..956374c1edbc 100644
--- a/arch/x86/xen/spinlock.c
+++ b/arch/x86/xen/spinlock.c
@@ -41,7 +41,7 @@ static u8 zero_stats;
41static inline void check_zero(void) 41static inline void check_zero(void)
42{ 42{
43 u8 ret; 43 u8 ret;
44 u8 old = ACCESS_ONCE(zero_stats); 44 u8 old = READ_ONCE(zero_stats);
45 if (unlikely(old)) { 45 if (unlikely(old)) {
46 ret = cmpxchg(&zero_stats, old, 0); 46 ret = cmpxchg(&zero_stats, old, 0);
47 /* This ensures only one fellow resets the stat */ 47 /* This ensures only one fellow resets the stat */
@@ -112,6 +112,7 @@ __visible void xen_lock_spinning(struct arch_spinlock *lock, __ticket_t want)
112 struct xen_lock_waiting *w = this_cpu_ptr(&lock_waiting); 112 struct xen_lock_waiting *w = this_cpu_ptr(&lock_waiting);
113 int cpu = smp_processor_id(); 113 int cpu = smp_processor_id();
114 u64 start; 114 u64 start;
115 __ticket_t head;
115 unsigned long flags; 116 unsigned long flags;
116 117
117 /* If kicker interrupts not initialized yet, just spin */ 118 /* If kicker interrupts not initialized yet, just spin */
@@ -159,11 +160,15 @@ __visible void xen_lock_spinning(struct arch_spinlock *lock, __ticket_t want)
159 */ 160 */
160 __ticket_enter_slowpath(lock); 161 __ticket_enter_slowpath(lock);
161 162
163 /* make sure enter_slowpath, which is atomic does not cross the read */
164 smp_mb__after_atomic();
165
162 /* 166 /*
163 * check again make sure it didn't become free while 167 * check again make sure it didn't become free while
164 * we weren't looking 168 * we weren't looking
165 */ 169 */
166 if (ACCESS_ONCE(lock->tickets.head) == want) { 170 head = READ_ONCE(lock->tickets.head);
171 if (__tickets_equal(head, want)) {
167 add_stats(TAKEN_SLOW_PICKUP, 1); 172 add_stats(TAKEN_SLOW_PICKUP, 1);
168 goto out; 173 goto out;
169 } 174 }
@@ -204,8 +209,8 @@ static void xen_unlock_kick(struct arch_spinlock *lock, __ticket_t next)
204 const struct xen_lock_waiting *w = &per_cpu(lock_waiting, cpu); 209 const struct xen_lock_waiting *w = &per_cpu(lock_waiting, cpu);
205 210
206 /* Make sure we read lock before want */ 211 /* Make sure we read lock before want */
207 if (ACCESS_ONCE(w->lock) == lock && 212 if (READ_ONCE(w->lock) == lock &&
208 ACCESS_ONCE(w->want) == next) { 213 READ_ONCE(w->want) == next) {
209 add_stats(RELEASED_SLOW_KICKED, 1); 214 add_stats(RELEASED_SLOW_KICKED, 1);
210 xen_send_IPI_one(cpu, XEN_SPIN_UNLOCK_VECTOR); 215 xen_send_IPI_one(cpu, XEN_SPIN_UNLOCK_VECTOR);
211 break; 216 break;
diff --git a/block/blk-throttle.c b/block/blk-throttle.c
index 9273d0969ebd..5b9c6d5c3636 100644
--- a/block/blk-throttle.c
+++ b/block/blk-throttle.c
@@ -1292,6 +1292,9 @@ static u64 tg_prfill_cpu_rwstat(struct seq_file *sf,
1292 struct blkg_rwstat rwstat = { }, tmp; 1292 struct blkg_rwstat rwstat = { }, tmp;
1293 int i, cpu; 1293 int i, cpu;
1294 1294
1295 if (tg->stats_cpu == NULL)
1296 return 0;
1297
1295 for_each_possible_cpu(cpu) { 1298 for_each_possible_cpu(cpu) {
1296 struct tg_stats_cpu *sc = per_cpu_ptr(tg->stats_cpu, cpu); 1299 struct tg_stats_cpu *sc = per_cpu_ptr(tg->stats_cpu, cpu);
1297 1300
diff --git a/drivers/acpi/acpi_lpss.c b/drivers/acpi/acpi_lpss.c
index 02e835f3cf8a..37fb19047603 100644
--- a/drivers/acpi/acpi_lpss.c
+++ b/drivers/acpi/acpi_lpss.c
@@ -65,6 +65,7 @@ struct lpss_private_data;
65 65
66struct lpss_device_desc { 66struct lpss_device_desc {
67 unsigned int flags; 67 unsigned int flags;
68 const char *clk_con_id;
68 unsigned int prv_offset; 69 unsigned int prv_offset;
69 size_t prv_size_override; 70 size_t prv_size_override;
70 void (*setup)(struct lpss_private_data *pdata); 71 void (*setup)(struct lpss_private_data *pdata);
@@ -105,7 +106,7 @@ static void lpss_uart_setup(struct lpss_private_data *pdata)
105 } 106 }
106} 107}
107 108
108static void byt_i2c_setup(struct lpss_private_data *pdata) 109static void lpss_deassert_reset(struct lpss_private_data *pdata)
109{ 110{
110 unsigned int offset; 111 unsigned int offset;
111 u32 val; 112 u32 val;
@@ -114,9 +115,18 @@ static void byt_i2c_setup(struct lpss_private_data *pdata)
114 val = readl(pdata->mmio_base + offset); 115 val = readl(pdata->mmio_base + offset);
115 val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC; 116 val |= LPSS_RESETS_RESET_APB | LPSS_RESETS_RESET_FUNC;
116 writel(val, pdata->mmio_base + offset); 117 writel(val, pdata->mmio_base + offset);
118}
119
120#define LPSS_I2C_ENABLE 0x6c
121
122static void byt_i2c_setup(struct lpss_private_data *pdata)
123{
124 lpss_deassert_reset(pdata);
117 125
118 if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset)) 126 if (readl(pdata->mmio_base + pdata->dev_desc->prv_offset))
119 pdata->fixed_clk_rate = 133000000; 127 pdata->fixed_clk_rate = 133000000;
128
129 writel(0, pdata->mmio_base + LPSS_I2C_ENABLE);
120} 130}
121 131
122static struct lpss_device_desc lpt_dev_desc = { 132static struct lpss_device_desc lpt_dev_desc = {
@@ -125,12 +135,13 @@ static struct lpss_device_desc lpt_dev_desc = {
125}; 135};
126 136
127static struct lpss_device_desc lpt_i2c_dev_desc = { 137static struct lpss_device_desc lpt_i2c_dev_desc = {
128 .flags = LPSS_CLK | LPSS_LTR, 138 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_LTR,
129 .prv_offset = 0x800, 139 .prv_offset = 0x800,
130}; 140};
131 141
132static struct lpss_device_desc lpt_uart_dev_desc = { 142static struct lpss_device_desc lpt_uart_dev_desc = {
133 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR, 143 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_LTR,
144 .clk_con_id = "baudclk",
134 .prv_offset = 0x800, 145 .prv_offset = 0x800,
135 .setup = lpss_uart_setup, 146 .setup = lpss_uart_setup,
136}; 147};
@@ -147,6 +158,7 @@ static struct lpss_device_desc byt_pwm_dev_desc = {
147 158
148static struct lpss_device_desc byt_uart_dev_desc = { 159static struct lpss_device_desc byt_uart_dev_desc = {
149 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX, 160 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
161 .clk_con_id = "baudclk",
150 .prv_offset = 0x800, 162 .prv_offset = 0x800,
151 .setup = lpss_uart_setup, 163 .setup = lpss_uart_setup,
152}; 164};
@@ -166,6 +178,12 @@ static struct lpss_device_desc byt_i2c_dev_desc = {
166 .setup = byt_i2c_setup, 178 .setup = byt_i2c_setup,
167}; 179};
168 180
181static struct lpss_device_desc bsw_spi_dev_desc = {
182 .flags = LPSS_CLK | LPSS_CLK_GATE | LPSS_CLK_DIVIDER | LPSS_SAVE_CTX,
183 .prv_offset = 0x400,
184 .setup = lpss_deassert_reset,
185};
186
169#else 187#else
170 188
171#define LPSS_ADDR(desc) (0UL) 189#define LPSS_ADDR(desc) (0UL)
@@ -198,7 +216,7 @@ static const struct acpi_device_id acpi_lpss_device_ids[] = {
198 /* Braswell LPSS devices */ 216 /* Braswell LPSS devices */
199 { "80862288", LPSS_ADDR(byt_pwm_dev_desc) }, 217 { "80862288", LPSS_ADDR(byt_pwm_dev_desc) },
200 { "8086228A", LPSS_ADDR(byt_uart_dev_desc) }, 218 { "8086228A", LPSS_ADDR(byt_uart_dev_desc) },
201 { "8086228E", LPSS_ADDR(byt_spi_dev_desc) }, 219 { "8086228E", LPSS_ADDR(bsw_spi_dev_desc) },
202 { "808622C1", LPSS_ADDR(byt_i2c_dev_desc) }, 220 { "808622C1", LPSS_ADDR(byt_i2c_dev_desc) },
203 221
204 { "INT3430", LPSS_ADDR(lpt_dev_desc) }, 222 { "INT3430", LPSS_ADDR(lpt_dev_desc) },
@@ -298,7 +316,7 @@ out:
298 return PTR_ERR(clk); 316 return PTR_ERR(clk);
299 317
300 pdata->clk = clk; 318 pdata->clk = clk;
301 clk_register_clkdev(clk, NULL, devname); 319 clk_register_clkdev(clk, dev_desc->clk_con_id, devname);
302 return 0; 320 return 0;
303} 321}
304 322
diff --git a/drivers/acpi/ec.c b/drivers/acpi/ec.c
index 982b67faaaf3..a8dd2f763382 100644
--- a/drivers/acpi/ec.c
+++ b/drivers/acpi/ec.c
@@ -680,7 +680,7 @@ static void acpi_ec_start(struct acpi_ec *ec, bool resuming)
680 /* Enable GPE for event processing (SCI_EVT=1) */ 680 /* Enable GPE for event processing (SCI_EVT=1) */
681 if (!resuming) 681 if (!resuming)
682 acpi_ec_submit_request(ec); 682 acpi_ec_submit_request(ec);
683 pr_info("+++++ EC started +++++\n"); 683 pr_debug("EC started\n");
684 } 684 }
685 spin_unlock_irqrestore(&ec->lock, flags); 685 spin_unlock_irqrestore(&ec->lock, flags);
686} 686}
@@ -712,7 +712,7 @@ static void acpi_ec_stop(struct acpi_ec *ec, bool suspending)
712 acpi_ec_complete_request(ec); 712 acpi_ec_complete_request(ec);
713 clear_bit(EC_FLAGS_STARTED, &ec->flags); 713 clear_bit(EC_FLAGS_STARTED, &ec->flags);
714 clear_bit(EC_FLAGS_STOPPED, &ec->flags); 714 clear_bit(EC_FLAGS_STOPPED, &ec->flags);
715 pr_info("+++++ EC stopped +++++\n"); 715 pr_debug("EC stopped\n");
716 } 716 }
717 spin_unlock_irqrestore(&ec->lock, flags); 717 spin_unlock_irqrestore(&ec->lock, flags);
718} 718}
diff --git a/drivers/acpi/pci_irq.c b/drivers/acpi/pci_irq.c
index e7f718d6918a..b1def411c0b8 100644
--- a/drivers/acpi/pci_irq.c
+++ b/drivers/acpi/pci_irq.c
@@ -485,6 +485,14 @@ void acpi_pci_irq_disable(struct pci_dev *dev)
485 if (!pin || !dev->irq_managed || dev->irq <= 0) 485 if (!pin || !dev->irq_managed || dev->irq <= 0)
486 return; 486 return;
487 487
488 /* Keep IOAPIC pin configuration when suspending */
489 if (dev->dev.power.is_prepared)
490 return;
491#ifdef CONFIG_PM
492 if (dev->dev.power.runtime_status == RPM_SUSPENDING)
493 return;
494#endif
495
488 entry = acpi_pci_irq_lookup(dev, pin); 496 entry = acpi_pci_irq_lookup(dev, pin);
489 if (!entry) 497 if (!entry)
490 return; 498 return;
@@ -505,6 +513,5 @@ void acpi_pci_irq_disable(struct pci_dev *dev)
505 if (gsi >= 0) { 513 if (gsi >= 0) {
506 acpi_unregister_gsi(gsi); 514 acpi_unregister_gsi(gsi);
507 dev->irq_managed = 0; 515 dev->irq_managed = 0;
508 dev->irq = 0;
509 } 516 }
510} 517}
diff --git a/drivers/acpi/resource.c b/drivers/acpi/resource.c
index 4752b9939987..5589a6e2a023 100644
--- a/drivers/acpi/resource.c
+++ b/drivers/acpi/resource.c
@@ -42,11 +42,13 @@ static bool acpi_dev_resource_len_valid(u64 start, u64 end, u64 len, bool io)
42 * CHECKME: len might be required to check versus a minimum 42 * CHECKME: len might be required to check versus a minimum
43 * length as well. 1 for io is fine, but for memory it does 43 * length as well. 1 for io is fine, but for memory it does
44 * not make any sense at all. 44 * not make any sense at all.
45 * Note: some BIOSes report incorrect length for ACPI address space
46 * descriptor, so remove check of 'reslen == len' to avoid regression.
45 */ 47 */
46 if (len && reslen && reslen == len && start <= end) 48 if (len && reslen && start <= end)
47 return true; 49 return true;
48 50
49 pr_info("ACPI: invalid or unassigned resource %s [%016llx - %016llx] length [%016llx]\n", 51 pr_debug("ACPI: invalid or unassigned resource %s [%016llx - %016llx] length [%016llx]\n",
50 io ? "io" : "mem", start, end, len); 52 io ? "io" : "mem", start, end, len);
51 53
52 return false; 54 return false;
diff --git a/drivers/acpi/video.c b/drivers/acpi/video.c
index 88a4f99dd2a7..26eb70c8f518 100644
--- a/drivers/acpi/video.c
+++ b/drivers/acpi/video.c
@@ -540,6 +540,15 @@ static struct dmi_system_id video_dmi_table[] __initdata = {
540 DMI_MATCH(DMI_PRODUCT_NAME, "730U3E/740U3E"), 540 DMI_MATCH(DMI_PRODUCT_NAME, "730U3E/740U3E"),
541 }, 541 },
542 }, 542 },
543 {
544 /* https://bugs.freedesktop.org/show_bug.cgi?id=87286 */
545 .callback = video_disable_native_backlight,
546 .ident = "SAMSUNG 900X3C/900X3D/900X3E/900X4C/900X4D",
547 .matches = {
548 DMI_MATCH(DMI_SYS_VENDOR, "SAMSUNG ELECTRONICS CO., LTD."),
549 DMI_MATCH(DMI_PRODUCT_NAME, "900X3C/900X3D/900X3E/900X4C/900X4D"),
550 },
551 },
543 552
544 { 553 {
545 /* https://bugzilla.redhat.com/show_bug.cgi?id=1163574 */ 554 /* https://bugzilla.redhat.com/show_bug.cgi?id=1163574 */
@@ -2101,7 +2110,8 @@ static int __init intel_opregion_present(void)
2101 2110
2102int acpi_video_register(void) 2111int acpi_video_register(void)
2103{ 2112{
2104 int result = 0; 2113 int ret;
2114
2105 if (register_count) { 2115 if (register_count) {
2106 /* 2116 /*
2107 * if the function of acpi_video_register is already called, 2117 * if the function of acpi_video_register is already called,
@@ -2113,9 +2123,9 @@ int acpi_video_register(void)
2113 mutex_init(&video_list_lock); 2123 mutex_init(&video_list_lock);
2114 INIT_LIST_HEAD(&video_bus_head); 2124 INIT_LIST_HEAD(&video_bus_head);
2115 2125
2116 result = acpi_bus_register_driver(&acpi_video_bus); 2126 ret = acpi_bus_register_driver(&acpi_video_bus);
2117 if (result < 0) 2127 if (ret)
2118 return -ENODEV; 2128 return ret;
2119 2129
2120 /* 2130 /*
2121 * When the acpi_video_bus is loaded successfully, increase 2131 * When the acpi_video_bus is loaded successfully, increase
@@ -2167,6 +2177,17 @@ EXPORT_SYMBOL(acpi_video_unregister_backlight);
2167 2177
2168static int __init acpi_video_init(void) 2178static int __init acpi_video_init(void)
2169{ 2179{
2180 /*
2181 * Let the module load even if ACPI is disabled (e.g. due to
2182 * a broken BIOS) so that i915.ko can still be loaded on such
2183 * old systems without an AcpiOpRegion.
2184 *
2185 * acpi_video_register() will report -ENODEV later as well due
2186 * to acpi_disabled when i915.ko tries to register itself afterwards.
2187 */
2188 if (acpi_disabled)
2189 return 0;
2190
2170 dmi_check_system(video_dmi_table); 2191 dmi_check_system(video_dmi_table);
2171 2192
2172 if (intel_opregion_present()) 2193 if (intel_opregion_present())
diff --git a/drivers/android/binder.c b/drivers/android/binder.c
index 33b09b6568a4..6607f3c6ace1 100644
--- a/drivers/android/binder.c
+++ b/drivers/android/binder.c
@@ -551,7 +551,6 @@ static int binder_update_page_range(struct binder_proc *proc, int allocate,
551{ 551{
552 void *page_addr; 552 void *page_addr;
553 unsigned long user_page_addr; 553 unsigned long user_page_addr;
554 struct vm_struct tmp_area;
555 struct page **page; 554 struct page **page;
556 struct mm_struct *mm; 555 struct mm_struct *mm;
557 556
@@ -600,10 +599,11 @@ static int binder_update_page_range(struct binder_proc *proc, int allocate,
600 proc->pid, page_addr); 599 proc->pid, page_addr);
601 goto err_alloc_page_failed; 600 goto err_alloc_page_failed;
602 } 601 }
603 tmp_area.addr = page_addr; 602 ret = map_kernel_range_noflush((unsigned long)page_addr,
604 tmp_area.size = PAGE_SIZE + PAGE_SIZE /* guard page? */; 603 PAGE_SIZE, PAGE_KERNEL, page);
605 ret = map_vm_area(&tmp_area, PAGE_KERNEL, page); 604 flush_cache_vmap((unsigned long)page_addr,
606 if (ret) { 605 (unsigned long)page_addr + PAGE_SIZE);
606 if (ret != 1) {
607 pr_err("%d: binder_alloc_buf failed to map page at %p in kernel\n", 607 pr_err("%d: binder_alloc_buf failed to map page at %p in kernel\n",
608 proc->pid, page_addr); 608 proc->pid, page_addr);
609 goto err_map_kernel_failed; 609 goto err_map_kernel_failed;
diff --git a/drivers/ata/sata_fsl.c b/drivers/ata/sata_fsl.c
index f9054cd36a72..5389579c5120 100644
--- a/drivers/ata/sata_fsl.c
+++ b/drivers/ata/sata_fsl.c
@@ -869,6 +869,8 @@ try_offline_again:
869 */ 869 */
870 ata_msleep(ap, 1); 870 ata_msleep(ap, 1);
871 871
872 sata_set_spd(link);
873
872 /* 874 /*
873 * Now, bring the host controller online again, this can take time 875 * Now, bring the host controller online again, this can take time
874 * as PHY reset and communication establishment, 1st D2H FIS and 876 * as PHY reset and communication establishment, 1st D2H FIS and
diff --git a/drivers/base/power/domain.c b/drivers/base/power/domain.c
index ba4abbe4693c..45937f88e77c 100644
--- a/drivers/base/power/domain.c
+++ b/drivers/base/power/domain.c
@@ -2242,7 +2242,7 @@ static void rtpm_status_str(struct seq_file *s, struct device *dev)
2242} 2242}
2243 2243
2244static int pm_genpd_summary_one(struct seq_file *s, 2244static int pm_genpd_summary_one(struct seq_file *s,
2245 struct generic_pm_domain *gpd) 2245 struct generic_pm_domain *genpd)
2246{ 2246{
2247 static const char * const status_lookup[] = { 2247 static const char * const status_lookup[] = {
2248 [GPD_STATE_ACTIVE] = "on", 2248 [GPD_STATE_ACTIVE] = "on",
@@ -2256,26 +2256,26 @@ static int pm_genpd_summary_one(struct seq_file *s,
2256 struct gpd_link *link; 2256 struct gpd_link *link;
2257 int ret; 2257 int ret;
2258 2258
2259 ret = mutex_lock_interruptible(&gpd->lock); 2259 ret = mutex_lock_interruptible(&genpd->lock);
2260 if (ret) 2260 if (ret)
2261 return -ERESTARTSYS; 2261 return -ERESTARTSYS;
2262 2262
2263 if (WARN_ON(gpd->status >= ARRAY_SIZE(status_lookup))) 2263 if (WARN_ON(genpd->status >= ARRAY_SIZE(status_lookup)))
2264 goto exit; 2264 goto exit;
2265 seq_printf(s, "%-30s %-15s ", gpd->name, status_lookup[gpd->status]); 2265 seq_printf(s, "%-30s %-15s ", genpd->name, status_lookup[genpd->status]);
2266 2266
2267 /* 2267 /*
2268 * Modifications on the list require holding locks on both 2268 * Modifications on the list require holding locks on both
2269 * master and slave, so we are safe. 2269 * master and slave, so we are safe.
2270 * Also gpd->name is immutable. 2270 * Also genpd->name is immutable.
2271 */ 2271 */
2272 list_for_each_entry(link, &gpd->master_links, master_node) { 2272 list_for_each_entry(link, &genpd->master_links, master_node) {
2273 seq_printf(s, "%s", link->slave->name); 2273 seq_printf(s, "%s", link->slave->name);
2274 if (!list_is_last(&link->master_node, &gpd->master_links)) 2274 if (!list_is_last(&link->master_node, &genpd->master_links))
2275 seq_puts(s, ", "); 2275 seq_puts(s, ", ");
2276 } 2276 }
2277 2277
2278 list_for_each_entry(pm_data, &gpd->dev_list, list_node) { 2278 list_for_each_entry(pm_data, &genpd->dev_list, list_node) {
2279 kobj_path = kobject_get_path(&pm_data->dev->kobj, GFP_KERNEL); 2279 kobj_path = kobject_get_path(&pm_data->dev->kobj, GFP_KERNEL);
2280 if (kobj_path == NULL) 2280 if (kobj_path == NULL)
2281 continue; 2281 continue;
@@ -2287,14 +2287,14 @@ static int pm_genpd_summary_one(struct seq_file *s,
2287 2287
2288 seq_puts(s, "\n"); 2288 seq_puts(s, "\n");
2289exit: 2289exit:
2290 mutex_unlock(&gpd->lock); 2290 mutex_unlock(&genpd->lock);
2291 2291
2292 return 0; 2292 return 0;
2293} 2293}
2294 2294
2295static int pm_genpd_summary_show(struct seq_file *s, void *data) 2295static int pm_genpd_summary_show(struct seq_file *s, void *data)
2296{ 2296{
2297 struct generic_pm_domain *gpd; 2297 struct generic_pm_domain *genpd;
2298 int ret = 0; 2298 int ret = 0;
2299 2299
2300 seq_puts(s, " domain status slaves\n"); 2300 seq_puts(s, " domain status slaves\n");
@@ -2305,8 +2305,8 @@ static int pm_genpd_summary_show(struct seq_file *s, void *data)
2305 if (ret) 2305 if (ret)
2306 return -ERESTARTSYS; 2306 return -ERESTARTSYS;
2307 2307
2308 list_for_each_entry(gpd, &gpd_list, gpd_list_node) { 2308 list_for_each_entry(genpd, &gpd_list, gpd_list_node) {
2309 ret = pm_genpd_summary_one(s, gpd); 2309 ret = pm_genpd_summary_one(s, genpd);
2310 if (ret) 2310 if (ret)
2311 break; 2311 break;
2312 } 2312 }
diff --git a/drivers/base/power/wakeup.c b/drivers/base/power/wakeup.c
index c2744b30d5d9..aab7158d2afe 100644
--- a/drivers/base/power/wakeup.c
+++ b/drivers/base/power/wakeup.c
@@ -730,6 +730,7 @@ void pm_system_wakeup(void)
730 pm_abort_suspend = true; 730 pm_abort_suspend = true;
731 freeze_wake(); 731 freeze_wake();
732} 732}
733EXPORT_SYMBOL_GPL(pm_system_wakeup);
733 734
734void pm_wakeup_clear(void) 735void pm_wakeup_clear(void)
735{ 736{
diff --git a/drivers/base/regmap/regcache-rbtree.c b/drivers/base/regmap/regcache-rbtree.c
index d453a2c98ad0..81751a49d8bf 100644
--- a/drivers/base/regmap/regcache-rbtree.c
+++ b/drivers/base/regmap/regcache-rbtree.c
@@ -307,7 +307,7 @@ static int regcache_rbtree_insert_to_block(struct regmap *map,
307 if (pos == 0) { 307 if (pos == 0) {
308 memmove(blk + offset * map->cache_word_size, 308 memmove(blk + offset * map->cache_word_size,
309 blk, rbnode->blklen * map->cache_word_size); 309 blk, rbnode->blklen * map->cache_word_size);
310 bitmap_shift_right(present, present, offset, blklen); 310 bitmap_shift_left(present, present, offset, blklen);
311 } 311 }
312 312
313 /* update the rbnode block, its size and the base register */ 313 /* update the rbnode block, its size and the base register */
diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c
index f373c35f9e1d..da84f544c544 100644
--- a/drivers/base/regmap/regcache.c
+++ b/drivers/base/regmap/regcache.c
@@ -608,7 +608,8 @@ static int regcache_sync_block_single(struct regmap *map, void *block,
608 for (i = start; i < end; i++) { 608 for (i = start; i < end; i++) {
609 regtmp = block_base + (i * map->reg_stride); 609 regtmp = block_base + (i * map->reg_stride);
610 610
611 if (!regcache_reg_present(cache_present, i)) 611 if (!regcache_reg_present(cache_present, i) ||
612 !regmap_writeable(map, regtmp))
612 continue; 613 continue;
613 614
614 val = regcache_get_val(map, block, i); 615 val = regcache_get_val(map, block, i);
@@ -677,7 +678,8 @@ static int regcache_sync_block_raw(struct regmap *map, void *block,
677 for (i = start; i < end; i++) { 678 for (i = start; i < end; i++) {
678 regtmp = block_base + (i * map->reg_stride); 679 regtmp = block_base + (i * map->reg_stride);
679 680
680 if (!regcache_reg_present(cache_present, i)) { 681 if (!regcache_reg_present(cache_present, i) ||
682 !regmap_writeable(map, regtmp)) {
681 ret = regcache_sync_block_raw_flush(map, &data, 683 ret = regcache_sync_block_raw_flush(map, &data,
682 base, regtmp); 684 base, regtmp);
683 if (ret != 0) 685 if (ret != 0)
diff --git a/drivers/base/regmap/regmap-irq.c b/drivers/base/regmap/regmap-irq.c
index 6299a50a5960..a6c3f75b4b01 100644
--- a/drivers/base/regmap/regmap-irq.c
+++ b/drivers/base/regmap/regmap-irq.c
@@ -499,7 +499,8 @@ int regmap_add_irq_chip(struct regmap *map, int irq, int irq_flags,
499 goto err_alloc; 499 goto err_alloc;
500 } 500 }
501 501
502 ret = request_threaded_irq(irq, NULL, regmap_irq_thread, irq_flags, 502 ret = request_threaded_irq(irq, NULL, regmap_irq_thread,
503 irq_flags | IRQF_ONESHOT,
503 chip->name, d); 504 chip->name, d);
504 if (ret != 0) { 505 if (ret != 0) {
505 dev_err(map->dev, "Failed to request IRQ %d for %s: %d\n", 506 dev_err(map->dev, "Failed to request IRQ %d for %s: %d\n",
diff --git a/drivers/block/nvme-core.c b/drivers/block/nvme-core.c
index cbdfbbf98392..ceb32dd52a6c 100644
--- a/drivers/block/nvme-core.c
+++ b/drivers/block/nvme-core.c
@@ -37,17 +37,18 @@
37#include <linux/ptrace.h> 37#include <linux/ptrace.h>
38#include <linux/sched.h> 38#include <linux/sched.h>
39#include <linux/slab.h> 39#include <linux/slab.h>
40#include <linux/t10-pi.h>
40#include <linux/types.h> 41#include <linux/types.h>
41#include <scsi/sg.h> 42#include <scsi/sg.h>
42#include <asm-generic/io-64-nonatomic-lo-hi.h> 43#include <asm-generic/io-64-nonatomic-lo-hi.h>
43 44
45#define NVME_MINORS (1U << MINORBITS)
44#define NVME_Q_DEPTH 1024 46#define NVME_Q_DEPTH 1024
45#define NVME_AQ_DEPTH 64 47#define NVME_AQ_DEPTH 64
46#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command)) 48#define SQ_SIZE(depth) (depth * sizeof(struct nvme_command))
47#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion)) 49#define CQ_SIZE(depth) (depth * sizeof(struct nvme_completion))
48#define ADMIN_TIMEOUT (admin_timeout * HZ) 50#define ADMIN_TIMEOUT (admin_timeout * HZ)
49#define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ) 51#define SHUTDOWN_TIMEOUT (shutdown_timeout * HZ)
50#define IOD_TIMEOUT (retry_time * HZ)
51 52
52static unsigned char admin_timeout = 60; 53static unsigned char admin_timeout = 60;
53module_param(admin_timeout, byte, 0644); 54module_param(admin_timeout, byte, 0644);
@@ -57,10 +58,6 @@ unsigned char nvme_io_timeout = 30;
57module_param_named(io_timeout, nvme_io_timeout, byte, 0644); 58module_param_named(io_timeout, nvme_io_timeout, byte, 0644);
58MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O"); 59MODULE_PARM_DESC(io_timeout, "timeout in seconds for I/O");
59 60
60static unsigned char retry_time = 30;
61module_param(retry_time, byte, 0644);
62MODULE_PARM_DESC(retry_time, "time in seconds to retry failed I/O");
63
64static unsigned char shutdown_timeout = 5; 61static unsigned char shutdown_timeout = 5;
65module_param(shutdown_timeout, byte, 0644); 62module_param(shutdown_timeout, byte, 0644);
66MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown"); 63MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown");
@@ -68,6 +65,9 @@ MODULE_PARM_DESC(shutdown_timeout, "timeout in seconds for controller shutdown")
68static int nvme_major; 65static int nvme_major;
69module_param(nvme_major, int, 0); 66module_param(nvme_major, int, 0);
70 67
68static int nvme_char_major;
69module_param(nvme_char_major, int, 0);
70
71static int use_threaded_interrupts; 71static int use_threaded_interrupts;
72module_param(use_threaded_interrupts, int, 0); 72module_param(use_threaded_interrupts, int, 0);
73 73
@@ -76,7 +76,8 @@ static LIST_HEAD(dev_list);
76static struct task_struct *nvme_thread; 76static struct task_struct *nvme_thread;
77static struct workqueue_struct *nvme_workq; 77static struct workqueue_struct *nvme_workq;
78static wait_queue_head_t nvme_kthread_wait; 78static wait_queue_head_t nvme_kthread_wait;
79static struct notifier_block nvme_nb; 79
80static struct class *nvme_class;
80 81
81static void nvme_reset_failed_dev(struct work_struct *ws); 82static void nvme_reset_failed_dev(struct work_struct *ws);
82static int nvme_process_cq(struct nvme_queue *nvmeq); 83static int nvme_process_cq(struct nvme_queue *nvmeq);
@@ -95,7 +96,6 @@ struct async_cmd_info {
95 * commands and one for I/O commands). 96 * commands and one for I/O commands).
96 */ 97 */
97struct nvme_queue { 98struct nvme_queue {
98 struct llist_node node;
99 struct device *q_dmadev; 99 struct device *q_dmadev;
100 struct nvme_dev *dev; 100 struct nvme_dev *dev;
101 char irqname[24]; /* nvme4294967295-65535\0 */ 101 char irqname[24]; /* nvme4294967295-65535\0 */
@@ -482,6 +482,115 @@ static int nvme_error_status(u16 status)
482 } 482 }
483} 483}
484 484
485#ifdef CONFIG_BLK_DEV_INTEGRITY
486static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
487{
488 if (be32_to_cpu(pi->ref_tag) == v)
489 pi->ref_tag = cpu_to_be32(p);
490}
491
492static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
493{
494 if (be32_to_cpu(pi->ref_tag) == p)
495 pi->ref_tag = cpu_to_be32(v);
496}
497
498/**
499 * nvme_dif_remap - remaps ref tags to bip seed and physical lba
500 *
501 * The virtual start sector is the one that was originally submitted by the
502 * block layer. Due to partitioning, MD/DM cloning, etc. the actual physical
503 * start sector may be different. Remap protection information to match the
504 * physical LBA on writes, and back to the original seed on reads.
505 *
506 * Type 0 and 3 do not have a ref tag, so no remapping required.
507 */
508static void nvme_dif_remap(struct request *req,
509 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
510{
511 struct nvme_ns *ns = req->rq_disk->private_data;
512 struct bio_integrity_payload *bip;
513 struct t10_pi_tuple *pi;
514 void *p, *pmap;
515 u32 i, nlb, ts, phys, virt;
516
517 if (!ns->pi_type || ns->pi_type == NVME_NS_DPS_PI_TYPE3)
518 return;
519
520 bip = bio_integrity(req->bio);
521 if (!bip)
522 return;
523
524 pmap = kmap_atomic(bip->bip_vec->bv_page) + bip->bip_vec->bv_offset;
525 if (!pmap)
526 return;
527
528 p = pmap;
529 virt = bip_get_seed(bip);
530 phys = nvme_block_nr(ns, blk_rq_pos(req));
531 nlb = (blk_rq_bytes(req) >> ns->lba_shift);
532 ts = ns->disk->integrity->tuple_size;
533
534 for (i = 0; i < nlb; i++, virt++, phys++) {
535 pi = (struct t10_pi_tuple *)p;
536 dif_swap(phys, virt, pi);
537 p += ts;
538 }
539 kunmap_atomic(pmap);
540}
541
542static int nvme_noop_verify(struct blk_integrity_iter *iter)
543{
544 return 0;
545}
546
547static int nvme_noop_generate(struct blk_integrity_iter *iter)
548{
549 return 0;
550}
551
552struct blk_integrity nvme_meta_noop = {
553 .name = "NVME_META_NOOP",
554 .generate_fn = nvme_noop_generate,
555 .verify_fn = nvme_noop_verify,
556};
557
558static void nvme_init_integrity(struct nvme_ns *ns)
559{
560 struct blk_integrity integrity;
561
562 switch (ns->pi_type) {
563 case NVME_NS_DPS_PI_TYPE3:
564 integrity = t10_pi_type3_crc;
565 break;
566 case NVME_NS_DPS_PI_TYPE1:
567 case NVME_NS_DPS_PI_TYPE2:
568 integrity = t10_pi_type1_crc;
569 break;
570 default:
571 integrity = nvme_meta_noop;
572 break;
573 }
574 integrity.tuple_size = ns->ms;
575 blk_integrity_register(ns->disk, &integrity);
576 blk_queue_max_integrity_segments(ns->queue, 1);
577}
578#else /* CONFIG_BLK_DEV_INTEGRITY */
579static void nvme_dif_remap(struct request *req,
580 void (*dif_swap)(u32 p, u32 v, struct t10_pi_tuple *pi))
581{
582}
583static void nvme_dif_prep(u32 p, u32 v, struct t10_pi_tuple *pi)
584{
585}
586static void nvme_dif_complete(u32 p, u32 v, struct t10_pi_tuple *pi)
587{
588}
589static void nvme_init_integrity(struct nvme_ns *ns)
590{
591}
592#endif
593
485static void req_completion(struct nvme_queue *nvmeq, void *ctx, 594static void req_completion(struct nvme_queue *nvmeq, void *ctx,
486 struct nvme_completion *cqe) 595 struct nvme_completion *cqe)
487{ 596{
@@ -512,9 +621,16 @@ static void req_completion(struct nvme_queue *nvmeq, void *ctx,
512 "completing aborted command with status:%04x\n", 621 "completing aborted command with status:%04x\n",
513 status); 622 status);
514 623
515 if (iod->nents) 624 if (iod->nents) {
516 dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg, iod->nents, 625 dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->sg, iod->nents,
517 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE); 626 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
627 if (blk_integrity_rq(req)) {
628 if (!rq_data_dir(req))
629 nvme_dif_remap(req, nvme_dif_complete);
630 dma_unmap_sg(&nvmeq->dev->pci_dev->dev, iod->meta_sg, 1,
631 rq_data_dir(req) ? DMA_TO_DEVICE : DMA_FROM_DEVICE);
632 }
633 }
518 nvme_free_iod(nvmeq->dev, iod); 634 nvme_free_iod(nvmeq->dev, iod);
519 635
520 blk_mq_complete_request(req); 636 blk_mq_complete_request(req);
@@ -670,6 +786,24 @@ static int nvme_submit_iod(struct nvme_queue *nvmeq, struct nvme_iod *iod,
670 cmnd->rw.prp2 = cpu_to_le64(iod->first_dma); 786 cmnd->rw.prp2 = cpu_to_le64(iod->first_dma);
671 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req))); 787 cmnd->rw.slba = cpu_to_le64(nvme_block_nr(ns, blk_rq_pos(req)));
672 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1); 788 cmnd->rw.length = cpu_to_le16((blk_rq_bytes(req) >> ns->lba_shift) - 1);
789
790 if (blk_integrity_rq(req)) {
791 cmnd->rw.metadata = cpu_to_le64(sg_dma_address(iod->meta_sg));
792 switch (ns->pi_type) {
793 case NVME_NS_DPS_PI_TYPE3:
794 control |= NVME_RW_PRINFO_PRCHK_GUARD;
795 break;
796 case NVME_NS_DPS_PI_TYPE1:
797 case NVME_NS_DPS_PI_TYPE2:
798 control |= NVME_RW_PRINFO_PRCHK_GUARD |
799 NVME_RW_PRINFO_PRCHK_REF;
800 cmnd->rw.reftag = cpu_to_le32(
801 nvme_block_nr(ns, blk_rq_pos(req)));
802 break;
803 }
804 } else if (ns->ms)
805 control |= NVME_RW_PRINFO_PRACT;
806
673 cmnd->rw.control = cpu_to_le16(control); 807 cmnd->rw.control = cpu_to_le16(control);
674 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt); 808 cmnd->rw.dsmgmt = cpu_to_le32(dsmgmt);
675 809
@@ -690,6 +824,19 @@ static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
690 struct nvme_iod *iod; 824 struct nvme_iod *iod;
691 enum dma_data_direction dma_dir; 825 enum dma_data_direction dma_dir;
692 826
827 /*
828 * If formated with metadata, require the block layer provide a buffer
829 * unless this namespace is formated such that the metadata can be
830 * stripped/generated by the controller with PRACT=1.
831 */
832 if (ns->ms && !blk_integrity_rq(req)) {
833 if (!(ns->pi_type && ns->ms == 8)) {
834 req->errors = -EFAULT;
835 blk_mq_complete_request(req);
836 return BLK_MQ_RQ_QUEUE_OK;
837 }
838 }
839
693 iod = nvme_alloc_iod(req, ns->dev, GFP_ATOMIC); 840 iod = nvme_alloc_iod(req, ns->dev, GFP_ATOMIC);
694 if (!iod) 841 if (!iod)
695 return BLK_MQ_RQ_QUEUE_BUSY; 842 return BLK_MQ_RQ_QUEUE_BUSY;
@@ -725,6 +872,21 @@ static int nvme_queue_rq(struct blk_mq_hw_ctx *hctx,
725 iod->nents, dma_dir); 872 iod->nents, dma_dir);
726 goto retry_cmd; 873 goto retry_cmd;
727 } 874 }
875 if (blk_integrity_rq(req)) {
876 if (blk_rq_count_integrity_sg(req->q, req->bio) != 1)
877 goto error_cmd;
878
879 sg_init_table(iod->meta_sg, 1);
880 if (blk_rq_map_integrity_sg(
881 req->q, req->bio, iod->meta_sg) != 1)
882 goto error_cmd;
883
884 if (rq_data_dir(req))
885 nvme_dif_remap(req, nvme_dif_prep);
886
887 if (!dma_map_sg(nvmeq->q_dmadev, iod->meta_sg, 1, dma_dir))
888 goto error_cmd;
889 }
728 } 890 }
729 891
730 nvme_set_info(cmd, iod, req_completion); 892 nvme_set_info(cmd, iod, req_completion);
@@ -817,14 +979,6 @@ static irqreturn_t nvme_irq_check(int irq, void *data)
817 return IRQ_WAKE_THREAD; 979 return IRQ_WAKE_THREAD;
818} 980}
819 981
820static void nvme_abort_cmd_info(struct nvme_queue *nvmeq, struct nvme_cmd_info *
821 cmd_info)
822{
823 spin_lock_irq(&nvmeq->q_lock);
824 cancel_cmd_info(cmd_info, NULL);
825 spin_unlock_irq(&nvmeq->q_lock);
826}
827
828struct sync_cmd_info { 982struct sync_cmd_info {
829 struct task_struct *task; 983 struct task_struct *task;
830 u32 result; 984 u32 result;
@@ -847,7 +1001,6 @@ static void sync_completion(struct nvme_queue *nvmeq, void *ctx,
847static int nvme_submit_sync_cmd(struct request *req, struct nvme_command *cmd, 1001static int nvme_submit_sync_cmd(struct request *req, struct nvme_command *cmd,
848 u32 *result, unsigned timeout) 1002 u32 *result, unsigned timeout)
849{ 1003{
850 int ret;
851 struct sync_cmd_info cmdinfo; 1004 struct sync_cmd_info cmdinfo;
852 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req); 1005 struct nvme_cmd_info *cmd_rq = blk_mq_rq_to_pdu(req);
853 struct nvme_queue *nvmeq = cmd_rq->nvmeq; 1006 struct nvme_queue *nvmeq = cmd_rq->nvmeq;
@@ -859,29 +1012,12 @@ static int nvme_submit_sync_cmd(struct request *req, struct nvme_command *cmd,
859 1012
860 nvme_set_info(cmd_rq, &cmdinfo, sync_completion); 1013 nvme_set_info(cmd_rq, &cmdinfo, sync_completion);
861 1014
862 set_current_state(TASK_KILLABLE); 1015 set_current_state(TASK_UNINTERRUPTIBLE);
863 ret = nvme_submit_cmd(nvmeq, cmd); 1016 nvme_submit_cmd(nvmeq, cmd);
864 if (ret) { 1017 schedule();
865 nvme_finish_cmd(nvmeq, req->tag, NULL);
866 set_current_state(TASK_RUNNING);
867 }
868 ret = schedule_timeout(timeout);
869
870 /*
871 * Ensure that sync_completion has either run, or that it will
872 * never run.
873 */
874 nvme_abort_cmd_info(nvmeq, blk_mq_rq_to_pdu(req));
875
876 /*
877 * We never got the completion
878 */
879 if (cmdinfo.status == -EINTR)
880 return -EINTR;
881 1018
882 if (result) 1019 if (result)
883 *result = cmdinfo.result; 1020 *result = cmdinfo.result;
884
885 return cmdinfo.status; 1021 return cmdinfo.status;
886} 1022}
887 1023
@@ -1158,29 +1294,18 @@ static enum blk_eh_timer_return nvme_timeout(struct request *req, bool reserved)
1158 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req); 1294 struct nvme_cmd_info *cmd = blk_mq_rq_to_pdu(req);
1159 struct nvme_queue *nvmeq = cmd->nvmeq; 1295 struct nvme_queue *nvmeq = cmd->nvmeq;
1160 1296
1161 /*
1162 * The aborted req will be completed on receiving the abort req.
1163 * We enable the timer again. If hit twice, it'll cause a device reset,
1164 * as the device then is in a faulty state.
1165 */
1166 int ret = BLK_EH_RESET_TIMER;
1167
1168 dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag, 1297 dev_warn(nvmeq->q_dmadev, "Timeout I/O %d QID %d\n", req->tag,
1169 nvmeq->qid); 1298 nvmeq->qid);
1170
1171 spin_lock_irq(&nvmeq->q_lock); 1299 spin_lock_irq(&nvmeq->q_lock);
1172 if (!nvmeq->dev->initialized) { 1300 nvme_abort_req(req);
1173 /*
1174 * Force cancelled command frees the request, which requires we
1175 * return BLK_EH_NOT_HANDLED.
1176 */
1177 nvme_cancel_queue_ios(nvmeq->hctx, req, nvmeq, reserved);
1178 ret = BLK_EH_NOT_HANDLED;
1179 } else
1180 nvme_abort_req(req);
1181 spin_unlock_irq(&nvmeq->q_lock); 1301 spin_unlock_irq(&nvmeq->q_lock);
1182 1302
1183 return ret; 1303 /*
1304 * The aborted req will be completed on receiving the abort req.
1305 * We enable the timer again. If hit twice, it'll cause a device reset,
1306 * as the device then is in a faulty state.
1307 */
1308 return BLK_EH_RESET_TIMER;
1184} 1309}
1185 1310
1186static void nvme_free_queue(struct nvme_queue *nvmeq) 1311static void nvme_free_queue(struct nvme_queue *nvmeq)
@@ -1233,7 +1358,6 @@ static void nvme_clear_queue(struct nvme_queue *nvmeq)
1233 struct blk_mq_hw_ctx *hctx = nvmeq->hctx; 1358 struct blk_mq_hw_ctx *hctx = nvmeq->hctx;
1234 1359
1235 spin_lock_irq(&nvmeq->q_lock); 1360 spin_lock_irq(&nvmeq->q_lock);
1236 nvme_process_cq(nvmeq);
1237 if (hctx && hctx->tags) 1361 if (hctx && hctx->tags)
1238 blk_mq_tag_busy_iter(hctx, nvme_cancel_queue_ios, nvmeq); 1362 blk_mq_tag_busy_iter(hctx, nvme_cancel_queue_ios, nvmeq);
1239 spin_unlock_irq(&nvmeq->q_lock); 1363 spin_unlock_irq(&nvmeq->q_lock);
@@ -1256,7 +1380,10 @@ static void nvme_disable_queue(struct nvme_dev *dev, int qid)
1256 } 1380 }
1257 if (!qid && dev->admin_q) 1381 if (!qid && dev->admin_q)
1258 blk_mq_freeze_queue_start(dev->admin_q); 1382 blk_mq_freeze_queue_start(dev->admin_q);
1259 nvme_clear_queue(nvmeq); 1383
1384 spin_lock_irq(&nvmeq->q_lock);
1385 nvme_process_cq(nvmeq);
1386 spin_unlock_irq(&nvmeq->q_lock);
1260} 1387}
1261 1388
1262static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid, 1389static struct nvme_queue *nvme_alloc_queue(struct nvme_dev *dev, int qid,
@@ -1875,13 +2002,24 @@ static int nvme_getgeo(struct block_device *bd, struct hd_geometry *geo)
1875 return 0; 2002 return 0;
1876} 2003}
1877 2004
2005static void nvme_config_discard(struct nvme_ns *ns)
2006{
2007 u32 logical_block_size = queue_logical_block_size(ns->queue);
2008 ns->queue->limits.discard_zeroes_data = 0;
2009 ns->queue->limits.discard_alignment = logical_block_size;
2010 ns->queue->limits.discard_granularity = logical_block_size;
2011 ns->queue->limits.max_discard_sectors = 0xffffffff;
2012 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
2013}
2014
1878static int nvme_revalidate_disk(struct gendisk *disk) 2015static int nvme_revalidate_disk(struct gendisk *disk)
1879{ 2016{
1880 struct nvme_ns *ns = disk->private_data; 2017 struct nvme_ns *ns = disk->private_data;
1881 struct nvme_dev *dev = ns->dev; 2018 struct nvme_dev *dev = ns->dev;
1882 struct nvme_id_ns *id; 2019 struct nvme_id_ns *id;
1883 dma_addr_t dma_addr; 2020 dma_addr_t dma_addr;
1884 int lbaf; 2021 int lbaf, pi_type, old_ms;
2022 unsigned short bs;
1885 2023
1886 id = dma_alloc_coherent(&dev->pci_dev->dev, 4096, &dma_addr, 2024 id = dma_alloc_coherent(&dev->pci_dev->dev, 4096, &dma_addr,
1887 GFP_KERNEL); 2025 GFP_KERNEL);
@@ -1890,16 +2028,51 @@ static int nvme_revalidate_disk(struct gendisk *disk)
1890 __func__); 2028 __func__);
1891 return 0; 2029 return 0;
1892 } 2030 }
2031 if (nvme_identify(dev, ns->ns_id, 0, dma_addr)) {
2032 dev_warn(&dev->pci_dev->dev,
2033 "identify failed ns:%d, setting capacity to 0\n",
2034 ns->ns_id);
2035 memset(id, 0, sizeof(*id));
2036 }
1893 2037
1894 if (nvme_identify(dev, ns->ns_id, 0, dma_addr)) 2038 old_ms = ns->ms;
1895 goto free; 2039 lbaf = id->flbas & NVME_NS_FLBAS_LBA_MASK;
1896
1897 lbaf = id->flbas & 0xf;
1898 ns->lba_shift = id->lbaf[lbaf].ds; 2040 ns->lba_shift = id->lbaf[lbaf].ds;
2041 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms);
2042
2043 /*
2044 * If identify namespace failed, use default 512 byte block size so
2045 * block layer can use before failing read/write for 0 capacity.
2046 */
2047 if (ns->lba_shift == 0)
2048 ns->lba_shift = 9;
2049 bs = 1 << ns->lba_shift;
2050
2051 /* XXX: PI implementation requires metadata equal t10 pi tuple size */
2052 pi_type = ns->ms == sizeof(struct t10_pi_tuple) ?
2053 id->dps & NVME_NS_DPS_PI_MASK : 0;
2054
2055 if (blk_get_integrity(disk) && (ns->pi_type != pi_type ||
2056 ns->ms != old_ms ||
2057 bs != queue_logical_block_size(disk->queue) ||
2058 (ns->ms && id->flbas & NVME_NS_FLBAS_META_EXT)))
2059 blk_integrity_unregister(disk);
2060
2061 ns->pi_type = pi_type;
2062 blk_queue_logical_block_size(ns->queue, bs);
2063
2064 if (ns->ms && !blk_get_integrity(disk) && (disk->flags & GENHD_FL_UP) &&
2065 !(id->flbas & NVME_NS_FLBAS_META_EXT))
2066 nvme_init_integrity(ns);
2067
2068 if (id->ncap == 0 || (ns->ms && !blk_get_integrity(disk)))
2069 set_capacity(disk, 0);
2070 else
2071 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2072
2073 if (dev->oncs & NVME_CTRL_ONCS_DSM)
2074 nvme_config_discard(ns);
1899 2075
1900 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
1901 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
1902 free:
1903 dma_free_coherent(&dev->pci_dev->dev, 4096, id, dma_addr); 2076 dma_free_coherent(&dev->pci_dev->dev, 4096, id, dma_addr);
1904 return 0; 2077 return 0;
1905} 2078}
@@ -1923,8 +2096,7 @@ static int nvme_kthread(void *data)
1923 spin_lock(&dev_list_lock); 2096 spin_lock(&dev_list_lock);
1924 list_for_each_entry_safe(dev, next, &dev_list, node) { 2097 list_for_each_entry_safe(dev, next, &dev_list, node) {
1925 int i; 2098 int i;
1926 if (readl(&dev->bar->csts) & NVME_CSTS_CFS && 2099 if (readl(&dev->bar->csts) & NVME_CSTS_CFS) {
1927 dev->initialized) {
1928 if (work_busy(&dev->reset_work)) 2100 if (work_busy(&dev->reset_work))
1929 continue; 2101 continue;
1930 list_del_init(&dev->node); 2102 list_del_init(&dev->node);
@@ -1956,30 +2128,16 @@ static int nvme_kthread(void *data)
1956 return 0; 2128 return 0;
1957} 2129}
1958 2130
1959static void nvme_config_discard(struct nvme_ns *ns) 2131static void nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid)
1960{
1961 u32 logical_block_size = queue_logical_block_size(ns->queue);
1962 ns->queue->limits.discard_zeroes_data = 0;
1963 ns->queue->limits.discard_alignment = logical_block_size;
1964 ns->queue->limits.discard_granularity = logical_block_size;
1965 ns->queue->limits.max_discard_sectors = 0xffffffff;
1966 queue_flag_set_unlocked(QUEUE_FLAG_DISCARD, ns->queue);
1967}
1968
1969static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid,
1970 struct nvme_id_ns *id, struct nvme_lba_range_type *rt)
1971{ 2132{
1972 struct nvme_ns *ns; 2133 struct nvme_ns *ns;
1973 struct gendisk *disk; 2134 struct gendisk *disk;
1974 int node = dev_to_node(&dev->pci_dev->dev); 2135 int node = dev_to_node(&dev->pci_dev->dev);
1975 int lbaf;
1976
1977 if (rt->attributes & NVME_LBART_ATTRIB_HIDE)
1978 return NULL;
1979 2136
1980 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node); 2137 ns = kzalloc_node(sizeof(*ns), GFP_KERNEL, node);
1981 if (!ns) 2138 if (!ns)
1982 return NULL; 2139 return;
2140
1983 ns->queue = blk_mq_init_queue(&dev->tagset); 2141 ns->queue = blk_mq_init_queue(&dev->tagset);
1984 if (IS_ERR(ns->queue)) 2142 if (IS_ERR(ns->queue))
1985 goto out_free_ns; 2143 goto out_free_ns;
@@ -1995,9 +2153,9 @@ static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid,
1995 2153
1996 ns->ns_id = nsid; 2154 ns->ns_id = nsid;
1997 ns->disk = disk; 2155 ns->disk = disk;
1998 lbaf = id->flbas & 0xf; 2156 ns->lba_shift = 9; /* set to a default value for 512 until disk is validated */
1999 ns->lba_shift = id->lbaf[lbaf].ds; 2157 list_add_tail(&ns->list, &dev->namespaces);
2000 ns->ms = le16_to_cpu(id->lbaf[lbaf].ms); 2158
2001 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift); 2159 blk_queue_logical_block_size(ns->queue, 1 << ns->lba_shift);
2002 if (dev->max_hw_sectors) 2160 if (dev->max_hw_sectors)
2003 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors); 2161 blk_queue_max_hw_sectors(ns->queue, dev->max_hw_sectors);
@@ -2011,21 +2169,26 @@ static struct nvme_ns *nvme_alloc_ns(struct nvme_dev *dev, unsigned nsid,
2011 disk->fops = &nvme_fops; 2169 disk->fops = &nvme_fops;
2012 disk->private_data = ns; 2170 disk->private_data = ns;
2013 disk->queue = ns->queue; 2171 disk->queue = ns->queue;
2014 disk->driverfs_dev = &dev->pci_dev->dev; 2172 disk->driverfs_dev = dev->device;
2015 disk->flags = GENHD_FL_EXT_DEVT; 2173 disk->flags = GENHD_FL_EXT_DEVT;
2016 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid); 2174 sprintf(disk->disk_name, "nvme%dn%d", dev->instance, nsid);
2017 set_capacity(disk, le64_to_cpup(&id->nsze) << (ns->lba_shift - 9));
2018
2019 if (dev->oncs & NVME_CTRL_ONCS_DSM)
2020 nvme_config_discard(ns);
2021
2022 return ns;
2023 2175
2176 /*
2177 * Initialize capacity to 0 until we establish the namespace format and
2178 * setup integrity extentions if necessary. The revalidate_disk after
2179 * add_disk allows the driver to register with integrity if the format
2180 * requires it.
2181 */
2182 set_capacity(disk, 0);
2183 nvme_revalidate_disk(ns->disk);
2184 add_disk(ns->disk);
2185 if (ns->ms)
2186 revalidate_disk(ns->disk);
2187 return;
2024 out_free_queue: 2188 out_free_queue:
2025 blk_cleanup_queue(ns->queue); 2189 blk_cleanup_queue(ns->queue);
2026 out_free_ns: 2190 out_free_ns:
2027 kfree(ns); 2191 kfree(ns);
2028 return NULL;
2029} 2192}
2030 2193
2031static void nvme_create_io_queues(struct nvme_dev *dev) 2194static void nvme_create_io_queues(struct nvme_dev *dev)
@@ -2150,22 +2313,20 @@ static int nvme_dev_add(struct nvme_dev *dev)
2150 struct pci_dev *pdev = dev->pci_dev; 2313 struct pci_dev *pdev = dev->pci_dev;
2151 int res; 2314 int res;
2152 unsigned nn, i; 2315 unsigned nn, i;
2153 struct nvme_ns *ns;
2154 struct nvme_id_ctrl *ctrl; 2316 struct nvme_id_ctrl *ctrl;
2155 struct nvme_id_ns *id_ns;
2156 void *mem; 2317 void *mem;
2157 dma_addr_t dma_addr; 2318 dma_addr_t dma_addr;
2158 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12; 2319 int shift = NVME_CAP_MPSMIN(readq(&dev->bar->cap)) + 12;
2159 2320
2160 mem = dma_alloc_coherent(&pdev->dev, 8192, &dma_addr, GFP_KERNEL); 2321 mem = dma_alloc_coherent(&pdev->dev, 4096, &dma_addr, GFP_KERNEL);
2161 if (!mem) 2322 if (!mem)
2162 return -ENOMEM; 2323 return -ENOMEM;
2163 2324
2164 res = nvme_identify(dev, 0, 1, dma_addr); 2325 res = nvme_identify(dev, 0, 1, dma_addr);
2165 if (res) { 2326 if (res) {
2166 dev_err(&pdev->dev, "Identify Controller failed (%d)\n", res); 2327 dev_err(&pdev->dev, "Identify Controller failed (%d)\n", res);
2167 res = -EIO; 2328 dma_free_coherent(&dev->pci_dev->dev, 4096, mem, dma_addr);
2168 goto out; 2329 return -EIO;
2169 } 2330 }
2170 2331
2171 ctrl = mem; 2332 ctrl = mem;
@@ -2191,6 +2352,7 @@ static int nvme_dev_add(struct nvme_dev *dev)
2191 } else 2352 } else
2192 dev->max_hw_sectors = max_hw_sectors; 2353 dev->max_hw_sectors = max_hw_sectors;
2193 } 2354 }
2355 dma_free_coherent(&dev->pci_dev->dev, 4096, mem, dma_addr);
2194 2356
2195 dev->tagset.ops = &nvme_mq_ops; 2357 dev->tagset.ops = &nvme_mq_ops;
2196 dev->tagset.nr_hw_queues = dev->online_queues - 1; 2358 dev->tagset.nr_hw_queues = dev->online_queues - 1;
@@ -2203,33 +2365,12 @@ static int nvme_dev_add(struct nvme_dev *dev)
2203 dev->tagset.driver_data = dev; 2365 dev->tagset.driver_data = dev;
2204 2366
2205 if (blk_mq_alloc_tag_set(&dev->tagset)) 2367 if (blk_mq_alloc_tag_set(&dev->tagset))
2206 goto out; 2368 return 0;
2207
2208 id_ns = mem;
2209 for (i = 1; i <= nn; i++) {
2210 res = nvme_identify(dev, i, 0, dma_addr);
2211 if (res)
2212 continue;
2213
2214 if (id_ns->ncap == 0)
2215 continue;
2216
2217 res = nvme_get_features(dev, NVME_FEAT_LBA_RANGE, i,
2218 dma_addr + 4096, NULL);
2219 if (res)
2220 memset(mem + 4096, 0, 4096);
2221 2369
2222 ns = nvme_alloc_ns(dev, i, mem, mem + 4096); 2370 for (i = 1; i <= nn; i++)
2223 if (ns) 2371 nvme_alloc_ns(dev, i);
2224 list_add_tail(&ns->list, &dev->namespaces);
2225 }
2226 list_for_each_entry(ns, &dev->namespaces, list)
2227 add_disk(ns->disk);
2228 res = 0;
2229 2372
2230 out: 2373 return 0;
2231 dma_free_coherent(&dev->pci_dev->dev, 8192, mem, dma_addr);
2232 return res;
2233} 2374}
2234 2375
2235static int nvme_dev_map(struct nvme_dev *dev) 2376static int nvme_dev_map(struct nvme_dev *dev)
@@ -2358,8 +2499,6 @@ static struct nvme_delq_ctx *nvme_get_dq(struct nvme_delq_ctx *dq)
2358static void nvme_del_queue_end(struct nvme_queue *nvmeq) 2499static void nvme_del_queue_end(struct nvme_queue *nvmeq)
2359{ 2500{
2360 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx; 2501 struct nvme_delq_ctx *dq = nvmeq->cmdinfo.ctx;
2361
2362 nvme_clear_queue(nvmeq);
2363 nvme_put_dq(dq); 2502 nvme_put_dq(dq);
2364} 2503}
2365 2504
@@ -2502,7 +2641,6 @@ static void nvme_dev_shutdown(struct nvme_dev *dev)
2502 int i; 2641 int i;
2503 u32 csts = -1; 2642 u32 csts = -1;
2504 2643
2505 dev->initialized = 0;
2506 nvme_dev_list_remove(dev); 2644 nvme_dev_list_remove(dev);
2507 2645
2508 if (dev->bar) { 2646 if (dev->bar) {
@@ -2513,7 +2651,6 @@ static void nvme_dev_shutdown(struct nvme_dev *dev)
2513 for (i = dev->queue_count - 1; i >= 0; i--) { 2651 for (i = dev->queue_count - 1; i >= 0; i--) {
2514 struct nvme_queue *nvmeq = dev->queues[i]; 2652 struct nvme_queue *nvmeq = dev->queues[i];
2515 nvme_suspend_queue(nvmeq); 2653 nvme_suspend_queue(nvmeq);
2516 nvme_clear_queue(nvmeq);
2517 } 2654 }
2518 } else { 2655 } else {
2519 nvme_disable_io_queues(dev); 2656 nvme_disable_io_queues(dev);
@@ -2521,6 +2658,9 @@ static void nvme_dev_shutdown(struct nvme_dev *dev)
2521 nvme_disable_queue(dev, 0); 2658 nvme_disable_queue(dev, 0);
2522 } 2659 }
2523 nvme_dev_unmap(dev); 2660 nvme_dev_unmap(dev);
2661
2662 for (i = dev->queue_count - 1; i >= 0; i--)
2663 nvme_clear_queue(dev->queues[i]);
2524} 2664}
2525 2665
2526static void nvme_dev_remove(struct nvme_dev *dev) 2666static void nvme_dev_remove(struct nvme_dev *dev)
@@ -2528,8 +2668,11 @@ static void nvme_dev_remove(struct nvme_dev *dev)
2528 struct nvme_ns *ns; 2668 struct nvme_ns *ns;
2529 2669
2530 list_for_each_entry(ns, &dev->namespaces, list) { 2670 list_for_each_entry(ns, &dev->namespaces, list) {
2531 if (ns->disk->flags & GENHD_FL_UP) 2671 if (ns->disk->flags & GENHD_FL_UP) {
2672 if (blk_get_integrity(ns->disk))
2673 blk_integrity_unregister(ns->disk);
2532 del_gendisk(ns->disk); 2674 del_gendisk(ns->disk);
2675 }
2533 if (!blk_queue_dying(ns->queue)) { 2676 if (!blk_queue_dying(ns->queue)) {
2534 blk_mq_abort_requeue_list(ns->queue); 2677 blk_mq_abort_requeue_list(ns->queue);
2535 blk_cleanup_queue(ns->queue); 2678 blk_cleanup_queue(ns->queue);
@@ -2611,6 +2754,7 @@ static void nvme_free_dev(struct kref *kref)
2611 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref); 2754 struct nvme_dev *dev = container_of(kref, struct nvme_dev, kref);
2612 2755
2613 pci_dev_put(dev->pci_dev); 2756 pci_dev_put(dev->pci_dev);
2757 put_device(dev->device);
2614 nvme_free_namespaces(dev); 2758 nvme_free_namespaces(dev);
2615 nvme_release_instance(dev); 2759 nvme_release_instance(dev);
2616 blk_mq_free_tag_set(&dev->tagset); 2760 blk_mq_free_tag_set(&dev->tagset);
@@ -2622,11 +2766,27 @@ static void nvme_free_dev(struct kref *kref)
2622 2766
2623static int nvme_dev_open(struct inode *inode, struct file *f) 2767static int nvme_dev_open(struct inode *inode, struct file *f)
2624{ 2768{
2625 struct nvme_dev *dev = container_of(f->private_data, struct nvme_dev, 2769 struct nvme_dev *dev;
2626 miscdev); 2770 int instance = iminor(inode);
2627 kref_get(&dev->kref); 2771 int ret = -ENODEV;
2628 f->private_data = dev; 2772
2629 return 0; 2773 spin_lock(&dev_list_lock);
2774 list_for_each_entry(dev, &dev_list, node) {
2775 if (dev->instance == instance) {
2776 if (!dev->admin_q) {
2777 ret = -EWOULDBLOCK;
2778 break;
2779 }
2780 if (!kref_get_unless_zero(&dev->kref))
2781 break;
2782 f->private_data = dev;
2783 ret = 0;
2784 break;
2785 }
2786 }
2787 spin_unlock(&dev_list_lock);
2788
2789 return ret;
2630} 2790}
2631 2791
2632static int nvme_dev_release(struct inode *inode, struct file *f) 2792static int nvme_dev_release(struct inode *inode, struct file *f)
@@ -2768,7 +2928,6 @@ static int nvme_dev_resume(struct nvme_dev *dev)
2768 nvme_unfreeze_queues(dev); 2928 nvme_unfreeze_queues(dev);
2769 nvme_set_irq_hints(dev); 2929 nvme_set_irq_hints(dev);
2770 } 2930 }
2771 dev->initialized = 1;
2772 return 0; 2931 return 0;
2773} 2932}
2774 2933
@@ -2799,6 +2958,7 @@ static void nvme_reset_workfn(struct work_struct *work)
2799 dev->reset_workfn(work); 2958 dev->reset_workfn(work);
2800} 2959}
2801 2960
2961static void nvme_async_probe(struct work_struct *work);
2802static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id) 2962static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2803{ 2963{
2804 int node, result = -ENOMEM; 2964 int node, result = -ENOMEM;
@@ -2834,37 +2994,20 @@ static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2834 goto release; 2994 goto release;
2835 2995
2836 kref_init(&dev->kref); 2996 kref_init(&dev->kref);
2837 result = nvme_dev_start(dev); 2997 dev->device = device_create(nvme_class, &pdev->dev,
2838 if (result) 2998 MKDEV(nvme_char_major, dev->instance),
2999 dev, "nvme%d", dev->instance);
3000 if (IS_ERR(dev->device)) {
3001 result = PTR_ERR(dev->device);
2839 goto release_pools; 3002 goto release_pools;
3003 }
3004 get_device(dev->device);
2840 3005
2841 if (dev->online_queues > 1) 3006 INIT_WORK(&dev->probe_work, nvme_async_probe);
2842 result = nvme_dev_add(dev); 3007 schedule_work(&dev->probe_work);
2843 if (result)
2844 goto shutdown;
2845
2846 scnprintf(dev->name, sizeof(dev->name), "nvme%d", dev->instance);
2847 dev->miscdev.minor = MISC_DYNAMIC_MINOR;
2848 dev->miscdev.parent = &pdev->dev;
2849 dev->miscdev.name = dev->name;
2850 dev->miscdev.fops = &nvme_dev_fops;
2851 result = misc_register(&dev->miscdev);
2852 if (result)
2853 goto remove;
2854
2855 nvme_set_irq_hints(dev);
2856
2857 dev->initialized = 1;
2858 return 0; 3008 return 0;
2859 3009
2860 remove:
2861 nvme_dev_remove(dev);
2862 nvme_dev_remove_admin(dev);
2863 nvme_free_namespaces(dev);
2864 shutdown:
2865 nvme_dev_shutdown(dev);
2866 release_pools: 3010 release_pools:
2867 nvme_free_queues(dev, 0);
2868 nvme_release_prp_pools(dev); 3011 nvme_release_prp_pools(dev);
2869 release: 3012 release:
2870 nvme_release_instance(dev); 3013 nvme_release_instance(dev);
@@ -2877,6 +3020,29 @@ static int nvme_probe(struct pci_dev *pdev, const struct pci_device_id *id)
2877 return result; 3020 return result;
2878} 3021}
2879 3022
3023static void nvme_async_probe(struct work_struct *work)
3024{
3025 struct nvme_dev *dev = container_of(work, struct nvme_dev, probe_work);
3026 int result;
3027
3028 result = nvme_dev_start(dev);
3029 if (result)
3030 goto reset;
3031
3032 if (dev->online_queues > 1)
3033 result = nvme_dev_add(dev);
3034 if (result)
3035 goto reset;
3036
3037 nvme_set_irq_hints(dev);
3038 return;
3039 reset:
3040 if (!work_busy(&dev->reset_work)) {
3041 dev->reset_workfn = nvme_reset_failed_dev;
3042 queue_work(nvme_workq, &dev->reset_work);
3043 }
3044}
3045
2880static void nvme_reset_notify(struct pci_dev *pdev, bool prepare) 3046static void nvme_reset_notify(struct pci_dev *pdev, bool prepare)
2881{ 3047{
2882 struct nvme_dev *dev = pci_get_drvdata(pdev); 3048 struct nvme_dev *dev = pci_get_drvdata(pdev);
@@ -2902,11 +3068,12 @@ static void nvme_remove(struct pci_dev *pdev)
2902 spin_unlock(&dev_list_lock); 3068 spin_unlock(&dev_list_lock);
2903 3069
2904 pci_set_drvdata(pdev, NULL); 3070 pci_set_drvdata(pdev, NULL);
3071 flush_work(&dev->probe_work);
2905 flush_work(&dev->reset_work); 3072 flush_work(&dev->reset_work);
2906 misc_deregister(&dev->miscdev);
2907 nvme_dev_shutdown(dev); 3073 nvme_dev_shutdown(dev);
2908 nvme_dev_remove(dev); 3074 nvme_dev_remove(dev);
2909 nvme_dev_remove_admin(dev); 3075 nvme_dev_remove_admin(dev);
3076 device_destroy(nvme_class, MKDEV(nvme_char_major, dev->instance));
2910 nvme_free_queues(dev, 0); 3077 nvme_free_queues(dev, 0);
2911 nvme_release_prp_pools(dev); 3078 nvme_release_prp_pools(dev);
2912 kref_put(&dev->kref, nvme_free_dev); 3079 kref_put(&dev->kref, nvme_free_dev);
@@ -2990,11 +3157,26 @@ static int __init nvme_init(void)
2990 else if (result > 0) 3157 else if (result > 0)
2991 nvme_major = result; 3158 nvme_major = result;
2992 3159
3160 result = __register_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme",
3161 &nvme_dev_fops);
3162 if (result < 0)
3163 goto unregister_blkdev;
3164 else if (result > 0)
3165 nvme_char_major = result;
3166
3167 nvme_class = class_create(THIS_MODULE, "nvme");
3168 if (!nvme_class)
3169 goto unregister_chrdev;
3170
2993 result = pci_register_driver(&nvme_driver); 3171 result = pci_register_driver(&nvme_driver);
2994 if (result) 3172 if (result)
2995 goto unregister_blkdev; 3173 goto destroy_class;
2996 return 0; 3174 return 0;
2997 3175
3176 destroy_class:
3177 class_destroy(nvme_class);
3178 unregister_chrdev:
3179 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
2998 unregister_blkdev: 3180 unregister_blkdev:
2999 unregister_blkdev(nvme_major, "nvme"); 3181 unregister_blkdev(nvme_major, "nvme");
3000 kill_workq: 3182 kill_workq:
@@ -3005,9 +3187,10 @@ static int __init nvme_init(void)
3005static void __exit nvme_exit(void) 3187static void __exit nvme_exit(void)
3006{ 3188{
3007 pci_unregister_driver(&nvme_driver); 3189 pci_unregister_driver(&nvme_driver);
3008 unregister_hotcpu_notifier(&nvme_nb);
3009 unregister_blkdev(nvme_major, "nvme"); 3190 unregister_blkdev(nvme_major, "nvme");
3010 destroy_workqueue(nvme_workq); 3191 destroy_workqueue(nvme_workq);
3192 class_destroy(nvme_class);
3193 __unregister_chrdev(nvme_char_major, 0, NVME_MINORS, "nvme");
3011 BUG_ON(nvme_thread && !IS_ERR(nvme_thread)); 3194 BUG_ON(nvme_thread && !IS_ERR(nvme_thread));
3012 _nvme_check_size(); 3195 _nvme_check_size();
3013} 3196}
diff --git a/drivers/block/nvme-scsi.c b/drivers/block/nvme-scsi.c
index 5e78568026c3..e10196e0182d 100644
--- a/drivers/block/nvme-scsi.c
+++ b/drivers/block/nvme-scsi.c
@@ -779,10 +779,8 @@ static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
779 struct nvme_dev *dev = ns->dev; 779 struct nvme_dev *dev = ns->dev;
780 dma_addr_t dma_addr; 780 dma_addr_t dma_addr;
781 void *mem; 781 void *mem;
782 struct nvme_id_ctrl *id_ctrl;
783 int res = SNTI_TRANSLATION_SUCCESS; 782 int res = SNTI_TRANSLATION_SUCCESS;
784 int nvme_sc; 783 int nvme_sc;
785 u8 ieee[4];
786 int xfer_len; 784 int xfer_len;
787 __be32 tmp_id = cpu_to_be32(ns->ns_id); 785 __be32 tmp_id = cpu_to_be32(ns->ns_id);
788 786
@@ -793,46 +791,60 @@ static int nvme_trans_device_id_page(struct nvme_ns *ns, struct sg_io_hdr *hdr,
793 goto out_dma; 791 goto out_dma;
794 } 792 }
795 793
796 /* nvme controller identify */ 794 memset(inq_response, 0, alloc_len);
797 nvme_sc = nvme_identify(dev, 0, 1, dma_addr);
798 res = nvme_trans_status_code(hdr, nvme_sc);
799 if (res)
800 goto out_free;
801 if (nvme_sc) {
802 res = nvme_sc;
803 goto out_free;
804 }
805 id_ctrl = mem;
806
807 /* Since SCSI tried to save 4 bits... [SPC-4(r34) Table 591] */
808 ieee[0] = id_ctrl->ieee[0] << 4;
809 ieee[1] = id_ctrl->ieee[0] >> 4 | id_ctrl->ieee[1] << 4;
810 ieee[2] = id_ctrl->ieee[1] >> 4 | id_ctrl->ieee[2] << 4;
811 ieee[3] = id_ctrl->ieee[2] >> 4;
812
813 memset(inq_response, 0, STANDARD_INQUIRY_LENGTH);
814 inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */ 795 inq_response[1] = INQ_DEVICE_IDENTIFICATION_PAGE; /* Page Code */
815 inq_response[3] = 20; /* Page Length */ 796 if (readl(&dev->bar->vs) >= NVME_VS(1, 1)) {
816 /* Designation Descriptor start */ 797 struct nvme_id_ns *id_ns = mem;
817 inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */ 798 void *eui = id_ns->eui64;
818 inq_response[5] = 0x03; /* PIV=0b | Asso=00b | Designator Type=3h */ 799 int len = sizeof(id_ns->eui64);
819 inq_response[6] = 0x00; /* Rsvd */
820 inq_response[7] = 16; /* Designator Length */
821 /* Designator start */
822 inq_response[8] = 0x60 | ieee[3]; /* NAA=6h | IEEE ID MSB, High nibble*/
823 inq_response[9] = ieee[2]; /* IEEE ID */
824 inq_response[10] = ieee[1]; /* IEEE ID */
825 inq_response[11] = ieee[0]; /* IEEE ID| Vendor Specific ID... */
826 inq_response[12] = (dev->pci_dev->vendor & 0xFF00) >> 8;
827 inq_response[13] = (dev->pci_dev->vendor & 0x00FF);
828 inq_response[14] = dev->serial[0];
829 inq_response[15] = dev->serial[1];
830 inq_response[16] = dev->model[0];
831 inq_response[17] = dev->model[1];
832 memcpy(&inq_response[18], &tmp_id, sizeof(u32));
833 /* Last 2 bytes are zero */
834 800
835 xfer_len = min(alloc_len, STANDARD_INQUIRY_LENGTH); 801 nvme_sc = nvme_identify(dev, ns->ns_id, 0, dma_addr);
802 res = nvme_trans_status_code(hdr, nvme_sc);
803 if (res)
804 goto out_free;
805 if (nvme_sc) {
806 res = nvme_sc;
807 goto out_free;
808 }
809
810 if (readl(&dev->bar->vs) >= NVME_VS(1, 2)) {
811 if (bitmap_empty(eui, len * 8)) {
812 eui = id_ns->nguid;
813 len = sizeof(id_ns->nguid);
814 }
815 }
816 if (bitmap_empty(eui, len * 8))
817 goto scsi_string;
818
819 inq_response[3] = 4 + len; /* Page Length */
820 /* Designation Descriptor start */
821 inq_response[4] = 0x01; /* Proto ID=0h | Code set=1h */
822 inq_response[5] = 0x02; /* PIV=0b | Asso=00b | Designator Type=2h */
823 inq_response[6] = 0x00; /* Rsvd */
824 inq_response[7] = len; /* Designator Length */
825 memcpy(&inq_response[8], eui, len);
826 } else {
827 scsi_string:
828 if (alloc_len < 72) {
829 res = nvme_trans_completion(hdr,
830 SAM_STAT_CHECK_CONDITION,
831 ILLEGAL_REQUEST, SCSI_ASC_INVALID_CDB,
832 SCSI_ASCQ_CAUSE_NOT_REPORTABLE);
833 goto out_free;
834 }
835 inq_response[3] = 0x48; /* Page Length */
836 /* Designation Descriptor start */
837 inq_response[4] = 0x03; /* Proto ID=0h | Code set=3h */
838 inq_response[5] = 0x08; /* PIV=0b | Asso=00b | Designator Type=8h */
839 inq_response[6] = 0x00; /* Rsvd */
840 inq_response[7] = 0x44; /* Designator Length */
841
842 sprintf(&inq_response[8], "%04x", dev->pci_dev->vendor);
843 memcpy(&inq_response[12], dev->model, sizeof(dev->model));
844 sprintf(&inq_response[52], "%04x", tmp_id);
845 memcpy(&inq_response[56], dev->serial, sizeof(dev->serial));
846 }
847 xfer_len = alloc_len;
836 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len); 848 res = nvme_trans_copy_to_user(hdr, inq_response, xfer_len);
837 849
838 out_free: 850 out_free:
@@ -1600,7 +1612,7 @@ static inline void nvme_trans_modesel_get_bd_len(u8 *parm_list, u8 cdb10,
1600 /* 10 Byte CDB */ 1612 /* 10 Byte CDB */
1601 *bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) + 1613 *bd_len = (parm_list[MODE_SELECT_10_BD_OFFSET] << 8) +
1602 parm_list[MODE_SELECT_10_BD_OFFSET + 1]; 1614 parm_list[MODE_SELECT_10_BD_OFFSET + 1];
1603 *llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] && 1615 *llbaa = parm_list[MODE_SELECT_10_LLBAA_OFFSET] &
1604 MODE_SELECT_10_LLBAA_MASK; 1616 MODE_SELECT_10_LLBAA_MASK;
1605 } else { 1617 } else {
1606 /* 6 Byte CDB */ 1618 /* 6 Byte CDB */
@@ -2222,7 +2234,7 @@ static int nvme_trans_inquiry(struct nvme_ns *ns, struct sg_io_hdr *hdr,
2222 page_code = GET_INQ_PAGE_CODE(cmd); 2234 page_code = GET_INQ_PAGE_CODE(cmd);
2223 alloc_len = GET_INQ_ALLOC_LENGTH(cmd); 2235 alloc_len = GET_INQ_ALLOC_LENGTH(cmd);
2224 2236
2225 inq_response = kmalloc(STANDARD_INQUIRY_LENGTH, GFP_KERNEL); 2237 inq_response = kmalloc(alloc_len, GFP_KERNEL);
2226 if (inq_response == NULL) { 2238 if (inq_response == NULL) {
2227 res = -ENOMEM; 2239 res = -ENOMEM;
2228 goto out_mem; 2240 goto out_mem;
diff --git a/drivers/block/zram/zram_drv.c b/drivers/block/zram/zram_drv.c
index 8e233edd7a09..871bd3550cb0 100644
--- a/drivers/block/zram/zram_drv.c
+++ b/drivers/block/zram/zram_drv.c
@@ -528,7 +528,7 @@ out_cleanup:
528static inline void update_used_max(struct zram *zram, 528static inline void update_used_max(struct zram *zram,
529 const unsigned long pages) 529 const unsigned long pages)
530{ 530{
531 int old_max, cur_max; 531 unsigned long old_max, cur_max;
532 532
533 old_max = atomic_long_read(&zram->stats.max_used_pages); 533 old_max = atomic_long_read(&zram->stats.max_used_pages);
534 534
diff --git a/drivers/bluetooth/btusb.c b/drivers/bluetooth/btusb.c
index b87688881143..8bfc4c2bba87 100644
--- a/drivers/bluetooth/btusb.c
+++ b/drivers/bluetooth/btusb.c
@@ -272,6 +272,7 @@ static const struct usb_device_id blacklist_table[] = {
272 { USB_DEVICE(0x1286, 0x2046), .driver_info = BTUSB_MARVELL }, 272 { USB_DEVICE(0x1286, 0x2046), .driver_info = BTUSB_MARVELL },
273 273
274 /* Intel Bluetooth devices */ 274 /* Intel Bluetooth devices */
275 { USB_DEVICE(0x8087, 0x07da), .driver_info = BTUSB_CSR },
275 { USB_DEVICE(0x8087, 0x07dc), .driver_info = BTUSB_INTEL }, 276 { USB_DEVICE(0x8087, 0x07dc), .driver_info = BTUSB_INTEL },
276 { USB_DEVICE(0x8087, 0x0a2a), .driver_info = BTUSB_INTEL }, 277 { USB_DEVICE(0x8087, 0x0a2a), .driver_info = BTUSB_INTEL },
277 { USB_DEVICE(0x8087, 0x0a2b), .driver_info = BTUSB_INTEL_NEW }, 278 { USB_DEVICE(0x8087, 0x0a2b), .driver_info = BTUSB_INTEL_NEW },
diff --git a/drivers/char/ipmi/ipmi_devintf.c b/drivers/char/ipmi/ipmi_devintf.c
index ec318bf434a6..1786574536b2 100644
--- a/drivers/char/ipmi/ipmi_devintf.c
+++ b/drivers/char/ipmi/ipmi_devintf.c
@@ -157,12 +157,16 @@ static int ipmi_release(struct inode *inode, struct file *file)
157{ 157{
158 struct ipmi_file_private *priv = file->private_data; 158 struct ipmi_file_private *priv = file->private_data;
159 int rv; 159 int rv;
160 struct ipmi_recv_msg *msg, *next;
160 161
161 rv = ipmi_destroy_user(priv->user); 162 rv = ipmi_destroy_user(priv->user);
162 if (rv) 163 if (rv)
163 return rv; 164 return rv;
164 165
165 /* FIXME - free the messages in the list. */ 166 list_for_each_entry_safe(msg, next, &priv->recv_msgs, link)
167 ipmi_free_recv_msg(msg);
168
169
166 kfree(priv); 170 kfree(priv);
167 171
168 return 0; 172 return 0;
diff --git a/drivers/char/ipmi/ipmi_msghandler.c b/drivers/char/ipmi/ipmi_msghandler.c
index 6b65fa4e0c55..9bb592872532 100644
--- a/drivers/char/ipmi/ipmi_msghandler.c
+++ b/drivers/char/ipmi/ipmi_msghandler.c
@@ -1483,14 +1483,10 @@ static inline void format_lan_msg(struct ipmi_smi_msg *smi_msg,
1483 smi_msg->msgid = msgid; 1483 smi_msg->msgid = msgid;
1484} 1484}
1485 1485
1486static void smi_send(ipmi_smi_t intf, struct ipmi_smi_handlers *handlers, 1486static struct ipmi_smi_msg *smi_add_send_msg(ipmi_smi_t intf,
1487 struct ipmi_smi_msg *smi_msg, int priority) 1487 struct ipmi_smi_msg *smi_msg,
1488 int priority)
1488{ 1489{
1489 int run_to_completion = intf->run_to_completion;
1490 unsigned long flags;
1491
1492 if (!run_to_completion)
1493 spin_lock_irqsave(&intf->xmit_msgs_lock, flags);
1494 if (intf->curr_msg) { 1490 if (intf->curr_msg) {
1495 if (priority > 0) 1491 if (priority > 0)
1496 list_add_tail(&smi_msg->link, &intf->hp_xmit_msgs); 1492 list_add_tail(&smi_msg->link, &intf->hp_xmit_msgs);
@@ -1500,8 +1496,25 @@ static void smi_send(ipmi_smi_t intf, struct ipmi_smi_handlers *handlers,
1500 } else { 1496 } else {
1501 intf->curr_msg = smi_msg; 1497 intf->curr_msg = smi_msg;
1502 } 1498 }
1503 if (!run_to_completion) 1499
1500 return smi_msg;
1501}
1502
1503
1504static void smi_send(ipmi_smi_t intf, struct ipmi_smi_handlers *handlers,
1505 struct ipmi_smi_msg *smi_msg, int priority)
1506{
1507 int run_to_completion = intf->run_to_completion;
1508
1509 if (run_to_completion) {
1510 smi_msg = smi_add_send_msg(intf, smi_msg, priority);
1511 } else {
1512 unsigned long flags;
1513
1514 spin_lock_irqsave(&intf->xmit_msgs_lock, flags);
1515 smi_msg = smi_add_send_msg(intf, smi_msg, priority);
1504 spin_unlock_irqrestore(&intf->xmit_msgs_lock, flags); 1516 spin_unlock_irqrestore(&intf->xmit_msgs_lock, flags);
1517 }
1505 1518
1506 if (smi_msg) 1519 if (smi_msg)
1507 handlers->sender(intf->send_info, smi_msg); 1520 handlers->sender(intf->send_info, smi_msg);
@@ -1985,7 +1998,9 @@ static int smi_ipmb_proc_show(struct seq_file *m, void *v)
1985 seq_printf(m, "%x", intf->channels[0].address); 1998 seq_printf(m, "%x", intf->channels[0].address);
1986 for (i = 1; i < IPMI_MAX_CHANNELS; i++) 1999 for (i = 1; i < IPMI_MAX_CHANNELS; i++)
1987 seq_printf(m, " %x", intf->channels[i].address); 2000 seq_printf(m, " %x", intf->channels[i].address);
1988 return seq_putc(m, '\n'); 2001 seq_putc(m, '\n');
2002
2003 return seq_has_overflowed(m);
1989} 2004}
1990 2005
1991static int smi_ipmb_proc_open(struct inode *inode, struct file *file) 2006static int smi_ipmb_proc_open(struct inode *inode, struct file *file)
@@ -2004,9 +2019,11 @@ static int smi_version_proc_show(struct seq_file *m, void *v)
2004{ 2019{
2005 ipmi_smi_t intf = m->private; 2020 ipmi_smi_t intf = m->private;
2006 2021
2007 return seq_printf(m, "%u.%u\n", 2022 seq_printf(m, "%u.%u\n",
2008 ipmi_version_major(&intf->bmc->id), 2023 ipmi_version_major(&intf->bmc->id),
2009 ipmi_version_minor(&intf->bmc->id)); 2024 ipmi_version_minor(&intf->bmc->id));
2025
2026 return seq_has_overflowed(m);
2010} 2027}
2011 2028
2012static int smi_version_proc_open(struct inode *inode, struct file *file) 2029static int smi_version_proc_open(struct inode *inode, struct file *file)
@@ -2353,11 +2370,28 @@ static struct attribute *bmc_dev_attrs[] = {
2353 &dev_attr_additional_device_support.attr, 2370 &dev_attr_additional_device_support.attr,
2354 &dev_attr_manufacturer_id.attr, 2371 &dev_attr_manufacturer_id.attr,
2355 &dev_attr_product_id.attr, 2372 &dev_attr_product_id.attr,
2373 &dev_attr_aux_firmware_revision.attr,
2374 &dev_attr_guid.attr,
2356 NULL 2375 NULL
2357}; 2376};
2358 2377
2378static umode_t bmc_dev_attr_is_visible(struct kobject *kobj,
2379 struct attribute *attr, int idx)
2380{
2381 struct device *dev = kobj_to_dev(kobj);
2382 struct bmc_device *bmc = to_bmc_device(dev);
2383 umode_t mode = attr->mode;
2384
2385 if (attr == &dev_attr_aux_firmware_revision.attr)
2386 return bmc->id.aux_firmware_revision_set ? mode : 0;
2387 if (attr == &dev_attr_guid.attr)
2388 return bmc->guid_set ? mode : 0;
2389 return mode;
2390}
2391
2359static struct attribute_group bmc_dev_attr_group = { 2392static struct attribute_group bmc_dev_attr_group = {
2360 .attrs = bmc_dev_attrs, 2393 .attrs = bmc_dev_attrs,
2394 .is_visible = bmc_dev_attr_is_visible,
2361}; 2395};
2362 2396
2363static const struct attribute_group *bmc_dev_attr_groups[] = { 2397static const struct attribute_group *bmc_dev_attr_groups[] = {
@@ -2380,13 +2414,6 @@ cleanup_bmc_device(struct kref *ref)
2380{ 2414{
2381 struct bmc_device *bmc = container_of(ref, struct bmc_device, usecount); 2415 struct bmc_device *bmc = container_of(ref, struct bmc_device, usecount);
2382 2416
2383 if (bmc->id.aux_firmware_revision_set)
2384 device_remove_file(&bmc->pdev.dev,
2385 &dev_attr_aux_firmware_revision);
2386 if (bmc->guid_set)
2387 device_remove_file(&bmc->pdev.dev,
2388 &dev_attr_guid);
2389
2390 platform_device_unregister(&bmc->pdev); 2417 platform_device_unregister(&bmc->pdev);
2391} 2418}
2392 2419
@@ -2407,33 +2434,6 @@ static void ipmi_bmc_unregister(ipmi_smi_t intf)
2407 mutex_unlock(&ipmidriver_mutex); 2434 mutex_unlock(&ipmidriver_mutex);
2408} 2435}
2409 2436
2410static int create_bmc_files(struct bmc_device *bmc)
2411{
2412 int err;
2413
2414 if (bmc->id.aux_firmware_revision_set) {
2415 err = device_create_file(&bmc->pdev.dev,
2416 &dev_attr_aux_firmware_revision);
2417 if (err)
2418 goto out;
2419 }
2420 if (bmc->guid_set) {
2421 err = device_create_file(&bmc->pdev.dev,
2422 &dev_attr_guid);
2423 if (err)
2424 goto out_aux_firm;
2425 }
2426
2427 return 0;
2428
2429out_aux_firm:
2430 if (bmc->id.aux_firmware_revision_set)
2431 device_remove_file(&bmc->pdev.dev,
2432 &dev_attr_aux_firmware_revision);
2433out:
2434 return err;
2435}
2436
2437static int ipmi_bmc_register(ipmi_smi_t intf, int ifnum) 2437static int ipmi_bmc_register(ipmi_smi_t intf, int ifnum)
2438{ 2438{
2439 int rv; 2439 int rv;
@@ -2522,15 +2522,6 @@ static int ipmi_bmc_register(ipmi_smi_t intf, int ifnum)
2522 return rv; 2522 return rv;
2523 } 2523 }
2524 2524
2525 rv = create_bmc_files(bmc);
2526 if (rv) {
2527 mutex_lock(&ipmidriver_mutex);
2528 platform_device_unregister(&bmc->pdev);
2529 mutex_unlock(&ipmidriver_mutex);
2530
2531 return rv;
2532 }
2533
2534 dev_info(intf->si_dev, "Found new BMC (man_id: 0x%6.6x, " 2525 dev_info(intf->si_dev, "Found new BMC (man_id: 0x%6.6x, "
2535 "prod_id: 0x%4.4x, dev_id: 0x%2.2x)\n", 2526 "prod_id: 0x%4.4x, dev_id: 0x%2.2x)\n",
2536 bmc->id.manufacturer_id, 2527 bmc->id.manufacturer_id,
@@ -4212,7 +4203,6 @@ static void need_waiter(ipmi_smi_t intf)
4212static atomic_t smi_msg_inuse_count = ATOMIC_INIT(0); 4203static atomic_t smi_msg_inuse_count = ATOMIC_INIT(0);
4213static atomic_t recv_msg_inuse_count = ATOMIC_INIT(0); 4204static atomic_t recv_msg_inuse_count = ATOMIC_INIT(0);
4214 4205
4215/* FIXME - convert these to slabs. */
4216static void free_smi_msg(struct ipmi_smi_msg *msg) 4206static void free_smi_msg(struct ipmi_smi_msg *msg)
4217{ 4207{
4218 atomic_dec(&smi_msg_inuse_count); 4208 atomic_dec(&smi_msg_inuse_count);
diff --git a/drivers/char/ipmi/ipmi_si_intf.c b/drivers/char/ipmi/ipmi_si_intf.c
index 967b73aa4e66..f6646ed3047e 100644
--- a/drivers/char/ipmi/ipmi_si_intf.c
+++ b/drivers/char/ipmi/ipmi_si_intf.c
@@ -321,6 +321,18 @@ static int try_smi_init(struct smi_info *smi);
321static void cleanup_one_si(struct smi_info *to_clean); 321static void cleanup_one_si(struct smi_info *to_clean);
322static void cleanup_ipmi_si(void); 322static void cleanup_ipmi_si(void);
323 323
324#ifdef DEBUG_TIMING
325void debug_timestamp(char *msg)
326{
327 struct timespec64 t;
328
329 getnstimeofday64(&t);
330 pr_debug("**%s: %lld.%9.9ld\n", msg, (long long) t.tv_sec, t.tv_nsec);
331}
332#else
333#define debug_timestamp(x)
334#endif
335
324static ATOMIC_NOTIFIER_HEAD(xaction_notifier_list); 336static ATOMIC_NOTIFIER_HEAD(xaction_notifier_list);
325static int register_xaction_notifier(struct notifier_block *nb) 337static int register_xaction_notifier(struct notifier_block *nb)
326{ 338{
@@ -358,9 +370,6 @@ static void return_hosed_msg(struct smi_info *smi_info, int cCode)
358static enum si_sm_result start_next_msg(struct smi_info *smi_info) 370static enum si_sm_result start_next_msg(struct smi_info *smi_info)
359{ 371{
360 int rv; 372 int rv;
361#ifdef DEBUG_TIMING
362 struct timeval t;
363#endif
364 373
365 if (!smi_info->waiting_msg) { 374 if (!smi_info->waiting_msg) {
366 smi_info->curr_msg = NULL; 375 smi_info->curr_msg = NULL;
@@ -370,10 +379,7 @@ static enum si_sm_result start_next_msg(struct smi_info *smi_info)
370 379
371 smi_info->curr_msg = smi_info->waiting_msg; 380 smi_info->curr_msg = smi_info->waiting_msg;
372 smi_info->waiting_msg = NULL; 381 smi_info->waiting_msg = NULL;
373#ifdef DEBUG_TIMING 382 debug_timestamp("Start2");
374 do_gettimeofday(&t);
375 printk(KERN_DEBUG "**Start2: %d.%9.9d\n", t.tv_sec, t.tv_usec);
376#endif
377 err = atomic_notifier_call_chain(&xaction_notifier_list, 383 err = atomic_notifier_call_chain(&xaction_notifier_list,
378 0, smi_info); 384 0, smi_info);
379 if (err & NOTIFY_STOP_MASK) { 385 if (err & NOTIFY_STOP_MASK) {
@@ -582,12 +588,8 @@ static void check_bt_irq(struct smi_info *smi_info, bool irq_on)
582static void handle_transaction_done(struct smi_info *smi_info) 588static void handle_transaction_done(struct smi_info *smi_info)
583{ 589{
584 struct ipmi_smi_msg *msg; 590 struct ipmi_smi_msg *msg;
585#ifdef DEBUG_TIMING
586 struct timeval t;
587 591
588 do_gettimeofday(&t); 592 debug_timestamp("Done");
589 printk(KERN_DEBUG "**Done: %d.%9.9d\n", t.tv_sec, t.tv_usec);
590#endif
591 switch (smi_info->si_state) { 593 switch (smi_info->si_state) {
592 case SI_NORMAL: 594 case SI_NORMAL:
593 if (!smi_info->curr_msg) 595 if (!smi_info->curr_msg)
@@ -929,24 +931,15 @@ static void sender(void *send_info,
929 struct smi_info *smi_info = send_info; 931 struct smi_info *smi_info = send_info;
930 enum si_sm_result result; 932 enum si_sm_result result;
931 unsigned long flags; 933 unsigned long flags;
932#ifdef DEBUG_TIMING
933 struct timeval t;
934#endif
935
936 BUG_ON(smi_info->waiting_msg);
937 smi_info->waiting_msg = msg;
938 934
939#ifdef DEBUG_TIMING 935 debug_timestamp("Enqueue");
940 do_gettimeofday(&t);
941 printk("**Enqueue: %d.%9.9d\n", t.tv_sec, t.tv_usec);
942#endif
943 936
944 if (smi_info->run_to_completion) { 937 if (smi_info->run_to_completion) {
945 /* 938 /*
946 * If we are running to completion, start it and run 939 * If we are running to completion, start it and run
947 * transactions until everything is clear. 940 * transactions until everything is clear.
948 */ 941 */
949 smi_info->curr_msg = smi_info->waiting_msg; 942 smi_info->curr_msg = msg;
950 smi_info->waiting_msg = NULL; 943 smi_info->waiting_msg = NULL;
951 944
952 /* 945 /*
@@ -964,6 +957,15 @@ static void sender(void *send_info,
964 } 957 }
965 958
966 spin_lock_irqsave(&smi_info->si_lock, flags); 959 spin_lock_irqsave(&smi_info->si_lock, flags);
960 /*
961 * The following two lines don't need to be under the lock for
962 * the lock's sake, but they do need SMP memory barriers to
963 * avoid getting things out of order. We are already claiming
964 * the lock, anyway, so just do it under the lock to avoid the
965 * ordering problem.
966 */
967 BUG_ON(smi_info->waiting_msg);
968 smi_info->waiting_msg = msg;
967 check_start_timer_thread(smi_info); 969 check_start_timer_thread(smi_info);
968 spin_unlock_irqrestore(&smi_info->si_lock, flags); 970 spin_unlock_irqrestore(&smi_info->si_lock, flags);
969} 971}
@@ -989,18 +991,18 @@ static void set_run_to_completion(void *send_info, bool i_run_to_completion)
989 * we are spinning in kipmid looking for something and not delaying 991 * we are spinning in kipmid looking for something and not delaying
990 * between checks 992 * between checks
991 */ 993 */
992static inline void ipmi_si_set_not_busy(struct timespec *ts) 994static inline void ipmi_si_set_not_busy(struct timespec64 *ts)
993{ 995{
994 ts->tv_nsec = -1; 996 ts->tv_nsec = -1;
995} 997}
996static inline int ipmi_si_is_busy(struct timespec *ts) 998static inline int ipmi_si_is_busy(struct timespec64 *ts)
997{ 999{
998 return ts->tv_nsec != -1; 1000 return ts->tv_nsec != -1;
999} 1001}
1000 1002
1001static inline int ipmi_thread_busy_wait(enum si_sm_result smi_result, 1003static inline int ipmi_thread_busy_wait(enum si_sm_result smi_result,
1002 const struct smi_info *smi_info, 1004 const struct smi_info *smi_info,
1003 struct timespec *busy_until) 1005 struct timespec64 *busy_until)
1004{ 1006{
1005 unsigned int max_busy_us = 0; 1007 unsigned int max_busy_us = 0;
1006 1008
@@ -1009,12 +1011,13 @@ static inline int ipmi_thread_busy_wait(enum si_sm_result smi_result,
1009 if (max_busy_us == 0 || smi_result != SI_SM_CALL_WITH_DELAY) 1011 if (max_busy_us == 0 || smi_result != SI_SM_CALL_WITH_DELAY)
1010 ipmi_si_set_not_busy(busy_until); 1012 ipmi_si_set_not_busy(busy_until);
1011 else if (!ipmi_si_is_busy(busy_until)) { 1013 else if (!ipmi_si_is_busy(busy_until)) {
1012 getnstimeofday(busy_until); 1014 getnstimeofday64(busy_until);
1013 timespec_add_ns(busy_until, max_busy_us*NSEC_PER_USEC); 1015 timespec64_add_ns(busy_until, max_busy_us*NSEC_PER_USEC);
1014 } else { 1016 } else {
1015 struct timespec now; 1017 struct timespec64 now;
1016 getnstimeofday(&now); 1018
1017 if (unlikely(timespec_compare(&now, busy_until) > 0)) { 1019 getnstimeofday64(&now);
1020 if (unlikely(timespec64_compare(&now, busy_until) > 0)) {
1018 ipmi_si_set_not_busy(busy_until); 1021 ipmi_si_set_not_busy(busy_until);
1019 return 0; 1022 return 0;
1020 } 1023 }
@@ -1037,7 +1040,7 @@ static int ipmi_thread(void *data)
1037 struct smi_info *smi_info = data; 1040 struct smi_info *smi_info = data;
1038 unsigned long flags; 1041 unsigned long flags;
1039 enum si_sm_result smi_result; 1042 enum si_sm_result smi_result;
1040 struct timespec busy_until; 1043 struct timespec64 busy_until;
1041 1044
1042 ipmi_si_set_not_busy(&busy_until); 1045 ipmi_si_set_not_busy(&busy_until);
1043 set_user_nice(current, MAX_NICE); 1046 set_user_nice(current, MAX_NICE);
@@ -1128,15 +1131,10 @@ static void smi_timeout(unsigned long data)
1128 unsigned long jiffies_now; 1131 unsigned long jiffies_now;
1129 long time_diff; 1132 long time_diff;
1130 long timeout; 1133 long timeout;
1131#ifdef DEBUG_TIMING
1132 struct timeval t;
1133#endif
1134 1134
1135 spin_lock_irqsave(&(smi_info->si_lock), flags); 1135 spin_lock_irqsave(&(smi_info->si_lock), flags);
1136#ifdef DEBUG_TIMING 1136 debug_timestamp("Timer");
1137 do_gettimeofday(&t); 1137
1138 printk(KERN_DEBUG "**Timer: %d.%9.9d\n", t.tv_sec, t.tv_usec);
1139#endif
1140 jiffies_now = jiffies; 1138 jiffies_now = jiffies;
1141 time_diff = (((long)jiffies_now - (long)smi_info->last_timeout_jiffies) 1139 time_diff = (((long)jiffies_now - (long)smi_info->last_timeout_jiffies)
1142 * SI_USEC_PER_JIFFY); 1140 * SI_USEC_PER_JIFFY);
@@ -1173,18 +1171,13 @@ static irqreturn_t si_irq_handler(int irq, void *data)
1173{ 1171{
1174 struct smi_info *smi_info = data; 1172 struct smi_info *smi_info = data;
1175 unsigned long flags; 1173 unsigned long flags;
1176#ifdef DEBUG_TIMING
1177 struct timeval t;
1178#endif
1179 1174
1180 spin_lock_irqsave(&(smi_info->si_lock), flags); 1175 spin_lock_irqsave(&(smi_info->si_lock), flags);
1181 1176
1182 smi_inc_stat(smi_info, interrupts); 1177 smi_inc_stat(smi_info, interrupts);
1183 1178
1184#ifdef DEBUG_TIMING 1179 debug_timestamp("Interrupt");
1185 do_gettimeofday(&t); 1180
1186 printk(KERN_DEBUG "**Interrupt: %d.%9.9d\n", t.tv_sec, t.tv_usec);
1187#endif
1188 smi_event_handler(smi_info, 0); 1181 smi_event_handler(smi_info, 0);
1189 spin_unlock_irqrestore(&(smi_info->si_lock), flags); 1182 spin_unlock_irqrestore(&(smi_info->si_lock), flags);
1190 return IRQ_HANDLED; 1183 return IRQ_HANDLED;
@@ -2038,18 +2031,13 @@ static u32 ipmi_acpi_gpe(acpi_handle gpe_device,
2038{ 2031{
2039 struct smi_info *smi_info = context; 2032 struct smi_info *smi_info = context;
2040 unsigned long flags; 2033 unsigned long flags;
2041#ifdef DEBUG_TIMING
2042 struct timeval t;
2043#endif
2044 2034
2045 spin_lock_irqsave(&(smi_info->si_lock), flags); 2035 spin_lock_irqsave(&(smi_info->si_lock), flags);
2046 2036
2047 smi_inc_stat(smi_info, interrupts); 2037 smi_inc_stat(smi_info, interrupts);
2048 2038
2049#ifdef DEBUG_TIMING 2039 debug_timestamp("ACPI_GPE");
2050 do_gettimeofday(&t); 2040
2051 printk("**ACPI_GPE: %d.%9.9d\n", t.tv_sec, t.tv_usec);
2052#endif
2053 smi_event_handler(smi_info, 0); 2041 smi_event_handler(smi_info, 0);
2054 spin_unlock_irqrestore(&(smi_info->si_lock), flags); 2042 spin_unlock_irqrestore(&(smi_info->si_lock), flags);
2055 2043
@@ -2071,7 +2059,6 @@ static int acpi_gpe_irq_setup(struct smi_info *info)
2071 if (!info->irq) 2059 if (!info->irq)
2072 return 0; 2060 return 0;
2073 2061
2074 /* FIXME - is level triggered right? */
2075 status = acpi_install_gpe_handler(NULL, 2062 status = acpi_install_gpe_handler(NULL,
2076 info->irq, 2063 info->irq,
2077 ACPI_GPE_LEVEL_TRIGGERED, 2064 ACPI_GPE_LEVEL_TRIGGERED,
@@ -2998,7 +2985,9 @@ static int smi_type_proc_show(struct seq_file *m, void *v)
2998{ 2985{
2999 struct smi_info *smi = m->private; 2986 struct smi_info *smi = m->private;
3000 2987
3001 return seq_printf(m, "%s\n", si_to_str[smi->si_type]); 2988 seq_printf(m, "%s\n", si_to_str[smi->si_type]);
2989
2990 return seq_has_overflowed(m);
3002} 2991}
3003 2992
3004static int smi_type_proc_open(struct inode *inode, struct file *file) 2993static int smi_type_proc_open(struct inode *inode, struct file *file)
@@ -3060,16 +3049,18 @@ static int smi_params_proc_show(struct seq_file *m, void *v)
3060{ 3049{
3061 struct smi_info *smi = m->private; 3050 struct smi_info *smi = m->private;
3062 3051
3063 return seq_printf(m, 3052 seq_printf(m,
3064 "%s,%s,0x%lx,rsp=%d,rsi=%d,rsh=%d,irq=%d,ipmb=%d\n", 3053 "%s,%s,0x%lx,rsp=%d,rsi=%d,rsh=%d,irq=%d,ipmb=%d\n",
3065 si_to_str[smi->si_type], 3054 si_to_str[smi->si_type],
3066 addr_space_to_str[smi->io.addr_type], 3055 addr_space_to_str[smi->io.addr_type],
3067 smi->io.addr_data, 3056 smi->io.addr_data,
3068 smi->io.regspacing, 3057 smi->io.regspacing,
3069 smi->io.regsize, 3058 smi->io.regsize,
3070 smi->io.regshift, 3059 smi->io.regshift,
3071 smi->irq, 3060 smi->irq,
3072 smi->slave_addr); 3061 smi->slave_addr);
3062
3063 return seq_has_overflowed(m);
3073} 3064}
3074 3065
3075static int smi_params_proc_open(struct inode *inode, struct file *file) 3066static int smi_params_proc_open(struct inode *inode, struct file *file)
diff --git a/drivers/char/ipmi/ipmi_ssif.c b/drivers/char/ipmi/ipmi_ssif.c
index 982b96323f82..f6e378dac5f5 100644
--- a/drivers/char/ipmi/ipmi_ssif.c
+++ b/drivers/char/ipmi/ipmi_ssif.c
@@ -1097,8 +1097,6 @@ static int ssif_remove(struct i2c_client *client)
1097 if (!ssif_info) 1097 if (!ssif_info)
1098 return 0; 1098 return 0;
1099 1099
1100 i2c_set_clientdata(client, NULL);
1101
1102 /* 1100 /*
1103 * After this point, we won't deliver anything asychronously 1101 * After this point, we won't deliver anything asychronously
1104 * to the message handler. We can unregister ourself. 1102 * to the message handler. We can unregister ourself.
@@ -1198,7 +1196,9 @@ static int ssif_detect(struct i2c_client *client, struct i2c_board_info *info)
1198 1196
1199static int smi_type_proc_show(struct seq_file *m, void *v) 1197static int smi_type_proc_show(struct seq_file *m, void *v)
1200{ 1198{
1201 return seq_puts(m, "ssif\n"); 1199 seq_puts(m, "ssif\n");
1200
1201 return seq_has_overflowed(m);
1202} 1202}
1203 1203
1204static int smi_type_proc_open(struct inode *inode, struct file *file) 1204static int smi_type_proc_open(struct inode *inode, struct file *file)
diff --git a/drivers/char/tpm/tpm-chip.c b/drivers/char/tpm/tpm-chip.c
index 1d278ccd751f..e096e9cddb40 100644
--- a/drivers/char/tpm/tpm-chip.c
+++ b/drivers/char/tpm/tpm-chip.c
@@ -140,24 +140,24 @@ static int tpm_dev_add_device(struct tpm_chip *chip)
140{ 140{
141 int rc; 141 int rc;
142 142
143 rc = device_add(&chip->dev); 143 rc = cdev_add(&chip->cdev, chip->dev.devt, 1);
144 if (rc) { 144 if (rc) {
145 dev_err(&chip->dev, 145 dev_err(&chip->dev,
146 "unable to device_register() %s, major %d, minor %d, err=%d\n", 146 "unable to cdev_add() %s, major %d, minor %d, err=%d\n",
147 chip->devname, MAJOR(chip->dev.devt), 147 chip->devname, MAJOR(chip->dev.devt),
148 MINOR(chip->dev.devt), rc); 148 MINOR(chip->dev.devt), rc);
149 149
150 device_unregister(&chip->dev);
150 return rc; 151 return rc;
151 } 152 }
152 153
153 rc = cdev_add(&chip->cdev, chip->dev.devt, 1); 154 rc = device_add(&chip->dev);
154 if (rc) { 155 if (rc) {
155 dev_err(&chip->dev, 156 dev_err(&chip->dev,
156 "unable to cdev_add() %s, major %d, minor %d, err=%d\n", 157 "unable to device_register() %s, major %d, minor %d, err=%d\n",
157 chip->devname, MAJOR(chip->dev.devt), 158 chip->devname, MAJOR(chip->dev.devt),
158 MINOR(chip->dev.devt), rc); 159 MINOR(chip->dev.devt), rc);
159 160
160 device_unregister(&chip->dev);
161 return rc; 161 return rc;
162 } 162 }
163 163
@@ -174,27 +174,17 @@ static void tpm_dev_del_device(struct tpm_chip *chip)
174 * tpm_chip_register() - create a character device for the TPM chip 174 * tpm_chip_register() - create a character device for the TPM chip
175 * @chip: TPM chip to use. 175 * @chip: TPM chip to use.
176 * 176 *
177 * Creates a character device for the TPM chip and adds sysfs interfaces for 177 * Creates a character device for the TPM chip and adds sysfs attributes for
178 * the device, PPI and TCPA. As the last step this function adds the 178 * the device. As the last step this function adds the chip to the list of TPM
179 * chip to the list of TPM chips available for use. 179 * chips available for in-kernel use.
180 * 180 *
181 * NOTE: This function should be only called after the chip initialization 181 * This function should be only called after the chip initialization is
182 * is complete. 182 * complete.
183 *
184 * Called from tpm_<specific>.c probe function only for devices
185 * the driver has determined it should claim. Prior to calling
186 * this function the specific probe function has called pci_enable_device
187 * upon errant exit from this function specific probe function should call
188 * pci_disable_device
189 */ 183 */
190int tpm_chip_register(struct tpm_chip *chip) 184int tpm_chip_register(struct tpm_chip *chip)
191{ 185{
192 int rc; 186 int rc;
193 187
194 rc = tpm_dev_add_device(chip);
195 if (rc)
196 return rc;
197
198 /* Populate sysfs for TPM1 devices. */ 188 /* Populate sysfs for TPM1 devices. */
199 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) { 189 if (!(chip->flags & TPM_CHIP_FLAG_TPM2)) {
200 rc = tpm_sysfs_add_device(chip); 190 rc = tpm_sysfs_add_device(chip);
@@ -208,6 +198,10 @@ int tpm_chip_register(struct tpm_chip *chip)
208 chip->bios_dir = tpm_bios_log_setup(chip->devname); 198 chip->bios_dir = tpm_bios_log_setup(chip->devname);
209 } 199 }
210 200
201 rc = tpm_dev_add_device(chip);
202 if (rc)
203 return rc;
204
211 /* Make the chip available. */ 205 /* Make the chip available. */
212 spin_lock(&driver_lock); 206 spin_lock(&driver_lock);
213 list_add_rcu(&chip->list, &tpm_chip_list); 207 list_add_rcu(&chip->list, &tpm_chip_list);
diff --git a/drivers/char/tpm/tpm_ibmvtpm.c b/drivers/char/tpm/tpm_ibmvtpm.c
index b1e53e3aece5..42ffa5e7a1e0 100644
--- a/drivers/char/tpm/tpm_ibmvtpm.c
+++ b/drivers/char/tpm/tpm_ibmvtpm.c
@@ -124,7 +124,7 @@ static int tpm_ibmvtpm_send(struct tpm_chip *chip, u8 *buf, size_t count)
124{ 124{
125 struct ibmvtpm_dev *ibmvtpm; 125 struct ibmvtpm_dev *ibmvtpm;
126 struct ibmvtpm_crq crq; 126 struct ibmvtpm_crq crq;
127 u64 *word = (u64 *) &crq; 127 __be64 *word = (__be64 *)&crq;
128 int rc; 128 int rc;
129 129
130 ibmvtpm = (struct ibmvtpm_dev *)TPM_VPRIV(chip); 130 ibmvtpm = (struct ibmvtpm_dev *)TPM_VPRIV(chip);
@@ -145,11 +145,11 @@ static int tpm_ibmvtpm_send(struct tpm_chip *chip, u8 *buf, size_t count)
145 memcpy((void *)ibmvtpm->rtce_buf, (void *)buf, count); 145 memcpy((void *)ibmvtpm->rtce_buf, (void *)buf, count);
146 crq.valid = (u8)IBMVTPM_VALID_CMD; 146 crq.valid = (u8)IBMVTPM_VALID_CMD;
147 crq.msg = (u8)VTPM_TPM_COMMAND; 147 crq.msg = (u8)VTPM_TPM_COMMAND;
148 crq.len = (u16)count; 148 crq.len = cpu_to_be16(count);
149 crq.data = ibmvtpm->rtce_dma_handle; 149 crq.data = cpu_to_be32(ibmvtpm->rtce_dma_handle);
150 150
151 rc = ibmvtpm_send_crq(ibmvtpm->vdev, cpu_to_be64(word[0]), 151 rc = ibmvtpm_send_crq(ibmvtpm->vdev, be64_to_cpu(word[0]),
152 cpu_to_be64(word[1])); 152 be64_to_cpu(word[1]));
153 if (rc != H_SUCCESS) { 153 if (rc != H_SUCCESS) {
154 dev_err(ibmvtpm->dev, "tpm_ibmvtpm_send failed rc=%d\n", rc); 154 dev_err(ibmvtpm->dev, "tpm_ibmvtpm_send failed rc=%d\n", rc);
155 rc = 0; 155 rc = 0;
diff --git a/drivers/char/tpm/tpm_ibmvtpm.h b/drivers/char/tpm/tpm_ibmvtpm.h
index f595f14426bf..6af92890518f 100644
--- a/drivers/char/tpm/tpm_ibmvtpm.h
+++ b/drivers/char/tpm/tpm_ibmvtpm.h
@@ -22,9 +22,9 @@
22struct ibmvtpm_crq { 22struct ibmvtpm_crq {
23 u8 valid; 23 u8 valid;
24 u8 msg; 24 u8 msg;
25 u16 len; 25 __be16 len;
26 u32 data; 26 __be32 data;
27 u64 reserved; 27 __be64 reserved;
28} __attribute__((packed, aligned(8))); 28} __attribute__((packed, aligned(8)));
29 29
30struct ibmvtpm_crq_queue { 30struct ibmvtpm_crq_queue {
diff --git a/drivers/char/virtio_console.c b/drivers/char/virtio_console.c
index fae2dbbf5745..72d7028f779b 100644
--- a/drivers/char/virtio_console.c
+++ b/drivers/char/virtio_console.c
@@ -142,6 +142,7 @@ struct ports_device {
142 * notification 142 * notification
143 */ 143 */
144 struct work_struct control_work; 144 struct work_struct control_work;
145 struct work_struct config_work;
145 146
146 struct list_head ports; 147 struct list_head ports;
147 148
@@ -1837,10 +1838,21 @@ static void config_intr(struct virtio_device *vdev)
1837 1838
1838 portdev = vdev->priv; 1839 portdev = vdev->priv;
1839 1840
1841 if (!use_multiport(portdev))
1842 schedule_work(&portdev->config_work);
1843}
1844
1845static void config_work_handler(struct work_struct *work)
1846{
1847 struct ports_device *portdev;
1848
1849 portdev = container_of(work, struct ports_device, control_work);
1840 if (!use_multiport(portdev)) { 1850 if (!use_multiport(portdev)) {
1851 struct virtio_device *vdev;
1841 struct port *port; 1852 struct port *port;
1842 u16 rows, cols; 1853 u16 rows, cols;
1843 1854
1855 vdev = portdev->vdev;
1844 virtio_cread(vdev, struct virtio_console_config, cols, &cols); 1856 virtio_cread(vdev, struct virtio_console_config, cols, &cols);
1845 virtio_cread(vdev, struct virtio_console_config, rows, &rows); 1857 virtio_cread(vdev, struct virtio_console_config, rows, &rows);
1846 1858
@@ -2040,12 +2052,14 @@ static int virtcons_probe(struct virtio_device *vdev)
2040 2052
2041 virtio_device_ready(portdev->vdev); 2053 virtio_device_ready(portdev->vdev);
2042 2054
2055 INIT_WORK(&portdev->config_work, &config_work_handler);
2056 INIT_WORK(&portdev->control_work, &control_work_handler);
2057
2043 if (multiport) { 2058 if (multiport) {
2044 unsigned int nr_added_bufs; 2059 unsigned int nr_added_bufs;
2045 2060
2046 spin_lock_init(&portdev->c_ivq_lock); 2061 spin_lock_init(&portdev->c_ivq_lock);
2047 spin_lock_init(&portdev->c_ovq_lock); 2062 spin_lock_init(&portdev->c_ovq_lock);
2048 INIT_WORK(&portdev->control_work, &control_work_handler);
2049 2063
2050 nr_added_bufs = fill_queue(portdev->c_ivq, 2064 nr_added_bufs = fill_queue(portdev->c_ivq,
2051 &portdev->c_ivq_lock); 2065 &portdev->c_ivq_lock);
@@ -2113,6 +2127,8 @@ static void virtcons_remove(struct virtio_device *vdev)
2113 /* Finish up work that's lined up */ 2127 /* Finish up work that's lined up */
2114 if (use_multiport(portdev)) 2128 if (use_multiport(portdev))
2115 cancel_work_sync(&portdev->control_work); 2129 cancel_work_sync(&portdev->control_work);
2130 else
2131 cancel_work_sync(&portdev->config_work);
2116 2132
2117 list_for_each_entry_safe(port, port2, &portdev->ports, list) 2133 list_for_each_entry_safe(port, port2, &portdev->ports, list)
2118 unplug_port(port); 2134 unplug_port(port);
@@ -2164,6 +2180,7 @@ static int virtcons_freeze(struct virtio_device *vdev)
2164 2180
2165 virtqueue_disable_cb(portdev->c_ivq); 2181 virtqueue_disable_cb(portdev->c_ivq);
2166 cancel_work_sync(&portdev->control_work); 2182 cancel_work_sync(&portdev->control_work);
2183 cancel_work_sync(&portdev->config_work);
2167 /* 2184 /*
2168 * Once more: if control_work_handler() was running, it would 2185 * Once more: if control_work_handler() was running, it would
2169 * enable the cb as the last step. 2186 * enable the cb as the last step.
diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index 91f86131bb7a..0b474a04730f 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -102,12 +102,12 @@ config COMMON_CLK_AXI_CLKGEN
102 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx 102 Support for the Analog Devices axi-clkgen pcore clock generator for Xilinx
103 FPGAs. It is commonly used in Analog Devices' reference designs. 103 FPGAs. It is commonly used in Analog Devices' reference designs.
104 104
105config CLK_PPC_CORENET 105config CLK_QORIQ
106 bool "Clock driver for PowerPC corenet platforms" 106 bool "Clock driver for Freescale QorIQ platforms"
107 depends on PPC_E500MC && OF 107 depends on (PPC_E500MC || ARM) && OF
108 ---help--- 108 ---help---
109 This adds the clock driver support for Freescale PowerPC corenet 109 This adds the clock driver support for Freescale QorIQ platforms
110 platforms using common clock framework. 110 using common clock framework.
111 111
112config COMMON_CLK_XGENE 112config COMMON_CLK_XGENE
113 bool "Clock driver for APM XGene SoC" 113 bool "Clock driver for APM XGene SoC"
@@ -135,6 +135,14 @@ config COMMON_CLK_PXA
135 ---help--- 135 ---help---
136 Sypport for the Marvell PXA SoC. 136 Sypport for the Marvell PXA SoC.
137 137
138config COMMON_CLK_CDCE706
139 tristate "Clock driver for TI CDCE706 clock synthesizer"
140 depends on I2C
141 select REGMAP_I2C
142 select RATIONAL
143 ---help---
144 This driver supports TI CDCE706 programmable 3-PLL clock synthesizer.
145
138source "drivers/clk/qcom/Kconfig" 146source "drivers/clk/qcom/Kconfig"
139 147
140endmenu 148endmenu
diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index d5fba5bc6e1b..d478ceb69c5f 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -16,9 +16,11 @@ endif
16 16
17# hardware specific clock types 17# hardware specific clock types
18# please keep this section sorted lexicographically by file/directory path name 18# please keep this section sorted lexicographically by file/directory path name
19obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o
19obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o 20obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN) += clk-axi-clkgen.o
20obj-$(CONFIG_ARCH_AXXIA) += clk-axm5516.o 21obj-$(CONFIG_ARCH_AXXIA) += clk-axm5516.o
21obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o 22obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
23obj-$(CONFIG_COMMON_CLK_CDCE706) += clk-cdce706.o
22obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o 24obj-$(CONFIG_ARCH_CLPS711X) += clk-clps711x.o
23obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o 25obj-$(CONFIG_ARCH_EFM32) += clk-efm32gg.o
24obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o 26obj-$(CONFIG_ARCH_HIGHBANK) += clk-highbank.o
@@ -30,7 +32,7 @@ obj-$(CONFIG_ARCH_MOXART) += clk-moxart.o
30obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o 32obj-$(CONFIG_ARCH_NOMADIK) += clk-nomadik.o
31obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o 33obj-$(CONFIG_ARCH_NSPIRE) += clk-nspire.o
32obj-$(CONFIG_COMMON_CLK_PALMAS) += clk-palmas.o 34obj-$(CONFIG_COMMON_CLK_PALMAS) += clk-palmas.o
33obj-$(CONFIG_CLK_PPC_CORENET) += clk-ppc-corenet.o 35obj-$(CONFIG_CLK_QORIQ) += clk-qoriq.o
34obj-$(CONFIG_COMMON_CLK_RK808) += clk-rk808.o 36obj-$(CONFIG_COMMON_CLK_RK808) += clk-rk808.o
35obj-$(CONFIG_COMMON_CLK_S2MPS11) += clk-s2mps11.o 37obj-$(CONFIG_COMMON_CLK_S2MPS11) += clk-s2mps11.o
36obj-$(CONFIG_COMMON_CLK_SI5351) += clk-si5351.o 38obj-$(CONFIG_COMMON_CLK_SI5351) += clk-si5351.o
diff --git a/drivers/clk/at91/clk-programmable.c b/drivers/clk/at91/clk-programmable.c
index bbdb1b985c91..86c8a073dcc3 100644
--- a/drivers/clk/at91/clk-programmable.c
+++ b/drivers/clk/at91/clk-programmable.c
@@ -56,6 +56,8 @@ static unsigned long clk_programmable_recalc_rate(struct clk_hw *hw,
56 56
57static long clk_programmable_determine_rate(struct clk_hw *hw, 57static long clk_programmable_determine_rate(struct clk_hw *hw,
58 unsigned long rate, 58 unsigned long rate,
59 unsigned long min_rate,
60 unsigned long max_rate,
59 unsigned long *best_parent_rate, 61 unsigned long *best_parent_rate,
60 struct clk_hw **best_parent_hw) 62 struct clk_hw **best_parent_hw)
61{ 63{
diff --git a/drivers/clk/at91/pmc.c b/drivers/clk/at91/pmc.c
index f07c8152e5cc..3f27d21fb729 100644
--- a/drivers/clk/at91/pmc.c
+++ b/drivers/clk/at91/pmc.c
@@ -89,12 +89,29 @@ static int pmc_irq_set_type(struct irq_data *d, unsigned type)
89 return 0; 89 return 0;
90} 90}
91 91
92static void pmc_irq_suspend(struct irq_data *d)
93{
94 struct at91_pmc *pmc = irq_data_get_irq_chip_data(d);
95
96 pmc->imr = pmc_read(pmc, AT91_PMC_IMR);
97 pmc_write(pmc, AT91_PMC_IDR, pmc->imr);
98}
99
100static void pmc_irq_resume(struct irq_data *d)
101{
102 struct at91_pmc *pmc = irq_data_get_irq_chip_data(d);
103
104 pmc_write(pmc, AT91_PMC_IER, pmc->imr);
105}
106
92static struct irq_chip pmc_irq = { 107static struct irq_chip pmc_irq = {
93 .name = "PMC", 108 .name = "PMC",
94 .irq_disable = pmc_irq_mask, 109 .irq_disable = pmc_irq_mask,
95 .irq_mask = pmc_irq_mask, 110 .irq_mask = pmc_irq_mask,
96 .irq_unmask = pmc_irq_unmask, 111 .irq_unmask = pmc_irq_unmask,
97 .irq_set_type = pmc_irq_set_type, 112 .irq_set_type = pmc_irq_set_type,
113 .irq_suspend = pmc_irq_suspend,
114 .irq_resume = pmc_irq_resume,
98}; 115};
99 116
100static struct lock_class_key pmc_lock_class; 117static struct lock_class_key pmc_lock_class;
@@ -224,7 +241,8 @@ static struct at91_pmc *__init at91_pmc_init(struct device_node *np,
224 goto out_free_pmc; 241 goto out_free_pmc;
225 242
226 pmc_write(pmc, AT91_PMC_IDR, 0xffffffff); 243 pmc_write(pmc, AT91_PMC_IDR, 0xffffffff);
227 if (request_irq(pmc->virq, pmc_irq_handler, IRQF_SHARED, "pmc", pmc)) 244 if (request_irq(pmc->virq, pmc_irq_handler,
245 IRQF_SHARED | IRQF_COND_SUSPEND, "pmc", pmc))
228 goto out_remove_irqdomain; 246 goto out_remove_irqdomain;
229 247
230 return pmc; 248 return pmc;
diff --git a/drivers/clk/at91/pmc.h b/drivers/clk/at91/pmc.h
index 52d2041fa3f6..69abb08cf146 100644
--- a/drivers/clk/at91/pmc.h
+++ b/drivers/clk/at91/pmc.h
@@ -33,6 +33,7 @@ struct at91_pmc {
33 spinlock_t lock; 33 spinlock_t lock;
34 const struct at91_pmc_caps *caps; 34 const struct at91_pmc_caps *caps;
35 struct irq_domain *irqdomain; 35 struct irq_domain *irqdomain;
36 u32 imr;
36}; 37};
37 38
38static inline void pmc_lock(struct at91_pmc *pmc) 39static inline void pmc_lock(struct at91_pmc *pmc)
diff --git a/drivers/clk/bcm/clk-kona.c b/drivers/clk/bcm/clk-kona.c
index 1c06f6f3a8c5..05abae89262e 100644
--- a/drivers/clk/bcm/clk-kona.c
+++ b/drivers/clk/bcm/clk-kona.c
@@ -1032,6 +1032,8 @@ static long kona_peri_clk_round_rate(struct clk_hw *hw, unsigned long rate,
1032} 1032}
1033 1033
1034static long kona_peri_clk_determine_rate(struct clk_hw *hw, unsigned long rate, 1034static long kona_peri_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
1035 unsigned long min_rate,
1036 unsigned long max_rate,
1035 unsigned long *best_parent_rate, struct clk_hw **best_parent) 1037 unsigned long *best_parent_rate, struct clk_hw **best_parent)
1036{ 1038{
1037 struct kona_clk *bcm_clk = to_kona_clk(hw); 1039 struct kona_clk *bcm_clk = to_kona_clk(hw);
diff --git a/drivers/clk/clk-asm9260.c b/drivers/clk/clk-asm9260.c
new file mode 100644
index 000000000000..88f4ff6916fe
--- /dev/null
+++ b/drivers/clk/clk-asm9260.c
@@ -0,0 +1,348 @@
1/*
2 * Copyright (c) 2014 Oleksij Rempel <linux@rempel-privat.de>.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License,
6 * version 2, as published by the Free Software Foundation.
7 *
8 * This program is distributed in the hope it will be useful, but WITHOUT
9 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
10 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
11 * more details.
12 *
13 * You should have received a copy of the GNU General Public License along with
14 * this program. If not, see <http://www.gnu.org/licenses/>.
15 */
16
17#include <linux/clk.h>
18#include <linux/clkdev.h>
19#include <linux/err.h>
20#include <linux/io.h>
21#include <linux/clk-provider.h>
22#include <linux/spinlock.h>
23#include <linux/of.h>
24#include <linux/of_address.h>
25#include <dt-bindings/clock/alphascale,asm9260.h>
26
27#define HW_AHBCLKCTRL0 0x0020
28#define HW_AHBCLKCTRL1 0x0030
29#define HW_SYSPLLCTRL 0x0100
30#define HW_MAINCLKSEL 0x0120
31#define HW_MAINCLKUEN 0x0124
32#define HW_UARTCLKSEL 0x0128
33#define HW_UARTCLKUEN 0x012c
34#define HW_I2S0CLKSEL 0x0130
35#define HW_I2S0CLKUEN 0x0134
36#define HW_I2S1CLKSEL 0x0138
37#define HW_I2S1CLKUEN 0x013c
38#define HW_WDTCLKSEL 0x0160
39#define HW_WDTCLKUEN 0x0164
40#define HW_CLKOUTCLKSEL 0x0170
41#define HW_CLKOUTCLKUEN 0x0174
42#define HW_CPUCLKDIV 0x017c
43#define HW_SYSAHBCLKDIV 0x0180
44#define HW_I2S0MCLKDIV 0x0190
45#define HW_I2S0SCLKDIV 0x0194
46#define HW_I2S1MCLKDIV 0x0188
47#define HW_I2S1SCLKDIV 0x018c
48#define HW_UART0CLKDIV 0x0198
49#define HW_UART1CLKDIV 0x019c
50#define HW_UART2CLKDIV 0x01a0
51#define HW_UART3CLKDIV 0x01a4
52#define HW_UART4CLKDIV 0x01a8
53#define HW_UART5CLKDIV 0x01ac
54#define HW_UART6CLKDIV 0x01b0
55#define HW_UART7CLKDIV 0x01b4
56#define HW_UART8CLKDIV 0x01b8
57#define HW_UART9CLKDIV 0x01bc
58#define HW_SPI0CLKDIV 0x01c0
59#define HW_SPI1CLKDIV 0x01c4
60#define HW_QUADSPICLKDIV 0x01c8
61#define HW_SSP0CLKDIV 0x01d0
62#define HW_NANDCLKDIV 0x01d4
63#define HW_TRACECLKDIV 0x01e0
64#define HW_CAMMCLKDIV 0x01e8
65#define HW_WDTCLKDIV 0x01ec
66#define HW_CLKOUTCLKDIV 0x01f4
67#define HW_MACCLKDIV 0x01f8
68#define HW_LCDCLKDIV 0x01fc
69#define HW_ADCANACLKDIV 0x0200
70
71static struct clk *clks[MAX_CLKS];
72static struct clk_onecell_data clk_data;
73static DEFINE_SPINLOCK(asm9260_clk_lock);
74
75struct asm9260_div_clk {
76 unsigned int idx;
77 const char *name;
78 const char *parent_name;
79 u32 reg;
80};
81
82struct asm9260_gate_data {
83 unsigned int idx;
84 const char *name;
85 const char *parent_name;
86 u32 reg;
87 u8 bit_idx;
88 unsigned long flags;
89};
90
91struct asm9260_mux_clock {
92 u8 mask;
93 u32 *table;
94 const char *name;
95 const char **parent_names;
96 u8 num_parents;
97 unsigned long offset;
98 unsigned long flags;
99};
100
101static void __iomem *base;
102
103static const struct asm9260_div_clk asm9260_div_clks[] __initconst = {
104 { CLKID_SYS_CPU, "cpu_div", "main_gate", HW_CPUCLKDIV },
105 { CLKID_SYS_AHB, "ahb_div", "cpu_div", HW_SYSAHBCLKDIV },
106
107 /* i2s has two deviders: one for only external mclk and internal
108 * devider for all clks. */
109 { CLKID_SYS_I2S0M, "i2s0m_div", "i2s0_mclk", HW_I2S0MCLKDIV },
110 { CLKID_SYS_I2S1M, "i2s1m_div", "i2s1_mclk", HW_I2S1MCLKDIV },
111 { CLKID_SYS_I2S0S, "i2s0s_div", "i2s0_gate", HW_I2S0SCLKDIV },
112 { CLKID_SYS_I2S1S, "i2s1s_div", "i2s0_gate", HW_I2S1SCLKDIV },
113
114 { CLKID_SYS_UART0, "uart0_div", "uart_gate", HW_UART0CLKDIV },
115 { CLKID_SYS_UART1, "uart1_div", "uart_gate", HW_UART1CLKDIV },
116 { CLKID_SYS_UART2, "uart2_div", "uart_gate", HW_UART2CLKDIV },
117 { CLKID_SYS_UART3, "uart3_div", "uart_gate", HW_UART3CLKDIV },
118 { CLKID_SYS_UART4, "uart4_div", "uart_gate", HW_UART4CLKDIV },
119 { CLKID_SYS_UART5, "uart5_div", "uart_gate", HW_UART5CLKDIV },
120 { CLKID_SYS_UART6, "uart6_div", "uart_gate", HW_UART6CLKDIV },
121 { CLKID_SYS_UART7, "uart7_div", "uart_gate", HW_UART7CLKDIV },
122 { CLKID_SYS_UART8, "uart8_div", "uart_gate", HW_UART8CLKDIV },
123 { CLKID_SYS_UART9, "uart9_div", "uart_gate", HW_UART9CLKDIV },
124
125 { CLKID_SYS_SPI0, "spi0_div", "main_gate", HW_SPI0CLKDIV },
126 { CLKID_SYS_SPI1, "spi1_div", "main_gate", HW_SPI1CLKDIV },
127 { CLKID_SYS_QUADSPI, "quadspi_div", "main_gate", HW_QUADSPICLKDIV },
128 { CLKID_SYS_SSP0, "ssp0_div", "main_gate", HW_SSP0CLKDIV },
129 { CLKID_SYS_NAND, "nand_div", "main_gate", HW_NANDCLKDIV },
130 { CLKID_SYS_TRACE, "trace_div", "main_gate", HW_TRACECLKDIV },
131 { CLKID_SYS_CAMM, "camm_div", "main_gate", HW_CAMMCLKDIV },
132 { CLKID_SYS_MAC, "mac_div", "main_gate", HW_MACCLKDIV },
133 { CLKID_SYS_LCD, "lcd_div", "main_gate", HW_LCDCLKDIV },
134 { CLKID_SYS_ADCANA, "adcana_div", "main_gate", HW_ADCANACLKDIV },
135
136 { CLKID_SYS_WDT, "wdt_div", "wdt_gate", HW_WDTCLKDIV },
137 { CLKID_SYS_CLKOUT, "clkout_div", "clkout_gate", HW_CLKOUTCLKDIV },
138};
139
140static const struct asm9260_gate_data asm9260_mux_gates[] __initconst = {
141 { 0, "main_gate", "main_mux", HW_MAINCLKUEN, 0 },
142 { 0, "uart_gate", "uart_mux", HW_UARTCLKUEN, 0 },
143 { 0, "i2s0_gate", "i2s0_mux", HW_I2S0CLKUEN, 0 },
144 { 0, "i2s1_gate", "i2s1_mux", HW_I2S1CLKUEN, 0 },
145 { 0, "wdt_gate", "wdt_mux", HW_WDTCLKUEN, 0 },
146 { 0, "clkout_gate", "clkout_mux", HW_CLKOUTCLKUEN, 0 },
147};
148static const struct asm9260_gate_data asm9260_ahb_gates[] __initconst = {
149 /* ahb gates */
150 { CLKID_AHB_ROM, "rom", "ahb_div",
151 HW_AHBCLKCTRL0, 1, CLK_IGNORE_UNUSED},
152 { CLKID_AHB_RAM, "ram", "ahb_div",
153 HW_AHBCLKCTRL0, 2, CLK_IGNORE_UNUSED},
154 { CLKID_AHB_GPIO, "gpio", "ahb_div",
155 HW_AHBCLKCTRL0, 4 },
156 { CLKID_AHB_MAC, "mac", "ahb_div",
157 HW_AHBCLKCTRL0, 5 },
158 { CLKID_AHB_EMI, "emi", "ahb_div",
159 HW_AHBCLKCTRL0, 6, CLK_IGNORE_UNUSED},
160 { CLKID_AHB_USB0, "usb0", "ahb_div",
161 HW_AHBCLKCTRL0, 7 },
162 { CLKID_AHB_USB1, "usb1", "ahb_div",
163 HW_AHBCLKCTRL0, 8 },
164 { CLKID_AHB_DMA0, "dma0", "ahb_div",
165 HW_AHBCLKCTRL0, 9 },
166 { CLKID_AHB_DMA1, "dma1", "ahb_div",
167 HW_AHBCLKCTRL0, 10 },
168 { CLKID_AHB_UART0, "uart0", "ahb_div",
169 HW_AHBCLKCTRL0, 11 },
170 { CLKID_AHB_UART1, "uart1", "ahb_div",
171 HW_AHBCLKCTRL0, 12 },
172 { CLKID_AHB_UART2, "uart2", "ahb_div",
173 HW_AHBCLKCTRL0, 13 },
174 { CLKID_AHB_UART3, "uart3", "ahb_div",
175 HW_AHBCLKCTRL0, 14 },
176 { CLKID_AHB_UART4, "uart4", "ahb_div",
177 HW_AHBCLKCTRL0, 15 },
178 { CLKID_AHB_UART5, "uart5", "ahb_div",
179 HW_AHBCLKCTRL0, 16 },
180 { CLKID_AHB_UART6, "uart6", "ahb_div",
181 HW_AHBCLKCTRL0, 17 },
182 { CLKID_AHB_UART7, "uart7", "ahb_div",
183 HW_AHBCLKCTRL0, 18 },
184 { CLKID_AHB_UART8, "uart8", "ahb_div",
185 HW_AHBCLKCTRL0, 19 },
186 { CLKID_AHB_UART9, "uart9", "ahb_div",
187 HW_AHBCLKCTRL0, 20 },
188 { CLKID_AHB_I2S0, "i2s0", "ahb_div",
189 HW_AHBCLKCTRL0, 21 },
190 { CLKID_AHB_I2C0, "i2c0", "ahb_div",
191 HW_AHBCLKCTRL0, 22 },
192 { CLKID_AHB_I2C1, "i2c1", "ahb_div",
193 HW_AHBCLKCTRL0, 23 },
194 { CLKID_AHB_SSP0, "ssp0", "ahb_div",
195 HW_AHBCLKCTRL0, 24 },
196 { CLKID_AHB_IOCONFIG, "ioconf", "ahb_div",
197 HW_AHBCLKCTRL0, 25 },
198 { CLKID_AHB_WDT, "wdt", "ahb_div",
199 HW_AHBCLKCTRL0, 26 },
200 { CLKID_AHB_CAN0, "can0", "ahb_div",
201 HW_AHBCLKCTRL0, 27 },
202 { CLKID_AHB_CAN1, "can1", "ahb_div",
203 HW_AHBCLKCTRL0, 28 },
204 { CLKID_AHB_MPWM, "mpwm", "ahb_div",
205 HW_AHBCLKCTRL0, 29 },
206 { CLKID_AHB_SPI0, "spi0", "ahb_div",
207 HW_AHBCLKCTRL0, 30 },
208 { CLKID_AHB_SPI1, "spi1", "ahb_div",
209 HW_AHBCLKCTRL0, 31 },
210
211 { CLKID_AHB_QEI, "qei", "ahb_div",
212 HW_AHBCLKCTRL1, 0 },
213 { CLKID_AHB_QUADSPI0, "quadspi0", "ahb_div",
214 HW_AHBCLKCTRL1, 1 },
215 { CLKID_AHB_CAMIF, "capmif", "ahb_div",
216 HW_AHBCLKCTRL1, 2 },
217 { CLKID_AHB_LCDIF, "lcdif", "ahb_div",
218 HW_AHBCLKCTRL1, 3 },
219 { CLKID_AHB_TIMER0, "timer0", "ahb_div",
220 HW_AHBCLKCTRL1, 4 },
221 { CLKID_AHB_TIMER1, "timer1", "ahb_div",
222 HW_AHBCLKCTRL1, 5 },
223 { CLKID_AHB_TIMER2, "timer2", "ahb_div",
224 HW_AHBCLKCTRL1, 6 },
225 { CLKID_AHB_TIMER3, "timer3", "ahb_div",
226 HW_AHBCLKCTRL1, 7 },
227 { CLKID_AHB_IRQ, "irq", "ahb_div",
228 HW_AHBCLKCTRL1, 8, CLK_IGNORE_UNUSED},
229 { CLKID_AHB_RTC, "rtc", "ahb_div",
230 HW_AHBCLKCTRL1, 9 },
231 { CLKID_AHB_NAND, "nand", "ahb_div",
232 HW_AHBCLKCTRL1, 10 },
233 { CLKID_AHB_ADC0, "adc0", "ahb_div",
234 HW_AHBCLKCTRL1, 11 },
235 { CLKID_AHB_LED, "led", "ahb_div",
236 HW_AHBCLKCTRL1, 12 },
237 { CLKID_AHB_DAC0, "dac0", "ahb_div",
238 HW_AHBCLKCTRL1, 13 },
239 { CLKID_AHB_LCD, "lcd", "ahb_div",
240 HW_AHBCLKCTRL1, 14 },
241 { CLKID_AHB_I2S1, "i2s1", "ahb_div",
242 HW_AHBCLKCTRL1, 15 },
243 { CLKID_AHB_MAC1, "mac1", "ahb_div",
244 HW_AHBCLKCTRL1, 16 },
245};
246
247static const char __initdata *main_mux_p[] = { NULL, NULL };
248static const char __initdata *i2s0_mux_p[] = { NULL, NULL, "i2s0m_div"};
249static const char __initdata *i2s1_mux_p[] = { NULL, NULL, "i2s1m_div"};
250static const char __initdata *clkout_mux_p[] = { NULL, NULL, "rtc"};
251static u32 three_mux_table[] = {0, 1, 3};
252
253static struct asm9260_mux_clock asm9260_mux_clks[] __initdata = {
254 { 1, three_mux_table, "main_mux", main_mux_p,
255 ARRAY_SIZE(main_mux_p), HW_MAINCLKSEL, },
256 { 1, three_mux_table, "uart_mux", main_mux_p,
257 ARRAY_SIZE(main_mux_p), HW_UARTCLKSEL, },
258 { 1, three_mux_table, "wdt_mux", main_mux_p,
259 ARRAY_SIZE(main_mux_p), HW_WDTCLKSEL, },
260 { 3, three_mux_table, "i2s0_mux", i2s0_mux_p,
261 ARRAY_SIZE(i2s0_mux_p), HW_I2S0CLKSEL, },
262 { 3, three_mux_table, "i2s1_mux", i2s1_mux_p,
263 ARRAY_SIZE(i2s1_mux_p), HW_I2S1CLKSEL, },
264 { 3, three_mux_table, "clkout_mux", clkout_mux_p,
265 ARRAY_SIZE(clkout_mux_p), HW_CLKOUTCLKSEL, },
266};
267
268static void __init asm9260_acc_init(struct device_node *np)
269{
270 struct clk *clk;
271 const char *ref_clk, *pll_clk = "pll";
272 u32 rate;
273 int n;
274 u32 accuracy = 0;
275
276 base = of_io_request_and_map(np, 0, np->name);
277 if (!base)
278 panic("%s: unable to map resource", np->name);
279
280 /* register pll */
281 rate = (ioread32(base + HW_SYSPLLCTRL) & 0xffff) * 1000000;
282
283 ref_clk = of_clk_get_parent_name(np, 0);
284 accuracy = clk_get_accuracy(__clk_lookup(ref_clk));
285 clk = clk_register_fixed_rate_with_accuracy(NULL, pll_clk,
286 ref_clk, 0, rate, accuracy);
287
288 if (IS_ERR(clk))
289 panic("%s: can't register REFCLK. Check DT!", np->name);
290
291 for (n = 0; n < ARRAY_SIZE(asm9260_mux_clks); n++) {
292 const struct asm9260_mux_clock *mc = &asm9260_mux_clks[n];
293
294 mc->parent_names[0] = ref_clk;
295 mc->parent_names[1] = pll_clk;
296 clk = clk_register_mux_table(NULL, mc->name, mc->parent_names,
297 mc->num_parents, mc->flags, base + mc->offset,
298 0, mc->mask, 0, mc->table, &asm9260_clk_lock);
299 }
300
301 /* clock mux gate cells */
302 for (n = 0; n < ARRAY_SIZE(asm9260_mux_gates); n++) {
303 const struct asm9260_gate_data *gd = &asm9260_mux_gates[n];
304
305 clk = clk_register_gate(NULL, gd->name,
306 gd->parent_name, gd->flags | CLK_SET_RATE_PARENT,
307 base + gd->reg, gd->bit_idx, 0, &asm9260_clk_lock);
308 }
309
310 /* clock div cells */
311 for (n = 0; n < ARRAY_SIZE(asm9260_div_clks); n++) {
312 const struct asm9260_div_clk *dc = &asm9260_div_clks[n];
313
314 clks[dc->idx] = clk_register_divider(NULL, dc->name,
315 dc->parent_name, CLK_SET_RATE_PARENT,
316 base + dc->reg, 0, 8, CLK_DIVIDER_ONE_BASED,
317 &asm9260_clk_lock);
318 }
319
320 /* clock ahb gate cells */
321 for (n = 0; n < ARRAY_SIZE(asm9260_ahb_gates); n++) {
322 const struct asm9260_gate_data *gd = &asm9260_ahb_gates[n];
323
324 clks[gd->idx] = clk_register_gate(NULL, gd->name,
325 gd->parent_name, gd->flags, base + gd->reg,
326 gd->bit_idx, 0, &asm9260_clk_lock);
327 }
328
329 /* check for errors on leaf clocks */
330 for (n = 0; n < MAX_CLKS; n++) {
331 if (!IS_ERR(clks[n]))
332 continue;
333
334 pr_err("%s: Unable to register leaf clock %d\n",
335 np->full_name, n);
336 goto fail;
337 }
338
339 /* register clk-provider */
340 clk_data.clks = clks;
341 clk_data.clk_num = MAX_CLKS;
342 of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
343 return;
344fail:
345 iounmap(base);
346}
347CLK_OF_DECLARE(asm9260_acc, "alphascale,asm9260-clock-controller",
348 asm9260_acc_init);
diff --git a/drivers/clk/clk-cdce706.c b/drivers/clk/clk-cdce706.c
new file mode 100644
index 000000000000..c386ad25beb4
--- /dev/null
+++ b/drivers/clk/clk-cdce706.c
@@ -0,0 +1,700 @@
1/*
2 * TI CDCE706 programmable 3-PLL clock synthesizer driver
3 *
4 * Copyright (c) 2014 Cadence Design Systems Inc.
5 *
6 * Reference: http://www.ti.com/lit/ds/symlink/cdce706.pdf
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 */
12
13#include <linux/clk-provider.h>
14#include <linux/delay.h>
15#include <linux/i2c.h>
16#include <linux/interrupt.h>
17#include <linux/mod_devicetable.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/rational.h>
21#include <linux/regmap.h>
22#include <linux/slab.h>
23
24#define CDCE706_CLKIN_CLOCK 10
25#define CDCE706_CLKIN_SOURCE 11
26#define CDCE706_PLL_M_LOW(pll) (1 + 3 * (pll))
27#define CDCE706_PLL_N_LOW(pll) (2 + 3 * (pll))
28#define CDCE706_PLL_HI(pll) (3 + 3 * (pll))
29#define CDCE706_PLL_MUX 3
30#define CDCE706_PLL_FVCO 6
31#define CDCE706_DIVIDER(div) (13 + (div))
32#define CDCE706_CLKOUT(out) (19 + (out))
33
34#define CDCE706_CLKIN_CLOCK_MASK 0x10
35#define CDCE706_CLKIN_SOURCE_SHIFT 6
36#define CDCE706_CLKIN_SOURCE_MASK 0xc0
37#define CDCE706_CLKIN_SOURCE_LVCMOS 0x40
38
39#define CDCE706_PLL_MUX_MASK(pll) (0x80 >> (pll))
40#define CDCE706_PLL_LOW_M_MASK 0xff
41#define CDCE706_PLL_LOW_N_MASK 0xff
42#define CDCE706_PLL_HI_M_MASK 0x1
43#define CDCE706_PLL_HI_N_MASK 0x1e
44#define CDCE706_PLL_HI_N_SHIFT 1
45#define CDCE706_PLL_M_MAX 0x1ff
46#define CDCE706_PLL_N_MAX 0xfff
47#define CDCE706_PLL_FVCO_MASK(pll) (0x80 >> (pll))
48#define CDCE706_PLL_FREQ_MIN 80000000
49#define CDCE706_PLL_FREQ_MAX 300000000
50#define CDCE706_PLL_FREQ_HI 180000000
51
52#define CDCE706_DIVIDER_PLL(div) (9 + (div) - ((div) > 2) - ((div) > 4))
53#define CDCE706_DIVIDER_PLL_SHIFT(div) ((div) < 2 ? 5 : 3 * ((div) & 1))
54#define CDCE706_DIVIDER_PLL_MASK(div) (0x7 << CDCE706_DIVIDER_PLL_SHIFT(div))
55#define CDCE706_DIVIDER_DIVIDER_MASK 0x7f
56#define CDCE706_DIVIDER_DIVIDER_MAX 0x7f
57
58#define CDCE706_CLKOUT_DIVIDER_MASK 0x7
59#define CDCE706_CLKOUT_ENABLE_MASK 0x8
60
61static struct regmap_config cdce706_regmap_config = {
62 .reg_bits = 8,
63 .val_bits = 8,
64 .val_format_endian = REGMAP_ENDIAN_NATIVE,
65};
66
67#define to_hw_data(phw) (container_of((phw), struct cdce706_hw_data, hw))
68
69struct cdce706_hw_data {
70 struct cdce706_dev_data *dev_data;
71 unsigned idx;
72 unsigned parent;
73 struct clk *clk;
74 struct clk_hw hw;
75 unsigned div;
76 unsigned mul;
77 unsigned mux;
78};
79
80struct cdce706_dev_data {
81 struct i2c_client *client;
82 struct regmap *regmap;
83 struct clk_onecell_data onecell;
84 struct clk *clks[6];
85 struct clk *clkin_clk[2];
86 const char *clkin_name[2];
87 struct cdce706_hw_data clkin[1];
88 struct cdce706_hw_data pll[3];
89 struct cdce706_hw_data divider[6];
90 struct cdce706_hw_data clkout[6];
91};
92
93static const char * const cdce706_source_name[] = {
94 "clk_in0", "clk_in1",
95};
96
97static const char *cdce706_clkin_name[] = {
98 "clk_in",
99};
100
101static const char * const cdce706_pll_name[] = {
102 "pll1", "pll2", "pll3",
103};
104
105static const char *cdce706_divider_parent_name[] = {
106 "clk_in", "pll1", "pll2", "pll2", "pll3",
107};
108
109static const char *cdce706_divider_name[] = {
110 "p0", "p1", "p2", "p3", "p4", "p5",
111};
112
113static const char * const cdce706_clkout_name[] = {
114 "clk_out0", "clk_out1", "clk_out2", "clk_out3", "clk_out4", "clk_out5",
115};
116
117static int cdce706_reg_read(struct cdce706_dev_data *dev_data, unsigned reg,
118 unsigned *val)
119{
120 int rc = regmap_read(dev_data->regmap, reg | 0x80, val);
121
122 if (rc < 0)
123 dev_err(&dev_data->client->dev, "error reading reg %u", reg);
124 return rc;
125}
126
127static int cdce706_reg_write(struct cdce706_dev_data *dev_data, unsigned reg,
128 unsigned val)
129{
130 int rc = regmap_write(dev_data->regmap, reg | 0x80, val);
131
132 if (rc < 0)
133 dev_err(&dev_data->client->dev, "error writing reg %u", reg);
134 return rc;
135}
136
137static int cdce706_reg_update(struct cdce706_dev_data *dev_data, unsigned reg,
138 unsigned mask, unsigned val)
139{
140 int rc = regmap_update_bits(dev_data->regmap, reg | 0x80, mask, val);
141
142 if (rc < 0)
143 dev_err(&dev_data->client->dev, "error updating reg %u", reg);
144 return rc;
145}
146
147static int cdce706_clkin_set_parent(struct clk_hw *hw, u8 index)
148{
149 struct cdce706_hw_data *hwd = to_hw_data(hw);
150
151 hwd->parent = index;
152 return 0;
153}
154
155static u8 cdce706_clkin_get_parent(struct clk_hw *hw)
156{
157 struct cdce706_hw_data *hwd = to_hw_data(hw);
158
159 return hwd->parent;
160}
161
162static const struct clk_ops cdce706_clkin_ops = {
163 .set_parent = cdce706_clkin_set_parent,
164 .get_parent = cdce706_clkin_get_parent,
165};
166
167static unsigned long cdce706_pll_recalc_rate(struct clk_hw *hw,
168 unsigned long parent_rate)
169{
170 struct cdce706_hw_data *hwd = to_hw_data(hw);
171
172 dev_dbg(&hwd->dev_data->client->dev,
173 "%s, pll: %d, mux: %d, mul: %u, div: %u\n",
174 __func__, hwd->idx, hwd->mux, hwd->mul, hwd->div);
175
176 if (!hwd->mux) {
177 if (hwd->div && hwd->mul) {
178 u64 res = (u64)parent_rate * hwd->mul;
179
180 do_div(res, hwd->div);
181 return res;
182 }
183 } else {
184 if (hwd->div)
185 return parent_rate / hwd->div;
186 }
187 return 0;
188}
189
190static long cdce706_pll_round_rate(struct clk_hw *hw, unsigned long rate,
191 unsigned long *parent_rate)
192{
193 struct cdce706_hw_data *hwd = to_hw_data(hw);
194 unsigned long mul, div;
195 u64 res;
196
197 dev_dbg(&hwd->dev_data->client->dev,
198 "%s, rate: %lu, parent_rate: %lu\n",
199 __func__, rate, *parent_rate);
200
201 rational_best_approximation(rate, *parent_rate,
202 CDCE706_PLL_N_MAX, CDCE706_PLL_M_MAX,
203 &mul, &div);
204 hwd->mul = mul;
205 hwd->div = div;
206
207 dev_dbg(&hwd->dev_data->client->dev,
208 "%s, pll: %d, mul: %lu, div: %lu\n",
209 __func__, hwd->idx, mul, div);
210
211 res = (u64)*parent_rate * hwd->mul;
212 do_div(res, hwd->div);
213 return res;
214}
215
216static int cdce706_pll_set_rate(struct clk_hw *hw, unsigned long rate,
217 unsigned long parent_rate)
218{
219 struct cdce706_hw_data *hwd = to_hw_data(hw);
220 unsigned long mul = hwd->mul, div = hwd->div;
221 int err;
222
223 dev_dbg(&hwd->dev_data->client->dev,
224 "%s, pll: %d, mul: %lu, div: %lu\n",
225 __func__, hwd->idx, mul, div);
226
227 err = cdce706_reg_update(hwd->dev_data,
228 CDCE706_PLL_HI(hwd->idx),
229 CDCE706_PLL_HI_M_MASK | CDCE706_PLL_HI_N_MASK,
230 ((div >> 8) & CDCE706_PLL_HI_M_MASK) |
231 ((mul >> (8 - CDCE706_PLL_HI_N_SHIFT)) &
232 CDCE706_PLL_HI_N_MASK));
233 if (err < 0)
234 return err;
235
236 err = cdce706_reg_write(hwd->dev_data,
237 CDCE706_PLL_M_LOW(hwd->idx),
238 div & CDCE706_PLL_LOW_M_MASK);
239 if (err < 0)
240 return err;
241
242 err = cdce706_reg_write(hwd->dev_data,
243 CDCE706_PLL_N_LOW(hwd->idx),
244 mul & CDCE706_PLL_LOW_N_MASK);
245 if (err < 0)
246 return err;
247
248 err = cdce706_reg_update(hwd->dev_data,
249 CDCE706_PLL_FVCO,
250 CDCE706_PLL_FVCO_MASK(hwd->idx),
251 rate > CDCE706_PLL_FREQ_HI ?
252 CDCE706_PLL_FVCO_MASK(hwd->idx) : 0);
253 return err;
254}
255
256static const struct clk_ops cdce706_pll_ops = {
257 .recalc_rate = cdce706_pll_recalc_rate,
258 .round_rate = cdce706_pll_round_rate,
259 .set_rate = cdce706_pll_set_rate,
260};
261
262static int cdce706_divider_set_parent(struct clk_hw *hw, u8 index)
263{
264 struct cdce706_hw_data *hwd = to_hw_data(hw);
265
266 if (hwd->parent == index)
267 return 0;
268 hwd->parent = index;
269 return cdce706_reg_update(hwd->dev_data,
270 CDCE706_DIVIDER_PLL(hwd->idx),
271 CDCE706_DIVIDER_PLL_MASK(hwd->idx),
272 index << CDCE706_DIVIDER_PLL_SHIFT(hwd->idx));
273}
274
275static u8 cdce706_divider_get_parent(struct clk_hw *hw)
276{
277 struct cdce706_hw_data *hwd = to_hw_data(hw);
278
279 return hwd->parent;
280}
281
282static unsigned long cdce706_divider_recalc_rate(struct clk_hw *hw,
283 unsigned long parent_rate)
284{
285 struct cdce706_hw_data *hwd = to_hw_data(hw);
286
287 dev_dbg(&hwd->dev_data->client->dev,
288 "%s, divider: %d, div: %u\n",
289 __func__, hwd->idx, hwd->div);
290 if (hwd->div)
291 return parent_rate / hwd->div;
292 return 0;
293}
294
295static long cdce706_divider_round_rate(struct clk_hw *hw, unsigned long rate,
296 unsigned long *parent_rate)
297{
298 struct cdce706_hw_data *hwd = to_hw_data(hw);
299 struct cdce706_dev_data *cdce = hwd->dev_data;
300 unsigned long mul, div;
301
302 dev_dbg(&hwd->dev_data->client->dev,
303 "%s, rate: %lu, parent_rate: %lu\n",
304 __func__, rate, *parent_rate);
305
306 rational_best_approximation(rate, *parent_rate,
307 1, CDCE706_DIVIDER_DIVIDER_MAX,
308 &mul, &div);
309 if (!mul)
310 div = CDCE706_DIVIDER_DIVIDER_MAX;
311
312 if (__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT) {
313 unsigned long best_diff = rate;
314 unsigned long best_div = 0;
315 struct clk *gp_clk = cdce->clkin_clk[cdce->clkin[0].parent];
316 unsigned long gp_rate = gp_clk ? clk_get_rate(gp_clk) : 0;
317
318 for (div = CDCE706_PLL_FREQ_MIN / rate; best_diff &&
319 div <= CDCE706_PLL_FREQ_MAX / rate; ++div) {
320 unsigned long n, m;
321 unsigned long diff;
322 unsigned long div_rate;
323 u64 div_rate64;
324
325 if (rate * div < CDCE706_PLL_FREQ_MIN)
326 continue;
327
328 rational_best_approximation(rate * div, gp_rate,
329 CDCE706_PLL_N_MAX,
330 CDCE706_PLL_M_MAX,
331 &n, &m);
332 div_rate64 = (u64)gp_rate * n;
333 do_div(div_rate64, m);
334 do_div(div_rate64, div);
335 div_rate = div_rate64;
336 diff = max(div_rate, rate) - min(div_rate, rate);
337
338 if (diff < best_diff) {
339 best_diff = diff;
340 best_div = div;
341 dev_dbg(&hwd->dev_data->client->dev,
342 "%s, %lu * %lu / %lu / %lu = %lu\n",
343 __func__, gp_rate, n, m, div, div_rate);
344 }
345 }
346
347 div = best_div;
348
349 dev_dbg(&hwd->dev_data->client->dev,
350 "%s, altering parent rate: %lu -> %lu\n",
351 __func__, *parent_rate, rate * div);
352 *parent_rate = rate * div;
353 }
354 hwd->div = div;
355
356 dev_dbg(&hwd->dev_data->client->dev,
357 "%s, divider: %d, div: %lu\n",
358 __func__, hwd->idx, div);
359
360 return *parent_rate / div;
361}
362
363static int cdce706_divider_set_rate(struct clk_hw *hw, unsigned long rate,
364 unsigned long parent_rate)
365{
366 struct cdce706_hw_data *hwd = to_hw_data(hw);
367
368 dev_dbg(&hwd->dev_data->client->dev,
369 "%s, divider: %d, div: %u\n",
370 __func__, hwd->idx, hwd->div);
371
372 return cdce706_reg_update(hwd->dev_data,
373 CDCE706_DIVIDER(hwd->idx),
374 CDCE706_DIVIDER_DIVIDER_MASK,
375 hwd->div);
376}
377
378static const struct clk_ops cdce706_divider_ops = {
379 .set_parent = cdce706_divider_set_parent,
380 .get_parent = cdce706_divider_get_parent,
381 .recalc_rate = cdce706_divider_recalc_rate,
382 .round_rate = cdce706_divider_round_rate,
383 .set_rate = cdce706_divider_set_rate,
384};
385
386static int cdce706_clkout_prepare(struct clk_hw *hw)
387{
388 struct cdce706_hw_data *hwd = to_hw_data(hw);
389
390 return cdce706_reg_update(hwd->dev_data, CDCE706_CLKOUT(hwd->idx),
391 CDCE706_CLKOUT_ENABLE_MASK,
392 CDCE706_CLKOUT_ENABLE_MASK);
393}
394
395static void cdce706_clkout_unprepare(struct clk_hw *hw)
396{
397 struct cdce706_hw_data *hwd = to_hw_data(hw);
398
399 cdce706_reg_update(hwd->dev_data, CDCE706_CLKOUT(hwd->idx),
400 CDCE706_CLKOUT_ENABLE_MASK, 0);
401}
402
403static int cdce706_clkout_set_parent(struct clk_hw *hw, u8 index)
404{
405 struct cdce706_hw_data *hwd = to_hw_data(hw);
406
407 if (hwd->parent == index)
408 return 0;
409 hwd->parent = index;
410 return cdce706_reg_update(hwd->dev_data,
411 CDCE706_CLKOUT(hwd->idx),
412 CDCE706_CLKOUT_ENABLE_MASK, index);
413}
414
415static u8 cdce706_clkout_get_parent(struct clk_hw *hw)
416{
417 struct cdce706_hw_data *hwd = to_hw_data(hw);
418
419 return hwd->parent;
420}
421
422static unsigned long cdce706_clkout_recalc_rate(struct clk_hw *hw,
423 unsigned long parent_rate)
424{
425 return parent_rate;
426}
427
428static long cdce706_clkout_round_rate(struct clk_hw *hw, unsigned long rate,
429 unsigned long *parent_rate)
430{
431 *parent_rate = rate;
432 return rate;
433}
434
435static int cdce706_clkout_set_rate(struct clk_hw *hw, unsigned long rate,
436 unsigned long parent_rate)
437{
438 return 0;
439}
440
441static const struct clk_ops cdce706_clkout_ops = {
442 .prepare = cdce706_clkout_prepare,
443 .unprepare = cdce706_clkout_unprepare,
444 .set_parent = cdce706_clkout_set_parent,
445 .get_parent = cdce706_clkout_get_parent,
446 .recalc_rate = cdce706_clkout_recalc_rate,
447 .round_rate = cdce706_clkout_round_rate,
448 .set_rate = cdce706_clkout_set_rate,
449};
450
451static int cdce706_register_hw(struct cdce706_dev_data *cdce,
452 struct cdce706_hw_data *hw, unsigned num_hw,
453 const char * const *clk_names,
454 struct clk_init_data *init)
455{
456 unsigned i;
457
458 for (i = 0; i < num_hw; ++i, ++hw) {
459 init->name = clk_names[i];
460 hw->dev_data = cdce;
461 hw->idx = i;
462 hw->hw.init = init;
463 hw->clk = devm_clk_register(&cdce->client->dev,
464 &hw->hw);
465 if (IS_ERR(hw->clk)) {
466 dev_err(&cdce->client->dev, "Failed to register %s\n",
467 clk_names[i]);
468 return PTR_ERR(hw->clk);
469 }
470 }
471 return 0;
472}
473
474static int cdce706_register_clkin(struct cdce706_dev_data *cdce)
475{
476 struct clk_init_data init = {
477 .ops = &cdce706_clkin_ops,
478 .parent_names = cdce->clkin_name,
479 .num_parents = ARRAY_SIZE(cdce->clkin_name),
480 };
481 unsigned i;
482 int ret;
483 unsigned clock, source;
484
485 for (i = 0; i < ARRAY_SIZE(cdce->clkin_name); ++i) {
486 struct clk *parent = devm_clk_get(&cdce->client->dev,
487 cdce706_source_name[i]);
488
489 if (IS_ERR(parent)) {
490 cdce->clkin_name[i] = cdce706_source_name[i];
491 } else {
492 cdce->clkin_name[i] = __clk_get_name(parent);
493 cdce->clkin_clk[i] = parent;
494 }
495 }
496
497 ret = cdce706_reg_read(cdce, CDCE706_CLKIN_SOURCE, &source);
498 if (ret < 0)
499 return ret;
500 if ((source & CDCE706_CLKIN_SOURCE_MASK) ==
501 CDCE706_CLKIN_SOURCE_LVCMOS) {
502 ret = cdce706_reg_read(cdce, CDCE706_CLKIN_CLOCK, &clock);
503 if (ret < 0)
504 return ret;
505 cdce->clkin[0].parent = !!(clock & CDCE706_CLKIN_CLOCK_MASK);
506 }
507
508 ret = cdce706_register_hw(cdce, cdce->clkin,
509 ARRAY_SIZE(cdce->clkin),
510 cdce706_clkin_name, &init);
511 return ret;
512}
513
514static int cdce706_register_plls(struct cdce706_dev_data *cdce)
515{
516 struct clk_init_data init = {
517 .ops = &cdce706_pll_ops,
518 .parent_names = cdce706_clkin_name,
519 .num_parents = ARRAY_SIZE(cdce706_clkin_name),
520 };
521 unsigned i;
522 int ret;
523 unsigned mux;
524
525 ret = cdce706_reg_read(cdce, CDCE706_PLL_MUX, &mux);
526 if (ret < 0)
527 return ret;
528
529 for (i = 0; i < ARRAY_SIZE(cdce->pll); ++i) {
530 unsigned m, n, v;
531
532 ret = cdce706_reg_read(cdce, CDCE706_PLL_M_LOW(i), &m);
533 if (ret < 0)
534 return ret;
535 ret = cdce706_reg_read(cdce, CDCE706_PLL_N_LOW(i), &n);
536 if (ret < 0)
537 return ret;
538 ret = cdce706_reg_read(cdce, CDCE706_PLL_HI(i), &v);
539 if (ret < 0)
540 return ret;
541 cdce->pll[i].div = m | ((v & CDCE706_PLL_HI_M_MASK) << 8);
542 cdce->pll[i].mul = n | ((v & CDCE706_PLL_HI_N_MASK) <<
543 (8 - CDCE706_PLL_HI_N_SHIFT));
544 cdce->pll[i].mux = mux & CDCE706_PLL_MUX_MASK(i);
545 dev_dbg(&cdce->client->dev,
546 "%s: i: %u, div: %u, mul: %u, mux: %d\n", __func__, i,
547 cdce->pll[i].div, cdce->pll[i].mul, cdce->pll[i].mux);
548 }
549
550 ret = cdce706_register_hw(cdce, cdce->pll,
551 ARRAY_SIZE(cdce->pll),
552 cdce706_pll_name, &init);
553 return ret;
554}
555
556static int cdce706_register_dividers(struct cdce706_dev_data *cdce)
557{
558 struct clk_init_data init = {
559 .ops = &cdce706_divider_ops,
560 .parent_names = cdce706_divider_parent_name,
561 .num_parents = ARRAY_SIZE(cdce706_divider_parent_name),
562 .flags = CLK_SET_RATE_PARENT,
563 };
564 unsigned i;
565 int ret;
566
567 for (i = 0; i < ARRAY_SIZE(cdce->divider); ++i) {
568 unsigned val;
569
570 ret = cdce706_reg_read(cdce, CDCE706_DIVIDER_PLL(i), &val);
571 if (ret < 0)
572 return ret;
573 cdce->divider[i].parent =
574 (val & CDCE706_DIVIDER_PLL_MASK(i)) >>
575 CDCE706_DIVIDER_PLL_SHIFT(i);
576
577 ret = cdce706_reg_read(cdce, CDCE706_DIVIDER(i), &val);
578 if (ret < 0)
579 return ret;
580 cdce->divider[i].div = val & CDCE706_DIVIDER_DIVIDER_MASK;
581 dev_dbg(&cdce->client->dev,
582 "%s: i: %u, parent: %u, div: %u\n", __func__, i,
583 cdce->divider[i].parent, cdce->divider[i].div);
584 }
585
586 ret = cdce706_register_hw(cdce, cdce->divider,
587 ARRAY_SIZE(cdce->divider),
588 cdce706_divider_name, &init);
589 return ret;
590}
591
592static int cdce706_register_clkouts(struct cdce706_dev_data *cdce)
593{
594 struct clk_init_data init = {
595 .ops = &cdce706_clkout_ops,
596 .parent_names = cdce706_divider_name,
597 .num_parents = ARRAY_SIZE(cdce706_divider_name),
598 .flags = CLK_SET_RATE_PARENT,
599 };
600 unsigned i;
601 int ret;
602
603 for (i = 0; i < ARRAY_SIZE(cdce->clkout); ++i) {
604 unsigned val;
605
606 ret = cdce706_reg_read(cdce, CDCE706_CLKOUT(i), &val);
607 if (ret < 0)
608 return ret;
609 cdce->clkout[i].parent = val & CDCE706_CLKOUT_DIVIDER_MASK;
610 dev_dbg(&cdce->client->dev,
611 "%s: i: %u, parent: %u\n", __func__, i,
612 cdce->clkout[i].parent);
613 }
614
615 ret = cdce706_register_hw(cdce, cdce->clkout,
616 ARRAY_SIZE(cdce->clkout),
617 cdce706_clkout_name, &init);
618 for (i = 0; i < ARRAY_SIZE(cdce->clkout); ++i)
619 cdce->clks[i] = cdce->clkout[i].clk;
620
621 return ret;
622}
623
624static int cdce706_probe(struct i2c_client *client,
625 const struct i2c_device_id *id)
626{
627 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
628 struct cdce706_dev_data *cdce;
629 int ret;
630
631 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA))
632 return -EIO;
633
634 cdce = devm_kzalloc(&client->dev, sizeof(*cdce), GFP_KERNEL);
635 if (!cdce)
636 return -ENOMEM;
637
638 cdce->client = client;
639 cdce->regmap = devm_regmap_init_i2c(client, &cdce706_regmap_config);
640 if (IS_ERR(cdce->regmap)) {
641 dev_err(&client->dev, "Failed to initialize regmap\n");
642 return -EINVAL;
643 }
644
645 i2c_set_clientdata(client, cdce);
646
647 ret = cdce706_register_clkin(cdce);
648 if (ret < 0)
649 return ret;
650 ret = cdce706_register_plls(cdce);
651 if (ret < 0)
652 return ret;
653 ret = cdce706_register_dividers(cdce);
654 if (ret < 0)
655 return ret;
656 ret = cdce706_register_clkouts(cdce);
657 if (ret < 0)
658 return ret;
659 cdce->onecell.clks = cdce->clks;
660 cdce->onecell.clk_num = ARRAY_SIZE(cdce->clks);
661 ret = of_clk_add_provider(client->dev.of_node, of_clk_src_onecell_get,
662 &cdce->onecell);
663
664 return ret;
665}
666
667static int cdce706_remove(struct i2c_client *client)
668{
669 return 0;
670}
671
672
673#ifdef CONFIG_OF
674static const struct of_device_id cdce706_dt_match[] = {
675 { .compatible = "ti,cdce706" },
676 { },
677};
678MODULE_DEVICE_TABLE(of, cdce706_dt_match);
679#endif
680
681static const struct i2c_device_id cdce706_id[] = {
682 { "cdce706", 0 },
683 { }
684};
685MODULE_DEVICE_TABLE(i2c, cdce706_id);
686
687static struct i2c_driver cdce706_i2c_driver = {
688 .driver = {
689 .name = "cdce706",
690 .of_match_table = of_match_ptr(cdce706_dt_match),
691 },
692 .probe = cdce706_probe,
693 .remove = cdce706_remove,
694 .id_table = cdce706_id,
695};
696module_i2c_driver(cdce706_i2c_driver);
697
698MODULE_AUTHOR("Max Filippov <jcmvbkbc@gmail.com>");
699MODULE_DESCRIPTION("TI CDCE 706 clock synthesizer driver");
700MODULE_LICENSE("GPL");
diff --git a/drivers/clk/clk-composite.c b/drivers/clk/clk-composite.c
index 4386697236a7..956b7e54fa1c 100644
--- a/drivers/clk/clk-composite.c
+++ b/drivers/clk/clk-composite.c
@@ -27,7 +27,7 @@ static u8 clk_composite_get_parent(struct clk_hw *hw)
27 const struct clk_ops *mux_ops = composite->mux_ops; 27 const struct clk_ops *mux_ops = composite->mux_ops;
28 struct clk_hw *mux_hw = composite->mux_hw; 28 struct clk_hw *mux_hw = composite->mux_hw;
29 29
30 mux_hw->clk = hw->clk; 30 __clk_hw_set_clk(mux_hw, hw);
31 31
32 return mux_ops->get_parent(mux_hw); 32 return mux_ops->get_parent(mux_hw);
33} 33}
@@ -38,7 +38,7 @@ static int clk_composite_set_parent(struct clk_hw *hw, u8 index)
38 const struct clk_ops *mux_ops = composite->mux_ops; 38 const struct clk_ops *mux_ops = composite->mux_ops;
39 struct clk_hw *mux_hw = composite->mux_hw; 39 struct clk_hw *mux_hw = composite->mux_hw;
40 40
41 mux_hw->clk = hw->clk; 41 __clk_hw_set_clk(mux_hw, hw);
42 42
43 return mux_ops->set_parent(mux_hw, index); 43 return mux_ops->set_parent(mux_hw, index);
44} 44}
@@ -50,12 +50,14 @@ static unsigned long clk_composite_recalc_rate(struct clk_hw *hw,
50 const struct clk_ops *rate_ops = composite->rate_ops; 50 const struct clk_ops *rate_ops = composite->rate_ops;
51 struct clk_hw *rate_hw = composite->rate_hw; 51 struct clk_hw *rate_hw = composite->rate_hw;
52 52
53 rate_hw->clk = hw->clk; 53 __clk_hw_set_clk(rate_hw, hw);
54 54
55 return rate_ops->recalc_rate(rate_hw, parent_rate); 55 return rate_ops->recalc_rate(rate_hw, parent_rate);
56} 56}
57 57
58static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate, 58static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
59 unsigned long min_rate,
60 unsigned long max_rate,
59 unsigned long *best_parent_rate, 61 unsigned long *best_parent_rate,
60 struct clk_hw **best_parent_p) 62 struct clk_hw **best_parent_p)
61{ 63{
@@ -72,8 +74,10 @@ static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
72 int i; 74 int i;
73 75
74 if (rate_hw && rate_ops && rate_ops->determine_rate) { 76 if (rate_hw && rate_ops && rate_ops->determine_rate) {
75 rate_hw->clk = hw->clk; 77 __clk_hw_set_clk(rate_hw, hw);
76 return rate_ops->determine_rate(rate_hw, rate, best_parent_rate, 78 return rate_ops->determine_rate(rate_hw, rate, min_rate,
79 max_rate,
80 best_parent_rate,
77 best_parent_p); 81 best_parent_p);
78 } else if (rate_hw && rate_ops && rate_ops->round_rate && 82 } else if (rate_hw && rate_ops && rate_ops->round_rate &&
79 mux_hw && mux_ops && mux_ops->set_parent) { 83 mux_hw && mux_ops && mux_ops->set_parent) {
@@ -116,8 +120,9 @@ static long clk_composite_determine_rate(struct clk_hw *hw, unsigned long rate,
116 120
117 return best_rate; 121 return best_rate;
118 } else if (mux_hw && mux_ops && mux_ops->determine_rate) { 122 } else if (mux_hw && mux_ops && mux_ops->determine_rate) {
119 mux_hw->clk = hw->clk; 123 __clk_hw_set_clk(mux_hw, hw);
120 return mux_ops->determine_rate(mux_hw, rate, best_parent_rate, 124 return mux_ops->determine_rate(mux_hw, rate, min_rate,
125 max_rate, best_parent_rate,
121 best_parent_p); 126 best_parent_p);
122 } else { 127 } else {
123 pr_err("clk: clk_composite_determine_rate function called, but no mux or rate callback set!\n"); 128 pr_err("clk: clk_composite_determine_rate function called, but no mux or rate callback set!\n");
@@ -132,7 +137,7 @@ static long clk_composite_round_rate(struct clk_hw *hw, unsigned long rate,
132 const struct clk_ops *rate_ops = composite->rate_ops; 137 const struct clk_ops *rate_ops = composite->rate_ops;
133 struct clk_hw *rate_hw = composite->rate_hw; 138 struct clk_hw *rate_hw = composite->rate_hw;
134 139
135 rate_hw->clk = hw->clk; 140 __clk_hw_set_clk(rate_hw, hw);
136 141
137 return rate_ops->round_rate(rate_hw, rate, prate); 142 return rate_ops->round_rate(rate_hw, rate, prate);
138} 143}
@@ -144,7 +149,7 @@ static int clk_composite_set_rate(struct clk_hw *hw, unsigned long rate,
144 const struct clk_ops *rate_ops = composite->rate_ops; 149 const struct clk_ops *rate_ops = composite->rate_ops;
145 struct clk_hw *rate_hw = composite->rate_hw; 150 struct clk_hw *rate_hw = composite->rate_hw;
146 151
147 rate_hw->clk = hw->clk; 152 __clk_hw_set_clk(rate_hw, hw);
148 153
149 return rate_ops->set_rate(rate_hw, rate, parent_rate); 154 return rate_ops->set_rate(rate_hw, rate, parent_rate);
150} 155}
@@ -155,7 +160,7 @@ static int clk_composite_is_enabled(struct clk_hw *hw)
155 const struct clk_ops *gate_ops = composite->gate_ops; 160 const struct clk_ops *gate_ops = composite->gate_ops;
156 struct clk_hw *gate_hw = composite->gate_hw; 161 struct clk_hw *gate_hw = composite->gate_hw;
157 162
158 gate_hw->clk = hw->clk; 163 __clk_hw_set_clk(gate_hw, hw);
159 164
160 return gate_ops->is_enabled(gate_hw); 165 return gate_ops->is_enabled(gate_hw);
161} 166}
@@ -166,7 +171,7 @@ static int clk_composite_enable(struct clk_hw *hw)
166 const struct clk_ops *gate_ops = composite->gate_ops; 171 const struct clk_ops *gate_ops = composite->gate_ops;
167 struct clk_hw *gate_hw = composite->gate_hw; 172 struct clk_hw *gate_hw = composite->gate_hw;
168 173
169 gate_hw->clk = hw->clk; 174 __clk_hw_set_clk(gate_hw, hw);
170 175
171 return gate_ops->enable(gate_hw); 176 return gate_ops->enable(gate_hw);
172} 177}
@@ -177,7 +182,7 @@ static void clk_composite_disable(struct clk_hw *hw)
177 const struct clk_ops *gate_ops = composite->gate_ops; 182 const struct clk_ops *gate_ops = composite->gate_ops;
178 struct clk_hw *gate_hw = composite->gate_hw; 183 struct clk_hw *gate_hw = composite->gate_hw;
179 184
180 gate_hw->clk = hw->clk; 185 __clk_hw_set_clk(gate_hw, hw);
181 186
182 gate_ops->disable(gate_hw); 187 gate_ops->disable(gate_hw);
183} 188}
diff --git a/drivers/clk/clk-divider.c b/drivers/clk/clk-divider.c
index c0a842b335c5..25006a8bb8e6 100644
--- a/drivers/clk/clk-divider.c
+++ b/drivers/clk/clk-divider.c
@@ -30,7 +30,7 @@
30 30
31#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw) 31#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
32 32
33#define div_mask(d) ((1 << ((d)->width)) - 1) 33#define div_mask(width) ((1 << (width)) - 1)
34 34
35static unsigned int _get_table_maxdiv(const struct clk_div_table *table) 35static unsigned int _get_table_maxdiv(const struct clk_div_table *table)
36{ 36{
@@ -54,15 +54,16 @@ static unsigned int _get_table_mindiv(const struct clk_div_table *table)
54 return mindiv; 54 return mindiv;
55} 55}
56 56
57static unsigned int _get_maxdiv(struct clk_divider *divider) 57static unsigned int _get_maxdiv(const struct clk_div_table *table, u8 width,
58 unsigned long flags)
58{ 59{
59 if (divider->flags & CLK_DIVIDER_ONE_BASED) 60 if (flags & CLK_DIVIDER_ONE_BASED)
60 return div_mask(divider); 61 return div_mask(width);
61 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) 62 if (flags & CLK_DIVIDER_POWER_OF_TWO)
62 return 1 << div_mask(divider); 63 return 1 << div_mask(width);
63 if (divider->table) 64 if (table)
64 return _get_table_maxdiv(divider->table); 65 return _get_table_maxdiv(table);
65 return div_mask(divider) + 1; 66 return div_mask(width) + 1;
66} 67}
67 68
68static unsigned int _get_table_div(const struct clk_div_table *table, 69static unsigned int _get_table_div(const struct clk_div_table *table,
@@ -76,14 +77,15 @@ static unsigned int _get_table_div(const struct clk_div_table *table,
76 return 0; 77 return 0;
77} 78}
78 79
79static unsigned int _get_div(struct clk_divider *divider, unsigned int val) 80static unsigned int _get_div(const struct clk_div_table *table,
81 unsigned int val, unsigned long flags)
80{ 82{
81 if (divider->flags & CLK_DIVIDER_ONE_BASED) 83 if (flags & CLK_DIVIDER_ONE_BASED)
82 return val; 84 return val;
83 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) 85 if (flags & CLK_DIVIDER_POWER_OF_TWO)
84 return 1 << val; 86 return 1 << val;
85 if (divider->table) 87 if (table)
86 return _get_table_div(divider->table, val); 88 return _get_table_div(table, val);
87 return val + 1; 89 return val + 1;
88} 90}
89 91
@@ -98,29 +100,28 @@ static unsigned int _get_table_val(const struct clk_div_table *table,
98 return 0; 100 return 0;
99} 101}
100 102
101static unsigned int _get_val(struct clk_divider *divider, unsigned int div) 103static unsigned int _get_val(const struct clk_div_table *table,
104 unsigned int div, unsigned long flags)
102{ 105{
103 if (divider->flags & CLK_DIVIDER_ONE_BASED) 106 if (flags & CLK_DIVIDER_ONE_BASED)
104 return div; 107 return div;
105 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) 108 if (flags & CLK_DIVIDER_POWER_OF_TWO)
106 return __ffs(div); 109 return __ffs(div);
107 if (divider->table) 110 if (table)
108 return _get_table_val(divider->table, div); 111 return _get_table_val(table, div);
109 return div - 1; 112 return div - 1;
110} 113}
111 114
112static unsigned long clk_divider_recalc_rate(struct clk_hw *hw, 115unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
113 unsigned long parent_rate) 116 unsigned int val,
117 const struct clk_div_table *table,
118 unsigned long flags)
114{ 119{
115 struct clk_divider *divider = to_clk_divider(hw); 120 unsigned int div;
116 unsigned int div, val;
117
118 val = clk_readl(divider->reg) >> divider->shift;
119 val &= div_mask(divider);
120 121
121 div = _get_div(divider, val); 122 div = _get_div(table, val, flags);
122 if (!div) { 123 if (!div) {
123 WARN(!(divider->flags & CLK_DIVIDER_ALLOW_ZERO), 124 WARN(!(flags & CLK_DIVIDER_ALLOW_ZERO),
124 "%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n", 125 "%s: Zero divisor and CLK_DIVIDER_ALLOW_ZERO not set\n",
125 __clk_get_name(hw->clk)); 126 __clk_get_name(hw->clk));
126 return parent_rate; 127 return parent_rate;
@@ -128,12 +129,20 @@ static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
128 129
129 return DIV_ROUND_UP(parent_rate, div); 130 return DIV_ROUND_UP(parent_rate, div);
130} 131}
132EXPORT_SYMBOL_GPL(divider_recalc_rate);
131 133
132/* 134static unsigned long clk_divider_recalc_rate(struct clk_hw *hw,
133 * The reverse of DIV_ROUND_UP: The maximum number which 135 unsigned long parent_rate)
134 * divided by m is r 136{
135 */ 137 struct clk_divider *divider = to_clk_divider(hw);
136#define MULT_ROUND_UP(r, m) ((r) * (m) + (m) - 1) 138 unsigned int val;
139
140 val = clk_readl(divider->reg) >> divider->shift;
141 val &= div_mask(divider->width);
142
143 return divider_recalc_rate(hw, parent_rate, val, divider->table,
144 divider->flags);
145}
137 146
138static bool _is_valid_table_div(const struct clk_div_table *table, 147static bool _is_valid_table_div(const struct clk_div_table *table,
139 unsigned int div) 148 unsigned int div)
@@ -146,12 +155,13 @@ static bool _is_valid_table_div(const struct clk_div_table *table,
146 return false; 155 return false;
147} 156}
148 157
149static bool _is_valid_div(struct clk_divider *divider, unsigned int div) 158static bool _is_valid_div(const struct clk_div_table *table, unsigned int div,
159 unsigned long flags)
150{ 160{
151 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) 161 if (flags & CLK_DIVIDER_POWER_OF_TWO)
152 return is_power_of_2(div); 162 return is_power_of_2(div);
153 if (divider->table) 163 if (table)
154 return _is_valid_table_div(divider->table, div); 164 return _is_valid_table_div(table, div);
155 return true; 165 return true;
156} 166}
157 167
@@ -191,71 +201,81 @@ static int _round_down_table(const struct clk_div_table *table, int div)
191 return down; 201 return down;
192} 202}
193 203
194static int _div_round_up(struct clk_divider *divider, 204static int _div_round_up(const struct clk_div_table *table,
195 unsigned long parent_rate, unsigned long rate) 205 unsigned long parent_rate, unsigned long rate,
206 unsigned long flags)
196{ 207{
197 int div = DIV_ROUND_UP(parent_rate, rate); 208 int div = DIV_ROUND_UP(parent_rate, rate);
198 209
199 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) 210 if (flags & CLK_DIVIDER_POWER_OF_TWO)
200 div = __roundup_pow_of_two(div); 211 div = __roundup_pow_of_two(div);
201 if (divider->table) 212 if (table)
202 div = _round_up_table(divider->table, div); 213 div = _round_up_table(table, div);
203 214
204 return div; 215 return div;
205} 216}
206 217
207static int _div_round_closest(struct clk_divider *divider, 218static int _div_round_closest(const struct clk_div_table *table,
208 unsigned long parent_rate, unsigned long rate) 219 unsigned long parent_rate, unsigned long rate,
220 unsigned long flags)
209{ 221{
210 int up, down, div; 222 int up, down;
211 223 unsigned long up_rate, down_rate;
212 up = down = div = DIV_ROUND_CLOSEST(parent_rate, rate); 224
213 225 up = DIV_ROUND_UP(parent_rate, rate);
214 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) { 226 down = parent_rate / rate;
215 up = __roundup_pow_of_two(div); 227
216 down = __rounddown_pow_of_two(div); 228 if (flags & CLK_DIVIDER_POWER_OF_TWO) {
217 } else if (divider->table) { 229 up = __roundup_pow_of_two(up);
218 up = _round_up_table(divider->table, div); 230 down = __rounddown_pow_of_two(down);
219 down = _round_down_table(divider->table, div); 231 } else if (table) {
232 up = _round_up_table(table, up);
233 down = _round_down_table(table, down);
220 } 234 }
221 235
222 return (up - div) <= (div - down) ? up : down; 236 up_rate = DIV_ROUND_UP(parent_rate, up);
237 down_rate = DIV_ROUND_UP(parent_rate, down);
238
239 return (rate - up_rate) <= (down_rate - rate) ? up : down;
223} 240}
224 241
225static int _div_round(struct clk_divider *divider, unsigned long parent_rate, 242static int _div_round(const struct clk_div_table *table,
226 unsigned long rate) 243 unsigned long parent_rate, unsigned long rate,
244 unsigned long flags)
227{ 245{
228 if (divider->flags & CLK_DIVIDER_ROUND_CLOSEST) 246 if (flags & CLK_DIVIDER_ROUND_CLOSEST)
229 return _div_round_closest(divider, parent_rate, rate); 247 return _div_round_closest(table, parent_rate, rate, flags);
230 248
231 return _div_round_up(divider, parent_rate, rate); 249 return _div_round_up(table, parent_rate, rate, flags);
232} 250}
233 251
234static bool _is_best_div(struct clk_divider *divider, 252static bool _is_best_div(unsigned long rate, unsigned long now,
235 unsigned long rate, unsigned long now, unsigned long best) 253 unsigned long best, unsigned long flags)
236{ 254{
237 if (divider->flags & CLK_DIVIDER_ROUND_CLOSEST) 255 if (flags & CLK_DIVIDER_ROUND_CLOSEST)
238 return abs(rate - now) < abs(rate - best); 256 return abs(rate - now) < abs(rate - best);
239 257
240 return now <= rate && now > best; 258 return now <= rate && now > best;
241} 259}
242 260
243static int _next_div(struct clk_divider *divider, int div) 261static int _next_div(const struct clk_div_table *table, int div,
262 unsigned long flags)
244{ 263{
245 div++; 264 div++;
246 265
247 if (divider->flags & CLK_DIVIDER_POWER_OF_TWO) 266 if (flags & CLK_DIVIDER_POWER_OF_TWO)
248 return __roundup_pow_of_two(div); 267 return __roundup_pow_of_two(div);
249 if (divider->table) 268 if (table)
250 return _round_up_table(divider->table, div); 269 return _round_up_table(table, div);
251 270
252 return div; 271 return div;
253} 272}
254 273
255static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate, 274static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
256 unsigned long *best_parent_rate) 275 unsigned long *best_parent_rate,
276 const struct clk_div_table *table, u8 width,
277 unsigned long flags)
257{ 278{
258 struct clk_divider *divider = to_clk_divider(hw);
259 int i, bestdiv = 0; 279 int i, bestdiv = 0;
260 unsigned long parent_rate, best = 0, now, maxdiv; 280 unsigned long parent_rate, best = 0, now, maxdiv;
261 unsigned long parent_rate_saved = *best_parent_rate; 281 unsigned long parent_rate_saved = *best_parent_rate;
@@ -263,19 +283,11 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
263 if (!rate) 283 if (!rate)
264 rate = 1; 284 rate = 1;
265 285
266 /* if read only, just return current value */ 286 maxdiv = _get_maxdiv(table, width, flags);
267 if (divider->flags & CLK_DIVIDER_READ_ONLY) {
268 bestdiv = readl(divider->reg) >> divider->shift;
269 bestdiv &= div_mask(divider);
270 bestdiv = _get_div(divider, bestdiv);
271 return bestdiv;
272 }
273
274 maxdiv = _get_maxdiv(divider);
275 287
276 if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) { 288 if (!(__clk_get_flags(hw->clk) & CLK_SET_RATE_PARENT)) {
277 parent_rate = *best_parent_rate; 289 parent_rate = *best_parent_rate;
278 bestdiv = _div_round(divider, parent_rate, rate); 290 bestdiv = _div_round(table, parent_rate, rate, flags);
279 bestdiv = bestdiv == 0 ? 1 : bestdiv; 291 bestdiv = bestdiv == 0 ? 1 : bestdiv;
280 bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv; 292 bestdiv = bestdiv > maxdiv ? maxdiv : bestdiv;
281 return bestdiv; 293 return bestdiv;
@@ -287,8 +299,8 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
287 */ 299 */
288 maxdiv = min(ULONG_MAX / rate, maxdiv); 300 maxdiv = min(ULONG_MAX / rate, maxdiv);
289 301
290 for (i = 1; i <= maxdiv; i = _next_div(divider, i)) { 302 for (i = 1; i <= maxdiv; i = _next_div(table, i, flags)) {
291 if (!_is_valid_div(divider, i)) 303 if (!_is_valid_div(table, i, flags))
292 continue; 304 continue;
293 if (rate * i == parent_rate_saved) { 305 if (rate * i == parent_rate_saved) {
294 /* 306 /*
@@ -300,9 +312,9 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
300 return i; 312 return i;
301 } 313 }
302 parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 314 parent_rate = __clk_round_rate(__clk_get_parent(hw->clk),
303 MULT_ROUND_UP(rate, i)); 315 rate * i);
304 now = DIV_ROUND_UP(parent_rate, i); 316 now = DIV_ROUND_UP(parent_rate, i);
305 if (_is_best_div(divider, rate, now, best)) { 317 if (_is_best_div(rate, now, best, flags)) {
306 bestdiv = i; 318 bestdiv = i;
307 best = now; 319 best = now;
308 *best_parent_rate = parent_rate; 320 *best_parent_rate = parent_rate;
@@ -310,48 +322,79 @@ static int clk_divider_bestdiv(struct clk_hw *hw, unsigned long rate,
310 } 322 }
311 323
312 if (!bestdiv) { 324 if (!bestdiv) {
313 bestdiv = _get_maxdiv(divider); 325 bestdiv = _get_maxdiv(table, width, flags);
314 *best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1); 326 *best_parent_rate = __clk_round_rate(__clk_get_parent(hw->clk), 1);
315 } 327 }
316 328
317 return bestdiv; 329 return bestdiv;
318} 330}
319 331
320static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate, 332long divider_round_rate(struct clk_hw *hw, unsigned long rate,
321 unsigned long *prate) 333 unsigned long *prate, const struct clk_div_table *table,
334 u8 width, unsigned long flags)
322{ 335{
323 int div; 336 int div;
324 div = clk_divider_bestdiv(hw, rate, prate); 337
338 div = clk_divider_bestdiv(hw, rate, prate, table, width, flags);
325 339
326 return DIV_ROUND_UP(*prate, div); 340 return DIV_ROUND_UP(*prate, div);
327} 341}
342EXPORT_SYMBOL_GPL(divider_round_rate);
328 343
329static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate, 344static long clk_divider_round_rate(struct clk_hw *hw, unsigned long rate,
330 unsigned long parent_rate) 345 unsigned long *prate)
331{ 346{
332 struct clk_divider *divider = to_clk_divider(hw); 347 struct clk_divider *divider = to_clk_divider(hw);
348 int bestdiv;
349
350 /* if read only, just return current value */
351 if (divider->flags & CLK_DIVIDER_READ_ONLY) {
352 bestdiv = readl(divider->reg) >> divider->shift;
353 bestdiv &= div_mask(divider->width);
354 bestdiv = _get_div(divider->table, bestdiv, divider->flags);
355 return DIV_ROUND_UP(*prate, bestdiv);
356 }
357
358 return divider_round_rate(hw, rate, prate, divider->table,
359 divider->width, divider->flags);
360}
361
362int divider_get_val(unsigned long rate, unsigned long parent_rate,
363 const struct clk_div_table *table, u8 width,
364 unsigned long flags)
365{
333 unsigned int div, value; 366 unsigned int div, value;
334 unsigned long flags = 0;
335 u32 val;
336 367
337 div = DIV_ROUND_UP(parent_rate, rate); 368 div = DIV_ROUND_UP(parent_rate, rate);
338 369
339 if (!_is_valid_div(divider, div)) 370 if (!_is_valid_div(table, div, flags))
340 return -EINVAL; 371 return -EINVAL;
341 372
342 value = _get_val(divider, div); 373 value = _get_val(table, div, flags);
343 374
344 if (value > div_mask(divider)) 375 return min_t(unsigned int, value, div_mask(width));
345 value = div_mask(divider); 376}
377EXPORT_SYMBOL_GPL(divider_get_val);
378
379static int clk_divider_set_rate(struct clk_hw *hw, unsigned long rate,
380 unsigned long parent_rate)
381{
382 struct clk_divider *divider = to_clk_divider(hw);
383 unsigned int value;
384 unsigned long flags = 0;
385 u32 val;
386
387 value = divider_get_val(rate, parent_rate, divider->table,
388 divider->width, divider->flags);
346 389
347 if (divider->lock) 390 if (divider->lock)
348 spin_lock_irqsave(divider->lock, flags); 391 spin_lock_irqsave(divider->lock, flags);
349 392
350 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) { 393 if (divider->flags & CLK_DIVIDER_HIWORD_MASK) {
351 val = div_mask(divider) << (divider->shift + 16); 394 val = div_mask(divider->width) << (divider->shift + 16);
352 } else { 395 } else {
353 val = clk_readl(divider->reg); 396 val = clk_readl(divider->reg);
354 val &= ~(div_mask(divider) << divider->shift); 397 val &= ~(div_mask(divider->width) << divider->shift);
355 } 398 }
356 val |= value << divider->shift; 399 val |= value << divider->shift;
357 clk_writel(val, divider->reg); 400 clk_writel(val, divider->reg);
@@ -463,3 +506,19 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
463 width, clk_divider_flags, table, lock); 506 width, clk_divider_flags, table, lock);
464} 507}
465EXPORT_SYMBOL_GPL(clk_register_divider_table); 508EXPORT_SYMBOL_GPL(clk_register_divider_table);
509
510void clk_unregister_divider(struct clk *clk)
511{
512 struct clk_divider *div;
513 struct clk_hw *hw;
514
515 hw = __clk_get_hw(clk);
516 if (!hw)
517 return;
518
519 div = to_clk_divider(hw);
520
521 clk_unregister(clk);
522 kfree(div);
523}
524EXPORT_SYMBOL_GPL(clk_unregister_divider);
diff --git a/drivers/clk/clk-gate.c b/drivers/clk/clk-gate.c
index 51fd87fb7ba6..3f0e4200cb5d 100644
--- a/drivers/clk/clk-gate.c
+++ b/drivers/clk/clk-gate.c
@@ -128,7 +128,7 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
128 struct clk_init_data init; 128 struct clk_init_data init;
129 129
130 if (clk_gate_flags & CLK_GATE_HIWORD_MASK) { 130 if (clk_gate_flags & CLK_GATE_HIWORD_MASK) {
131 if (bit_idx > 16) { 131 if (bit_idx > 15) {
132 pr_err("gate bit exceeds LOWORD field\n"); 132 pr_err("gate bit exceeds LOWORD field\n");
133 return ERR_PTR(-EINVAL); 133 return ERR_PTR(-EINVAL);
134 } 134 }
@@ -162,3 +162,19 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
162 return clk; 162 return clk;
163} 163}
164EXPORT_SYMBOL_GPL(clk_register_gate); 164EXPORT_SYMBOL_GPL(clk_register_gate);
165
166void clk_unregister_gate(struct clk *clk)
167{
168 struct clk_gate *gate;
169 struct clk_hw *hw;
170
171 hw = __clk_get_hw(clk);
172 if (!hw)
173 return;
174
175 gate = to_clk_gate(hw);
176
177 clk_unregister(clk);
178 kfree(gate);
179}
180EXPORT_SYMBOL_GPL(clk_unregister_gate);
diff --git a/drivers/clk/clk-mux.c b/drivers/clk/clk-mux.c
index 6e1ecf94bf58..69a094c3783d 100644
--- a/drivers/clk/clk-mux.c
+++ b/drivers/clk/clk-mux.c
@@ -177,3 +177,19 @@ struct clk *clk_register_mux(struct device *dev, const char *name,
177 NULL, lock); 177 NULL, lock);
178} 178}
179EXPORT_SYMBOL_GPL(clk_register_mux); 179EXPORT_SYMBOL_GPL(clk_register_mux);
180
181void clk_unregister_mux(struct clk *clk)
182{
183 struct clk_mux *mux;
184 struct clk_hw *hw;
185
186 hw = __clk_get_hw(clk);
187 if (!hw)
188 return;
189
190 mux = to_clk_mux(hw);
191
192 clk_unregister(clk);
193 kfree(mux);
194}
195EXPORT_SYMBOL_GPL(clk_unregister_mux);
diff --git a/drivers/clk/clk-ppc-corenet.c b/drivers/clk/clk-qoriq.c
index 0a47d6f49cd6..cda90a971e39 100644
--- a/drivers/clk/clk-ppc-corenet.c
+++ b/drivers/clk/clk-qoriq.c
@@ -5,8 +5,11 @@
5 * it under the terms of the GNU General Public License version 2 as 5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation. 6 * published by the Free Software Foundation.
7 * 7 *
8 * clock driver for Freescale PowerPC corenet SoCs. 8 * clock driver for Freescale QorIQ SoCs.
9 */ 9 */
10
11#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
12
10#include <linux/clk-provider.h> 13#include <linux/clk-provider.h>
11#include <linux/io.h> 14#include <linux/io.h>
12#include <linux/kernel.h> 15#include <linux/kernel.h>
@@ -19,6 +22,7 @@
19struct cmux_clk { 22struct cmux_clk {
20 struct clk_hw hw; 23 struct clk_hw hw;
21 void __iomem *reg; 24 void __iomem *reg;
25 unsigned int clk_per_pll;
22 u32 flags; 26 u32 flags;
23}; 27};
24 28
@@ -27,14 +31,12 @@ struct cmux_clk {
27#define CLKSEL_ADJUST BIT(0) 31#define CLKSEL_ADJUST BIT(0)
28#define to_cmux_clk(p) container_of(p, struct cmux_clk, hw) 32#define to_cmux_clk(p) container_of(p, struct cmux_clk, hw)
29 33
30static unsigned int clocks_per_pll;
31
32static int cmux_set_parent(struct clk_hw *hw, u8 idx) 34static int cmux_set_parent(struct clk_hw *hw, u8 idx)
33{ 35{
34 struct cmux_clk *clk = to_cmux_clk(hw); 36 struct cmux_clk *clk = to_cmux_clk(hw);
35 u32 clksel; 37 u32 clksel;
36 38
37 clksel = ((idx / clocks_per_pll) << 2) + idx % clocks_per_pll; 39 clksel = ((idx / clk->clk_per_pll) << 2) + idx % clk->clk_per_pll;
38 if (clk->flags & CLKSEL_ADJUST) 40 if (clk->flags & CLKSEL_ADJUST)
39 clksel += 8; 41 clksel += 8;
40 clksel = (clksel & 0xf) << CLKSEL_SHIFT; 42 clksel = (clksel & 0xf) << CLKSEL_SHIFT;
@@ -52,12 +54,12 @@ static u8 cmux_get_parent(struct clk_hw *hw)
52 clksel = (clksel >> CLKSEL_SHIFT) & 0xf; 54 clksel = (clksel >> CLKSEL_SHIFT) & 0xf;
53 if (clk->flags & CLKSEL_ADJUST) 55 if (clk->flags & CLKSEL_ADJUST)
54 clksel -= 8; 56 clksel -= 8;
55 clksel = (clksel >> 2) * clocks_per_pll + clksel % 4; 57 clksel = (clksel >> 2) * clk->clk_per_pll + clksel % 4;
56 58
57 return clksel; 59 return clksel;
58} 60}
59 61
60const struct clk_ops cmux_ops = { 62static const struct clk_ops cmux_ops = {
61 .get_parent = cmux_get_parent, 63 .get_parent = cmux_get_parent,
62 .set_parent = cmux_set_parent, 64 .set_parent = cmux_set_parent,
63}; 65};
@@ -72,6 +74,7 @@ static void __init core_mux_init(struct device_node *np)
72 u32 offset; 74 u32 offset;
73 const char *clk_name; 75 const char *clk_name;
74 const char **parent_names; 76 const char **parent_names;
77 struct of_phandle_args clkspec;
75 78
76 rc = of_property_read_u32(np, "reg", &offset); 79 rc = of_property_read_u32(np, "reg", &offset);
77 if (rc) { 80 if (rc) {
@@ -85,32 +88,40 @@ static void __init core_mux_init(struct device_node *np)
85 pr_err("%s: get clock count error\n", np->name); 88 pr_err("%s: get clock count error\n", np->name);
86 return; 89 return;
87 } 90 }
88 parent_names = kzalloc((sizeof(char *) * count), GFP_KERNEL); 91 parent_names = kcalloc(count, sizeof(char *), GFP_KERNEL);
89 if (!parent_names) { 92 if (!parent_names)
90 pr_err("%s: could not allocate parent_names\n", __func__);
91 return; 93 return;
92 }
93 94
94 for (i = 0; i < count; i++) 95 for (i = 0; i < count; i++)
95 parent_names[i] = of_clk_get_parent_name(np, i); 96 parent_names[i] = of_clk_get_parent_name(np, i);
96 97
97 cmux_clk = kzalloc(sizeof(struct cmux_clk), GFP_KERNEL); 98 cmux_clk = kzalloc(sizeof(*cmux_clk), GFP_KERNEL);
98 if (!cmux_clk) { 99 if (!cmux_clk)
99 pr_err("%s: could not allocate cmux_clk\n", __func__);
100 goto err_name; 100 goto err_name;
101 } 101
102 cmux_clk->reg = of_iomap(np, 0); 102 cmux_clk->reg = of_iomap(np, 0);
103 if (!cmux_clk->reg) { 103 if (!cmux_clk->reg) {
104 pr_err("%s: could not map register\n", __func__); 104 pr_err("%s: could not map register\n", __func__);
105 goto err_clk; 105 goto err_clk;
106 } 106 }
107 107
108 rc = of_parse_phandle_with_args(np, "clocks", "#clock-cells", 0,
109 &clkspec);
110 if (rc) {
111 pr_err("%s: parse clock node error\n", __func__);
112 goto err_clk;
113 }
114
115 cmux_clk->clk_per_pll = of_property_count_strings(clkspec.np,
116 "clock-output-names");
117 of_node_put(clkspec.np);
118
108 node = of_find_compatible_node(NULL, NULL, "fsl,p4080-clockgen"); 119 node = of_find_compatible_node(NULL, NULL, "fsl,p4080-clockgen");
109 if (node && (offset >= 0x80)) 120 if (node && (offset >= 0x80))
110 cmux_clk->flags = CLKSEL_ADJUST; 121 cmux_clk->flags = CLKSEL_ADJUST;
111 122
112 rc = of_property_read_string_index(np, "clock-output-names", 123 rc = of_property_read_string_index(np, "clock-output-names",
113 0, &clk_name); 124 0, &clk_name);
114 if (rc) { 125 if (rc) {
115 pr_err("%s: read clock names error\n", np->name); 126 pr_err("%s: read clock names error\n", np->name);
116 goto err_clk; 127 goto err_clk;
@@ -132,7 +143,7 @@ static void __init core_mux_init(struct device_node *np)
132 rc = of_clk_add_provider(np, of_clk_src_simple_get, clk); 143 rc = of_clk_add_provider(np, of_clk_src_simple_get, clk);
133 if (rc) { 144 if (rc) {
134 pr_err("Could not register clock provider for node:%s\n", 145 pr_err("Could not register clock provider for node:%s\n",
135 np->name); 146 np->name);
136 goto err_clk; 147 goto err_clk;
137 } 148 }
138 goto err_name; 149 goto err_name;
@@ -155,7 +166,7 @@ static void __init core_pll_init(struct device_node *np)
155 166
156 base = of_iomap(np, 0); 167 base = of_iomap(np, 0);
157 if (!base) { 168 if (!base) {
158 pr_err("clk-ppc: iomap error\n"); 169 pr_err("iomap error\n");
159 return; 170 return;
160 } 171 }
161 172
@@ -181,24 +192,17 @@ static void __init core_pll_init(struct device_node *np)
181 goto err_map; 192 goto err_map;
182 } 193 }
183 194
184 /* output clock number per PLL */ 195 subclks = kcalloc(count, sizeof(struct clk *), GFP_KERNEL);
185 clocks_per_pll = count; 196 if (!subclks)
186
187 subclks = kzalloc(sizeof(struct clk *) * count, GFP_KERNEL);
188 if (!subclks) {
189 pr_err("%s: could not allocate subclks\n", __func__);
190 goto err_map; 197 goto err_map;
191 }
192 198
193 onecell_data = kzalloc(sizeof(struct clk_onecell_data), GFP_KERNEL); 199 onecell_data = kmalloc(sizeof(*onecell_data), GFP_KERNEL);
194 if (!onecell_data) { 200 if (!onecell_data)
195 pr_err("%s: could not allocate onecell_data\n", __func__);
196 goto err_clks; 201 goto err_clks;
197 }
198 202
199 for (i = 0; i < count; i++) { 203 for (i = 0; i < count; i++) {
200 rc = of_property_read_string_index(np, "clock-output-names", 204 rc = of_property_read_string_index(np, "clock-output-names",
201 i, &clk_name); 205 i, &clk_name);
202 if (rc) { 206 if (rc) {
203 pr_err("%s: could not get clock names\n", np->name); 207 pr_err("%s: could not get clock names\n", np->name);
204 goto err_cell; 208 goto err_cell;
@@ -230,7 +234,7 @@ static void __init core_pll_init(struct device_node *np)
230 rc = of_clk_add_provider(np, of_clk_src_onecell_get, onecell_data); 234 rc = of_clk_add_provider(np, of_clk_src_onecell_get, onecell_data);
231 if (rc) { 235 if (rc) {
232 pr_err("Could not register clk provider for node:%s\n", 236 pr_err("Could not register clk provider for node:%s\n",
233 np->name); 237 np->name);
234 goto err_cell; 238 goto err_cell;
235 } 239 }
236 240
@@ -252,7 +256,7 @@ static void __init sysclk_init(struct device_node *node)
252 u32 rate; 256 u32 rate;
253 257
254 if (!np) { 258 if (!np) {
255 pr_err("ppc-clk: could not get parent node\n"); 259 pr_err("could not get parent node\n");
256 return; 260 return;
257 } 261 }
258 262
@@ -268,39 +272,91 @@ static void __init sysclk_init(struct device_node *node)
268 of_clk_add_provider(np, of_clk_src_simple_get, clk); 272 of_clk_add_provider(np, of_clk_src_simple_get, clk);
269} 273}
270 274
271static const struct of_device_id clk_match[] __initconst = { 275static void __init pltfrm_pll_init(struct device_node *np)
272 { .compatible = "fsl,qoriq-sysclk-1.0", .data = sysclk_init, },
273 { .compatible = "fsl,qoriq-sysclk-2.0", .data = sysclk_init, },
274 { .compatible = "fsl,qoriq-core-pll-1.0", .data = core_pll_init, },
275 { .compatible = "fsl,qoriq-core-pll-2.0", .data = core_pll_init, },
276 { .compatible = "fsl,qoriq-core-mux-1.0", .data = core_mux_init, },
277 { .compatible = "fsl,qoriq-core-mux-2.0", .data = core_mux_init, },
278 {}
279};
280
281static int __init ppc_corenet_clk_probe(struct platform_device *pdev)
282{ 276{
283 of_clk_init(clk_match); 277 void __iomem *base;
278 uint32_t mult;
279 const char *parent_name, *clk_name;
280 int i, _errno;
281 struct clk_onecell_data *cod;
284 282
285 return 0; 283 base = of_iomap(np, 0);
286} 284 if (!base) {
285 pr_err("%s(): %s: of_iomap() failed\n", __func__, np->name);
286 return;
287 }
287 288
288static const struct of_device_id ppc_clk_ids[] __initconst = { 289 /* Get the multiple of PLL */
289 { .compatible = "fsl,qoriq-clockgen-1.0", }, 290 mult = ioread32be(base);
290 { .compatible = "fsl,qoriq-clockgen-2.0", },
291 {}
292};
293 291
294static struct platform_driver ppc_corenet_clk_driver = { 292 iounmap(base);
295 .driver = {
296 .name = "ppc_corenet_clock",
297 .of_match_table = ppc_clk_ids,
298 },
299 .probe = ppc_corenet_clk_probe,
300};
301 293
302static int __init ppc_corenet_clk_init(void) 294 /* Check if this PLL is disabled */
303{ 295 if (mult & PLL_KILL) {
304 return platform_driver_register(&ppc_corenet_clk_driver); 296 pr_debug("%s(): %s: Disabled\n", __func__, np->name);
297 return;
298 }
299 mult = (mult & GENMASK(6, 1)) >> 1;
300
301 parent_name = of_clk_get_parent_name(np, 0);
302 if (!parent_name) {
303 pr_err("%s(): %s: of_clk_get_parent_name() failed\n",
304 __func__, np->name);
305 return;
306 }
307
308 i = of_property_count_strings(np, "clock-output-names");
309 if (i < 0) {
310 pr_err("%s(): %s: of_property_count_strings(clock-output-names) = %d\n",
311 __func__, np->name, i);
312 return;
313 }
314
315 cod = kmalloc(sizeof(*cod) + i * sizeof(struct clk *), GFP_KERNEL);
316 if (!cod)
317 return;
318 cod->clks = (struct clk **)(cod + 1);
319 cod->clk_num = i;
320
321 for (i = 0; i < cod->clk_num; i++) {
322 _errno = of_property_read_string_index(np, "clock-output-names",
323 i, &clk_name);
324 if (_errno < 0) {
325 pr_err("%s(): %s: of_property_read_string_index(clock-output-names) = %d\n",
326 __func__, np->name, _errno);
327 goto return_clk_unregister;
328 }
329
330 cod->clks[i] = clk_register_fixed_factor(NULL, clk_name,
331 parent_name, 0, mult, 1 + i);
332 if (IS_ERR(cod->clks[i])) {
333 pr_err("%s(): %s: clk_register_fixed_factor(%s) = %ld\n",
334 __func__, np->name,
335 clk_name, PTR_ERR(cod->clks[i]));
336 goto return_clk_unregister;
337 }
338 }
339
340 _errno = of_clk_add_provider(np, of_clk_src_onecell_get, cod);
341 if (_errno < 0) {
342 pr_err("%s(): %s: of_clk_add_provider() = %d\n",
343 __func__, np->name, _errno);
344 goto return_clk_unregister;
345 }
346
347 return;
348
349return_clk_unregister:
350 while (--i >= 0)
351 clk_unregister(cod->clks[i]);
352 kfree(cod);
305} 353}
306subsys_initcall(ppc_corenet_clk_init); 354
355CLK_OF_DECLARE(qoriq_sysclk_1, "fsl,qoriq-sysclk-1.0", sysclk_init);
356CLK_OF_DECLARE(qoriq_sysclk_2, "fsl,qoriq-sysclk-2.0", sysclk_init);
357CLK_OF_DECLARE(qoriq_core_pll_1, "fsl,qoriq-core-pll-1.0", core_pll_init);
358CLK_OF_DECLARE(qoriq_core_pll_2, "fsl,qoriq-core-pll-2.0", core_pll_init);
359CLK_OF_DECLARE(qoriq_core_mux_1, "fsl,qoriq-core-mux-1.0", core_mux_init);
360CLK_OF_DECLARE(qoriq_core_mux_2, "fsl,qoriq-core-mux-2.0", core_mux_init);
361CLK_OF_DECLARE(qoriq_pltfrm_pll_1, "fsl,qoriq-platform-pll-1.0", pltfrm_pll_init);
362CLK_OF_DECLARE(qoriq_pltfrm_pll_2, "fsl,qoriq-platform-pll-2.0", pltfrm_pll_init);
diff --git a/drivers/clk/clk.c b/drivers/clk/clk.c
index 642cf37124d3..237f23f68bfc 100644
--- a/drivers/clk/clk.c
+++ b/drivers/clk/clk.c
@@ -9,7 +9,7 @@
9 * Standard functionality for the common clock API. See Documentation/clk.txt 9 * Standard functionality for the common clock API. See Documentation/clk.txt
10 */ 10 */
11 11
12#include <linux/clk-private.h> 12#include <linux/clk-provider.h>
13#include <linux/clk/clk-conf.h> 13#include <linux/clk/clk-conf.h>
14#include <linux/module.h> 14#include <linux/module.h>
15#include <linux/mutex.h> 15#include <linux/mutex.h>
@@ -37,6 +37,55 @@ static HLIST_HEAD(clk_root_list);
37static HLIST_HEAD(clk_orphan_list); 37static HLIST_HEAD(clk_orphan_list);
38static LIST_HEAD(clk_notifier_list); 38static LIST_HEAD(clk_notifier_list);
39 39
40static long clk_core_get_accuracy(struct clk_core *clk);
41static unsigned long clk_core_get_rate(struct clk_core *clk);
42static int clk_core_get_phase(struct clk_core *clk);
43static bool clk_core_is_prepared(struct clk_core *clk);
44static bool clk_core_is_enabled(struct clk_core *clk);
45static struct clk_core *clk_core_lookup(const char *name);
46
47/*** private data structures ***/
48
49struct clk_core {
50 const char *name;
51 const struct clk_ops *ops;
52 struct clk_hw *hw;
53 struct module *owner;
54 struct clk_core *parent;
55 const char **parent_names;
56 struct clk_core **parents;
57 u8 num_parents;
58 u8 new_parent_index;
59 unsigned long rate;
60 unsigned long req_rate;
61 unsigned long new_rate;
62 struct clk_core *new_parent;
63 struct clk_core *new_child;
64 unsigned long flags;
65 unsigned int enable_count;
66 unsigned int prepare_count;
67 unsigned long accuracy;
68 int phase;
69 struct hlist_head children;
70 struct hlist_node child_node;
71 struct hlist_node debug_node;
72 struct hlist_head clks;
73 unsigned int notifier_count;
74#ifdef CONFIG_DEBUG_FS
75 struct dentry *dentry;
76#endif
77 struct kref ref;
78};
79
80struct clk {
81 struct clk_core *core;
82 const char *dev_id;
83 const char *con_id;
84 unsigned long min_rate;
85 unsigned long max_rate;
86 struct hlist_node child_node;
87};
88
40/*** locking ***/ 89/*** locking ***/
41static void clk_prepare_lock(void) 90static void clk_prepare_lock(void)
42{ 91{
@@ -114,7 +163,8 @@ static struct hlist_head *orphan_list[] = {
114 NULL, 163 NULL,
115}; 164};
116 165
117static void clk_summary_show_one(struct seq_file *s, struct clk *c, int level) 166static void clk_summary_show_one(struct seq_file *s, struct clk_core *c,
167 int level)
118{ 168{
119 if (!c) 169 if (!c)
120 return; 170 return;
@@ -122,14 +172,14 @@ static void clk_summary_show_one(struct seq_file *s, struct clk *c, int level)
122 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n", 172 seq_printf(s, "%*s%-*s %11d %12d %11lu %10lu %-3d\n",
123 level * 3 + 1, "", 173 level * 3 + 1, "",
124 30 - level * 3, c->name, 174 30 - level * 3, c->name,
125 c->enable_count, c->prepare_count, clk_get_rate(c), 175 c->enable_count, c->prepare_count, clk_core_get_rate(c),
126 clk_get_accuracy(c), clk_get_phase(c)); 176 clk_core_get_accuracy(c), clk_core_get_phase(c));
127} 177}
128 178
129static void clk_summary_show_subtree(struct seq_file *s, struct clk *c, 179static void clk_summary_show_subtree(struct seq_file *s, struct clk_core *c,
130 int level) 180 int level)
131{ 181{
132 struct clk *child; 182 struct clk_core *child;
133 183
134 if (!c) 184 if (!c)
135 return; 185 return;
@@ -142,7 +192,7 @@ static void clk_summary_show_subtree(struct seq_file *s, struct clk *c,
142 192
143static int clk_summary_show(struct seq_file *s, void *data) 193static int clk_summary_show(struct seq_file *s, void *data)
144{ 194{
145 struct clk *c; 195 struct clk_core *c;
146 struct hlist_head **lists = (struct hlist_head **)s->private; 196 struct hlist_head **lists = (struct hlist_head **)s->private;
147 197
148 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n"); 198 seq_puts(s, " clock enable_cnt prepare_cnt rate accuracy phase\n");
@@ -172,7 +222,7 @@ static const struct file_operations clk_summary_fops = {
172 .release = single_release, 222 .release = single_release,
173}; 223};
174 224
175static void clk_dump_one(struct seq_file *s, struct clk *c, int level) 225static void clk_dump_one(struct seq_file *s, struct clk_core *c, int level)
176{ 226{
177 if (!c) 227 if (!c)
178 return; 228 return;
@@ -180,14 +230,14 @@ static void clk_dump_one(struct seq_file *s, struct clk *c, int level)
180 seq_printf(s, "\"%s\": { ", c->name); 230 seq_printf(s, "\"%s\": { ", c->name);
181 seq_printf(s, "\"enable_count\": %d,", c->enable_count); 231 seq_printf(s, "\"enable_count\": %d,", c->enable_count);
182 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count); 232 seq_printf(s, "\"prepare_count\": %d,", c->prepare_count);
183 seq_printf(s, "\"rate\": %lu", clk_get_rate(c)); 233 seq_printf(s, "\"rate\": %lu", clk_core_get_rate(c));
184 seq_printf(s, "\"accuracy\": %lu", clk_get_accuracy(c)); 234 seq_printf(s, "\"accuracy\": %lu", clk_core_get_accuracy(c));
185 seq_printf(s, "\"phase\": %d", clk_get_phase(c)); 235 seq_printf(s, "\"phase\": %d", clk_core_get_phase(c));
186} 236}
187 237
188static void clk_dump_subtree(struct seq_file *s, struct clk *c, int level) 238static void clk_dump_subtree(struct seq_file *s, struct clk_core *c, int level)
189{ 239{
190 struct clk *child; 240 struct clk_core *child;
191 241
192 if (!c) 242 if (!c)
193 return; 243 return;
@@ -204,7 +254,7 @@ static void clk_dump_subtree(struct seq_file *s, struct clk *c, int level)
204 254
205static int clk_dump(struct seq_file *s, void *data) 255static int clk_dump(struct seq_file *s, void *data)
206{ 256{
207 struct clk *c; 257 struct clk_core *c;
208 bool first_node = true; 258 bool first_node = true;
209 struct hlist_head **lists = (struct hlist_head **)s->private; 259 struct hlist_head **lists = (struct hlist_head **)s->private;
210 260
@@ -240,7 +290,7 @@ static const struct file_operations clk_dump_fops = {
240 .release = single_release, 290 .release = single_release,
241}; 291};
242 292
243static int clk_debug_create_one(struct clk *clk, struct dentry *pdentry) 293static int clk_debug_create_one(struct clk_core *clk, struct dentry *pdentry)
244{ 294{
245 struct dentry *d; 295 struct dentry *d;
246 int ret = -ENOMEM; 296 int ret = -ENOMEM;
@@ -315,7 +365,7 @@ out:
315 * initialized. Otherwise it bails out early since the debugfs clk tree 365 * initialized. Otherwise it bails out early since the debugfs clk tree
316 * will be created lazily by clk_debug_init as part of a late_initcall. 366 * will be created lazily by clk_debug_init as part of a late_initcall.
317 */ 367 */
318static int clk_debug_register(struct clk *clk) 368static int clk_debug_register(struct clk_core *clk)
319{ 369{
320 int ret = 0; 370 int ret = 0;
321 371
@@ -340,16 +390,12 @@ unlock:
340 * debugfs clk tree if clk->dentry points to debugfs created by 390 * debugfs clk tree if clk->dentry points to debugfs created by
341 * clk_debug_register in __clk_init. 391 * clk_debug_register in __clk_init.
342 */ 392 */
343static void clk_debug_unregister(struct clk *clk) 393static void clk_debug_unregister(struct clk_core *clk)
344{ 394{
345 mutex_lock(&clk_debug_lock); 395 mutex_lock(&clk_debug_lock);
346 if (!clk->dentry)
347 goto out;
348
349 hlist_del_init(&clk->debug_node); 396 hlist_del_init(&clk->debug_node);
350 debugfs_remove_recursive(clk->dentry); 397 debugfs_remove_recursive(clk->dentry);
351 clk->dentry = NULL; 398 clk->dentry = NULL;
352out:
353 mutex_unlock(&clk_debug_lock); 399 mutex_unlock(&clk_debug_lock);
354} 400}
355 401
@@ -358,8 +404,9 @@ struct dentry *clk_debugfs_add_file(struct clk_hw *hw, char *name, umode_t mode,
358{ 404{
359 struct dentry *d = NULL; 405 struct dentry *d = NULL;
360 406
361 if (hw->clk->dentry) 407 if (hw->core->dentry)
362 d = debugfs_create_file(name, mode, hw->clk->dentry, data, fops); 408 d = debugfs_create_file(name, mode, hw->core->dentry, data,
409 fops);
363 410
364 return d; 411 return d;
365} 412}
@@ -379,7 +426,7 @@ EXPORT_SYMBOL_GPL(clk_debugfs_add_file);
379 */ 426 */
380static int __init clk_debug_init(void) 427static int __init clk_debug_init(void)
381{ 428{
382 struct clk *clk; 429 struct clk_core *clk;
383 struct dentry *d; 430 struct dentry *d;
384 431
385 rootdir = debugfs_create_dir("clk", NULL); 432 rootdir = debugfs_create_dir("clk", NULL);
@@ -418,22 +465,20 @@ static int __init clk_debug_init(void)
418} 465}
419late_initcall(clk_debug_init); 466late_initcall(clk_debug_init);
420#else 467#else
421static inline int clk_debug_register(struct clk *clk) { return 0; } 468static inline int clk_debug_register(struct clk_core *clk) { return 0; }
422static inline void clk_debug_reparent(struct clk *clk, struct clk *new_parent) 469static inline void clk_debug_reparent(struct clk_core *clk,
470 struct clk_core *new_parent)
423{ 471{
424} 472}
425static inline void clk_debug_unregister(struct clk *clk) 473static inline void clk_debug_unregister(struct clk_core *clk)
426{ 474{
427} 475}
428#endif 476#endif
429 477
430/* caller must hold prepare_lock */ 478/* caller must hold prepare_lock */
431static void clk_unprepare_unused_subtree(struct clk *clk) 479static void clk_unprepare_unused_subtree(struct clk_core *clk)
432{ 480{
433 struct clk *child; 481 struct clk_core *child;
434
435 if (!clk)
436 return;
437 482
438 hlist_for_each_entry(child, &clk->children, child_node) 483 hlist_for_each_entry(child, &clk->children, child_node)
439 clk_unprepare_unused_subtree(child); 484 clk_unprepare_unused_subtree(child);
@@ -444,7 +489,7 @@ static void clk_unprepare_unused_subtree(struct clk *clk)
444 if (clk->flags & CLK_IGNORE_UNUSED) 489 if (clk->flags & CLK_IGNORE_UNUSED)
445 return; 490 return;
446 491
447 if (__clk_is_prepared(clk)) { 492 if (clk_core_is_prepared(clk)) {
448 if (clk->ops->unprepare_unused) 493 if (clk->ops->unprepare_unused)
449 clk->ops->unprepare_unused(clk->hw); 494 clk->ops->unprepare_unused(clk->hw);
450 else if (clk->ops->unprepare) 495 else if (clk->ops->unprepare)
@@ -453,14 +498,11 @@ static void clk_unprepare_unused_subtree(struct clk *clk)
453} 498}
454 499
455/* caller must hold prepare_lock */ 500/* caller must hold prepare_lock */
456static void clk_disable_unused_subtree(struct clk *clk) 501static void clk_disable_unused_subtree(struct clk_core *clk)
457{ 502{
458 struct clk *child; 503 struct clk_core *child;
459 unsigned long flags; 504 unsigned long flags;
460 505
461 if (!clk)
462 goto out;
463
464 hlist_for_each_entry(child, &clk->children, child_node) 506 hlist_for_each_entry(child, &clk->children, child_node)
465 clk_disable_unused_subtree(child); 507 clk_disable_unused_subtree(child);
466 508
@@ -477,7 +519,7 @@ static void clk_disable_unused_subtree(struct clk *clk)
477 * sequence. call .disable_unused if available, otherwise fall 519 * sequence. call .disable_unused if available, otherwise fall
478 * back to .disable 520 * back to .disable
479 */ 521 */
480 if (__clk_is_enabled(clk)) { 522 if (clk_core_is_enabled(clk)) {
481 if (clk->ops->disable_unused) 523 if (clk->ops->disable_unused)
482 clk->ops->disable_unused(clk->hw); 524 clk->ops->disable_unused(clk->hw);
483 else if (clk->ops->disable) 525 else if (clk->ops->disable)
@@ -486,9 +528,6 @@ static void clk_disable_unused_subtree(struct clk *clk)
486 528
487unlock_out: 529unlock_out:
488 clk_enable_unlock(flags); 530 clk_enable_unlock(flags);
489
490out:
491 return;
492} 531}
493 532
494static bool clk_ignore_unused; 533static bool clk_ignore_unused;
@@ -501,7 +540,7 @@ __setup("clk_ignore_unused", clk_ignore_unused_setup);
501 540
502static int clk_disable_unused(void) 541static int clk_disable_unused(void)
503{ 542{
504 struct clk *clk; 543 struct clk_core *clk;
505 544
506 if (clk_ignore_unused) { 545 if (clk_ignore_unused) {
507 pr_warn("clk: Not disabling unused clocks\n"); 546 pr_warn("clk: Not disabling unused clocks\n");
@@ -532,48 +571,65 @@ late_initcall_sync(clk_disable_unused);
532 571
533const char *__clk_get_name(struct clk *clk) 572const char *__clk_get_name(struct clk *clk)
534{ 573{
535 return !clk ? NULL : clk->name; 574 return !clk ? NULL : clk->core->name;
536} 575}
537EXPORT_SYMBOL_GPL(__clk_get_name); 576EXPORT_SYMBOL_GPL(__clk_get_name);
538 577
539struct clk_hw *__clk_get_hw(struct clk *clk) 578struct clk_hw *__clk_get_hw(struct clk *clk)
540{ 579{
541 return !clk ? NULL : clk->hw; 580 return !clk ? NULL : clk->core->hw;
542} 581}
543EXPORT_SYMBOL_GPL(__clk_get_hw); 582EXPORT_SYMBOL_GPL(__clk_get_hw);
544 583
545u8 __clk_get_num_parents(struct clk *clk) 584u8 __clk_get_num_parents(struct clk *clk)
546{ 585{
547 return !clk ? 0 : clk->num_parents; 586 return !clk ? 0 : clk->core->num_parents;
548} 587}
549EXPORT_SYMBOL_GPL(__clk_get_num_parents); 588EXPORT_SYMBOL_GPL(__clk_get_num_parents);
550 589
551struct clk *__clk_get_parent(struct clk *clk) 590struct clk *__clk_get_parent(struct clk *clk)
552{ 591{
553 return !clk ? NULL : clk->parent; 592 if (!clk)
593 return NULL;
594
595 /* TODO: Create a per-user clk and change callers to call clk_put */
596 return !clk->core->parent ? NULL : clk->core->parent->hw->clk;
554} 597}
555EXPORT_SYMBOL_GPL(__clk_get_parent); 598EXPORT_SYMBOL_GPL(__clk_get_parent);
556 599
557struct clk *clk_get_parent_by_index(struct clk *clk, u8 index) 600static struct clk_core *clk_core_get_parent_by_index(struct clk_core *clk,
601 u8 index)
558{ 602{
559 if (!clk || index >= clk->num_parents) 603 if (!clk || index >= clk->num_parents)
560 return NULL; 604 return NULL;
561 else if (!clk->parents) 605 else if (!clk->parents)
562 return __clk_lookup(clk->parent_names[index]); 606 return clk_core_lookup(clk->parent_names[index]);
563 else if (!clk->parents[index]) 607 else if (!clk->parents[index])
564 return clk->parents[index] = 608 return clk->parents[index] =
565 __clk_lookup(clk->parent_names[index]); 609 clk_core_lookup(clk->parent_names[index]);
566 else 610 else
567 return clk->parents[index]; 611 return clk->parents[index];
568} 612}
613
614struct clk *clk_get_parent_by_index(struct clk *clk, u8 index)
615{
616 struct clk_core *parent;
617
618 if (!clk)
619 return NULL;
620
621 parent = clk_core_get_parent_by_index(clk->core, index);
622
623 return !parent ? NULL : parent->hw->clk;
624}
569EXPORT_SYMBOL_GPL(clk_get_parent_by_index); 625EXPORT_SYMBOL_GPL(clk_get_parent_by_index);
570 626
571unsigned int __clk_get_enable_count(struct clk *clk) 627unsigned int __clk_get_enable_count(struct clk *clk)
572{ 628{
573 return !clk ? 0 : clk->enable_count; 629 return !clk ? 0 : clk->core->enable_count;
574} 630}
575 631
576unsigned long __clk_get_rate(struct clk *clk) 632static unsigned long clk_core_get_rate_nolock(struct clk_core *clk)
577{ 633{
578 unsigned long ret; 634 unsigned long ret;
579 635
@@ -593,9 +649,17 @@ unsigned long __clk_get_rate(struct clk *clk)
593out: 649out:
594 return ret; 650 return ret;
595} 651}
652
653unsigned long __clk_get_rate(struct clk *clk)
654{
655 if (!clk)
656 return 0;
657
658 return clk_core_get_rate_nolock(clk->core);
659}
596EXPORT_SYMBOL_GPL(__clk_get_rate); 660EXPORT_SYMBOL_GPL(__clk_get_rate);
597 661
598static unsigned long __clk_get_accuracy(struct clk *clk) 662static unsigned long __clk_get_accuracy(struct clk_core *clk)
599{ 663{
600 if (!clk) 664 if (!clk)
601 return 0; 665 return 0;
@@ -605,11 +669,11 @@ static unsigned long __clk_get_accuracy(struct clk *clk)
605 669
606unsigned long __clk_get_flags(struct clk *clk) 670unsigned long __clk_get_flags(struct clk *clk)
607{ 671{
608 return !clk ? 0 : clk->flags; 672 return !clk ? 0 : clk->core->flags;
609} 673}
610EXPORT_SYMBOL_GPL(__clk_get_flags); 674EXPORT_SYMBOL_GPL(__clk_get_flags);
611 675
612bool __clk_is_prepared(struct clk *clk) 676static bool clk_core_is_prepared(struct clk_core *clk)
613{ 677{
614 int ret; 678 int ret;
615 679
@@ -630,7 +694,15 @@ out:
630 return !!ret; 694 return !!ret;
631} 695}
632 696
633bool __clk_is_enabled(struct clk *clk) 697bool __clk_is_prepared(struct clk *clk)
698{
699 if (!clk)
700 return false;
701
702 return clk_core_is_prepared(clk->core);
703}
704
705static bool clk_core_is_enabled(struct clk_core *clk)
634{ 706{
635 int ret; 707 int ret;
636 708
@@ -650,12 +722,21 @@ bool __clk_is_enabled(struct clk *clk)
650out: 722out:
651 return !!ret; 723 return !!ret;
652} 724}
725
726bool __clk_is_enabled(struct clk *clk)
727{
728 if (!clk)
729 return false;
730
731 return clk_core_is_enabled(clk->core);
732}
653EXPORT_SYMBOL_GPL(__clk_is_enabled); 733EXPORT_SYMBOL_GPL(__clk_is_enabled);
654 734
655static struct clk *__clk_lookup_subtree(const char *name, struct clk *clk) 735static struct clk_core *__clk_lookup_subtree(const char *name,
736 struct clk_core *clk)
656{ 737{
657 struct clk *child; 738 struct clk_core *child;
658 struct clk *ret; 739 struct clk_core *ret;
659 740
660 if (!strcmp(clk->name, name)) 741 if (!strcmp(clk->name, name))
661 return clk; 742 return clk;
@@ -669,10 +750,10 @@ static struct clk *__clk_lookup_subtree(const char *name, struct clk *clk)
669 return NULL; 750 return NULL;
670} 751}
671 752
672struct clk *__clk_lookup(const char *name) 753static struct clk_core *clk_core_lookup(const char *name)
673{ 754{
674 struct clk *root_clk; 755 struct clk_core *root_clk;
675 struct clk *ret; 756 struct clk_core *ret;
676 757
677 if (!name) 758 if (!name)
678 return NULL; 759 return NULL;
@@ -694,42 +775,53 @@ struct clk *__clk_lookup(const char *name)
694 return NULL; 775 return NULL;
695} 776}
696 777
697/* 778static bool mux_is_better_rate(unsigned long rate, unsigned long now,
698 * Helper for finding best parent to provide a given frequency. This can be used 779 unsigned long best, unsigned long flags)
699 * directly as a determine_rate callback (e.g. for a mux), or from a more 780{
700 * complex clock that may combine a mux with other operations. 781 if (flags & CLK_MUX_ROUND_CLOSEST)
701 */ 782 return abs(now - rate) < abs(best - rate);
702long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, 783
703 unsigned long *best_parent_rate, 784 return now <= rate && now > best;
704 struct clk_hw **best_parent_p) 785}
786
787static long
788clk_mux_determine_rate_flags(struct clk_hw *hw, unsigned long rate,
789 unsigned long min_rate,
790 unsigned long max_rate,
791 unsigned long *best_parent_rate,
792 struct clk_hw **best_parent_p,
793 unsigned long flags)
705{ 794{
706 struct clk *clk = hw->clk, *parent, *best_parent = NULL; 795 struct clk_core *core = hw->core, *parent, *best_parent = NULL;
707 int i, num_parents; 796 int i, num_parents;
708 unsigned long parent_rate, best = 0; 797 unsigned long parent_rate, best = 0;
709 798
710 /* if NO_REPARENT flag set, pass through to current parent */ 799 /* if NO_REPARENT flag set, pass through to current parent */
711 if (clk->flags & CLK_SET_RATE_NO_REPARENT) { 800 if (core->flags & CLK_SET_RATE_NO_REPARENT) {
712 parent = clk->parent; 801 parent = core->parent;
713 if (clk->flags & CLK_SET_RATE_PARENT) 802 if (core->flags & CLK_SET_RATE_PARENT)
714 best = __clk_round_rate(parent, rate); 803 best = __clk_determine_rate(parent ? parent->hw : NULL,
804 rate, min_rate, max_rate);
715 else if (parent) 805 else if (parent)
716 best = __clk_get_rate(parent); 806 best = clk_core_get_rate_nolock(parent);
717 else 807 else
718 best = __clk_get_rate(clk); 808 best = clk_core_get_rate_nolock(core);
719 goto out; 809 goto out;
720 } 810 }
721 811
722 /* find the parent that can provide the fastest rate <= rate */ 812 /* find the parent that can provide the fastest rate <= rate */
723 num_parents = clk->num_parents; 813 num_parents = core->num_parents;
724 for (i = 0; i < num_parents; i++) { 814 for (i = 0; i < num_parents; i++) {
725 parent = clk_get_parent_by_index(clk, i); 815 parent = clk_core_get_parent_by_index(core, i);
726 if (!parent) 816 if (!parent)
727 continue; 817 continue;
728 if (clk->flags & CLK_SET_RATE_PARENT) 818 if (core->flags & CLK_SET_RATE_PARENT)
729 parent_rate = __clk_round_rate(parent, rate); 819 parent_rate = __clk_determine_rate(parent->hw, rate,
820 min_rate,
821 max_rate);
730 else 822 else
731 parent_rate = __clk_get_rate(parent); 823 parent_rate = clk_core_get_rate_nolock(parent);
732 if (parent_rate <= rate && parent_rate > best) { 824 if (mux_is_better_rate(rate, parent_rate, best, flags)) {
733 best_parent = parent; 825 best_parent = parent;
734 best = parent_rate; 826 best = parent_rate;
735 } 827 }
@@ -742,11 +834,63 @@ out:
742 834
743 return best; 835 return best;
744} 836}
837
838struct clk *__clk_lookup(const char *name)
839{
840 struct clk_core *core = clk_core_lookup(name);
841
842 return !core ? NULL : core->hw->clk;
843}
844
845static void clk_core_get_boundaries(struct clk_core *clk,
846 unsigned long *min_rate,
847 unsigned long *max_rate)
848{
849 struct clk *clk_user;
850
851 *min_rate = 0;
852 *max_rate = ULONG_MAX;
853
854 hlist_for_each_entry(clk_user, &clk->clks, child_node)
855 *min_rate = max(*min_rate, clk_user->min_rate);
856
857 hlist_for_each_entry(clk_user, &clk->clks, child_node)
858 *max_rate = min(*max_rate, clk_user->max_rate);
859}
860
861/*
862 * Helper for finding best parent to provide a given frequency. This can be used
863 * directly as a determine_rate callback (e.g. for a mux), or from a more
864 * complex clock that may combine a mux with other operations.
865 */
866long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
867 unsigned long min_rate,
868 unsigned long max_rate,
869 unsigned long *best_parent_rate,
870 struct clk_hw **best_parent_p)
871{
872 return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate,
873 best_parent_rate,
874 best_parent_p, 0);
875}
745EXPORT_SYMBOL_GPL(__clk_mux_determine_rate); 876EXPORT_SYMBOL_GPL(__clk_mux_determine_rate);
746 877
878long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate,
879 unsigned long min_rate,
880 unsigned long max_rate,
881 unsigned long *best_parent_rate,
882 struct clk_hw **best_parent_p)
883{
884 return clk_mux_determine_rate_flags(hw, rate, min_rate, max_rate,
885 best_parent_rate,
886 best_parent_p,
887 CLK_MUX_ROUND_CLOSEST);
888}
889EXPORT_SYMBOL_GPL(__clk_mux_determine_rate_closest);
890
747/*** clk api ***/ 891/*** clk api ***/
748 892
749void __clk_unprepare(struct clk *clk) 893static void clk_core_unprepare(struct clk_core *clk)
750{ 894{
751 if (!clk) 895 if (!clk)
752 return; 896 return;
@@ -762,7 +906,7 @@ void __clk_unprepare(struct clk *clk)
762 if (clk->ops->unprepare) 906 if (clk->ops->unprepare)
763 clk->ops->unprepare(clk->hw); 907 clk->ops->unprepare(clk->hw);
764 908
765 __clk_unprepare(clk->parent); 909 clk_core_unprepare(clk->parent);
766} 910}
767 911
768/** 912/**
@@ -782,12 +926,12 @@ void clk_unprepare(struct clk *clk)
782 return; 926 return;
783 927
784 clk_prepare_lock(); 928 clk_prepare_lock();
785 __clk_unprepare(clk); 929 clk_core_unprepare(clk->core);
786 clk_prepare_unlock(); 930 clk_prepare_unlock();
787} 931}
788EXPORT_SYMBOL_GPL(clk_unprepare); 932EXPORT_SYMBOL_GPL(clk_unprepare);
789 933
790int __clk_prepare(struct clk *clk) 934static int clk_core_prepare(struct clk_core *clk)
791{ 935{
792 int ret = 0; 936 int ret = 0;
793 937
@@ -795,14 +939,14 @@ int __clk_prepare(struct clk *clk)
795 return 0; 939 return 0;
796 940
797 if (clk->prepare_count == 0) { 941 if (clk->prepare_count == 0) {
798 ret = __clk_prepare(clk->parent); 942 ret = clk_core_prepare(clk->parent);
799 if (ret) 943 if (ret)
800 return ret; 944 return ret;
801 945
802 if (clk->ops->prepare) { 946 if (clk->ops->prepare) {
803 ret = clk->ops->prepare(clk->hw); 947 ret = clk->ops->prepare(clk->hw);
804 if (ret) { 948 if (ret) {
805 __clk_unprepare(clk->parent); 949 clk_core_unprepare(clk->parent);
806 return ret; 950 return ret;
807 } 951 }
808 } 952 }
@@ -829,15 +973,18 @@ int clk_prepare(struct clk *clk)
829{ 973{
830 int ret; 974 int ret;
831 975
976 if (!clk)
977 return 0;
978
832 clk_prepare_lock(); 979 clk_prepare_lock();
833 ret = __clk_prepare(clk); 980 ret = clk_core_prepare(clk->core);
834 clk_prepare_unlock(); 981 clk_prepare_unlock();
835 982
836 return ret; 983 return ret;
837} 984}
838EXPORT_SYMBOL_GPL(clk_prepare); 985EXPORT_SYMBOL_GPL(clk_prepare);
839 986
840static void __clk_disable(struct clk *clk) 987static void clk_core_disable(struct clk_core *clk)
841{ 988{
842 if (!clk) 989 if (!clk)
843 return; 990 return;
@@ -851,7 +998,15 @@ static void __clk_disable(struct clk *clk)
851 if (clk->ops->disable) 998 if (clk->ops->disable)
852 clk->ops->disable(clk->hw); 999 clk->ops->disable(clk->hw);
853 1000
854 __clk_disable(clk->parent); 1001 clk_core_disable(clk->parent);
1002}
1003
1004static void __clk_disable(struct clk *clk)
1005{
1006 if (!clk)
1007 return;
1008
1009 clk_core_disable(clk->core);
855} 1010}
856 1011
857/** 1012/**
@@ -879,7 +1034,7 @@ void clk_disable(struct clk *clk)
879} 1034}
880EXPORT_SYMBOL_GPL(clk_disable); 1035EXPORT_SYMBOL_GPL(clk_disable);
881 1036
882static int __clk_enable(struct clk *clk) 1037static int clk_core_enable(struct clk_core *clk)
883{ 1038{
884 int ret = 0; 1039 int ret = 0;
885 1040
@@ -890,7 +1045,7 @@ static int __clk_enable(struct clk *clk)
890 return -ESHUTDOWN; 1045 return -ESHUTDOWN;
891 1046
892 if (clk->enable_count == 0) { 1047 if (clk->enable_count == 0) {
893 ret = __clk_enable(clk->parent); 1048 ret = clk_core_enable(clk->parent);
894 1049
895 if (ret) 1050 if (ret)
896 return ret; 1051 return ret;
@@ -898,7 +1053,7 @@ static int __clk_enable(struct clk *clk)
898 if (clk->ops->enable) { 1053 if (clk->ops->enable) {
899 ret = clk->ops->enable(clk->hw); 1054 ret = clk->ops->enable(clk->hw);
900 if (ret) { 1055 if (ret) {
901 __clk_disable(clk->parent); 1056 clk_core_disable(clk->parent);
902 return ret; 1057 return ret;
903 } 1058 }
904 } 1059 }
@@ -908,6 +1063,14 @@ static int __clk_enable(struct clk *clk)
908 return 0; 1063 return 0;
909} 1064}
910 1065
1066static int __clk_enable(struct clk *clk)
1067{
1068 if (!clk)
1069 return 0;
1070
1071 return clk_core_enable(clk->core);
1072}
1073
911/** 1074/**
912 * clk_enable - ungate a clock 1075 * clk_enable - ungate a clock
913 * @clk: the clk being ungated 1076 * @clk: the clk being ungated
@@ -934,17 +1097,13 @@ int clk_enable(struct clk *clk)
934} 1097}
935EXPORT_SYMBOL_GPL(clk_enable); 1098EXPORT_SYMBOL_GPL(clk_enable);
936 1099
937/** 1100static unsigned long clk_core_round_rate_nolock(struct clk_core *clk,
938 * __clk_round_rate - round the given rate for a clk 1101 unsigned long rate,
939 * @clk: round the rate of this clock 1102 unsigned long min_rate,
940 * @rate: the rate which is to be rounded 1103 unsigned long max_rate)
941 *
942 * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate
943 */
944unsigned long __clk_round_rate(struct clk *clk, unsigned long rate)
945{ 1104{
946 unsigned long parent_rate = 0; 1105 unsigned long parent_rate = 0;
947 struct clk *parent; 1106 struct clk_core *parent;
948 struct clk_hw *parent_hw; 1107 struct clk_hw *parent_hw;
949 1108
950 if (!clk) 1109 if (!clk)
@@ -956,15 +1115,59 @@ unsigned long __clk_round_rate(struct clk *clk, unsigned long rate)
956 1115
957 if (clk->ops->determine_rate) { 1116 if (clk->ops->determine_rate) {
958 parent_hw = parent ? parent->hw : NULL; 1117 parent_hw = parent ? parent->hw : NULL;
959 return clk->ops->determine_rate(clk->hw, rate, &parent_rate, 1118 return clk->ops->determine_rate(clk->hw, rate,
960 &parent_hw); 1119 min_rate, max_rate,
1120 &parent_rate, &parent_hw);
961 } else if (clk->ops->round_rate) 1121 } else if (clk->ops->round_rate)
962 return clk->ops->round_rate(clk->hw, rate, &parent_rate); 1122 return clk->ops->round_rate(clk->hw, rate, &parent_rate);
963 else if (clk->flags & CLK_SET_RATE_PARENT) 1123 else if (clk->flags & CLK_SET_RATE_PARENT)
964 return __clk_round_rate(clk->parent, rate); 1124 return clk_core_round_rate_nolock(clk->parent, rate, min_rate,
1125 max_rate);
965 else 1126 else
966 return clk->rate; 1127 return clk->rate;
967} 1128}
1129
1130/**
1131 * __clk_determine_rate - get the closest rate actually supported by a clock
1132 * @hw: determine the rate of this clock
1133 * @rate: target rate
1134 * @min_rate: returned rate must be greater than this rate
1135 * @max_rate: returned rate must be less than this rate
1136 *
1137 * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate and
1138 * .determine_rate.
1139 */
1140unsigned long __clk_determine_rate(struct clk_hw *hw,
1141 unsigned long rate,
1142 unsigned long min_rate,
1143 unsigned long max_rate)
1144{
1145 if (!hw)
1146 return 0;
1147
1148 return clk_core_round_rate_nolock(hw->core, rate, min_rate, max_rate);
1149}
1150EXPORT_SYMBOL_GPL(__clk_determine_rate);
1151
1152/**
1153 * __clk_round_rate - round the given rate for a clk
1154 * @clk: round the rate of this clock
1155 * @rate: the rate which is to be rounded
1156 *
1157 * Caller must hold prepare_lock. Useful for clk_ops such as .set_rate
1158 */
1159unsigned long __clk_round_rate(struct clk *clk, unsigned long rate)
1160{
1161 unsigned long min_rate;
1162 unsigned long max_rate;
1163
1164 if (!clk)
1165 return 0;
1166
1167 clk_core_get_boundaries(clk->core, &min_rate, &max_rate);
1168
1169 return clk_core_round_rate_nolock(clk->core, rate, min_rate, max_rate);
1170}
968EXPORT_SYMBOL_GPL(__clk_round_rate); 1171EXPORT_SYMBOL_GPL(__clk_round_rate);
969 1172
970/** 1173/**
@@ -980,6 +1183,9 @@ long clk_round_rate(struct clk *clk, unsigned long rate)
980{ 1183{
981 unsigned long ret; 1184 unsigned long ret;
982 1185
1186 if (!clk)
1187 return 0;
1188
983 clk_prepare_lock(); 1189 clk_prepare_lock();
984 ret = __clk_round_rate(clk, rate); 1190 ret = __clk_round_rate(clk, rate);
985 clk_prepare_unlock(); 1191 clk_prepare_unlock();
@@ -1002,22 +1208,21 @@ EXPORT_SYMBOL_GPL(clk_round_rate);
1002 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if 1208 * called if all went well, or NOTIFY_STOP or NOTIFY_BAD immediately if
1003 * a driver returns that. 1209 * a driver returns that.
1004 */ 1210 */
1005static int __clk_notify(struct clk *clk, unsigned long msg, 1211static int __clk_notify(struct clk_core *clk, unsigned long msg,
1006 unsigned long old_rate, unsigned long new_rate) 1212 unsigned long old_rate, unsigned long new_rate)
1007{ 1213{
1008 struct clk_notifier *cn; 1214 struct clk_notifier *cn;
1009 struct clk_notifier_data cnd; 1215 struct clk_notifier_data cnd;
1010 int ret = NOTIFY_DONE; 1216 int ret = NOTIFY_DONE;
1011 1217
1012 cnd.clk = clk;
1013 cnd.old_rate = old_rate; 1218 cnd.old_rate = old_rate;
1014 cnd.new_rate = new_rate; 1219 cnd.new_rate = new_rate;
1015 1220
1016 list_for_each_entry(cn, &clk_notifier_list, node) { 1221 list_for_each_entry(cn, &clk_notifier_list, node) {
1017 if (cn->clk == clk) { 1222 if (cn->clk->core == clk) {
1223 cnd.clk = cn->clk;
1018 ret = srcu_notifier_call_chain(&cn->notifier_head, msg, 1224 ret = srcu_notifier_call_chain(&cn->notifier_head, msg,
1019 &cnd); 1225 &cnd);
1020 break;
1021 } 1226 }
1022 } 1227 }
1023 1228
@@ -1035,10 +1240,10 @@ static int __clk_notify(struct clk *clk, unsigned long msg,
1035 * 1240 *
1036 * Caller must hold prepare_lock. 1241 * Caller must hold prepare_lock.
1037 */ 1242 */
1038static void __clk_recalc_accuracies(struct clk *clk) 1243static void __clk_recalc_accuracies(struct clk_core *clk)
1039{ 1244{
1040 unsigned long parent_accuracy = 0; 1245 unsigned long parent_accuracy = 0;
1041 struct clk *child; 1246 struct clk_core *child;
1042 1247
1043 if (clk->parent) 1248 if (clk->parent)
1044 parent_accuracy = clk->parent->accuracy; 1249 parent_accuracy = clk->parent->accuracy;
@@ -1053,6 +1258,20 @@ static void __clk_recalc_accuracies(struct clk *clk)
1053 __clk_recalc_accuracies(child); 1258 __clk_recalc_accuracies(child);
1054} 1259}
1055 1260
1261static long clk_core_get_accuracy(struct clk_core *clk)
1262{
1263 unsigned long accuracy;
1264
1265 clk_prepare_lock();
1266 if (clk && (clk->flags & CLK_GET_ACCURACY_NOCACHE))
1267 __clk_recalc_accuracies(clk);
1268
1269 accuracy = __clk_get_accuracy(clk);
1270 clk_prepare_unlock();
1271
1272 return accuracy;
1273}
1274
1056/** 1275/**
1057 * clk_get_accuracy - return the accuracy of clk 1276 * clk_get_accuracy - return the accuracy of clk
1058 * @clk: the clk whose accuracy is being returned 1277 * @clk: the clk whose accuracy is being returned
@@ -1064,20 +1283,15 @@ static void __clk_recalc_accuracies(struct clk *clk)
1064 */ 1283 */
1065long clk_get_accuracy(struct clk *clk) 1284long clk_get_accuracy(struct clk *clk)
1066{ 1285{
1067 unsigned long accuracy; 1286 if (!clk)
1068 1287 return 0;
1069 clk_prepare_lock();
1070 if (clk && (clk->flags & CLK_GET_ACCURACY_NOCACHE))
1071 __clk_recalc_accuracies(clk);
1072
1073 accuracy = __clk_get_accuracy(clk);
1074 clk_prepare_unlock();
1075 1288
1076 return accuracy; 1289 return clk_core_get_accuracy(clk->core);
1077} 1290}
1078EXPORT_SYMBOL_GPL(clk_get_accuracy); 1291EXPORT_SYMBOL_GPL(clk_get_accuracy);
1079 1292
1080static unsigned long clk_recalc(struct clk *clk, unsigned long parent_rate) 1293static unsigned long clk_recalc(struct clk_core *clk,
1294 unsigned long parent_rate)
1081{ 1295{
1082 if (clk->ops->recalc_rate) 1296 if (clk->ops->recalc_rate)
1083 return clk->ops->recalc_rate(clk->hw, parent_rate); 1297 return clk->ops->recalc_rate(clk->hw, parent_rate);
@@ -1098,11 +1312,11 @@ static unsigned long clk_recalc(struct clk *clk, unsigned long parent_rate)
1098 * 1312 *
1099 * Caller must hold prepare_lock. 1313 * Caller must hold prepare_lock.
1100 */ 1314 */
1101static void __clk_recalc_rates(struct clk *clk, unsigned long msg) 1315static void __clk_recalc_rates(struct clk_core *clk, unsigned long msg)
1102{ 1316{
1103 unsigned long old_rate; 1317 unsigned long old_rate;
1104 unsigned long parent_rate = 0; 1318 unsigned long parent_rate = 0;
1105 struct clk *child; 1319 struct clk_core *child;
1106 1320
1107 old_rate = clk->rate; 1321 old_rate = clk->rate;
1108 1322
@@ -1122,15 +1336,7 @@ static void __clk_recalc_rates(struct clk *clk, unsigned long msg)
1122 __clk_recalc_rates(child, msg); 1336 __clk_recalc_rates(child, msg);
1123} 1337}
1124 1338
1125/** 1339static unsigned long clk_core_get_rate(struct clk_core *clk)
1126 * clk_get_rate - return the rate of clk
1127 * @clk: the clk whose rate is being returned
1128 *
1129 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1130 * is set, which means a recalc_rate will be issued.
1131 * If clk is NULL then returns 0.
1132 */
1133unsigned long clk_get_rate(struct clk *clk)
1134{ 1340{
1135 unsigned long rate; 1341 unsigned long rate;
1136 1342
@@ -1139,14 +1345,31 @@ unsigned long clk_get_rate(struct clk *clk)
1139 if (clk && (clk->flags & CLK_GET_RATE_NOCACHE)) 1345 if (clk && (clk->flags & CLK_GET_RATE_NOCACHE))
1140 __clk_recalc_rates(clk, 0); 1346 __clk_recalc_rates(clk, 0);
1141 1347
1142 rate = __clk_get_rate(clk); 1348 rate = clk_core_get_rate_nolock(clk);
1143 clk_prepare_unlock(); 1349 clk_prepare_unlock();
1144 1350
1145 return rate; 1351 return rate;
1146} 1352}
1353
1354/**
1355 * clk_get_rate - return the rate of clk
1356 * @clk: the clk whose rate is being returned
1357 *
1358 * Simply returns the cached rate of the clk, unless CLK_GET_RATE_NOCACHE flag
1359 * is set, which means a recalc_rate will be issued.
1360 * If clk is NULL then returns 0.
1361 */
1362unsigned long clk_get_rate(struct clk *clk)
1363{
1364 if (!clk)
1365 return 0;
1366
1367 return clk_core_get_rate(clk->core);
1368}
1147EXPORT_SYMBOL_GPL(clk_get_rate); 1369EXPORT_SYMBOL_GPL(clk_get_rate);
1148 1370
1149static int clk_fetch_parent_index(struct clk *clk, struct clk *parent) 1371static int clk_fetch_parent_index(struct clk_core *clk,
1372 struct clk_core *parent)
1150{ 1373{
1151 int i; 1374 int i;
1152 1375
@@ -1160,7 +1383,7 @@ static int clk_fetch_parent_index(struct clk *clk, struct clk *parent)
1160 /* 1383 /*
1161 * find index of new parent clock using cached parent ptrs, 1384 * find index of new parent clock using cached parent ptrs,
1162 * or if not yet cached, use string name comparison and cache 1385 * or if not yet cached, use string name comparison and cache
1163 * them now to avoid future calls to __clk_lookup. 1386 * them now to avoid future calls to clk_core_lookup.
1164 */ 1387 */
1165 for (i = 0; i < clk->num_parents; i++) { 1388 for (i = 0; i < clk->num_parents; i++) {
1166 if (clk->parents[i] == parent) 1389 if (clk->parents[i] == parent)
@@ -1170,7 +1393,7 @@ static int clk_fetch_parent_index(struct clk *clk, struct clk *parent)
1170 continue; 1393 continue;
1171 1394
1172 if (!strcmp(clk->parent_names[i], parent->name)) { 1395 if (!strcmp(clk->parent_names[i], parent->name)) {
1173 clk->parents[i] = __clk_lookup(parent->name); 1396 clk->parents[i] = clk_core_lookup(parent->name);
1174 return i; 1397 return i;
1175 } 1398 }
1176 } 1399 }
@@ -1178,7 +1401,7 @@ static int clk_fetch_parent_index(struct clk *clk, struct clk *parent)
1178 return -EINVAL; 1401 return -EINVAL;
1179} 1402}
1180 1403
1181static void clk_reparent(struct clk *clk, struct clk *new_parent) 1404static void clk_reparent(struct clk_core *clk, struct clk_core *new_parent)
1182{ 1405{
1183 hlist_del(&clk->child_node); 1406 hlist_del(&clk->child_node);
1184 1407
@@ -1195,10 +1418,11 @@ static void clk_reparent(struct clk *clk, struct clk *new_parent)
1195 clk->parent = new_parent; 1418 clk->parent = new_parent;
1196} 1419}
1197 1420
1198static struct clk *__clk_set_parent_before(struct clk *clk, struct clk *parent) 1421static struct clk_core *__clk_set_parent_before(struct clk_core *clk,
1422 struct clk_core *parent)
1199{ 1423{
1200 unsigned long flags; 1424 unsigned long flags;
1201 struct clk *old_parent = clk->parent; 1425 struct clk_core *old_parent = clk->parent;
1202 1426
1203 /* 1427 /*
1204 * Migrate prepare state between parents and prevent race with 1428 * Migrate prepare state between parents and prevent race with
@@ -1218,9 +1442,9 @@ static struct clk *__clk_set_parent_before(struct clk *clk, struct clk *parent)
1218 * See also: Comment for clk_set_parent() below. 1442 * See also: Comment for clk_set_parent() below.
1219 */ 1443 */
1220 if (clk->prepare_count) { 1444 if (clk->prepare_count) {
1221 __clk_prepare(parent); 1445 clk_core_prepare(parent);
1222 clk_enable(parent); 1446 clk_core_enable(parent);
1223 clk_enable(clk); 1447 clk_core_enable(clk);
1224 } 1448 }
1225 1449
1226 /* update the clk tree topology */ 1450 /* update the clk tree topology */
@@ -1231,25 +1455,27 @@ static struct clk *__clk_set_parent_before(struct clk *clk, struct clk *parent)
1231 return old_parent; 1455 return old_parent;
1232} 1456}
1233 1457
1234static void __clk_set_parent_after(struct clk *clk, struct clk *parent, 1458static void __clk_set_parent_after(struct clk_core *core,
1235 struct clk *old_parent) 1459 struct clk_core *parent,
1460 struct clk_core *old_parent)
1236{ 1461{
1237 /* 1462 /*
1238 * Finish the migration of prepare state and undo the changes done 1463 * Finish the migration of prepare state and undo the changes done
1239 * for preventing a race with clk_enable(). 1464 * for preventing a race with clk_enable().
1240 */ 1465 */
1241 if (clk->prepare_count) { 1466 if (core->prepare_count) {
1242 clk_disable(clk); 1467 clk_core_disable(core);
1243 clk_disable(old_parent); 1468 clk_core_disable(old_parent);
1244 __clk_unprepare(old_parent); 1469 clk_core_unprepare(old_parent);
1245 } 1470 }
1246} 1471}
1247 1472
1248static int __clk_set_parent(struct clk *clk, struct clk *parent, u8 p_index) 1473static int __clk_set_parent(struct clk_core *clk, struct clk_core *parent,
1474 u8 p_index)
1249{ 1475{
1250 unsigned long flags; 1476 unsigned long flags;
1251 int ret = 0; 1477 int ret = 0;
1252 struct clk *old_parent; 1478 struct clk_core *old_parent;
1253 1479
1254 old_parent = __clk_set_parent_before(clk, parent); 1480 old_parent = __clk_set_parent_before(clk, parent);
1255 1481
@@ -1263,9 +1489,9 @@ static int __clk_set_parent(struct clk *clk, struct clk *parent, u8 p_index)
1263 clk_enable_unlock(flags); 1489 clk_enable_unlock(flags);
1264 1490
1265 if (clk->prepare_count) { 1491 if (clk->prepare_count) {
1266 clk_disable(clk); 1492 clk_core_disable(clk);
1267 clk_disable(parent); 1493 clk_core_disable(parent);
1268 __clk_unprepare(parent); 1494 clk_core_unprepare(parent);
1269 } 1495 }
1270 return ret; 1496 return ret;
1271 } 1497 }
@@ -1291,9 +1517,10 @@ static int __clk_set_parent(struct clk *clk, struct clk *parent, u8 p_index)
1291 * 1517 *
1292 * Caller must hold prepare_lock. 1518 * Caller must hold prepare_lock.
1293 */ 1519 */
1294static int __clk_speculate_rates(struct clk *clk, unsigned long parent_rate) 1520static int __clk_speculate_rates(struct clk_core *clk,
1521 unsigned long parent_rate)
1295{ 1522{
1296 struct clk *child; 1523 struct clk_core *child;
1297 unsigned long new_rate; 1524 unsigned long new_rate;
1298 int ret = NOTIFY_DONE; 1525 int ret = NOTIFY_DONE;
1299 1526
@@ -1319,10 +1546,10 @@ out:
1319 return ret; 1546 return ret;
1320} 1547}
1321 1548
1322static void clk_calc_subtree(struct clk *clk, unsigned long new_rate, 1549static void clk_calc_subtree(struct clk_core *clk, unsigned long new_rate,
1323 struct clk *new_parent, u8 p_index) 1550 struct clk_core *new_parent, u8 p_index)
1324{ 1551{
1325 struct clk *child; 1552 struct clk_core *child;
1326 1553
1327 clk->new_rate = new_rate; 1554 clk->new_rate = new_rate;
1328 clk->new_parent = new_parent; 1555 clk->new_parent = new_parent;
@@ -1342,13 +1569,16 @@ static void clk_calc_subtree(struct clk *clk, unsigned long new_rate,
1342 * calculate the new rates returning the topmost clock that has to be 1569 * calculate the new rates returning the topmost clock that has to be
1343 * changed. 1570 * changed.
1344 */ 1571 */
1345static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate) 1572static struct clk_core *clk_calc_new_rates(struct clk_core *clk,
1573 unsigned long rate)
1346{ 1574{
1347 struct clk *top = clk; 1575 struct clk_core *top = clk;
1348 struct clk *old_parent, *parent; 1576 struct clk_core *old_parent, *parent;
1349 struct clk_hw *parent_hw; 1577 struct clk_hw *parent_hw;
1350 unsigned long best_parent_rate = 0; 1578 unsigned long best_parent_rate = 0;
1351 unsigned long new_rate; 1579 unsigned long new_rate;
1580 unsigned long min_rate;
1581 unsigned long max_rate;
1352 int p_index = 0; 1582 int p_index = 0;
1353 1583
1354 /* sanity */ 1584 /* sanity */
@@ -1360,16 +1590,22 @@ static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate)
1360 if (parent) 1590 if (parent)
1361 best_parent_rate = parent->rate; 1591 best_parent_rate = parent->rate;
1362 1592
1593 clk_core_get_boundaries(clk, &min_rate, &max_rate);
1594
1363 /* find the closest rate and parent clk/rate */ 1595 /* find the closest rate and parent clk/rate */
1364 if (clk->ops->determine_rate) { 1596 if (clk->ops->determine_rate) {
1365 parent_hw = parent ? parent->hw : NULL; 1597 parent_hw = parent ? parent->hw : NULL;
1366 new_rate = clk->ops->determine_rate(clk->hw, rate, 1598 new_rate = clk->ops->determine_rate(clk->hw, rate,
1599 min_rate,
1600 max_rate,
1367 &best_parent_rate, 1601 &best_parent_rate,
1368 &parent_hw); 1602 &parent_hw);
1369 parent = parent_hw ? parent_hw->clk : NULL; 1603 parent = parent_hw ? parent_hw->core : NULL;
1370 } else if (clk->ops->round_rate) { 1604 } else if (clk->ops->round_rate) {
1371 new_rate = clk->ops->round_rate(clk->hw, rate, 1605 new_rate = clk->ops->round_rate(clk->hw, rate,
1372 &best_parent_rate); 1606 &best_parent_rate);
1607 if (new_rate < min_rate || new_rate > max_rate)
1608 return NULL;
1373 } else if (!parent || !(clk->flags & CLK_SET_RATE_PARENT)) { 1609 } else if (!parent || !(clk->flags & CLK_SET_RATE_PARENT)) {
1374 /* pass-through clock without adjustable parent */ 1610 /* pass-through clock without adjustable parent */
1375 clk->new_rate = clk->rate; 1611 clk->new_rate = clk->rate;
@@ -1390,7 +1626,7 @@ static struct clk *clk_calc_new_rates(struct clk *clk, unsigned long rate)
1390 } 1626 }
1391 1627
1392 /* try finding the new parent index */ 1628 /* try finding the new parent index */
1393 if (parent) { 1629 if (parent && clk->num_parents > 1) {
1394 p_index = clk_fetch_parent_index(clk, parent); 1630 p_index = clk_fetch_parent_index(clk, parent);
1395 if (p_index < 0) { 1631 if (p_index < 0) {
1396 pr_debug("%s: clk %s can not be parent of clk %s\n", 1632 pr_debug("%s: clk %s can not be parent of clk %s\n",
@@ -1414,9 +1650,10 @@ out:
1414 * so that in case of an error we can walk down the whole tree again and 1650 * so that in case of an error we can walk down the whole tree again and
1415 * abort the change. 1651 * abort the change.
1416 */ 1652 */
1417static struct clk *clk_propagate_rate_change(struct clk *clk, unsigned long event) 1653static struct clk_core *clk_propagate_rate_change(struct clk_core *clk,
1654 unsigned long event)
1418{ 1655{
1419 struct clk *child, *tmp_clk, *fail_clk = NULL; 1656 struct clk_core *child, *tmp_clk, *fail_clk = NULL;
1420 int ret = NOTIFY_DONE; 1657 int ret = NOTIFY_DONE;
1421 1658
1422 if (clk->rate == clk->new_rate) 1659 if (clk->rate == clk->new_rate)
@@ -1451,14 +1688,14 @@ static struct clk *clk_propagate_rate_change(struct clk *clk, unsigned long even
1451 * walk down a subtree and set the new rates notifying the rate 1688 * walk down a subtree and set the new rates notifying the rate
1452 * change on the way 1689 * change on the way
1453 */ 1690 */
1454static void clk_change_rate(struct clk *clk) 1691static void clk_change_rate(struct clk_core *clk)
1455{ 1692{
1456 struct clk *child; 1693 struct clk_core *child;
1457 struct hlist_node *tmp; 1694 struct hlist_node *tmp;
1458 unsigned long old_rate; 1695 unsigned long old_rate;
1459 unsigned long best_parent_rate = 0; 1696 unsigned long best_parent_rate = 0;
1460 bool skip_set_rate = false; 1697 bool skip_set_rate = false;
1461 struct clk *old_parent; 1698 struct clk_core *old_parent;
1462 1699
1463 old_rate = clk->rate; 1700 old_rate = clk->rate;
1464 1701
@@ -1506,6 +1743,45 @@ static void clk_change_rate(struct clk *clk)
1506 clk_change_rate(clk->new_child); 1743 clk_change_rate(clk->new_child);
1507} 1744}
1508 1745
1746static int clk_core_set_rate_nolock(struct clk_core *clk,
1747 unsigned long req_rate)
1748{
1749 struct clk_core *top, *fail_clk;
1750 unsigned long rate = req_rate;
1751 int ret = 0;
1752
1753 if (!clk)
1754 return 0;
1755
1756 /* bail early if nothing to do */
1757 if (rate == clk_core_get_rate_nolock(clk))
1758 return 0;
1759
1760 if ((clk->flags & CLK_SET_RATE_GATE) && clk->prepare_count)
1761 return -EBUSY;
1762
1763 /* calculate new rates and get the topmost changed clock */
1764 top = clk_calc_new_rates(clk, rate);
1765 if (!top)
1766 return -EINVAL;
1767
1768 /* notify that we are about to change rates */
1769 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE);
1770 if (fail_clk) {
1771 pr_debug("%s: failed to set %s rate\n", __func__,
1772 fail_clk->name);
1773 clk_propagate_rate_change(top, ABORT_RATE_CHANGE);
1774 return -EBUSY;
1775 }
1776
1777 /* change the rates */
1778 clk_change_rate(top);
1779
1780 clk->req_rate = req_rate;
1781
1782 return ret;
1783}
1784
1509/** 1785/**
1510 * clk_set_rate - specify a new rate for clk 1786 * clk_set_rate - specify a new rate for clk
1511 * @clk: the clk whose rate is being changed 1787 * @clk: the clk whose rate is being changed
@@ -1529,8 +1805,7 @@ static void clk_change_rate(struct clk *clk)
1529 */ 1805 */
1530int clk_set_rate(struct clk *clk, unsigned long rate) 1806int clk_set_rate(struct clk *clk, unsigned long rate)
1531{ 1807{
1532 struct clk *top, *fail_clk; 1808 int ret;
1533 int ret = 0;
1534 1809
1535 if (!clk) 1810 if (!clk)
1536 return 0; 1811 return 0;
@@ -1538,41 +1813,81 @@ int clk_set_rate(struct clk *clk, unsigned long rate)
1538 /* prevent racing with updates to the clock topology */ 1813 /* prevent racing with updates to the clock topology */
1539 clk_prepare_lock(); 1814 clk_prepare_lock();
1540 1815
1541 /* bail early if nothing to do */ 1816 ret = clk_core_set_rate_nolock(clk->core, rate);
1542 if (rate == clk_get_rate(clk))
1543 goto out;
1544 1817
1545 if ((clk->flags & CLK_SET_RATE_GATE) && clk->prepare_count) { 1818 clk_prepare_unlock();
1546 ret = -EBUSY;
1547 goto out;
1548 }
1549 1819
1550 /* calculate new rates and get the topmost changed clock */ 1820 return ret;
1551 top = clk_calc_new_rates(clk, rate); 1821}
1552 if (!top) { 1822EXPORT_SYMBOL_GPL(clk_set_rate);
1553 ret = -EINVAL;
1554 goto out;
1555 }
1556 1823
1557 /* notify that we are about to change rates */ 1824/**
1558 fail_clk = clk_propagate_rate_change(top, PRE_RATE_CHANGE); 1825 * clk_set_rate_range - set a rate range for a clock source
1559 if (fail_clk) { 1826 * @clk: clock source
1560 pr_debug("%s: failed to set %s rate\n", __func__, 1827 * @min: desired minimum clock rate in Hz, inclusive
1561 fail_clk->name); 1828 * @max: desired maximum clock rate in Hz, inclusive
1562 clk_propagate_rate_change(top, ABORT_RATE_CHANGE); 1829 *
1563 ret = -EBUSY; 1830 * Returns success (0) or negative errno.
1564 goto out; 1831 */
1832int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max)
1833{
1834 int ret = 0;
1835
1836 if (!clk)
1837 return 0;
1838
1839 if (min > max) {
1840 pr_err("%s: clk %s dev %s con %s: invalid range [%lu, %lu]\n",
1841 __func__, clk->core->name, clk->dev_id, clk->con_id,
1842 min, max);
1843 return -EINVAL;
1565 } 1844 }
1566 1845
1567 /* change the rates */ 1846 clk_prepare_lock();
1568 clk_change_rate(top); 1847
1848 if (min != clk->min_rate || max != clk->max_rate) {
1849 clk->min_rate = min;
1850 clk->max_rate = max;
1851 ret = clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
1852 }
1569 1853
1570out:
1571 clk_prepare_unlock(); 1854 clk_prepare_unlock();
1572 1855
1573 return ret; 1856 return ret;
1574} 1857}
1575EXPORT_SYMBOL_GPL(clk_set_rate); 1858EXPORT_SYMBOL_GPL(clk_set_rate_range);
1859
1860/**
1861 * clk_set_min_rate - set a minimum clock rate for a clock source
1862 * @clk: clock source
1863 * @rate: desired minimum clock rate in Hz, inclusive
1864 *
1865 * Returns success (0) or negative errno.
1866 */
1867int clk_set_min_rate(struct clk *clk, unsigned long rate)
1868{
1869 if (!clk)
1870 return 0;
1871
1872 return clk_set_rate_range(clk, rate, clk->max_rate);
1873}
1874EXPORT_SYMBOL_GPL(clk_set_min_rate);
1875
1876/**
1877 * clk_set_max_rate - set a maximum clock rate for a clock source
1878 * @clk: clock source
1879 * @rate: desired maximum clock rate in Hz, inclusive
1880 *
1881 * Returns success (0) or negative errno.
1882 */
1883int clk_set_max_rate(struct clk *clk, unsigned long rate)
1884{
1885 if (!clk)
1886 return 0;
1887
1888 return clk_set_rate_range(clk, clk->min_rate, rate);
1889}
1890EXPORT_SYMBOL_GPL(clk_set_max_rate);
1576 1891
1577/** 1892/**
1578 * clk_get_parent - return the parent of a clk 1893 * clk_get_parent - return the parent of a clk
@@ -1599,11 +1914,11 @@ EXPORT_SYMBOL_GPL(clk_get_parent);
1599 * 1914 *
1600 * For single-parent clocks without .get_parent, first check to see if the 1915 * For single-parent clocks without .get_parent, first check to see if the
1601 * .parents array exists, and if so use it to avoid an expensive tree 1916 * .parents array exists, and if so use it to avoid an expensive tree
1602 * traversal. If .parents does not exist then walk the tree with __clk_lookup. 1917 * traversal. If .parents does not exist then walk the tree.
1603 */ 1918 */
1604static struct clk *__clk_init_parent(struct clk *clk) 1919static struct clk_core *__clk_init_parent(struct clk_core *clk)
1605{ 1920{
1606 struct clk *ret = NULL; 1921 struct clk_core *ret = NULL;
1607 u8 index; 1922 u8 index;
1608 1923
1609 /* handle the trivial cases */ 1924 /* handle the trivial cases */
@@ -1613,7 +1928,7 @@ static struct clk *__clk_init_parent(struct clk *clk)
1613 1928
1614 if (clk->num_parents == 1) { 1929 if (clk->num_parents == 1) {
1615 if (IS_ERR_OR_NULL(clk->parent)) 1930 if (IS_ERR_OR_NULL(clk->parent))
1616 clk->parent = __clk_lookup(clk->parent_names[0]); 1931 clk->parent = clk_core_lookup(clk->parent_names[0]);
1617 ret = clk->parent; 1932 ret = clk->parent;
1618 goto out; 1933 goto out;
1619 } 1934 }
@@ -1627,8 +1942,8 @@ static struct clk *__clk_init_parent(struct clk *clk)
1627 1942
1628 /* 1943 /*
1629 * Do our best to cache parent clocks in clk->parents. This prevents 1944 * Do our best to cache parent clocks in clk->parents. This prevents
1630 * unnecessary and expensive calls to __clk_lookup. We don't set 1945 * unnecessary and expensive lookups. We don't set clk->parent here;
1631 * clk->parent here; that is done by the calling function 1946 * that is done by the calling function.
1632 */ 1947 */
1633 1948
1634 index = clk->ops->get_parent(clk->hw); 1949 index = clk->ops->get_parent(clk->hw);
@@ -1638,13 +1953,14 @@ static struct clk *__clk_init_parent(struct clk *clk)
1638 kcalloc(clk->num_parents, sizeof(struct clk *), 1953 kcalloc(clk->num_parents, sizeof(struct clk *),
1639 GFP_KERNEL); 1954 GFP_KERNEL);
1640 1955
1641 ret = clk_get_parent_by_index(clk, index); 1956 ret = clk_core_get_parent_by_index(clk, index);
1642 1957
1643out: 1958out:
1644 return ret; 1959 return ret;
1645} 1960}
1646 1961
1647void __clk_reparent(struct clk *clk, struct clk *new_parent) 1962static void clk_core_reparent(struct clk_core *clk,
1963 struct clk_core *new_parent)
1648{ 1964{
1649 clk_reparent(clk, new_parent); 1965 clk_reparent(clk, new_parent);
1650 __clk_recalc_accuracies(clk); 1966 __clk_recalc_accuracies(clk);
@@ -1652,23 +1968,40 @@ void __clk_reparent(struct clk *clk, struct clk *new_parent)
1652} 1968}
1653 1969
1654/** 1970/**
1655 * clk_set_parent - switch the parent of a mux clk 1971 * clk_has_parent - check if a clock is a possible parent for another
1656 * @clk: the mux clk whose input we are switching 1972 * @clk: clock source
1657 * @parent: the new input to clk 1973 * @parent: parent clock source
1658 * 1974 *
1659 * Re-parent clk to use parent as its new input source. If clk is in 1975 * This function can be used in drivers that need to check that a clock can be
1660 * prepared state, the clk will get enabled for the duration of this call. If 1976 * the parent of another without actually changing the parent.
1661 * that's not acceptable for a specific clk (Eg: the consumer can't handle
1662 * that, the reparenting is glitchy in hardware, etc), use the
1663 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
1664 *
1665 * After successfully changing clk's parent clk_set_parent will update the
1666 * clk topology, sysfs topology and propagate rate recalculation via
1667 * __clk_recalc_rates.
1668 * 1977 *
1669 * Returns 0 on success, -EERROR otherwise. 1978 * Returns true if @parent is a possible parent for @clk, false otherwise.
1670 */ 1979 */
1671int clk_set_parent(struct clk *clk, struct clk *parent) 1980bool clk_has_parent(struct clk *clk, struct clk *parent)
1981{
1982 struct clk_core *core, *parent_core;
1983 unsigned int i;
1984
1985 /* NULL clocks should be nops, so return success if either is NULL. */
1986 if (!clk || !parent)
1987 return true;
1988
1989 core = clk->core;
1990 parent_core = parent->core;
1991
1992 /* Optimize for the case where the parent is already the parent. */
1993 if (core->parent == parent_core)
1994 return true;
1995
1996 for (i = 0; i < core->num_parents; i++)
1997 if (strcmp(core->parent_names[i], parent_core->name) == 0)
1998 return true;
1999
2000 return false;
2001}
2002EXPORT_SYMBOL_GPL(clk_has_parent);
2003
2004static int clk_core_set_parent(struct clk_core *clk, struct clk_core *parent)
1672{ 2005{
1673 int ret = 0; 2006 int ret = 0;
1674 int p_index = 0; 2007 int p_index = 0;
@@ -1728,6 +2061,31 @@ out:
1728 2061
1729 return ret; 2062 return ret;
1730} 2063}
2064
2065/**
2066 * clk_set_parent - switch the parent of a mux clk
2067 * @clk: the mux clk whose input we are switching
2068 * @parent: the new input to clk
2069 *
2070 * Re-parent clk to use parent as its new input source. If clk is in
2071 * prepared state, the clk will get enabled for the duration of this call. If
2072 * that's not acceptable for a specific clk (Eg: the consumer can't handle
2073 * that, the reparenting is glitchy in hardware, etc), use the
2074 * CLK_SET_PARENT_GATE flag to allow reparenting only when clk is unprepared.
2075 *
2076 * After successfully changing clk's parent clk_set_parent will update the
2077 * clk topology, sysfs topology and propagate rate recalculation via
2078 * __clk_recalc_rates.
2079 *
2080 * Returns 0 on success, -EERROR otherwise.
2081 */
2082int clk_set_parent(struct clk *clk, struct clk *parent)
2083{
2084 if (!clk)
2085 return 0;
2086
2087 return clk_core_set_parent(clk->core, parent ? parent->core : NULL);
2088}
1731EXPORT_SYMBOL_GPL(clk_set_parent); 2089EXPORT_SYMBOL_GPL(clk_set_parent);
1732 2090
1733/** 2091/**
@@ -1764,13 +2122,13 @@ int clk_set_phase(struct clk *clk, int degrees)
1764 2122
1765 clk_prepare_lock(); 2123 clk_prepare_lock();
1766 2124
1767 if (!clk->ops->set_phase) 2125 if (!clk->core->ops->set_phase)
1768 goto out_unlock; 2126 goto out_unlock;
1769 2127
1770 ret = clk->ops->set_phase(clk->hw, degrees); 2128 ret = clk->core->ops->set_phase(clk->core->hw, degrees);
1771 2129
1772 if (!ret) 2130 if (!ret)
1773 clk->phase = degrees; 2131 clk->core->phase = degrees;
1774 2132
1775out_unlock: 2133out_unlock:
1776 clk_prepare_unlock(); 2134 clk_prepare_unlock();
@@ -1778,15 +2136,9 @@ out_unlock:
1778out: 2136out:
1779 return ret; 2137 return ret;
1780} 2138}
2139EXPORT_SYMBOL_GPL(clk_set_phase);
1781 2140
1782/** 2141static int clk_core_get_phase(struct clk_core *clk)
1783 * clk_get_phase - return the phase shift of a clock signal
1784 * @clk: clock signal source
1785 *
1786 * Returns the phase shift of a clock node in degrees, otherwise returns
1787 * -EERROR.
1788 */
1789int clk_get_phase(struct clk *clk)
1790{ 2142{
1791 int ret = 0; 2143 int ret = 0;
1792 2144
@@ -1800,28 +2152,74 @@ int clk_get_phase(struct clk *clk)
1800out: 2152out:
1801 return ret; 2153 return ret;
1802} 2154}
2155EXPORT_SYMBOL_GPL(clk_get_phase);
2156
2157/**
2158 * clk_get_phase - return the phase shift of a clock signal
2159 * @clk: clock signal source
2160 *
2161 * Returns the phase shift of a clock node in degrees, otherwise returns
2162 * -EERROR.
2163 */
2164int clk_get_phase(struct clk *clk)
2165{
2166 if (!clk)
2167 return 0;
2168
2169 return clk_core_get_phase(clk->core);
2170}
2171
2172/**
2173 * clk_is_match - check if two clk's point to the same hardware clock
2174 * @p: clk compared against q
2175 * @q: clk compared against p
2176 *
2177 * Returns true if the two struct clk pointers both point to the same hardware
2178 * clock node. Put differently, returns true if struct clk *p and struct clk *q
2179 * share the same struct clk_core object.
2180 *
2181 * Returns false otherwise. Note that two NULL clks are treated as matching.
2182 */
2183bool clk_is_match(const struct clk *p, const struct clk *q)
2184{
2185 /* trivial case: identical struct clk's or both NULL */
2186 if (p == q)
2187 return true;
2188
2189 /* true if clk->core pointers match. Avoid derefing garbage */
2190 if (!IS_ERR_OR_NULL(p) && !IS_ERR_OR_NULL(q))
2191 if (p->core == q->core)
2192 return true;
2193
2194 return false;
2195}
2196EXPORT_SYMBOL_GPL(clk_is_match);
1803 2197
1804/** 2198/**
1805 * __clk_init - initialize the data structures in a struct clk 2199 * __clk_init - initialize the data structures in a struct clk
1806 * @dev: device initializing this clk, placeholder for now 2200 * @dev: device initializing this clk, placeholder for now
1807 * @clk: clk being initialized 2201 * @clk: clk being initialized
1808 * 2202 *
1809 * Initializes the lists in struct clk, queries the hardware for the 2203 * Initializes the lists in struct clk_core, queries the hardware for the
1810 * parent and rate and sets them both. 2204 * parent and rate and sets them both.
1811 */ 2205 */
1812int __clk_init(struct device *dev, struct clk *clk) 2206static int __clk_init(struct device *dev, struct clk *clk_user)
1813{ 2207{
1814 int i, ret = 0; 2208 int i, ret = 0;
1815 struct clk *orphan; 2209 struct clk_core *orphan;
1816 struct hlist_node *tmp2; 2210 struct hlist_node *tmp2;
2211 struct clk_core *clk;
2212 unsigned long rate;
1817 2213
1818 if (!clk) 2214 if (!clk_user)
1819 return -EINVAL; 2215 return -EINVAL;
1820 2216
2217 clk = clk_user->core;
2218
1821 clk_prepare_lock(); 2219 clk_prepare_lock();
1822 2220
1823 /* check to see if a clock with this name is already registered */ 2221 /* check to see if a clock with this name is already registered */
1824 if (__clk_lookup(clk->name)) { 2222 if (clk_core_lookup(clk->name)) {
1825 pr_debug("%s: clk %s already initialized\n", 2223 pr_debug("%s: clk %s already initialized\n",
1826 __func__, clk->name); 2224 __func__, clk->name);
1827 ret = -EEXIST; 2225 ret = -EEXIST;
@@ -1873,7 +2271,7 @@ int __clk_init(struct device *dev, struct clk *clk)
1873 clk->parents = kcalloc(clk->num_parents, sizeof(struct clk *), 2271 clk->parents = kcalloc(clk->num_parents, sizeof(struct clk *),
1874 GFP_KERNEL); 2272 GFP_KERNEL);
1875 /* 2273 /*
1876 * __clk_lookup returns NULL for parents that have not been 2274 * clk_core_lookup returns NULL for parents that have not been
1877 * clk_init'd; thus any access to clk->parents[] must check 2275 * clk_init'd; thus any access to clk->parents[] must check
1878 * for a NULL pointer. We can always perform lazy lookups for 2276 * for a NULL pointer. We can always perform lazy lookups for
1879 * missing parents later on. 2277 * missing parents later on.
@@ -1881,7 +2279,7 @@ int __clk_init(struct device *dev, struct clk *clk)
1881 if (clk->parents) 2279 if (clk->parents)
1882 for (i = 0; i < clk->num_parents; i++) 2280 for (i = 0; i < clk->num_parents; i++)
1883 clk->parents[i] = 2281 clk->parents[i] =
1884 __clk_lookup(clk->parent_names[i]); 2282 clk_core_lookup(clk->parent_names[i]);
1885 } 2283 }
1886 2284
1887 clk->parent = __clk_init_parent(clk); 2285 clk->parent = __clk_init_parent(clk);
@@ -1936,12 +2334,13 @@ int __clk_init(struct device *dev, struct clk *clk)
1936 * then rate is set to zero. 2334 * then rate is set to zero.
1937 */ 2335 */
1938 if (clk->ops->recalc_rate) 2336 if (clk->ops->recalc_rate)
1939 clk->rate = clk->ops->recalc_rate(clk->hw, 2337 rate = clk->ops->recalc_rate(clk->hw,
1940 __clk_get_rate(clk->parent)); 2338 clk_core_get_rate_nolock(clk->parent));
1941 else if (clk->parent) 2339 else if (clk->parent)
1942 clk->rate = clk->parent->rate; 2340 rate = clk->parent->rate;
1943 else 2341 else
1944 clk->rate = 0; 2342 rate = 0;
2343 clk->rate = clk->req_rate = rate;
1945 2344
1946 /* 2345 /*
1947 * walk the list of orphan clocks and reparent any that are children of 2346 * walk the list of orphan clocks and reparent any that are children of
@@ -1951,13 +2350,13 @@ int __clk_init(struct device *dev, struct clk *clk)
1951 if (orphan->num_parents && orphan->ops->get_parent) { 2350 if (orphan->num_parents && orphan->ops->get_parent) {
1952 i = orphan->ops->get_parent(orphan->hw); 2351 i = orphan->ops->get_parent(orphan->hw);
1953 if (!strcmp(clk->name, orphan->parent_names[i])) 2352 if (!strcmp(clk->name, orphan->parent_names[i]))
1954 __clk_reparent(orphan, clk); 2353 clk_core_reparent(orphan, clk);
1955 continue; 2354 continue;
1956 } 2355 }
1957 2356
1958 for (i = 0; i < orphan->num_parents; i++) 2357 for (i = 0; i < orphan->num_parents; i++)
1959 if (!strcmp(clk->name, orphan->parent_names[i])) { 2358 if (!strcmp(clk->name, orphan->parent_names[i])) {
1960 __clk_reparent(orphan, clk); 2359 clk_core_reparent(orphan, clk);
1961 break; 2360 break;
1962 } 2361 }
1963 } 2362 }
@@ -1983,47 +2382,39 @@ out:
1983 return ret; 2382 return ret;
1984} 2383}
1985 2384
1986/** 2385struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
1987 * __clk_register - register a clock and return a cookie. 2386 const char *con_id)
1988 *
1989 * Same as clk_register, except that the .clk field inside hw shall point to a
1990 * preallocated (generally statically allocated) struct clk. None of the fields
1991 * of the struct clk need to be initialized.
1992 *
1993 * The data pointed to by .init and .clk field shall NOT be marked as init
1994 * data.
1995 *
1996 * __clk_register is only exposed via clk-private.h and is intended for use with
1997 * very large numbers of clocks that need to be statically initialized. It is
1998 * a layering violation to include clk-private.h from any code which implements
1999 * a clock's .ops; as such any statically initialized clock data MUST be in a
2000 * separate C file from the logic that implements its operations. Returns 0
2001 * on success, otherwise an error code.
2002 */
2003struct clk *__clk_register(struct device *dev, struct clk_hw *hw)
2004{ 2387{
2005 int ret;
2006 struct clk *clk; 2388 struct clk *clk;
2007 2389
2008 clk = hw->clk; 2390 /* This is to allow this function to be chained to others */
2009 clk->name = hw->init->name; 2391 if (!hw || IS_ERR(hw))
2010 clk->ops = hw->init->ops; 2392 return (struct clk *) hw;
2011 clk->hw = hw;
2012 clk->flags = hw->init->flags;
2013 clk->parent_names = hw->init->parent_names;
2014 clk->num_parents = hw->init->num_parents;
2015 if (dev && dev->driver)
2016 clk->owner = dev->driver->owner;
2017 else
2018 clk->owner = NULL;
2019 2393
2020 ret = __clk_init(dev, clk); 2394 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2021 if (ret) 2395 if (!clk)
2022 return ERR_PTR(ret); 2396 return ERR_PTR(-ENOMEM);
2397
2398 clk->core = hw->core;
2399 clk->dev_id = dev_id;
2400 clk->con_id = con_id;
2401 clk->max_rate = ULONG_MAX;
2402
2403 clk_prepare_lock();
2404 hlist_add_head(&clk->child_node, &hw->core->clks);
2405 clk_prepare_unlock();
2023 2406
2024 return clk; 2407 return clk;
2025} 2408}
2026EXPORT_SYMBOL_GPL(__clk_register); 2409
2410void __clk_free_clk(struct clk *clk)
2411{
2412 clk_prepare_lock();
2413 hlist_del(&clk->child_node);
2414 clk_prepare_unlock();
2415
2416 kfree(clk);
2417}
2027 2418
2028/** 2419/**
2029 * clk_register - allocate a new clock, register it and return an opaque cookie 2420 * clk_register - allocate a new clock, register it and return an opaque cookie
@@ -2039,7 +2430,7 @@ EXPORT_SYMBOL_GPL(__clk_register);
2039struct clk *clk_register(struct device *dev, struct clk_hw *hw) 2430struct clk *clk_register(struct device *dev, struct clk_hw *hw)
2040{ 2431{
2041 int i, ret; 2432 int i, ret;
2042 struct clk *clk; 2433 struct clk_core *clk;
2043 2434
2044 clk = kzalloc(sizeof(*clk), GFP_KERNEL); 2435 clk = kzalloc(sizeof(*clk), GFP_KERNEL);
2045 if (!clk) { 2436 if (!clk) {
@@ -2060,7 +2451,7 @@ struct clk *clk_register(struct device *dev, struct clk_hw *hw)
2060 clk->hw = hw; 2451 clk->hw = hw;
2061 clk->flags = hw->init->flags; 2452 clk->flags = hw->init->flags;
2062 clk->num_parents = hw->init->num_parents; 2453 clk->num_parents = hw->init->num_parents;
2063 hw->clk = clk; 2454 hw->core = clk;
2064 2455
2065 /* allocate local copy in case parent_names is __initdata */ 2456 /* allocate local copy in case parent_names is __initdata */
2066 clk->parent_names = kcalloc(clk->num_parents, sizeof(char *), 2457 clk->parent_names = kcalloc(clk->num_parents, sizeof(char *),
@@ -2084,9 +2475,21 @@ struct clk *clk_register(struct device *dev, struct clk_hw *hw)
2084 } 2475 }
2085 } 2476 }
2086 2477
2087 ret = __clk_init(dev, clk); 2478 INIT_HLIST_HEAD(&clk->clks);
2479
2480 hw->clk = __clk_create_clk(hw, NULL, NULL);
2481 if (IS_ERR(hw->clk)) {
2482 pr_err("%s: could not allocate per-user clk\n", __func__);
2483 ret = PTR_ERR(hw->clk);
2484 goto fail_parent_names_copy;
2485 }
2486
2487 ret = __clk_init(dev, hw->clk);
2088 if (!ret) 2488 if (!ret)
2089 return clk; 2489 return hw->clk;
2490
2491 __clk_free_clk(hw->clk);
2492 hw->clk = NULL;
2090 2493
2091fail_parent_names_copy: 2494fail_parent_names_copy:
2092 while (--i >= 0) 2495 while (--i >= 0)
@@ -2107,7 +2510,7 @@ EXPORT_SYMBOL_GPL(clk_register);
2107 */ 2510 */
2108static void __clk_release(struct kref *ref) 2511static void __clk_release(struct kref *ref)
2109{ 2512{
2110 struct clk *clk = container_of(ref, struct clk, ref); 2513 struct clk_core *clk = container_of(ref, struct clk_core, ref);
2111 int i = clk->num_parents; 2514 int i = clk->num_parents;
2112 2515
2113 kfree(clk->parents); 2516 kfree(clk->parents);
@@ -2165,12 +2568,13 @@ void clk_unregister(struct clk *clk)
2165 if (!clk || WARN_ON_ONCE(IS_ERR(clk))) 2568 if (!clk || WARN_ON_ONCE(IS_ERR(clk)))
2166 return; 2569 return;
2167 2570
2168 clk_debug_unregister(clk); 2571 clk_debug_unregister(clk->core);
2169 2572
2170 clk_prepare_lock(); 2573 clk_prepare_lock();
2171 2574
2172 if (clk->ops == &clk_nodrv_ops) { 2575 if (clk->core->ops == &clk_nodrv_ops) {
2173 pr_err("%s: unregistered clock: %s\n", __func__, clk->name); 2576 pr_err("%s: unregistered clock: %s\n", __func__,
2577 clk->core->name);
2174 return; 2578 return;
2175 } 2579 }
2176 /* 2580 /*
@@ -2178,24 +2582,25 @@ void clk_unregister(struct clk *clk)
2178 * a reference to this clock. 2582 * a reference to this clock.
2179 */ 2583 */
2180 flags = clk_enable_lock(); 2584 flags = clk_enable_lock();
2181 clk->ops = &clk_nodrv_ops; 2585 clk->core->ops = &clk_nodrv_ops;
2182 clk_enable_unlock(flags); 2586 clk_enable_unlock(flags);
2183 2587
2184 if (!hlist_empty(&clk->children)) { 2588 if (!hlist_empty(&clk->core->children)) {
2185 struct clk *child; 2589 struct clk_core *child;
2186 struct hlist_node *t; 2590 struct hlist_node *t;
2187 2591
2188 /* Reparent all children to the orphan list. */ 2592 /* Reparent all children to the orphan list. */
2189 hlist_for_each_entry_safe(child, t, &clk->children, child_node) 2593 hlist_for_each_entry_safe(child, t, &clk->core->children,
2190 clk_set_parent(child, NULL); 2594 child_node)
2595 clk_core_set_parent(child, NULL);
2191 } 2596 }
2192 2597
2193 hlist_del_init(&clk->child_node); 2598 hlist_del_init(&clk->core->child_node);
2194 2599
2195 if (clk->prepare_count) 2600 if (clk->core->prepare_count)
2196 pr_warn("%s: unregistering prepared clock: %s\n", 2601 pr_warn("%s: unregistering prepared clock: %s\n",
2197 __func__, clk->name); 2602 __func__, clk->core->name);
2198 kref_put(&clk->ref, __clk_release); 2603 kref_put(&clk->core->ref, __clk_release);
2199 2604
2200 clk_prepare_unlock(); 2605 clk_prepare_unlock();
2201} 2606}
@@ -2263,11 +2668,13 @@ EXPORT_SYMBOL_GPL(devm_clk_unregister);
2263 */ 2668 */
2264int __clk_get(struct clk *clk) 2669int __clk_get(struct clk *clk)
2265{ 2670{
2266 if (clk) { 2671 struct clk_core *core = !clk ? NULL : clk->core;
2267 if (!try_module_get(clk->owner)) 2672
2673 if (core) {
2674 if (!try_module_get(core->owner))
2268 return 0; 2675 return 0;
2269 2676
2270 kref_get(&clk->ref); 2677 kref_get(&core->ref);
2271 } 2678 }
2272 return 1; 2679 return 1;
2273} 2680}
@@ -2280,11 +2687,20 @@ void __clk_put(struct clk *clk)
2280 return; 2687 return;
2281 2688
2282 clk_prepare_lock(); 2689 clk_prepare_lock();
2283 owner = clk->owner; 2690
2284 kref_put(&clk->ref, __clk_release); 2691 hlist_del(&clk->child_node);
2692 if (clk->min_rate > clk->core->req_rate ||
2693 clk->max_rate < clk->core->req_rate)
2694 clk_core_set_rate_nolock(clk->core, clk->core->req_rate);
2695
2696 owner = clk->core->owner;
2697 kref_put(&clk->core->ref, __clk_release);
2698
2285 clk_prepare_unlock(); 2699 clk_prepare_unlock();
2286 2700
2287 module_put(owner); 2701 module_put(owner);
2702
2703 kfree(clk);
2288} 2704}
2289 2705
2290/*** clk rate change notifiers ***/ 2706/*** clk rate change notifiers ***/
@@ -2339,7 +2755,7 @@ int clk_notifier_register(struct clk *clk, struct notifier_block *nb)
2339 2755
2340 ret = srcu_notifier_chain_register(&cn->notifier_head, nb); 2756 ret = srcu_notifier_chain_register(&cn->notifier_head, nb);
2341 2757
2342 clk->notifier_count++; 2758 clk->core->notifier_count++;
2343 2759
2344out: 2760out:
2345 clk_prepare_unlock(); 2761 clk_prepare_unlock();
@@ -2376,7 +2792,7 @@ int clk_notifier_unregister(struct clk *clk, struct notifier_block *nb)
2376 if (cn->clk == clk) { 2792 if (cn->clk == clk) {
2377 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb); 2793 ret = srcu_notifier_chain_unregister(&cn->notifier_head, nb);
2378 2794
2379 clk->notifier_count--; 2795 clk->core->notifier_count--;
2380 2796
2381 /* XXX the notifier code should handle this better */ 2797 /* XXX the notifier code should handle this better */
2382 if (!cn->notifier_head.head) { 2798 if (!cn->notifier_head.head) {
@@ -2506,7 +2922,8 @@ void of_clk_del_provider(struct device_node *np)
2506} 2922}
2507EXPORT_SYMBOL_GPL(of_clk_del_provider); 2923EXPORT_SYMBOL_GPL(of_clk_del_provider);
2508 2924
2509struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec) 2925struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
2926 const char *dev_id, const char *con_id)
2510{ 2927{
2511 struct of_clk_provider *provider; 2928 struct of_clk_provider *provider;
2512 struct clk *clk = ERR_PTR(-EPROBE_DEFER); 2929 struct clk *clk = ERR_PTR(-EPROBE_DEFER);
@@ -2515,8 +2932,17 @@ struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec)
2515 list_for_each_entry(provider, &of_clk_providers, link) { 2932 list_for_each_entry(provider, &of_clk_providers, link) {
2516 if (provider->node == clkspec->np) 2933 if (provider->node == clkspec->np)
2517 clk = provider->get(clkspec, provider->data); 2934 clk = provider->get(clkspec, provider->data);
2518 if (!IS_ERR(clk)) 2935 if (!IS_ERR(clk)) {
2936 clk = __clk_create_clk(__clk_get_hw(clk), dev_id,
2937 con_id);
2938
2939 if (!IS_ERR(clk) && !__clk_get(clk)) {
2940 __clk_free_clk(clk);
2941 clk = ERR_PTR(-ENOENT);
2942 }
2943
2519 break; 2944 break;
2945 }
2520 } 2946 }
2521 2947
2522 return clk; 2948 return clk;
@@ -2527,7 +2953,7 @@ struct clk *of_clk_get_from_provider(struct of_phandle_args *clkspec)
2527 struct clk *clk; 2953 struct clk *clk;
2528 2954
2529 mutex_lock(&of_clk_mutex); 2955 mutex_lock(&of_clk_mutex);
2530 clk = __of_clk_get_from_provider(clkspec); 2956 clk = __of_clk_get_from_provider(clkspec, NULL, __func__);
2531 mutex_unlock(&of_clk_mutex); 2957 mutex_unlock(&of_clk_mutex);
2532 2958
2533 return clk; 2959 return clk;
diff --git a/drivers/clk/clk.h b/drivers/clk/clk.h
index c798138f023f..ba845408cc3e 100644
--- a/drivers/clk/clk.h
+++ b/drivers/clk/clk.h
@@ -9,9 +9,31 @@
9 * published by the Free Software Foundation. 9 * published by the Free Software Foundation.
10 */ 10 */
11 11
12struct clk_hw;
13
12#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK) 14#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK)
13struct clk *of_clk_get_by_clkspec(struct of_phandle_args *clkspec); 15struct clk *of_clk_get_by_clkspec(struct of_phandle_args *clkspec);
14struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec); 16struct clk *__of_clk_get_from_provider(struct of_phandle_args *clkspec,
17 const char *dev_id, const char *con_id);
15void of_clk_lock(void); 18void of_clk_lock(void);
16void of_clk_unlock(void); 19void of_clk_unlock(void);
17#endif 20#endif
21
22#ifdef CONFIG_COMMON_CLK
23struct clk *__clk_create_clk(struct clk_hw *hw, const char *dev_id,
24 const char *con_id);
25void __clk_free_clk(struct clk *clk);
26#else
27/* All these casts to avoid ifdefs in clkdev... */
28static inline struct clk *
29__clk_create_clk(struct clk_hw *hw, const char *dev_id, const char *con_id)
30{
31 return (struct clk *)hw;
32}
33static inline void __clk_free_clk(struct clk *clk) { }
34static struct clk_hw *__clk_get_hw(struct clk *clk)
35{
36 return (struct clk_hw *)clk;
37}
38
39#endif
diff --git a/drivers/clk/clkdev.c b/drivers/clk/clkdev.c
index da4bda8b7fc7..043fd3633373 100644
--- a/drivers/clk/clkdev.c
+++ b/drivers/clk/clkdev.c
@@ -19,6 +19,7 @@
19#include <linux/mutex.h> 19#include <linux/mutex.h>
20#include <linux/clk.h> 20#include <linux/clk.h>
21#include <linux/clkdev.h> 21#include <linux/clkdev.h>
22#include <linux/clk-provider.h>
22#include <linux/of.h> 23#include <linux/of.h>
23 24
24#include "clk.h" 25#include "clk.h"
@@ -28,6 +29,20 @@ static DEFINE_MUTEX(clocks_mutex);
28 29
29#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK) 30#if defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK)
30 31
32static struct clk *__of_clk_get_by_clkspec(struct of_phandle_args *clkspec,
33 const char *dev_id, const char *con_id)
34{
35 struct clk *clk;
36
37 if (!clkspec)
38 return ERR_PTR(-EINVAL);
39
40 of_clk_lock();
41 clk = __of_clk_get_from_provider(clkspec, dev_id, con_id);
42 of_clk_unlock();
43 return clk;
44}
45
31/** 46/**
32 * of_clk_get_by_clkspec() - Lookup a clock form a clock provider 47 * of_clk_get_by_clkspec() - Lookup a clock form a clock provider
33 * @clkspec: pointer to a clock specifier data structure 48 * @clkspec: pointer to a clock specifier data structure
@@ -38,22 +53,11 @@ static DEFINE_MUTEX(clocks_mutex);
38 */ 53 */
39struct clk *of_clk_get_by_clkspec(struct of_phandle_args *clkspec) 54struct clk *of_clk_get_by_clkspec(struct of_phandle_args *clkspec)
40{ 55{
41 struct clk *clk; 56 return __of_clk_get_by_clkspec(clkspec, NULL, __func__);
42
43 if (!clkspec)
44 return ERR_PTR(-EINVAL);
45
46 of_clk_lock();
47 clk = __of_clk_get_from_provider(clkspec);
48
49 if (!IS_ERR(clk) && !__clk_get(clk))
50 clk = ERR_PTR(-ENOENT);
51
52 of_clk_unlock();
53 return clk;
54} 57}
55 58
56struct clk *of_clk_get(struct device_node *np, int index) 59static struct clk *__of_clk_get(struct device_node *np, int index,
60 const char *dev_id, const char *con_id)
57{ 61{
58 struct of_phandle_args clkspec; 62 struct of_phandle_args clkspec;
59 struct clk *clk; 63 struct clk *clk;
@@ -67,22 +71,21 @@ struct clk *of_clk_get(struct device_node *np, int index)
67 if (rc) 71 if (rc)
68 return ERR_PTR(rc); 72 return ERR_PTR(rc);
69 73
70 clk = of_clk_get_by_clkspec(&clkspec); 74 clk = __of_clk_get_by_clkspec(&clkspec, dev_id, con_id);
71 of_node_put(clkspec.np); 75 of_node_put(clkspec.np);
76
72 return clk; 77 return clk;
73} 78}
79
80struct clk *of_clk_get(struct device_node *np, int index)
81{
82 return __of_clk_get(np, index, np->full_name, NULL);
83}
74EXPORT_SYMBOL(of_clk_get); 84EXPORT_SYMBOL(of_clk_get);
75 85
76/** 86static struct clk *__of_clk_get_by_name(struct device_node *np,
77 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node 87 const char *dev_id,
78 * @np: pointer to clock consumer node 88 const char *name)
79 * @name: name of consumer's clock input, or NULL for the first clock reference
80 *
81 * This function parses the clocks and clock-names properties,
82 * and uses them to look up the struct clk from the registered list of clock
83 * providers.
84 */
85struct clk *of_clk_get_by_name(struct device_node *np, const char *name)
86{ 89{
87 struct clk *clk = ERR_PTR(-ENOENT); 90 struct clk *clk = ERR_PTR(-ENOENT);
88 91
@@ -97,10 +100,10 @@ struct clk *of_clk_get_by_name(struct device_node *np, const char *name)
97 */ 100 */
98 if (name) 101 if (name)
99 index = of_property_match_string(np, "clock-names", name); 102 index = of_property_match_string(np, "clock-names", name);
100 clk = of_clk_get(np, index); 103 clk = __of_clk_get(np, index, dev_id, name);
101 if (!IS_ERR(clk)) 104 if (!IS_ERR(clk)) {
102 break; 105 break;
103 else if (name && index >= 0) { 106 } else if (name && index >= 0) {
104 if (PTR_ERR(clk) != -EPROBE_DEFER) 107 if (PTR_ERR(clk) != -EPROBE_DEFER)
105 pr_err("ERROR: could not get clock %s:%s(%i)\n", 108 pr_err("ERROR: could not get clock %s:%s(%i)\n",
106 np->full_name, name ? name : "", index); 109 np->full_name, name ? name : "", index);
@@ -119,7 +122,33 @@ struct clk *of_clk_get_by_name(struct device_node *np, const char *name)
119 122
120 return clk; 123 return clk;
121} 124}
125
126/**
127 * of_clk_get_by_name() - Parse and lookup a clock referenced by a device node
128 * @np: pointer to clock consumer node
129 * @name: name of consumer's clock input, or NULL for the first clock reference
130 *
131 * This function parses the clocks and clock-names properties,
132 * and uses them to look up the struct clk from the registered list of clock
133 * providers.
134 */
135struct clk *of_clk_get_by_name(struct device_node *np, const char *name)
136{
137 if (!np)
138 return ERR_PTR(-ENOENT);
139
140 return __of_clk_get_by_name(np, np->full_name, name);
141}
122EXPORT_SYMBOL(of_clk_get_by_name); 142EXPORT_SYMBOL(of_clk_get_by_name);
143
144#else /* defined(CONFIG_OF) && defined(CONFIG_COMMON_CLK) */
145
146static struct clk *__of_clk_get_by_name(struct device_node *np,
147 const char *dev_id,
148 const char *name)
149{
150 return ERR_PTR(-ENOENT);
151}
123#endif 152#endif
124 153
125/* 154/*
@@ -168,14 +197,28 @@ static struct clk_lookup *clk_find(const char *dev_id, const char *con_id)
168struct clk *clk_get_sys(const char *dev_id, const char *con_id) 197struct clk *clk_get_sys(const char *dev_id, const char *con_id)
169{ 198{
170 struct clk_lookup *cl; 199 struct clk_lookup *cl;
200 struct clk *clk = NULL;
171 201
172 mutex_lock(&clocks_mutex); 202 mutex_lock(&clocks_mutex);
203
173 cl = clk_find(dev_id, con_id); 204 cl = clk_find(dev_id, con_id);
174 if (cl && !__clk_get(cl->clk)) 205 if (!cl)
206 goto out;
207
208 clk = __clk_create_clk(__clk_get_hw(cl->clk), dev_id, con_id);
209 if (IS_ERR(clk))
210 goto out;
211
212 if (!__clk_get(clk)) {
213 __clk_free_clk(clk);
175 cl = NULL; 214 cl = NULL;
215 goto out;
216 }
217
218out:
176 mutex_unlock(&clocks_mutex); 219 mutex_unlock(&clocks_mutex);
177 220
178 return cl ? cl->clk : ERR_PTR(-ENOENT); 221 return cl ? clk : ERR_PTR(-ENOENT);
179} 222}
180EXPORT_SYMBOL(clk_get_sys); 223EXPORT_SYMBOL(clk_get_sys);
181 224
@@ -185,10 +228,8 @@ struct clk *clk_get(struct device *dev, const char *con_id)
185 struct clk *clk; 228 struct clk *clk;
186 229
187 if (dev) { 230 if (dev) {
188 clk = of_clk_get_by_name(dev->of_node, con_id); 231 clk = __of_clk_get_by_name(dev->of_node, dev_id, con_id);
189 if (!IS_ERR(clk)) 232 if (!IS_ERR(clk) || PTR_ERR(clk) == -EPROBE_DEFER)
190 return clk;
191 if (PTR_ERR(clk) == -EPROBE_DEFER)
192 return clk; 233 return clk;
193 } 234 }
194 235
@@ -331,6 +372,7 @@ int clk_register_clkdev(struct clk *clk, const char *con_id,
331 372
332 return 0; 373 return 0;
333} 374}
375EXPORT_SYMBOL(clk_register_clkdev);
334 376
335/** 377/**
336 * clk_register_clkdevs - register a set of clk_lookup for a struct clk 378 * clk_register_clkdevs - register a set of clk_lookup for a struct clk
diff --git a/drivers/clk/hisilicon/clk-hi3620.c b/drivers/clk/hisilicon/clk-hi3620.c
index 007144f81f50..2e4f6d432beb 100644
--- a/drivers/clk/hisilicon/clk-hi3620.c
+++ b/drivers/clk/hisilicon/clk-hi3620.c
@@ -295,6 +295,8 @@ static unsigned long mmc_clk_recalc_rate(struct clk_hw *hw,
295} 295}
296 296
297static long mmc_clk_determine_rate(struct clk_hw *hw, unsigned long rate, 297static long mmc_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
298 unsigned long min_rate,
299 unsigned long max_rate,
298 unsigned long *best_parent_rate, 300 unsigned long *best_parent_rate,
299 struct clk_hw **best_parent_p) 301 struct clk_hw **best_parent_p)
300{ 302{
diff --git a/drivers/clk/mmp/clk-mix.c b/drivers/clk/mmp/clk-mix.c
index 48fa53c7ce5e..de6a873175d2 100644
--- a/drivers/clk/mmp/clk-mix.c
+++ b/drivers/clk/mmp/clk-mix.c
@@ -202,6 +202,8 @@ error:
202} 202}
203 203
204static long mmp_clk_mix_determine_rate(struct clk_hw *hw, unsigned long rate, 204static long mmp_clk_mix_determine_rate(struct clk_hw *hw, unsigned long rate,
205 unsigned long min_rate,
206 unsigned long max_rate,
205 unsigned long *best_parent_rate, 207 unsigned long *best_parent_rate,
206 struct clk_hw **best_parent_clk) 208 struct clk_hw **best_parent_clk)
207{ 209{
diff --git a/drivers/clk/pxa/Makefile b/drivers/clk/pxa/Makefile
index 38e915344605..38e37bf6b821 100644
--- a/drivers/clk/pxa/Makefile
+++ b/drivers/clk/pxa/Makefile
@@ -1,3 +1,4 @@
1obj-y += clk-pxa.o 1obj-y += clk-pxa.o
2obj-$(CONFIG_PXA25x) += clk-pxa25x.o 2obj-$(CONFIG_PXA25x) += clk-pxa25x.o
3obj-$(CONFIG_PXA27x) += clk-pxa27x.o 3obj-$(CONFIG_PXA27x) += clk-pxa27x.o
4obj-$(CONFIG_PXA3xx) += clk-pxa3xx.o
diff --git a/drivers/clk/pxa/clk-pxa.c b/drivers/clk/pxa/clk-pxa.c
index 4e834753ab09..29cee9e8d4d9 100644
--- a/drivers/clk/pxa/clk-pxa.c
+++ b/drivers/clk/pxa/clk-pxa.c
@@ -46,7 +46,7 @@ static unsigned long cken_recalc_rate(struct clk_hw *hw,
46 fix = &pclk->lp; 46 fix = &pclk->lp;
47 else 47 else
48 fix = &pclk->hp; 48 fix = &pclk->hp;
49 fix->hw.clk = hw->clk; 49 __clk_hw_set_clk(&fix->hw, hw);
50 return clk_fixed_factor_ops.recalc_rate(&fix->hw, parent_rate); 50 return clk_fixed_factor_ops.recalc_rate(&fix->hw, parent_rate);
51} 51}
52 52
diff --git a/drivers/clk/pxa/clk-pxa3xx.c b/drivers/clk/pxa/clk-pxa3xx.c
new file mode 100644
index 000000000000..39f891bba09a
--- /dev/null
+++ b/drivers/clk/pxa/clk-pxa3xx.c
@@ -0,0 +1,364 @@
1/*
2 * Marvell PXA3xxx family clocks
3 *
4 * Copyright (C) 2014 Robert Jarzmik
5 *
6 * Heavily inspired from former arch/arm/mach-pxa/pxa3xx.c
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * For non-devicetree platforms. Once pxa is fully converted to devicetree, this
13 * should go away.
14 */
15#include <linux/io.h>
16#include <linux/clk.h>
17#include <linux/clk-provider.h>
18#include <linux/clkdev.h>
19#include <linux/of.h>
20#include <mach/smemc.h>
21#include <mach/pxa3xx-regs.h>
22
23#include <dt-bindings/clock/pxa-clock.h>
24#include "clk-pxa.h"
25
26#define KHz 1000
27#define MHz (1000 * 1000)
28
29enum {
30 PXA_CORE_60Mhz = 0,
31 PXA_CORE_RUN,
32 PXA_CORE_TURBO,
33};
34
35enum {
36 PXA_BUS_60Mhz = 0,
37 PXA_BUS_HSS,
38};
39
40/* crystal frequency to HSIO bus frequency multiplier (HSS) */
41static unsigned char hss_mult[4] = { 8, 12, 16, 24 };
42
43/* crystal frequency to static memory controller multiplier (SMCFS) */
44static unsigned int smcfs_mult[8] = { 6, 0, 8, 0, 0, 16, };
45static unsigned int df_clkdiv[4] = { 1, 2, 4, 1 };
46
47static const char * const get_freq_khz[] = {
48 "core", "ring_osc_60mhz", "run", "cpll", "system_bus"
49};
50
51/*
52 * Get the clock frequency as reflected by ACSR and the turbo flag.
53 * We assume these values have been applied via a fcs.
54 * If info is not 0 we also display the current settings.
55 */
56unsigned int pxa3xx_get_clk_frequency_khz(int info)
57{
58 struct clk *clk;
59 unsigned long clks[5];
60 int i;
61
62 for (i = 0; i < 5; i++) {
63 clk = clk_get(NULL, get_freq_khz[i]);
64 if (IS_ERR(clk)) {
65 clks[i] = 0;
66 } else {
67 clks[i] = clk_get_rate(clk);
68 clk_put(clk);
69 }
70 }
71 if (info) {
72 pr_info("RO Mode clock: %ld.%02ldMHz\n",
73 clks[1] / 1000000, (clks[0] % 1000000) / 10000);
74 pr_info("Run Mode clock: %ld.%02ldMHz\n",
75 clks[2] / 1000000, (clks[1] % 1000000) / 10000);
76 pr_info("Turbo Mode clock: %ld.%02ldMHz\n",
77 clks[3] / 1000000, (clks[2] % 1000000) / 10000);
78 pr_info("System bus clock: %ld.%02ldMHz\n",
79 clks[4] / 1000000, (clks[4] % 1000000) / 10000);
80 }
81 return (unsigned int)clks[0];
82}
83
84static unsigned long clk_pxa3xx_ac97_get_rate(struct clk_hw *hw,
85 unsigned long parent_rate)
86{
87 unsigned long ac97_div, rate;
88
89 ac97_div = AC97_DIV;
90
91 /* This may loose precision for some rates but won't for the
92 * standard 24.576MHz.
93 */
94 rate = parent_rate / 2;
95 rate /= ((ac97_div >> 12) & 0x7fff);
96 rate *= (ac97_div & 0xfff);
97
98 return rate;
99}
100PARENTS(clk_pxa3xx_ac97) = { "spll_624mhz" };
101RATE_RO_OPS(clk_pxa3xx_ac97, "ac97");
102
103static unsigned long clk_pxa3xx_smemc_get_rate(struct clk_hw *hw,
104 unsigned long parent_rate)
105{
106 unsigned long acsr = ACSR;
107 unsigned long memclkcfg = __raw_readl(MEMCLKCFG);
108
109 return (parent_rate / 48) * smcfs_mult[(acsr >> 23) & 0x7] /
110 df_clkdiv[(memclkcfg >> 16) & 0x3];
111}
112PARENTS(clk_pxa3xx_smemc) = { "spll_624mhz" };
113RATE_RO_OPS(clk_pxa3xx_smemc, "smemc");
114
115static bool pxa3xx_is_ring_osc_forced(void)
116{
117 unsigned long acsr = ACSR;
118
119 return acsr & ACCR_D0CS;
120}
121
122PARENTS(pxa3xx_pbus) = { "ring_osc_60mhz", "spll_624mhz" };
123PARENTS(pxa3xx_32Khz_bus) = { "osc_32_768khz", "osc_32_768khz" };
124PARENTS(pxa3xx_13MHz_bus) = { "osc_13mhz", "osc_13mhz" };
125PARENTS(pxa3xx_ac97_bus) = { "ring_osc_60mhz", "ac97" };
126PARENTS(pxa3xx_sbus) = { "ring_osc_60mhz", "system_bus" };
127PARENTS(pxa3xx_smemcbus) = { "ring_osc_60mhz", "smemc" };
128
129#define CKEN_AB(bit) ((CKEN_ ## bit > 31) ? &CKENA : &CKENB)
130#define PXA3XX_CKEN(dev_id, con_id, parents, mult_lp, div_lp, mult_hp, \
131 div_hp, bit, is_lp, flags) \
132 PXA_CKEN(dev_id, con_id, bit, parents, mult_lp, div_lp, \
133 mult_hp, div_hp, is_lp, CKEN_AB(bit), \
134 (CKEN_ ## bit % 32), flags)
135#define PXA3XX_PBUS_CKEN(dev_id, con_id, bit, mult_lp, div_lp, \
136 mult_hp, div_hp, delay) \
137 PXA3XX_CKEN(dev_id, con_id, pxa3xx_pbus_parents, mult_lp, \
138 div_lp, mult_hp, div_hp, bit, pxa3xx_is_ring_osc_forced, 0)
139#define PXA3XX_CKEN_1RATE(dev_id, con_id, bit, parents) \
140 PXA_CKEN_1RATE(dev_id, con_id, bit, parents, \
141 CKEN_AB(bit), (CKEN_ ## bit % 32), 0)
142
143static struct desc_clk_cken pxa3xx_clocks[] __initdata = {
144 PXA3XX_PBUS_CKEN("pxa2xx-uart.0", NULL, FFUART, 1, 4, 1, 42, 1),
145 PXA3XX_PBUS_CKEN("pxa2xx-uart.1", NULL, BTUART, 1, 4, 1, 42, 1),
146 PXA3XX_PBUS_CKEN("pxa2xx-uart.2", NULL, STUART, 1, 4, 1, 42, 1),
147 PXA3XX_PBUS_CKEN("pxa2xx-i2c.0", NULL, I2C, 2, 5, 1, 19, 0),
148 PXA3XX_PBUS_CKEN("pxa27x-udc", NULL, UDC, 1, 4, 1, 13, 5),
149 PXA3XX_PBUS_CKEN("pxa27x-ohci", NULL, USBH, 1, 4, 1, 13, 0),
150 PXA3XX_PBUS_CKEN("pxa3xx-u2d", NULL, USB2, 1, 4, 1, 13, 0),
151 PXA3XX_PBUS_CKEN("pxa27x-pwm.0", NULL, PWM0, 1, 6, 1, 48, 0),
152 PXA3XX_PBUS_CKEN("pxa27x-pwm.1", NULL, PWM1, 1, 6, 1, 48, 0),
153 PXA3XX_PBUS_CKEN("pxa2xx-mci.0", NULL, MMC1, 1, 4, 1, 24, 0),
154 PXA3XX_PBUS_CKEN("pxa2xx-mci.1", NULL, MMC2, 1, 4, 1, 24, 0),
155 PXA3XX_PBUS_CKEN("pxa2xx-mci.2", NULL, MMC3, 1, 4, 1, 24, 0),
156
157 PXA3XX_CKEN_1RATE("pxa27x-keypad", NULL, KEYPAD,
158 pxa3xx_32Khz_bus_parents),
159 PXA3XX_CKEN_1RATE("pxa3xx-ssp.0", NULL, SSP1, pxa3xx_13MHz_bus_parents),
160 PXA3XX_CKEN_1RATE("pxa3xx-ssp.1", NULL, SSP2, pxa3xx_13MHz_bus_parents),
161 PXA3XX_CKEN_1RATE("pxa3xx-ssp.2", NULL, SSP3, pxa3xx_13MHz_bus_parents),
162 PXA3XX_CKEN_1RATE("pxa3xx-ssp.3", NULL, SSP4, pxa3xx_13MHz_bus_parents),
163
164 PXA3XX_CKEN(NULL, "AC97CLK", pxa3xx_ac97_bus_parents, 1, 4, 1, 1, AC97,
165 pxa3xx_is_ring_osc_forced, 0),
166 PXA3XX_CKEN(NULL, "CAMCLK", pxa3xx_sbus_parents, 1, 2, 1, 1, CAMERA,
167 pxa3xx_is_ring_osc_forced, 0),
168 PXA3XX_CKEN("pxa2xx-fb", NULL, pxa3xx_sbus_parents, 1, 1, 1, 1, LCD,
169 pxa3xx_is_ring_osc_forced, 0),
170 PXA3XX_CKEN("pxa2xx-pcmcia", NULL, pxa3xx_smemcbus_parents, 1, 4,
171 1, 1, SMC, pxa3xx_is_ring_osc_forced, CLK_IGNORE_UNUSED),
172};
173
174static struct desc_clk_cken pxa300_310_clocks[] __initdata = {
175
176 PXA3XX_PBUS_CKEN("pxa3xx-gcu", NULL, PXA300_GCU, 1, 1, 1, 1, 0),
177 PXA3XX_PBUS_CKEN("pxa3xx-nand", NULL, NAND, 1, 2, 1, 4, 0),
178 PXA3XX_CKEN_1RATE("pxa3xx-gpio", NULL, GPIO, pxa3xx_13MHz_bus_parents),
179};
180
181static struct desc_clk_cken pxa320_clocks[] __initdata = {
182 PXA3XX_PBUS_CKEN("pxa3xx-nand", NULL, NAND, 1, 2, 1, 6, 0),
183 PXA3XX_PBUS_CKEN("pxa3xx-gcu", NULL, PXA320_GCU, 1, 1, 1, 1, 0),
184 PXA3XX_CKEN_1RATE("pxa3xx-gpio", NULL, GPIO, pxa3xx_13MHz_bus_parents),
185};
186
187static struct desc_clk_cken pxa93x_clocks[] __initdata = {
188
189 PXA3XX_PBUS_CKEN("pxa3xx-gcu", NULL, PXA300_GCU, 1, 1, 1, 1, 0),
190 PXA3XX_PBUS_CKEN("pxa3xx-nand", NULL, NAND, 1, 2, 1, 4, 0),
191 PXA3XX_CKEN_1RATE("pxa93x-gpio", NULL, GPIO, pxa3xx_13MHz_bus_parents),
192};
193
194static unsigned long clk_pxa3xx_system_bus_get_rate(struct clk_hw *hw,
195 unsigned long parent_rate)
196{
197 unsigned long acsr = ACSR;
198 unsigned int hss = (acsr >> 14) & 0x3;
199
200 if (pxa3xx_is_ring_osc_forced())
201 return parent_rate;
202 return parent_rate / 48 * hss_mult[hss];
203}
204
205static u8 clk_pxa3xx_system_bus_get_parent(struct clk_hw *hw)
206{
207 if (pxa3xx_is_ring_osc_forced())
208 return PXA_BUS_60Mhz;
209 else
210 return PXA_BUS_HSS;
211}
212
213PARENTS(clk_pxa3xx_system_bus) = { "ring_osc_60mhz", "spll_624mhz" };
214MUX_RO_RATE_RO_OPS(clk_pxa3xx_system_bus, "system_bus");
215
216static unsigned long clk_pxa3xx_core_get_rate(struct clk_hw *hw,
217 unsigned long parent_rate)
218{
219 return parent_rate;
220}
221
222static u8 clk_pxa3xx_core_get_parent(struct clk_hw *hw)
223{
224 unsigned long xclkcfg;
225 unsigned int t;
226
227 if (pxa3xx_is_ring_osc_forced())
228 return PXA_CORE_60Mhz;
229
230 /* Read XCLKCFG register turbo bit */
231 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg));
232 t = xclkcfg & 0x1;
233
234 if (t)
235 return PXA_CORE_TURBO;
236 return PXA_CORE_RUN;
237}
238PARENTS(clk_pxa3xx_core) = { "ring_osc_60mhz", "run", "cpll" };
239MUX_RO_RATE_RO_OPS(clk_pxa3xx_core, "core");
240
241static unsigned long clk_pxa3xx_run_get_rate(struct clk_hw *hw,
242 unsigned long parent_rate)
243{
244 unsigned long acsr = ACSR;
245 unsigned int xn = (acsr & ACCR_XN_MASK) >> 8;
246 unsigned int t, xclkcfg;
247
248 /* Read XCLKCFG register turbo bit */
249 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg));
250 t = xclkcfg & 0x1;
251
252 return t ? (parent_rate / xn) * 2 : parent_rate;
253}
254PARENTS(clk_pxa3xx_run) = { "cpll" };
255RATE_RO_OPS(clk_pxa3xx_run, "run");
256
257static unsigned long clk_pxa3xx_cpll_get_rate(struct clk_hw *hw,
258 unsigned long parent_rate)
259{
260 unsigned long acsr = ACSR;
261 unsigned int xn = (acsr & ACCR_XN_MASK) >> 8;
262 unsigned int xl = acsr & ACCR_XL_MASK;
263 unsigned int t, xclkcfg;
264
265 /* Read XCLKCFG register turbo bit */
266 __asm__ __volatile__("mrc\tp14, 0, %0, c6, c0, 0" : "=r"(xclkcfg));
267 t = xclkcfg & 0x1;
268
269 pr_info("RJK: parent_rate=%lu, xl=%u, xn=%u\n", parent_rate, xl, xn);
270 return t ? parent_rate * xl * xn : parent_rate * xl;
271}
272PARENTS(clk_pxa3xx_cpll) = { "osc_13mhz" };
273RATE_RO_OPS(clk_pxa3xx_cpll, "cpll");
274
275static void __init pxa3xx_register_core(void)
276{
277 clk_register_clk_pxa3xx_cpll();
278 clk_register_clk_pxa3xx_run();
279
280 clkdev_pxa_register(CLK_CORE, "core", NULL,
281 clk_register_clk_pxa3xx_core());
282}
283
284static void __init pxa3xx_register_plls(void)
285{
286 clk_register_fixed_rate(NULL, "osc_13mhz", NULL,
287 CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,
288 13 * MHz);
289 clk_register_fixed_rate(NULL, "osc_32_768khz", NULL,
290 CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,
291 32768);
292 clk_register_fixed_rate(NULL, "ring_osc_120mhz", NULL,
293 CLK_GET_RATE_NOCACHE | CLK_IS_ROOT,
294 120 * MHz);
295 clk_register_fixed_rate(NULL, "clk_dummy", NULL, CLK_IS_ROOT, 0);
296 clk_register_fixed_factor(NULL, "spll_624mhz", "osc_13mhz", 0, 48, 1);
297 clk_register_fixed_factor(NULL, "ring_osc_60mhz", "ring_osc_120mhz",
298 0, 1, 2);
299}
300
301#define DUMMY_CLK(_con_id, _dev_id, _parent) \
302 { .con_id = _con_id, .dev_id = _dev_id, .parent = _parent }
303struct dummy_clk {
304 const char *con_id;
305 const char *dev_id;
306 const char *parent;
307};
308static struct dummy_clk dummy_clks[] __initdata = {
309 DUMMY_CLK(NULL, "pxa93x-gpio", "osc_13mhz"),
310 DUMMY_CLK(NULL, "sa1100-rtc", "osc_32_768khz"),
311 DUMMY_CLK("UARTCLK", "pxa2xx-ir", "STUART"),
312 DUMMY_CLK(NULL, "pxa3xx-pwri2c.1", "osc_13mhz"),
313};
314
315static void __init pxa3xx_dummy_clocks_init(void)
316{
317 struct clk *clk;
318 struct dummy_clk *d;
319 const char *name;
320 int i;
321
322 for (i = 0; i < ARRAY_SIZE(dummy_clks); i++) {
323 d = &dummy_clks[i];
324 name = d->dev_id ? d->dev_id : d->con_id;
325 clk = clk_register_fixed_factor(NULL, name, d->parent, 0, 1, 1);
326 clk_register_clkdev(clk, d->con_id, d->dev_id);
327 }
328}
329
330static void __init pxa3xx_base_clocks_init(void)
331{
332 pxa3xx_register_plls();
333 pxa3xx_register_core();
334 clk_register_clk_pxa3xx_system_bus();
335 clk_register_clk_pxa3xx_ac97();
336 clk_register_clk_pxa3xx_smemc();
337 clk_register_gate(NULL, "CLK_POUT", "osc_13mhz", 0,
338 (void __iomem *)&OSCC, 11, 0, NULL);
339}
340
341int __init pxa3xx_clocks_init(void)
342{
343 int ret;
344
345 pxa3xx_base_clocks_init();
346 pxa3xx_dummy_clocks_init();
347 ret = clk_pxa_cken_init(pxa3xx_clocks, ARRAY_SIZE(pxa3xx_clocks));
348 if (ret)
349 return ret;
350 if (cpu_is_pxa320())
351 return clk_pxa_cken_init(pxa320_clocks,
352 ARRAY_SIZE(pxa320_clocks));
353 if (cpu_is_pxa300() || cpu_is_pxa310())
354 return clk_pxa_cken_init(pxa300_310_clocks,
355 ARRAY_SIZE(pxa300_310_clocks));
356 return clk_pxa_cken_init(pxa93x_clocks, ARRAY_SIZE(pxa93x_clocks));
357}
358
359static void __init pxa3xx_dt_clocks_init(struct device_node *np)
360{
361 pxa3xx_clocks_init();
362 clk_pxa_dt_common_init(np);
363}
364CLK_OF_DECLARE(pxa_clks, "marvell,pxa300-clocks", pxa3xx_dt_clocks_init);
diff --git a/drivers/clk/qcom/Kconfig b/drivers/clk/qcom/Kconfig
index 1107351ed346..0d7ab52b7ab0 100644
--- a/drivers/clk/qcom/Kconfig
+++ b/drivers/clk/qcom/Kconfig
@@ -29,6 +29,15 @@ config IPQ_GCC_806X
29 Say Y if you want to use peripheral devices such as UART, SPI, 29 Say Y if you want to use peripheral devices such as UART, SPI,
30 i2c, USB, SD/eMMC, etc. 30 i2c, USB, SD/eMMC, etc.
31 31
32config IPQ_LCC_806X
33 tristate "IPQ806x LPASS Clock Controller"
34 select IPQ_GCC_806X
35 depends on COMMON_CLK_QCOM
36 help
37 Support for the LPASS clock controller on ipq806x devices.
38 Say Y if you want to use audio devices such as i2s, pcm,
39 S/PDIF, etc.
40
32config MSM_GCC_8660 41config MSM_GCC_8660
33 tristate "MSM8660 Global Clock Controller" 42 tristate "MSM8660 Global Clock Controller"
34 depends on COMMON_CLK_QCOM 43 depends on COMMON_CLK_QCOM
@@ -45,6 +54,15 @@ config MSM_GCC_8960
45 Say Y if you want to use peripheral devices such as UART, SPI, 54 Say Y if you want to use peripheral devices such as UART, SPI,
46 i2c, USB, SD/eMMC, SATA, PCIe, etc. 55 i2c, USB, SD/eMMC, SATA, PCIe, etc.
47 56
57config MSM_LCC_8960
58 tristate "APQ8064/MSM8960 LPASS Clock Controller"
59 select MSM_GCC_8960
60 depends on COMMON_CLK_QCOM
61 help
62 Support for the LPASS clock controller on apq8064/msm8960 devices.
63 Say Y if you want to use audio devices such as i2s, pcm,
64 SLIMBus, etc.
65
48config MSM_MMCC_8960 66config MSM_MMCC_8960
49 tristate "MSM8960 Multimedia Clock Controller" 67 tristate "MSM8960 Multimedia Clock Controller"
50 select MSM_GCC_8960 68 select MSM_GCC_8960
diff --git a/drivers/clk/qcom/Makefile b/drivers/clk/qcom/Makefile
index 783cfb24faa4..617826469595 100644
--- a/drivers/clk/qcom/Makefile
+++ b/drivers/clk/qcom/Makefile
@@ -6,13 +6,17 @@ clk-qcom-y += clk-pll.o
6clk-qcom-y += clk-rcg.o 6clk-qcom-y += clk-rcg.o
7clk-qcom-y += clk-rcg2.o 7clk-qcom-y += clk-rcg2.o
8clk-qcom-y += clk-branch.o 8clk-qcom-y += clk-branch.o
9clk-qcom-y += clk-regmap-divider.o
10clk-qcom-y += clk-regmap-mux.o
9clk-qcom-y += reset.o 11clk-qcom-y += reset.o
10 12
11obj-$(CONFIG_APQ_GCC_8084) += gcc-apq8084.o 13obj-$(CONFIG_APQ_GCC_8084) += gcc-apq8084.o
12obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o 14obj-$(CONFIG_APQ_MMCC_8084) += mmcc-apq8084.o
13obj-$(CONFIG_IPQ_GCC_806X) += gcc-ipq806x.o 15obj-$(CONFIG_IPQ_GCC_806X) += gcc-ipq806x.o
16obj-$(CONFIG_IPQ_LCC_806X) += lcc-ipq806x.o
14obj-$(CONFIG_MSM_GCC_8660) += gcc-msm8660.o 17obj-$(CONFIG_MSM_GCC_8660) += gcc-msm8660.o
15obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o 18obj-$(CONFIG_MSM_GCC_8960) += gcc-msm8960.o
19obj-$(CONFIG_MSM_LCC_8960) += lcc-msm8960.o
16obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o 20obj-$(CONFIG_MSM_GCC_8974) += gcc-msm8974.o
17obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o 21obj-$(CONFIG_MSM_MMCC_8960) += mmcc-msm8960.o
18obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o 22obj-$(CONFIG_MSM_MMCC_8974) += mmcc-msm8974.o
diff --git a/drivers/clk/qcom/clk-pll.c b/drivers/clk/qcom/clk-pll.c
index 60873a7f45d9..b4325f65a1bf 100644
--- a/drivers/clk/qcom/clk-pll.c
+++ b/drivers/clk/qcom/clk-pll.c
@@ -141,6 +141,7 @@ struct pll_freq_tbl *find_freq(const struct pll_freq_tbl *f, unsigned long rate)
141 141
142static long 142static long
143clk_pll_determine_rate(struct clk_hw *hw, unsigned long rate, 143clk_pll_determine_rate(struct clk_hw *hw, unsigned long rate,
144 unsigned long min_rate, unsigned long max_rate,
144 unsigned long *p_rate, struct clk_hw **p) 145 unsigned long *p_rate, struct clk_hw **p)
145{ 146{
146 struct clk_pll *pll = to_clk_pll(hw); 147 struct clk_pll *pll = to_clk_pll(hw);
diff --git a/drivers/clk/qcom/clk-rcg.c b/drivers/clk/qcom/clk-rcg.c
index 0b93972c8807..0039bd7d3965 100644
--- a/drivers/clk/qcom/clk-rcg.c
+++ b/drivers/clk/qcom/clk-rcg.c
@@ -368,6 +368,7 @@ clk_dyn_rcg_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
368 368
369static long _freq_tbl_determine_rate(struct clk_hw *hw, 369static long _freq_tbl_determine_rate(struct clk_hw *hw,
370 const struct freq_tbl *f, unsigned long rate, 370 const struct freq_tbl *f, unsigned long rate,
371 unsigned long min_rate, unsigned long max_rate,
371 unsigned long *p_rate, struct clk_hw **p_hw) 372 unsigned long *p_rate, struct clk_hw **p_hw)
372{ 373{
373 unsigned long clk_flags; 374 unsigned long clk_flags;
@@ -397,22 +398,27 @@ static long _freq_tbl_determine_rate(struct clk_hw *hw,
397} 398}
398 399
399static long clk_rcg_determine_rate(struct clk_hw *hw, unsigned long rate, 400static long clk_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
401 unsigned long min_rate, unsigned long max_rate,
400 unsigned long *p_rate, struct clk_hw **p) 402 unsigned long *p_rate, struct clk_hw **p)
401{ 403{
402 struct clk_rcg *rcg = to_clk_rcg(hw); 404 struct clk_rcg *rcg = to_clk_rcg(hw);
403 405
404 return _freq_tbl_determine_rate(hw, rcg->freq_tbl, rate, p_rate, p); 406 return _freq_tbl_determine_rate(hw, rcg->freq_tbl, rate, min_rate,
407 max_rate, p_rate, p);
405} 408}
406 409
407static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate, 410static long clk_dyn_rcg_determine_rate(struct clk_hw *hw, unsigned long rate,
411 unsigned long min_rate, unsigned long max_rate,
408 unsigned long *p_rate, struct clk_hw **p) 412 unsigned long *p_rate, struct clk_hw **p)
409{ 413{
410 struct clk_dyn_rcg *rcg = to_clk_dyn_rcg(hw); 414 struct clk_dyn_rcg *rcg = to_clk_dyn_rcg(hw);
411 415
412 return _freq_tbl_determine_rate(hw, rcg->freq_tbl, rate, p_rate, p); 416 return _freq_tbl_determine_rate(hw, rcg->freq_tbl, rate, min_rate,
417 max_rate, p_rate, p);
413} 418}
414 419
415static long clk_rcg_bypass_determine_rate(struct clk_hw *hw, unsigned long rate, 420static long clk_rcg_bypass_determine_rate(struct clk_hw *hw, unsigned long rate,
421 unsigned long min_rate, unsigned long max_rate,
416 unsigned long *p_rate, struct clk_hw **p_hw) 422 unsigned long *p_rate, struct clk_hw **p_hw)
417{ 423{
418 struct clk_rcg *rcg = to_clk_rcg(hw); 424 struct clk_rcg *rcg = to_clk_rcg(hw);
diff --git a/drivers/clk/qcom/clk-rcg2.c b/drivers/clk/qcom/clk-rcg2.c
index 08b8b3729f53..742acfa18d63 100644
--- a/drivers/clk/qcom/clk-rcg2.c
+++ b/drivers/clk/qcom/clk-rcg2.c
@@ -208,6 +208,7 @@ static long _freq_tbl_determine_rate(struct clk_hw *hw,
208} 208}
209 209
210static long clk_rcg2_determine_rate(struct clk_hw *hw, unsigned long rate, 210static long clk_rcg2_determine_rate(struct clk_hw *hw, unsigned long rate,
211 unsigned long min_rate, unsigned long max_rate,
211 unsigned long *p_rate, struct clk_hw **p) 212 unsigned long *p_rate, struct clk_hw **p)
212{ 213{
213 struct clk_rcg2 *rcg = to_clk_rcg2(hw); 214 struct clk_rcg2 *rcg = to_clk_rcg2(hw);
@@ -361,6 +362,8 @@ static int clk_edp_pixel_set_rate_and_parent(struct clk_hw *hw,
361} 362}
362 363
363static long clk_edp_pixel_determine_rate(struct clk_hw *hw, unsigned long rate, 364static long clk_edp_pixel_determine_rate(struct clk_hw *hw, unsigned long rate,
365 unsigned long min_rate,
366 unsigned long max_rate,
364 unsigned long *p_rate, struct clk_hw **p) 367 unsigned long *p_rate, struct clk_hw **p)
365{ 368{
366 struct clk_rcg2 *rcg = to_clk_rcg2(hw); 369 struct clk_rcg2 *rcg = to_clk_rcg2(hw);
@@ -412,6 +415,7 @@ const struct clk_ops clk_edp_pixel_ops = {
412EXPORT_SYMBOL_GPL(clk_edp_pixel_ops); 415EXPORT_SYMBOL_GPL(clk_edp_pixel_ops);
413 416
414static long clk_byte_determine_rate(struct clk_hw *hw, unsigned long rate, 417static long clk_byte_determine_rate(struct clk_hw *hw, unsigned long rate,
418 unsigned long min_rate, unsigned long max_rate,
415 unsigned long *p_rate, struct clk_hw **p_hw) 419 unsigned long *p_rate, struct clk_hw **p_hw)
416{ 420{
417 struct clk_rcg2 *rcg = to_clk_rcg2(hw); 421 struct clk_rcg2 *rcg = to_clk_rcg2(hw);
@@ -476,6 +480,8 @@ static const struct frac_entry frac_table_pixel[] = {
476}; 480};
477 481
478static long clk_pixel_determine_rate(struct clk_hw *hw, unsigned long rate, 482static long clk_pixel_determine_rate(struct clk_hw *hw, unsigned long rate,
483 unsigned long min_rate,
484 unsigned long max_rate,
479 unsigned long *p_rate, struct clk_hw **p) 485 unsigned long *p_rate, struct clk_hw **p)
480{ 486{
481 struct clk_rcg2 *rcg = to_clk_rcg2(hw); 487 struct clk_rcg2 *rcg = to_clk_rcg2(hw);
diff --git a/drivers/clk/qcom/clk-regmap-divider.c b/drivers/clk/qcom/clk-regmap-divider.c
new file mode 100644
index 000000000000..53484912301e
--- /dev/null
+++ b/drivers/clk/qcom/clk-regmap-divider.c
@@ -0,0 +1,70 @@
1/*
2 * Copyright (c) 2014, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/kernel.h>
15#include <linux/bitops.h>
16#include <linux/regmap.h>
17#include <linux/export.h>
18
19#include "clk-regmap-divider.h"
20
21static inline struct clk_regmap_div *to_clk_regmap_div(struct clk_hw *hw)
22{
23 return container_of(to_clk_regmap(hw), struct clk_regmap_div, clkr);
24}
25
26static long div_round_rate(struct clk_hw *hw, unsigned long rate,
27 unsigned long *prate)
28{
29 struct clk_regmap_div *divider = to_clk_regmap_div(hw);
30
31 return divider_round_rate(hw, rate, prate, NULL, divider->width,
32 CLK_DIVIDER_ROUND_CLOSEST);
33}
34
35static int div_set_rate(struct clk_hw *hw, unsigned long rate,
36 unsigned long parent_rate)
37{
38 struct clk_regmap_div *divider = to_clk_regmap_div(hw);
39 struct clk_regmap *clkr = &divider->clkr;
40 u32 div;
41
42 div = divider_get_val(rate, parent_rate, NULL, divider->width,
43 CLK_DIVIDER_ROUND_CLOSEST);
44
45 return regmap_update_bits(clkr->regmap, divider->reg,
46 (BIT(divider->width) - 1) << divider->shift,
47 div << divider->shift);
48}
49
50static unsigned long div_recalc_rate(struct clk_hw *hw,
51 unsigned long parent_rate)
52{
53 struct clk_regmap_div *divider = to_clk_regmap_div(hw);
54 struct clk_regmap *clkr = &divider->clkr;
55 u32 div;
56
57 regmap_read(clkr->regmap, divider->reg, &div);
58 div >>= divider->shift;
59 div &= BIT(divider->width) - 1;
60
61 return divider_recalc_rate(hw, parent_rate, div, NULL,
62 CLK_DIVIDER_ROUND_CLOSEST);
63}
64
65const struct clk_ops clk_regmap_div_ops = {
66 .round_rate = div_round_rate,
67 .set_rate = div_set_rate,
68 .recalc_rate = div_recalc_rate,
69};
70EXPORT_SYMBOL_GPL(clk_regmap_div_ops);
diff --git a/drivers/clk/qcom/clk-regmap-divider.h b/drivers/clk/qcom/clk-regmap-divider.h
new file mode 100644
index 000000000000..fc4492e3a827
--- /dev/null
+++ b/drivers/clk/qcom/clk-regmap-divider.h
@@ -0,0 +1,29 @@
1/*
2 * Copyright (c) 2014, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef __QCOM_CLK_REGMAP_DIVIDER_H__
15#define __QCOM_CLK_REGMAP_DIVIDER_H__
16
17#include <linux/clk-provider.h>
18#include "clk-regmap.h"
19
20struct clk_regmap_div {
21 u32 reg;
22 u32 shift;
23 u32 width;
24 struct clk_regmap clkr;
25};
26
27extern const struct clk_ops clk_regmap_div_ops;
28
29#endif
diff --git a/drivers/clk/qcom/clk-regmap-mux.c b/drivers/clk/qcom/clk-regmap-mux.c
new file mode 100644
index 000000000000..cae3071f384c
--- /dev/null
+++ b/drivers/clk/qcom/clk-regmap-mux.c
@@ -0,0 +1,59 @@
1/*
2 * Copyright (c) 2014, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/kernel.h>
15#include <linux/bitops.h>
16#include <linux/regmap.h>
17#include <linux/export.h>
18
19#include "clk-regmap-mux.h"
20
21static inline struct clk_regmap_mux *to_clk_regmap_mux(struct clk_hw *hw)
22{
23 return container_of(to_clk_regmap(hw), struct clk_regmap_mux, clkr);
24}
25
26static u8 mux_get_parent(struct clk_hw *hw)
27{
28 struct clk_regmap_mux *mux = to_clk_regmap_mux(hw);
29 struct clk_regmap *clkr = to_clk_regmap(hw);
30 unsigned int mask = GENMASK(mux->width - 1, 0);
31 unsigned int val;
32
33 regmap_read(clkr->regmap, mux->reg, &val);
34
35 val >>= mux->shift;
36 val &= mask;
37
38 return val;
39}
40
41static int mux_set_parent(struct clk_hw *hw, u8 index)
42{
43 struct clk_regmap_mux *mux = to_clk_regmap_mux(hw);
44 struct clk_regmap *clkr = to_clk_regmap(hw);
45 unsigned int mask = GENMASK(mux->width + mux->shift - 1, mux->shift);
46 unsigned int val;
47
48 val = index;
49 val <<= mux->shift;
50
51 return regmap_update_bits(clkr->regmap, mux->reg, mask, val);
52}
53
54const struct clk_ops clk_regmap_mux_closest_ops = {
55 .get_parent = mux_get_parent,
56 .set_parent = mux_set_parent,
57 .determine_rate = __clk_mux_determine_rate_closest,
58};
59EXPORT_SYMBOL_GPL(clk_regmap_mux_closest_ops);
diff --git a/drivers/clk/qcom/clk-regmap-mux.h b/drivers/clk/qcom/clk-regmap-mux.h
new file mode 100644
index 000000000000..5cec76154fda
--- /dev/null
+++ b/drivers/clk/qcom/clk-regmap-mux.h
@@ -0,0 +1,29 @@
1/*
2 * Copyright (c) 2014, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef __QCOM_CLK_REGMAP_MUX_H__
15#define __QCOM_CLK_REGMAP_MUX_H__
16
17#include <linux/clk-provider.h>
18#include "clk-regmap.h"
19
20struct clk_regmap_mux {
21 u32 reg;
22 u32 shift;
23 u32 width;
24 struct clk_regmap clkr;
25};
26
27extern const struct clk_ops clk_regmap_mux_closest_ops;
28
29#endif
diff --git a/drivers/clk/qcom/gcc-ipq806x.c b/drivers/clk/qcom/gcc-ipq806x.c
index afed5eb0691e..cbdc31dea7f4 100644
--- a/drivers/clk/qcom/gcc-ipq806x.c
+++ b/drivers/clk/qcom/gcc-ipq806x.c
@@ -75,6 +75,17 @@ static struct clk_pll pll3 = {
75 }, 75 },
76}; 76};
77 77
78static struct clk_regmap pll4_vote = {
79 .enable_reg = 0x34c0,
80 .enable_mask = BIT(4),
81 .hw.init = &(struct clk_init_data){
82 .name = "pll4_vote",
83 .parent_names = (const char *[]){ "pll4" },
84 .num_parents = 1,
85 .ops = &clk_pll_vote_ops,
86 },
87};
88
78static struct clk_pll pll8 = { 89static struct clk_pll pll8 = {
79 .l_reg = 0x3144, 90 .l_reg = 0x3144,
80 .m_reg = 0x3148, 91 .m_reg = 0x3148,
@@ -2163,6 +2174,7 @@ static struct clk_regmap *gcc_ipq806x_clks[] = {
2163 [PLL0] = &pll0.clkr, 2174 [PLL0] = &pll0.clkr,
2164 [PLL0_VOTE] = &pll0_vote, 2175 [PLL0_VOTE] = &pll0_vote,
2165 [PLL3] = &pll3.clkr, 2176 [PLL3] = &pll3.clkr,
2177 [PLL4_VOTE] = &pll4_vote,
2166 [PLL8] = &pll8.clkr, 2178 [PLL8] = &pll8.clkr,
2167 [PLL8_VOTE] = &pll8_vote, 2179 [PLL8_VOTE] = &pll8_vote,
2168 [PLL14] = &pll14.clkr, 2180 [PLL14] = &pll14.clkr,
diff --git a/drivers/clk/qcom/gcc-msm8960.c b/drivers/clk/qcom/gcc-msm8960.c
index b0b562b9ce0e..e60feffc10a1 100644
--- a/drivers/clk/qcom/gcc-msm8960.c
+++ b/drivers/clk/qcom/gcc-msm8960.c
@@ -48,6 +48,17 @@ static struct clk_pll pll3 = {
48 }, 48 },
49}; 49};
50 50
51static struct clk_regmap pll4_vote = {
52 .enable_reg = 0x34c0,
53 .enable_mask = BIT(4),
54 .hw.init = &(struct clk_init_data){
55 .name = "pll4_vote",
56 .parent_names = (const char *[]){ "pll4" },
57 .num_parents = 1,
58 .ops = &clk_pll_vote_ops,
59 },
60};
61
51static struct clk_pll pll8 = { 62static struct clk_pll pll8 = {
52 .l_reg = 0x3144, 63 .l_reg = 0x3144,
53 .m_reg = 0x3148, 64 .m_reg = 0x3148,
@@ -3023,6 +3034,7 @@ static struct clk_branch rpm_msg_ram_h_clk = {
3023 3034
3024static struct clk_regmap *gcc_msm8960_clks[] = { 3035static struct clk_regmap *gcc_msm8960_clks[] = {
3025 [PLL3] = &pll3.clkr, 3036 [PLL3] = &pll3.clkr,
3037 [PLL4_VOTE] = &pll4_vote,
3026 [PLL8] = &pll8.clkr, 3038 [PLL8] = &pll8.clkr,
3027 [PLL8_VOTE] = &pll8_vote, 3039 [PLL8_VOTE] = &pll8_vote,
3028 [PLL14] = &pll14.clkr, 3040 [PLL14] = &pll14.clkr,
@@ -3247,6 +3259,7 @@ static const struct qcom_reset_map gcc_msm8960_resets[] = {
3247 3259
3248static struct clk_regmap *gcc_apq8064_clks[] = { 3260static struct clk_regmap *gcc_apq8064_clks[] = {
3249 [PLL3] = &pll3.clkr, 3261 [PLL3] = &pll3.clkr,
3262 [PLL4_VOTE] = &pll4_vote,
3250 [PLL8] = &pll8.clkr, 3263 [PLL8] = &pll8.clkr,
3251 [PLL8_VOTE] = &pll8_vote, 3264 [PLL8_VOTE] = &pll8_vote,
3252 [PLL14] = &pll14.clkr, 3265 [PLL14] = &pll14.clkr,
diff --git a/drivers/clk/qcom/lcc-ipq806x.c b/drivers/clk/qcom/lcc-ipq806x.c
new file mode 100644
index 000000000000..c9ff27b4648b
--- /dev/null
+++ b/drivers/clk/qcom/lcc-ipq806x.c
@@ -0,0 +1,472 @@
1/*
2 * Copyright (c) 2014, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/kernel.h>
15#include <linux/bitops.h>
16#include <linux/err.h>
17#include <linux/platform_device.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/clk-provider.h>
22#include <linux/regmap.h>
23
24#include <dt-bindings/clock/qcom,lcc-ipq806x.h>
25
26#include "common.h"
27#include "clk-regmap.h"
28#include "clk-pll.h"
29#include "clk-rcg.h"
30#include "clk-branch.h"
31#include "clk-regmap-divider.h"
32#include "clk-regmap-mux.h"
33
34static struct clk_pll pll4 = {
35 .l_reg = 0x4,
36 .m_reg = 0x8,
37 .n_reg = 0xc,
38 .config_reg = 0x14,
39 .mode_reg = 0x0,
40 .status_reg = 0x18,
41 .status_bit = 16,
42 .clkr.hw.init = &(struct clk_init_data){
43 .name = "pll4",
44 .parent_names = (const char *[]){ "pxo" },
45 .num_parents = 1,
46 .ops = &clk_pll_ops,
47 },
48};
49
50static const struct pll_config pll4_config = {
51 .l = 0xf,
52 .m = 0x91,
53 .n = 0xc7,
54 .vco_val = 0x0,
55 .vco_mask = BIT(17) | BIT(16),
56 .pre_div_val = 0x0,
57 .pre_div_mask = BIT(19),
58 .post_div_val = 0x0,
59 .post_div_mask = BIT(21) | BIT(20),
60 .mn_ena_mask = BIT(22),
61 .main_output_mask = BIT(23),
62};
63
64#define P_PXO 0
65#define P_PLL4 1
66
67static const u8 lcc_pxo_pll4_map[] = {
68 [P_PXO] = 0,
69 [P_PLL4] = 2,
70};
71
72static const char *lcc_pxo_pll4[] = {
73 "pxo",
74 "pll4_vote",
75};
76
77static struct freq_tbl clk_tbl_aif_mi2s[] = {
78 { 1024000, P_PLL4, 4, 1, 96 },
79 { 1411200, P_PLL4, 4, 2, 139 },
80 { 1536000, P_PLL4, 4, 1, 64 },
81 { 2048000, P_PLL4, 4, 1, 48 },
82 { 2116800, P_PLL4, 4, 2, 93 },
83 { 2304000, P_PLL4, 4, 2, 85 },
84 { 2822400, P_PLL4, 4, 6, 209 },
85 { 3072000, P_PLL4, 4, 1, 32 },
86 { 3175200, P_PLL4, 4, 1, 31 },
87 { 4096000, P_PLL4, 4, 1, 24 },
88 { 4233600, P_PLL4, 4, 9, 209 },
89 { 4608000, P_PLL4, 4, 3, 64 },
90 { 5644800, P_PLL4, 4, 12, 209 },
91 { 6144000, P_PLL4, 4, 1, 16 },
92 { 6350400, P_PLL4, 4, 2, 31 },
93 { 8192000, P_PLL4, 4, 1, 12 },
94 { 8467200, P_PLL4, 4, 18, 209 },
95 { 9216000, P_PLL4, 4, 3, 32 },
96 { 11289600, P_PLL4, 4, 24, 209 },
97 { 12288000, P_PLL4, 4, 1, 8 },
98 { 12700800, P_PLL4, 4, 27, 209 },
99 { 13824000, P_PLL4, 4, 9, 64 },
100 { 16384000, P_PLL4, 4, 1, 6 },
101 { 16934400, P_PLL4, 4, 41, 238 },
102 { 18432000, P_PLL4, 4, 3, 16 },
103 { 22579200, P_PLL4, 2, 24, 209 },
104 { 24576000, P_PLL4, 4, 1, 4 },
105 { 27648000, P_PLL4, 4, 9, 32 },
106 { 33868800, P_PLL4, 4, 41, 119 },
107 { 36864000, P_PLL4, 4, 3, 8 },
108 { 45158400, P_PLL4, 1, 24, 209 },
109 { 49152000, P_PLL4, 4, 1, 2 },
110 { 50803200, P_PLL4, 1, 27, 209 },
111 { }
112};
113
114static struct clk_rcg mi2s_osr_src = {
115 .ns_reg = 0x48,
116 .md_reg = 0x4c,
117 .mn = {
118 .mnctr_en_bit = 8,
119 .mnctr_reset_bit = 7,
120 .mnctr_mode_shift = 5,
121 .n_val_shift = 24,
122 .m_val_shift = 8,
123 .width = 8,
124 },
125 .p = {
126 .pre_div_shift = 3,
127 .pre_div_width = 2,
128 },
129 .s = {
130 .src_sel_shift = 0,
131 .parent_map = lcc_pxo_pll4_map,
132 },
133 .freq_tbl = clk_tbl_aif_mi2s,
134 .clkr = {
135 .enable_reg = 0x48,
136 .enable_mask = BIT(9),
137 .hw.init = &(struct clk_init_data){
138 .name = "mi2s_osr_src",
139 .parent_names = lcc_pxo_pll4,
140 .num_parents = 2,
141 .ops = &clk_rcg_ops,
142 .flags = CLK_SET_RATE_GATE,
143 },
144 },
145};
146
147static const char *lcc_mi2s_parents[] = {
148 "mi2s_osr_src",
149};
150
151static struct clk_branch mi2s_osr_clk = {
152 .halt_reg = 0x50,
153 .halt_bit = 1,
154 .halt_check = BRANCH_HALT_ENABLE,
155 .clkr = {
156 .enable_reg = 0x48,
157 .enable_mask = BIT(17),
158 .hw.init = &(struct clk_init_data){
159 .name = "mi2s_osr_clk",
160 .parent_names = lcc_mi2s_parents,
161 .num_parents = 1,
162 .ops = &clk_branch_ops,
163 .flags = CLK_SET_RATE_PARENT,
164 },
165 },
166};
167
168static struct clk_regmap_div mi2s_div_clk = {
169 .reg = 0x48,
170 .shift = 10,
171 .width = 4,
172 .clkr = {
173 .hw.init = &(struct clk_init_data){
174 .name = "mi2s_div_clk",
175 .parent_names = lcc_mi2s_parents,
176 .num_parents = 1,
177 .ops = &clk_regmap_div_ops,
178 },
179 },
180};
181
182static struct clk_branch mi2s_bit_div_clk = {
183 .halt_reg = 0x50,
184 .halt_bit = 0,
185 .halt_check = BRANCH_HALT_ENABLE,
186 .clkr = {
187 .enable_reg = 0x48,
188 .enable_mask = BIT(15),
189 .hw.init = &(struct clk_init_data){
190 .name = "mi2s_bit_div_clk",
191 .parent_names = (const char *[]){ "mi2s_div_clk" },
192 .num_parents = 1,
193 .ops = &clk_branch_ops,
194 .flags = CLK_SET_RATE_PARENT,
195 },
196 },
197};
198
199
200static struct clk_regmap_mux mi2s_bit_clk = {
201 .reg = 0x48,
202 .shift = 14,
203 .width = 1,
204 .clkr = {
205 .hw.init = &(struct clk_init_data){
206 .name = "mi2s_bit_clk",
207 .parent_names = (const char *[]){
208 "mi2s_bit_div_clk",
209 "mi2s_codec_clk",
210 },
211 .num_parents = 2,
212 .ops = &clk_regmap_mux_closest_ops,
213 .flags = CLK_SET_RATE_PARENT,
214 },
215 },
216};
217
218static struct freq_tbl clk_tbl_pcm[] = {
219 { 64000, P_PLL4, 4, 1, 1536 },
220 { 128000, P_PLL4, 4, 1, 768 },
221 { 256000, P_PLL4, 4, 1, 384 },
222 { 512000, P_PLL4, 4, 1, 192 },
223 { 1024000, P_PLL4, 4, 1, 96 },
224 { 2048000, P_PLL4, 4, 1, 48 },
225 { },
226};
227
228static struct clk_rcg pcm_src = {
229 .ns_reg = 0x54,
230 .md_reg = 0x58,
231 .mn = {
232 .mnctr_en_bit = 8,
233 .mnctr_reset_bit = 7,
234 .mnctr_mode_shift = 5,
235 .n_val_shift = 16,
236 .m_val_shift = 16,
237 .width = 16,
238 },
239 .p = {
240 .pre_div_shift = 3,
241 .pre_div_width = 2,
242 },
243 .s = {
244 .src_sel_shift = 0,
245 .parent_map = lcc_pxo_pll4_map,
246 },
247 .freq_tbl = clk_tbl_pcm,
248 .clkr = {
249 .enable_reg = 0x54,
250 .enable_mask = BIT(9),
251 .hw.init = &(struct clk_init_data){
252 .name = "pcm_src",
253 .parent_names = lcc_pxo_pll4,
254 .num_parents = 2,
255 .ops = &clk_rcg_ops,
256 .flags = CLK_SET_RATE_GATE,
257 },
258 },
259};
260
261static struct clk_branch pcm_clk_out = {
262 .halt_reg = 0x5c,
263 .halt_bit = 0,
264 .halt_check = BRANCH_HALT_ENABLE,
265 .clkr = {
266 .enable_reg = 0x54,
267 .enable_mask = BIT(11),
268 .hw.init = &(struct clk_init_data){
269 .name = "pcm_clk_out",
270 .parent_names = (const char *[]){ "pcm_src" },
271 .num_parents = 1,
272 .ops = &clk_branch_ops,
273 .flags = CLK_SET_RATE_PARENT,
274 },
275 },
276};
277
278static struct clk_regmap_mux pcm_clk = {
279 .reg = 0x54,
280 .shift = 10,
281 .width = 1,
282 .clkr = {
283 .hw.init = &(struct clk_init_data){
284 .name = "pcm_clk",
285 .parent_names = (const char *[]){
286 "pcm_clk_out",
287 "pcm_codec_clk",
288 },
289 .num_parents = 2,
290 .ops = &clk_regmap_mux_closest_ops,
291 .flags = CLK_SET_RATE_PARENT,
292 },
293 },
294};
295
296static struct freq_tbl clk_tbl_aif_osr[] = {
297 { 22050, P_PLL4, 1, 147, 20480 },
298 { 32000, P_PLL4, 1, 1, 96 },
299 { 44100, P_PLL4, 1, 147, 10240 },
300 { 48000, P_PLL4, 1, 1, 64 },
301 { 88200, P_PLL4, 1, 147, 5120 },
302 { 96000, P_PLL4, 1, 1, 32 },
303 { 176400, P_PLL4, 1, 147, 2560 },
304 { 192000, P_PLL4, 1, 1, 16 },
305 { },
306};
307
308static struct clk_rcg spdif_src = {
309 .ns_reg = 0xcc,
310 .md_reg = 0xd0,
311 .mn = {
312 .mnctr_en_bit = 8,
313 .mnctr_reset_bit = 7,
314 .mnctr_mode_shift = 5,
315 .n_val_shift = 16,
316 .m_val_shift = 16,
317 .width = 8,
318 },
319 .p = {
320 .pre_div_shift = 3,
321 .pre_div_width = 2,
322 },
323 .s = {
324 .src_sel_shift = 0,
325 .parent_map = lcc_pxo_pll4_map,
326 },
327 .freq_tbl = clk_tbl_aif_osr,
328 .clkr = {
329 .enable_reg = 0xcc,
330 .enable_mask = BIT(9),
331 .hw.init = &(struct clk_init_data){
332 .name = "spdif_src",
333 .parent_names = lcc_pxo_pll4,
334 .num_parents = 2,
335 .ops = &clk_rcg_ops,
336 .flags = CLK_SET_RATE_GATE,
337 },
338 },
339};
340
341static const char *lcc_spdif_parents[] = {
342 "spdif_src",
343};
344
345static struct clk_branch spdif_clk = {
346 .halt_reg = 0xd4,
347 .halt_bit = 1,
348 .halt_check = BRANCH_HALT_ENABLE,
349 .clkr = {
350 .enable_reg = 0xcc,
351 .enable_mask = BIT(12),
352 .hw.init = &(struct clk_init_data){
353 .name = "spdif_clk",
354 .parent_names = lcc_spdif_parents,
355 .num_parents = 1,
356 .ops = &clk_branch_ops,
357 .flags = CLK_SET_RATE_PARENT,
358 },
359 },
360};
361
362static struct freq_tbl clk_tbl_ahbix[] = {
363 { 131072, P_PLL4, 1, 1, 3 },
364 { },
365};
366
367static struct clk_rcg ahbix_clk = {
368 .ns_reg = 0x38,
369 .md_reg = 0x3c,
370 .mn = {
371 .mnctr_en_bit = 8,
372 .mnctr_reset_bit = 7,
373 .mnctr_mode_shift = 5,
374 .n_val_shift = 24,
375 .m_val_shift = 8,
376 .width = 8,
377 },
378 .p = {
379 .pre_div_shift = 3,
380 .pre_div_width = 2,
381 },
382 .s = {
383 .src_sel_shift = 0,
384 .parent_map = lcc_pxo_pll4_map,
385 },
386 .freq_tbl = clk_tbl_ahbix,
387 .clkr = {
388 .enable_reg = 0x38,
389 .enable_mask = BIT(10), /* toggle the gfmux to select mn/pxo */
390 .hw.init = &(struct clk_init_data){
391 .name = "ahbix",
392 .parent_names = lcc_pxo_pll4,
393 .num_parents = 2,
394 .ops = &clk_rcg_ops,
395 .flags = CLK_SET_RATE_GATE,
396 },
397 },
398};
399
400static struct clk_regmap *lcc_ipq806x_clks[] = {
401 [PLL4] = &pll4.clkr,
402 [MI2S_OSR_SRC] = &mi2s_osr_src.clkr,
403 [MI2S_OSR_CLK] = &mi2s_osr_clk.clkr,
404 [MI2S_DIV_CLK] = &mi2s_div_clk.clkr,
405 [MI2S_BIT_DIV_CLK] = &mi2s_bit_div_clk.clkr,
406 [MI2S_BIT_CLK] = &mi2s_bit_clk.clkr,
407 [PCM_SRC] = &pcm_src.clkr,
408 [PCM_CLK_OUT] = &pcm_clk_out.clkr,
409 [PCM_CLK] = &pcm_clk.clkr,
410 [SPDIF_SRC] = &spdif_src.clkr,
411 [SPDIF_CLK] = &spdif_clk.clkr,
412 [AHBIX_CLK] = &ahbix_clk.clkr,
413};
414
415static const struct regmap_config lcc_ipq806x_regmap_config = {
416 .reg_bits = 32,
417 .reg_stride = 4,
418 .val_bits = 32,
419 .max_register = 0xfc,
420 .fast_io = true,
421};
422
423static const struct qcom_cc_desc lcc_ipq806x_desc = {
424 .config = &lcc_ipq806x_regmap_config,
425 .clks = lcc_ipq806x_clks,
426 .num_clks = ARRAY_SIZE(lcc_ipq806x_clks),
427};
428
429static const struct of_device_id lcc_ipq806x_match_table[] = {
430 { .compatible = "qcom,lcc-ipq8064" },
431 { }
432};
433MODULE_DEVICE_TABLE(of, lcc_ipq806x_match_table);
434
435static int lcc_ipq806x_probe(struct platform_device *pdev)
436{
437 u32 val;
438 struct regmap *regmap;
439
440 regmap = qcom_cc_map(pdev, &lcc_ipq806x_desc);
441 if (IS_ERR(regmap))
442 return PTR_ERR(regmap);
443
444 /* Configure the rate of PLL4 if the bootloader hasn't already */
445 val = regmap_read(regmap, 0x0, &val);
446 if (!val)
447 clk_pll_configure_sr(&pll4, regmap, &pll4_config, true);
448 /* Enable PLL4 source on the LPASS Primary PLL Mux */
449 regmap_write(regmap, 0xc4, 0x1);
450
451 return qcom_cc_really_probe(pdev, &lcc_ipq806x_desc, regmap);
452}
453
454static int lcc_ipq806x_remove(struct platform_device *pdev)
455{
456 qcom_cc_remove(pdev);
457 return 0;
458}
459
460static struct platform_driver lcc_ipq806x_driver = {
461 .probe = lcc_ipq806x_probe,
462 .remove = lcc_ipq806x_remove,
463 .driver = {
464 .name = "lcc-ipq806x",
465 .of_match_table = lcc_ipq806x_match_table,
466 },
467};
468module_platform_driver(lcc_ipq806x_driver);
469
470MODULE_DESCRIPTION("QCOM LCC IPQ806x Driver");
471MODULE_LICENSE("GPL v2");
472MODULE_ALIAS("platform:lcc-ipq806x");
diff --git a/drivers/clk/qcom/lcc-msm8960.c b/drivers/clk/qcom/lcc-msm8960.c
new file mode 100644
index 000000000000..e2c863295f00
--- /dev/null
+++ b/drivers/clk/qcom/lcc-msm8960.c
@@ -0,0 +1,584 @@
1/*
2 * Copyright (c) 2014, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/kernel.h>
15#include <linux/bitops.h>
16#include <linux/err.h>
17#include <linux/platform_device.h>
18#include <linux/module.h>
19#include <linux/of.h>
20#include <linux/of_device.h>
21#include <linux/clk-provider.h>
22#include <linux/regmap.h>
23
24#include <dt-bindings/clock/qcom,lcc-msm8960.h>
25
26#include "common.h"
27#include "clk-regmap.h"
28#include "clk-pll.h"
29#include "clk-rcg.h"
30#include "clk-branch.h"
31#include "clk-regmap-divider.h"
32#include "clk-regmap-mux.h"
33
34static struct clk_pll pll4 = {
35 .l_reg = 0x4,
36 .m_reg = 0x8,
37 .n_reg = 0xc,
38 .config_reg = 0x14,
39 .mode_reg = 0x0,
40 .status_reg = 0x18,
41 .status_bit = 16,
42 .clkr.hw.init = &(struct clk_init_data){
43 .name = "pll4",
44 .parent_names = (const char *[]){ "pxo" },
45 .num_parents = 1,
46 .ops = &clk_pll_ops,
47 },
48};
49
50#define P_PXO 0
51#define P_PLL4 1
52
53static const u8 lcc_pxo_pll4_map[] = {
54 [P_PXO] = 0,
55 [P_PLL4] = 2,
56};
57
58static const char *lcc_pxo_pll4[] = {
59 "pxo",
60 "pll4_vote",
61};
62
63static struct freq_tbl clk_tbl_aif_osr_492[] = {
64 { 512000, P_PLL4, 4, 1, 240 },
65 { 768000, P_PLL4, 4, 1, 160 },
66 { 1024000, P_PLL4, 4, 1, 120 },
67 { 1536000, P_PLL4, 4, 1, 80 },
68 { 2048000, P_PLL4, 4, 1, 60 },
69 { 3072000, P_PLL4, 4, 1, 40 },
70 { 4096000, P_PLL4, 4, 1, 30 },
71 { 6144000, P_PLL4, 4, 1, 20 },
72 { 8192000, P_PLL4, 4, 1, 15 },
73 { 12288000, P_PLL4, 4, 1, 10 },
74 { 24576000, P_PLL4, 4, 1, 5 },
75 { 27000000, P_PXO, 1, 0, 0 },
76 { }
77};
78
79static struct freq_tbl clk_tbl_aif_osr_393[] = {
80 { 512000, P_PLL4, 4, 1, 192 },
81 { 768000, P_PLL4, 4, 1, 128 },
82 { 1024000, P_PLL4, 4, 1, 96 },
83 { 1536000, P_PLL4, 4, 1, 64 },
84 { 2048000, P_PLL4, 4, 1, 48 },
85 { 3072000, P_PLL4, 4, 1, 32 },
86 { 4096000, P_PLL4, 4, 1, 24 },
87 { 6144000, P_PLL4, 4, 1, 16 },
88 { 8192000, P_PLL4, 4, 1, 12 },
89 { 12288000, P_PLL4, 4, 1, 8 },
90 { 24576000, P_PLL4, 4, 1, 4 },
91 { 27000000, P_PXO, 1, 0, 0 },
92 { }
93};
94
95static struct clk_rcg mi2s_osr_src = {
96 .ns_reg = 0x48,
97 .md_reg = 0x4c,
98 .mn = {
99 .mnctr_en_bit = 8,
100 .mnctr_reset_bit = 7,
101 .mnctr_mode_shift = 5,
102 .n_val_shift = 24,
103 .m_val_shift = 8,
104 .width = 8,
105 },
106 .p = {
107 .pre_div_shift = 3,
108 .pre_div_width = 2,
109 },
110 .s = {
111 .src_sel_shift = 0,
112 .parent_map = lcc_pxo_pll4_map,
113 },
114 .freq_tbl = clk_tbl_aif_osr_393,
115 .clkr = {
116 .enable_reg = 0x48,
117 .enable_mask = BIT(9),
118 .hw.init = &(struct clk_init_data){
119 .name = "mi2s_osr_src",
120 .parent_names = lcc_pxo_pll4,
121 .num_parents = 2,
122 .ops = &clk_rcg_ops,
123 .flags = CLK_SET_RATE_GATE,
124 },
125 },
126};
127
128static const char *lcc_mi2s_parents[] = {
129 "mi2s_osr_src",
130};
131
132static struct clk_branch mi2s_osr_clk = {
133 .halt_reg = 0x50,
134 .halt_bit = 1,
135 .halt_check = BRANCH_HALT_ENABLE,
136 .clkr = {
137 .enable_reg = 0x48,
138 .enable_mask = BIT(17),
139 .hw.init = &(struct clk_init_data){
140 .name = "mi2s_osr_clk",
141 .parent_names = lcc_mi2s_parents,
142 .num_parents = 1,
143 .ops = &clk_branch_ops,
144 .flags = CLK_SET_RATE_PARENT,
145 },
146 },
147};
148
149static struct clk_regmap_div mi2s_div_clk = {
150 .reg = 0x48,
151 .shift = 10,
152 .width = 4,
153 .clkr = {
154 .enable_reg = 0x48,
155 .enable_mask = BIT(15),
156 .hw.init = &(struct clk_init_data){
157 .name = "mi2s_div_clk",
158 .parent_names = lcc_mi2s_parents,
159 .num_parents = 1,
160 .ops = &clk_regmap_div_ops,
161 },
162 },
163};
164
165static struct clk_branch mi2s_bit_div_clk = {
166 .halt_reg = 0x50,
167 .halt_bit = 0,
168 .halt_check = BRANCH_HALT_ENABLE,
169 .clkr = {
170 .enable_reg = 0x48,
171 .enable_mask = BIT(15),
172 .hw.init = &(struct clk_init_data){
173 .name = "mi2s_bit_div_clk",
174 .parent_names = (const char *[]){ "mi2s_div_clk" },
175 .num_parents = 1,
176 .ops = &clk_branch_ops,
177 .flags = CLK_SET_RATE_PARENT,
178 },
179 },
180};
181
182static struct clk_regmap_mux mi2s_bit_clk = {
183 .reg = 0x48,
184 .shift = 14,
185 .width = 1,
186 .clkr = {
187 .hw.init = &(struct clk_init_data){
188 .name = "mi2s_bit_clk",
189 .parent_names = (const char *[]){
190 "mi2s_bit_div_clk",
191 "mi2s_codec_clk",
192 },
193 .num_parents = 2,
194 .ops = &clk_regmap_mux_closest_ops,
195 .flags = CLK_SET_RATE_PARENT,
196 },
197 },
198};
199
200#define CLK_AIF_OSR_DIV(prefix, _ns, _md, hr) \
201static struct clk_rcg prefix##_osr_src = { \
202 .ns_reg = _ns, \
203 .md_reg = _md, \
204 .mn = { \
205 .mnctr_en_bit = 8, \
206 .mnctr_reset_bit = 7, \
207 .mnctr_mode_shift = 5, \
208 .n_val_shift = 24, \
209 .m_val_shift = 8, \
210 .width = 8, \
211 }, \
212 .p = { \
213 .pre_div_shift = 3, \
214 .pre_div_width = 2, \
215 }, \
216 .s = { \
217 .src_sel_shift = 0, \
218 .parent_map = lcc_pxo_pll4_map, \
219 }, \
220 .freq_tbl = clk_tbl_aif_osr_393, \
221 .clkr = { \
222 .enable_reg = _ns, \
223 .enable_mask = BIT(9), \
224 .hw.init = &(struct clk_init_data){ \
225 .name = #prefix "_osr_src", \
226 .parent_names = lcc_pxo_pll4, \
227 .num_parents = 2, \
228 .ops = &clk_rcg_ops, \
229 .flags = CLK_SET_RATE_GATE, \
230 }, \
231 }, \
232}; \
233 \
234static const char *lcc_##prefix##_parents[] = { \
235 #prefix "_osr_src", \
236}; \
237 \
238static struct clk_branch prefix##_osr_clk = { \
239 .halt_reg = hr, \
240 .halt_bit = 1, \
241 .halt_check = BRANCH_HALT_ENABLE, \
242 .clkr = { \
243 .enable_reg = _ns, \
244 .enable_mask = BIT(21), \
245 .hw.init = &(struct clk_init_data){ \
246 .name = #prefix "_osr_clk", \
247 .parent_names = lcc_##prefix##_parents, \
248 .num_parents = 1, \
249 .ops = &clk_branch_ops, \
250 .flags = CLK_SET_RATE_PARENT, \
251 }, \
252 }, \
253}; \
254 \
255static struct clk_regmap_div prefix##_div_clk = { \
256 .reg = _ns, \
257 .shift = 10, \
258 .width = 8, \
259 .clkr = { \
260 .hw.init = &(struct clk_init_data){ \
261 .name = #prefix "_div_clk", \
262 .parent_names = lcc_##prefix##_parents, \
263 .num_parents = 1, \
264 .ops = &clk_regmap_div_ops, \
265 }, \
266 }, \
267}; \
268 \
269static struct clk_branch prefix##_bit_div_clk = { \
270 .halt_reg = hr, \
271 .halt_bit = 0, \
272 .halt_check = BRANCH_HALT_ENABLE, \
273 .clkr = { \
274 .enable_reg = _ns, \
275 .enable_mask = BIT(19), \
276 .hw.init = &(struct clk_init_data){ \
277 .name = #prefix "_bit_div_clk", \
278 .parent_names = (const char *[]){ \
279 #prefix "_div_clk" \
280 }, \
281 .num_parents = 1, \
282 .ops = &clk_branch_ops, \
283 .flags = CLK_SET_RATE_PARENT, \
284 }, \
285 }, \
286}; \
287 \
288static struct clk_regmap_mux prefix##_bit_clk = { \
289 .reg = _ns, \
290 .shift = 18, \
291 .width = 1, \
292 .clkr = { \
293 .hw.init = &(struct clk_init_data){ \
294 .name = #prefix "_bit_clk", \
295 .parent_names = (const char *[]){ \
296 #prefix "_bit_div_clk", \
297 #prefix "_codec_clk", \
298 }, \
299 .num_parents = 2, \
300 .ops = &clk_regmap_mux_closest_ops, \
301 .flags = CLK_SET_RATE_PARENT, \
302 }, \
303 }, \
304}
305
306CLK_AIF_OSR_DIV(codec_i2s_mic, 0x60, 0x64, 0x68);
307CLK_AIF_OSR_DIV(spare_i2s_mic, 0x78, 0x7c, 0x80);
308CLK_AIF_OSR_DIV(codec_i2s_spkr, 0x6c, 0x70, 0x74);
309CLK_AIF_OSR_DIV(spare_i2s_spkr, 0x84, 0x88, 0x8c);
310
311static struct freq_tbl clk_tbl_pcm_492[] = {
312 { 256000, P_PLL4, 4, 1, 480 },
313 { 512000, P_PLL4, 4, 1, 240 },
314 { 768000, P_PLL4, 4, 1, 160 },
315 { 1024000, P_PLL4, 4, 1, 120 },
316 { 1536000, P_PLL4, 4, 1, 80 },
317 { 2048000, P_PLL4, 4, 1, 60 },
318 { 3072000, P_PLL4, 4, 1, 40 },
319 { 4096000, P_PLL4, 4, 1, 30 },
320 { 6144000, P_PLL4, 4, 1, 20 },
321 { 8192000, P_PLL4, 4, 1, 15 },
322 { 12288000, P_PLL4, 4, 1, 10 },
323 { 24576000, P_PLL4, 4, 1, 5 },
324 { 27000000, P_PXO, 1, 0, 0 },
325 { }
326};
327
328static struct freq_tbl clk_tbl_pcm_393[] = {
329 { 256000, P_PLL4, 4, 1, 384 },
330 { 512000, P_PLL4, 4, 1, 192 },
331 { 768000, P_PLL4, 4, 1, 128 },
332 { 1024000, P_PLL4, 4, 1, 96 },
333 { 1536000, P_PLL4, 4, 1, 64 },
334 { 2048000, P_PLL4, 4, 1, 48 },
335 { 3072000, P_PLL4, 4, 1, 32 },
336 { 4096000, P_PLL4, 4, 1, 24 },
337 { 6144000, P_PLL4, 4, 1, 16 },
338 { 8192000, P_PLL4, 4, 1, 12 },
339 { 12288000, P_PLL4, 4, 1, 8 },
340 { 24576000, P_PLL4, 4, 1, 4 },
341 { 27000000, P_PXO, 1, 0, 0 },
342 { }
343};
344
345static struct clk_rcg pcm_src = {
346 .ns_reg = 0x54,
347 .md_reg = 0x58,
348 .mn = {
349 .mnctr_en_bit = 8,
350 .mnctr_reset_bit = 7,
351 .mnctr_mode_shift = 5,
352 .n_val_shift = 16,
353 .m_val_shift = 16,
354 .width = 16,
355 },
356 .p = {
357 .pre_div_shift = 3,
358 .pre_div_width = 2,
359 },
360 .s = {
361 .src_sel_shift = 0,
362 .parent_map = lcc_pxo_pll4_map,
363 },
364 .freq_tbl = clk_tbl_pcm_393,
365 .clkr = {
366 .enable_reg = 0x54,
367 .enable_mask = BIT(9),
368 .hw.init = &(struct clk_init_data){
369 .name = "pcm_src",
370 .parent_names = lcc_pxo_pll4,
371 .num_parents = 2,
372 .ops = &clk_rcg_ops,
373 .flags = CLK_SET_RATE_GATE,
374 },
375 },
376};
377
378static struct clk_branch pcm_clk_out = {
379 .halt_reg = 0x5c,
380 .halt_bit = 0,
381 .halt_check = BRANCH_HALT_ENABLE,
382 .clkr = {
383 .enable_reg = 0x54,
384 .enable_mask = BIT(11),
385 .hw.init = &(struct clk_init_data){
386 .name = "pcm_clk_out",
387 .parent_names = (const char *[]){ "pcm_src" },
388 .num_parents = 1,
389 .ops = &clk_branch_ops,
390 .flags = CLK_SET_RATE_PARENT,
391 },
392 },
393};
394
395static struct clk_regmap_mux pcm_clk = {
396 .reg = 0x54,
397 .shift = 10,
398 .width = 1,
399 .clkr = {
400 .hw.init = &(struct clk_init_data){
401 .name = "pcm_clk",
402 .parent_names = (const char *[]){
403 "pcm_clk_out",
404 "pcm_codec_clk",
405 },
406 .num_parents = 2,
407 .ops = &clk_regmap_mux_closest_ops,
408 .flags = CLK_SET_RATE_PARENT,
409 },
410 },
411};
412
413static struct clk_rcg slimbus_src = {
414 .ns_reg = 0xcc,
415 .md_reg = 0xd0,
416 .mn = {
417 .mnctr_en_bit = 8,
418 .mnctr_reset_bit = 7,
419 .mnctr_mode_shift = 5,
420 .n_val_shift = 24,
421 .m_val_shift = 8,
422 .width = 8,
423 },
424 .p = {
425 .pre_div_shift = 3,
426 .pre_div_width = 2,
427 },
428 .s = {
429 .src_sel_shift = 0,
430 .parent_map = lcc_pxo_pll4_map,
431 },
432 .freq_tbl = clk_tbl_aif_osr_393,
433 .clkr = {
434 .enable_reg = 0xcc,
435 .enable_mask = BIT(9),
436 .hw.init = &(struct clk_init_data){
437 .name = "slimbus_src",
438 .parent_names = lcc_pxo_pll4,
439 .num_parents = 2,
440 .ops = &clk_rcg_ops,
441 .flags = CLK_SET_RATE_GATE,
442 },
443 },
444};
445
446static const char *lcc_slimbus_parents[] = {
447 "slimbus_src",
448};
449
450static struct clk_branch audio_slimbus_clk = {
451 .halt_reg = 0xd4,
452 .halt_bit = 0,
453 .halt_check = BRANCH_HALT_ENABLE,
454 .clkr = {
455 .enable_reg = 0xcc,
456 .enable_mask = BIT(10),
457 .hw.init = &(struct clk_init_data){
458 .name = "audio_slimbus_clk",
459 .parent_names = lcc_slimbus_parents,
460 .num_parents = 1,
461 .ops = &clk_branch_ops,
462 .flags = CLK_SET_RATE_PARENT,
463 },
464 },
465};
466
467static struct clk_branch sps_slimbus_clk = {
468 .halt_reg = 0xd4,
469 .halt_bit = 1,
470 .halt_check = BRANCH_HALT_ENABLE,
471 .clkr = {
472 .enable_reg = 0xcc,
473 .enable_mask = BIT(12),
474 .hw.init = &(struct clk_init_data){
475 .name = "sps_slimbus_clk",
476 .parent_names = lcc_slimbus_parents,
477 .num_parents = 1,
478 .ops = &clk_branch_ops,
479 .flags = CLK_SET_RATE_PARENT,
480 },
481 },
482};
483
484static struct clk_regmap *lcc_msm8960_clks[] = {
485 [PLL4] = &pll4.clkr,
486 [MI2S_OSR_SRC] = &mi2s_osr_src.clkr,
487 [MI2S_OSR_CLK] = &mi2s_osr_clk.clkr,
488 [MI2S_DIV_CLK] = &mi2s_div_clk.clkr,
489 [MI2S_BIT_DIV_CLK] = &mi2s_bit_div_clk.clkr,
490 [MI2S_BIT_CLK] = &mi2s_bit_clk.clkr,
491 [PCM_SRC] = &pcm_src.clkr,
492 [PCM_CLK_OUT] = &pcm_clk_out.clkr,
493 [PCM_CLK] = &pcm_clk.clkr,
494 [SLIMBUS_SRC] = &slimbus_src.clkr,
495 [AUDIO_SLIMBUS_CLK] = &audio_slimbus_clk.clkr,
496 [SPS_SLIMBUS_CLK] = &sps_slimbus_clk.clkr,
497 [CODEC_I2S_MIC_OSR_SRC] = &codec_i2s_mic_osr_src.clkr,
498 [CODEC_I2S_MIC_OSR_CLK] = &codec_i2s_mic_osr_clk.clkr,
499 [CODEC_I2S_MIC_DIV_CLK] = &codec_i2s_mic_div_clk.clkr,
500 [CODEC_I2S_MIC_BIT_DIV_CLK] = &codec_i2s_mic_bit_div_clk.clkr,
501 [CODEC_I2S_MIC_BIT_CLK] = &codec_i2s_mic_bit_clk.clkr,
502 [SPARE_I2S_MIC_OSR_SRC] = &spare_i2s_mic_osr_src.clkr,
503 [SPARE_I2S_MIC_OSR_CLK] = &spare_i2s_mic_osr_clk.clkr,
504 [SPARE_I2S_MIC_DIV_CLK] = &spare_i2s_mic_div_clk.clkr,
505 [SPARE_I2S_MIC_BIT_DIV_CLK] = &spare_i2s_mic_bit_div_clk.clkr,
506 [SPARE_I2S_MIC_BIT_CLK] = &spare_i2s_mic_bit_clk.clkr,
507 [CODEC_I2S_SPKR_OSR_SRC] = &codec_i2s_spkr_osr_src.clkr,
508 [CODEC_I2S_SPKR_OSR_CLK] = &codec_i2s_spkr_osr_clk.clkr,
509 [CODEC_I2S_SPKR_DIV_CLK] = &codec_i2s_spkr_div_clk.clkr,
510 [CODEC_I2S_SPKR_BIT_DIV_CLK] = &codec_i2s_spkr_bit_div_clk.clkr,
511 [CODEC_I2S_SPKR_BIT_CLK] = &codec_i2s_spkr_bit_clk.clkr,
512 [SPARE_I2S_SPKR_OSR_SRC] = &spare_i2s_spkr_osr_src.clkr,
513 [SPARE_I2S_SPKR_OSR_CLK] = &spare_i2s_spkr_osr_clk.clkr,
514 [SPARE_I2S_SPKR_DIV_CLK] = &spare_i2s_spkr_div_clk.clkr,
515 [SPARE_I2S_SPKR_BIT_DIV_CLK] = &spare_i2s_spkr_bit_div_clk.clkr,
516 [SPARE_I2S_SPKR_BIT_CLK] = &spare_i2s_spkr_bit_clk.clkr,
517};
518
519static const struct regmap_config lcc_msm8960_regmap_config = {
520 .reg_bits = 32,
521 .reg_stride = 4,
522 .val_bits = 32,
523 .max_register = 0xfc,
524 .fast_io = true,
525};
526
527static const struct qcom_cc_desc lcc_msm8960_desc = {
528 .config = &lcc_msm8960_regmap_config,
529 .clks = lcc_msm8960_clks,
530 .num_clks = ARRAY_SIZE(lcc_msm8960_clks),
531};
532
533static const struct of_device_id lcc_msm8960_match_table[] = {
534 { .compatible = "qcom,lcc-msm8960" },
535 { .compatible = "qcom,lcc-apq8064" },
536 { }
537};
538MODULE_DEVICE_TABLE(of, lcc_msm8960_match_table);
539
540static int lcc_msm8960_probe(struct platform_device *pdev)
541{
542 u32 val;
543 struct regmap *regmap;
544
545 regmap = qcom_cc_map(pdev, &lcc_msm8960_desc);
546 if (IS_ERR(regmap))
547 return PTR_ERR(regmap);
548
549 /* Use the correct frequency plan depending on speed of PLL4 */
550 regmap_read(regmap, 0x4, &val);
551 if (val == 0x12) {
552 slimbus_src.freq_tbl = clk_tbl_aif_osr_492;
553 mi2s_osr_src.freq_tbl = clk_tbl_aif_osr_492;
554 codec_i2s_mic_osr_src.freq_tbl = clk_tbl_aif_osr_492;
555 spare_i2s_mic_osr_src.freq_tbl = clk_tbl_aif_osr_492;
556 codec_i2s_spkr_osr_src.freq_tbl = clk_tbl_aif_osr_492;
557 spare_i2s_spkr_osr_src.freq_tbl = clk_tbl_aif_osr_492;
558 pcm_src.freq_tbl = clk_tbl_pcm_492;
559 }
560 /* Enable PLL4 source on the LPASS Primary PLL Mux */
561 regmap_write(regmap, 0xc4, 0x1);
562
563 return qcom_cc_really_probe(pdev, &lcc_msm8960_desc, regmap);
564}
565
566static int lcc_msm8960_remove(struct platform_device *pdev)
567{
568 qcom_cc_remove(pdev);
569 return 0;
570}
571
572static struct platform_driver lcc_msm8960_driver = {
573 .probe = lcc_msm8960_probe,
574 .remove = lcc_msm8960_remove,
575 .driver = {
576 .name = "lcc-msm8960",
577 .of_match_table = lcc_msm8960_match_table,
578 },
579};
580module_platform_driver(lcc_msm8960_driver);
581
582MODULE_DESCRIPTION("QCOM LCC MSM8960 Driver");
583MODULE_LICENSE("GPL v2");
584MODULE_ALIAS("platform:lcc-msm8960");
diff --git a/drivers/clk/rockchip/clk-rk3288.c b/drivers/clk/rockchip/clk-rk3288.c
index cbcddcc02475..05d7a0bc0599 100644
--- a/drivers/clk/rockchip/clk-rk3288.c
+++ b/drivers/clk/rockchip/clk-rk3288.c
@@ -535,44 +535,44 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
535 COMPOSITE(0, "uart0_src", mux_pll_src_cpll_gll_usb_npll_p, 0, 535 COMPOSITE(0, "uart0_src", mux_pll_src_cpll_gll_usb_npll_p, 0,
536 RK3288_CLKSEL_CON(13), 13, 2, MFLAGS, 0, 7, DFLAGS, 536 RK3288_CLKSEL_CON(13), 13, 2, MFLAGS, 0, 7, DFLAGS,
537 RK3288_CLKGATE_CON(1), 8, GFLAGS), 537 RK3288_CLKGATE_CON(1), 8, GFLAGS),
538 COMPOSITE_FRAC(0, "uart0_frac", "uart0_src", 0, 538 COMPOSITE_FRAC(0, "uart0_frac", "uart0_src", CLK_SET_RATE_PARENT,
539 RK3288_CLKSEL_CON(17), 0, 539 RK3288_CLKSEL_CON(17), 0,
540 RK3288_CLKGATE_CON(1), 9, GFLAGS), 540 RK3288_CLKGATE_CON(1), 9, GFLAGS),
541 MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, 0, 541 MUX(SCLK_UART0, "sclk_uart0", mux_uart0_p, CLK_SET_RATE_PARENT,
542 RK3288_CLKSEL_CON(13), 8, 2, MFLAGS), 542 RK3288_CLKSEL_CON(13), 8, 2, MFLAGS),
543 MUX(0, "uart_src", mux_pll_src_cpll_gpll_p, 0, 543 MUX(0, "uart_src", mux_pll_src_cpll_gpll_p, 0,
544 RK3288_CLKSEL_CON(13), 15, 1, MFLAGS), 544 RK3288_CLKSEL_CON(13), 15, 1, MFLAGS),
545 COMPOSITE_NOMUX(0, "uart1_src", "uart_src", 0, 545 COMPOSITE_NOMUX(0, "uart1_src", "uart_src", 0,
546 RK3288_CLKSEL_CON(14), 0, 7, DFLAGS, 546 RK3288_CLKSEL_CON(14), 0, 7, DFLAGS,
547 RK3288_CLKGATE_CON(1), 10, GFLAGS), 547 RK3288_CLKGATE_CON(1), 10, GFLAGS),
548 COMPOSITE_FRAC(0, "uart1_frac", "uart1_src", 0, 548 COMPOSITE_FRAC(0, "uart1_frac", "uart1_src", CLK_SET_RATE_PARENT,
549 RK3288_CLKSEL_CON(18), 0, 549 RK3288_CLKSEL_CON(18), 0,
550 RK3288_CLKGATE_CON(1), 11, GFLAGS), 550 RK3288_CLKGATE_CON(1), 11, GFLAGS),
551 MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, 0, 551 MUX(SCLK_UART1, "sclk_uart1", mux_uart1_p, CLK_SET_RATE_PARENT,
552 RK3288_CLKSEL_CON(14), 8, 2, MFLAGS), 552 RK3288_CLKSEL_CON(14), 8, 2, MFLAGS),
553 COMPOSITE_NOMUX(0, "uart2_src", "uart_src", 0, 553 COMPOSITE_NOMUX(0, "uart2_src", "uart_src", 0,
554 RK3288_CLKSEL_CON(15), 0, 7, DFLAGS, 554 RK3288_CLKSEL_CON(15), 0, 7, DFLAGS,
555 RK3288_CLKGATE_CON(1), 12, GFLAGS), 555 RK3288_CLKGATE_CON(1), 12, GFLAGS),
556 COMPOSITE_FRAC(0, "uart2_frac", "uart2_src", 0, 556 COMPOSITE_FRAC(0, "uart2_frac", "uart2_src", CLK_SET_RATE_PARENT,
557 RK3288_CLKSEL_CON(19), 0, 557 RK3288_CLKSEL_CON(19), 0,
558 RK3288_CLKGATE_CON(1), 13, GFLAGS), 558 RK3288_CLKGATE_CON(1), 13, GFLAGS),
559 MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, 0, 559 MUX(SCLK_UART2, "sclk_uart2", mux_uart2_p, CLK_SET_RATE_PARENT,
560 RK3288_CLKSEL_CON(15), 8, 2, MFLAGS), 560 RK3288_CLKSEL_CON(15), 8, 2, MFLAGS),
561 COMPOSITE_NOMUX(0, "uart3_src", "uart_src", 0, 561 COMPOSITE_NOMUX(0, "uart3_src", "uart_src", 0,
562 RK3288_CLKSEL_CON(16), 0, 7, DFLAGS, 562 RK3288_CLKSEL_CON(16), 0, 7, DFLAGS,
563 RK3288_CLKGATE_CON(1), 14, GFLAGS), 563 RK3288_CLKGATE_CON(1), 14, GFLAGS),
564 COMPOSITE_FRAC(0, "uart3_frac", "uart3_src", 0, 564 COMPOSITE_FRAC(0, "uart3_frac", "uart3_src", CLK_SET_RATE_PARENT,
565 RK3288_CLKSEL_CON(20), 0, 565 RK3288_CLKSEL_CON(20), 0,
566 RK3288_CLKGATE_CON(1), 15, GFLAGS), 566 RK3288_CLKGATE_CON(1), 15, GFLAGS),
567 MUX(SCLK_UART3, "sclk_uart3", mux_uart3_p, 0, 567 MUX(SCLK_UART3, "sclk_uart3", mux_uart3_p, CLK_SET_RATE_PARENT,
568 RK3288_CLKSEL_CON(16), 8, 2, MFLAGS), 568 RK3288_CLKSEL_CON(16), 8, 2, MFLAGS),
569 COMPOSITE_NOMUX(0, "uart4_src", "uart_src", 0, 569 COMPOSITE_NOMUX(0, "uart4_src", "uart_src", 0,
570 RK3288_CLKSEL_CON(3), 0, 7, DFLAGS, 570 RK3288_CLKSEL_CON(3), 0, 7, DFLAGS,
571 RK3288_CLKGATE_CON(2), 12, GFLAGS), 571 RK3288_CLKGATE_CON(2), 12, GFLAGS),
572 COMPOSITE_FRAC(0, "uart4_frac", "uart4_src", 0, 572 COMPOSITE_FRAC(0, "uart4_frac", "uart4_src", CLK_SET_RATE_PARENT,
573 RK3288_CLKSEL_CON(7), 0, 573 RK3288_CLKSEL_CON(7), 0,
574 RK3288_CLKGATE_CON(2), 13, GFLAGS), 574 RK3288_CLKGATE_CON(2), 13, GFLAGS),
575 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, 0, 575 MUX(SCLK_UART4, "sclk_uart4", mux_uart4_p, CLK_SET_RATE_PARENT,
576 RK3288_CLKSEL_CON(3), 8, 2, MFLAGS), 576 RK3288_CLKSEL_CON(3), 8, 2, MFLAGS),
577 577
578 COMPOSITE(0, "mac_pll_src", mux_pll_src_npll_cpll_gpll_p, 0, 578 COMPOSITE(0, "mac_pll_src", mux_pll_src_npll_cpll_gpll_p, 0,
@@ -598,7 +598,7 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
598 GATE(0, "jtag", "ext_jtag", 0, 598 GATE(0, "jtag", "ext_jtag", 0,
599 RK3288_CLKGATE_CON(4), 14, GFLAGS), 599 RK3288_CLKGATE_CON(4), 14, GFLAGS),
600 600
601 COMPOSITE_NODIV(0, "usbphy480m_src", mux_usbphy480m_p, 0, 601 COMPOSITE_NODIV(SCLK_USBPHY480M_SRC, "usbphy480m_src", mux_usbphy480m_p, 0,
602 RK3288_CLKSEL_CON(13), 11, 2, MFLAGS, 602 RK3288_CLKSEL_CON(13), 11, 2, MFLAGS,
603 RK3288_CLKGATE_CON(5), 14, GFLAGS), 603 RK3288_CLKGATE_CON(5), 14, GFLAGS),
604 COMPOSITE_NODIV(SCLK_HSICPHY480M, "sclk_hsicphy480m", mux_hsicphy480m_p, 0, 604 COMPOSITE_NODIV(SCLK_HSICPHY480M, "sclk_hsicphy480m", mux_hsicphy480m_p, 0,
@@ -704,8 +704,8 @@ static struct rockchip_clk_branch rk3288_clk_branches[] __initdata = {
704 704
705 GATE(SCLK_LCDC_PWM0, "sclk_lcdc_pwm0", "xin24m", 0, RK3288_CLKGATE_CON(13), 10, GFLAGS), 705 GATE(SCLK_LCDC_PWM0, "sclk_lcdc_pwm0", "xin24m", 0, RK3288_CLKGATE_CON(13), 10, GFLAGS),
706 GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS), 706 GATE(SCLK_LCDC_PWM1, "sclk_lcdc_pwm1", "xin24m", 0, RK3288_CLKGATE_CON(13), 11, GFLAGS),
707 GATE(0, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS), 707 GATE(SCLK_PVTM_CORE, "sclk_pvtm_core", "xin24m", 0, RK3288_CLKGATE_CON(5), 9, GFLAGS),
708 GATE(0, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS), 708 GATE(SCLK_PVTM_GPU, "sclk_pvtm_gpu", "xin24m", 0, RK3288_CLKGATE_CON(5), 10, GFLAGS),
709 GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS), 709 GATE(0, "sclk_mipidsi_24m", "xin24m", 0, RK3288_CLKGATE_CON(5), 15, GFLAGS),
710 710
711 /* sclk_gpu gates */ 711 /* sclk_gpu gates */
@@ -805,6 +805,20 @@ static int rk3288_clk_suspend(void)
805 rk3288_saved_cru_regs[i] = 805 rk3288_saved_cru_regs[i] =
806 readl_relaxed(rk3288_cru_base + reg_id); 806 readl_relaxed(rk3288_cru_base + reg_id);
807 } 807 }
808
809 /*
810 * Switch PLLs other than DPLL (for SDRAM) to slow mode to
811 * avoid crashes on resume. The Mask ROM on the system will
812 * put APLL, CPLL, and GPLL into slow mode at resume time
813 * anyway (which is why we restore them), but we might not
814 * even make it to the Mask ROM if this isn't done at suspend
815 * time.
816 *
817 * NOTE: only APLL truly matters here, but we'll do them all.
818 */
819
820 writel_relaxed(0xf3030000, rk3288_cru_base + RK3288_MODE_CON);
821
808 return 0; 822 return 0;
809} 823}
810 824
@@ -866,6 +880,14 @@ static void __init rk3288_clk_init(struct device_node *np)
866 pr_warn("%s: could not register clock hclk_vcodec_pre: %ld\n", 880 pr_warn("%s: could not register clock hclk_vcodec_pre: %ld\n",
867 __func__, PTR_ERR(clk)); 881 __func__, PTR_ERR(clk));
868 882
883 /* Watchdog pclk is controlled by RK3288_SGRF_SOC_CON0[1]. */
884 clk = clk_register_fixed_factor(NULL, "pclk_wdt", "pclk_pd_alive", 0, 1, 1);
885 if (IS_ERR(clk))
886 pr_warn("%s: could not register clock pclk_wdt: %ld\n",
887 __func__, PTR_ERR(clk));
888 else
889 rockchip_clk_add_lookup(clk, PCLK_WDT);
890
869 rockchip_clk_register_plls(rk3288_pll_clks, 891 rockchip_clk_register_plls(rk3288_pll_clks,
870 ARRAY_SIZE(rk3288_pll_clks), 892 ARRAY_SIZE(rk3288_pll_clks),
871 RK3288_GRF_SOC_STATUS1); 893 RK3288_GRF_SOC_STATUS1);
diff --git a/drivers/clk/samsung/clk-exynos-audss.c b/drivers/clk/samsung/clk-exynos-audss.c
index f2c2ccce49bb..454b02ae486a 100644
--- a/drivers/clk/samsung/clk-exynos-audss.c
+++ b/drivers/clk/samsung/clk-exynos-audss.c
@@ -82,6 +82,26 @@ static const struct of_device_id exynos_audss_clk_of_match[] = {
82 {}, 82 {},
83}; 83};
84 84
85static void exynos_audss_clk_teardown(void)
86{
87 int i;
88
89 for (i = EXYNOS_MOUT_AUDSS; i < EXYNOS_DOUT_SRP; i++) {
90 if (!IS_ERR(clk_table[i]))
91 clk_unregister_mux(clk_table[i]);
92 }
93
94 for (; i < EXYNOS_SRP_CLK; i++) {
95 if (!IS_ERR(clk_table[i]))
96 clk_unregister_divider(clk_table[i]);
97 }
98
99 for (; i < clk_data.clk_num; i++) {
100 if (!IS_ERR(clk_table[i]))
101 clk_unregister_gate(clk_table[i]);
102 }
103}
104
85/* register exynos_audss clocks */ 105/* register exynos_audss clocks */
86static int exynos_audss_clk_probe(struct platform_device *pdev) 106static int exynos_audss_clk_probe(struct platform_device *pdev)
87{ 107{
@@ -219,10 +239,7 @@ static int exynos_audss_clk_probe(struct platform_device *pdev)
219 return 0; 239 return 0;
220 240
221unregister: 241unregister:
222 for (i = 0; i < clk_data.clk_num; i++) { 242 exynos_audss_clk_teardown();
223 if (!IS_ERR(clk_table[i]))
224 clk_unregister(clk_table[i]);
225 }
226 243
227 if (!IS_ERR(epll)) 244 if (!IS_ERR(epll))
228 clk_disable_unprepare(epll); 245 clk_disable_unprepare(epll);
@@ -232,18 +249,13 @@ unregister:
232 249
233static int exynos_audss_clk_remove(struct platform_device *pdev) 250static int exynos_audss_clk_remove(struct platform_device *pdev)
234{ 251{
235 int i;
236
237#ifdef CONFIG_PM_SLEEP 252#ifdef CONFIG_PM_SLEEP
238 unregister_syscore_ops(&exynos_audss_clk_syscore_ops); 253 unregister_syscore_ops(&exynos_audss_clk_syscore_ops);
239#endif 254#endif
240 255
241 of_clk_del_provider(pdev->dev.of_node); 256 of_clk_del_provider(pdev->dev.of_node);
242 257
243 for (i = 0; i < clk_data.clk_num; i++) { 258 exynos_audss_clk_teardown();
244 if (!IS_ERR(clk_table[i]))
245 clk_unregister(clk_table[i]);
246 }
247 259
248 if (!IS_ERR(epll)) 260 if (!IS_ERR(epll))
249 clk_disable_unprepare(epll); 261 clk_disable_unprepare(epll);
diff --git a/drivers/clk/samsung/clk-exynos3250.c b/drivers/clk/samsung/clk-exynos3250.c
index 6e6cca392082..cc4c348d8a24 100644
--- a/drivers/clk/samsung/clk-exynos3250.c
+++ b/drivers/clk/samsung/clk-exynos3250.c
@@ -104,27 +104,6 @@
104#define PWR_CTRL1_USE_CORE1_WFI (1 << 1) 104#define PWR_CTRL1_USE_CORE1_WFI (1 << 1)
105#define PWR_CTRL1_USE_CORE0_WFI (1 << 0) 105#define PWR_CTRL1_USE_CORE0_WFI (1 << 0)
106 106
107/* list of PLLs to be registered */
108enum exynos3250_plls {
109 apll, mpll, vpll, upll,
110 nr_plls
111};
112
113/* list of PLLs in DMC block to be registered */
114enum exynos3250_dmc_plls {
115 bpll, epll,
116 nr_dmc_plls
117};
118
119static void __iomem *reg_base;
120static void __iomem *dmc_reg_base;
121
122/*
123 * Support for CMU save/restore across system suspends
124 */
125#ifdef CONFIG_PM_SLEEP
126static struct samsung_clk_reg_dump *exynos3250_clk_regs;
127
128static unsigned long exynos3250_cmu_clk_regs[] __initdata = { 107static unsigned long exynos3250_cmu_clk_regs[] __initdata = {
129 SRC_LEFTBUS, 108 SRC_LEFTBUS,
130 DIV_LEFTBUS, 109 DIV_LEFTBUS,
@@ -195,43 +174,6 @@ static unsigned long exynos3250_cmu_clk_regs[] __initdata = {
195 PWR_CTRL2, 174 PWR_CTRL2,
196}; 175};
197 176
198static int exynos3250_clk_suspend(void)
199{
200 samsung_clk_save(reg_base, exynos3250_clk_regs,
201 ARRAY_SIZE(exynos3250_cmu_clk_regs));
202 return 0;
203}
204
205static void exynos3250_clk_resume(void)
206{
207 samsung_clk_restore(reg_base, exynos3250_clk_regs,
208 ARRAY_SIZE(exynos3250_cmu_clk_regs));
209}
210
211static struct syscore_ops exynos3250_clk_syscore_ops = {
212 .suspend = exynos3250_clk_suspend,
213 .resume = exynos3250_clk_resume,
214};
215
216static void exynos3250_clk_sleep_init(void)
217{
218 exynos3250_clk_regs =
219 samsung_clk_alloc_reg_dump(exynos3250_cmu_clk_regs,
220 ARRAY_SIZE(exynos3250_cmu_clk_regs));
221 if (!exynos3250_clk_regs) {
222 pr_warn("%s: Failed to allocate sleep save data\n", __func__);
223 goto err;
224 }
225
226 register_syscore_ops(&exynos3250_clk_syscore_ops);
227 return;
228err:
229 kfree(exynos3250_clk_regs);
230}
231#else
232static inline void exynos3250_clk_sleep_init(void) { }
233#endif
234
235/* list of all parent clock list */ 177/* list of all parent clock list */
236PNAME(mout_vpllsrc_p) = { "fin_pll", }; 178PNAME(mout_vpllsrc_p) = { "fin_pll", };
237 179
@@ -782,18 +724,18 @@ static struct samsung_pll_rate_table exynos3250_vpll_rates[] = {
782 { /* sentinel */ } 724 { /* sentinel */ }
783}; 725};
784 726
785static struct samsung_pll_clock exynos3250_plls[nr_plls] __initdata = { 727static struct samsung_pll_clock exynos3250_plls[] __initdata = {
786 [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", 728 PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll",
787 APLL_LOCK, APLL_CON0, NULL), 729 APLL_LOCK, APLL_CON0, exynos3250_pll_rates),
788 [mpll] = PLL(pll_35xx, CLK_FOUT_MPLL, "fout_mpll", "fin_pll", 730 PLL(pll_35xx, CLK_FOUT_MPLL, "fout_mpll", "fin_pll",
789 MPLL_LOCK, MPLL_CON0, NULL), 731 MPLL_LOCK, MPLL_CON0, exynos3250_pll_rates),
790 [vpll] = PLL(pll_36xx, CLK_FOUT_VPLL, "fout_vpll", "fin_pll", 732 PLL(pll_36xx, CLK_FOUT_VPLL, "fout_vpll", "fin_pll",
791 VPLL_LOCK, VPLL_CON0, NULL), 733 VPLL_LOCK, VPLL_CON0, exynos3250_vpll_rates),
792 [upll] = PLL(pll_35xx, CLK_FOUT_UPLL, "fout_upll", "fin_pll", 734 PLL(pll_35xx, CLK_FOUT_UPLL, "fout_upll", "fin_pll",
793 UPLL_LOCK, UPLL_CON0, NULL), 735 UPLL_LOCK, UPLL_CON0, exynos3250_pll_rates),
794}; 736};
795 737
796static void __init exynos3_core_down_clock(void) 738static void __init exynos3_core_down_clock(void __iomem *reg_base)
797{ 739{
798 unsigned int tmp; 740 unsigned int tmp;
799 741
@@ -814,38 +756,31 @@ static void __init exynos3_core_down_clock(void)
814 __raw_writel(0x0, reg_base + PWR_CTRL2); 756 __raw_writel(0x0, reg_base + PWR_CTRL2);
815} 757}
816 758
759static struct samsung_cmu_info cmu_info __initdata = {
760 .pll_clks = exynos3250_plls,
761 .nr_pll_clks = ARRAY_SIZE(exynos3250_plls),
762 .mux_clks = mux_clks,
763 .nr_mux_clks = ARRAY_SIZE(mux_clks),
764 .div_clks = div_clks,
765 .nr_div_clks = ARRAY_SIZE(div_clks),
766 .gate_clks = gate_clks,
767 .nr_gate_clks = ARRAY_SIZE(gate_clks),
768 .fixed_factor_clks = fixed_factor_clks,
769 .nr_fixed_factor_clks = ARRAY_SIZE(fixed_factor_clks),
770 .nr_clk_ids = CLK_NR_CLKS,
771 .clk_regs = exynos3250_cmu_clk_regs,
772 .nr_clk_regs = ARRAY_SIZE(exynos3250_cmu_clk_regs),
773};
774
817static void __init exynos3250_cmu_init(struct device_node *np) 775static void __init exynos3250_cmu_init(struct device_node *np)
818{ 776{
819 struct samsung_clk_provider *ctx; 777 struct samsung_clk_provider *ctx;
820 778
821 reg_base = of_iomap(np, 0); 779 ctx = samsung_cmu_register_one(np, &cmu_info);
822 if (!reg_base)
823 panic("%s: failed to map registers\n", __func__);
824
825 ctx = samsung_clk_init(np, reg_base, CLK_NR_CLKS);
826 if (!ctx) 780 if (!ctx)
827 panic("%s: unable to allocate context.\n", __func__); 781 return;
828
829 samsung_clk_register_fixed_factor(ctx, fixed_factor_clks,
830 ARRAY_SIZE(fixed_factor_clks));
831
832 exynos3250_plls[apll].rate_table = exynos3250_pll_rates;
833 exynos3250_plls[mpll].rate_table = exynos3250_pll_rates;
834 exynos3250_plls[vpll].rate_table = exynos3250_vpll_rates;
835 exynos3250_plls[upll].rate_table = exynos3250_pll_rates;
836
837 samsung_clk_register_pll(ctx, exynos3250_plls,
838 ARRAY_SIZE(exynos3250_plls), reg_base);
839
840 samsung_clk_register_mux(ctx, mux_clks, ARRAY_SIZE(mux_clks));
841 samsung_clk_register_div(ctx, div_clks, ARRAY_SIZE(div_clks));
842 samsung_clk_register_gate(ctx, gate_clks, ARRAY_SIZE(gate_clks));
843
844 exynos3_core_down_clock();
845 782
846 exynos3250_clk_sleep_init(); 783 exynos3_core_down_clock(ctx->reg_base);
847
848 samsung_clk_of_add_provider(np, ctx);
849} 784}
850CLK_OF_DECLARE(exynos3250_cmu, "samsung,exynos3250-cmu", exynos3250_cmu_init); 785CLK_OF_DECLARE(exynos3250_cmu, "samsung,exynos3250-cmu", exynos3250_cmu_init);
851 786
@@ -872,12 +807,6 @@ CLK_OF_DECLARE(exynos3250_cmu, "samsung,exynos3250-cmu", exynos3250_cmu_init);
872#define EPLL_CON2 0x111c 807#define EPLL_CON2 0x111c
873#define SRC_EPLL 0x1120 808#define SRC_EPLL 0x1120
874 809
875/*
876 * Support for CMU save/restore across system suspends
877 */
878#ifdef CONFIG_PM_SLEEP
879static struct samsung_clk_reg_dump *exynos3250_dmc_clk_regs;
880
881static unsigned long exynos3250_cmu_dmc_clk_regs[] __initdata = { 810static unsigned long exynos3250_cmu_dmc_clk_regs[] __initdata = {
882 BPLL_LOCK, 811 BPLL_LOCK,
883 BPLL_CON0, 812 BPLL_CON0,
@@ -899,43 +828,6 @@ static unsigned long exynos3250_cmu_dmc_clk_regs[] __initdata = {
899 SRC_EPLL, 828 SRC_EPLL,
900}; 829};
901 830
902static int exynos3250_dmc_clk_suspend(void)
903{
904 samsung_clk_save(dmc_reg_base, exynos3250_dmc_clk_regs,
905 ARRAY_SIZE(exynos3250_cmu_dmc_clk_regs));
906 return 0;
907}
908
909static void exynos3250_dmc_clk_resume(void)
910{
911 samsung_clk_restore(dmc_reg_base, exynos3250_dmc_clk_regs,
912 ARRAY_SIZE(exynos3250_cmu_dmc_clk_regs));
913}
914
915static struct syscore_ops exynos3250_dmc_clk_syscore_ops = {
916 .suspend = exynos3250_dmc_clk_suspend,
917 .resume = exynos3250_dmc_clk_resume,
918};
919
920static void exynos3250_dmc_clk_sleep_init(void)
921{
922 exynos3250_dmc_clk_regs =
923 samsung_clk_alloc_reg_dump(exynos3250_cmu_dmc_clk_regs,
924 ARRAY_SIZE(exynos3250_cmu_dmc_clk_regs));
925 if (!exynos3250_dmc_clk_regs) {
926 pr_warn("%s: Failed to allocate sleep save data\n", __func__);
927 goto err;
928 }
929
930 register_syscore_ops(&exynos3250_dmc_clk_syscore_ops);
931 return;
932err:
933 kfree(exynos3250_dmc_clk_regs);
934}
935#else
936static inline void exynos3250_dmc_clk_sleep_init(void) { }
937#endif
938
939PNAME(mout_epll_p) = { "fin_pll", "fout_epll", }; 831PNAME(mout_epll_p) = { "fin_pll", "fout_epll", };
940PNAME(mout_bpll_p) = { "fin_pll", "fout_bpll", }; 832PNAME(mout_bpll_p) = { "fin_pll", "fout_bpll", };
941PNAME(mout_mpll_mif_p) = { "fin_pll", "sclk_mpll_mif", }; 833PNAME(mout_mpll_mif_p) = { "fin_pll", "sclk_mpll_mif", };
@@ -977,43 +869,28 @@ static struct samsung_div_clock dmc_div_clks[] __initdata = {
977 DIV(CLK_DIV_DMCD, "div_dmcd", "div_dmc", DIV_DMC1, 11, 3), 869 DIV(CLK_DIV_DMCD, "div_dmcd", "div_dmc", DIV_DMC1, 11, 3),
978}; 870};
979 871
980static struct samsung_pll_clock exynos3250_dmc_plls[nr_dmc_plls] __initdata = { 872static struct samsung_pll_clock exynos3250_dmc_plls[] __initdata = {
981 [bpll] = PLL(pll_35xx, CLK_FOUT_BPLL, "fout_bpll", "fin_pll", 873 PLL(pll_35xx, CLK_FOUT_BPLL, "fout_bpll", "fin_pll",
982 BPLL_LOCK, BPLL_CON0, NULL), 874 BPLL_LOCK, BPLL_CON0, exynos3250_pll_rates),
983 [epll] = PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll", 875 PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll",
984 EPLL_LOCK, EPLL_CON0, NULL), 876 EPLL_LOCK, EPLL_CON0, exynos3250_epll_rates),
877};
878
879static struct samsung_cmu_info dmc_cmu_info __initdata = {
880 .pll_clks = exynos3250_dmc_plls,
881 .nr_pll_clks = ARRAY_SIZE(exynos3250_dmc_plls),
882 .mux_clks = dmc_mux_clks,
883 .nr_mux_clks = ARRAY_SIZE(dmc_mux_clks),
884 .div_clks = dmc_div_clks,
885 .nr_div_clks = ARRAY_SIZE(dmc_div_clks),
886 .nr_clk_ids = NR_CLKS_DMC,
887 .clk_regs = exynos3250_cmu_dmc_clk_regs,
888 .nr_clk_regs = ARRAY_SIZE(exynos3250_cmu_dmc_clk_regs),
985}; 889};
986 890
987static void __init exynos3250_cmu_dmc_init(struct device_node *np) 891static void __init exynos3250_cmu_dmc_init(struct device_node *np)
988{ 892{
989 struct samsung_clk_provider *ctx; 893 samsung_cmu_register_one(np, &dmc_cmu_info);
990
991 dmc_reg_base = of_iomap(np, 0);
992 if (!dmc_reg_base)
993 panic("%s: failed to map registers\n", __func__);
994
995 ctx = samsung_clk_init(np, dmc_reg_base, NR_CLKS_DMC);
996 if (!ctx)
997 panic("%s: unable to allocate context.\n", __func__);
998
999 exynos3250_dmc_plls[bpll].rate_table = exynos3250_pll_rates;
1000 exynos3250_dmc_plls[epll].rate_table = exynos3250_epll_rates;
1001
1002 pr_err("CLK registering epll bpll: %d, %d, %d, %d\n",
1003 exynos3250_dmc_plls[bpll].rate_table[0].rate,
1004 exynos3250_dmc_plls[bpll].rate_table[0].mdiv,
1005 exynos3250_dmc_plls[bpll].rate_table[0].pdiv,
1006 exynos3250_dmc_plls[bpll].rate_table[0].sdiv
1007 );
1008 samsung_clk_register_pll(ctx, exynos3250_dmc_plls,
1009 ARRAY_SIZE(exynos3250_dmc_plls), dmc_reg_base);
1010
1011 samsung_clk_register_mux(ctx, dmc_mux_clks, ARRAY_SIZE(dmc_mux_clks));
1012 samsung_clk_register_div(ctx, dmc_div_clks, ARRAY_SIZE(dmc_div_clks));
1013
1014 exynos3250_dmc_clk_sleep_init();
1015
1016 samsung_clk_of_add_provider(np, ctx);
1017} 894}
1018CLK_OF_DECLARE(exynos3250_cmu_dmc, "samsung,exynos3250-cmu-dmc", 895CLK_OF_DECLARE(exynos3250_cmu_dmc, "samsung,exynos3250-cmu-dmc",
1019 exynos3250_cmu_dmc_init); 896 exynos3250_cmu_dmc_init);
diff --git a/drivers/clk/samsung/clk-exynos4.c b/drivers/clk/samsung/clk-exynos4.c
index 88e8c6bbd77f..51462e85675f 100644
--- a/drivers/clk/samsung/clk-exynos4.c
+++ b/drivers/clk/samsung/clk-exynos4.c
@@ -703,12 +703,12 @@ static struct samsung_mux_clock exynos4x12_mux_clks[] __initdata = {
703 703
704/* list of divider clocks supported in all exynos4 soc's */ 704/* list of divider clocks supported in all exynos4 soc's */
705static struct samsung_div_clock exynos4_div_clks[] __initdata = { 705static struct samsung_div_clock exynos4_div_clks[] __initdata = {
706 DIV(0, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 3), 706 DIV(CLK_DIV_GDL, "div_gdl", "mout_gdl", DIV_LEFTBUS, 0, 3),
707 DIV(0, "div_gpl", "div_gdl", DIV_LEFTBUS, 4, 3), 707 DIV(0, "div_gpl", "div_gdl", DIV_LEFTBUS, 4, 3),
708 DIV(0, "div_clkout_leftbus", "mout_clkout_leftbus", 708 DIV(0, "div_clkout_leftbus", "mout_clkout_leftbus",
709 CLKOUT_CMU_LEFTBUS, 8, 6), 709 CLKOUT_CMU_LEFTBUS, 8, 6),
710 710
711 DIV(0, "div_gdr", "mout_gdr", DIV_RIGHTBUS, 0, 3), 711 DIV(CLK_DIV_GDR, "div_gdr", "mout_gdr", DIV_RIGHTBUS, 0, 3),
712 DIV(0, "div_gpr", "div_gdr", DIV_RIGHTBUS, 4, 3), 712 DIV(0, "div_gpr", "div_gdr", DIV_RIGHTBUS, 4, 3),
713 DIV(0, "div_clkout_rightbus", "mout_clkout_rightbus", 713 DIV(0, "div_clkout_rightbus", "mout_clkout_rightbus",
714 CLKOUT_CMU_RIGHTBUS, 8, 6), 714 CLKOUT_CMU_RIGHTBUS, 8, 6),
@@ -781,10 +781,10 @@ static struct samsung_div_clock exynos4_div_clks[] __initdata = {
781 CLK_SET_RATE_PARENT, 0), 781 CLK_SET_RATE_PARENT, 0),
782 DIV(0, "div_clkout_top", "mout_clkout_top", CLKOUT_CMU_TOP, 8, 6), 782 DIV(0, "div_clkout_top", "mout_clkout_top", CLKOUT_CMU_TOP, 8, 6),
783 783
784 DIV(0, "div_acp", "mout_dmc_bus", DIV_DMC0, 0, 3), 784 DIV(CLK_DIV_ACP, "div_acp", "mout_dmc_bus", DIV_DMC0, 0, 3),
785 DIV(0, "div_acp_pclk", "div_acp", DIV_DMC0, 4, 3), 785 DIV(0, "div_acp_pclk", "div_acp", DIV_DMC0, 4, 3),
786 DIV(0, "div_dphy", "mout_dphy", DIV_DMC0, 8, 3), 786 DIV(0, "div_dphy", "mout_dphy", DIV_DMC0, 8, 3),
787 DIV(0, "div_dmc", "mout_dmc_bus", DIV_DMC0, 12, 3), 787 DIV(CLK_DIV_DMC, "div_dmc", "mout_dmc_bus", DIV_DMC0, 12, 3),
788 DIV(0, "div_dmcd", "div_dmc", DIV_DMC0, 16, 3), 788 DIV(0, "div_dmcd", "div_dmc", DIV_DMC0, 16, 3),
789 DIV(0, "div_dmcp", "div_dmcd", DIV_DMC0, 20, 3), 789 DIV(0, "div_dmcp", "div_dmcd", DIV_DMC0, 20, 3),
790 DIV(0, "div_pwi", "mout_pwi", DIV_DMC1, 8, 4), 790 DIV(0, "div_pwi", "mout_pwi", DIV_DMC1, 8, 4),
@@ -829,7 +829,7 @@ static struct samsung_div_clock exynos4x12_div_clks[] __initdata = {
829 DIV_F(CLK_DIV_MCUISP1, "div_mcuisp1", "div_mcuisp0", E4X12_DIV_ISP1, 829 DIV_F(CLK_DIV_MCUISP1, "div_mcuisp1", "div_mcuisp0", E4X12_DIV_ISP1,
830 8, 3, CLK_GET_RATE_NOCACHE, 0), 830 8, 3, CLK_GET_RATE_NOCACHE, 0),
831 DIV(CLK_SCLK_FIMG2D, "sclk_fimg2d", "mout_g2d", DIV_DMC1, 0, 4), 831 DIV(CLK_SCLK_FIMG2D, "sclk_fimg2d", "mout_g2d", DIV_DMC1, 0, 4),
832 DIV(0, "div_c2c", "mout_c2c", DIV_DMC1, 4, 3), 832 DIV(CLK_DIV_C2C, "div_c2c", "mout_c2c", DIV_DMC1, 4, 3),
833 DIV(0, "div_c2c_aclk", "div_c2c", DIV_DMC1, 12, 3), 833 DIV(0, "div_c2c_aclk", "div_c2c", DIV_DMC1, 12, 3),
834}; 834};
835 835
diff --git a/drivers/clk/samsung/clk-exynos4415.c b/drivers/clk/samsung/clk-exynos4415.c
index 2123fc251e0f..6c78b09c829f 100644
--- a/drivers/clk/samsung/clk-exynos4415.c
+++ b/drivers/clk/samsung/clk-exynos4415.c
@@ -113,19 +113,6 @@
113#define DIV_CPU0 0x14500 113#define DIV_CPU0 0x14500
114#define DIV_CPU1 0x14504 114#define DIV_CPU1 0x14504
115 115
116enum exynos4415_plls {
117 apll, epll, g3d_pll, isp_pll, disp_pll,
118 nr_plls,
119};
120
121static struct samsung_clk_provider *exynos4415_ctx;
122
123/*
124 * Support for CMU save/restore across system suspends
125 */
126#ifdef CONFIG_PM_SLEEP
127static struct samsung_clk_reg_dump *exynos4415_clk_regs;
128
129static unsigned long exynos4415_cmu_clk_regs[] __initdata = { 116static unsigned long exynos4415_cmu_clk_regs[] __initdata = {
130 SRC_LEFTBUS, 117 SRC_LEFTBUS,
131 DIV_LEFTBUS, 118 DIV_LEFTBUS,
@@ -219,41 +206,6 @@ static unsigned long exynos4415_cmu_clk_regs[] __initdata = {
219 DIV_CPU1, 206 DIV_CPU1,
220}; 207};
221 208
222static int exynos4415_clk_suspend(void)
223{
224 samsung_clk_save(exynos4415_ctx->reg_base, exynos4415_clk_regs,
225 ARRAY_SIZE(exynos4415_cmu_clk_regs));
226
227 return 0;
228}
229
230static void exynos4415_clk_resume(void)
231{
232 samsung_clk_restore(exynos4415_ctx->reg_base, exynos4415_clk_regs,
233 ARRAY_SIZE(exynos4415_cmu_clk_regs));
234}
235
236static struct syscore_ops exynos4415_clk_syscore_ops = {
237 .suspend = exynos4415_clk_suspend,
238 .resume = exynos4415_clk_resume,
239};
240
241static void exynos4415_clk_sleep_init(void)
242{
243 exynos4415_clk_regs =
244 samsung_clk_alloc_reg_dump(exynos4415_cmu_clk_regs,
245 ARRAY_SIZE(exynos4415_cmu_clk_regs));
246 if (!exynos4415_clk_regs) {
247 pr_warn("%s: Failed to allocate sleep save data\n", __func__);
248 return;
249 }
250
251 register_syscore_ops(&exynos4415_clk_syscore_ops);
252}
253#else
254static inline void exynos4415_clk_sleep_init(void) { }
255#endif
256
257/* list of all parent clock list */ 209/* list of all parent clock list */
258PNAME(mout_g3d_pllsrc_p) = { "fin_pll", }; 210PNAME(mout_g3d_pllsrc_p) = { "fin_pll", };
259 211
@@ -959,56 +911,40 @@ static struct samsung_pll_rate_table exynos4415_epll_rates[] = {
959 { /* sentinel */ } 911 { /* sentinel */ }
960}; 912};
961 913
962static struct samsung_pll_clock exynos4415_plls[nr_plls] __initdata = { 914static struct samsung_pll_clock exynos4415_plls[] __initdata = {
963 [apll] = PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll", 915 PLL(pll_35xx, CLK_FOUT_APLL, "fout_apll", "fin_pll",
964 APLL_LOCK, APLL_CON0, NULL), 916 APLL_LOCK, APLL_CON0, exynos4415_pll_rates),
965 [epll] = PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll", 917 PLL(pll_36xx, CLK_FOUT_EPLL, "fout_epll", "fin_pll",
966 EPLL_LOCK, EPLL_CON0, NULL), 918 EPLL_LOCK, EPLL_CON0, exynos4415_epll_rates),
967 [g3d_pll] = PLL(pll_35xx, CLK_FOUT_G3D_PLL, "fout_g3d_pll", 919 PLL(pll_35xx, CLK_FOUT_G3D_PLL, "fout_g3d_pll", "mout_g3d_pllsrc",
968 "mout_g3d_pllsrc", G3D_PLL_LOCK, G3D_PLL_CON0, NULL), 920 G3D_PLL_LOCK, G3D_PLL_CON0, exynos4415_pll_rates),
969 [isp_pll] = PLL(pll_35xx, CLK_FOUT_ISP_PLL, "fout_isp_pll", "fin_pll", 921 PLL(pll_35xx, CLK_FOUT_ISP_PLL, "fout_isp_pll", "fin_pll",
970 ISP_PLL_LOCK, ISP_PLL_CON0, NULL), 922 ISP_PLL_LOCK, ISP_PLL_CON0, exynos4415_pll_rates),
971 [disp_pll] = PLL(pll_35xx, CLK_FOUT_DISP_PLL, "fout_disp_pll", 923 PLL(pll_35xx, CLK_FOUT_DISP_PLL, "fout_disp_pll",
972 "fin_pll", DISP_PLL_LOCK, DISP_PLL_CON0, NULL), 924 "fin_pll", DISP_PLL_LOCK, DISP_PLL_CON0, exynos4415_pll_rates),
925};
926
927static struct samsung_cmu_info cmu_info __initdata = {
928 .pll_clks = exynos4415_plls,
929 .nr_pll_clks = ARRAY_SIZE(exynos4415_plls),
930 .mux_clks = exynos4415_mux_clks,
931 .nr_mux_clks = ARRAY_SIZE(exynos4415_mux_clks),
932 .div_clks = exynos4415_div_clks,
933 .nr_div_clks = ARRAY_SIZE(exynos4415_div_clks),
934 .gate_clks = exynos4415_gate_clks,
935 .nr_gate_clks = ARRAY_SIZE(exynos4415_gate_clks),
936 .fixed_clks = exynos4415_fixed_rate_clks,
937 .nr_fixed_clks = ARRAY_SIZE(exynos4415_fixed_rate_clks),
938 .fixed_factor_clks = exynos4415_fixed_factor_clks,
939 .nr_fixed_factor_clks = ARRAY_SIZE(exynos4415_fixed_factor_clks),
940 .nr_clk_ids = CLK_NR_CLKS,
941 .clk_regs = exynos4415_cmu_clk_regs,
942 .nr_clk_regs = ARRAY_SIZE(exynos4415_cmu_clk_regs),
973}; 943};
974 944
975static void __init exynos4415_cmu_init(struct device_node *np) 945static void __init exynos4415_cmu_init(struct device_node *np)
976{ 946{
977 void __iomem *reg_base; 947 samsung_cmu_register_one(np, &cmu_info);
978
979 reg_base = of_iomap(np, 0);
980 if (!reg_base)
981 panic("%s: failed to map registers\n", __func__);
982
983 exynos4415_ctx = samsung_clk_init(np, reg_base, CLK_NR_CLKS);
984 if (!exynos4415_ctx)
985 panic("%s: unable to allocate context.\n", __func__);
986
987 exynos4415_plls[apll].rate_table = exynos4415_pll_rates;
988 exynos4415_plls[epll].rate_table = exynos4415_epll_rates;
989 exynos4415_plls[g3d_pll].rate_table = exynos4415_pll_rates;
990 exynos4415_plls[isp_pll].rate_table = exynos4415_pll_rates;
991 exynos4415_plls[disp_pll].rate_table = exynos4415_pll_rates;
992
993 samsung_clk_register_fixed_factor(exynos4415_ctx,
994 exynos4415_fixed_factor_clks,
995 ARRAY_SIZE(exynos4415_fixed_factor_clks));
996 samsung_clk_register_fixed_rate(exynos4415_ctx,
997 exynos4415_fixed_rate_clks,
998 ARRAY_SIZE(exynos4415_fixed_rate_clks));
999
1000 samsung_clk_register_pll(exynos4415_ctx, exynos4415_plls,
1001 ARRAY_SIZE(exynos4415_plls), reg_base);
1002 samsung_clk_register_mux(exynos4415_ctx, exynos4415_mux_clks,
1003 ARRAY_SIZE(exynos4415_mux_clks));
1004 samsung_clk_register_div(exynos4415_ctx, exynos4415_div_clks,
1005 ARRAY_SIZE(exynos4415_div_clks));
1006 samsung_clk_register_gate(exynos4415_ctx, exynos4415_gate_clks,
1007 ARRAY_SIZE(exynos4415_gate_clks));
1008
1009 exynos4415_clk_sleep_init();
1010
1011 samsung_clk_of_add_provider(np, exynos4415_ctx);
1012} 948}
1013CLK_OF_DECLARE(exynos4415_cmu, "samsung,exynos4415-cmu", exynos4415_cmu_init); 949CLK_OF_DECLARE(exynos4415_cmu, "samsung,exynos4415-cmu", exynos4415_cmu_init);
1014 950
@@ -1027,16 +963,6 @@ CLK_OF_DECLARE(exynos4415_cmu, "samsung,exynos4415-cmu", exynos4415_cmu_init);
1027#define SRC_DMC 0x300 963#define SRC_DMC 0x300
1028#define DIV_DMC1 0x504 964#define DIV_DMC1 0x504
1029 965
1030enum exynos4415_dmc_plls {
1031 mpll, bpll,
1032 nr_dmc_plls,
1033};
1034
1035static struct samsung_clk_provider *exynos4415_dmc_ctx;
1036
1037#ifdef CONFIG_PM_SLEEP
1038static struct samsung_clk_reg_dump *exynos4415_dmc_clk_regs;
1039
1040static unsigned long exynos4415_cmu_dmc_clk_regs[] __initdata = { 966static unsigned long exynos4415_cmu_dmc_clk_regs[] __initdata = {
1041 MPLL_LOCK, 967 MPLL_LOCK,
1042 MPLL_CON0, 968 MPLL_CON0,
@@ -1050,42 +976,6 @@ static unsigned long exynos4415_cmu_dmc_clk_regs[] __initdata = {
1050 DIV_DMC1, 976 DIV_DMC1,
1051}; 977};
1052 978
1053static int exynos4415_dmc_clk_suspend(void)
1054{
1055 samsung_clk_save(exynos4415_dmc_ctx->reg_base,
1056 exynos4415_dmc_clk_regs,
1057 ARRAY_SIZE(exynos4415_cmu_dmc_clk_regs));
1058 return 0;
1059}
1060
1061static void exynos4415_dmc_clk_resume(void)
1062{
1063 samsung_clk_restore(exynos4415_dmc_ctx->reg_base,
1064 exynos4415_dmc_clk_regs,
1065 ARRAY_SIZE(exynos4415_cmu_dmc_clk_regs));
1066}
1067
1068static struct syscore_ops exynos4415_dmc_clk_syscore_ops = {
1069 .suspend = exynos4415_dmc_clk_suspend,
1070 .resume = exynos4415_dmc_clk_resume,
1071};
1072
1073static void exynos4415_dmc_clk_sleep_init(void)
1074{
1075 exynos4415_dmc_clk_regs =
1076 samsung_clk_alloc_reg_dump(exynos4415_cmu_dmc_clk_regs,
1077 ARRAY_SIZE(exynos4415_cmu_dmc_clk_regs));
1078 if (!exynos4415_dmc_clk_regs) {
1079 pr_warn("%s: Failed to allocate sleep save data\n", __func__);
1080 return;
1081 }
1082
1083 register_syscore_ops(&exynos4415_dmc_clk_syscore_ops);
1084}
1085#else
1086static inline void exynos4415_dmc_clk_sleep_init(void) { }
1087#endif /* CONFIG_PM_SLEEP */
1088
1089PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", }; 979PNAME(mout_mpll_p) = { "fin_pll", "fout_mpll", };
1090PNAME(mout_bpll_p) = { "fin_pll", "fout_bpll", }; 980PNAME(mout_bpll_p) = { "fin_pll", "fout_bpll", };
1091PNAME(mbpll_p) = { "mout_mpll", "mout_bpll", }; 981PNAME(mbpll_p) = { "mout_mpll", "mout_bpll", };
@@ -1107,38 +997,28 @@ static struct samsung_div_clock exynos4415_dmc_div_clks[] __initdata = {
1107 DIV(CLK_DMC_DIV_MPLL_PRE, "div_mpll_pre", "mout_mpll", DIV_DMC1, 8, 2), 997 DIV(CLK_DMC_DIV_MPLL_PRE, "div_mpll_pre", "mout_mpll", DIV_DMC1, 8, 2),
1108}; 998};
1109 999
1110static struct samsung_pll_clock exynos4415_dmc_plls[nr_dmc_plls] __initdata = { 1000static struct samsung_pll_clock exynos4415_dmc_plls[] __initdata = {
1111 [mpll] = PLL(pll_35xx, CLK_DMC_FOUT_MPLL, "fout_mpll", "fin_pll", 1001 PLL(pll_35xx, CLK_DMC_FOUT_MPLL, "fout_mpll", "fin_pll",
1112 MPLL_LOCK, MPLL_CON0, NULL), 1002 MPLL_LOCK, MPLL_CON0, exynos4415_pll_rates),
1113 [bpll] = PLL(pll_35xx, CLK_DMC_FOUT_BPLL, "fout_bpll", "fin_pll", 1003 PLL(pll_35xx, CLK_DMC_FOUT_BPLL, "fout_bpll", "fin_pll",
1114 BPLL_LOCK, BPLL_CON0, NULL), 1004 BPLL_LOCK, BPLL_CON0, exynos4415_pll_rates),
1005};
1006
1007static struct samsung_cmu_info cmu_dmc_info __initdata = {
1008 .pll_clks = exynos4415_dmc_plls,
1009 .nr_pll_clks = ARRAY_SIZE(exynos4415_dmc_plls),
1010 .mux_clks = exynos4415_dmc_mux_clks,
1011 .nr_mux_clks = ARRAY_SIZE(exynos4415_dmc_mux_clks),
1012 .div_clks = exynos4415_dmc_div_clks,
1013 .nr_div_clks = ARRAY_SIZE(exynos4415_dmc_div_clks),
1014 .nr_clk_ids = NR_CLKS_DMC,
1015 .clk_regs = exynos4415_cmu_dmc_clk_regs,
1016 .nr_clk_regs = ARRAY_SIZE(exynos4415_cmu_dmc_clk_regs),
1115}; 1017};
1116 1018
1117static void __init exynos4415_cmu_dmc_init(struct device_node *np) 1019static void __init exynos4415_cmu_dmc_init(struct device_node *np)
1118{ 1020{
1119 void __iomem *reg_base; 1021 samsung_cmu_register_one(np, &cmu_dmc_info);
1120
1121 reg_base = of_iomap(np, 0);
1122 if (!reg_base)
1123 panic("%s: failed to map registers\n", __func__);
1124
1125 exynos4415_dmc_ctx = samsung_clk_init(np, reg_base, NR_CLKS_DMC);
1126 if (!exynos4415_dmc_ctx)
1127 panic("%s: unable to allocate context.\n", __func__);
1128
1129 exynos4415_dmc_plls[mpll].rate_table = exynos4415_pll_rates;
1130 exynos4415_dmc_plls[bpll].rate_table = exynos4415_pll_rates;
1131
1132 samsung_clk_register_pll(exynos4415_dmc_ctx, exynos4415_dmc_plls,
1133 ARRAY_SIZE(exynos4415_dmc_plls), reg_base);
1134 samsung_clk_register_mux(exynos4415_dmc_ctx, exynos4415_dmc_mux_clks,
1135 ARRAY_SIZE(exynos4415_dmc_mux_clks));
1136 samsung_clk_register_div(exynos4415_dmc_ctx, exynos4415_dmc_div_clks,
1137 ARRAY_SIZE(exynos4415_dmc_div_clks));
1138
1139 exynos4415_dmc_clk_sleep_init();
1140
1141 samsung_clk_of_add_provider(np, exynos4415_dmc_ctx);
1142} 1022}
1143CLK_OF_DECLARE(exynos4415_cmu_dmc, "samsung,exynos4415-cmu-dmc", 1023CLK_OF_DECLARE(exynos4415_cmu_dmc, "samsung,exynos4415-cmu-dmc",
1144 exynos4415_cmu_dmc_init); 1024 exynos4415_cmu_dmc_init);
diff --git a/drivers/clk/samsung/clk-exynos7.c b/drivers/clk/samsung/clk-exynos7.c
index ea4483b8d62e..03d36e847b78 100644
--- a/drivers/clk/samsung/clk-exynos7.c
+++ b/drivers/clk/samsung/clk-exynos7.c
@@ -34,6 +34,7 @@
34#define DIV_TOPC0 0x0600 34#define DIV_TOPC0 0x0600
35#define DIV_TOPC1 0x0604 35#define DIV_TOPC1 0x0604
36#define DIV_TOPC3 0x060C 36#define DIV_TOPC3 0x060C
37#define ENABLE_ACLK_TOPC1 0x0804
37 38
38static struct samsung_fixed_factor_clock topc_fixed_factor_clks[] __initdata = { 39static struct samsung_fixed_factor_clock topc_fixed_factor_clks[] __initdata = {
39 FFACTOR(0, "ffac_topc_bus0_pll_div2", "mout_bus0_pll_ctrl", 1, 2, 0), 40 FFACTOR(0, "ffac_topc_bus0_pll_div2", "mout_bus0_pll_ctrl", 1, 2, 0),
@@ -45,6 +46,7 @@ static struct samsung_fixed_factor_clock topc_fixed_factor_clks[] __initdata = {
45}; 46};
46 47
47/* List of parent clocks for Muxes in CMU_TOPC */ 48/* List of parent clocks for Muxes in CMU_TOPC */
49PNAME(mout_aud_pll_ctrl_p) = { "fin_pll", "fout_aud_pll" };
48PNAME(mout_bus0_pll_ctrl_p) = { "fin_pll", "fout_bus0_pll" }; 50PNAME(mout_bus0_pll_ctrl_p) = { "fin_pll", "fout_bus0_pll" };
49PNAME(mout_bus1_pll_ctrl_p) = { "fin_pll", "fout_bus1_pll" }; 51PNAME(mout_bus1_pll_ctrl_p) = { "fin_pll", "fout_bus1_pll" };
50PNAME(mout_cc_pll_ctrl_p) = { "fin_pll", "fout_cc_pll" }; 52PNAME(mout_cc_pll_ctrl_p) = { "fin_pll", "fout_cc_pll" };
@@ -104,9 +106,11 @@ static struct samsung_mux_clock topc_mux_clks[] __initdata = {
104 106
105 MUX(0, "mout_sclk_bus0_pll_out", mout_sclk_bus0_pll_out_p, 107 MUX(0, "mout_sclk_bus0_pll_out", mout_sclk_bus0_pll_out_p,
106 MUX_SEL_TOPC1, 16, 1), 108 MUX_SEL_TOPC1, 16, 1),
109 MUX(0, "mout_aud_pll_ctrl", mout_aud_pll_ctrl_p, MUX_SEL_TOPC1, 0, 1),
107 110
108 MUX(0, "mout_aclk_ccore_133", mout_topc_group2, MUX_SEL_TOPC2, 4, 2), 111 MUX(0, "mout_aclk_ccore_133", mout_topc_group2, MUX_SEL_TOPC2, 4, 2),
109 112
113 MUX(0, "mout_aclk_mscl_532", mout_topc_group2, MUX_SEL_TOPC3, 20, 2),
110 MUX(0, "mout_aclk_peris_66", mout_topc_group2, MUX_SEL_TOPC3, 24, 2), 114 MUX(0, "mout_aclk_peris_66", mout_topc_group2, MUX_SEL_TOPC3, 24, 2),
111}; 115};
112 116
@@ -114,6 +118,8 @@ static struct samsung_div_clock topc_div_clks[] __initdata = {
114 DIV(DOUT_ACLK_CCORE_133, "dout_aclk_ccore_133", "mout_aclk_ccore_133", 118 DIV(DOUT_ACLK_CCORE_133, "dout_aclk_ccore_133", "mout_aclk_ccore_133",
115 DIV_TOPC0, 4, 4), 119 DIV_TOPC0, 4, 4),
116 120
121 DIV(DOUT_ACLK_MSCL_532, "dout_aclk_mscl_532", "mout_aclk_mscl_532",
122 DIV_TOPC1, 20, 4),
117 DIV(DOUT_ACLK_PERIS, "dout_aclk_peris_66", "mout_aclk_peris_66", 123 DIV(DOUT_ACLK_PERIS, "dout_aclk_peris_66", "mout_aclk_peris_66",
118 DIV_TOPC1, 24, 4), 124 DIV_TOPC1, 24, 4),
119 125
@@ -125,6 +131,18 @@ static struct samsung_div_clock topc_div_clks[] __initdata = {
125 DIV_TOPC3, 12, 3), 131 DIV_TOPC3, 12, 3),
126 DIV(DOUT_SCLK_MFC_PLL, "dout_sclk_mfc_pll", "mout_mfc_pll_ctrl", 132 DIV(DOUT_SCLK_MFC_PLL, "dout_sclk_mfc_pll", "mout_mfc_pll_ctrl",
127 DIV_TOPC3, 16, 3), 133 DIV_TOPC3, 16, 3),
134 DIV(DOUT_SCLK_AUD_PLL, "dout_sclk_aud_pll", "mout_aud_pll_ctrl",
135 DIV_TOPC3, 28, 3),
136};
137
138static struct samsung_pll_rate_table pll1460x_24mhz_tbl[] __initdata = {
139 PLL_36XX_RATE(491520000, 20, 1, 0, 31457),
140 {},
141};
142
143static struct samsung_gate_clock topc_gate_clks[] __initdata = {
144 GATE(ACLK_MSCL_532, "aclk_mscl_532", "dout_aclk_mscl_532",
145 ENABLE_ACLK_TOPC1, 20, 0, 0),
128}; 146};
129 147
130static struct samsung_pll_clock topc_pll_clks[] __initdata = { 148static struct samsung_pll_clock topc_pll_clks[] __initdata = {
@@ -136,8 +154,8 @@ static struct samsung_pll_clock topc_pll_clks[] __initdata = {
136 BUS1_DPLL_CON0, NULL), 154 BUS1_DPLL_CON0, NULL),
137 PLL(pll_1452x, 0, "fout_mfc_pll", "fin_pll", MFC_PLL_LOCK, 155 PLL(pll_1452x, 0, "fout_mfc_pll", "fin_pll", MFC_PLL_LOCK,
138 MFC_PLL_CON0, NULL), 156 MFC_PLL_CON0, NULL),
139 PLL(pll_1460x, 0, "fout_aud_pll", "fin_pll", AUD_PLL_LOCK, 157 PLL(pll_1460x, FOUT_AUD_PLL, "fout_aud_pll", "fin_pll", AUD_PLL_LOCK,
140 AUD_PLL_CON0, NULL), 158 AUD_PLL_CON0, pll1460x_24mhz_tbl),
141}; 159};
142 160
143static struct samsung_cmu_info topc_cmu_info __initdata = { 161static struct samsung_cmu_info topc_cmu_info __initdata = {
@@ -147,6 +165,8 @@ static struct samsung_cmu_info topc_cmu_info __initdata = {
147 .nr_mux_clks = ARRAY_SIZE(topc_mux_clks), 165 .nr_mux_clks = ARRAY_SIZE(topc_mux_clks),
148 .div_clks = topc_div_clks, 166 .div_clks = topc_div_clks,
149 .nr_div_clks = ARRAY_SIZE(topc_div_clks), 167 .nr_div_clks = ARRAY_SIZE(topc_div_clks),
168 .gate_clks = topc_gate_clks,
169 .nr_gate_clks = ARRAY_SIZE(topc_gate_clks),
150 .fixed_factor_clks = topc_fixed_factor_clks, 170 .fixed_factor_clks = topc_fixed_factor_clks,
151 .nr_fixed_factor_clks = ARRAY_SIZE(topc_fixed_factor_clks), 171 .nr_fixed_factor_clks = ARRAY_SIZE(topc_fixed_factor_clks),
152 .nr_clk_ids = TOPC_NR_CLK, 172 .nr_clk_ids = TOPC_NR_CLK,
@@ -166,9 +186,18 @@ CLK_OF_DECLARE(exynos7_clk_topc, "samsung,exynos7-clock-topc",
166#define MUX_SEL_TOP00 0x0200 186#define MUX_SEL_TOP00 0x0200
167#define MUX_SEL_TOP01 0x0204 187#define MUX_SEL_TOP01 0x0204
168#define MUX_SEL_TOP03 0x020C 188#define MUX_SEL_TOP03 0x020C
189#define MUX_SEL_TOP0_PERIC0 0x0230
190#define MUX_SEL_TOP0_PERIC1 0x0234
191#define MUX_SEL_TOP0_PERIC2 0x0238
169#define MUX_SEL_TOP0_PERIC3 0x023C 192#define MUX_SEL_TOP0_PERIC3 0x023C
170#define DIV_TOP03 0x060C 193#define DIV_TOP03 0x060C
194#define DIV_TOP0_PERIC0 0x0630
195#define DIV_TOP0_PERIC1 0x0634
196#define DIV_TOP0_PERIC2 0x0638
171#define DIV_TOP0_PERIC3 0x063C 197#define DIV_TOP0_PERIC3 0x063C
198#define ENABLE_SCLK_TOP0_PERIC0 0x0A30
199#define ENABLE_SCLK_TOP0_PERIC1 0x0A34
200#define ENABLE_SCLK_TOP0_PERIC2 0x0A38
172#define ENABLE_SCLK_TOP0_PERIC3 0x0A3C 201#define ENABLE_SCLK_TOP0_PERIC3 0x0A3C
173 202
174/* List of parent clocks for Muxes in CMU_TOP0 */ 203/* List of parent clocks for Muxes in CMU_TOP0 */
@@ -176,6 +205,7 @@ PNAME(mout_bus0_pll_p) = { "fin_pll", "dout_sclk_bus0_pll" };
176PNAME(mout_bus1_pll_p) = { "fin_pll", "dout_sclk_bus1_pll" }; 205PNAME(mout_bus1_pll_p) = { "fin_pll", "dout_sclk_bus1_pll" };
177PNAME(mout_cc_pll_p) = { "fin_pll", "dout_sclk_cc_pll" }; 206PNAME(mout_cc_pll_p) = { "fin_pll", "dout_sclk_cc_pll" };
178PNAME(mout_mfc_pll_p) = { "fin_pll", "dout_sclk_mfc_pll" }; 207PNAME(mout_mfc_pll_p) = { "fin_pll", "dout_sclk_mfc_pll" };
208PNAME(mout_aud_pll_p) = { "fin_pll", "dout_sclk_aud_pll" };
179 209
180PNAME(mout_top0_half_bus0_pll_p) = {"mout_top0_bus0_pll", 210PNAME(mout_top0_half_bus0_pll_p) = {"mout_top0_bus0_pll",
181 "ffac_top0_bus0_pll_div2"}; 211 "ffac_top0_bus0_pll_div2"};
@@ -189,18 +219,34 @@ PNAME(mout_top0_half_mfc_pll_p) = {"mout_top0_mfc_pll",
189PNAME(mout_top0_group1) = {"mout_top0_half_bus0_pll", 219PNAME(mout_top0_group1) = {"mout_top0_half_bus0_pll",
190 "mout_top0_half_bus1_pll", "mout_top0_half_cc_pll", 220 "mout_top0_half_bus1_pll", "mout_top0_half_cc_pll",
191 "mout_top0_half_mfc_pll"}; 221 "mout_top0_half_mfc_pll"};
222PNAME(mout_top0_group3) = {"ioclk_audiocdclk0",
223 "ioclk_audiocdclk1", "ioclk_spdif_extclk",
224 "mout_top0_aud_pll", "mout_top0_half_bus0_pll",
225 "mout_top0_half_bus1_pll"};
226PNAME(mout_top0_group4) = {"ioclk_audiocdclk1", "mout_top0_aud_pll",
227 "mout_top0_half_bus0_pll", "mout_top0_half_bus1_pll"};
192 228
193static unsigned long top0_clk_regs[] __initdata = { 229static unsigned long top0_clk_regs[] __initdata = {
194 MUX_SEL_TOP00, 230 MUX_SEL_TOP00,
195 MUX_SEL_TOP01, 231 MUX_SEL_TOP01,
196 MUX_SEL_TOP03, 232 MUX_SEL_TOP03,
233 MUX_SEL_TOP0_PERIC0,
234 MUX_SEL_TOP0_PERIC1,
235 MUX_SEL_TOP0_PERIC2,
197 MUX_SEL_TOP0_PERIC3, 236 MUX_SEL_TOP0_PERIC3,
198 DIV_TOP03, 237 DIV_TOP03,
238 DIV_TOP0_PERIC0,
239 DIV_TOP0_PERIC1,
240 DIV_TOP0_PERIC2,
199 DIV_TOP0_PERIC3, 241 DIV_TOP0_PERIC3,
242 ENABLE_SCLK_TOP0_PERIC0,
243 ENABLE_SCLK_TOP0_PERIC1,
244 ENABLE_SCLK_TOP0_PERIC2,
200 ENABLE_SCLK_TOP0_PERIC3, 245 ENABLE_SCLK_TOP0_PERIC3,
201}; 246};
202 247
203static struct samsung_mux_clock top0_mux_clks[] __initdata = { 248static struct samsung_mux_clock top0_mux_clks[] __initdata = {
249 MUX(0, "mout_top0_aud_pll", mout_aud_pll_p, MUX_SEL_TOP00, 0, 1),
204 MUX(0, "mout_top0_mfc_pll", mout_mfc_pll_p, MUX_SEL_TOP00, 4, 1), 250 MUX(0, "mout_top0_mfc_pll", mout_mfc_pll_p, MUX_SEL_TOP00, 4, 1),
205 MUX(0, "mout_top0_cc_pll", mout_cc_pll_p, MUX_SEL_TOP00, 8, 1), 251 MUX(0, "mout_top0_cc_pll", mout_cc_pll_p, MUX_SEL_TOP00, 8, 1),
206 MUX(0, "mout_top0_bus1_pll", mout_bus1_pll_p, MUX_SEL_TOP00, 12, 1), 252 MUX(0, "mout_top0_bus1_pll", mout_bus1_pll_p, MUX_SEL_TOP00, 12, 1),
@@ -218,10 +264,20 @@ static struct samsung_mux_clock top0_mux_clks[] __initdata = {
218 MUX(0, "mout_aclk_peric1_66", mout_top0_group1, MUX_SEL_TOP03, 12, 2), 264 MUX(0, "mout_aclk_peric1_66", mout_top0_group1, MUX_SEL_TOP03, 12, 2),
219 MUX(0, "mout_aclk_peric0_66", mout_top0_group1, MUX_SEL_TOP03, 20, 2), 265 MUX(0, "mout_aclk_peric0_66", mout_top0_group1, MUX_SEL_TOP03, 20, 2),
220 266
267 MUX(0, "mout_sclk_spdif", mout_top0_group3, MUX_SEL_TOP0_PERIC0, 4, 3),
268 MUX(0, "mout_sclk_pcm1", mout_top0_group4, MUX_SEL_TOP0_PERIC0, 8, 2),
269 MUX(0, "mout_sclk_i2s1", mout_top0_group4, MUX_SEL_TOP0_PERIC0, 20, 2),
270
271 MUX(0, "mout_sclk_spi1", mout_top0_group1, MUX_SEL_TOP0_PERIC1, 8, 2),
272 MUX(0, "mout_sclk_spi0", mout_top0_group1, MUX_SEL_TOP0_PERIC1, 20, 2),
273
274 MUX(0, "mout_sclk_spi3", mout_top0_group1, MUX_SEL_TOP0_PERIC2, 8, 2),
275 MUX(0, "mout_sclk_spi2", mout_top0_group1, MUX_SEL_TOP0_PERIC2, 20, 2),
221 MUX(0, "mout_sclk_uart3", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 4, 2), 276 MUX(0, "mout_sclk_uart3", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 4, 2),
222 MUX(0, "mout_sclk_uart2", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 8, 2), 277 MUX(0, "mout_sclk_uart2", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 8, 2),
223 MUX(0, "mout_sclk_uart1", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 12, 2), 278 MUX(0, "mout_sclk_uart1", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 12, 2),
224 MUX(0, "mout_sclk_uart0", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 16, 2), 279 MUX(0, "mout_sclk_uart0", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 16, 2),
280 MUX(0, "mout_sclk_spi4", mout_top0_group1, MUX_SEL_TOP0_PERIC3, 20, 2),
225}; 281};
226 282
227static struct samsung_div_clock top0_div_clks[] __initdata = { 283static struct samsung_div_clock top0_div_clks[] __initdata = {
@@ -230,13 +286,40 @@ static struct samsung_div_clock top0_div_clks[] __initdata = {
230 DIV(DOUT_ACLK_PERIC0, "dout_aclk_peric0_66", "mout_aclk_peric0_66", 286 DIV(DOUT_ACLK_PERIC0, "dout_aclk_peric0_66", "mout_aclk_peric0_66",
231 DIV_TOP03, 20, 6), 287 DIV_TOP03, 20, 6),
232 288
289 DIV(0, "dout_sclk_spdif", "mout_sclk_spdif", DIV_TOP0_PERIC0, 4, 4),
290 DIV(0, "dout_sclk_pcm1", "mout_sclk_pcm1", DIV_TOP0_PERIC0, 8, 12),
291 DIV(0, "dout_sclk_i2s1", "mout_sclk_i2s1", DIV_TOP0_PERIC0, 20, 10),
292
293 DIV(0, "dout_sclk_spi1", "mout_sclk_spi1", DIV_TOP0_PERIC1, 8, 12),
294 DIV(0, "dout_sclk_spi0", "mout_sclk_spi0", DIV_TOP0_PERIC1, 20, 12),
295
296 DIV(0, "dout_sclk_spi3", "mout_sclk_spi3", DIV_TOP0_PERIC2, 8, 12),
297 DIV(0, "dout_sclk_spi2", "mout_sclk_spi2", DIV_TOP0_PERIC2, 20, 12),
298
233 DIV(0, "dout_sclk_uart3", "mout_sclk_uart3", DIV_TOP0_PERIC3, 4, 4), 299 DIV(0, "dout_sclk_uart3", "mout_sclk_uart3", DIV_TOP0_PERIC3, 4, 4),
234 DIV(0, "dout_sclk_uart2", "mout_sclk_uart2", DIV_TOP0_PERIC3, 8, 4), 300 DIV(0, "dout_sclk_uart2", "mout_sclk_uart2", DIV_TOP0_PERIC3, 8, 4),
235 DIV(0, "dout_sclk_uart1", "mout_sclk_uart1", DIV_TOP0_PERIC3, 12, 4), 301 DIV(0, "dout_sclk_uart1", "mout_sclk_uart1", DIV_TOP0_PERIC3, 12, 4),
236 DIV(0, "dout_sclk_uart0", "mout_sclk_uart0", DIV_TOP0_PERIC3, 16, 4), 302 DIV(0, "dout_sclk_uart0", "mout_sclk_uart0", DIV_TOP0_PERIC3, 16, 4),
303 DIV(0, "dout_sclk_spi4", "mout_sclk_spi4", DIV_TOP0_PERIC3, 20, 12),
237}; 304};
238 305
239static struct samsung_gate_clock top0_gate_clks[] __initdata = { 306static struct samsung_gate_clock top0_gate_clks[] __initdata = {
307 GATE(CLK_SCLK_SPDIF, "sclk_spdif", "dout_sclk_spdif",
308 ENABLE_SCLK_TOP0_PERIC0, 4, CLK_SET_RATE_PARENT, 0),
309 GATE(CLK_SCLK_PCM1, "sclk_pcm1", "dout_sclk_pcm1",
310 ENABLE_SCLK_TOP0_PERIC0, 8, CLK_SET_RATE_PARENT, 0),
311 GATE(CLK_SCLK_I2S1, "sclk_i2s1", "dout_sclk_i2s1",
312 ENABLE_SCLK_TOP0_PERIC0, 20, CLK_SET_RATE_PARENT, 0),
313
314 GATE(CLK_SCLK_SPI1, "sclk_spi1", "dout_sclk_spi1",
315 ENABLE_SCLK_TOP0_PERIC1, 8, CLK_SET_RATE_PARENT, 0),
316 GATE(CLK_SCLK_SPI0, "sclk_spi0", "dout_sclk_spi0",
317 ENABLE_SCLK_TOP0_PERIC1, 20, CLK_SET_RATE_PARENT, 0),
318
319 GATE(CLK_SCLK_SPI3, "sclk_spi3", "dout_sclk_spi3",
320 ENABLE_SCLK_TOP0_PERIC2, 8, CLK_SET_RATE_PARENT, 0),
321 GATE(CLK_SCLK_SPI2, "sclk_spi2", "dout_sclk_spi2",
322 ENABLE_SCLK_TOP0_PERIC2, 20, CLK_SET_RATE_PARENT, 0),
240 GATE(CLK_SCLK_UART3, "sclk_uart3", "dout_sclk_uart3", 323 GATE(CLK_SCLK_UART3, "sclk_uart3", "dout_sclk_uart3",
241 ENABLE_SCLK_TOP0_PERIC3, 4, 0, 0), 324 ENABLE_SCLK_TOP0_PERIC3, 4, 0, 0),
242 GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_sclk_uart2", 325 GATE(CLK_SCLK_UART2, "sclk_uart2", "dout_sclk_uart2",
@@ -245,6 +328,8 @@ static struct samsung_gate_clock top0_gate_clks[] __initdata = {
245 ENABLE_SCLK_TOP0_PERIC3, 12, 0, 0), 328 ENABLE_SCLK_TOP0_PERIC3, 12, 0, 0),
246 GATE(CLK_SCLK_UART0, "sclk_uart0", "dout_sclk_uart0", 329 GATE(CLK_SCLK_UART0, "sclk_uart0", "dout_sclk_uart0",
247 ENABLE_SCLK_TOP0_PERIC3, 16, 0, 0), 330 ENABLE_SCLK_TOP0_PERIC3, 16, 0, 0),
331 GATE(CLK_SCLK_SPI4, "sclk_spi4", "dout_sclk_spi4",
332 ENABLE_SCLK_TOP0_PERIC3, 20, CLK_SET_RATE_PARENT, 0),
248}; 333};
249 334
250static struct samsung_fixed_factor_clock top0_fixed_factor_clks[] __initdata = { 335static struct samsung_fixed_factor_clock top0_fixed_factor_clks[] __initdata = {
@@ -343,6 +428,8 @@ static struct samsung_mux_clock top1_mux_clks[] __initdata = {
343 MUX(0, "mout_aclk_fsys0_200", mout_top1_group1, MUX_SEL_TOP13, 28, 2), 428 MUX(0, "mout_aclk_fsys0_200", mout_top1_group1, MUX_SEL_TOP13, 28, 2),
344 429
345 MUX(0, "mout_sclk_mmc2", mout_top1_group1, MUX_SEL_TOP1_FSYS0, 24, 2), 430 MUX(0, "mout_sclk_mmc2", mout_top1_group1, MUX_SEL_TOP1_FSYS0, 24, 2),
431 MUX(0, "mout_sclk_usbdrd300", mout_top1_group1,
432 MUX_SEL_TOP1_FSYS0, 28, 2),
346 433
347 MUX(0, "mout_sclk_mmc1", mout_top1_group1, MUX_SEL_TOP1_FSYS1, 24, 2), 434 MUX(0, "mout_sclk_mmc1", mout_top1_group1, MUX_SEL_TOP1_FSYS1, 24, 2),
348 MUX(0, "mout_sclk_mmc0", mout_top1_group1, MUX_SEL_TOP1_FSYS1, 28, 2), 435 MUX(0, "mout_sclk_mmc0", mout_top1_group1, MUX_SEL_TOP1_FSYS1, 28, 2),
@@ -356,6 +443,8 @@ static struct samsung_div_clock top1_div_clks[] __initdata = {
356 443
357 DIV(DOUT_SCLK_MMC2, "dout_sclk_mmc2", "mout_sclk_mmc2", 444 DIV(DOUT_SCLK_MMC2, "dout_sclk_mmc2", "mout_sclk_mmc2",
358 DIV_TOP1_FSYS0, 24, 4), 445 DIV_TOP1_FSYS0, 24, 4),
446 DIV(0, "dout_sclk_usbdrd300", "mout_sclk_usbdrd300",
447 DIV_TOP1_FSYS0, 28, 4),
359 448
360 DIV(DOUT_SCLK_MMC1, "dout_sclk_mmc1", "mout_sclk_mmc1", 449 DIV(DOUT_SCLK_MMC1, "dout_sclk_mmc1", "mout_sclk_mmc1",
361 DIV_TOP1_FSYS1, 24, 4), 450 DIV_TOP1_FSYS1, 24, 4),
@@ -366,6 +455,8 @@ static struct samsung_div_clock top1_div_clks[] __initdata = {
366static struct samsung_gate_clock top1_gate_clks[] __initdata = { 455static struct samsung_gate_clock top1_gate_clks[] __initdata = {
367 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_sclk_mmc2", 456 GATE(CLK_SCLK_MMC2, "sclk_mmc2", "dout_sclk_mmc2",
368 ENABLE_SCLK_TOP1_FSYS0, 24, CLK_SET_RATE_PARENT, 0), 457 ENABLE_SCLK_TOP1_FSYS0, 24, CLK_SET_RATE_PARENT, 0),
458 GATE(0, "sclk_usbdrd300", "dout_sclk_usbdrd300",
459 ENABLE_SCLK_TOP1_FSYS0, 28, 0, 0),
369 460
370 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_sclk_mmc1", 461 GATE(CLK_SCLK_MMC1, "sclk_mmc1", "dout_sclk_mmc1",
371 ENABLE_SCLK_TOP1_FSYS1, 24, CLK_SET_RATE_PARENT, 0), 462 ENABLE_SCLK_TOP1_FSYS1, 24, CLK_SET_RATE_PARENT, 0),
@@ -514,6 +605,7 @@ static void __init exynos7_clk_peric0_init(struct device_node *np)
514/* Register Offset definitions for CMU_PERIC1 (0x14C80000) */ 605/* Register Offset definitions for CMU_PERIC1 (0x14C80000) */
515#define MUX_SEL_PERIC10 0x0200 606#define MUX_SEL_PERIC10 0x0200
516#define MUX_SEL_PERIC11 0x0204 607#define MUX_SEL_PERIC11 0x0204
608#define MUX_SEL_PERIC12 0x0208
517#define ENABLE_PCLK_PERIC1 0x0900 609#define ENABLE_PCLK_PERIC1 0x0900
518#define ENABLE_SCLK_PERIC10 0x0A00 610#define ENABLE_SCLK_PERIC10 0x0A00
519 611
@@ -525,10 +617,16 @@ PNAME(mout_aclk_peric1_66_p) = { "fin_pll", "dout_aclk_peric1_66" };
525PNAME(mout_sclk_uart1_p) = { "fin_pll", "sclk_uart1" }; 617PNAME(mout_sclk_uart1_p) = { "fin_pll", "sclk_uart1" };
526PNAME(mout_sclk_uart2_p) = { "fin_pll", "sclk_uart2" }; 618PNAME(mout_sclk_uart2_p) = { "fin_pll", "sclk_uart2" };
527PNAME(mout_sclk_uart3_p) = { "fin_pll", "sclk_uart3" }; 619PNAME(mout_sclk_uart3_p) = { "fin_pll", "sclk_uart3" };
620PNAME(mout_sclk_spi0_p) = { "fin_pll", "sclk_spi0" };
621PNAME(mout_sclk_spi1_p) = { "fin_pll", "sclk_spi1" };
622PNAME(mout_sclk_spi2_p) = { "fin_pll", "sclk_spi2" };
623PNAME(mout_sclk_spi3_p) = { "fin_pll", "sclk_spi3" };
624PNAME(mout_sclk_spi4_p) = { "fin_pll", "sclk_spi4" };
528 625
529static unsigned long peric1_clk_regs[] __initdata = { 626static unsigned long peric1_clk_regs[] __initdata = {
530 MUX_SEL_PERIC10, 627 MUX_SEL_PERIC10,
531 MUX_SEL_PERIC11, 628 MUX_SEL_PERIC11,
629 MUX_SEL_PERIC12,
532 ENABLE_PCLK_PERIC1, 630 ENABLE_PCLK_PERIC1,
533 ENABLE_SCLK_PERIC10, 631 ENABLE_SCLK_PERIC10,
534}; 632};
@@ -537,6 +635,16 @@ static struct samsung_mux_clock peric1_mux_clks[] __initdata = {
537 MUX(0, "mout_aclk_peric1_66_user", mout_aclk_peric1_66_p, 635 MUX(0, "mout_aclk_peric1_66_user", mout_aclk_peric1_66_p,
538 MUX_SEL_PERIC10, 0, 1), 636 MUX_SEL_PERIC10, 0, 1),
539 637
638 MUX_F(0, "mout_sclk_spi0_user", mout_sclk_spi0_p,
639 MUX_SEL_PERIC11, 0, 1, CLK_SET_RATE_PARENT, 0),
640 MUX_F(0, "mout_sclk_spi1_user", mout_sclk_spi1_p,
641 MUX_SEL_PERIC11, 4, 1, CLK_SET_RATE_PARENT, 0),
642 MUX_F(0, "mout_sclk_spi2_user", mout_sclk_spi2_p,
643 MUX_SEL_PERIC11, 8, 1, CLK_SET_RATE_PARENT, 0),
644 MUX_F(0, "mout_sclk_spi3_user", mout_sclk_spi3_p,
645 MUX_SEL_PERIC11, 12, 1, CLK_SET_RATE_PARENT, 0),
646 MUX_F(0, "mout_sclk_spi4_user", mout_sclk_spi4_p,
647 MUX_SEL_PERIC11, 16, 1, CLK_SET_RATE_PARENT, 0),
540 MUX(0, "mout_sclk_uart1_user", mout_sclk_uart1_p, 648 MUX(0, "mout_sclk_uart1_user", mout_sclk_uart1_p,
541 MUX_SEL_PERIC11, 20, 1), 649 MUX_SEL_PERIC11, 20, 1),
542 MUX(0, "mout_sclk_uart2_user", mout_sclk_uart2_p, 650 MUX(0, "mout_sclk_uart2_user", mout_sclk_uart2_p,
@@ -562,6 +670,22 @@ static struct samsung_gate_clock peric1_gate_clks[] __initdata = {
562 ENABLE_PCLK_PERIC1, 10, 0, 0), 670 ENABLE_PCLK_PERIC1, 10, 0, 0),
563 GATE(PCLK_UART3, "pclk_uart3", "mout_aclk_peric1_66_user", 671 GATE(PCLK_UART3, "pclk_uart3", "mout_aclk_peric1_66_user",
564 ENABLE_PCLK_PERIC1, 11, 0, 0), 672 ENABLE_PCLK_PERIC1, 11, 0, 0),
673 GATE(PCLK_SPI0, "pclk_spi0", "mout_aclk_peric1_66_user",
674 ENABLE_PCLK_PERIC1, 12, 0, 0),
675 GATE(PCLK_SPI1, "pclk_spi1", "mout_aclk_peric1_66_user",
676 ENABLE_PCLK_PERIC1, 13, 0, 0),
677 GATE(PCLK_SPI2, "pclk_spi2", "mout_aclk_peric1_66_user",
678 ENABLE_PCLK_PERIC1, 14, 0, 0),
679 GATE(PCLK_SPI3, "pclk_spi3", "mout_aclk_peric1_66_user",
680 ENABLE_PCLK_PERIC1, 15, 0, 0),
681 GATE(PCLK_SPI4, "pclk_spi4", "mout_aclk_peric1_66_user",
682 ENABLE_PCLK_PERIC1, 16, 0, 0),
683 GATE(PCLK_I2S1, "pclk_i2s1", "mout_aclk_peric1_66_user",
684 ENABLE_PCLK_PERIC1, 17, CLK_SET_RATE_PARENT, 0),
685 GATE(PCLK_PCM1, "pclk_pcm1", "mout_aclk_peric1_66_user",
686 ENABLE_PCLK_PERIC1, 18, 0, 0),
687 GATE(PCLK_SPDIF, "pclk_spdif", "mout_aclk_peric1_66_user",
688 ENABLE_PCLK_PERIC1, 19, 0, 0),
565 689
566 GATE(SCLK_UART1, "sclk_uart1_user", "mout_sclk_uart1_user", 690 GATE(SCLK_UART1, "sclk_uart1_user", "mout_sclk_uart1_user",
567 ENABLE_SCLK_PERIC10, 9, 0, 0), 691 ENABLE_SCLK_PERIC10, 9, 0, 0),
@@ -569,6 +693,22 @@ static struct samsung_gate_clock peric1_gate_clks[] __initdata = {
569 ENABLE_SCLK_PERIC10, 10, 0, 0), 693 ENABLE_SCLK_PERIC10, 10, 0, 0),
570 GATE(SCLK_UART3, "sclk_uart3_user", "mout_sclk_uart3_user", 694 GATE(SCLK_UART3, "sclk_uart3_user", "mout_sclk_uart3_user",
571 ENABLE_SCLK_PERIC10, 11, 0, 0), 695 ENABLE_SCLK_PERIC10, 11, 0, 0),
696 GATE(SCLK_SPI0, "sclk_spi0_user", "mout_sclk_spi0_user",
697 ENABLE_SCLK_PERIC10, 12, CLK_SET_RATE_PARENT, 0),
698 GATE(SCLK_SPI1, "sclk_spi1_user", "mout_sclk_spi1_user",
699 ENABLE_SCLK_PERIC10, 13, CLK_SET_RATE_PARENT, 0),
700 GATE(SCLK_SPI2, "sclk_spi2_user", "mout_sclk_spi2_user",
701 ENABLE_SCLK_PERIC10, 14, CLK_SET_RATE_PARENT, 0),
702 GATE(SCLK_SPI3, "sclk_spi3_user", "mout_sclk_spi3_user",
703 ENABLE_SCLK_PERIC10, 15, CLK_SET_RATE_PARENT, 0),
704 GATE(SCLK_SPI4, "sclk_spi4_user", "mout_sclk_spi4_user",
705 ENABLE_SCLK_PERIC10, 16, CLK_SET_RATE_PARENT, 0),
706 GATE(SCLK_I2S1, "sclk_i2s1_user", "sclk_i2s1",
707 ENABLE_SCLK_PERIC10, 17, CLK_SET_RATE_PARENT, 0),
708 GATE(SCLK_PCM1, "sclk_pcm1_user", "sclk_pcm1",
709 ENABLE_SCLK_PERIC10, 18, CLK_SET_RATE_PARENT, 0),
710 GATE(SCLK_SPDIF, "sclk_spdif_user", "sclk_spdif",
711 ENABLE_SCLK_PERIC10, 19, CLK_SET_RATE_PARENT, 0),
572}; 712};
573 713
574static struct samsung_cmu_info peric1_cmu_info __initdata = { 714static struct samsung_cmu_info peric1_cmu_info __initdata = {
@@ -647,7 +787,12 @@ CLK_OF_DECLARE(exynos7_clk_peris, "samsung,exynos7-clock-peris",
647/* Register Offset definitions for CMU_FSYS0 (0x10E90000) */ 787/* Register Offset definitions for CMU_FSYS0 (0x10E90000) */
648#define MUX_SEL_FSYS00 0x0200 788#define MUX_SEL_FSYS00 0x0200
649#define MUX_SEL_FSYS01 0x0204 789#define MUX_SEL_FSYS01 0x0204
790#define MUX_SEL_FSYS02 0x0208
791#define ENABLE_ACLK_FSYS00 0x0800
650#define ENABLE_ACLK_FSYS01 0x0804 792#define ENABLE_ACLK_FSYS01 0x0804
793#define ENABLE_SCLK_FSYS01 0x0A04
794#define ENABLE_SCLK_FSYS02 0x0A08
795#define ENABLE_SCLK_FSYS04 0x0A10
651 796
652/* 797/*
653 * List of parent clocks for Muxes in CMU_FSYS0 798 * List of parent clocks for Muxes in CMU_FSYS0
@@ -655,10 +800,29 @@ CLK_OF_DECLARE(exynos7_clk_peris, "samsung,exynos7-clock-peris",
655PNAME(mout_aclk_fsys0_200_p) = { "fin_pll", "dout_aclk_fsys0_200" }; 800PNAME(mout_aclk_fsys0_200_p) = { "fin_pll", "dout_aclk_fsys0_200" };
656PNAME(mout_sclk_mmc2_p) = { "fin_pll", "sclk_mmc2" }; 801PNAME(mout_sclk_mmc2_p) = { "fin_pll", "sclk_mmc2" };
657 802
803PNAME(mout_sclk_usbdrd300_p) = { "fin_pll", "sclk_usbdrd300" };
804PNAME(mout_phyclk_usbdrd300_udrd30_phyclk_p) = { "fin_pll",
805 "phyclk_usbdrd300_udrd30_phyclock" };
806PNAME(mout_phyclk_usbdrd300_udrd30_pipe_pclk_p) = { "fin_pll",
807 "phyclk_usbdrd300_udrd30_pipe_pclk" };
808
809/* fixed rate clocks used in the FSYS0 block */
810struct samsung_fixed_rate_clock fixed_rate_clks_fsys0[] __initdata = {
811 FRATE(0, "phyclk_usbdrd300_udrd30_phyclock", NULL,
812 CLK_IS_ROOT, 60000000),
813 FRATE(0, "phyclk_usbdrd300_udrd30_pipe_pclk", NULL,
814 CLK_IS_ROOT, 125000000),
815};
816
658static unsigned long fsys0_clk_regs[] __initdata = { 817static unsigned long fsys0_clk_regs[] __initdata = {
659 MUX_SEL_FSYS00, 818 MUX_SEL_FSYS00,
660 MUX_SEL_FSYS01, 819 MUX_SEL_FSYS01,
820 MUX_SEL_FSYS02,
821 ENABLE_ACLK_FSYS00,
661 ENABLE_ACLK_FSYS01, 822 ENABLE_ACLK_FSYS01,
823 ENABLE_SCLK_FSYS01,
824 ENABLE_SCLK_FSYS02,
825 ENABLE_SCLK_FSYS04,
662}; 826};
663 827
664static struct samsung_mux_clock fsys0_mux_clks[] __initdata = { 828static struct samsung_mux_clock fsys0_mux_clks[] __initdata = {
@@ -666,11 +830,49 @@ static struct samsung_mux_clock fsys0_mux_clks[] __initdata = {
666 MUX_SEL_FSYS00, 24, 1), 830 MUX_SEL_FSYS00, 24, 1),
667 831
668 MUX(0, "mout_sclk_mmc2_user", mout_sclk_mmc2_p, MUX_SEL_FSYS01, 24, 1), 832 MUX(0, "mout_sclk_mmc2_user", mout_sclk_mmc2_p, MUX_SEL_FSYS01, 24, 1),
833 MUX(0, "mout_sclk_usbdrd300_user", mout_sclk_usbdrd300_p,
834 MUX_SEL_FSYS01, 28, 1),
835
836 MUX(0, "mout_phyclk_usbdrd300_udrd30_pipe_pclk_user",
837 mout_phyclk_usbdrd300_udrd30_pipe_pclk_p,
838 MUX_SEL_FSYS02, 24, 1),
839 MUX(0, "mout_phyclk_usbdrd300_udrd30_phyclk_user",
840 mout_phyclk_usbdrd300_udrd30_phyclk_p,
841 MUX_SEL_FSYS02, 28, 1),
669}; 842};
670 843
671static struct samsung_gate_clock fsys0_gate_clks[] __initdata = { 844static struct samsung_gate_clock fsys0_gate_clks[] __initdata = {
845 GATE(ACLK_AXIUS_USBDRD30X_FSYS0X, "aclk_axius_usbdrd30x_fsys0x",
846 "mout_aclk_fsys0_200_user",
847 ENABLE_ACLK_FSYS00, 19, 0, 0),
848 GATE(ACLK_PDMA1, "aclk_pdma1", "mout_aclk_fsys0_200_user",
849 ENABLE_ACLK_FSYS00, 3, 0, 0),
850 GATE(ACLK_PDMA0, "aclk_pdma0", "mout_aclk_fsys0_200_user",
851 ENABLE_ACLK_FSYS00, 4, 0, 0),
852
853 GATE(ACLK_USBDRD300, "aclk_usbdrd300", "mout_aclk_fsys0_200_user",
854 ENABLE_ACLK_FSYS01, 29, 0, 0),
672 GATE(ACLK_MMC2, "aclk_mmc2", "mout_aclk_fsys0_200_user", 855 GATE(ACLK_MMC2, "aclk_mmc2", "mout_aclk_fsys0_200_user",
673 ENABLE_ACLK_FSYS01, 31, 0, 0), 856 ENABLE_ACLK_FSYS01, 31, 0, 0),
857
858 GATE(SCLK_USBDRD300_SUSPENDCLK, "sclk_usbdrd300_suspendclk",
859 "mout_sclk_usbdrd300_user",
860 ENABLE_SCLK_FSYS01, 4, 0, 0),
861 GATE(SCLK_USBDRD300_REFCLK, "sclk_usbdrd300_refclk", "fin_pll",
862 ENABLE_SCLK_FSYS01, 8, 0, 0),
863
864 GATE(PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER,
865 "phyclk_usbdrd300_udrd30_pipe_pclk_user",
866 "mout_phyclk_usbdrd300_udrd30_pipe_pclk_user",
867 ENABLE_SCLK_FSYS02, 24, 0, 0),
868 GATE(PHYCLK_USBDRD300_UDRD30_PHYCLK_USER,
869 "phyclk_usbdrd300_udrd30_phyclk_user",
870 "mout_phyclk_usbdrd300_udrd30_phyclk_user",
871 ENABLE_SCLK_FSYS02, 28, 0, 0),
872
873 GATE(OSCCLK_PHY_CLKOUT_USB30_PHY, "oscclk_phy_clkout_usb30_phy",
874 "fin_pll",
875 ENABLE_SCLK_FSYS04, 28, 0, 0),
674}; 876};
675 877
676static struct samsung_cmu_info fsys0_cmu_info __initdata = { 878static struct samsung_cmu_info fsys0_cmu_info __initdata = {
@@ -741,3 +943,205 @@ static void __init exynos7_clk_fsys1_init(struct device_node *np)
741 943
742CLK_OF_DECLARE(exynos7_clk_fsys1, "samsung,exynos7-clock-fsys1", 944CLK_OF_DECLARE(exynos7_clk_fsys1, "samsung,exynos7-clock-fsys1",
743 exynos7_clk_fsys1_init); 945 exynos7_clk_fsys1_init);
946
947#define MUX_SEL_MSCL 0x0200
948#define DIV_MSCL 0x0600
949#define ENABLE_ACLK_MSCL 0x0800
950#define ENABLE_PCLK_MSCL 0x0900
951
952/* List of parent clocks for Muxes in CMU_MSCL */
953PNAME(mout_aclk_mscl_532_user_p) = { "fin_pll", "aclk_mscl_532" };
954
955static unsigned long mscl_clk_regs[] __initdata = {
956 MUX_SEL_MSCL,
957 DIV_MSCL,
958 ENABLE_ACLK_MSCL,
959 ENABLE_PCLK_MSCL,
960};
961
962static struct samsung_mux_clock mscl_mux_clks[] __initdata = {
963 MUX(USERMUX_ACLK_MSCL_532, "usermux_aclk_mscl_532",
964 mout_aclk_mscl_532_user_p, MUX_SEL_MSCL, 0, 1),
965};
966static struct samsung_div_clock mscl_div_clks[] __initdata = {
967 DIV(DOUT_PCLK_MSCL, "dout_pclk_mscl", "usermux_aclk_mscl_532",
968 DIV_MSCL, 0, 3),
969};
970static struct samsung_gate_clock mscl_gate_clks[] __initdata = {
971
972 GATE(ACLK_MSCL_0, "aclk_mscl_0", "usermux_aclk_mscl_532",
973 ENABLE_ACLK_MSCL, 31, 0, 0),
974 GATE(ACLK_MSCL_1, "aclk_mscl_1", "usermux_aclk_mscl_532",
975 ENABLE_ACLK_MSCL, 30, 0, 0),
976 GATE(ACLK_JPEG, "aclk_jpeg", "usermux_aclk_mscl_532",
977 ENABLE_ACLK_MSCL, 29, 0, 0),
978 GATE(ACLK_G2D, "aclk_g2d", "usermux_aclk_mscl_532",
979 ENABLE_ACLK_MSCL, 28, 0, 0),
980 GATE(ACLK_LH_ASYNC_SI_MSCL_0, "aclk_lh_async_si_mscl_0",
981 "usermux_aclk_mscl_532",
982 ENABLE_ACLK_MSCL, 27, 0, 0),
983 GATE(ACLK_LH_ASYNC_SI_MSCL_1, "aclk_lh_async_si_mscl_1",
984 "usermux_aclk_mscl_532",
985 ENABLE_ACLK_MSCL, 26, 0, 0),
986 GATE(ACLK_XIU_MSCLX_0, "aclk_xiu_msclx_0", "usermux_aclk_mscl_532",
987 ENABLE_ACLK_MSCL, 25, 0, 0),
988 GATE(ACLK_XIU_MSCLX_1, "aclk_xiu_msclx_1", "usermux_aclk_mscl_532",
989 ENABLE_ACLK_MSCL, 24, 0, 0),
990 GATE(ACLK_AXI2ACEL_BRIDGE, "aclk_axi2acel_bridge",
991 "usermux_aclk_mscl_532",
992 ENABLE_ACLK_MSCL, 23, 0, 0),
993 GATE(ACLK_QE_MSCL_0, "aclk_qe_mscl_0", "usermux_aclk_mscl_532",
994 ENABLE_ACLK_MSCL, 22, 0, 0),
995 GATE(ACLK_QE_MSCL_1, "aclk_qe_mscl_1", "usermux_aclk_mscl_532",
996 ENABLE_ACLK_MSCL, 21, 0, 0),
997 GATE(ACLK_QE_JPEG, "aclk_qe_jpeg", "usermux_aclk_mscl_532",
998 ENABLE_ACLK_MSCL, 20, 0, 0),
999 GATE(ACLK_QE_G2D, "aclk_qe_g2d", "usermux_aclk_mscl_532",
1000 ENABLE_ACLK_MSCL, 19, 0, 0),
1001 GATE(ACLK_PPMU_MSCL_0, "aclk_ppmu_mscl_0", "usermux_aclk_mscl_532",
1002 ENABLE_ACLK_MSCL, 18, 0, 0),
1003 GATE(ACLK_PPMU_MSCL_1, "aclk_ppmu_mscl_1", "usermux_aclk_mscl_532",
1004 ENABLE_ACLK_MSCL, 17, 0, 0),
1005 GATE(ACLK_MSCLNP_133, "aclk_msclnp_133", "usermux_aclk_mscl_532",
1006 ENABLE_ACLK_MSCL, 16, 0, 0),
1007 GATE(ACLK_AHB2APB_MSCL0P, "aclk_ahb2apb_mscl0p",
1008 "usermux_aclk_mscl_532",
1009 ENABLE_ACLK_MSCL, 15, 0, 0),
1010 GATE(ACLK_AHB2APB_MSCL1P, "aclk_ahb2apb_mscl1p",
1011 "usermux_aclk_mscl_532",
1012 ENABLE_ACLK_MSCL, 14, 0, 0),
1013
1014 GATE(PCLK_MSCL_0, "pclk_mscl_0", "dout_pclk_mscl",
1015 ENABLE_PCLK_MSCL, 31, 0, 0),
1016 GATE(PCLK_MSCL_1, "pclk_mscl_1", "dout_pclk_mscl",
1017 ENABLE_PCLK_MSCL, 30, 0, 0),
1018 GATE(PCLK_JPEG, "pclk_jpeg", "dout_pclk_mscl",
1019 ENABLE_PCLK_MSCL, 29, 0, 0),
1020 GATE(PCLK_G2D, "pclk_g2d", "dout_pclk_mscl",
1021 ENABLE_PCLK_MSCL, 28, 0, 0),
1022 GATE(PCLK_QE_MSCL_0, "pclk_qe_mscl_0", "dout_pclk_mscl",
1023 ENABLE_PCLK_MSCL, 27, 0, 0),
1024 GATE(PCLK_QE_MSCL_1, "pclk_qe_mscl_1", "dout_pclk_mscl",
1025 ENABLE_PCLK_MSCL, 26, 0, 0),
1026 GATE(PCLK_QE_JPEG, "pclk_qe_jpeg", "dout_pclk_mscl",
1027 ENABLE_PCLK_MSCL, 25, 0, 0),
1028 GATE(PCLK_QE_G2D, "pclk_qe_g2d", "dout_pclk_mscl",
1029 ENABLE_PCLK_MSCL, 24, 0, 0),
1030 GATE(PCLK_PPMU_MSCL_0, "pclk_ppmu_mscl_0", "dout_pclk_mscl",
1031 ENABLE_PCLK_MSCL, 23, 0, 0),
1032 GATE(PCLK_PPMU_MSCL_1, "pclk_ppmu_mscl_1", "dout_pclk_mscl",
1033 ENABLE_PCLK_MSCL, 22, 0, 0),
1034 GATE(PCLK_AXI2ACEL_BRIDGE, "pclk_axi2acel_bridge", "dout_pclk_mscl",
1035 ENABLE_PCLK_MSCL, 21, 0, 0),
1036 GATE(PCLK_PMU_MSCL, "pclk_pmu_mscl", "dout_pclk_mscl",
1037 ENABLE_PCLK_MSCL, 20, 0, 0),
1038};
1039
1040static struct samsung_cmu_info mscl_cmu_info __initdata = {
1041 .mux_clks = mscl_mux_clks,
1042 .nr_mux_clks = ARRAY_SIZE(mscl_mux_clks),
1043 .div_clks = mscl_div_clks,
1044 .nr_div_clks = ARRAY_SIZE(mscl_div_clks),
1045 .gate_clks = mscl_gate_clks,
1046 .nr_gate_clks = ARRAY_SIZE(mscl_gate_clks),
1047 .nr_clk_ids = MSCL_NR_CLK,
1048 .clk_regs = mscl_clk_regs,
1049 .nr_clk_regs = ARRAY_SIZE(mscl_clk_regs),
1050};
1051
1052static void __init exynos7_clk_mscl_init(struct device_node *np)
1053{
1054 samsung_cmu_register_one(np, &mscl_cmu_info);
1055}
1056
1057CLK_OF_DECLARE(exynos7_clk_mscl, "samsung,exynos7-clock-mscl",
1058 exynos7_clk_mscl_init);
1059
1060/* Register Offset definitions for CMU_AUD (0x114C0000) */
1061#define MUX_SEL_AUD 0x0200
1062#define DIV_AUD0 0x0600
1063#define DIV_AUD1 0x0604
1064#define ENABLE_ACLK_AUD 0x0800
1065#define ENABLE_PCLK_AUD 0x0900
1066#define ENABLE_SCLK_AUD 0x0A00
1067
1068/*
1069 * List of parent clocks for Muxes in CMU_AUD
1070 */
1071PNAME(mout_aud_pll_user_p) = { "fin_pll", "fout_aud_pll" };
1072PNAME(mout_aud_group_p) = { "dout_aud_cdclk", "ioclk_audiocdclk0" };
1073
1074static unsigned long aud_clk_regs[] __initdata = {
1075 MUX_SEL_AUD,
1076 DIV_AUD0,
1077 DIV_AUD1,
1078 ENABLE_ACLK_AUD,
1079 ENABLE_PCLK_AUD,
1080 ENABLE_SCLK_AUD,
1081};
1082
1083static struct samsung_mux_clock aud_mux_clks[] __initdata = {
1084 MUX(0, "mout_sclk_i2s", mout_aud_group_p, MUX_SEL_AUD, 12, 1),
1085 MUX(0, "mout_sclk_pcm", mout_aud_group_p, MUX_SEL_AUD, 16, 1),
1086 MUX(0, "mout_aud_pll_user", mout_aud_pll_user_p, MUX_SEL_AUD, 20, 1),
1087};
1088
1089static struct samsung_div_clock aud_div_clks[] __initdata = {
1090 DIV(0, "dout_aud_ca5", "mout_aud_pll_user", DIV_AUD0, 0, 4),
1091 DIV(0, "dout_aclk_aud", "dout_aud_ca5", DIV_AUD0, 4, 4),
1092 DIV(0, "dout_aud_pclk_dbg", "dout_aud_ca5", DIV_AUD0, 8, 4),
1093
1094 DIV(0, "dout_sclk_i2s", "mout_sclk_i2s", DIV_AUD1, 0, 4),
1095 DIV(0, "dout_sclk_pcm", "mout_sclk_pcm", DIV_AUD1, 4, 8),
1096 DIV(0, "dout_sclk_uart", "dout_aud_cdclk", DIV_AUD1, 12, 4),
1097 DIV(0, "dout_sclk_slimbus", "dout_aud_cdclk", DIV_AUD1, 16, 5),
1098 DIV(0, "dout_aud_cdclk", "mout_aud_pll_user", DIV_AUD1, 24, 4),
1099};
1100
1101static struct samsung_gate_clock aud_gate_clks[] __initdata = {
1102 GATE(SCLK_PCM, "sclk_pcm", "dout_sclk_pcm",
1103 ENABLE_SCLK_AUD, 27, CLK_SET_RATE_PARENT, 0),
1104 GATE(SCLK_I2S, "sclk_i2s", "dout_sclk_i2s",
1105 ENABLE_SCLK_AUD, 28, CLK_SET_RATE_PARENT, 0),
1106 GATE(0, "sclk_uart", "dout_sclk_uart", ENABLE_SCLK_AUD, 29, 0, 0),
1107 GATE(0, "sclk_slimbus", "dout_sclk_slimbus",
1108 ENABLE_SCLK_AUD, 30, 0, 0),
1109
1110 GATE(0, "pclk_dbg_aud", "dout_aud_pclk_dbg", ENABLE_PCLK_AUD, 19, 0, 0),
1111 GATE(0, "pclk_gpio_aud", "dout_aclk_aud", ENABLE_PCLK_AUD, 20, 0, 0),
1112 GATE(0, "pclk_wdt1", "dout_aclk_aud", ENABLE_PCLK_AUD, 22, 0, 0),
1113 GATE(0, "pclk_wdt0", "dout_aclk_aud", ENABLE_PCLK_AUD, 23, 0, 0),
1114 GATE(0, "pclk_slimbus", "dout_aclk_aud", ENABLE_PCLK_AUD, 24, 0, 0),
1115 GATE(0, "pclk_uart", "dout_aclk_aud", ENABLE_PCLK_AUD, 25, 0, 0),
1116 GATE(PCLK_PCM, "pclk_pcm", "dout_aclk_aud",
1117 ENABLE_PCLK_AUD, 26, CLK_SET_RATE_PARENT, 0),
1118 GATE(PCLK_I2S, "pclk_i2s", "dout_aclk_aud",
1119 ENABLE_PCLK_AUD, 27, CLK_SET_RATE_PARENT, 0),
1120 GATE(0, "pclk_timer", "dout_aclk_aud", ENABLE_PCLK_AUD, 28, 0, 0),
1121 GATE(0, "pclk_smmu_aud", "dout_aclk_aud", ENABLE_PCLK_AUD, 31, 0, 0),
1122
1123 GATE(0, "aclk_smmu_aud", "dout_aclk_aud", ENABLE_ACLK_AUD, 27, 0, 0),
1124 GATE(0, "aclk_acel_lh_async_si_top", "dout_aclk_aud",
1125 ENABLE_ACLK_AUD, 28, 0, 0),
1126 GATE(ACLK_ADMA, "aclk_dmac", "dout_aclk_aud", ENABLE_ACLK_AUD, 31, 0, 0),
1127};
1128
1129static struct samsung_cmu_info aud_cmu_info __initdata = {
1130 .mux_clks = aud_mux_clks,
1131 .nr_mux_clks = ARRAY_SIZE(aud_mux_clks),
1132 .div_clks = aud_div_clks,
1133 .nr_div_clks = ARRAY_SIZE(aud_div_clks),
1134 .gate_clks = aud_gate_clks,
1135 .nr_gate_clks = ARRAY_SIZE(aud_gate_clks),
1136 .nr_clk_ids = AUD_NR_CLK,
1137 .clk_regs = aud_clk_regs,
1138 .nr_clk_regs = ARRAY_SIZE(aud_clk_regs),
1139};
1140
1141static void __init exynos7_clk_aud_init(struct device_node *np)
1142{
1143 samsung_cmu_register_one(np, &aud_cmu_info);
1144}
1145
1146CLK_OF_DECLARE(exynos7_clk_aud, "samsung,exynos7-clock-aud",
1147 exynos7_clk_aud_init);
diff --git a/drivers/clk/samsung/clk.c b/drivers/clk/samsung/clk.c
index 4bda54095a16..9e1f88c04fd4 100644
--- a/drivers/clk/samsung/clk.c
+++ b/drivers/clk/samsung/clk.c
@@ -374,19 +374,24 @@ static void samsung_clk_sleep_init(void __iomem *reg_base,
374 * Common function which registers plls, muxes, dividers and gates 374 * Common function which registers plls, muxes, dividers and gates
375 * for each CMU. It also add CMU register list to register cache. 375 * for each CMU. It also add CMU register list to register cache.
376 */ 376 */
377void __init samsung_cmu_register_one(struct device_node *np, 377struct samsung_clk_provider * __init samsung_cmu_register_one(
378 struct device_node *np,
378 struct samsung_cmu_info *cmu) 379 struct samsung_cmu_info *cmu)
379{ 380{
380 void __iomem *reg_base; 381 void __iomem *reg_base;
381 struct samsung_clk_provider *ctx; 382 struct samsung_clk_provider *ctx;
382 383
383 reg_base = of_iomap(np, 0); 384 reg_base = of_iomap(np, 0);
384 if (!reg_base) 385 if (!reg_base) {
385 panic("%s: failed to map registers\n", __func__); 386 panic("%s: failed to map registers\n", __func__);
387 return NULL;
388 }
386 389
387 ctx = samsung_clk_init(np, reg_base, cmu->nr_clk_ids); 390 ctx = samsung_clk_init(np, reg_base, cmu->nr_clk_ids);
388 if (!ctx) 391 if (!ctx) {
389 panic("%s: unable to alllocate ctx\n", __func__); 392 panic("%s: unable to alllocate ctx\n", __func__);
393 return ctx;
394 }
390 395
391 if (cmu->pll_clks) 396 if (cmu->pll_clks)
392 samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks, 397 samsung_clk_register_pll(ctx, cmu->pll_clks, cmu->nr_pll_clks,
@@ -410,4 +415,6 @@ void __init samsung_cmu_register_one(struct device_node *np,
410 cmu->nr_clk_regs); 415 cmu->nr_clk_regs);
411 416
412 samsung_clk_of_add_provider(np, ctx); 417 samsung_clk_of_add_provider(np, ctx);
418
419 return ctx;
413} 420}
diff --git a/drivers/clk/samsung/clk.h b/drivers/clk/samsung/clk.h
index 8acabe1f32c4..e4c75383cea7 100644
--- a/drivers/clk/samsung/clk.h
+++ b/drivers/clk/samsung/clk.h
@@ -392,7 +392,8 @@ extern void __init samsung_clk_register_pll(struct samsung_clk_provider *ctx,
392 struct samsung_pll_clock *pll_list, 392 struct samsung_pll_clock *pll_list,
393 unsigned int nr_clk, void __iomem *base); 393 unsigned int nr_clk, void __iomem *base);
394 394
395extern void __init samsung_cmu_register_one(struct device_node *, 395extern struct samsung_clk_provider __init *samsung_cmu_register_one(
396 struct device_node *,
396 struct samsung_cmu_info *); 397 struct samsung_cmu_info *);
397 398
398extern unsigned long _get_rate(const char *clk_name); 399extern unsigned long _get_rate(const char *clk_name);
diff --git a/drivers/clk/shmobile/Makefile b/drivers/clk/shmobile/Makefile
index f83980f2b956..0689d7fb2666 100644
--- a/drivers/clk/shmobile/Makefile
+++ b/drivers/clk/shmobile/Makefile
@@ -1,9 +1,11 @@
1obj-$(CONFIG_ARCH_EMEV2) += clk-emev2.o 1obj-$(CONFIG_ARCH_EMEV2) += clk-emev2.o
2obj-$(CONFIG_ARCH_R7S72100) += clk-rz.o 2obj-$(CONFIG_ARCH_R7S72100) += clk-rz.o
3obj-$(CONFIG_ARCH_R8A73A4) += clk-r8a73a4.o
3obj-$(CONFIG_ARCH_R8A7740) += clk-r8a7740.o 4obj-$(CONFIG_ARCH_R8A7740) += clk-r8a7740.o
4obj-$(CONFIG_ARCH_R8A7779) += clk-r8a7779.o 5obj-$(CONFIG_ARCH_R8A7779) += clk-r8a7779.o
5obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o 6obj-$(CONFIG_ARCH_R8A7790) += clk-rcar-gen2.o
6obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o 7obj-$(CONFIG_ARCH_R8A7791) += clk-rcar-gen2.o
8obj-$(CONFIG_ARCH_R8A7793) += clk-rcar-gen2.o
7obj-$(CONFIG_ARCH_R8A7794) += clk-rcar-gen2.o 9obj-$(CONFIG_ARCH_R8A7794) += clk-rcar-gen2.o
8obj-$(CONFIG_ARCH_SH73A0) += clk-sh73a0.o 10obj-$(CONFIG_ARCH_SH73A0) += clk-sh73a0.o
9obj-$(CONFIG_ARCH_SHMOBILE_MULTI) += clk-div6.o 11obj-$(CONFIG_ARCH_SHMOBILE_MULTI) += clk-div6.o
diff --git a/drivers/clk/shmobile/clk-div6.c b/drivers/clk/shmobile/clk-div6.c
index 639241e31e03..036a692c7219 100644
--- a/drivers/clk/shmobile/clk-div6.c
+++ b/drivers/clk/shmobile/clk-div6.c
@@ -54,12 +54,19 @@ static int cpg_div6_clock_enable(struct clk_hw *hw)
54static void cpg_div6_clock_disable(struct clk_hw *hw) 54static void cpg_div6_clock_disable(struct clk_hw *hw)
55{ 55{
56 struct div6_clock *clock = to_div6_clock(hw); 56 struct div6_clock *clock = to_div6_clock(hw);
57 u32 val;
57 58
58 /* DIV6 clocks require the divisor field to be non-zero when stopping 59 val = clk_readl(clock->reg);
59 * the clock. 60 val |= CPG_DIV6_CKSTP;
61 /*
62 * DIV6 clocks require the divisor field to be non-zero when stopping
63 * the clock. However, some clocks (e.g. ZB on sh73a0) fail to be
64 * re-enabled later if the divisor field is changed when stopping the
65 * clock
60 */ 66 */
61 clk_writel(clk_readl(clock->reg) | CPG_DIV6_CKSTP | CPG_DIV6_DIV_MASK, 67 if (!(val & CPG_DIV6_DIV_MASK))
62 clock->reg); 68 val |= CPG_DIV6_DIV_MASK;
69 clk_writel(val, clock->reg);
63} 70}
64 71
65static int cpg_div6_clock_is_enabled(struct clk_hw *hw) 72static int cpg_div6_clock_is_enabled(struct clk_hw *hw)
@@ -83,6 +90,9 @@ static unsigned int cpg_div6_clock_calc_div(unsigned long rate,
83{ 90{
84 unsigned int div; 91 unsigned int div;
85 92
93 if (!rate)
94 rate = 1;
95
86 div = DIV_ROUND_CLOSEST(parent_rate, rate); 96 div = DIV_ROUND_CLOSEST(parent_rate, rate);
87 return clamp_t(unsigned int, div, 1, 64); 97 return clamp_t(unsigned int, div, 1, 64);
88} 98}
diff --git a/drivers/clk/shmobile/clk-r8a73a4.c b/drivers/clk/shmobile/clk-r8a73a4.c
new file mode 100644
index 000000000000..29b9a0b0012a
--- /dev/null
+++ b/drivers/clk/shmobile/clk-r8a73a4.c
@@ -0,0 +1,241 @@
1/*
2 * r8a73a4 Core CPG Clocks
3 *
4 * Copyright (C) 2014 Ulrich Hecht
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; version 2 of the License.
9 */
10
11#include <linux/clk-provider.h>
12#include <linux/clkdev.h>
13#include <linux/clk/shmobile.h>
14#include <linux/init.h>
15#include <linux/kernel.h>
16#include <linux/of.h>
17#include <linux/of_address.h>
18#include <linux/spinlock.h>
19
20struct r8a73a4_cpg {
21 struct clk_onecell_data data;
22 spinlock_t lock;
23 void __iomem *reg;
24};
25
26#define CPG_CKSCR 0xc0
27#define CPG_FRQCRA 0x00
28#define CPG_FRQCRB 0x04
29#define CPG_FRQCRC 0xe0
30#define CPG_PLL0CR 0xd8
31#define CPG_PLL1CR 0x28
32#define CPG_PLL2CR 0x2c
33#define CPG_PLL2HCR 0xe4
34#define CPG_PLL2SCR 0xf4
35
36#define CLK_ENABLE_ON_INIT BIT(0)
37
38struct div4_clk {
39 const char *name;
40 unsigned int reg;
41 unsigned int shift;
42};
43
44static struct div4_clk div4_clks[] = {
45 { "i", CPG_FRQCRA, 20 },
46 { "m3", CPG_FRQCRA, 12 },
47 { "b", CPG_FRQCRA, 8 },
48 { "m1", CPG_FRQCRA, 4 },
49 { "m2", CPG_FRQCRA, 0 },
50 { "zx", CPG_FRQCRB, 12 },
51 { "zs", CPG_FRQCRB, 8 },
52 { "hp", CPG_FRQCRB, 4 },
53 { NULL, 0, 0 },
54};
55
56static const struct clk_div_table div4_div_table[] = {
57 { 0, 2 }, { 1, 3 }, { 2, 4 }, { 3, 6 }, { 4, 8 }, { 5, 12 },
58 { 6, 16 }, { 7, 18 }, { 8, 24 }, { 10, 36 }, { 11, 48 },
59 { 12, 10 }, { 0, 0 }
60};
61
62static struct clk * __init
63r8a73a4_cpg_register_clock(struct device_node *np, struct r8a73a4_cpg *cpg,
64 const char *name)
65{
66 const struct clk_div_table *table = NULL;
67 const char *parent_name;
68 unsigned int shift, reg;
69 unsigned int mult = 1;
70 unsigned int div = 1;
71
72
73 if (!strcmp(name, "main")) {
74 u32 ckscr = clk_readl(cpg->reg + CPG_CKSCR);
75
76 switch ((ckscr >> 28) & 3) {
77 case 0: /* extal1 */
78 parent_name = of_clk_get_parent_name(np, 0);
79 break;
80 case 1: /* extal1 / 2 */
81 parent_name = of_clk_get_parent_name(np, 0);
82 div = 2;
83 break;
84 case 2: /* extal2 */
85 parent_name = of_clk_get_parent_name(np, 1);
86 break;
87 case 3: /* extal2 / 2 */
88 parent_name = of_clk_get_parent_name(np, 1);
89 div = 2;
90 break;
91 }
92 } else if (!strcmp(name, "pll0")) {
93 /* PLL0/1 are configurable multiplier clocks. Register them as
94 * fixed factor clocks for now as there's no generic multiplier
95 * clock implementation and we currently have no need to change
96 * the multiplier value.
97 */
98 u32 value = clk_readl(cpg->reg + CPG_PLL0CR);
99
100 parent_name = "main";
101 mult = ((value >> 24) & 0x7f) + 1;
102 if (value & BIT(20))
103 div = 2;
104 } else if (!strcmp(name, "pll1")) {
105 u32 value = clk_readl(cpg->reg + CPG_PLL1CR);
106
107 parent_name = "main";
108 /* XXX: enable bit? */
109 mult = ((value >> 24) & 0x7f) + 1;
110 if (value & BIT(7))
111 div = 2;
112 } else if (!strncmp(name, "pll2", 4)) {
113 u32 value, cr;
114
115 switch (name[4]) {
116 case 0:
117 cr = CPG_PLL2CR;
118 break;
119 case 's':
120 cr = CPG_PLL2SCR;
121 break;
122 case 'h':
123 cr = CPG_PLL2HCR;
124 break;
125 default:
126 return ERR_PTR(-EINVAL);
127 }
128 value = clk_readl(cpg->reg + cr);
129 switch ((value >> 5) & 7) {
130 case 0:
131 parent_name = "main";
132 div = 2;
133 break;
134 case 1:
135 parent_name = "extal2";
136 div = 2;
137 break;
138 case 3:
139 parent_name = "extal2";
140 div = 4;
141 break;
142 case 4:
143 parent_name = "main";
144 break;
145 case 5:
146 parent_name = "extal2";
147 break;
148 default:
149 pr_warn("%s: unexpected parent of %s\n", __func__,
150 name);
151 return ERR_PTR(-EINVAL);
152 }
153 /* XXX: enable bit? */
154 mult = ((value >> 24) & 0x7f) + 1;
155 } else if (!strcmp(name, "z") || !strcmp(name, "z2")) {
156 u32 shift = 8;
157
158 parent_name = "pll0";
159 if (name[1] == '2') {
160 div = 2;
161 shift = 0;
162 }
163 div *= 32;
164 mult = 0x20 - ((clk_readl(cpg->reg + CPG_FRQCRC) >> shift)
165 & 0x1f);
166 } else {
167 struct div4_clk *c;
168
169 for (c = div4_clks; c->name; c++) {
170 if (!strcmp(name, c->name))
171 break;
172 }
173 if (!c->name)
174 return ERR_PTR(-EINVAL);
175
176 parent_name = "pll1";
177 table = div4_div_table;
178 reg = c->reg;
179 shift = c->shift;
180 }
181
182 if (!table) {
183 return clk_register_fixed_factor(NULL, name, parent_name, 0,
184 mult, div);
185 } else {
186 return clk_register_divider_table(NULL, name, parent_name, 0,
187 cpg->reg + reg, shift, 4, 0,
188 table, &cpg->lock);
189 }
190}
191
192static void __init r8a73a4_cpg_clocks_init(struct device_node *np)
193{
194 struct r8a73a4_cpg *cpg;
195 struct clk **clks;
196 unsigned int i;
197 int num_clks;
198
199 num_clks = of_property_count_strings(np, "clock-output-names");
200 if (num_clks < 0) {
201 pr_err("%s: failed to count clocks\n", __func__);
202 return;
203 }
204
205 cpg = kzalloc(sizeof(*cpg), GFP_KERNEL);
206 clks = kcalloc(num_clks, sizeof(*clks), GFP_KERNEL);
207 if (cpg == NULL || clks == NULL) {
208 /* We're leaking memory on purpose, there's no point in cleaning
209 * up as the system won't boot anyway.
210 */
211 return;
212 }
213
214 spin_lock_init(&cpg->lock);
215
216 cpg->data.clks = clks;
217 cpg->data.clk_num = num_clks;
218
219 cpg->reg = of_iomap(np, 0);
220 if (WARN_ON(cpg->reg == NULL))
221 return;
222
223 for (i = 0; i < num_clks; ++i) {
224 const char *name;
225 struct clk *clk;
226
227 of_property_read_string_index(np, "clock-output-names", i,
228 &name);
229
230 clk = r8a73a4_cpg_register_clock(np, cpg, name);
231 if (IS_ERR(clk))
232 pr_err("%s: failed to register %s %s clock (%ld)\n",
233 __func__, np->name, name, PTR_ERR(clk));
234 else
235 cpg->data.clks[i] = clk;
236 }
237
238 of_clk_add_provider(np, of_clk_src_onecell_get, &cpg->data);
239}
240CLK_OF_DECLARE(r8a73a4_cpg_clks, "renesas,r8a73a4-cpg-clocks",
241 r8a73a4_cpg_clocks_init);
diff --git a/drivers/clk/shmobile/clk-rcar-gen2.c b/drivers/clk/shmobile/clk-rcar-gen2.c
index e996425d06a9..acfb6d7dbd6b 100644
--- a/drivers/clk/shmobile/clk-rcar-gen2.c
+++ b/drivers/clk/shmobile/clk-rcar-gen2.c
@@ -33,6 +33,8 @@ struct rcar_gen2_cpg {
33#define CPG_FRQCRC 0x000000e0 33#define CPG_FRQCRC 0x000000e0
34#define CPG_FRQCRC_ZFC_MASK (0x1f << 8) 34#define CPG_FRQCRC_ZFC_MASK (0x1f << 8)
35#define CPG_FRQCRC_ZFC_SHIFT 8 35#define CPG_FRQCRC_ZFC_SHIFT 8
36#define CPG_ADSPCKCR 0x0000025c
37#define CPG_RCANCKCR 0x00000270
36 38
37/* ----------------------------------------------------------------------------- 39/* -----------------------------------------------------------------------------
38 * Z Clock 40 * Z Clock
@@ -161,6 +163,88 @@ static struct clk * __init cpg_z_clk_register(struct rcar_gen2_cpg *cpg)
161 return clk; 163 return clk;
162} 164}
163 165
166static struct clk * __init cpg_rcan_clk_register(struct rcar_gen2_cpg *cpg,
167 struct device_node *np)
168{
169 const char *parent_name = of_clk_get_parent_name(np, 1);
170 struct clk_fixed_factor *fixed;
171 struct clk_gate *gate;
172 struct clk *clk;
173
174 fixed = kzalloc(sizeof(*fixed), GFP_KERNEL);
175 if (!fixed)
176 return ERR_PTR(-ENOMEM);
177
178 fixed->mult = 1;
179 fixed->div = 6;
180
181 gate = kzalloc(sizeof(*gate), GFP_KERNEL);
182 if (!gate) {
183 kfree(fixed);
184 return ERR_PTR(-ENOMEM);
185 }
186
187 gate->reg = cpg->reg + CPG_RCANCKCR;
188 gate->bit_idx = 8;
189 gate->flags = CLK_GATE_SET_TO_DISABLE;
190 gate->lock = &cpg->lock;
191
192 clk = clk_register_composite(NULL, "rcan", &parent_name, 1, NULL, NULL,
193 &fixed->hw, &clk_fixed_factor_ops,
194 &gate->hw, &clk_gate_ops, 0);
195 if (IS_ERR(clk)) {
196 kfree(gate);
197 kfree(fixed);
198 }
199
200 return clk;
201}
202
203/* ADSP divisors */
204static const struct clk_div_table cpg_adsp_div_table[] = {
205 { 1, 3 }, { 2, 4 }, { 3, 6 }, { 4, 8 },
206 { 5, 12 }, { 6, 16 }, { 7, 18 }, { 8, 24 },
207 { 10, 36 }, { 11, 48 }, { 0, 0 },
208};
209
210static struct clk * __init cpg_adsp_clk_register(struct rcar_gen2_cpg *cpg)
211{
212 const char *parent_name = "pll1";
213 struct clk_divider *div;
214 struct clk_gate *gate;
215 struct clk *clk;
216
217 div = kzalloc(sizeof(*div), GFP_KERNEL);
218 if (!div)
219 return ERR_PTR(-ENOMEM);
220
221 div->reg = cpg->reg + CPG_ADSPCKCR;
222 div->width = 4;
223 div->table = cpg_adsp_div_table;
224 div->lock = &cpg->lock;
225
226 gate = kzalloc(sizeof(*gate), GFP_KERNEL);
227 if (!gate) {
228 kfree(div);
229 return ERR_PTR(-ENOMEM);
230 }
231
232 gate->reg = cpg->reg + CPG_ADSPCKCR;
233 gate->bit_idx = 8;
234 gate->flags = CLK_GATE_SET_TO_DISABLE;
235 gate->lock = &cpg->lock;
236
237 clk = clk_register_composite(NULL, "adsp", &parent_name, 1, NULL, NULL,
238 &div->hw, &clk_divider_ops,
239 &gate->hw, &clk_gate_ops, 0);
240 if (IS_ERR(clk)) {
241 kfree(gate);
242 kfree(div);
243 }
244
245 return clk;
246}
247
164/* ----------------------------------------------------------------------------- 248/* -----------------------------------------------------------------------------
165 * CPG Clock Data 249 * CPG Clock Data
166 */ 250 */
@@ -263,6 +347,10 @@ rcar_gen2_cpg_register_clock(struct device_node *np, struct rcar_gen2_cpg *cpg,
263 shift = 0; 347 shift = 0;
264 } else if (!strcmp(name, "z")) { 348 } else if (!strcmp(name, "z")) {
265 return cpg_z_clk_register(cpg); 349 return cpg_z_clk_register(cpg);
350 } else if (!strcmp(name, "rcan")) {
351 return cpg_rcan_clk_register(cpg, np);
352 } else if (!strcmp(name, "adsp")) {
353 return cpg_adsp_clk_register(cpg);
266 } else { 354 } else {
267 return ERR_PTR(-EINVAL); 355 return ERR_PTR(-EINVAL);
268 } 356 }
diff --git a/drivers/clk/st/clk-flexgen.c b/drivers/clk/st/clk-flexgen.c
index 2282cef9f2ff..bf12a25eb3a2 100644
--- a/drivers/clk/st/clk-flexgen.c
+++ b/drivers/clk/st/clk-flexgen.c
@@ -37,8 +37,8 @@ static int flexgen_enable(struct clk_hw *hw)
37 struct clk_hw *pgate_hw = &flexgen->pgate.hw; 37 struct clk_hw *pgate_hw = &flexgen->pgate.hw;
38 struct clk_hw *fgate_hw = &flexgen->fgate.hw; 38 struct clk_hw *fgate_hw = &flexgen->fgate.hw;
39 39
40 pgate_hw->clk = hw->clk; 40 __clk_hw_set_clk(pgate_hw, hw);
41 fgate_hw->clk = hw->clk; 41 __clk_hw_set_clk(fgate_hw, hw);
42 42
43 clk_gate_ops.enable(pgate_hw); 43 clk_gate_ops.enable(pgate_hw);
44 44
@@ -54,7 +54,7 @@ static void flexgen_disable(struct clk_hw *hw)
54 struct clk_hw *fgate_hw = &flexgen->fgate.hw; 54 struct clk_hw *fgate_hw = &flexgen->fgate.hw;
55 55
56 /* disable only the final gate */ 56 /* disable only the final gate */
57 fgate_hw->clk = hw->clk; 57 __clk_hw_set_clk(fgate_hw, hw);
58 58
59 clk_gate_ops.disable(fgate_hw); 59 clk_gate_ops.disable(fgate_hw);
60 60
@@ -66,7 +66,7 @@ static int flexgen_is_enabled(struct clk_hw *hw)
66 struct flexgen *flexgen = to_flexgen(hw); 66 struct flexgen *flexgen = to_flexgen(hw);
67 struct clk_hw *fgate_hw = &flexgen->fgate.hw; 67 struct clk_hw *fgate_hw = &flexgen->fgate.hw;
68 68
69 fgate_hw->clk = hw->clk; 69 __clk_hw_set_clk(fgate_hw, hw);
70 70
71 if (!clk_gate_ops.is_enabled(fgate_hw)) 71 if (!clk_gate_ops.is_enabled(fgate_hw))
72 return 0; 72 return 0;
@@ -79,7 +79,7 @@ static u8 flexgen_get_parent(struct clk_hw *hw)
79 struct flexgen *flexgen = to_flexgen(hw); 79 struct flexgen *flexgen = to_flexgen(hw);
80 struct clk_hw *mux_hw = &flexgen->mux.hw; 80 struct clk_hw *mux_hw = &flexgen->mux.hw;
81 81
82 mux_hw->clk = hw->clk; 82 __clk_hw_set_clk(mux_hw, hw);
83 83
84 return clk_mux_ops.get_parent(mux_hw); 84 return clk_mux_ops.get_parent(mux_hw);
85} 85}
@@ -89,7 +89,7 @@ static int flexgen_set_parent(struct clk_hw *hw, u8 index)
89 struct flexgen *flexgen = to_flexgen(hw); 89 struct flexgen *flexgen = to_flexgen(hw);
90 struct clk_hw *mux_hw = &flexgen->mux.hw; 90 struct clk_hw *mux_hw = &flexgen->mux.hw;
91 91
92 mux_hw->clk = hw->clk; 92 __clk_hw_set_clk(mux_hw, hw);
93 93
94 return clk_mux_ops.set_parent(mux_hw, index); 94 return clk_mux_ops.set_parent(mux_hw, index);
95} 95}
@@ -124,8 +124,8 @@ unsigned long flexgen_recalc_rate(struct clk_hw *hw,
124 struct clk_hw *fdiv_hw = &flexgen->fdiv.hw; 124 struct clk_hw *fdiv_hw = &flexgen->fdiv.hw;
125 unsigned long mid_rate; 125 unsigned long mid_rate;
126 126
127 pdiv_hw->clk = hw->clk; 127 __clk_hw_set_clk(pdiv_hw, hw);
128 fdiv_hw->clk = hw->clk; 128 __clk_hw_set_clk(fdiv_hw, hw);
129 129
130 mid_rate = clk_divider_ops.recalc_rate(pdiv_hw, parent_rate); 130 mid_rate = clk_divider_ops.recalc_rate(pdiv_hw, parent_rate);
131 131
@@ -138,16 +138,27 @@ static int flexgen_set_rate(struct clk_hw *hw, unsigned long rate,
138 struct flexgen *flexgen = to_flexgen(hw); 138 struct flexgen *flexgen = to_flexgen(hw);
139 struct clk_hw *pdiv_hw = &flexgen->pdiv.hw; 139 struct clk_hw *pdiv_hw = &flexgen->pdiv.hw;
140 struct clk_hw *fdiv_hw = &flexgen->fdiv.hw; 140 struct clk_hw *fdiv_hw = &flexgen->fdiv.hw;
141 unsigned long primary_div = 0; 141 unsigned long div = 0;
142 int ret = 0; 142 int ret = 0;
143 143
144 pdiv_hw->clk = hw->clk; 144 __clk_hw_set_clk(pdiv_hw, hw);
145 fdiv_hw->clk = hw->clk; 145 __clk_hw_set_clk(fdiv_hw, hw);
146 146
147 primary_div = clk_best_div(parent_rate, rate); 147 div = clk_best_div(parent_rate, rate);
148 148
149 clk_divider_ops.set_rate(fdiv_hw, parent_rate, parent_rate); 149 /*
150 ret = clk_divider_ops.set_rate(pdiv_hw, rate, rate * primary_div); 150 * pdiv is mainly targeted for low freq results, while fdiv
151 * should be used for div <= 64. The other way round can
152 * lead to 'duty cycle' issues.
153 */
154
155 if (div <= 64) {
156 clk_divider_ops.set_rate(pdiv_hw, parent_rate, parent_rate);
157 ret = clk_divider_ops.set_rate(fdiv_hw, rate, rate * div);
158 } else {
159 clk_divider_ops.set_rate(fdiv_hw, parent_rate, parent_rate);
160 ret = clk_divider_ops.set_rate(pdiv_hw, rate, rate * div);
161 }
151 162
152 return ret; 163 return ret;
153} 164}
diff --git a/drivers/clk/st/clkgen-mux.c b/drivers/clk/st/clkgen-mux.c
index 79dc40b5cc68..9a15ec344a85 100644
--- a/drivers/clk/st/clkgen-mux.c
+++ b/drivers/clk/st/clkgen-mux.c
@@ -94,7 +94,7 @@ static int clkgena_divmux_enable(struct clk_hw *hw)
94 unsigned long timeout; 94 unsigned long timeout;
95 int ret = 0; 95 int ret = 0;
96 96
97 mux_hw->clk = hw->clk; 97 __clk_hw_set_clk(mux_hw, hw);
98 98
99 ret = clk_mux_ops.set_parent(mux_hw, genamux->muxsel); 99 ret = clk_mux_ops.set_parent(mux_hw, genamux->muxsel);
100 if (ret) 100 if (ret)
@@ -116,7 +116,7 @@ static void clkgena_divmux_disable(struct clk_hw *hw)
116 struct clkgena_divmux *genamux = to_clkgena_divmux(hw); 116 struct clkgena_divmux *genamux = to_clkgena_divmux(hw);
117 struct clk_hw *mux_hw = &genamux->mux.hw; 117 struct clk_hw *mux_hw = &genamux->mux.hw;
118 118
119 mux_hw->clk = hw->clk; 119 __clk_hw_set_clk(mux_hw, hw);
120 120
121 clk_mux_ops.set_parent(mux_hw, CKGAX_CLKOPSRC_SWITCH_OFF); 121 clk_mux_ops.set_parent(mux_hw, CKGAX_CLKOPSRC_SWITCH_OFF);
122} 122}
@@ -126,7 +126,7 @@ static int clkgena_divmux_is_enabled(struct clk_hw *hw)
126 struct clkgena_divmux *genamux = to_clkgena_divmux(hw); 126 struct clkgena_divmux *genamux = to_clkgena_divmux(hw);
127 struct clk_hw *mux_hw = &genamux->mux.hw; 127 struct clk_hw *mux_hw = &genamux->mux.hw;
128 128
129 mux_hw->clk = hw->clk; 129 __clk_hw_set_clk(mux_hw, hw);
130 130
131 return (s8)clk_mux_ops.get_parent(mux_hw) > 0; 131 return (s8)clk_mux_ops.get_parent(mux_hw) > 0;
132} 132}
@@ -136,7 +136,7 @@ u8 clkgena_divmux_get_parent(struct clk_hw *hw)
136 struct clkgena_divmux *genamux = to_clkgena_divmux(hw); 136 struct clkgena_divmux *genamux = to_clkgena_divmux(hw);
137 struct clk_hw *mux_hw = &genamux->mux.hw; 137 struct clk_hw *mux_hw = &genamux->mux.hw;
138 138
139 mux_hw->clk = hw->clk; 139 __clk_hw_set_clk(mux_hw, hw);
140 140
141 genamux->muxsel = clk_mux_ops.get_parent(mux_hw); 141 genamux->muxsel = clk_mux_ops.get_parent(mux_hw);
142 if ((s8)genamux->muxsel < 0) { 142 if ((s8)genamux->muxsel < 0) {
@@ -174,7 +174,7 @@ unsigned long clkgena_divmux_recalc_rate(struct clk_hw *hw,
174 struct clkgena_divmux *genamux = to_clkgena_divmux(hw); 174 struct clkgena_divmux *genamux = to_clkgena_divmux(hw);
175 struct clk_hw *div_hw = &genamux->div[genamux->muxsel].hw; 175 struct clk_hw *div_hw = &genamux->div[genamux->muxsel].hw;
176 176
177 div_hw->clk = hw->clk; 177 __clk_hw_set_clk(div_hw, hw);
178 178
179 return clk_divider_ops.recalc_rate(div_hw, parent_rate); 179 return clk_divider_ops.recalc_rate(div_hw, parent_rate);
180} 180}
@@ -185,7 +185,7 @@ static int clkgena_divmux_set_rate(struct clk_hw *hw, unsigned long rate,
185 struct clkgena_divmux *genamux = to_clkgena_divmux(hw); 185 struct clkgena_divmux *genamux = to_clkgena_divmux(hw);
186 struct clk_hw *div_hw = &genamux->div[genamux->muxsel].hw; 186 struct clk_hw *div_hw = &genamux->div[genamux->muxsel].hw;
187 187
188 div_hw->clk = hw->clk; 188 __clk_hw_set_clk(div_hw, hw);
189 189
190 return clk_divider_ops.set_rate(div_hw, rate, parent_rate); 190 return clk_divider_ops.set_rate(div_hw, rate, parent_rate);
191} 191}
@@ -196,7 +196,7 @@ static long clkgena_divmux_round_rate(struct clk_hw *hw, unsigned long rate,
196 struct clkgena_divmux *genamux = to_clkgena_divmux(hw); 196 struct clkgena_divmux *genamux = to_clkgena_divmux(hw);
197 struct clk_hw *div_hw = &genamux->div[genamux->muxsel].hw; 197 struct clk_hw *div_hw = &genamux->div[genamux->muxsel].hw;
198 198
199 div_hw->clk = hw->clk; 199 __clk_hw_set_clk(div_hw, hw);
200 200
201 return clk_divider_ops.round_rate(div_hw, rate, prate); 201 return clk_divider_ops.round_rate(div_hw, rate, prate);
202} 202}
diff --git a/drivers/clk/sunxi/Makefile b/drivers/clk/sunxi/Makefile
index a66953c0f430..3a5292e3fcf8 100644
--- a/drivers/clk/sunxi/Makefile
+++ b/drivers/clk/sunxi/Makefile
@@ -8,6 +8,7 @@ obj-y += clk-a20-gmac.o
8obj-y += clk-mod0.o 8obj-y += clk-mod0.o
9obj-y += clk-sun8i-mbus.o 9obj-y += clk-sun8i-mbus.o
10obj-y += clk-sun9i-core.o 10obj-y += clk-sun9i-core.o
11obj-y += clk-sun9i-mmc.o
11 12
12obj-$(CONFIG_MFD_SUN6I_PRCM) += \ 13obj-$(CONFIG_MFD_SUN6I_PRCM) += \
13 clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o \ 14 clk-sun6i-ar100.o clk-sun6i-apb0.o clk-sun6i-apb0-gates.o \
diff --git a/drivers/clk/sunxi/clk-factors.c b/drivers/clk/sunxi/clk-factors.c
index 62e08fb58554..8c20190a3e9f 100644
--- a/drivers/clk/sunxi/clk-factors.c
+++ b/drivers/clk/sunxi/clk-factors.c
@@ -80,6 +80,8 @@ static long clk_factors_round_rate(struct clk_hw *hw, unsigned long rate,
80} 80}
81 81
82static long clk_factors_determine_rate(struct clk_hw *hw, unsigned long rate, 82static long clk_factors_determine_rate(struct clk_hw *hw, unsigned long rate,
83 unsigned long min_rate,
84 unsigned long max_rate,
83 unsigned long *best_parent_rate, 85 unsigned long *best_parent_rate,
84 struct clk_hw **best_parent_p) 86 struct clk_hw **best_parent_p)
85{ 87{
@@ -156,9 +158,10 @@ static const struct clk_ops clk_factors_ops = {
156 .set_rate = clk_factors_set_rate, 158 .set_rate = clk_factors_set_rate,
157}; 159};
158 160
159struct clk * __init sunxi_factors_register(struct device_node *node, 161struct clk *sunxi_factors_register(struct device_node *node,
160 const struct factors_data *data, 162 const struct factors_data *data,
161 spinlock_t *lock) 163 spinlock_t *lock,
164 void __iomem *reg)
162{ 165{
163 struct clk *clk; 166 struct clk *clk;
164 struct clk_factors *factors; 167 struct clk_factors *factors;
@@ -168,11 +171,8 @@ struct clk * __init sunxi_factors_register(struct device_node *node,
168 struct clk_hw *mux_hw = NULL; 171 struct clk_hw *mux_hw = NULL;
169 const char *clk_name = node->name; 172 const char *clk_name = node->name;
170 const char *parents[FACTORS_MAX_PARENTS]; 173 const char *parents[FACTORS_MAX_PARENTS];
171 void __iomem *reg;
172 int i = 0; 174 int i = 0;
173 175
174 reg = of_iomap(node, 0);
175
176 /* if we have a mux, we will have >1 parents */ 176 /* if we have a mux, we will have >1 parents */
177 while (i < FACTORS_MAX_PARENTS && 177 while (i < FACTORS_MAX_PARENTS &&
178 (parents[i] = of_clk_get_parent_name(node, i)) != NULL) 178 (parents[i] = of_clk_get_parent_name(node, i)) != NULL)
diff --git a/drivers/clk/sunxi/clk-factors.h b/drivers/clk/sunxi/clk-factors.h
index 912238fde132..171085ab5513 100644
--- a/drivers/clk/sunxi/clk-factors.h
+++ b/drivers/clk/sunxi/clk-factors.h
@@ -36,8 +36,9 @@ struct clk_factors {
36 spinlock_t *lock; 36 spinlock_t *lock;
37}; 37};
38 38
39struct clk * __init sunxi_factors_register(struct device_node *node, 39struct clk *sunxi_factors_register(struct device_node *node,
40 const struct factors_data *data, 40 const struct factors_data *data,
41 spinlock_t *lock); 41 spinlock_t *lock,
42 void __iomem *reg);
42 43
43#endif 44#endif
diff --git a/drivers/clk/sunxi/clk-mod0.c b/drivers/clk/sunxi/clk-mod0.c
index da0524eaee94..ec8f5a1fca09 100644
--- a/drivers/clk/sunxi/clk-mod0.c
+++ b/drivers/clk/sunxi/clk-mod0.c
@@ -17,6 +17,7 @@
17#include <linux/clk-provider.h> 17#include <linux/clk-provider.h>
18#include <linux/clkdev.h> 18#include <linux/clkdev.h>
19#include <linux/of_address.h> 19#include <linux/of_address.h>
20#include <linux/platform_device.h>
20 21
21#include "clk-factors.h" 22#include "clk-factors.h"
22 23
@@ -67,7 +68,7 @@ static struct clk_factors_config sun4i_a10_mod0_config = {
67 .pwidth = 2, 68 .pwidth = 2,
68}; 69};
69 70
70static const struct factors_data sun4i_a10_mod0_data __initconst = { 71static const struct factors_data sun4i_a10_mod0_data = {
71 .enable = 31, 72 .enable = 31,
72 .mux = 24, 73 .mux = 24,
73 .muxmask = BIT(1) | BIT(0), 74 .muxmask = BIT(1) | BIT(0),
@@ -79,15 +80,95 @@ static DEFINE_SPINLOCK(sun4i_a10_mod0_lock);
79 80
80static void __init sun4i_a10_mod0_setup(struct device_node *node) 81static void __init sun4i_a10_mod0_setup(struct device_node *node)
81{ 82{
82 sunxi_factors_register(node, &sun4i_a10_mod0_data, &sun4i_a10_mod0_lock); 83 void __iomem *reg;
84
85 reg = of_iomap(node, 0);
86 if (!reg) {
87 /*
88 * This happens with mod0 clk nodes instantiated through
89 * mfd, as those do not have their resources assigned at
90 * CLK_OF_DECLARE time yet, so do not print an error.
91 */
92 return;
93 }
94
95 sunxi_factors_register(node, &sun4i_a10_mod0_data,
96 &sun4i_a10_mod0_lock, reg);
83} 97}
84CLK_OF_DECLARE(sun4i_a10_mod0, "allwinner,sun4i-a10-mod0-clk", sun4i_a10_mod0_setup); 98CLK_OF_DECLARE(sun4i_a10_mod0, "allwinner,sun4i-a10-mod0-clk", sun4i_a10_mod0_setup);
85 99
100static int sun4i_a10_mod0_clk_probe(struct platform_device *pdev)
101{
102 struct device_node *np = pdev->dev.of_node;
103 struct resource *r;
104 void __iomem *reg;
105
106 if (!np)
107 return -ENODEV;
108
109 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
110 reg = devm_ioremap_resource(&pdev->dev, r);
111 if (IS_ERR(reg))
112 return PTR_ERR(reg);
113
114 sunxi_factors_register(np, &sun4i_a10_mod0_data,
115 &sun4i_a10_mod0_lock, reg);
116 return 0;
117}
118
119static const struct of_device_id sun4i_a10_mod0_clk_dt_ids[] = {
120 { .compatible = "allwinner,sun4i-a10-mod0-clk" },
121 { /* sentinel */ }
122};
123
124static struct platform_driver sun4i_a10_mod0_clk_driver = {
125 .driver = {
126 .name = "sun4i-a10-mod0-clk",
127 .of_match_table = sun4i_a10_mod0_clk_dt_ids,
128 },
129 .probe = sun4i_a10_mod0_clk_probe,
130};
131module_platform_driver(sun4i_a10_mod0_clk_driver);
132
133static const struct factors_data sun9i_a80_mod0_data __initconst = {
134 .enable = 31,
135 .mux = 24,
136 .muxmask = BIT(3) | BIT(2) | BIT(1) | BIT(0),
137 .table = &sun4i_a10_mod0_config,
138 .getter = sun4i_a10_get_mod0_factors,
139};
140
141static void __init sun9i_a80_mod0_setup(struct device_node *node)
142{
143 void __iomem *reg;
144
145 reg = of_io_request_and_map(node, 0, of_node_full_name(node));
146 if (IS_ERR(reg)) {
147 pr_err("Could not get registers for mod0-clk: %s\n",
148 node->name);
149 return;
150 }
151
152 sunxi_factors_register(node, &sun9i_a80_mod0_data,
153 &sun4i_a10_mod0_lock, reg);
154}
155CLK_OF_DECLARE(sun9i_a80_mod0, "allwinner,sun9i-a80-mod0-clk", sun9i_a80_mod0_setup);
156
86static DEFINE_SPINLOCK(sun5i_a13_mbus_lock); 157static DEFINE_SPINLOCK(sun5i_a13_mbus_lock);
87 158
88static void __init sun5i_a13_mbus_setup(struct device_node *node) 159static void __init sun5i_a13_mbus_setup(struct device_node *node)
89{ 160{
90 struct clk *mbus = sunxi_factors_register(node, &sun4i_a10_mod0_data, &sun5i_a13_mbus_lock); 161 struct clk *mbus;
162 void __iomem *reg;
163
164 reg = of_iomap(node, 0);
165 if (!reg) {
166 pr_err("Could not get registers for a13-mbus-clk\n");
167 return;
168 }
169
170 mbus = sunxi_factors_register(node, &sun4i_a10_mod0_data,
171 &sun5i_a13_mbus_lock, reg);
91 172
92 /* The MBUS clocks needs to be always enabled */ 173 /* The MBUS clocks needs to be always enabled */
93 __clk_get(mbus); 174 __clk_get(mbus);
@@ -95,14 +176,10 @@ static void __init sun5i_a13_mbus_setup(struct device_node *node)
95} 176}
96CLK_OF_DECLARE(sun5i_a13_mbus, "allwinner,sun5i-a13-mbus-clk", sun5i_a13_mbus_setup); 177CLK_OF_DECLARE(sun5i_a13_mbus, "allwinner,sun5i-a13-mbus-clk", sun5i_a13_mbus_setup);
97 178
98struct mmc_phase_data {
99 u8 offset;
100};
101
102struct mmc_phase { 179struct mmc_phase {
103 struct clk_hw hw; 180 struct clk_hw hw;
181 u8 offset;
104 void __iomem *reg; 182 void __iomem *reg;
105 struct mmc_phase_data *data;
106 spinlock_t *lock; 183 spinlock_t *lock;
107}; 184};
108 185
@@ -118,7 +195,7 @@ static int mmc_get_phase(struct clk_hw *hw)
118 u8 delay; 195 u8 delay;
119 196
120 value = readl(phase->reg); 197 value = readl(phase->reg);
121 delay = (value >> phase->data->offset) & 0x3; 198 delay = (value >> phase->offset) & 0x3;
122 199
123 if (!delay) 200 if (!delay)
124 return 180; 201 return 180;
@@ -206,8 +283,8 @@ static int mmc_set_phase(struct clk_hw *hw, int degrees)
206 283
207 spin_lock_irqsave(phase->lock, flags); 284 spin_lock_irqsave(phase->lock, flags);
208 value = readl(phase->reg); 285 value = readl(phase->reg);
209 value &= ~GENMASK(phase->data->offset + 3, phase->data->offset); 286 value &= ~GENMASK(phase->offset + 3, phase->offset);
210 value |= delay << phase->data->offset; 287 value |= delay << phase->offset;
211 writel(value, phase->reg); 288 writel(value, phase->reg);
212 spin_unlock_irqrestore(phase->lock, flags); 289 spin_unlock_irqrestore(phase->lock, flags);
213 290
@@ -219,66 +296,97 @@ static const struct clk_ops mmc_clk_ops = {
219 .set_phase = mmc_set_phase, 296 .set_phase = mmc_set_phase,
220}; 297};
221 298
222static void __init sun4i_a10_mmc_phase_setup(struct device_node *node, 299/*
223 struct mmc_phase_data *data) 300 * sunxi_mmc_setup - Common setup function for mmc module clocks
301 *
302 * The only difference between module clocks on different platforms is the
303 * width of the mux register bits and the valid values, which are passed in
304 * through struct factors_data. The phase clocks parts are identical.
305 */
306static void __init sunxi_mmc_setup(struct device_node *node,
307 const struct factors_data *data,
308 spinlock_t *lock)
224{ 309{
225 const char *parent_names[1] = { of_clk_get_parent_name(node, 0) }; 310 struct clk_onecell_data *clk_data;
226 struct clk_init_data init = { 311 const char *parent;
227 .num_parents = 1, 312 void __iomem *reg;
228 .parent_names = parent_names, 313 int i;
229 .ops = &mmc_clk_ops, 314
230 }; 315 reg = of_io_request_and_map(node, 0, of_node_full_name(node));
231 316 if (IS_ERR(reg)) {
232 struct mmc_phase *phase; 317 pr_err("Couldn't map the %s clock registers\n", node->name);
233 struct clk *clk;
234
235 phase = kmalloc(sizeof(*phase), GFP_KERNEL);
236 if (!phase)
237 return; 318 return;
319 }
238 320
239 phase->hw.init = &init; 321 clk_data = kmalloc(sizeof(*clk_data), GFP_KERNEL);
240 322 if (!clk_data)
241 phase->reg = of_iomap(node, 0); 323 return;
242 if (!phase->reg)
243 goto err_free;
244
245 phase->data = data;
246 phase->lock = &sun4i_a10_mod0_lock;
247
248 if (of_property_read_string(node, "clock-output-names", &init.name))
249 init.name = node->name;
250 324
251 clk = clk_register(NULL, &phase->hw); 325 clk_data->clks = kcalloc(3, sizeof(*clk_data->clks), GFP_KERNEL);
252 if (IS_ERR(clk)) 326 if (!clk_data->clks)
253 goto err_unmap; 327 goto err_free_data;
328
329 clk_data->clk_num = 3;
330 clk_data->clks[0] = sunxi_factors_register(node, data, lock, reg);
331 if (!clk_data->clks[0])
332 goto err_free_clks;
333
334 parent = __clk_get_name(clk_data->clks[0]);
335
336 for (i = 1; i < 3; i++) {
337 struct clk_init_data init = {
338 .num_parents = 1,
339 .parent_names = &parent,
340 .ops = &mmc_clk_ops,
341 };
342 struct mmc_phase *phase;
343
344 phase = kmalloc(sizeof(*phase), GFP_KERNEL);
345 if (!phase)
346 continue;
347
348 phase->hw.init = &init;
349 phase->reg = reg;
350 phase->lock = lock;
351
352 if (i == 1)
353 phase->offset = 8;
354 else
355 phase->offset = 20;
356
357 if (of_property_read_string_index(node, "clock-output-names",
358 i, &init.name))
359 init.name = node->name;
360
361 clk_data->clks[i] = clk_register(NULL, &phase->hw);
362 if (IS_ERR(clk_data->clks[i])) {
363 kfree(phase);
364 continue;
365 }
366 }
254 367
255 of_clk_add_provider(node, of_clk_src_simple_get, clk); 368 of_clk_add_provider(node, of_clk_src_onecell_get, clk_data);
256 369
257 return; 370 return;
258 371
259err_unmap: 372err_free_clks:
260 iounmap(phase->reg); 373 kfree(clk_data->clks);
261err_free: 374err_free_data:
262 kfree(phase); 375 kfree(clk_data);
263} 376}
264 377
378static DEFINE_SPINLOCK(sun4i_a10_mmc_lock);
265 379
266static struct mmc_phase_data mmc_output_clk = { 380static void __init sun4i_a10_mmc_setup(struct device_node *node)
267 .offset = 8,
268};
269
270static struct mmc_phase_data mmc_sample_clk = {
271 .offset = 20,
272};
273
274static void __init sun4i_a10_mmc_output_setup(struct device_node *node)
275{ 381{
276 sun4i_a10_mmc_phase_setup(node, &mmc_output_clk); 382 sunxi_mmc_setup(node, &sun4i_a10_mod0_data, &sun4i_a10_mmc_lock);
277} 383}
278CLK_OF_DECLARE(sun4i_a10_mmc_output, "allwinner,sun4i-a10-mmc-output-clk", sun4i_a10_mmc_output_setup); 384CLK_OF_DECLARE(sun4i_a10_mmc, "allwinner,sun4i-a10-mmc-clk", sun4i_a10_mmc_setup);
385
386static DEFINE_SPINLOCK(sun9i_a80_mmc_lock);
279 387
280static void __init sun4i_a10_mmc_sample_setup(struct device_node *node) 388static void __init sun9i_a80_mmc_setup(struct device_node *node)
281{ 389{
282 sun4i_a10_mmc_phase_setup(node, &mmc_sample_clk); 390 sunxi_mmc_setup(node, &sun9i_a80_mod0_data, &sun9i_a80_mmc_lock);
283} 391}
284CLK_OF_DECLARE(sun4i_a10_mmc_sample, "allwinner,sun4i-a10-mmc-sample-clk", sun4i_a10_mmc_sample_setup); 392CLK_OF_DECLARE(sun9i_a80_mmc, "allwinner,sun9i-a80-mmc-clk", sun9i_a80_mmc_setup);
diff --git a/drivers/clk/sunxi/clk-sun6i-ar100.c b/drivers/clk/sunxi/clk-sun6i-ar100.c
index 3d282fb8f85c..63cf149195ae 100644
--- a/drivers/clk/sunxi/clk-sun6i-ar100.c
+++ b/drivers/clk/sunxi/clk-sun6i-ar100.c
@@ -45,6 +45,8 @@ static unsigned long ar100_recalc_rate(struct clk_hw *hw,
45} 45}
46 46
47static long ar100_determine_rate(struct clk_hw *hw, unsigned long rate, 47static long ar100_determine_rate(struct clk_hw *hw, unsigned long rate,
48 unsigned long min_rate,
49 unsigned long max_rate,
48 unsigned long *best_parent_rate, 50 unsigned long *best_parent_rate,
49 struct clk_hw **best_parent_clk) 51 struct clk_hw **best_parent_clk)
50{ 52{
diff --git a/drivers/clk/sunxi/clk-sun8i-mbus.c b/drivers/clk/sunxi/clk-sun8i-mbus.c
index ef49786eefd3..14cd026064bf 100644
--- a/drivers/clk/sunxi/clk-sun8i-mbus.c
+++ b/drivers/clk/sunxi/clk-sun8i-mbus.c
@@ -69,8 +69,17 @@ static DEFINE_SPINLOCK(sun8i_a23_mbus_lock);
69 69
70static void __init sun8i_a23_mbus_setup(struct device_node *node) 70static void __init sun8i_a23_mbus_setup(struct device_node *node)
71{ 71{
72 struct clk *mbus = sunxi_factors_register(node, &sun8i_a23_mbus_data, 72 struct clk *mbus;
73 &sun8i_a23_mbus_lock); 73 void __iomem *reg;
74
75 reg = of_iomap(node, 0);
76 if (!reg) {
77 pr_err("Could not get registers for a23-mbus-clk\n");
78 return;
79 }
80
81 mbus = sunxi_factors_register(node, &sun8i_a23_mbus_data,
82 &sun8i_a23_mbus_lock, reg);
74 83
75 /* The MBUS clocks needs to be always enabled */ 84 /* The MBUS clocks needs to be always enabled */
76 __clk_get(mbus); 85 __clk_get(mbus);
diff --git a/drivers/clk/sunxi/clk-sun9i-core.c b/drivers/clk/sunxi/clk-sun9i-core.c
index 3cb9036d91bb..d8da77d72861 100644
--- a/drivers/clk/sunxi/clk-sun9i-core.c
+++ b/drivers/clk/sunxi/clk-sun9i-core.c
@@ -24,50 +24,51 @@
24 24
25 25
26/** 26/**
27 * sun9i_a80_get_pll4_factors() - calculates n, p, m factors for PLL1 27 * sun9i_a80_get_pll4_factors() - calculates n, p, m factors for PLL4
28 * PLL4 rate is calculated as follows 28 * PLL4 rate is calculated as follows
29 * rate = (parent_rate * n >> p) / (m + 1); 29 * rate = (parent_rate * n >> p) / (m + 1);
30 * parent_rate is always 24Mhz 30 * parent_rate is always 24MHz
31 * 31 *
32 * p and m are named div1 and div2 in Allwinner's SDK 32 * p and m are named div1 and div2 in Allwinner's SDK
33 */ 33 */
34 34
35static void sun9i_a80_get_pll4_factors(u32 *freq, u32 parent_rate, 35static void sun9i_a80_get_pll4_factors(u32 *freq, u32 parent_rate,
36 u8 *n, u8 *k, u8 *m, u8 *p) 36 u8 *n_ret, u8 *k, u8 *m_ret, u8 *p_ret)
37{ 37{
38 int div; 38 int n;
39 int m = 1;
40 int p = 1;
39 41
40 /* Normalize value to a 6M multiple */ 42 /* Normalize value to a 6 MHz multiple (24 MHz / 4) */
41 div = DIV_ROUND_UP(*freq, 6000000); 43 n = DIV_ROUND_UP(*freq, 6000000);
42 44
43 /* divs above 256 cannot be odd */ 45 /* If n is too large switch to steps of 12 MHz */
44 if (div > 256) 46 if (n > 255) {
45 div = round_up(div, 2); 47 m = 0;
48 n = (n + 1) / 2;
49 }
50
51 /* If n is still too large switch to steps of 24 MHz */
52 if (n > 255) {
53 p = 0;
54 n = (n + 1) / 2;
55 }
46 56
47 /* divs above 512 must be a multiple of 4 */ 57 /* n must be between 12 and 255 */
48 if (div > 512) 58 if (n > 255)
49 div = round_up(div, 4); 59 n = 255;
60 else if (n < 12)
61 n = 12;
50 62
51 *freq = 6000000 * div; 63 *freq = ((24000000 * n) >> p) / (m + 1);
52 64
53 /* we were called to round the frequency, we can now return */ 65 /* we were called to round the frequency, we can now return */
54 if (n == NULL) 66 if (n_ret == NULL)
55 return; 67 return;
56 68
57 /* p will be 1 for divs under 512 */ 69 *n_ret = n;
58 if (div < 512) 70 *m_ret = m;
59 *p = 1; 71 *p_ret = p;
60 else
61 *p = 0;
62
63 /* m will be 1 if div is odd */
64 if (div & 1)
65 *m = 1;
66 else
67 *m = 0;
68
69 /* calculate a suitable n based on m and p */
70 *n = div / (*p + 1) / (*m + 1);
71} 72}
72 73
73static struct clk_factors_config sun9i_a80_pll4_config = { 74static struct clk_factors_config sun9i_a80_pll4_config = {
@@ -89,7 +90,17 @@ static DEFINE_SPINLOCK(sun9i_a80_pll4_lock);
89 90
90static void __init sun9i_a80_pll4_setup(struct device_node *node) 91static void __init sun9i_a80_pll4_setup(struct device_node *node)
91{ 92{
92 sunxi_factors_register(node, &sun9i_a80_pll4_data, &sun9i_a80_pll4_lock); 93 void __iomem *reg;
94
95 reg = of_io_request_and_map(node, 0, of_node_full_name(node));
96 if (!reg) {
97 pr_err("Could not get registers for a80-pll4-clk: %s\n",
98 node->name);
99 return;
100 }
101
102 sunxi_factors_register(node, &sun9i_a80_pll4_data,
103 &sun9i_a80_pll4_lock, reg);
93} 104}
94CLK_OF_DECLARE(sun9i_a80_pll4, "allwinner,sun9i-a80-pll4-clk", sun9i_a80_pll4_setup); 105CLK_OF_DECLARE(sun9i_a80_pll4, "allwinner,sun9i-a80-pll4-clk", sun9i_a80_pll4_setup);
95 106
@@ -139,8 +150,18 @@ static DEFINE_SPINLOCK(sun9i_a80_gt_lock);
139 150
140static void __init sun9i_a80_gt_setup(struct device_node *node) 151static void __init sun9i_a80_gt_setup(struct device_node *node)
141{ 152{
142 struct clk *gt = sunxi_factors_register(node, &sun9i_a80_gt_data, 153 void __iomem *reg;
143 &sun9i_a80_gt_lock); 154 struct clk *gt;
155
156 reg = of_io_request_and_map(node, 0, of_node_full_name(node));
157 if (!reg) {
158 pr_err("Could not get registers for a80-gt-clk: %s\n",
159 node->name);
160 return;
161 }
162
163 gt = sunxi_factors_register(node, &sun9i_a80_gt_data,
164 &sun9i_a80_gt_lock, reg);
144 165
145 /* The GT bus clock needs to be always enabled */ 166 /* The GT bus clock needs to be always enabled */
146 __clk_get(gt); 167 __clk_get(gt);
@@ -194,7 +215,17 @@ static DEFINE_SPINLOCK(sun9i_a80_ahb_lock);
194 215
195static void __init sun9i_a80_ahb_setup(struct device_node *node) 216static void __init sun9i_a80_ahb_setup(struct device_node *node)
196{ 217{
197 sunxi_factors_register(node, &sun9i_a80_ahb_data, &sun9i_a80_ahb_lock); 218 void __iomem *reg;
219
220 reg = of_io_request_and_map(node, 0, of_node_full_name(node));
221 if (!reg) {
222 pr_err("Could not get registers for a80-ahb-clk: %s\n",
223 node->name);
224 return;
225 }
226
227 sunxi_factors_register(node, &sun9i_a80_ahb_data,
228 &sun9i_a80_ahb_lock, reg);
198} 229}
199CLK_OF_DECLARE(sun9i_a80_ahb, "allwinner,sun9i-a80-ahb-clk", sun9i_a80_ahb_setup); 230CLK_OF_DECLARE(sun9i_a80_ahb, "allwinner,sun9i-a80-ahb-clk", sun9i_a80_ahb_setup);
200 231
@@ -210,7 +241,17 @@ static DEFINE_SPINLOCK(sun9i_a80_apb0_lock);
210 241
211static void __init sun9i_a80_apb0_setup(struct device_node *node) 242static void __init sun9i_a80_apb0_setup(struct device_node *node)
212{ 243{
213 sunxi_factors_register(node, &sun9i_a80_apb0_data, &sun9i_a80_apb0_lock); 244 void __iomem *reg;
245
246 reg = of_io_request_and_map(node, 0, of_node_full_name(node));
247 if (!reg) {
248 pr_err("Could not get registers for a80-apb0-clk: %s\n",
249 node->name);
250 return;
251 }
252
253 sunxi_factors_register(node, &sun9i_a80_apb0_data,
254 &sun9i_a80_apb0_lock, reg);
214} 255}
215CLK_OF_DECLARE(sun9i_a80_apb0, "allwinner,sun9i-a80-apb0-clk", sun9i_a80_apb0_setup); 256CLK_OF_DECLARE(sun9i_a80_apb0, "allwinner,sun9i-a80-apb0-clk", sun9i_a80_apb0_setup);
216 257
@@ -266,6 +307,16 @@ static DEFINE_SPINLOCK(sun9i_a80_apb1_lock);
266 307
267static void __init sun9i_a80_apb1_setup(struct device_node *node) 308static void __init sun9i_a80_apb1_setup(struct device_node *node)
268{ 309{
269 sunxi_factors_register(node, &sun9i_a80_apb1_data, &sun9i_a80_apb1_lock); 310 void __iomem *reg;
311
312 reg = of_io_request_and_map(node, 0, of_node_full_name(node));
313 if (!reg) {
314 pr_err("Could not get registers for a80-apb1-clk: %s\n",
315 node->name);
316 return;
317 }
318
319 sunxi_factors_register(node, &sun9i_a80_apb1_data,
320 &sun9i_a80_apb1_lock, reg);
270} 321}
271CLK_OF_DECLARE(sun9i_a80_apb1, "allwinner,sun9i-a80-apb1-clk", sun9i_a80_apb1_setup); 322CLK_OF_DECLARE(sun9i_a80_apb1, "allwinner,sun9i-a80-apb1-clk", sun9i_a80_apb1_setup);
diff --git a/drivers/clk/sunxi/clk-sun9i-mmc.c b/drivers/clk/sunxi/clk-sun9i-mmc.c
new file mode 100644
index 000000000000..710c273648d7
--- /dev/null
+++ b/drivers/clk/sunxi/clk-sun9i-mmc.c
@@ -0,0 +1,219 @@
1/*
2 * Copyright 2015 Chen-Yu Tsai
3 *
4 * Chen-Yu Tsai <wens@csie.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/clk-provider.h>
18#include <linux/clkdev.h>
19#include <linux/module.h>
20#include <linux/of.h>
21#include <linux/of_device.h>
22#include <linux/reset.h>
23#include <linux/platform_device.h>
24#include <linux/reset-controller.h>
25#include <linux/spinlock.h>
26
27#define SUN9I_MMC_WIDTH 4
28
29#define SUN9I_MMC_GATE_BIT 16
30#define SUN9I_MMC_RESET_BIT 18
31
32struct sun9i_mmc_clk_data {
33 spinlock_t lock;
34 void __iomem *membase;
35 struct clk *clk;
36 struct reset_control *reset;
37 struct clk_onecell_data clk_data;
38 struct reset_controller_dev rcdev;
39};
40
41static int sun9i_mmc_reset_assert(struct reset_controller_dev *rcdev,
42 unsigned long id)
43{
44 struct sun9i_mmc_clk_data *data = container_of(rcdev,
45 struct sun9i_mmc_clk_data,
46 rcdev);
47 unsigned long flags;
48 void __iomem *reg = data->membase + SUN9I_MMC_WIDTH * id;
49 u32 val;
50
51 clk_prepare_enable(data->clk);
52 spin_lock_irqsave(&data->lock, flags);
53
54 val = readl(reg);
55 writel(val & ~BIT(SUN9I_MMC_RESET_BIT), reg);
56
57 spin_unlock_irqrestore(&data->lock, flags);
58 clk_disable_unprepare(data->clk);
59
60 return 0;
61}
62
63static int sun9i_mmc_reset_deassert(struct reset_controller_dev *rcdev,
64 unsigned long id)
65{
66 struct sun9i_mmc_clk_data *data = container_of(rcdev,
67 struct sun9i_mmc_clk_data,
68 rcdev);
69 unsigned long flags;
70 void __iomem *reg = data->membase + SUN9I_MMC_WIDTH * id;
71 u32 val;
72
73 clk_prepare_enable(data->clk);
74 spin_lock_irqsave(&data->lock, flags);
75
76 val = readl(reg);
77 writel(val | BIT(SUN9I_MMC_RESET_BIT), reg);
78
79 spin_unlock_irqrestore(&data->lock, flags);
80 clk_disable_unprepare(data->clk);
81
82 return 0;
83}
84
85static struct reset_control_ops sun9i_mmc_reset_ops = {
86 .assert = sun9i_mmc_reset_assert,
87 .deassert = sun9i_mmc_reset_deassert,
88};
89
90static int sun9i_a80_mmc_config_clk_probe(struct platform_device *pdev)
91{
92 struct device_node *np = pdev->dev.of_node;
93 struct sun9i_mmc_clk_data *data;
94 struct clk_onecell_data *clk_data;
95 const char *clk_name = np->name;
96 const char *clk_parent;
97 struct resource *r;
98 int count, i, ret;
99
100 data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);
101 if (!data)
102 return -ENOMEM;
103
104 spin_lock_init(&data->lock);
105
106 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
107 /* one clock/reset pair per word */
108 count = DIV_ROUND_UP((r->end - r->start + 1), SUN9I_MMC_WIDTH);
109 data->membase = devm_ioremap_resource(&pdev->dev, r);
110 if (IS_ERR(data->membase))
111 return PTR_ERR(data->membase);
112
113 clk_data = &data->clk_data;
114 clk_data->clk_num = count;
115 clk_data->clks = devm_kcalloc(&pdev->dev, count, sizeof(struct clk *),
116 GFP_KERNEL);
117 if (!clk_data->clks)
118 return -ENOMEM;
119
120 data->clk = devm_clk_get(&pdev->dev, NULL);
121 if (IS_ERR(data->clk)) {
122 dev_err(&pdev->dev, "Could not get clock\n");
123 return PTR_ERR(data->clk);
124 }
125
126 data->reset = devm_reset_control_get(&pdev->dev, NULL);
127 if (IS_ERR(data->reset)) {
128 dev_err(&pdev->dev, "Could not get reset control\n");
129 return PTR_ERR(data->reset);
130 }
131
132 ret = reset_control_deassert(data->reset);
133 if (ret) {
134 dev_err(&pdev->dev, "Reset deassert err %d\n", ret);
135 return ret;
136 }
137
138 clk_parent = __clk_get_name(data->clk);
139 for (i = 0; i < count; i++) {
140 of_property_read_string_index(np, "clock-output-names",
141 i, &clk_name);
142
143 clk_data->clks[i] = clk_register_gate(&pdev->dev, clk_name,
144 clk_parent, 0,
145 data->membase + SUN9I_MMC_WIDTH * i,
146 SUN9I_MMC_GATE_BIT, 0,
147 &data->lock);
148
149 if (IS_ERR(clk_data->clks[i])) {
150 ret = PTR_ERR(clk_data->clks[i]);
151 goto err_clk_register;
152 }
153 }
154
155 ret = of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
156 if (ret)
157 goto err_clk_provider;
158
159 data->rcdev.owner = THIS_MODULE;
160 data->rcdev.nr_resets = count;
161 data->rcdev.ops = &sun9i_mmc_reset_ops;
162 data->rcdev.of_node = pdev->dev.of_node;
163
164 ret = reset_controller_register(&data->rcdev);
165 if (ret)
166 goto err_rc_reg;
167
168 platform_set_drvdata(pdev, data);
169
170 return 0;
171
172err_rc_reg:
173 of_clk_del_provider(np);
174
175err_clk_provider:
176 for (i = 0; i < count; i++)
177 clk_unregister(clk_data->clks[i]);
178
179err_clk_register:
180 reset_control_assert(data->reset);
181
182 return ret;
183}
184
185static int sun9i_a80_mmc_config_clk_remove(struct platform_device *pdev)
186{
187 struct device_node *np = pdev->dev.of_node;
188 struct sun9i_mmc_clk_data *data = platform_get_drvdata(pdev);
189 struct clk_onecell_data *clk_data = &data->clk_data;
190 int i;
191
192 reset_controller_unregister(&data->rcdev);
193 of_clk_del_provider(np);
194 for (i = 0; i < clk_data->clk_num; i++)
195 clk_unregister(clk_data->clks[i]);
196
197 reset_control_assert(data->reset);
198
199 return 0;
200}
201
202static const struct of_device_id sun9i_a80_mmc_config_clk_dt_ids[] = {
203 { .compatible = "allwinner,sun9i-a80-mmc-config-clk" },
204 { /* sentinel */ }
205};
206
207static struct platform_driver sun9i_a80_mmc_config_clk_driver = {
208 .driver = {
209 .name = "sun9i-a80-mmc-config-clk",
210 .of_match_table = sun9i_a80_mmc_config_clk_dt_ids,
211 },
212 .probe = sun9i_a80_mmc_config_clk_probe,
213 .remove = sun9i_a80_mmc_config_clk_remove,
214};
215module_platform_driver(sun9i_a80_mmc_config_clk_driver);
216
217MODULE_AUTHOR("Chen-Yu Tsai <wens@csie.org>");
218MODULE_DESCRIPTION("Allwinner A80 MMC clock/reset Driver");
219MODULE_LICENSE("GPL v2");
diff --git a/drivers/clk/sunxi/clk-sunxi.c b/drivers/clk/sunxi/clk-sunxi.c
index 1818f404538d..379324eb5486 100644
--- a/drivers/clk/sunxi/clk-sunxi.c
+++ b/drivers/clk/sunxi/clk-sunxi.c
@@ -20,11 +20,221 @@
20#include <linux/of_address.h> 20#include <linux/of_address.h>
21#include <linux/reset-controller.h> 21#include <linux/reset-controller.h>
22#include <linux/spinlock.h> 22#include <linux/spinlock.h>
23#include <linux/log2.h>
23 24
24#include "clk-factors.h" 25#include "clk-factors.h"
25 26
26static DEFINE_SPINLOCK(clk_lock); 27static DEFINE_SPINLOCK(clk_lock);
27 28
29/**
30 * sun6i_a31_ahb1_clk_setup() - Setup function for a31 ahb1 composite clk
31 */
32
33#define SUN6I_AHB1_MAX_PARENTS 4
34#define SUN6I_AHB1_MUX_PARENT_PLL6 3
35#define SUN6I_AHB1_MUX_SHIFT 12
36/* un-shifted mask is what mux_clk expects */
37#define SUN6I_AHB1_MUX_MASK 0x3
38#define SUN6I_AHB1_MUX_GET_PARENT(reg) ((reg >> SUN6I_AHB1_MUX_SHIFT) & \
39 SUN6I_AHB1_MUX_MASK)
40
41#define SUN6I_AHB1_DIV_SHIFT 4
42#define SUN6I_AHB1_DIV_MASK (0x3 << SUN6I_AHB1_DIV_SHIFT)
43#define SUN6I_AHB1_DIV_GET(reg) ((reg & SUN6I_AHB1_DIV_MASK) >> \
44 SUN6I_AHB1_DIV_SHIFT)
45#define SUN6I_AHB1_DIV_SET(reg, div) ((reg & ~SUN6I_AHB1_DIV_MASK) | \
46 (div << SUN6I_AHB1_DIV_SHIFT))
47#define SUN6I_AHB1_PLL6_DIV_SHIFT 6
48#define SUN6I_AHB1_PLL6_DIV_MASK (0x3 << SUN6I_AHB1_PLL6_DIV_SHIFT)
49#define SUN6I_AHB1_PLL6_DIV_GET(reg) ((reg & SUN6I_AHB1_PLL6_DIV_MASK) >> \
50 SUN6I_AHB1_PLL6_DIV_SHIFT)
51#define SUN6I_AHB1_PLL6_DIV_SET(reg, div) ((reg & ~SUN6I_AHB1_PLL6_DIV_MASK) | \
52 (div << SUN6I_AHB1_PLL6_DIV_SHIFT))
53
54struct sun6i_ahb1_clk {
55 struct clk_hw hw;
56 void __iomem *reg;
57};
58
59#define to_sun6i_ahb1_clk(_hw) container_of(_hw, struct sun6i_ahb1_clk, hw)
60
61static unsigned long sun6i_ahb1_clk_recalc_rate(struct clk_hw *hw,
62 unsigned long parent_rate)
63{
64 struct sun6i_ahb1_clk *ahb1 = to_sun6i_ahb1_clk(hw);
65 unsigned long rate;
66 u32 reg;
67
68 /* Fetch the register value */
69 reg = readl(ahb1->reg);
70
71 /* apply pre-divider first if parent is pll6 */
72 if (SUN6I_AHB1_MUX_GET_PARENT(reg) == SUN6I_AHB1_MUX_PARENT_PLL6)
73 parent_rate /= SUN6I_AHB1_PLL6_DIV_GET(reg) + 1;
74
75 /* clk divider */
76 rate = parent_rate >> SUN6I_AHB1_DIV_GET(reg);
77
78 return rate;
79}
80
81static long sun6i_ahb1_clk_round(unsigned long rate, u8 *divp, u8 *pre_divp,
82 u8 parent, unsigned long parent_rate)
83{
84 u8 div, calcp, calcm = 1;
85
86 /*
87 * clock can only divide, so we will never be able to achieve
88 * frequencies higher than the parent frequency
89 */
90 if (parent_rate && rate > parent_rate)
91 rate = parent_rate;
92
93 div = DIV_ROUND_UP(parent_rate, rate);
94
95 /* calculate pre-divider if parent is pll6 */
96 if (parent == SUN6I_AHB1_MUX_PARENT_PLL6) {
97 if (div < 4)
98 calcp = 0;
99 else if (div / 2 < 4)
100 calcp = 1;
101 else if (div / 4 < 4)
102 calcp = 2;
103 else
104 calcp = 3;
105
106 calcm = DIV_ROUND_UP(div, 1 << calcp);
107 } else {
108 calcp = __roundup_pow_of_two(div);
109 calcp = calcp > 3 ? 3 : calcp;
110 }
111
112 /* we were asked to pass back divider values */
113 if (divp) {
114 *divp = calcp;
115 *pre_divp = calcm - 1;
116 }
117
118 return (parent_rate / calcm) >> calcp;
119}
120
121static long sun6i_ahb1_clk_determine_rate(struct clk_hw *hw, unsigned long rate,
122 unsigned long min_rate,
123 unsigned long max_rate,
124 unsigned long *best_parent_rate,
125 struct clk_hw **best_parent_clk)
126{
127 struct clk *clk = hw->clk, *parent, *best_parent = NULL;
128 int i, num_parents;
129 unsigned long parent_rate, best = 0, child_rate, best_child_rate = 0;
130
131 /* find the parent that can help provide the fastest rate <= rate */
132 num_parents = __clk_get_num_parents(clk);
133 for (i = 0; i < num_parents; i++) {
134 parent = clk_get_parent_by_index(clk, i);
135 if (!parent)
136 continue;
137 if (__clk_get_flags(clk) & CLK_SET_RATE_PARENT)
138 parent_rate = __clk_round_rate(parent, rate);
139 else
140 parent_rate = __clk_get_rate(parent);
141
142 child_rate = sun6i_ahb1_clk_round(rate, NULL, NULL, i,
143 parent_rate);
144
145 if (child_rate <= rate && child_rate > best_child_rate) {
146 best_parent = parent;
147 best = parent_rate;
148 best_child_rate = child_rate;
149 }
150 }
151
152 if (best_parent)
153 *best_parent_clk = __clk_get_hw(best_parent);
154 *best_parent_rate = best;
155
156 return best_child_rate;
157}
158
159static int sun6i_ahb1_clk_set_rate(struct clk_hw *hw, unsigned long rate,
160 unsigned long parent_rate)
161{
162 struct sun6i_ahb1_clk *ahb1 = to_sun6i_ahb1_clk(hw);
163 unsigned long flags;
164 u8 div, pre_div, parent;
165 u32 reg;
166
167 spin_lock_irqsave(&clk_lock, flags);
168
169 reg = readl(ahb1->reg);
170
171 /* need to know which parent is used to apply pre-divider */
172 parent = SUN6I_AHB1_MUX_GET_PARENT(reg);
173 sun6i_ahb1_clk_round(rate, &div, &pre_div, parent, parent_rate);
174
175 reg = SUN6I_AHB1_DIV_SET(reg, div);
176 reg = SUN6I_AHB1_PLL6_DIV_SET(reg, pre_div);
177 writel(reg, ahb1->reg);
178
179 spin_unlock_irqrestore(&clk_lock, flags);
180
181 return 0;
182}
183
184static const struct clk_ops sun6i_ahb1_clk_ops = {
185 .determine_rate = sun6i_ahb1_clk_determine_rate,
186 .recalc_rate = sun6i_ahb1_clk_recalc_rate,
187 .set_rate = sun6i_ahb1_clk_set_rate,
188};
189
190static void __init sun6i_ahb1_clk_setup(struct device_node *node)
191{
192 struct clk *clk;
193 struct sun6i_ahb1_clk *ahb1;
194 struct clk_mux *mux;
195 const char *clk_name = node->name;
196 const char *parents[SUN6I_AHB1_MAX_PARENTS];
197 void __iomem *reg;
198 int i = 0;
199
200 reg = of_io_request_and_map(node, 0, of_node_full_name(node));
201
202 /* we have a mux, we will have >1 parents */
203 while (i < SUN6I_AHB1_MAX_PARENTS &&
204 (parents[i] = of_clk_get_parent_name(node, i)) != NULL)
205 i++;
206
207 of_property_read_string(node, "clock-output-names", &clk_name);
208
209 ahb1 = kzalloc(sizeof(struct sun6i_ahb1_clk), GFP_KERNEL);
210 if (!ahb1)
211 return;
212
213 mux = kzalloc(sizeof(struct clk_mux), GFP_KERNEL);
214 if (!mux) {
215 kfree(ahb1);
216 return;
217 }
218
219 /* set up clock properties */
220 mux->reg = reg;
221 mux->shift = SUN6I_AHB1_MUX_SHIFT;
222 mux->mask = SUN6I_AHB1_MUX_MASK;
223 mux->lock = &clk_lock;
224 ahb1->reg = reg;
225
226 clk = clk_register_composite(NULL, clk_name, parents, i,
227 &mux->hw, &clk_mux_ops,
228 &ahb1->hw, &sun6i_ahb1_clk_ops,
229 NULL, NULL, 0);
230
231 if (!IS_ERR(clk)) {
232 of_clk_add_provider(node, of_clk_src_simple_get, clk);
233 clk_register_clkdev(clk, clk_name, NULL);
234 }
235}
236CLK_OF_DECLARE(sun6i_a31_ahb1, "allwinner,sun6i-a31-ahb1-clk", sun6i_ahb1_clk_setup);
237
28/* Maximum number of parents our clocks have */ 238/* Maximum number of parents our clocks have */
29#define SUNXI_MAX_PARENTS 5 239#define SUNXI_MAX_PARENTS 5
30 240
@@ -355,43 +565,6 @@ static void sun7i_a20_get_out_factors(u32 *freq, u32 parent_rate,
355} 565}
356 566
357/** 567/**
358 * clk_sunxi_mmc_phase_control() - configures MMC clock phase control
359 */
360
361void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output)
362{
363 #define to_clk_composite(_hw) container_of(_hw, struct clk_composite, hw)
364 #define to_clk_factors(_hw) container_of(_hw, struct clk_factors, hw)
365
366 struct clk_hw *hw = __clk_get_hw(clk);
367 struct clk_composite *composite = to_clk_composite(hw);
368 struct clk_hw *rate_hw = composite->rate_hw;
369 struct clk_factors *factors = to_clk_factors(rate_hw);
370 unsigned long flags = 0;
371 u32 reg;
372
373 if (factors->lock)
374 spin_lock_irqsave(factors->lock, flags);
375
376 reg = readl(factors->reg);
377
378 /* set sample clock phase control */
379 reg &= ~(0x7 << 20);
380 reg |= ((sample & 0x7) << 20);
381
382 /* set output clock phase control */
383 reg &= ~(0x7 << 8);
384 reg |= ((output & 0x7) << 8);
385
386 writel(reg, factors->reg);
387
388 if (factors->lock)
389 spin_unlock_irqrestore(factors->lock, flags);
390}
391EXPORT_SYMBOL(clk_sunxi_mmc_phase_control);
392
393
394/**
395 * sunxi_factors_clk_setup() - Setup function for factor clocks 568 * sunxi_factors_clk_setup() - Setup function for factor clocks
396 */ 569 */
397 570
@@ -413,6 +586,7 @@ static struct clk_factors_config sun6i_a31_pll1_config = {
413 .kwidth = 2, 586 .kwidth = 2,
414 .mshift = 0, 587 .mshift = 0,
415 .mwidth = 2, 588 .mwidth = 2,
589 .n_start = 1,
416}; 590};
417 591
418static struct clk_factors_config sun8i_a23_pll1_config = { 592static struct clk_factors_config sun8i_a23_pll1_config = {
@@ -520,7 +694,16 @@ static const struct factors_data sun7i_a20_out_data __initconst = {
520static struct clk * __init sunxi_factors_clk_setup(struct device_node *node, 694static struct clk * __init sunxi_factors_clk_setup(struct device_node *node,
521 const struct factors_data *data) 695 const struct factors_data *data)
522{ 696{
523 return sunxi_factors_register(node, data, &clk_lock); 697 void __iomem *reg;
698
699 reg = of_iomap(node, 0);
700 if (!reg) {
701 pr_err("Could not get registers for factors-clk: %s\n",
702 node->name);
703 return NULL;
704 }
705
706 return sunxi_factors_register(node, data, &clk_lock, reg);
524} 707}
525 708
526 709
@@ -561,7 +744,7 @@ static void __init sunxi_mux_clk_setup(struct device_node *node,
561 of_property_read_string(node, "clock-output-names", &clk_name); 744 of_property_read_string(node, "clock-output-names", &clk_name);
562 745
563 clk = clk_register_mux(NULL, clk_name, parents, i, 746 clk = clk_register_mux(NULL, clk_name, parents, i,
564 CLK_SET_RATE_NO_REPARENT, reg, 747 CLK_SET_RATE_PARENT, reg,
565 data->shift, SUNXI_MUX_GATE_WIDTH, 748 data->shift, SUNXI_MUX_GATE_WIDTH,
566 0, &clk_lock); 749 0, &clk_lock);
567 750
@@ -1217,7 +1400,6 @@ CLK_OF_DECLARE(sun7i_a20_clk_init, "allwinner,sun7i-a20", sun5i_init_clocks);
1217 1400
1218static const char *sun6i_critical_clocks[] __initdata = { 1401static const char *sun6i_critical_clocks[] __initdata = {
1219 "cpu", 1402 "cpu",
1220 "ahb1_sdram",
1221}; 1403};
1222 1404
1223static void __init sun6i_init_clocks(struct device_node *node) 1405static void __init sun6i_init_clocks(struct device_node *node)
diff --git a/drivers/clk/tegra/Makefile b/drivers/clk/tegra/Makefile
index f7dfb72884a4..edb8358fa6ce 100644
--- a/drivers/clk/tegra/Makefile
+++ b/drivers/clk/tegra/Makefile
@@ -15,3 +15,4 @@ obj-$(CONFIG_ARCH_TEGRA_2x_SOC) += clk-tegra20.o
15obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += clk-tegra30.o 15obj-$(CONFIG_ARCH_TEGRA_3x_SOC) += clk-tegra30.o
16obj-$(CONFIG_ARCH_TEGRA_114_SOC) += clk-tegra114.o 16obj-$(CONFIG_ARCH_TEGRA_114_SOC) += clk-tegra114.o
17obj-$(CONFIG_ARCH_TEGRA_124_SOC) += clk-tegra124.o 17obj-$(CONFIG_ARCH_TEGRA_124_SOC) += clk-tegra124.o
18obj-$(CONFIG_ARCH_TEGRA_132_SOC) += clk-tegra124.o
diff --git a/drivers/clk/tegra/clk-id.h b/drivers/clk/tegra/clk-id.h
index 0011d547a9f7..60738cc954cb 100644
--- a/drivers/clk/tegra/clk-id.h
+++ b/drivers/clk/tegra/clk-id.h
@@ -64,10 +64,8 @@ enum clk_id {
64 tegra_clk_disp2, 64 tegra_clk_disp2,
65 tegra_clk_dp2, 65 tegra_clk_dp2,
66 tegra_clk_dpaux, 66 tegra_clk_dpaux,
67 tegra_clk_dsia,
68 tegra_clk_dsialp, 67 tegra_clk_dsialp,
69 tegra_clk_dsia_mux, 68 tegra_clk_dsia_mux,
70 tegra_clk_dsib,
71 tegra_clk_dsiblp, 69 tegra_clk_dsiblp,
72 tegra_clk_dsib_mux, 70 tegra_clk_dsib_mux,
73 tegra_clk_dtv, 71 tegra_clk_dtv,
diff --git a/drivers/clk/tegra/clk-periph.c b/drivers/clk/tegra/clk-periph.c
index 9e899c18af86..d84ae49d0e05 100644
--- a/drivers/clk/tegra/clk-periph.c
+++ b/drivers/clk/tegra/clk-periph.c
@@ -28,7 +28,7 @@ static u8 clk_periph_get_parent(struct clk_hw *hw)
28 const struct clk_ops *mux_ops = periph->mux_ops; 28 const struct clk_ops *mux_ops = periph->mux_ops;
29 struct clk_hw *mux_hw = &periph->mux.hw; 29 struct clk_hw *mux_hw = &periph->mux.hw;
30 30
31 mux_hw->clk = hw->clk; 31 __clk_hw_set_clk(mux_hw, hw);
32 32
33 return mux_ops->get_parent(mux_hw); 33 return mux_ops->get_parent(mux_hw);
34} 34}
@@ -39,7 +39,7 @@ static int clk_periph_set_parent(struct clk_hw *hw, u8 index)
39 const struct clk_ops *mux_ops = periph->mux_ops; 39 const struct clk_ops *mux_ops = periph->mux_ops;
40 struct clk_hw *mux_hw = &periph->mux.hw; 40 struct clk_hw *mux_hw = &periph->mux.hw;
41 41
42 mux_hw->clk = hw->clk; 42 __clk_hw_set_clk(mux_hw, hw);
43 43
44 return mux_ops->set_parent(mux_hw, index); 44 return mux_ops->set_parent(mux_hw, index);
45} 45}
@@ -51,7 +51,7 @@ static unsigned long clk_periph_recalc_rate(struct clk_hw *hw,
51 const struct clk_ops *div_ops = periph->div_ops; 51 const struct clk_ops *div_ops = periph->div_ops;
52 struct clk_hw *div_hw = &periph->divider.hw; 52 struct clk_hw *div_hw = &periph->divider.hw;
53 53
54 div_hw->clk = hw->clk; 54 __clk_hw_set_clk(div_hw, hw);
55 55
56 return div_ops->recalc_rate(div_hw, parent_rate); 56 return div_ops->recalc_rate(div_hw, parent_rate);
57} 57}
@@ -63,7 +63,7 @@ static long clk_periph_round_rate(struct clk_hw *hw, unsigned long rate,
63 const struct clk_ops *div_ops = periph->div_ops; 63 const struct clk_ops *div_ops = periph->div_ops;
64 struct clk_hw *div_hw = &periph->divider.hw; 64 struct clk_hw *div_hw = &periph->divider.hw;
65 65
66 div_hw->clk = hw->clk; 66 __clk_hw_set_clk(div_hw, hw);
67 67
68 return div_ops->round_rate(div_hw, rate, prate); 68 return div_ops->round_rate(div_hw, rate, prate);
69} 69}
@@ -75,7 +75,7 @@ static int clk_periph_set_rate(struct clk_hw *hw, unsigned long rate,
75 const struct clk_ops *div_ops = periph->div_ops; 75 const struct clk_ops *div_ops = periph->div_ops;
76 struct clk_hw *div_hw = &periph->divider.hw; 76 struct clk_hw *div_hw = &periph->divider.hw;
77 77
78 div_hw->clk = hw->clk; 78 __clk_hw_set_clk(div_hw, hw);
79 79
80 return div_ops->set_rate(div_hw, rate, parent_rate); 80 return div_ops->set_rate(div_hw, rate, parent_rate);
81} 81}
@@ -86,7 +86,7 @@ static int clk_periph_is_enabled(struct clk_hw *hw)
86 const struct clk_ops *gate_ops = periph->gate_ops; 86 const struct clk_ops *gate_ops = periph->gate_ops;
87 struct clk_hw *gate_hw = &periph->gate.hw; 87 struct clk_hw *gate_hw = &periph->gate.hw;
88 88
89 gate_hw->clk = hw->clk; 89 __clk_hw_set_clk(gate_hw, hw);
90 90
91 return gate_ops->is_enabled(gate_hw); 91 return gate_ops->is_enabled(gate_hw);
92} 92}
@@ -97,7 +97,7 @@ static int clk_periph_enable(struct clk_hw *hw)
97 const struct clk_ops *gate_ops = periph->gate_ops; 97 const struct clk_ops *gate_ops = periph->gate_ops;
98 struct clk_hw *gate_hw = &periph->gate.hw; 98 struct clk_hw *gate_hw = &periph->gate.hw;
99 99
100 gate_hw->clk = hw->clk; 100 __clk_hw_set_clk(gate_hw, hw);
101 101
102 return gate_ops->enable(gate_hw); 102 return gate_ops->enable(gate_hw);
103} 103}
diff --git a/drivers/clk/tegra/clk-pll.c b/drivers/clk/tegra/clk-pll.c
index c7c6d8fb32fb..bfef9abdf232 100644
--- a/drivers/clk/tegra/clk-pll.c
+++ b/drivers/clk/tegra/clk-pll.c
@@ -816,7 +816,9 @@ const struct clk_ops tegra_clk_plle_ops = {
816 .enable = clk_plle_enable, 816 .enable = clk_plle_enable,
817}; 817};
818 818
819#if defined(CONFIG_ARCH_TEGRA_114_SOC) || defined(CONFIG_ARCH_TEGRA_124_SOC) 819#if defined(CONFIG_ARCH_TEGRA_114_SOC) || \
820 defined(CONFIG_ARCH_TEGRA_124_SOC) || \
821 defined(CONFIG_ARCH_TEGRA_132_SOC)
820 822
821static int _pll_fixed_mdiv(struct tegra_clk_pll_params *pll_params, 823static int _pll_fixed_mdiv(struct tegra_clk_pll_params *pll_params,
822 unsigned long parent_rate) 824 unsigned long parent_rate)
@@ -1505,7 +1507,9 @@ struct clk *tegra_clk_register_plle(const char *name, const char *parent_name,
1505 return clk; 1507 return clk;
1506} 1508}
1507 1509
1508#if defined(CONFIG_ARCH_TEGRA_114_SOC) || defined(CONFIG_ARCH_TEGRA_124_SOC) 1510#if defined(CONFIG_ARCH_TEGRA_114_SOC) || \
1511 defined(CONFIG_ARCH_TEGRA_124_SOC) || \
1512 defined(CONFIG_ARCH_TEGRA_132_SOC)
1509static const struct clk_ops tegra_clk_pllxc_ops = { 1513static const struct clk_ops tegra_clk_pllxc_ops = {
1510 .is_enabled = clk_pll_is_enabled, 1514 .is_enabled = clk_pll_is_enabled,
1511 .enable = clk_pll_iddq_enable, 1515 .enable = clk_pll_iddq_enable,
@@ -1565,7 +1569,7 @@ struct clk *tegra_clk_register_pllxc(const char *name, const char *parent_name,
1565 parent = __clk_lookup(parent_name); 1569 parent = __clk_lookup(parent_name);
1566 if (!parent) { 1570 if (!parent) {
1567 WARN(1, "parent clk %s of %s must be registered first\n", 1571 WARN(1, "parent clk %s of %s must be registered first\n",
1568 name, parent_name); 1572 parent_name, name);
1569 return ERR_PTR(-EINVAL); 1573 return ERR_PTR(-EINVAL);
1570 } 1574 }
1571 1575
@@ -1665,7 +1669,7 @@ struct clk *tegra_clk_register_pllm(const char *name, const char *parent_name,
1665 parent = __clk_lookup(parent_name); 1669 parent = __clk_lookup(parent_name);
1666 if (!parent) { 1670 if (!parent) {
1667 WARN(1, "parent clk %s of %s must be registered first\n", 1671 WARN(1, "parent clk %s of %s must be registered first\n",
1668 name, parent_name); 1672 parent_name, name);
1669 return ERR_PTR(-EINVAL); 1673 return ERR_PTR(-EINVAL);
1670 } 1674 }
1671 1675
@@ -1706,7 +1710,7 @@ struct clk *tegra_clk_register_pllc(const char *name, const char *parent_name,
1706 parent = __clk_lookup(parent_name); 1710 parent = __clk_lookup(parent_name);
1707 if (!parent) { 1711 if (!parent) {
1708 WARN(1, "parent clk %s of %s must be registered first\n", 1712 WARN(1, "parent clk %s of %s must be registered first\n",
1709 name, parent_name); 1713 parent_name, name);
1710 return ERR_PTR(-EINVAL); 1714 return ERR_PTR(-EINVAL);
1711 } 1715 }
1712 1716
@@ -1802,7 +1806,7 @@ struct clk *tegra_clk_register_plle_tegra114(const char *name,
1802} 1806}
1803#endif 1807#endif
1804 1808
1805#ifdef CONFIG_ARCH_TEGRA_124_SOC 1809#if defined(CONFIG_ARCH_TEGRA_124_SOC) || defined(CONFIG_ARCH_TEGRA_132_SOC)
1806static const struct clk_ops tegra_clk_pllss_ops = { 1810static const struct clk_ops tegra_clk_pllss_ops = {
1807 .is_enabled = clk_pll_is_enabled, 1811 .is_enabled = clk_pll_is_enabled,
1808 .enable = clk_pll_iddq_enable, 1812 .enable = clk_pll_iddq_enable,
@@ -1830,7 +1834,7 @@ struct clk *tegra_clk_register_pllss(const char *name, const char *parent_name,
1830 parent = __clk_lookup(parent_name); 1834 parent = __clk_lookup(parent_name);
1831 if (!parent) { 1835 if (!parent) {
1832 WARN(1, "parent clk %s of %s must be registered first\n", 1836 WARN(1, "parent clk %s of %s must be registered first\n",
1833 name, parent_name); 1837 parent_name, name);
1834 return ERR_PTR(-EINVAL); 1838 return ERR_PTR(-EINVAL);
1835 } 1839 }
1836 1840
diff --git a/drivers/clk/tegra/clk-tegra-periph.c b/drivers/clk/tegra/clk-tegra-periph.c
index 37f32c49674e..cef0727b9eec 100644
--- a/drivers/clk/tegra/clk-tegra-periph.c
+++ b/drivers/clk/tegra/clk-tegra-periph.c
@@ -434,10 +434,10 @@ static struct tegra_periph_init_data periph_clks[] = {
434 MUX("hda", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_HDA, 125, TEGRA_PERIPH_ON_APB, tegra_clk_hda), 434 MUX("hda", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_HDA, 125, TEGRA_PERIPH_ON_APB, tegra_clk_hda),
435 MUX("hda2codec_2x", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_HDA2CODEC_2X, 111, TEGRA_PERIPH_ON_APB, tegra_clk_hda2codec_2x), 435 MUX("hda2codec_2x", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_HDA2CODEC_2X, 111, TEGRA_PERIPH_ON_APB, tegra_clk_hda2codec_2x),
436 MUX("vfir", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_VFIR, 7, TEGRA_PERIPH_ON_APB, tegra_clk_vfir), 436 MUX("vfir", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_VFIR, 7, TEGRA_PERIPH_ON_APB, tegra_clk_vfir),
437 MUX("sdmmc1", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC1, 14, 0, tegra_clk_sdmmc1), 437 MUX("sdmmc1", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC1, 14, TEGRA_PERIPH_ON_APB, tegra_clk_sdmmc1),
438 MUX("sdmmc2", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC2, 9, 0, tegra_clk_sdmmc2), 438 MUX("sdmmc2", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC2, 9, TEGRA_PERIPH_ON_APB, tegra_clk_sdmmc2),
439 MUX("sdmmc3", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC3, 69, 0, tegra_clk_sdmmc3), 439 MUX("sdmmc3", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC3, 69, TEGRA_PERIPH_ON_APB, tegra_clk_sdmmc3),
440 MUX("sdmmc4", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC4, 15, 0, tegra_clk_sdmmc4), 440 MUX("sdmmc4", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_SDMMC4, 15, TEGRA_PERIPH_ON_APB, tegra_clk_sdmmc4),
441 MUX("la", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_LA, 76, TEGRA_PERIPH_ON_APB, tegra_clk_la), 441 MUX("la", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_LA, 76, TEGRA_PERIPH_ON_APB, tegra_clk_la),
442 MUX("trace", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_TRACE, 77, TEGRA_PERIPH_ON_APB, tegra_clk_trace), 442 MUX("trace", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_TRACE, 77, TEGRA_PERIPH_ON_APB, tegra_clk_trace),
443 MUX("owr", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_OWR, 71, TEGRA_PERIPH_ON_APB, tegra_clk_owr), 443 MUX("owr", mux_pllp_pllc_pllm_clkm, CLK_SOURCE_OWR, 71, TEGRA_PERIPH_ON_APB, tegra_clk_owr),
@@ -470,10 +470,10 @@ static struct tegra_periph_init_data periph_clks[] = {
470 MUX("adx1", mux_plla_pllc_pllp_clkm, CLK_SOURCE_ADX1, 180, TEGRA_PERIPH_ON_APB, tegra_clk_adx1), 470 MUX("adx1", mux_plla_pllc_pllp_clkm, CLK_SOURCE_ADX1, 180, TEGRA_PERIPH_ON_APB, tegra_clk_adx1),
471 MUX("amx1", mux_plla_pllc_pllp_clkm, CLK_SOURCE_AMX1, 185, TEGRA_PERIPH_ON_APB, tegra_clk_amx1), 471 MUX("amx1", mux_plla_pllc_pllp_clkm, CLK_SOURCE_AMX1, 185, TEGRA_PERIPH_ON_APB, tegra_clk_amx1),
472 MUX("vi_sensor2", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_VI_SENSOR2, 165, TEGRA_PERIPH_NO_RESET, tegra_clk_vi_sensor2), 472 MUX("vi_sensor2", mux_pllm_pllc2_c_c3_pllp_plla, CLK_SOURCE_VI_SENSOR2, 165, TEGRA_PERIPH_NO_RESET, tegra_clk_vi_sensor2),
473 MUX8("sdmmc1", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SDMMC1, 14, 0, tegra_clk_sdmmc1_8), 473 MUX8("sdmmc1", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SDMMC1, 14, TEGRA_PERIPH_ON_APB, tegra_clk_sdmmc1_8),
474 MUX8("sdmmc2", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SDMMC2, 9, 0, tegra_clk_sdmmc2_8), 474 MUX8("sdmmc2", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SDMMC2, 9, TEGRA_PERIPH_ON_APB, tegra_clk_sdmmc2_8),
475 MUX8("sdmmc3", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SDMMC3, 69, 0, tegra_clk_sdmmc3_8), 475 MUX8("sdmmc3", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SDMMC3, 69, TEGRA_PERIPH_ON_APB, tegra_clk_sdmmc3_8),
476 MUX8("sdmmc4", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SDMMC4, 15, 0, tegra_clk_sdmmc4_8), 476 MUX8("sdmmc4", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SDMMC4, 15, TEGRA_PERIPH_ON_APB, tegra_clk_sdmmc4_8),
477 MUX8("sbc1", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC1, 41, TEGRA_PERIPH_ON_APB, tegra_clk_sbc1_8), 477 MUX8("sbc1", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC1, 41, TEGRA_PERIPH_ON_APB, tegra_clk_sbc1_8),
478 MUX8("sbc2", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC2, 44, TEGRA_PERIPH_ON_APB, tegra_clk_sbc2_8), 478 MUX8("sbc2", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC2, 44, TEGRA_PERIPH_ON_APB, tegra_clk_sbc2_8),
479 MUX8("sbc3", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC3, 46, TEGRA_PERIPH_ON_APB, tegra_clk_sbc3_8), 479 MUX8("sbc3", mux_pllp_pllc2_c_c3_pllm_clkm, CLK_SOURCE_SBC3, 46, TEGRA_PERIPH_ON_APB, tegra_clk_sbc3_8),
@@ -537,8 +537,6 @@ static struct tegra_periph_init_data gate_clks[] = {
537 GATE("xusb_host", "xusb_host_src", 89, 0, tegra_clk_xusb_host, 0), 537 GATE("xusb_host", "xusb_host_src", 89, 0, tegra_clk_xusb_host, 0),
538 GATE("xusb_ss", "xusb_ss_src", 156, 0, tegra_clk_xusb_ss, 0), 538 GATE("xusb_ss", "xusb_ss_src", 156, 0, tegra_clk_xusb_ss, 0),
539 GATE("xusb_dev", "xusb_dev_src", 95, 0, tegra_clk_xusb_dev, 0), 539 GATE("xusb_dev", "xusb_dev_src", 95, 0, tegra_clk_xusb_dev, 0),
540 GATE("dsia", "dsia_mux", 48, 0, tegra_clk_dsia, 0),
541 GATE("dsib", "dsib_mux", 82, 0, tegra_clk_dsib, 0),
542 GATE("emc", "emc_mux", 57, 0, tegra_clk_emc, CLK_IGNORE_UNUSED), 540 GATE("emc", "emc_mux", 57, 0, tegra_clk_emc, CLK_IGNORE_UNUSED),
543 GATE("sata_cold", "clk_m", 129, TEGRA_PERIPH_ON_APB, tegra_clk_sata_cold, 0), 541 GATE("sata_cold", "clk_m", 129, TEGRA_PERIPH_ON_APB, tegra_clk_sata_cold, 0),
544 GATE("ispb", "clk_m", 3, 0, tegra_clk_ispb, 0), 542 GATE("ispb", "clk_m", 3, 0, tegra_clk_ispb, 0),
diff --git a/drivers/clk/tegra/clk-tegra114.c b/drivers/clk/tegra/clk-tegra114.c
index 0b03d2cf7264..d0766423a5d6 100644
--- a/drivers/clk/tegra/clk-tegra114.c
+++ b/drivers/clk/tegra/clk-tegra114.c
@@ -715,7 +715,6 @@ static struct tegra_clk tegra114_clks[tegra_clk_max] __initdata = {
715 [tegra_clk_sbc2_8] = { .dt_id = TEGRA114_CLK_SBC2, .present = true }, 715 [tegra_clk_sbc2_8] = { .dt_id = TEGRA114_CLK_SBC2, .present = true },
716 [tegra_clk_sbc3_8] = { .dt_id = TEGRA114_CLK_SBC3, .present = true }, 716 [tegra_clk_sbc3_8] = { .dt_id = TEGRA114_CLK_SBC3, .present = true },
717 [tegra_clk_i2c5] = { .dt_id = TEGRA114_CLK_I2C5, .present = true }, 717 [tegra_clk_i2c5] = { .dt_id = TEGRA114_CLK_I2C5, .present = true },
718 [tegra_clk_dsia] = { .dt_id = TEGRA114_CLK_DSIA, .present = true },
719 [tegra_clk_mipi] = { .dt_id = TEGRA114_CLK_MIPI, .present = true }, 718 [tegra_clk_mipi] = { .dt_id = TEGRA114_CLK_MIPI, .present = true },
720 [tegra_clk_hdmi] = { .dt_id = TEGRA114_CLK_HDMI, .present = true }, 719 [tegra_clk_hdmi] = { .dt_id = TEGRA114_CLK_HDMI, .present = true },
721 [tegra_clk_csi] = { .dt_id = TEGRA114_CLK_CSI, .present = true }, 720 [tegra_clk_csi] = { .dt_id = TEGRA114_CLK_CSI, .present = true },
@@ -739,7 +738,6 @@ static struct tegra_clk tegra114_clks[tegra_clk_max] __initdata = {
739 [tegra_clk_dtv] = { .dt_id = TEGRA114_CLK_DTV, .present = true }, 738 [tegra_clk_dtv] = { .dt_id = TEGRA114_CLK_DTV, .present = true },
740 [tegra_clk_ndspeed] = { .dt_id = TEGRA114_CLK_NDSPEED, .present = true }, 739 [tegra_clk_ndspeed] = { .dt_id = TEGRA114_CLK_NDSPEED, .present = true },
741 [tegra_clk_i2cslow] = { .dt_id = TEGRA114_CLK_I2CSLOW, .present = true }, 740 [tegra_clk_i2cslow] = { .dt_id = TEGRA114_CLK_I2CSLOW, .present = true },
742 [tegra_clk_dsib] = { .dt_id = TEGRA114_CLK_DSIB, .present = true },
743 [tegra_clk_tsec] = { .dt_id = TEGRA114_CLK_TSEC, .present = true }, 741 [tegra_clk_tsec] = { .dt_id = TEGRA114_CLK_TSEC, .present = true },
744 [tegra_clk_xusb_host] = { .dt_id = TEGRA114_CLK_XUSB_HOST, .present = true }, 742 [tegra_clk_xusb_host] = { .dt_id = TEGRA114_CLK_XUSB_HOST, .present = true },
745 [tegra_clk_msenc] = { .dt_id = TEGRA114_CLK_MSENC, .present = true }, 743 [tegra_clk_msenc] = { .dt_id = TEGRA114_CLK_MSENC, .present = true },
@@ -1224,6 +1222,14 @@ static __init void tegra114_periph_clk_init(void __iomem *clk_base,
1224 clk_base + PLLD2_BASE, 25, 1, 0, &pll_d2_lock); 1222 clk_base + PLLD2_BASE, 25, 1, 0, &pll_d2_lock);
1225 clks[TEGRA114_CLK_DSIB_MUX] = clk; 1223 clks[TEGRA114_CLK_DSIB_MUX] = clk;
1226 1224
1225 clk = tegra_clk_register_periph_gate("dsia", "dsia_mux", 0, clk_base,
1226 0, 48, periph_clk_enb_refcnt);
1227 clks[TEGRA114_CLK_DSIA] = clk;
1228
1229 clk = tegra_clk_register_periph_gate("dsib", "dsib_mux", 0, clk_base,
1230 0, 82, periph_clk_enb_refcnt);
1231 clks[TEGRA114_CLK_DSIB] = clk;
1232
1227 /* emc mux */ 1233 /* emc mux */
1228 clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm, 1234 clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm,
1229 ARRAY_SIZE(mux_pllmcp_clkm), 1235 ARRAY_SIZE(mux_pllmcp_clkm),
diff --git a/drivers/clk/tegra/clk-tegra124.c b/drivers/clk/tegra/clk-tegra124.c
index f5f9baca7bb6..9a893f2fe8e9 100644
--- a/drivers/clk/tegra/clk-tegra124.c
+++ b/drivers/clk/tegra/clk-tegra124.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (c) 2012, 2013, NVIDIA CORPORATION. All rights reserved. 2 * Copyright (c) 2012-2014 NVIDIA CORPORATION. All rights reserved.
3 * 3 *
4 * This program is free software; you can redistribute it and/or modify it 4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms and conditions of the GNU General Public License, 5 * under the terms and conditions of the GNU General Public License,
@@ -28,6 +28,14 @@
28#include "clk.h" 28#include "clk.h"
29#include "clk-id.h" 29#include "clk-id.h"
30 30
31/*
32 * TEGRA124_CAR_BANK_COUNT: the number of peripheral clock register
33 * banks present in the Tegra124/132 CAR IP block. The banks are
34 * identified by single letters, e.g.: L, H, U, V, W, X. See
35 * periph_regs[] in drivers/clk/tegra/clk.c
36 */
37#define TEGRA124_CAR_BANK_COUNT 6
38
31#define CLK_SOURCE_CSITE 0x1d4 39#define CLK_SOURCE_CSITE 0x1d4
32#define CLK_SOURCE_EMC 0x19c 40#define CLK_SOURCE_EMC 0x19c
33 41
@@ -128,7 +136,6 @@ static unsigned long osc_freq;
128static unsigned long pll_ref_freq; 136static unsigned long pll_ref_freq;
129 137
130static DEFINE_SPINLOCK(pll_d_lock); 138static DEFINE_SPINLOCK(pll_d_lock);
131static DEFINE_SPINLOCK(pll_d2_lock);
132static DEFINE_SPINLOCK(pll_e_lock); 139static DEFINE_SPINLOCK(pll_e_lock);
133static DEFINE_SPINLOCK(pll_re_lock); 140static DEFINE_SPINLOCK(pll_re_lock);
134static DEFINE_SPINLOCK(pll_u_lock); 141static DEFINE_SPINLOCK(pll_u_lock);
@@ -145,11 +152,6 @@ static unsigned long tegra124_input_freq[] = {
145 [12] = 260000000, 152 [12] = 260000000,
146}; 153};
147 154
148static const char *mux_plld_out0_plld2_out0[] = {
149 "pll_d_out0", "pll_d2_out0",
150};
151#define mux_plld_out0_plld2_out0_idx NULL
152
153static const char *mux_pllmcp_clkm[] = { 155static const char *mux_pllmcp_clkm[] = {
154 "pll_m", "pll_c", "pll_p", "clk_m", "pll_m_ud", "pll_c2", "pll_c3", 156 "pll_m", "pll_c", "pll_p", "clk_m", "pll_m_ud", "pll_c2", "pll_c3",
155}; 157};
@@ -783,7 +785,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
783 [tegra_clk_sbc2] = { .dt_id = TEGRA124_CLK_SBC2, .present = true }, 785 [tegra_clk_sbc2] = { .dt_id = TEGRA124_CLK_SBC2, .present = true },
784 [tegra_clk_sbc3] = { .dt_id = TEGRA124_CLK_SBC3, .present = true }, 786 [tegra_clk_sbc3] = { .dt_id = TEGRA124_CLK_SBC3, .present = true },
785 [tegra_clk_i2c5] = { .dt_id = TEGRA124_CLK_I2C5, .present = true }, 787 [tegra_clk_i2c5] = { .dt_id = TEGRA124_CLK_I2C5, .present = true },
786 [tegra_clk_dsia] = { .dt_id = TEGRA124_CLK_DSIA, .present = true },
787 [tegra_clk_mipi] = { .dt_id = TEGRA124_CLK_MIPI, .present = true }, 788 [tegra_clk_mipi] = { .dt_id = TEGRA124_CLK_MIPI, .present = true },
788 [tegra_clk_hdmi] = { .dt_id = TEGRA124_CLK_HDMI, .present = true }, 789 [tegra_clk_hdmi] = { .dt_id = TEGRA124_CLK_HDMI, .present = true },
789 [tegra_clk_csi] = { .dt_id = TEGRA124_CLK_CSI, .present = true }, 790 [tegra_clk_csi] = { .dt_id = TEGRA124_CLK_CSI, .present = true },
@@ -809,7 +810,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
809 [tegra_clk_soc_therm] = { .dt_id = TEGRA124_CLK_SOC_THERM, .present = true }, 810 [tegra_clk_soc_therm] = { .dt_id = TEGRA124_CLK_SOC_THERM, .present = true },
810 [tegra_clk_dtv] = { .dt_id = TEGRA124_CLK_DTV, .present = true }, 811 [tegra_clk_dtv] = { .dt_id = TEGRA124_CLK_DTV, .present = true },
811 [tegra_clk_i2cslow] = { .dt_id = TEGRA124_CLK_I2CSLOW, .present = true }, 812 [tegra_clk_i2cslow] = { .dt_id = TEGRA124_CLK_I2CSLOW, .present = true },
812 [tegra_clk_dsib] = { .dt_id = TEGRA124_CLK_DSIB, .present = true },
813 [tegra_clk_tsec] = { .dt_id = TEGRA124_CLK_TSEC, .present = true }, 813 [tegra_clk_tsec] = { .dt_id = TEGRA124_CLK_TSEC, .present = true },
814 [tegra_clk_xusb_host] = { .dt_id = TEGRA124_CLK_XUSB_HOST, .present = true }, 814 [tegra_clk_xusb_host] = { .dt_id = TEGRA124_CLK_XUSB_HOST, .present = true },
815 [tegra_clk_msenc] = { .dt_id = TEGRA124_CLK_MSENC, .present = true }, 815 [tegra_clk_msenc] = { .dt_id = TEGRA124_CLK_MSENC, .present = true },
@@ -949,8 +949,6 @@ static struct tegra_clk tegra124_clks[tegra_clk_max] __initdata = {
949 [tegra_clk_clk_out_1_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_1_MUX, .present = true }, 949 [tegra_clk_clk_out_1_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_1_MUX, .present = true },
950 [tegra_clk_clk_out_2_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_2_MUX, .present = true }, 950 [tegra_clk_clk_out_2_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_2_MUX, .present = true },
951 [tegra_clk_clk_out_3_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_3_MUX, .present = true }, 951 [tegra_clk_clk_out_3_mux] = { .dt_id = TEGRA124_CLK_CLK_OUT_3_MUX, .present = true },
952 [tegra_clk_dsia_mux] = { .dt_id = TEGRA124_CLK_DSIA_MUX, .present = true },
953 [tegra_clk_dsib_mux] = { .dt_id = TEGRA124_CLK_DSIB_MUX, .present = true },
954}; 952};
955 953
956static struct tegra_devclk devclks[] __initdata = { 954static struct tegra_devclk devclks[] __initdata = {
@@ -1112,17 +1110,17 @@ static __init void tegra124_periph_clk_init(void __iomem *clk_base,
1112 1, 2); 1110 1, 2);
1113 clks[TEGRA124_CLK_XUSB_SS_DIV2] = clk; 1111 clks[TEGRA124_CLK_XUSB_SS_DIV2] = clk;
1114 1112
1115 /* dsia mux */ 1113 clk = clk_register_gate(NULL, "plld_dsi", "plld_out0", 0,
1116 clk = clk_register_mux(NULL, "dsia_mux", mux_plld_out0_plld2_out0, 1114 clk_base + PLLD_MISC, 30, 0, &pll_d_lock);
1117 ARRAY_SIZE(mux_plld_out0_plld2_out0), 0, 1115 clks[TEGRA124_CLK_PLLD_DSI] = clk;
1118 clk_base + PLLD_BASE, 25, 1, 0, &pll_d_lock); 1116
1119 clks[TEGRA124_CLK_DSIA_MUX] = clk; 1117 clk = tegra_clk_register_periph_gate("dsia", "plld_dsi", 0, clk_base,
1118 0, 48, periph_clk_enb_refcnt);
1119 clks[TEGRA124_CLK_DSIA] = clk;
1120 1120
1121 /* dsib mux */ 1121 clk = tegra_clk_register_periph_gate("dsib", "plld_dsi", 0, clk_base,
1122 clk = clk_register_mux(NULL, "dsib_mux", mux_plld_out0_plld2_out0, 1122 0, 82, periph_clk_enb_refcnt);
1123 ARRAY_SIZE(mux_plld_out0_plld2_out0), 0, 1123 clks[TEGRA124_CLK_DSIB] = clk;
1124 clk_base + PLLD2_BASE, 25, 1, 0, &pll_d2_lock);
1125 clks[TEGRA124_CLK_DSIB_MUX] = clk;
1126 1124
1127 /* emc mux */ 1125 /* emc mux */
1128 clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm, 1126 clk = clk_register_mux(NULL, "emc_mux", mux_pllmcp_clkm,
@@ -1351,7 +1349,7 @@ static const struct of_device_id pmc_match[] __initconst = {
1351 {}, 1349 {},
1352}; 1350};
1353 1351
1354static struct tegra_clk_init_table init_table[] __initdata = { 1352static struct tegra_clk_init_table common_init_table[] __initdata = {
1355 {TEGRA124_CLK_UARTA, TEGRA124_CLK_PLL_P, 408000000, 0}, 1353 {TEGRA124_CLK_UARTA, TEGRA124_CLK_PLL_P, 408000000, 0},
1356 {TEGRA124_CLK_UARTB, TEGRA124_CLK_PLL_P, 408000000, 0}, 1354 {TEGRA124_CLK_UARTB, TEGRA124_CLK_PLL_P, 408000000, 0},
1357 {TEGRA124_CLK_UARTC, TEGRA124_CLK_PLL_P, 408000000, 0}, 1355 {TEGRA124_CLK_UARTC, TEGRA124_CLK_PLL_P, 408000000, 0},
@@ -1368,6 +1366,8 @@ static struct tegra_clk_init_table init_table[] __initdata = {
1368 {TEGRA124_CLK_I2S4, TEGRA124_CLK_PLL_A_OUT0, 11289600, 0}, 1366 {TEGRA124_CLK_I2S4, TEGRA124_CLK_PLL_A_OUT0, 11289600, 0},
1369 {TEGRA124_CLK_VDE, TEGRA124_CLK_PLL_P, 0, 0}, 1367 {TEGRA124_CLK_VDE, TEGRA124_CLK_PLL_P, 0, 0},
1370 {TEGRA124_CLK_HOST1X, TEGRA124_CLK_PLL_P, 136000000, 1}, 1368 {TEGRA124_CLK_HOST1X, TEGRA124_CLK_PLL_P, 136000000, 1},
1369 {TEGRA124_CLK_DSIALP, TEGRA124_CLK_PLL_P, 68000000, 0},
1370 {TEGRA124_CLK_DSIBLP, TEGRA124_CLK_PLL_P, 68000000, 0},
1371 {TEGRA124_CLK_SCLK, TEGRA124_CLK_PLL_P_OUT2, 102000000, 1}, 1371 {TEGRA124_CLK_SCLK, TEGRA124_CLK_PLL_P_OUT2, 102000000, 1},
1372 {TEGRA124_CLK_DFLL_SOC, TEGRA124_CLK_PLL_P, 51000000, 1}, 1372 {TEGRA124_CLK_DFLL_SOC, TEGRA124_CLK_PLL_P, 51000000, 1},
1373 {TEGRA124_CLK_DFLL_REF, TEGRA124_CLK_PLL_P, 51000000, 1}, 1373 {TEGRA124_CLK_DFLL_REF, TEGRA124_CLK_PLL_P, 51000000, 1},
@@ -1385,27 +1385,73 @@ static struct tegra_clk_init_table init_table[] __initdata = {
1385 {TEGRA124_CLK_SATA, TEGRA124_CLK_PLL_P, 104000000, 0}, 1385 {TEGRA124_CLK_SATA, TEGRA124_CLK_PLL_P, 104000000, 0},
1386 {TEGRA124_CLK_SATA_OOB, TEGRA124_CLK_PLL_P, 204000000, 0}, 1386 {TEGRA124_CLK_SATA_OOB, TEGRA124_CLK_PLL_P, 204000000, 0},
1387 {TEGRA124_CLK_EMC, TEGRA124_CLK_CLK_MAX, 0, 1}, 1387 {TEGRA124_CLK_EMC, TEGRA124_CLK_CLK_MAX, 0, 1},
1388 {TEGRA124_CLK_CCLK_G, TEGRA124_CLK_CLK_MAX, 0, 1},
1389 {TEGRA124_CLK_MSELECT, TEGRA124_CLK_CLK_MAX, 0, 1}, 1388 {TEGRA124_CLK_MSELECT, TEGRA124_CLK_CLK_MAX, 0, 1},
1390 {TEGRA124_CLK_CSITE, TEGRA124_CLK_CLK_MAX, 0, 1}, 1389 {TEGRA124_CLK_CSITE, TEGRA124_CLK_CLK_MAX, 0, 1},
1391 {TEGRA124_CLK_TSENSOR, TEGRA124_CLK_CLK_M, 400000, 0}, 1390 {TEGRA124_CLK_TSENSOR, TEGRA124_CLK_CLK_M, 400000, 0},
1391 /* This MUST be the last entry. */
1392 {TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0},
1393};
1394
1395static struct tegra_clk_init_table tegra124_init_table[] __initdata = {
1392 {TEGRA124_CLK_SOC_THERM, TEGRA124_CLK_PLL_P, 51000000, 0}, 1396 {TEGRA124_CLK_SOC_THERM, TEGRA124_CLK_PLL_P, 51000000, 0},
1397 {TEGRA124_CLK_CCLK_G, TEGRA124_CLK_CLK_MAX, 0, 1},
1398 /* This MUST be the last entry. */
1399 {TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0},
1400};
1401
1402/* Tegra132 requires the SOC_THERM clock to remain active */
1403static struct tegra_clk_init_table tegra132_init_table[] __initdata = {
1404 {TEGRA124_CLK_SOC_THERM, TEGRA124_CLK_PLL_P, 51000000, 1},
1393 /* This MUST be the last entry. */ 1405 /* This MUST be the last entry. */
1394 {TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0}, 1406 {TEGRA124_CLK_CLK_MAX, TEGRA124_CLK_CLK_MAX, 0, 0},
1395}; 1407};
1396 1408
1409/**
1410 * tegra124_clock_apply_init_table - initialize clocks on Tegra124 SoCs
1411 *
1412 * Program an initial clock rate and enable or disable clocks needed
1413 * by the rest of the kernel, for Tegra124 SoCs. It is intended to be
1414 * called by assigning a pointer to it to tegra_clk_apply_init_table -
1415 * this will be called as an arch_initcall. No return value.
1416 */
1397static void __init tegra124_clock_apply_init_table(void) 1417static void __init tegra124_clock_apply_init_table(void)
1398{ 1418{
1399 tegra_init_from_table(init_table, clks, TEGRA124_CLK_CLK_MAX); 1419 tegra_init_from_table(common_init_table, clks, TEGRA124_CLK_CLK_MAX);
1420 tegra_init_from_table(tegra124_init_table, clks, TEGRA124_CLK_CLK_MAX);
1400} 1421}
1401 1422
1402static void __init tegra124_clock_init(struct device_node *np) 1423/**
1424 * tegra132_clock_apply_init_table - initialize clocks on Tegra132 SoCs
1425 *
1426 * Program an initial clock rate and enable or disable clocks needed
1427 * by the rest of the kernel, for Tegra132 SoCs. It is intended to be
1428 * called by assigning a pointer to it to tegra_clk_apply_init_table -
1429 * this will be called as an arch_initcall. No return value.
1430 */
1431static void __init tegra132_clock_apply_init_table(void)
1432{
1433 tegra_init_from_table(common_init_table, clks, TEGRA124_CLK_CLK_MAX);
1434 tegra_init_from_table(tegra132_init_table, clks, TEGRA124_CLK_CLK_MAX);
1435}
1436
1437/**
1438 * tegra124_132_clock_init_pre - clock initialization preamble for T124/T132
1439 * @np: struct device_node * of the DT node for the SoC CAR IP block
1440 *
1441 * Register most of the clocks controlled by the CAR IP block, along
1442 * with a few clocks controlled by the PMC IP block. Everything in
1443 * this function should be common to Tegra124 and Tegra132. XXX The
1444 * PMC clock initialization should probably be moved to PMC-specific
1445 * driver code. No return value.
1446 */
1447static void __init tegra124_132_clock_init_pre(struct device_node *np)
1403{ 1448{
1404 struct device_node *node; 1449 struct device_node *node;
1450 u32 plld_base;
1405 1451
1406 clk_base = of_iomap(np, 0); 1452 clk_base = of_iomap(np, 0);
1407 if (!clk_base) { 1453 if (!clk_base) {
1408 pr_err("ioremap tegra124 CAR failed\n"); 1454 pr_err("ioremap tegra124/tegra132 CAR failed\n");
1409 return; 1455 return;
1410 } 1456 }
1411 1457
@@ -1423,7 +1469,8 @@ static void __init tegra124_clock_init(struct device_node *np)
1423 return; 1469 return;
1424 } 1470 }
1425 1471
1426 clks = tegra_clk_init(clk_base, TEGRA124_CLK_CLK_MAX, 6); 1472 clks = tegra_clk_init(clk_base, TEGRA124_CLK_CLK_MAX,
1473 TEGRA124_CAR_BANK_COUNT);
1427 if (!clks) 1474 if (!clks)
1428 return; 1475 return;
1429 1476
@@ -1437,13 +1484,76 @@ static void __init tegra124_clock_init(struct device_node *np)
1437 tegra_audio_clk_init(clk_base, pmc_base, tegra124_clks, &pll_a_params); 1484 tegra_audio_clk_init(clk_base, pmc_base, tegra124_clks, &pll_a_params);
1438 tegra_pmc_clk_init(pmc_base, tegra124_clks); 1485 tegra_pmc_clk_init(pmc_base, tegra124_clks);
1439 1486
1487 /* For Tegra124 & Tegra132, PLLD is the only source for DSIA & DSIB */
1488 plld_base = clk_readl(clk_base + PLLD_BASE);
1489 plld_base &= ~BIT(25);
1490 clk_writel(plld_base, clk_base + PLLD_BASE);
1491}
1492
1493/**
1494 * tegra124_132_clock_init_post - clock initialization postamble for T124/T132
1495 * @np: struct device_node * of the DT node for the SoC CAR IP block
1496 *
1497 * Register most of the along with a few clocks controlled by the PMC
1498 * IP block. Everything in this function should be common to Tegra124
1499 * and Tegra132. This function must be called after
1500 * tegra124_132_clock_init_pre(), otherwise clk_base and pmc_base will
1501 * not be set. No return value.
1502 */
1503static void __init tegra124_132_clock_init_post(struct device_node *np)
1504{
1440 tegra_super_clk_gen4_init(clk_base, pmc_base, tegra124_clks, 1505 tegra_super_clk_gen4_init(clk_base, pmc_base, tegra124_clks,
1441 &pll_x_params); 1506 &pll_x_params);
1442 tegra_add_of_provider(np); 1507 tegra_add_of_provider(np);
1443 tegra_register_devclks(devclks, ARRAY_SIZE(devclks)); 1508 tegra_register_devclks(devclks, ARRAY_SIZE(devclks));
1444 1509
1510 tegra_cpu_car_ops = &tegra124_cpu_car_ops;
1511}
1512
1513/**
1514 * tegra124_clock_init - Tegra124-specific clock initialization
1515 * @np: struct device_node * of the DT node for the SoC CAR IP block
1516 *
1517 * Register most SoC clocks for the Tegra124 system-on-chip. Most of
1518 * this code is shared between the Tegra124 and Tegra132 SoCs,
1519 * although some of the initial clock settings and CPU clocks differ.
1520 * Intended to be called by the OF init code when a DT node with the
1521 * "nvidia,tegra124-car" string is encountered, and declared with
1522 * CLK_OF_DECLARE. No return value.
1523 */
1524static void __init tegra124_clock_init(struct device_node *np)
1525{
1526 tegra124_132_clock_init_pre(np);
1445 tegra_clk_apply_init_table = tegra124_clock_apply_init_table; 1527 tegra_clk_apply_init_table = tegra124_clock_apply_init_table;
1528 tegra124_132_clock_init_post(np);
1529}
1446 1530
1447 tegra_cpu_car_ops = &tegra124_cpu_car_ops; 1531/**
1532 * tegra132_clock_init - Tegra132-specific clock initialization
1533 * @np: struct device_node * of the DT node for the SoC CAR IP block
1534 *
1535 * Register most SoC clocks for the Tegra132 system-on-chip. Most of
1536 * this code is shared between the Tegra124 and Tegra132 SoCs,
1537 * although some of the initial clock settings and CPU clocks differ.
1538 * Intended to be called by the OF init code when a DT node with the
1539 * "nvidia,tegra132-car" string is encountered, and declared with
1540 * CLK_OF_DECLARE. No return value.
1541 */
1542static void __init tegra132_clock_init(struct device_node *np)
1543{
1544 tegra124_132_clock_init_pre(np);
1545
1546 /*
1547 * On Tegra132, these clocks are controlled by the
1548 * CLUSTER_clocks IP block, located in the CPU complex
1549 */
1550 tegra124_clks[tegra_clk_cclk_g].present = false;
1551 tegra124_clks[tegra_clk_cclk_lp].present = false;
1552 tegra124_clks[tegra_clk_pll_x].present = false;
1553 tegra124_clks[tegra_clk_pll_x_out0].present = false;
1554
1555 tegra_clk_apply_init_table = tegra132_clock_apply_init_table;
1556 tegra124_132_clock_init_post(np);
1448} 1557}
1449CLK_OF_DECLARE(tegra124, "nvidia,tegra124-car", tegra124_clock_init); 1558CLK_OF_DECLARE(tegra124, "nvidia,tegra124-car", tegra124_clock_init);
1559CLK_OF_DECLARE(tegra132, "nvidia,tegra132-car", tegra132_clock_init);
diff --git a/drivers/clk/tegra/clk.c b/drivers/clk/tegra/clk.c
index 97dc8595c3cd..9ddb7547cb43 100644
--- a/drivers/clk/tegra/clk.c
+++ b/drivers/clk/tegra/clk.c
@@ -302,10 +302,13 @@ struct clk ** __init tegra_lookup_dt_id(int clk_id,
302 302
303tegra_clk_apply_init_table_func tegra_clk_apply_init_table; 303tegra_clk_apply_init_table_func tegra_clk_apply_init_table;
304 304
305void __init tegra_clocks_apply_init_table(void) 305static int __init tegra_clocks_apply_init_table(void)
306{ 306{
307 if (!tegra_clk_apply_init_table) 307 if (!tegra_clk_apply_init_table)
308 return; 308 return 0;
309 309
310 tegra_clk_apply_init_table(); 310 tegra_clk_apply_init_table();
311
312 return 0;
311} 313}
314arch_initcall(tegra_clocks_apply_init_table);
diff --git a/drivers/clk/ti/Makefile b/drivers/clk/ti/Makefile
index ed4d0aaf8916..105ffd0f5e79 100644
--- a/drivers/clk/ti/Makefile
+++ b/drivers/clk/ti/Makefile
@@ -1,13 +1,17 @@
1ifneq ($(CONFIG_OF),)
2obj-y += clk.o autoidle.o clockdomain.o 1obj-y += clk.o autoidle.o clockdomain.o
3clk-common = dpll.o composite.o divider.o gate.o \ 2clk-common = dpll.o composite.o divider.o gate.o \
4 fixed-factor.o mux.o apll.o 3 fixed-factor.o mux.o apll.o
5obj-$(CONFIG_SOC_AM33XX) += $(clk-common) clk-33xx.o 4obj-$(CONFIG_SOC_AM33XX) += $(clk-common) clk-33xx.o
5obj-$(CONFIG_SOC_TI81XX) += $(clk-common) fapll.o clk-816x.o
6obj-$(CONFIG_ARCH_OMAP2) += $(clk-common) interface.o clk-2xxx.o 6obj-$(CONFIG_ARCH_OMAP2) += $(clk-common) interface.o clk-2xxx.o
7obj-$(CONFIG_ARCH_OMAP3) += $(clk-common) interface.o clk-3xxx.o 7obj-$(CONFIG_ARCH_OMAP3) += $(clk-common) interface.o \
8 clk-3xxx.o
8obj-$(CONFIG_ARCH_OMAP4) += $(clk-common) clk-44xx.o 9obj-$(CONFIG_ARCH_OMAP4) += $(clk-common) clk-44xx.o
9obj-$(CONFIG_SOC_OMAP5) += $(clk-common) clk-54xx.o 10obj-$(CONFIG_SOC_OMAP5) += $(clk-common) clk-54xx.o
10obj-$(CONFIG_SOC_DRA7XX) += $(clk-common) clk-7xx.o \ 11obj-$(CONFIG_SOC_DRA7XX) += $(clk-common) clk-7xx.o \
11 clk-dra7-atl.o 12 clk-dra7-atl.o
12obj-$(CONFIG_SOC_AM43XX) += $(clk-common) clk-43xx.o 13obj-$(CONFIG_SOC_AM43XX) += $(clk-common) clk-43xx.o
14
15ifdef CONFIG_ATAGS
16obj-$(CONFIG_ARCH_OMAP3) += clk-3xxx-legacy.o
13endif 17endif
diff --git a/drivers/clk/ti/clk-3xxx-legacy.c b/drivers/clk/ti/clk-3xxx-legacy.c
new file mode 100644
index 000000000000..e0732a4c8f26
--- /dev/null
+++ b/drivers/clk/ti/clk-3xxx-legacy.c
@@ -0,0 +1,4653 @@
1/*
2 * OMAP3 Legacy clock data
3 *
4 * Copyright (C) 2014 Texas Instruments, Inc
5 * Tero Kristo (t-kristo@ti.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation version 2.
10 *
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include <linux/kernel.h>
18#include <linux/clk-provider.h>
19#include <linux/clk/ti.h>
20
21#include "clock.h"
22
23static struct ti_clk_fixed virt_12m_ck_data = {
24 .frequency = 12000000,
25};
26
27static struct ti_clk virt_12m_ck = {
28 .name = "virt_12m_ck",
29 .type = TI_CLK_FIXED,
30 .data = &virt_12m_ck_data,
31};
32
33static struct ti_clk_fixed virt_13m_ck_data = {
34 .frequency = 13000000,
35};
36
37static struct ti_clk virt_13m_ck = {
38 .name = "virt_13m_ck",
39 .type = TI_CLK_FIXED,
40 .data = &virt_13m_ck_data,
41};
42
43static struct ti_clk_fixed virt_19200000_ck_data = {
44 .frequency = 19200000,
45};
46
47static struct ti_clk virt_19200000_ck = {
48 .name = "virt_19200000_ck",
49 .type = TI_CLK_FIXED,
50 .data = &virt_19200000_ck_data,
51};
52
53static struct ti_clk_fixed virt_26000000_ck_data = {
54 .frequency = 26000000,
55};
56
57static struct ti_clk virt_26000000_ck = {
58 .name = "virt_26000000_ck",
59 .type = TI_CLK_FIXED,
60 .data = &virt_26000000_ck_data,
61};
62
63static struct ti_clk_fixed virt_38_4m_ck_data = {
64 .frequency = 38400000,
65};
66
67static struct ti_clk virt_38_4m_ck = {
68 .name = "virt_38_4m_ck",
69 .type = TI_CLK_FIXED,
70 .data = &virt_38_4m_ck_data,
71};
72
73static struct ti_clk_fixed virt_16_8m_ck_data = {
74 .frequency = 16800000,
75};
76
77static struct ti_clk virt_16_8m_ck = {
78 .name = "virt_16_8m_ck",
79 .type = TI_CLK_FIXED,
80 .data = &virt_16_8m_ck_data,
81};
82
83static const char *osc_sys_ck_parents[] = {
84 "virt_12m_ck",
85 "virt_13m_ck",
86 "virt_19200000_ck",
87 "virt_26000000_ck",
88 "virt_38_4m_ck",
89 "virt_16_8m_ck",
90};
91
92static struct ti_clk_mux osc_sys_ck_data = {
93 .num_parents = ARRAY_SIZE(osc_sys_ck_parents),
94 .reg = 0xd40,
95 .module = TI_CLKM_PRM,
96 .parents = osc_sys_ck_parents,
97};
98
99static struct ti_clk osc_sys_ck = {
100 .name = "osc_sys_ck",
101 .type = TI_CLK_MUX,
102 .data = &osc_sys_ck_data,
103};
104
105static struct ti_clk_divider sys_ck_data = {
106 .parent = "osc_sys_ck",
107 .bit_shift = 6,
108 .max_div = 3,
109 .reg = 0x1270,
110 .module = TI_CLKM_PRM,
111 .flags = CLKF_INDEX_STARTS_AT_ONE,
112};
113
114static struct ti_clk sys_ck = {
115 .name = "sys_ck",
116 .type = TI_CLK_DIVIDER,
117 .data = &sys_ck_data,
118};
119
120static const char *dpll3_ck_parents[] = {
121 "sys_ck",
122 "sys_ck",
123};
124
125static struct ti_clk_dpll dpll3_ck_data = {
126 .num_parents = ARRAY_SIZE(dpll3_ck_parents),
127 .control_reg = 0xd00,
128 .idlest_reg = 0xd20,
129 .mult_div1_reg = 0xd40,
130 .autoidle_reg = 0xd30,
131 .module = TI_CLKM_CM,
132 .parents = dpll3_ck_parents,
133 .flags = CLKF_CORE,
134 .freqsel_mask = 0xf0,
135 .div1_mask = 0x7f00,
136 .idlest_mask = 0x1,
137 .auto_recal_bit = 0x3,
138 .max_divider = 0x80,
139 .min_divider = 0x1,
140 .recal_en_bit = 0x5,
141 .max_multiplier = 0x7ff,
142 .enable_mask = 0x7,
143 .mult_mask = 0x7ff0000,
144 .recal_st_bit = 0x5,
145 .autoidle_mask = 0x7,
146};
147
148static struct ti_clk dpll3_ck = {
149 .name = "dpll3_ck",
150 .clkdm_name = "dpll3_clkdm",
151 .type = TI_CLK_DPLL,
152 .data = &dpll3_ck_data,
153};
154
155static struct ti_clk_divider dpll3_m2_ck_data = {
156 .parent = "dpll3_ck",
157 .bit_shift = 27,
158 .max_div = 31,
159 .reg = 0xd40,
160 .module = TI_CLKM_CM,
161 .flags = CLKF_INDEX_STARTS_AT_ONE,
162};
163
164static struct ti_clk dpll3_m2_ck = {
165 .name = "dpll3_m2_ck",
166 .type = TI_CLK_DIVIDER,
167 .data = &dpll3_m2_ck_data,
168};
169
170static struct ti_clk_fixed_factor core_ck_data = {
171 .parent = "dpll3_m2_ck",
172 .div = 1,
173 .mult = 1,
174};
175
176static struct ti_clk core_ck = {
177 .name = "core_ck",
178 .type = TI_CLK_FIXED_FACTOR,
179 .data = &core_ck_data,
180};
181
182static struct ti_clk_divider l3_ick_data = {
183 .parent = "core_ck",
184 .max_div = 3,
185 .reg = 0xa40,
186 .module = TI_CLKM_CM,
187 .flags = CLKF_INDEX_STARTS_AT_ONE,
188};
189
190static struct ti_clk l3_ick = {
191 .name = "l3_ick",
192 .type = TI_CLK_DIVIDER,
193 .data = &l3_ick_data,
194};
195
196static struct ti_clk_fixed_factor security_l3_ick_data = {
197 .parent = "l3_ick",
198 .div = 1,
199 .mult = 1,
200};
201
202static struct ti_clk security_l3_ick = {
203 .name = "security_l3_ick",
204 .type = TI_CLK_FIXED_FACTOR,
205 .data = &security_l3_ick_data,
206};
207
208static struct ti_clk_fixed_factor wkup_l4_ick_data = {
209 .parent = "sys_ck",
210 .div = 1,
211 .mult = 1,
212};
213
214static struct ti_clk wkup_l4_ick = {
215 .name = "wkup_l4_ick",
216 .type = TI_CLK_FIXED_FACTOR,
217 .data = &wkup_l4_ick_data,
218};
219
220static struct ti_clk_gate usim_ick_data = {
221 .parent = "wkup_l4_ick",
222 .bit_shift = 9,
223 .reg = 0xc10,
224 .module = TI_CLKM_CM,
225 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
226};
227
228static struct ti_clk usim_ick = {
229 .name = "usim_ick",
230 .clkdm_name = "wkup_clkdm",
231 .type = TI_CLK_GATE,
232 .data = &usim_ick_data,
233};
234
235static struct ti_clk_gate dss2_alwon_fck_data = {
236 .parent = "sys_ck",
237 .bit_shift = 1,
238 .reg = 0xe00,
239 .module = TI_CLKM_CM,
240};
241
242static struct ti_clk dss2_alwon_fck = {
243 .name = "dss2_alwon_fck",
244 .clkdm_name = "dss_clkdm",
245 .type = TI_CLK_GATE,
246 .data = &dss2_alwon_fck_data,
247};
248
249static struct ti_clk_divider l4_ick_data = {
250 .parent = "l3_ick",
251 .bit_shift = 2,
252 .max_div = 3,
253 .reg = 0xa40,
254 .module = TI_CLKM_CM,
255 .flags = CLKF_INDEX_STARTS_AT_ONE,
256};
257
258static struct ti_clk l4_ick = {
259 .name = "l4_ick",
260 .type = TI_CLK_DIVIDER,
261 .data = &l4_ick_data,
262};
263
264static struct ti_clk_fixed_factor core_l4_ick_data = {
265 .parent = "l4_ick",
266 .div = 1,
267 .mult = 1,
268};
269
270static struct ti_clk core_l4_ick = {
271 .name = "core_l4_ick",
272 .type = TI_CLK_FIXED_FACTOR,
273 .data = &core_l4_ick_data,
274};
275
276static struct ti_clk_gate mmchs2_ick_data = {
277 .parent = "core_l4_ick",
278 .bit_shift = 25,
279 .reg = 0xa10,
280 .module = TI_CLKM_CM,
281 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
282};
283
284static struct ti_clk mmchs2_ick = {
285 .name = "mmchs2_ick",
286 .clkdm_name = "core_l4_clkdm",
287 .type = TI_CLK_GATE,
288 .data = &mmchs2_ick_data,
289};
290
291static const char *dpll4_ck_parents[] = {
292 "sys_ck",
293 "sys_ck",
294};
295
296static struct ti_clk_dpll dpll4_ck_data = {
297 .num_parents = ARRAY_SIZE(dpll4_ck_parents),
298 .control_reg = 0xd00,
299 .idlest_reg = 0xd20,
300 .mult_div1_reg = 0xd44,
301 .autoidle_reg = 0xd30,
302 .module = TI_CLKM_CM,
303 .parents = dpll4_ck_parents,
304 .flags = CLKF_PER,
305 .freqsel_mask = 0xf00000,
306 .modes = 0x82,
307 .div1_mask = 0x7f,
308 .idlest_mask = 0x2,
309 .auto_recal_bit = 0x13,
310 .max_divider = 0x80,
311 .min_divider = 0x1,
312 .recal_en_bit = 0x6,
313 .max_multiplier = 0x7ff,
314 .enable_mask = 0x70000,
315 .mult_mask = 0x7ff00,
316 .recal_st_bit = 0x6,
317 .autoidle_mask = 0x38,
318};
319
320static struct ti_clk dpll4_ck = {
321 .name = "dpll4_ck",
322 .clkdm_name = "dpll4_clkdm",
323 .type = TI_CLK_DPLL,
324 .data = &dpll4_ck_data,
325};
326
327static struct ti_clk_divider dpll4_m2_ck_data = {
328 .parent = "dpll4_ck",
329 .max_div = 63,
330 .reg = 0xd48,
331 .module = TI_CLKM_CM,
332 .flags = CLKF_INDEX_STARTS_AT_ONE,
333};
334
335static struct ti_clk dpll4_m2_ck = {
336 .name = "dpll4_m2_ck",
337 .type = TI_CLK_DIVIDER,
338 .data = &dpll4_m2_ck_data,
339};
340
341static struct ti_clk_fixed_factor dpll4_m2x2_mul_ck_data = {
342 .parent = "dpll4_m2_ck",
343 .div = 1,
344 .mult = 2,
345};
346
347static struct ti_clk dpll4_m2x2_mul_ck = {
348 .name = "dpll4_m2x2_mul_ck",
349 .type = TI_CLK_FIXED_FACTOR,
350 .data = &dpll4_m2x2_mul_ck_data,
351};
352
353static struct ti_clk_gate dpll4_m2x2_ck_data = {
354 .parent = "dpll4_m2x2_mul_ck",
355 .bit_shift = 0x1b,
356 .reg = 0xd00,
357 .module = TI_CLKM_CM,
358 .flags = CLKF_SET_BIT_TO_DISABLE,
359};
360
361static struct ti_clk dpll4_m2x2_ck = {
362 .name = "dpll4_m2x2_ck",
363 .type = TI_CLK_GATE,
364 .data = &dpll4_m2x2_ck_data,
365};
366
367static struct ti_clk_fixed_factor omap_96m_alwon_fck_data = {
368 .parent = "dpll4_m2x2_ck",
369 .div = 1,
370 .mult = 1,
371};
372
373static struct ti_clk omap_96m_alwon_fck = {
374 .name = "omap_96m_alwon_fck",
375 .type = TI_CLK_FIXED_FACTOR,
376 .data = &omap_96m_alwon_fck_data,
377};
378
379static struct ti_clk_fixed_factor cm_96m_fck_data = {
380 .parent = "omap_96m_alwon_fck",
381 .div = 1,
382 .mult = 1,
383};
384
385static struct ti_clk cm_96m_fck = {
386 .name = "cm_96m_fck",
387 .type = TI_CLK_FIXED_FACTOR,
388 .data = &cm_96m_fck_data,
389};
390
391static const char *omap_96m_fck_parents[] = {
392 "cm_96m_fck",
393 "sys_ck",
394};
395
396static struct ti_clk_mux omap_96m_fck_data = {
397 .bit_shift = 6,
398 .num_parents = ARRAY_SIZE(omap_96m_fck_parents),
399 .reg = 0xd40,
400 .module = TI_CLKM_CM,
401 .parents = omap_96m_fck_parents,
402};
403
404static struct ti_clk omap_96m_fck = {
405 .name = "omap_96m_fck",
406 .type = TI_CLK_MUX,
407 .data = &omap_96m_fck_data,
408};
409
410static struct ti_clk_fixed_factor core_96m_fck_data = {
411 .parent = "omap_96m_fck",
412 .div = 1,
413 .mult = 1,
414};
415
416static struct ti_clk core_96m_fck = {
417 .name = "core_96m_fck",
418 .type = TI_CLK_FIXED_FACTOR,
419 .data = &core_96m_fck_data,
420};
421
422static struct ti_clk_gate mspro_fck_data = {
423 .parent = "core_96m_fck",
424 .bit_shift = 23,
425 .reg = 0xa00,
426 .module = TI_CLKM_CM,
427 .flags = CLKF_WAIT,
428};
429
430static struct ti_clk mspro_fck = {
431 .name = "mspro_fck",
432 .clkdm_name = "core_l4_clkdm",
433 .type = TI_CLK_GATE,
434 .data = &mspro_fck_data,
435};
436
437static struct ti_clk_gate dss_ick_3430es2_data = {
438 .parent = "l4_ick",
439 .bit_shift = 0,
440 .reg = 0xe10,
441 .module = TI_CLKM_CM,
442 .flags = CLKF_DSS | CLKF_OMAP3 | CLKF_INTERFACE,
443};
444
445static struct ti_clk dss_ick_3430es2 = {
446 .name = "dss_ick",
447 .clkdm_name = "dss_clkdm",
448 .type = TI_CLK_GATE,
449 .data = &dss_ick_3430es2_data,
450};
451
452static struct ti_clk_gate uart4_ick_am35xx_data = {
453 .parent = "core_l4_ick",
454 .bit_shift = 23,
455 .reg = 0xa10,
456 .module = TI_CLKM_CM,
457 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
458};
459
460static struct ti_clk uart4_ick_am35xx = {
461 .name = "uart4_ick_am35xx",
462 .clkdm_name = "core_l4_clkdm",
463 .type = TI_CLK_GATE,
464 .data = &uart4_ick_am35xx_data,
465};
466
467static struct ti_clk_fixed_factor security_l4_ick2_data = {
468 .parent = "l4_ick",
469 .div = 1,
470 .mult = 1,
471};
472
473static struct ti_clk security_l4_ick2 = {
474 .name = "security_l4_ick2",
475 .type = TI_CLK_FIXED_FACTOR,
476 .data = &security_l4_ick2_data,
477};
478
479static struct ti_clk_gate aes1_ick_data = {
480 .parent = "security_l4_ick2",
481 .bit_shift = 3,
482 .reg = 0xa14,
483 .module = TI_CLKM_CM,
484 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
485};
486
487static struct ti_clk aes1_ick = {
488 .name = "aes1_ick",
489 .type = TI_CLK_GATE,
490 .data = &aes1_ick_data,
491};
492
493static const char *dpll5_ck_parents[] = {
494 "sys_ck",
495 "sys_ck",
496};
497
498static struct ti_clk_dpll dpll5_ck_data = {
499 .num_parents = ARRAY_SIZE(dpll5_ck_parents),
500 .control_reg = 0xd04,
501 .idlest_reg = 0xd24,
502 .mult_div1_reg = 0xd4c,
503 .autoidle_reg = 0xd34,
504 .module = TI_CLKM_CM,
505 .parents = dpll5_ck_parents,
506 .freqsel_mask = 0xf0,
507 .modes = 0x82,
508 .div1_mask = 0x7f,
509 .idlest_mask = 0x1,
510 .auto_recal_bit = 0x3,
511 .max_divider = 0x80,
512 .min_divider = 0x1,
513 .recal_en_bit = 0x19,
514 .max_multiplier = 0x7ff,
515 .enable_mask = 0x7,
516 .mult_mask = 0x7ff00,
517 .recal_st_bit = 0x19,
518 .autoidle_mask = 0x7,
519};
520
521static struct ti_clk dpll5_ck = {
522 .name = "dpll5_ck",
523 .clkdm_name = "dpll5_clkdm",
524 .type = TI_CLK_DPLL,
525 .data = &dpll5_ck_data,
526};
527
528static struct ti_clk_divider dpll5_m2_ck_data = {
529 .parent = "dpll5_ck",
530 .max_div = 31,
531 .reg = 0xd50,
532 .module = TI_CLKM_CM,
533 .flags = CLKF_INDEX_STARTS_AT_ONE,
534};
535
536static struct ti_clk dpll5_m2_ck = {
537 .name = "dpll5_m2_ck",
538 .type = TI_CLK_DIVIDER,
539 .data = &dpll5_m2_ck_data,
540};
541
542static struct ti_clk_gate usbhost_120m_fck_data = {
543 .parent = "dpll5_m2_ck",
544 .bit_shift = 1,
545 .reg = 0x1400,
546 .module = TI_CLKM_CM,
547};
548
549static struct ti_clk usbhost_120m_fck = {
550 .name = "usbhost_120m_fck",
551 .clkdm_name = "usbhost_clkdm",
552 .type = TI_CLK_GATE,
553 .data = &usbhost_120m_fck_data,
554};
555
556static struct ti_clk_fixed_factor cm_96m_d2_fck_data = {
557 .parent = "cm_96m_fck",
558 .div = 2,
559 .mult = 1,
560};
561
562static struct ti_clk cm_96m_d2_fck = {
563 .name = "cm_96m_d2_fck",
564 .type = TI_CLK_FIXED_FACTOR,
565 .data = &cm_96m_d2_fck_data,
566};
567
568static struct ti_clk_fixed sys_altclk_data = {
569 .frequency = 0x0,
570};
571
572static struct ti_clk sys_altclk = {
573 .name = "sys_altclk",
574 .type = TI_CLK_FIXED,
575 .data = &sys_altclk_data,
576};
577
578static const char *omap_48m_fck_parents[] = {
579 "cm_96m_d2_fck",
580 "sys_altclk",
581};
582
583static struct ti_clk_mux omap_48m_fck_data = {
584 .bit_shift = 3,
585 .num_parents = ARRAY_SIZE(omap_48m_fck_parents),
586 .reg = 0xd40,
587 .module = TI_CLKM_CM,
588 .parents = omap_48m_fck_parents,
589};
590
591static struct ti_clk omap_48m_fck = {
592 .name = "omap_48m_fck",
593 .type = TI_CLK_MUX,
594 .data = &omap_48m_fck_data,
595};
596
597static struct ti_clk_fixed_factor core_48m_fck_data = {
598 .parent = "omap_48m_fck",
599 .div = 1,
600 .mult = 1,
601};
602
603static struct ti_clk core_48m_fck = {
604 .name = "core_48m_fck",
605 .type = TI_CLK_FIXED_FACTOR,
606 .data = &core_48m_fck_data,
607};
608
609static struct ti_clk_fixed mcbsp_clks_data = {
610 .frequency = 0x0,
611};
612
613static struct ti_clk mcbsp_clks = {
614 .name = "mcbsp_clks",
615 .type = TI_CLK_FIXED,
616 .data = &mcbsp_clks_data,
617};
618
619static struct ti_clk_gate mcbsp2_gate_fck_data = {
620 .parent = "mcbsp_clks",
621 .bit_shift = 0,
622 .reg = 0x1000,
623 .module = TI_CLKM_CM,
624};
625
626static struct ti_clk_fixed_factor per_96m_fck_data = {
627 .parent = "omap_96m_alwon_fck",
628 .div = 1,
629 .mult = 1,
630};
631
632static struct ti_clk per_96m_fck = {
633 .name = "per_96m_fck",
634 .type = TI_CLK_FIXED_FACTOR,
635 .data = &per_96m_fck_data,
636};
637
638static const char *mcbsp2_mux_fck_parents[] = {
639 "per_96m_fck",
640 "mcbsp_clks",
641};
642
643static struct ti_clk_mux mcbsp2_mux_fck_data = {
644 .bit_shift = 6,
645 .num_parents = ARRAY_SIZE(mcbsp2_mux_fck_parents),
646 .reg = 0x274,
647 .module = TI_CLKM_SCRM,
648 .parents = mcbsp2_mux_fck_parents,
649};
650
651static struct ti_clk_composite mcbsp2_fck_data = {
652 .mux = &mcbsp2_mux_fck_data,
653 .gate = &mcbsp2_gate_fck_data,
654};
655
656static struct ti_clk mcbsp2_fck = {
657 .name = "mcbsp2_fck",
658 .type = TI_CLK_COMPOSITE,
659 .data = &mcbsp2_fck_data,
660};
661
662static struct ti_clk_fixed_factor dpll3_m2x2_ck_data = {
663 .parent = "dpll3_m2_ck",
664 .div = 1,
665 .mult = 2,
666};
667
668static struct ti_clk dpll3_m2x2_ck = {
669 .name = "dpll3_m2x2_ck",
670 .type = TI_CLK_FIXED_FACTOR,
671 .data = &dpll3_m2x2_ck_data,
672};
673
674static struct ti_clk_fixed_factor corex2_fck_data = {
675 .parent = "dpll3_m2x2_ck",
676 .div = 1,
677 .mult = 1,
678};
679
680static struct ti_clk corex2_fck = {
681 .name = "corex2_fck",
682 .type = TI_CLK_FIXED_FACTOR,
683 .data = &corex2_fck_data,
684};
685
686static struct ti_clk_gate ssi_ssr_gate_fck_3430es1_data = {
687 .parent = "corex2_fck",
688 .bit_shift = 0,
689 .reg = 0xa00,
690 .module = TI_CLKM_CM,
691 .flags = CLKF_NO_WAIT,
692};
693
694static int ssi_ssr_div_fck_3430es1_divs[] = {
695 0,
696 1,
697 2,
698 3,
699 4,
700 0,
701 6,
702 0,
703 8,
704};
705
706static struct ti_clk_divider ssi_ssr_div_fck_3430es1_data = {
707 .num_dividers = ARRAY_SIZE(ssi_ssr_div_fck_3430es1_divs),
708 .parent = "corex2_fck",
709 .bit_shift = 8,
710 .dividers = ssi_ssr_div_fck_3430es1_divs,
711 .reg = 0xa40,
712 .module = TI_CLKM_CM,
713};
714
715static struct ti_clk_composite ssi_ssr_fck_3430es1_data = {
716 .gate = &ssi_ssr_gate_fck_3430es1_data,
717 .divider = &ssi_ssr_div_fck_3430es1_data,
718};
719
720static struct ti_clk ssi_ssr_fck_3430es1 = {
721 .name = "ssi_ssr_fck",
722 .type = TI_CLK_COMPOSITE,
723 .data = &ssi_ssr_fck_3430es1_data,
724};
725
726static struct ti_clk_fixed_factor ssi_sst_fck_3430es1_data = {
727 .parent = "ssi_ssr_fck",
728 .div = 2,
729 .mult = 1,
730};
731
732static struct ti_clk ssi_sst_fck_3430es1 = {
733 .name = "ssi_sst_fck",
734 .type = TI_CLK_FIXED_FACTOR,
735 .data = &ssi_sst_fck_3430es1_data,
736};
737
738static struct ti_clk_fixed omap_32k_fck_data = {
739 .frequency = 32768,
740};
741
742static struct ti_clk omap_32k_fck = {
743 .name = "omap_32k_fck",
744 .type = TI_CLK_FIXED,
745 .data = &omap_32k_fck_data,
746};
747
748static struct ti_clk_fixed_factor per_32k_alwon_fck_data = {
749 .parent = "omap_32k_fck",
750 .div = 1,
751 .mult = 1,
752};
753
754static struct ti_clk per_32k_alwon_fck = {
755 .name = "per_32k_alwon_fck",
756 .type = TI_CLK_FIXED_FACTOR,
757 .data = &per_32k_alwon_fck_data,
758};
759
760static struct ti_clk_gate gpio5_dbck_data = {
761 .parent = "per_32k_alwon_fck",
762 .bit_shift = 16,
763 .reg = 0x1000,
764 .module = TI_CLKM_CM,
765};
766
767static struct ti_clk gpio5_dbck = {
768 .name = "gpio5_dbck",
769 .clkdm_name = "per_clkdm",
770 .type = TI_CLK_GATE,
771 .data = &gpio5_dbck_data,
772};
773
774static struct ti_clk_gate gpt1_ick_data = {
775 .parent = "wkup_l4_ick",
776 .bit_shift = 0,
777 .reg = 0xc10,
778 .module = TI_CLKM_CM,
779 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
780};
781
782static struct ti_clk gpt1_ick = {
783 .name = "gpt1_ick",
784 .clkdm_name = "wkup_clkdm",
785 .type = TI_CLK_GATE,
786 .data = &gpt1_ick_data,
787};
788
789static struct ti_clk_gate mcspi3_fck_data = {
790 .parent = "core_48m_fck",
791 .bit_shift = 20,
792 .reg = 0xa00,
793 .module = TI_CLKM_CM,
794 .flags = CLKF_WAIT,
795};
796
797static struct ti_clk mcspi3_fck = {
798 .name = "mcspi3_fck",
799 .clkdm_name = "core_l4_clkdm",
800 .type = TI_CLK_GATE,
801 .data = &mcspi3_fck_data,
802};
803
804static struct ti_clk_gate gpt2_gate_fck_data = {
805 .parent = "sys_ck",
806 .bit_shift = 3,
807 .reg = 0x1000,
808 .module = TI_CLKM_CM,
809};
810
811static const char *gpt2_mux_fck_parents[] = {
812 "omap_32k_fck",
813 "sys_ck",
814};
815
816static struct ti_clk_mux gpt2_mux_fck_data = {
817 .num_parents = ARRAY_SIZE(gpt2_mux_fck_parents),
818 .reg = 0x1040,
819 .module = TI_CLKM_CM,
820 .parents = gpt2_mux_fck_parents,
821};
822
823static struct ti_clk_composite gpt2_fck_data = {
824 .mux = &gpt2_mux_fck_data,
825 .gate = &gpt2_gate_fck_data,
826};
827
828static struct ti_clk gpt2_fck = {
829 .name = "gpt2_fck",
830 .type = TI_CLK_COMPOSITE,
831 .data = &gpt2_fck_data,
832};
833
834static struct ti_clk_gate gpt10_ick_data = {
835 .parent = "core_l4_ick",
836 .bit_shift = 11,
837 .reg = 0xa10,
838 .module = TI_CLKM_CM,
839 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
840};
841
842static struct ti_clk gpt10_ick = {
843 .name = "gpt10_ick",
844 .clkdm_name = "core_l4_clkdm",
845 .type = TI_CLK_GATE,
846 .data = &gpt10_ick_data,
847};
848
849static struct ti_clk_gate uart2_fck_data = {
850 .parent = "core_48m_fck",
851 .bit_shift = 14,
852 .reg = 0xa00,
853 .module = TI_CLKM_CM,
854 .flags = CLKF_WAIT,
855};
856
857static struct ti_clk uart2_fck = {
858 .name = "uart2_fck",
859 .clkdm_name = "core_l4_clkdm",
860 .type = TI_CLK_GATE,
861 .data = &uart2_fck_data,
862};
863
864static struct ti_clk_fixed_factor sr_l4_ick_data = {
865 .parent = "l4_ick",
866 .div = 1,
867 .mult = 1,
868};
869
870static struct ti_clk sr_l4_ick = {
871 .name = "sr_l4_ick",
872 .type = TI_CLK_FIXED_FACTOR,
873 .data = &sr_l4_ick_data,
874};
875
876static struct ti_clk_fixed_factor omap_96m_d8_fck_data = {
877 .parent = "omap_96m_fck",
878 .div = 8,
879 .mult = 1,
880};
881
882static struct ti_clk omap_96m_d8_fck = {
883 .name = "omap_96m_d8_fck",
884 .type = TI_CLK_FIXED_FACTOR,
885 .data = &omap_96m_d8_fck_data,
886};
887
888static struct ti_clk_divider dpll4_m5_ck_data = {
889 .parent = "dpll4_ck",
890 .max_div = 63,
891 .reg = 0xf40,
892 .module = TI_CLKM_CM,
893 .flags = CLKF_INDEX_STARTS_AT_ONE,
894};
895
896static struct ti_clk dpll4_m5_ck = {
897 .name = "dpll4_m5_ck",
898 .type = TI_CLK_DIVIDER,
899 .data = &dpll4_m5_ck_data,
900};
901
902static struct ti_clk_fixed_factor dpll4_m5x2_mul_ck_data = {
903 .parent = "dpll4_m5_ck",
904 .div = 1,
905 .mult = 2,
906 .flags = CLKF_SET_RATE_PARENT,
907};
908
909static struct ti_clk dpll4_m5x2_mul_ck = {
910 .name = "dpll4_m5x2_mul_ck",
911 .type = TI_CLK_FIXED_FACTOR,
912 .data = &dpll4_m5x2_mul_ck_data,
913};
914
915static struct ti_clk_gate dpll4_m5x2_ck_data = {
916 .parent = "dpll4_m5x2_mul_ck",
917 .bit_shift = 0x1e,
918 .reg = 0xd00,
919 .module = TI_CLKM_CM,
920 .flags = CLKF_SET_BIT_TO_DISABLE,
921};
922
923static struct ti_clk dpll4_m5x2_ck = {
924 .name = "dpll4_m5x2_ck",
925 .type = TI_CLK_GATE,
926 .data = &dpll4_m5x2_ck_data,
927};
928
929static struct ti_clk_gate cam_mclk_data = {
930 .parent = "dpll4_m5x2_ck",
931 .bit_shift = 0,
932 .reg = 0xf00,
933 .module = TI_CLKM_CM,
934 .flags = CLKF_SET_RATE_PARENT,
935};
936
937static struct ti_clk cam_mclk = {
938 .name = "cam_mclk",
939 .type = TI_CLK_GATE,
940 .data = &cam_mclk_data,
941};
942
943static struct ti_clk_gate mcbsp3_gate_fck_data = {
944 .parent = "mcbsp_clks",
945 .bit_shift = 1,
946 .reg = 0x1000,
947 .module = TI_CLKM_CM,
948};
949
950static const char *mcbsp3_mux_fck_parents[] = {
951 "per_96m_fck",
952 "mcbsp_clks",
953};
954
955static struct ti_clk_mux mcbsp3_mux_fck_data = {
956 .num_parents = ARRAY_SIZE(mcbsp3_mux_fck_parents),
957 .reg = 0x2d8,
958 .module = TI_CLKM_SCRM,
959 .parents = mcbsp3_mux_fck_parents,
960};
961
962static struct ti_clk_composite mcbsp3_fck_data = {
963 .mux = &mcbsp3_mux_fck_data,
964 .gate = &mcbsp3_gate_fck_data,
965};
966
967static struct ti_clk mcbsp3_fck = {
968 .name = "mcbsp3_fck",
969 .type = TI_CLK_COMPOSITE,
970 .data = &mcbsp3_fck_data,
971};
972
973static struct ti_clk_gate csi2_96m_fck_data = {
974 .parent = "core_96m_fck",
975 .bit_shift = 1,
976 .reg = 0xf00,
977 .module = TI_CLKM_CM,
978};
979
980static struct ti_clk csi2_96m_fck = {
981 .name = "csi2_96m_fck",
982 .clkdm_name = "cam_clkdm",
983 .type = TI_CLK_GATE,
984 .data = &csi2_96m_fck_data,
985};
986
987static struct ti_clk_gate gpt9_gate_fck_data = {
988 .parent = "sys_ck",
989 .bit_shift = 10,
990 .reg = 0x1000,
991 .module = TI_CLKM_CM,
992};
993
994static const char *gpt9_mux_fck_parents[] = {
995 "omap_32k_fck",
996 "sys_ck",
997};
998
999static struct ti_clk_mux gpt9_mux_fck_data = {
1000 .bit_shift = 7,
1001 .num_parents = ARRAY_SIZE(gpt9_mux_fck_parents),
1002 .reg = 0x1040,
1003 .module = TI_CLKM_CM,
1004 .parents = gpt9_mux_fck_parents,
1005};
1006
1007static struct ti_clk_composite gpt9_fck_data = {
1008 .mux = &gpt9_mux_fck_data,
1009 .gate = &gpt9_gate_fck_data,
1010};
1011
1012static struct ti_clk gpt9_fck = {
1013 .name = "gpt9_fck",
1014 .type = TI_CLK_COMPOSITE,
1015 .data = &gpt9_fck_data,
1016};
1017
1018static struct ti_clk_divider dpll3_m3_ck_data = {
1019 .parent = "dpll3_ck",
1020 .bit_shift = 16,
1021 .max_div = 31,
1022 .reg = 0x1140,
1023 .module = TI_CLKM_CM,
1024 .flags = CLKF_INDEX_STARTS_AT_ONE,
1025};
1026
1027static struct ti_clk dpll3_m3_ck = {
1028 .name = "dpll3_m3_ck",
1029 .type = TI_CLK_DIVIDER,
1030 .data = &dpll3_m3_ck_data,
1031};
1032
1033static struct ti_clk_fixed_factor dpll3_m3x2_mul_ck_data = {
1034 .parent = "dpll3_m3_ck",
1035 .div = 1,
1036 .mult = 2,
1037};
1038
1039static struct ti_clk dpll3_m3x2_mul_ck = {
1040 .name = "dpll3_m3x2_mul_ck",
1041 .type = TI_CLK_FIXED_FACTOR,
1042 .data = &dpll3_m3x2_mul_ck_data,
1043};
1044
1045static struct ti_clk_gate sr2_fck_data = {
1046 .parent = "sys_ck",
1047 .bit_shift = 7,
1048 .reg = 0xc00,
1049 .module = TI_CLKM_CM,
1050 .flags = CLKF_WAIT,
1051};
1052
1053static struct ti_clk sr2_fck = {
1054 .name = "sr2_fck",
1055 .clkdm_name = "wkup_clkdm",
1056 .type = TI_CLK_GATE,
1057 .data = &sr2_fck_data,
1058};
1059
1060static struct ti_clk_fixed pclk_ck_data = {
1061 .frequency = 27000000,
1062};
1063
1064static struct ti_clk pclk_ck = {
1065 .name = "pclk_ck",
1066 .type = TI_CLK_FIXED,
1067 .data = &pclk_ck_data,
1068};
1069
1070static struct ti_clk_gate wdt2_ick_data = {
1071 .parent = "wkup_l4_ick",
1072 .bit_shift = 5,
1073 .reg = 0xc10,
1074 .module = TI_CLKM_CM,
1075 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1076};
1077
1078static struct ti_clk wdt2_ick = {
1079 .name = "wdt2_ick",
1080 .clkdm_name = "wkup_clkdm",
1081 .type = TI_CLK_GATE,
1082 .data = &wdt2_ick_data,
1083};
1084
1085static struct ti_clk_fixed_factor core_l3_ick_data = {
1086 .parent = "l3_ick",
1087 .div = 1,
1088 .mult = 1,
1089};
1090
1091static struct ti_clk core_l3_ick = {
1092 .name = "core_l3_ick",
1093 .type = TI_CLK_FIXED_FACTOR,
1094 .data = &core_l3_ick_data,
1095};
1096
1097static struct ti_clk_gate mcspi4_fck_data = {
1098 .parent = "core_48m_fck",
1099 .bit_shift = 21,
1100 .reg = 0xa00,
1101 .module = TI_CLKM_CM,
1102 .flags = CLKF_WAIT,
1103};
1104
1105static struct ti_clk mcspi4_fck = {
1106 .name = "mcspi4_fck",
1107 .clkdm_name = "core_l4_clkdm",
1108 .type = TI_CLK_GATE,
1109 .data = &mcspi4_fck_data,
1110};
1111
1112static struct ti_clk_fixed_factor per_48m_fck_data = {
1113 .parent = "omap_48m_fck",
1114 .div = 1,
1115 .mult = 1,
1116};
1117
1118static struct ti_clk per_48m_fck = {
1119 .name = "per_48m_fck",
1120 .type = TI_CLK_FIXED_FACTOR,
1121 .data = &per_48m_fck_data,
1122};
1123
1124static struct ti_clk_gate uart4_fck_data = {
1125 .parent = "per_48m_fck",
1126 .bit_shift = 18,
1127 .reg = 0x1000,
1128 .module = TI_CLKM_CM,
1129 .flags = CLKF_WAIT,
1130};
1131
1132static struct ti_clk uart4_fck = {
1133 .name = "uart4_fck",
1134 .clkdm_name = "per_clkdm",
1135 .type = TI_CLK_GATE,
1136 .data = &uart4_fck_data,
1137};
1138
1139static struct ti_clk_fixed_factor omap_96m_d10_fck_data = {
1140 .parent = "omap_96m_fck",
1141 .div = 10,
1142 .mult = 1,
1143};
1144
1145static struct ti_clk omap_96m_d10_fck = {
1146 .name = "omap_96m_d10_fck",
1147 .type = TI_CLK_FIXED_FACTOR,
1148 .data = &omap_96m_d10_fck_data,
1149};
1150
1151static struct ti_clk_gate usim_gate_fck_data = {
1152 .parent = "omap_96m_fck",
1153 .bit_shift = 9,
1154 .reg = 0xc00,
1155 .module = TI_CLKM_CM,
1156};
1157
1158static struct ti_clk_fixed_factor per_l4_ick_data = {
1159 .parent = "l4_ick",
1160 .div = 1,
1161 .mult = 1,
1162};
1163
1164static struct ti_clk per_l4_ick = {
1165 .name = "per_l4_ick",
1166 .type = TI_CLK_FIXED_FACTOR,
1167 .data = &per_l4_ick_data,
1168};
1169
1170static struct ti_clk_gate gpt5_ick_data = {
1171 .parent = "per_l4_ick",
1172 .bit_shift = 6,
1173 .reg = 0x1010,
1174 .module = TI_CLKM_CM,
1175 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1176};
1177
1178static struct ti_clk gpt5_ick = {
1179 .name = "gpt5_ick",
1180 .clkdm_name = "per_clkdm",
1181 .type = TI_CLK_GATE,
1182 .data = &gpt5_ick_data,
1183};
1184
1185static struct ti_clk_gate mcspi2_ick_data = {
1186 .parent = "core_l4_ick",
1187 .bit_shift = 19,
1188 .reg = 0xa10,
1189 .module = TI_CLKM_CM,
1190 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1191};
1192
1193static struct ti_clk mcspi2_ick = {
1194 .name = "mcspi2_ick",
1195 .clkdm_name = "core_l4_clkdm",
1196 .type = TI_CLK_GATE,
1197 .data = &mcspi2_ick_data,
1198};
1199
1200static struct ti_clk_fixed_factor ssi_l4_ick_data = {
1201 .parent = "l4_ick",
1202 .div = 1,
1203 .mult = 1,
1204};
1205
1206static struct ti_clk ssi_l4_ick = {
1207 .name = "ssi_l4_ick",
1208 .clkdm_name = "core_l4_clkdm",
1209 .type = TI_CLK_FIXED_FACTOR,
1210 .data = &ssi_l4_ick_data,
1211};
1212
1213static struct ti_clk_gate ssi_ick_3430es1_data = {
1214 .parent = "ssi_l4_ick",
1215 .bit_shift = 0,
1216 .reg = 0xa10,
1217 .module = TI_CLKM_CM,
1218 .flags = CLKF_OMAP3 | CLKF_NO_WAIT | CLKF_INTERFACE,
1219};
1220
1221static struct ti_clk ssi_ick_3430es1 = {
1222 .name = "ssi_ick",
1223 .clkdm_name = "core_l4_clkdm",
1224 .type = TI_CLK_GATE,
1225 .data = &ssi_ick_3430es1_data,
1226};
1227
1228static struct ti_clk_gate i2c2_fck_data = {
1229 .parent = "core_96m_fck",
1230 .bit_shift = 16,
1231 .reg = 0xa00,
1232 .module = TI_CLKM_CM,
1233 .flags = CLKF_WAIT,
1234};
1235
1236static struct ti_clk i2c2_fck = {
1237 .name = "i2c2_fck",
1238 .clkdm_name = "core_l4_clkdm",
1239 .type = TI_CLK_GATE,
1240 .data = &i2c2_fck_data,
1241};
1242
1243static struct ti_clk_divider dpll1_fck_data = {
1244 .parent = "core_ck",
1245 .bit_shift = 19,
1246 .max_div = 7,
1247 .reg = 0x940,
1248 .module = TI_CLKM_CM,
1249 .flags = CLKF_INDEX_STARTS_AT_ONE,
1250};
1251
1252static struct ti_clk dpll1_fck = {
1253 .name = "dpll1_fck",
1254 .type = TI_CLK_DIVIDER,
1255 .data = &dpll1_fck_data,
1256};
1257
1258static const char *dpll1_ck_parents[] = {
1259 "sys_ck",
1260 "dpll1_fck",
1261};
1262
1263static struct ti_clk_dpll dpll1_ck_data = {
1264 .num_parents = ARRAY_SIZE(dpll1_ck_parents),
1265 .control_reg = 0x904,
1266 .idlest_reg = 0x924,
1267 .mult_div1_reg = 0x940,
1268 .autoidle_reg = 0x934,
1269 .module = TI_CLKM_CM,
1270 .parents = dpll1_ck_parents,
1271 .freqsel_mask = 0xf0,
1272 .modes = 0xa0,
1273 .div1_mask = 0x7f,
1274 .idlest_mask = 0x1,
1275 .auto_recal_bit = 0x3,
1276 .max_divider = 0x80,
1277 .min_divider = 0x1,
1278 .recal_en_bit = 0x7,
1279 .max_multiplier = 0x7ff,
1280 .enable_mask = 0x7,
1281 .mult_mask = 0x7ff00,
1282 .recal_st_bit = 0x7,
1283 .autoidle_mask = 0x7,
1284};
1285
1286static struct ti_clk dpll1_ck = {
1287 .name = "dpll1_ck",
1288 .clkdm_name = "dpll1_clkdm",
1289 .type = TI_CLK_DPLL,
1290 .data = &dpll1_ck_data,
1291};
1292
1293static struct ti_clk_fixed secure_32k_fck_data = {
1294 .frequency = 32768,
1295};
1296
1297static struct ti_clk secure_32k_fck = {
1298 .name = "secure_32k_fck",
1299 .type = TI_CLK_FIXED,
1300 .data = &secure_32k_fck_data,
1301};
1302
1303static struct ti_clk_gate gpio5_ick_data = {
1304 .parent = "per_l4_ick",
1305 .bit_shift = 16,
1306 .reg = 0x1010,
1307 .module = TI_CLKM_CM,
1308 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1309};
1310
1311static struct ti_clk gpio5_ick = {
1312 .name = "gpio5_ick",
1313 .clkdm_name = "per_clkdm",
1314 .type = TI_CLK_GATE,
1315 .data = &gpio5_ick_data,
1316};
1317
1318static struct ti_clk_divider dpll4_m4_ck_data = {
1319 .parent = "dpll4_ck",
1320 .max_div = 32,
1321 .reg = 0xe40,
1322 .module = TI_CLKM_CM,
1323 .flags = CLKF_INDEX_STARTS_AT_ONE,
1324};
1325
1326static struct ti_clk dpll4_m4_ck = {
1327 .name = "dpll4_m4_ck",
1328 .type = TI_CLK_DIVIDER,
1329 .data = &dpll4_m4_ck_data,
1330};
1331
1332static struct ti_clk_fixed_factor dpll4_m4x2_mul_ck_data = {
1333 .parent = "dpll4_m4_ck",
1334 .div = 1,
1335 .mult = 2,
1336 .flags = CLKF_SET_RATE_PARENT,
1337};
1338
1339static struct ti_clk dpll4_m4x2_mul_ck = {
1340 .name = "dpll4_m4x2_mul_ck",
1341 .type = TI_CLK_FIXED_FACTOR,
1342 .data = &dpll4_m4x2_mul_ck_data,
1343};
1344
1345static struct ti_clk_gate dpll4_m4x2_ck_data = {
1346 .parent = "dpll4_m4x2_mul_ck",
1347 .bit_shift = 0x1d,
1348 .reg = 0xd00,
1349 .module = TI_CLKM_CM,
1350 .flags = CLKF_SET_RATE_PARENT | CLKF_SET_BIT_TO_DISABLE,
1351};
1352
1353static struct ti_clk dpll4_m4x2_ck = {
1354 .name = "dpll4_m4x2_ck",
1355 .type = TI_CLK_GATE,
1356 .data = &dpll4_m4x2_ck_data,
1357};
1358
1359static struct ti_clk_gate dss1_alwon_fck_3430es2_data = {
1360 .parent = "dpll4_m4x2_ck",
1361 .bit_shift = 0,
1362 .reg = 0xe00,
1363 .module = TI_CLKM_CM,
1364 .flags = CLKF_DSS | CLKF_SET_RATE_PARENT,
1365};
1366
1367static struct ti_clk dss1_alwon_fck_3430es2 = {
1368 .name = "dss1_alwon_fck",
1369 .clkdm_name = "dss_clkdm",
1370 .type = TI_CLK_GATE,
1371 .data = &dss1_alwon_fck_3430es2_data,
1372};
1373
1374static struct ti_clk_gate uart3_ick_data = {
1375 .parent = "per_l4_ick",
1376 .bit_shift = 11,
1377 .reg = 0x1010,
1378 .module = TI_CLKM_CM,
1379 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1380};
1381
1382static struct ti_clk uart3_ick = {
1383 .name = "uart3_ick",
1384 .clkdm_name = "per_clkdm",
1385 .type = TI_CLK_GATE,
1386 .data = &uart3_ick_data,
1387};
1388
1389static struct ti_clk_divider dpll4_m3_ck_data = {
1390 .parent = "dpll4_ck",
1391 .bit_shift = 8,
1392 .max_div = 32,
1393 .reg = 0xe40,
1394 .module = TI_CLKM_CM,
1395 .flags = CLKF_INDEX_STARTS_AT_ONE,
1396};
1397
1398static struct ti_clk dpll4_m3_ck = {
1399 .name = "dpll4_m3_ck",
1400 .type = TI_CLK_DIVIDER,
1401 .data = &dpll4_m3_ck_data,
1402};
1403
1404static struct ti_clk_gate mcbsp3_ick_data = {
1405 .parent = "per_l4_ick",
1406 .bit_shift = 1,
1407 .reg = 0x1010,
1408 .module = TI_CLKM_CM,
1409 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1410};
1411
1412static struct ti_clk mcbsp3_ick = {
1413 .name = "mcbsp3_ick",
1414 .clkdm_name = "per_clkdm",
1415 .type = TI_CLK_GATE,
1416 .data = &mcbsp3_ick_data,
1417};
1418
1419static struct ti_clk_gate gpio3_dbck_data = {
1420 .parent = "per_32k_alwon_fck",
1421 .bit_shift = 14,
1422 .reg = 0x1000,
1423 .module = TI_CLKM_CM,
1424};
1425
1426static struct ti_clk gpio3_dbck = {
1427 .name = "gpio3_dbck",
1428 .clkdm_name = "per_clkdm",
1429 .type = TI_CLK_GATE,
1430 .data = &gpio3_dbck_data,
1431};
1432
1433static struct ti_clk_gate fac_ick_data = {
1434 .parent = "core_l4_ick",
1435 .bit_shift = 8,
1436 .reg = 0xa10,
1437 .module = TI_CLKM_CM,
1438 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1439};
1440
1441static struct ti_clk fac_ick = {
1442 .name = "fac_ick",
1443 .clkdm_name = "core_l4_clkdm",
1444 .type = TI_CLK_GATE,
1445 .data = &fac_ick_data,
1446};
1447
1448static struct ti_clk_gate clkout2_src_gate_ck_data = {
1449 .parent = "core_ck",
1450 .bit_shift = 7,
1451 .reg = 0xd70,
1452 .module = TI_CLKM_CM,
1453 .flags = CLKF_NO_WAIT,
1454};
1455
1456static struct ti_clk_fixed_factor dpll4_m3x2_mul_ck_data = {
1457 .parent = "dpll4_m3_ck",
1458 .div = 1,
1459 .mult = 2,
1460};
1461
1462static struct ti_clk dpll4_m3x2_mul_ck = {
1463 .name = "dpll4_m3x2_mul_ck",
1464 .type = TI_CLK_FIXED_FACTOR,
1465 .data = &dpll4_m3x2_mul_ck_data,
1466};
1467
1468static struct ti_clk_gate dpll4_m3x2_ck_data = {
1469 .parent = "dpll4_m3x2_mul_ck",
1470 .bit_shift = 0x1c,
1471 .reg = 0xd00,
1472 .module = TI_CLKM_CM,
1473 .flags = CLKF_SET_BIT_TO_DISABLE,
1474};
1475
1476static struct ti_clk dpll4_m3x2_ck = {
1477 .name = "dpll4_m3x2_ck",
1478 .type = TI_CLK_GATE,
1479 .data = &dpll4_m3x2_ck_data,
1480};
1481
1482static const char *omap_54m_fck_parents[] = {
1483 "dpll4_m3x2_ck",
1484 "sys_altclk",
1485};
1486
1487static struct ti_clk_mux omap_54m_fck_data = {
1488 .bit_shift = 5,
1489 .num_parents = ARRAY_SIZE(omap_54m_fck_parents),
1490 .reg = 0xd40,
1491 .module = TI_CLKM_CM,
1492 .parents = omap_54m_fck_parents,
1493};
1494
1495static struct ti_clk omap_54m_fck = {
1496 .name = "omap_54m_fck",
1497 .type = TI_CLK_MUX,
1498 .data = &omap_54m_fck_data,
1499};
1500
1501static const char *clkout2_src_mux_ck_parents[] = {
1502 "core_ck",
1503 "sys_ck",
1504 "cm_96m_fck",
1505 "omap_54m_fck",
1506};
1507
1508static struct ti_clk_mux clkout2_src_mux_ck_data = {
1509 .num_parents = ARRAY_SIZE(clkout2_src_mux_ck_parents),
1510 .reg = 0xd70,
1511 .module = TI_CLKM_CM,
1512 .parents = clkout2_src_mux_ck_parents,
1513};
1514
1515static struct ti_clk_composite clkout2_src_ck_data = {
1516 .mux = &clkout2_src_mux_ck_data,
1517 .gate = &clkout2_src_gate_ck_data,
1518};
1519
1520static struct ti_clk clkout2_src_ck = {
1521 .name = "clkout2_src_ck",
1522 .type = TI_CLK_COMPOSITE,
1523 .data = &clkout2_src_ck_data,
1524};
1525
1526static struct ti_clk_gate i2c1_fck_data = {
1527 .parent = "core_96m_fck",
1528 .bit_shift = 15,
1529 .reg = 0xa00,
1530 .module = TI_CLKM_CM,
1531 .flags = CLKF_WAIT,
1532};
1533
1534static struct ti_clk i2c1_fck = {
1535 .name = "i2c1_fck",
1536 .clkdm_name = "core_l4_clkdm",
1537 .type = TI_CLK_GATE,
1538 .data = &i2c1_fck_data,
1539};
1540
1541static struct ti_clk_gate wdt3_fck_data = {
1542 .parent = "per_32k_alwon_fck",
1543 .bit_shift = 12,
1544 .reg = 0x1000,
1545 .module = TI_CLKM_CM,
1546 .flags = CLKF_WAIT,
1547};
1548
1549static struct ti_clk wdt3_fck = {
1550 .name = "wdt3_fck",
1551 .clkdm_name = "per_clkdm",
1552 .type = TI_CLK_GATE,
1553 .data = &wdt3_fck_data,
1554};
1555
1556static struct ti_clk_gate gpt7_gate_fck_data = {
1557 .parent = "sys_ck",
1558 .bit_shift = 8,
1559 .reg = 0x1000,
1560 .module = TI_CLKM_CM,
1561};
1562
1563static const char *gpt7_mux_fck_parents[] = {
1564 "omap_32k_fck",
1565 "sys_ck",
1566};
1567
1568static struct ti_clk_mux gpt7_mux_fck_data = {
1569 .bit_shift = 5,
1570 .num_parents = ARRAY_SIZE(gpt7_mux_fck_parents),
1571 .reg = 0x1040,
1572 .module = TI_CLKM_CM,
1573 .parents = gpt7_mux_fck_parents,
1574};
1575
1576static struct ti_clk_composite gpt7_fck_data = {
1577 .mux = &gpt7_mux_fck_data,
1578 .gate = &gpt7_gate_fck_data,
1579};
1580
1581static struct ti_clk gpt7_fck = {
1582 .name = "gpt7_fck",
1583 .type = TI_CLK_COMPOSITE,
1584 .data = &gpt7_fck_data,
1585};
1586
1587static struct ti_clk_gate usb_l4_gate_ick_data = {
1588 .parent = "l4_ick",
1589 .bit_shift = 5,
1590 .reg = 0xa10,
1591 .module = TI_CLKM_CM,
1592 .flags = CLKF_INTERFACE,
1593};
1594
1595static struct ti_clk_divider usb_l4_div_ick_data = {
1596 .parent = "l4_ick",
1597 .bit_shift = 4,
1598 .max_div = 1,
1599 .reg = 0xa40,
1600 .module = TI_CLKM_CM,
1601 .flags = CLKF_INDEX_STARTS_AT_ONE,
1602};
1603
1604static struct ti_clk_composite usb_l4_ick_data = {
1605 .gate = &usb_l4_gate_ick_data,
1606 .divider = &usb_l4_div_ick_data,
1607};
1608
1609static struct ti_clk usb_l4_ick = {
1610 .name = "usb_l4_ick",
1611 .type = TI_CLK_COMPOSITE,
1612 .data = &usb_l4_ick_data,
1613};
1614
1615static struct ti_clk_gate uart4_ick_data = {
1616 .parent = "per_l4_ick",
1617 .bit_shift = 18,
1618 .reg = 0x1010,
1619 .module = TI_CLKM_CM,
1620 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1621};
1622
1623static struct ti_clk uart4_ick = {
1624 .name = "uart4_ick",
1625 .clkdm_name = "per_clkdm",
1626 .type = TI_CLK_GATE,
1627 .data = &uart4_ick_data,
1628};
1629
1630static struct ti_clk_fixed dummy_ck_data = {
1631 .frequency = 0,
1632};
1633
1634static struct ti_clk dummy_ck = {
1635 .name = "dummy_ck",
1636 .type = TI_CLK_FIXED,
1637 .data = &dummy_ck_data,
1638};
1639
1640static const char *gpt3_mux_fck_parents[] = {
1641 "omap_32k_fck",
1642 "sys_ck",
1643};
1644
1645static struct ti_clk_mux gpt3_mux_fck_data = {
1646 .bit_shift = 1,
1647 .num_parents = ARRAY_SIZE(gpt3_mux_fck_parents),
1648 .reg = 0x1040,
1649 .module = TI_CLKM_CM,
1650 .parents = gpt3_mux_fck_parents,
1651};
1652
1653static struct ti_clk_gate gpt9_ick_data = {
1654 .parent = "per_l4_ick",
1655 .bit_shift = 10,
1656 .reg = 0x1010,
1657 .module = TI_CLKM_CM,
1658 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1659};
1660
1661static struct ti_clk gpt9_ick = {
1662 .name = "gpt9_ick",
1663 .clkdm_name = "per_clkdm",
1664 .type = TI_CLK_GATE,
1665 .data = &gpt9_ick_data,
1666};
1667
1668static struct ti_clk_gate gpt10_gate_fck_data = {
1669 .parent = "sys_ck",
1670 .bit_shift = 11,
1671 .reg = 0xa00,
1672 .module = TI_CLKM_CM,
1673};
1674
1675static struct ti_clk_gate dss_ick_3430es1_data = {
1676 .parent = "l4_ick",
1677 .bit_shift = 0,
1678 .reg = 0xe10,
1679 .module = TI_CLKM_CM,
1680 .flags = CLKF_OMAP3 | CLKF_NO_WAIT | CLKF_INTERFACE,
1681};
1682
1683static struct ti_clk dss_ick_3430es1 = {
1684 .name = "dss_ick",
1685 .clkdm_name = "dss_clkdm",
1686 .type = TI_CLK_GATE,
1687 .data = &dss_ick_3430es1_data,
1688};
1689
1690static struct ti_clk_gate gpt11_ick_data = {
1691 .parent = "core_l4_ick",
1692 .bit_shift = 12,
1693 .reg = 0xa10,
1694 .module = TI_CLKM_CM,
1695 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1696};
1697
1698static struct ti_clk gpt11_ick = {
1699 .name = "gpt11_ick",
1700 .clkdm_name = "core_l4_clkdm",
1701 .type = TI_CLK_GATE,
1702 .data = &gpt11_ick_data,
1703};
1704
1705static struct ti_clk_divider dpll2_fck_data = {
1706 .parent = "core_ck",
1707 .bit_shift = 19,
1708 .max_div = 7,
1709 .reg = 0x40,
1710 .module = TI_CLKM_CM,
1711 .flags = CLKF_INDEX_STARTS_AT_ONE,
1712};
1713
1714static struct ti_clk dpll2_fck = {
1715 .name = "dpll2_fck",
1716 .type = TI_CLK_DIVIDER,
1717 .data = &dpll2_fck_data,
1718};
1719
1720static struct ti_clk_gate uart1_fck_data = {
1721 .parent = "core_48m_fck",
1722 .bit_shift = 13,
1723 .reg = 0xa00,
1724 .module = TI_CLKM_CM,
1725 .flags = CLKF_WAIT,
1726};
1727
1728static struct ti_clk uart1_fck = {
1729 .name = "uart1_fck",
1730 .clkdm_name = "core_l4_clkdm",
1731 .type = TI_CLK_GATE,
1732 .data = &uart1_fck_data,
1733};
1734
1735static struct ti_clk_gate hsotgusb_ick_3430es1_data = {
1736 .parent = "core_l3_ick",
1737 .bit_shift = 4,
1738 .reg = 0xa10,
1739 .module = TI_CLKM_CM,
1740 .flags = CLKF_OMAP3 | CLKF_NO_WAIT | CLKF_INTERFACE,
1741};
1742
1743static struct ti_clk hsotgusb_ick_3430es1 = {
1744 .name = "hsotgusb_ick_3430es1",
1745 .clkdm_name = "core_l3_clkdm",
1746 .type = TI_CLK_GATE,
1747 .data = &hsotgusb_ick_3430es1_data,
1748};
1749
1750static struct ti_clk_gate gpio2_ick_data = {
1751 .parent = "per_l4_ick",
1752 .bit_shift = 13,
1753 .reg = 0x1010,
1754 .module = TI_CLKM_CM,
1755 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1756};
1757
1758static struct ti_clk gpio2_ick = {
1759 .name = "gpio2_ick",
1760 .clkdm_name = "per_clkdm",
1761 .type = TI_CLK_GATE,
1762 .data = &gpio2_ick_data,
1763};
1764
1765static struct ti_clk_gate mmchs1_ick_data = {
1766 .parent = "core_l4_ick",
1767 .bit_shift = 24,
1768 .reg = 0xa10,
1769 .module = TI_CLKM_CM,
1770 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1771};
1772
1773static struct ti_clk mmchs1_ick = {
1774 .name = "mmchs1_ick",
1775 .clkdm_name = "core_l4_clkdm",
1776 .type = TI_CLK_GATE,
1777 .data = &mmchs1_ick_data,
1778};
1779
1780static struct ti_clk_gate modem_fck_data = {
1781 .parent = "sys_ck",
1782 .bit_shift = 31,
1783 .reg = 0xa00,
1784 .module = TI_CLKM_CM,
1785 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1786};
1787
1788static struct ti_clk modem_fck = {
1789 .name = "modem_fck",
1790 .clkdm_name = "d2d_clkdm",
1791 .type = TI_CLK_GATE,
1792 .data = &modem_fck_data,
1793};
1794
1795static struct ti_clk_gate mcbsp4_ick_data = {
1796 .parent = "per_l4_ick",
1797 .bit_shift = 2,
1798 .reg = 0x1010,
1799 .module = TI_CLKM_CM,
1800 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1801};
1802
1803static struct ti_clk mcbsp4_ick = {
1804 .name = "mcbsp4_ick",
1805 .clkdm_name = "per_clkdm",
1806 .type = TI_CLK_GATE,
1807 .data = &mcbsp4_ick_data,
1808};
1809
1810static struct ti_clk_gate gpio1_ick_data = {
1811 .parent = "wkup_l4_ick",
1812 .bit_shift = 3,
1813 .reg = 0xc10,
1814 .module = TI_CLKM_CM,
1815 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
1816};
1817
1818static struct ti_clk gpio1_ick = {
1819 .name = "gpio1_ick",
1820 .clkdm_name = "wkup_clkdm",
1821 .type = TI_CLK_GATE,
1822 .data = &gpio1_ick_data,
1823};
1824
1825static const char *gpt6_mux_fck_parents[] = {
1826 "omap_32k_fck",
1827 "sys_ck",
1828};
1829
1830static struct ti_clk_mux gpt6_mux_fck_data = {
1831 .bit_shift = 4,
1832 .num_parents = ARRAY_SIZE(gpt6_mux_fck_parents),
1833 .reg = 0x1040,
1834 .module = TI_CLKM_CM,
1835 .parents = gpt6_mux_fck_parents,
1836};
1837
1838static struct ti_clk_fixed_factor dpll1_x2_ck_data = {
1839 .parent = "dpll1_ck",
1840 .div = 1,
1841 .mult = 2,
1842};
1843
1844static struct ti_clk dpll1_x2_ck = {
1845 .name = "dpll1_x2_ck",
1846 .type = TI_CLK_FIXED_FACTOR,
1847 .data = &dpll1_x2_ck_data,
1848};
1849
1850static struct ti_clk_divider dpll1_x2m2_ck_data = {
1851 .parent = "dpll1_x2_ck",
1852 .max_div = 31,
1853 .reg = 0x944,
1854 .module = TI_CLKM_CM,
1855 .flags = CLKF_INDEX_STARTS_AT_ONE,
1856};
1857
1858static struct ti_clk dpll1_x2m2_ck = {
1859 .name = "dpll1_x2m2_ck",
1860 .type = TI_CLK_DIVIDER,
1861 .data = &dpll1_x2m2_ck_data,
1862};
1863
1864static struct ti_clk_fixed_factor mpu_ck_data = {
1865 .parent = "dpll1_x2m2_ck",
1866 .div = 1,
1867 .mult = 1,
1868};
1869
1870static struct ti_clk mpu_ck = {
1871 .name = "mpu_ck",
1872 .type = TI_CLK_FIXED_FACTOR,
1873 .data = &mpu_ck_data,
1874};
1875
1876static struct ti_clk_divider arm_fck_data = {
1877 .parent = "mpu_ck",
1878 .max_div = 2,
1879 .reg = 0x924,
1880 .module = TI_CLKM_CM,
1881};
1882
1883static struct ti_clk arm_fck = {
1884 .name = "arm_fck",
1885 .type = TI_CLK_DIVIDER,
1886 .data = &arm_fck_data,
1887};
1888
1889static struct ti_clk_fixed_factor core_d3_ck_data = {
1890 .parent = "core_ck",
1891 .div = 3,
1892 .mult = 1,
1893};
1894
1895static struct ti_clk core_d3_ck = {
1896 .name = "core_d3_ck",
1897 .type = TI_CLK_FIXED_FACTOR,
1898 .data = &core_d3_ck_data,
1899};
1900
1901static struct ti_clk_gate gpt11_gate_fck_data = {
1902 .parent = "sys_ck",
1903 .bit_shift = 12,
1904 .reg = 0xa00,
1905 .module = TI_CLKM_CM,
1906};
1907
1908static const char *gpt11_mux_fck_parents[] = {
1909 "omap_32k_fck",
1910 "sys_ck",
1911};
1912
1913static struct ti_clk_mux gpt11_mux_fck_data = {
1914 .bit_shift = 7,
1915 .num_parents = ARRAY_SIZE(gpt11_mux_fck_parents),
1916 .reg = 0xa40,
1917 .module = TI_CLKM_CM,
1918 .parents = gpt11_mux_fck_parents,
1919};
1920
1921static struct ti_clk_composite gpt11_fck_data = {
1922 .mux = &gpt11_mux_fck_data,
1923 .gate = &gpt11_gate_fck_data,
1924};
1925
1926static struct ti_clk gpt11_fck = {
1927 .name = "gpt11_fck",
1928 .type = TI_CLK_COMPOSITE,
1929 .data = &gpt11_fck_data,
1930};
1931
1932static struct ti_clk_fixed_factor core_d6_ck_data = {
1933 .parent = "core_ck",
1934 .div = 6,
1935 .mult = 1,
1936};
1937
1938static struct ti_clk core_d6_ck = {
1939 .name = "core_d6_ck",
1940 .type = TI_CLK_FIXED_FACTOR,
1941 .data = &core_d6_ck_data,
1942};
1943
1944static struct ti_clk_gate uart4_fck_am35xx_data = {
1945 .parent = "core_48m_fck",
1946 .bit_shift = 23,
1947 .reg = 0xa00,
1948 .module = TI_CLKM_CM,
1949 .flags = CLKF_WAIT,
1950};
1951
1952static struct ti_clk uart4_fck_am35xx = {
1953 .name = "uart4_fck_am35xx",
1954 .clkdm_name = "core_l4_clkdm",
1955 .type = TI_CLK_GATE,
1956 .data = &uart4_fck_am35xx_data,
1957};
1958
1959static struct ti_clk_gate dpll3_m3x2_ck_data = {
1960 .parent = "dpll3_m3x2_mul_ck",
1961 .bit_shift = 0xc,
1962 .reg = 0xd00,
1963 .module = TI_CLKM_CM,
1964 .flags = CLKF_SET_BIT_TO_DISABLE,
1965};
1966
1967static struct ti_clk dpll3_m3x2_ck = {
1968 .name = "dpll3_m3x2_ck",
1969 .type = TI_CLK_GATE,
1970 .data = &dpll3_m3x2_ck_data,
1971};
1972
1973static struct ti_clk_fixed_factor emu_core_alwon_ck_data = {
1974 .parent = "dpll3_m3x2_ck",
1975 .div = 1,
1976 .mult = 1,
1977};
1978
1979static struct ti_clk emu_core_alwon_ck = {
1980 .name = "emu_core_alwon_ck",
1981 .type = TI_CLK_FIXED_FACTOR,
1982 .data = &emu_core_alwon_ck_data,
1983};
1984
1985static struct ti_clk_divider dpll4_m6_ck_data = {
1986 .parent = "dpll4_ck",
1987 .bit_shift = 24,
1988 .max_div = 63,
1989 .reg = 0x1140,
1990 .module = TI_CLKM_CM,
1991 .flags = CLKF_INDEX_STARTS_AT_ONE,
1992};
1993
1994static struct ti_clk dpll4_m6_ck = {
1995 .name = "dpll4_m6_ck",
1996 .type = TI_CLK_DIVIDER,
1997 .data = &dpll4_m6_ck_data,
1998};
1999
2000static struct ti_clk_fixed_factor dpll4_m6x2_mul_ck_data = {
2001 .parent = "dpll4_m6_ck",
2002 .div = 1,
2003 .mult = 2,
2004};
2005
2006static struct ti_clk dpll4_m6x2_mul_ck = {
2007 .name = "dpll4_m6x2_mul_ck",
2008 .type = TI_CLK_FIXED_FACTOR,
2009 .data = &dpll4_m6x2_mul_ck_data,
2010};
2011
2012static struct ti_clk_gate dpll4_m6x2_ck_data = {
2013 .parent = "dpll4_m6x2_mul_ck",
2014 .bit_shift = 0x1f,
2015 .reg = 0xd00,
2016 .module = TI_CLKM_CM,
2017 .flags = CLKF_SET_BIT_TO_DISABLE,
2018};
2019
2020static struct ti_clk dpll4_m6x2_ck = {
2021 .name = "dpll4_m6x2_ck",
2022 .type = TI_CLK_GATE,
2023 .data = &dpll4_m6x2_ck_data,
2024};
2025
2026static struct ti_clk_fixed_factor emu_per_alwon_ck_data = {
2027 .parent = "dpll4_m6x2_ck",
2028 .div = 1,
2029 .mult = 1,
2030};
2031
2032static struct ti_clk emu_per_alwon_ck = {
2033 .name = "emu_per_alwon_ck",
2034 .type = TI_CLK_FIXED_FACTOR,
2035 .data = &emu_per_alwon_ck_data,
2036};
2037
2038static struct ti_clk_fixed_factor emu_mpu_alwon_ck_data = {
2039 .parent = "mpu_ck",
2040 .div = 1,
2041 .mult = 1,
2042};
2043
2044static struct ti_clk emu_mpu_alwon_ck = {
2045 .name = "emu_mpu_alwon_ck",
2046 .type = TI_CLK_FIXED_FACTOR,
2047 .data = &emu_mpu_alwon_ck_data,
2048};
2049
2050static const char *emu_src_mux_ck_parents[] = {
2051 "sys_ck",
2052 "emu_core_alwon_ck",
2053 "emu_per_alwon_ck",
2054 "emu_mpu_alwon_ck",
2055};
2056
2057static struct ti_clk_mux emu_src_mux_ck_data = {
2058 .num_parents = ARRAY_SIZE(emu_src_mux_ck_parents),
2059 .reg = 0x1140,
2060 .module = TI_CLKM_CM,
2061 .parents = emu_src_mux_ck_parents,
2062};
2063
2064static struct ti_clk emu_src_mux_ck = {
2065 .name = "emu_src_mux_ck",
2066 .type = TI_CLK_MUX,
2067 .data = &emu_src_mux_ck_data,
2068};
2069
2070static struct ti_clk_gate emu_src_ck_data = {
2071 .parent = "emu_src_mux_ck",
2072 .flags = CLKF_CLKDM,
2073};
2074
2075static struct ti_clk emu_src_ck = {
2076 .name = "emu_src_ck",
2077 .clkdm_name = "emu_clkdm",
2078 .type = TI_CLK_GATE,
2079 .data = &emu_src_ck_data,
2080};
2081
2082static struct ti_clk_divider atclk_fck_data = {
2083 .parent = "emu_src_ck",
2084 .bit_shift = 4,
2085 .max_div = 3,
2086 .reg = 0x1140,
2087 .module = TI_CLKM_CM,
2088 .flags = CLKF_INDEX_STARTS_AT_ONE,
2089};
2090
2091static struct ti_clk atclk_fck = {
2092 .name = "atclk_fck",
2093 .type = TI_CLK_DIVIDER,
2094 .data = &atclk_fck_data,
2095};
2096
2097static struct ti_clk_gate ipss_ick_data = {
2098 .parent = "core_l3_ick",
2099 .bit_shift = 4,
2100 .reg = 0xa10,
2101 .module = TI_CLKM_CM,
2102 .flags = CLKF_AM35XX | CLKF_INTERFACE,
2103};
2104
2105static struct ti_clk ipss_ick = {
2106 .name = "ipss_ick",
2107 .clkdm_name = "core_l3_clkdm",
2108 .type = TI_CLK_GATE,
2109 .data = &ipss_ick_data,
2110};
2111
2112static struct ti_clk_gate emac_ick_data = {
2113 .parent = "ipss_ick",
2114 .bit_shift = 1,
2115 .reg = 0x59c,
2116 .module = TI_CLKM_SCRM,
2117 .flags = CLKF_AM35XX,
2118};
2119
2120static struct ti_clk emac_ick = {
2121 .name = "emac_ick",
2122 .clkdm_name = "core_l3_clkdm",
2123 .type = TI_CLK_GATE,
2124 .data = &emac_ick_data,
2125};
2126
2127static struct ti_clk_gate vpfe_ick_data = {
2128 .parent = "ipss_ick",
2129 .bit_shift = 2,
2130 .reg = 0x59c,
2131 .module = TI_CLKM_SCRM,
2132 .flags = CLKF_AM35XX,
2133};
2134
2135static struct ti_clk vpfe_ick = {
2136 .name = "vpfe_ick",
2137 .clkdm_name = "core_l3_clkdm",
2138 .type = TI_CLK_GATE,
2139 .data = &vpfe_ick_data,
2140};
2141
2142static const char *dpll2_ck_parents[] = {
2143 "sys_ck",
2144 "dpll2_fck",
2145};
2146
2147static struct ti_clk_dpll dpll2_ck_data = {
2148 .num_parents = ARRAY_SIZE(dpll2_ck_parents),
2149 .control_reg = 0x4,
2150 .idlest_reg = 0x24,
2151 .mult_div1_reg = 0x40,
2152 .autoidle_reg = 0x34,
2153 .module = TI_CLKM_CM,
2154 .parents = dpll2_ck_parents,
2155 .freqsel_mask = 0xf0,
2156 .modes = 0xa2,
2157 .div1_mask = 0x7f,
2158 .idlest_mask = 0x1,
2159 .auto_recal_bit = 0x3,
2160 .max_divider = 0x80,
2161 .min_divider = 0x1,
2162 .recal_en_bit = 0x8,
2163 .max_multiplier = 0x7ff,
2164 .enable_mask = 0x7,
2165 .mult_mask = 0x7ff00,
2166 .recal_st_bit = 0x8,
2167 .autoidle_mask = 0x7,
2168};
2169
2170static struct ti_clk dpll2_ck = {
2171 .name = "dpll2_ck",
2172 .clkdm_name = "dpll2_clkdm",
2173 .type = TI_CLK_DPLL,
2174 .data = &dpll2_ck_data,
2175};
2176
2177static struct ti_clk_divider dpll2_m2_ck_data = {
2178 .parent = "dpll2_ck",
2179 .max_div = 31,
2180 .reg = 0x44,
2181 .module = TI_CLKM_CM,
2182 .flags = CLKF_INDEX_STARTS_AT_ONE,
2183};
2184
2185static struct ti_clk dpll2_m2_ck = {
2186 .name = "dpll2_m2_ck",
2187 .type = TI_CLK_DIVIDER,
2188 .data = &dpll2_m2_ck_data,
2189};
2190
2191static const char *mcbsp4_mux_fck_parents[] = {
2192 "per_96m_fck",
2193 "mcbsp_clks",
2194};
2195
2196static struct ti_clk_mux mcbsp4_mux_fck_data = {
2197 .bit_shift = 2,
2198 .num_parents = ARRAY_SIZE(mcbsp4_mux_fck_parents),
2199 .reg = 0x2d8,
2200 .module = TI_CLKM_SCRM,
2201 .parents = mcbsp4_mux_fck_parents,
2202};
2203
2204static const char *mcbsp1_mux_fck_parents[] = {
2205 "core_96m_fck",
2206 "mcbsp_clks",
2207};
2208
2209static struct ti_clk_mux mcbsp1_mux_fck_data = {
2210 .bit_shift = 2,
2211 .num_parents = ARRAY_SIZE(mcbsp1_mux_fck_parents),
2212 .reg = 0x274,
2213 .module = TI_CLKM_SCRM,
2214 .parents = mcbsp1_mux_fck_parents,
2215};
2216
2217static struct ti_clk_gate gpt8_gate_fck_data = {
2218 .parent = "sys_ck",
2219 .bit_shift = 9,
2220 .reg = 0x1000,
2221 .module = TI_CLKM_CM,
2222};
2223
2224static struct ti_clk_gate gpt8_ick_data = {
2225 .parent = "per_l4_ick",
2226 .bit_shift = 9,
2227 .reg = 0x1010,
2228 .module = TI_CLKM_CM,
2229 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
2230};
2231
2232static struct ti_clk gpt8_ick = {
2233 .name = "gpt8_ick",
2234 .clkdm_name = "per_clkdm",
2235 .type = TI_CLK_GATE,
2236 .data = &gpt8_ick_data,
2237};
2238
2239static const char *gpt10_mux_fck_parents[] = {
2240 "omap_32k_fck",
2241 "sys_ck",
2242};
2243
2244static struct ti_clk_mux gpt10_mux_fck_data = {
2245 .bit_shift = 6,
2246 .num_parents = ARRAY_SIZE(gpt10_mux_fck_parents),
2247 .reg = 0xa40,
2248 .module = TI_CLKM_CM,
2249 .parents = gpt10_mux_fck_parents,
2250};
2251
2252static struct ti_clk_gate mmchs3_ick_data = {
2253 .parent = "core_l4_ick",
2254 .bit_shift = 30,
2255 .reg = 0xa10,
2256 .module = TI_CLKM_CM,
2257 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
2258};
2259
2260static struct ti_clk mmchs3_ick = {
2261 .name = "mmchs3_ick",
2262 .clkdm_name = "core_l4_clkdm",
2263 .type = TI_CLK_GATE,
2264 .data = &mmchs3_ick_data,
2265};
2266
2267static struct ti_clk_gate gpio3_ick_data = {
2268 .parent = "per_l4_ick",
2269 .bit_shift = 14,
2270 .reg = 0x1010,
2271 .module = TI_CLKM_CM,
2272 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
2273};
2274
2275static struct ti_clk gpio3_ick = {
2276 .name = "gpio3_ick",
2277 .clkdm_name = "per_clkdm",
2278 .type = TI_CLK_GATE,
2279 .data = &gpio3_ick_data,
2280};
2281
2282static const char *traceclk_src_fck_parents[] = {
2283 "sys_ck",
2284 "emu_core_alwon_ck",
2285 "emu_per_alwon_ck",
2286 "emu_mpu_alwon_ck",
2287};
2288
2289static struct ti_clk_mux traceclk_src_fck_data = {
2290 .bit_shift = 2,
2291 .num_parents = ARRAY_SIZE(traceclk_src_fck_parents),
2292 .reg = 0x1140,
2293 .module = TI_CLKM_CM,
2294 .parents = traceclk_src_fck_parents,
2295};
2296
2297static struct ti_clk traceclk_src_fck = {
2298 .name = "traceclk_src_fck",
2299 .type = TI_CLK_MUX,
2300 .data = &traceclk_src_fck_data,
2301};
2302
2303static struct ti_clk_divider traceclk_fck_data = {
2304 .parent = "traceclk_src_fck",
2305 .bit_shift = 11,
2306 .max_div = 7,
2307 .reg = 0x1140,
2308 .module = TI_CLKM_CM,
2309 .flags = CLKF_INDEX_STARTS_AT_ONE,
2310};
2311
2312static struct ti_clk traceclk_fck = {
2313 .name = "traceclk_fck",
2314 .type = TI_CLK_DIVIDER,
2315 .data = &traceclk_fck_data,
2316};
2317
2318static struct ti_clk_gate mcbsp5_gate_fck_data = {
2319 .parent = "mcbsp_clks",
2320 .bit_shift = 10,
2321 .reg = 0xa00,
2322 .module = TI_CLKM_CM,
2323};
2324
2325static struct ti_clk_gate sad2d_ick_data = {
2326 .parent = "l3_ick",
2327 .bit_shift = 3,
2328 .reg = 0xa10,
2329 .module = TI_CLKM_CM,
2330 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
2331};
2332
2333static struct ti_clk sad2d_ick = {
2334 .name = "sad2d_ick",
2335 .clkdm_name = "d2d_clkdm",
2336 .type = TI_CLK_GATE,
2337 .data = &sad2d_ick_data,
2338};
2339
2340static const char *gpt1_mux_fck_parents[] = {
2341 "omap_32k_fck",
2342 "sys_ck",
2343};
2344
2345static struct ti_clk_mux gpt1_mux_fck_data = {
2346 .num_parents = ARRAY_SIZE(gpt1_mux_fck_parents),
2347 .reg = 0xc40,
2348 .module = TI_CLKM_CM,
2349 .parents = gpt1_mux_fck_parents,
2350};
2351
2352static struct ti_clk_gate hecc_ck_data = {
2353 .parent = "sys_ck",
2354 .bit_shift = 3,
2355 .reg = 0x59c,
2356 .module = TI_CLKM_SCRM,
2357 .flags = CLKF_AM35XX,
2358};
2359
2360static struct ti_clk hecc_ck = {
2361 .name = "hecc_ck",
2362 .clkdm_name = "core_l3_clkdm",
2363 .type = TI_CLK_GATE,
2364 .data = &hecc_ck_data,
2365};
2366
2367static struct ti_clk_gate gpt1_gate_fck_data = {
2368 .parent = "sys_ck",
2369 .bit_shift = 0,
2370 .reg = 0xc00,
2371 .module = TI_CLKM_CM,
2372};
2373
2374static struct ti_clk_composite gpt1_fck_data = {
2375 .mux = &gpt1_mux_fck_data,
2376 .gate = &gpt1_gate_fck_data,
2377};
2378
2379static struct ti_clk gpt1_fck = {
2380 .name = "gpt1_fck",
2381 .type = TI_CLK_COMPOSITE,
2382 .data = &gpt1_fck_data,
2383};
2384
2385static struct ti_clk_gate dpll4_m2x2_ck_omap36xx_data = {
2386 .parent = "dpll4_m2x2_mul_ck",
2387 .bit_shift = 0x1b,
2388 .reg = 0xd00,
2389 .module = TI_CLKM_CM,
2390 .flags = CLKF_HSDIV | CLKF_SET_BIT_TO_DISABLE,
2391};
2392
2393static struct ti_clk dpll4_m2x2_ck_omap36xx = {
2394 .name = "dpll4_m2x2_ck",
2395 .type = TI_CLK_GATE,
2396 .data = &dpll4_m2x2_ck_omap36xx_data,
2397 .patch = &dpll4_m2x2_ck,
2398};
2399
2400static struct ti_clk_divider gfx_l3_fck_data = {
2401 .parent = "l3_ick",
2402 .max_div = 7,
2403 .reg = 0xb40,
2404 .module = TI_CLKM_CM,
2405 .flags = CLKF_INDEX_STARTS_AT_ONE,
2406};
2407
2408static struct ti_clk gfx_l3_fck = {
2409 .name = "gfx_l3_fck",
2410 .type = TI_CLK_DIVIDER,
2411 .data = &gfx_l3_fck_data,
2412};
2413
2414static struct ti_clk_gate gfx_cg1_ck_data = {
2415 .parent = "gfx_l3_fck",
2416 .bit_shift = 1,
2417 .reg = 0xb00,
2418 .module = TI_CLKM_CM,
2419 .flags = CLKF_WAIT,
2420};
2421
2422static struct ti_clk gfx_cg1_ck = {
2423 .name = "gfx_cg1_ck",
2424 .clkdm_name = "gfx_3430es1_clkdm",
2425 .type = TI_CLK_GATE,
2426 .data = &gfx_cg1_ck_data,
2427};
2428
2429static struct ti_clk_gate mailboxes_ick_data = {
2430 .parent = "core_l4_ick",
2431 .bit_shift = 7,
2432 .reg = 0xa10,
2433 .module = TI_CLKM_CM,
2434 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
2435};
2436
2437static struct ti_clk mailboxes_ick = {
2438 .name = "mailboxes_ick",
2439 .clkdm_name = "core_l4_clkdm",
2440 .type = TI_CLK_GATE,
2441 .data = &mailboxes_ick_data,
2442};
2443
2444static struct ti_clk_gate sha11_ick_data = {
2445 .parent = "security_l4_ick2",
2446 .bit_shift = 1,
2447 .reg = 0xa14,
2448 .module = TI_CLKM_CM,
2449 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
2450};
2451
2452static struct ti_clk sha11_ick = {
2453 .name = "sha11_ick",
2454 .type = TI_CLK_GATE,
2455 .data = &sha11_ick_data,
2456};
2457
2458static struct ti_clk_gate hsotgusb_ick_am35xx_data = {
2459 .parent = "ipss_ick",
2460 .bit_shift = 0,
2461 .reg = 0x59c,
2462 .module = TI_CLKM_SCRM,
2463 .flags = CLKF_AM35XX,
2464};
2465
2466static struct ti_clk hsotgusb_ick_am35xx = {
2467 .name = "hsotgusb_ick_am35xx",
2468 .clkdm_name = "core_l3_clkdm",
2469 .type = TI_CLK_GATE,
2470 .data = &hsotgusb_ick_am35xx_data,
2471};
2472
2473static struct ti_clk_gate mmchs3_fck_data = {
2474 .parent = "core_96m_fck",
2475 .bit_shift = 30,
2476 .reg = 0xa00,
2477 .module = TI_CLKM_CM,
2478 .flags = CLKF_WAIT,
2479};
2480
2481static struct ti_clk mmchs3_fck = {
2482 .name = "mmchs3_fck",
2483 .clkdm_name = "core_l4_clkdm",
2484 .type = TI_CLK_GATE,
2485 .data = &mmchs3_fck_data,
2486};
2487
2488static struct ti_clk_divider pclk_fck_data = {
2489 .parent = "emu_src_ck",
2490 .bit_shift = 8,
2491 .max_div = 7,
2492 .reg = 0x1140,
2493 .module = TI_CLKM_CM,
2494 .flags = CLKF_INDEX_STARTS_AT_ONE,
2495};
2496
2497static struct ti_clk pclk_fck = {
2498 .name = "pclk_fck",
2499 .type = TI_CLK_DIVIDER,
2500 .data = &pclk_fck_data,
2501};
2502
2503static const char *dpll4_ck_omap36xx_parents[] = {
2504 "sys_ck",
2505 "sys_ck",
2506};
2507
2508static struct ti_clk_dpll dpll4_ck_omap36xx_data = {
2509 .num_parents = ARRAY_SIZE(dpll4_ck_omap36xx_parents),
2510 .control_reg = 0xd00,
2511 .idlest_reg = 0xd20,
2512 .mult_div1_reg = 0xd44,
2513 .autoidle_reg = 0xd30,
2514 .module = TI_CLKM_CM,
2515 .parents = dpll4_ck_omap36xx_parents,
2516 .modes = 0x82,
2517 .div1_mask = 0x7f,
2518 .idlest_mask = 0x2,
2519 .auto_recal_bit = 0x13,
2520 .max_divider = 0x80,
2521 .min_divider = 0x1,
2522 .recal_en_bit = 0x6,
2523 .max_multiplier = 0xfff,
2524 .enable_mask = 0x70000,
2525 .mult_mask = 0xfff00,
2526 .recal_st_bit = 0x6,
2527 .autoidle_mask = 0x38,
2528 .sddiv_mask = 0xff000000,
2529 .dco_mask = 0xe00000,
2530 .flags = CLKF_PER | CLKF_J_TYPE,
2531};
2532
2533static struct ti_clk dpll4_ck_omap36xx = {
2534 .name = "dpll4_ck",
2535 .type = TI_CLK_DPLL,
2536 .data = &dpll4_ck_omap36xx_data,
2537 .patch = &dpll4_ck,
2538};
2539
2540static struct ti_clk_gate uart3_fck_data = {
2541 .parent = "per_48m_fck",
2542 .bit_shift = 11,
2543 .reg = 0x1000,
2544 .module = TI_CLKM_CM,
2545 .flags = CLKF_WAIT,
2546};
2547
2548static struct ti_clk uart3_fck = {
2549 .name = "uart3_fck",
2550 .clkdm_name = "per_clkdm",
2551 .type = TI_CLK_GATE,
2552 .data = &uart3_fck_data,
2553};
2554
2555static struct ti_clk_fixed_factor wkup_32k_fck_data = {
2556 .parent = "omap_32k_fck",
2557 .div = 1,
2558 .mult = 1,
2559};
2560
2561static struct ti_clk wkup_32k_fck = {
2562 .name = "wkup_32k_fck",
2563 .type = TI_CLK_FIXED_FACTOR,
2564 .data = &wkup_32k_fck_data,
2565};
2566
2567static struct ti_clk_gate sys_clkout1_data = {
2568 .parent = "osc_sys_ck",
2569 .bit_shift = 7,
2570 .reg = 0xd70,
2571 .module = TI_CLKM_PRM,
2572};
2573
2574static struct ti_clk sys_clkout1 = {
2575 .name = "sys_clkout1",
2576 .type = TI_CLK_GATE,
2577 .data = &sys_clkout1_data,
2578};
2579
2580static struct ti_clk_fixed_factor gpmc_fck_data = {
2581 .parent = "core_l3_ick",
2582 .div = 1,
2583 .mult = 1,
2584};
2585
2586static struct ti_clk gpmc_fck = {
2587 .name = "gpmc_fck",
2588 .type = TI_CLK_FIXED_FACTOR,
2589 .data = &gpmc_fck_data,
2590};
2591
2592static struct ti_clk_fixed_factor dpll5_m2_d20_ck_data = {
2593 .parent = "dpll5_m2_ck",
2594 .div = 20,
2595 .mult = 1,
2596};
2597
2598static struct ti_clk dpll5_m2_d20_ck = {
2599 .name = "dpll5_m2_d20_ck",
2600 .type = TI_CLK_FIXED_FACTOR,
2601 .data = &dpll5_m2_d20_ck_data,
2602};
2603
2604static struct ti_clk_gate dpll4_m5x2_ck_omap36xx_data = {
2605 .parent = "dpll4_m5x2_mul_ck",
2606 .bit_shift = 0x1e,
2607 .reg = 0xd00,
2608 .module = TI_CLKM_CM,
2609 .flags = CLKF_HSDIV | CLKF_SET_RATE_PARENT | CLKF_SET_BIT_TO_DISABLE,
2610};
2611
2612static struct ti_clk dpll4_m5x2_ck_omap36xx = {
2613 .name = "dpll4_m5x2_ck",
2614 .type = TI_CLK_GATE,
2615 .data = &dpll4_m5x2_ck_omap36xx_data,
2616 .patch = &dpll4_m5x2_ck,
2617};
2618
2619static struct ti_clk_gate ssi_ssr_gate_fck_3430es2_data = {
2620 .parent = "corex2_fck",
2621 .bit_shift = 0,
2622 .reg = 0xa00,
2623 .module = TI_CLKM_CM,
2624 .flags = CLKF_NO_WAIT,
2625};
2626
2627static struct ti_clk_gate uart1_ick_data = {
2628 .parent = "core_l4_ick",
2629 .bit_shift = 13,
2630 .reg = 0xa10,
2631 .module = TI_CLKM_CM,
2632 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
2633};
2634
2635static struct ti_clk uart1_ick = {
2636 .name = "uart1_ick",
2637 .clkdm_name = "core_l4_clkdm",
2638 .type = TI_CLK_GATE,
2639 .data = &uart1_ick_data,
2640};
2641
2642static struct ti_clk_gate iva2_ck_data = {
2643 .parent = "dpll2_m2_ck",
2644 .bit_shift = 0,
2645 .reg = 0x0,
2646 .module = TI_CLKM_CM,
2647 .flags = CLKF_WAIT,
2648};
2649
2650static struct ti_clk iva2_ck = {
2651 .name = "iva2_ck",
2652 .clkdm_name = "iva2_clkdm",
2653 .type = TI_CLK_GATE,
2654 .data = &iva2_ck_data,
2655};
2656
2657static struct ti_clk_gate pka_ick_data = {
2658 .parent = "security_l3_ick",
2659 .bit_shift = 4,
2660 .reg = 0xa14,
2661 .module = TI_CLKM_CM,
2662 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
2663};
2664
2665static struct ti_clk pka_ick = {
2666 .name = "pka_ick",
2667 .type = TI_CLK_GATE,
2668 .data = &pka_ick_data,
2669};
2670
2671static struct ti_clk_gate gpt12_ick_data = {
2672 .parent = "wkup_l4_ick",
2673 .bit_shift = 1,
2674 .reg = 0xc10,
2675 .module = TI_CLKM_CM,
2676 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
2677};
2678
2679static struct ti_clk gpt12_ick = {
2680 .name = "gpt12_ick",
2681 .clkdm_name = "wkup_clkdm",
2682 .type = TI_CLK_GATE,
2683 .data = &gpt12_ick_data,
2684};
2685
2686static const char *mcbsp5_mux_fck_parents[] = {
2687 "core_96m_fck",
2688 "mcbsp_clks",
2689};
2690
2691static struct ti_clk_mux mcbsp5_mux_fck_data = {
2692 .bit_shift = 4,
2693 .num_parents = ARRAY_SIZE(mcbsp5_mux_fck_parents),
2694 .reg = 0x2d8,
2695 .module = TI_CLKM_SCRM,
2696 .parents = mcbsp5_mux_fck_parents,
2697};
2698
2699static struct ti_clk_composite mcbsp5_fck_data = {
2700 .mux = &mcbsp5_mux_fck_data,
2701 .gate = &mcbsp5_gate_fck_data,
2702};
2703
2704static struct ti_clk mcbsp5_fck = {
2705 .name = "mcbsp5_fck",
2706 .type = TI_CLK_COMPOSITE,
2707 .data = &mcbsp5_fck_data,
2708};
2709
2710static struct ti_clk_gate usbhost_48m_fck_data = {
2711 .parent = "omap_48m_fck",
2712 .bit_shift = 0,
2713 .reg = 0x1400,
2714 .module = TI_CLKM_CM,
2715 .flags = CLKF_DSS,
2716};
2717
2718static struct ti_clk usbhost_48m_fck = {
2719 .name = "usbhost_48m_fck",
2720 .clkdm_name = "usbhost_clkdm",
2721 .type = TI_CLK_GATE,
2722 .data = &usbhost_48m_fck_data,
2723};
2724
2725static struct ti_clk_gate des1_ick_data = {
2726 .parent = "security_l4_ick2",
2727 .bit_shift = 0,
2728 .reg = 0xa14,
2729 .module = TI_CLKM_CM,
2730 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
2731};
2732
2733static struct ti_clk des1_ick = {
2734 .name = "des1_ick",
2735 .type = TI_CLK_GATE,
2736 .data = &des1_ick_data,
2737};
2738
2739static struct ti_clk_gate sgx_gate_fck_data = {
2740 .parent = "core_ck",
2741 .bit_shift = 1,
2742 .reg = 0xb00,
2743 .module = TI_CLKM_CM,
2744};
2745
2746static struct ti_clk_fixed_factor core_d4_ck_data = {
2747 .parent = "core_ck",
2748 .div = 4,
2749 .mult = 1,
2750};
2751
2752static struct ti_clk core_d4_ck = {
2753 .name = "core_d4_ck",
2754 .type = TI_CLK_FIXED_FACTOR,
2755 .data = &core_d4_ck_data,
2756};
2757
2758static struct ti_clk_fixed_factor omap_192m_alwon_fck_data = {
2759 .parent = "dpll4_m2x2_ck",
2760 .div = 1,
2761 .mult = 1,
2762};
2763
2764static struct ti_clk omap_192m_alwon_fck = {
2765 .name = "omap_192m_alwon_fck",
2766 .type = TI_CLK_FIXED_FACTOR,
2767 .data = &omap_192m_alwon_fck_data,
2768};
2769
2770static struct ti_clk_fixed_factor core_d2_ck_data = {
2771 .parent = "core_ck",
2772 .div = 2,
2773 .mult = 1,
2774};
2775
2776static struct ti_clk core_d2_ck = {
2777 .name = "core_d2_ck",
2778 .type = TI_CLK_FIXED_FACTOR,
2779 .data = &core_d2_ck_data,
2780};
2781
2782static struct ti_clk_fixed_factor corex2_d3_fck_data = {
2783 .parent = "corex2_fck",
2784 .div = 3,
2785 .mult = 1,
2786};
2787
2788static struct ti_clk corex2_d3_fck = {
2789 .name = "corex2_d3_fck",
2790 .type = TI_CLK_FIXED_FACTOR,
2791 .data = &corex2_d3_fck_data,
2792};
2793
2794static struct ti_clk_fixed_factor corex2_d5_fck_data = {
2795 .parent = "corex2_fck",
2796 .div = 5,
2797 .mult = 1,
2798};
2799
2800static struct ti_clk corex2_d5_fck = {
2801 .name = "corex2_d5_fck",
2802 .type = TI_CLK_FIXED_FACTOR,
2803 .data = &corex2_d5_fck_data,
2804};
2805
2806static const char *sgx_mux_fck_parents[] = {
2807 "core_d3_ck",
2808 "core_d4_ck",
2809 "core_d6_ck",
2810 "cm_96m_fck",
2811 "omap_192m_alwon_fck",
2812 "core_d2_ck",
2813 "corex2_d3_fck",
2814 "corex2_d5_fck",
2815};
2816
2817static struct ti_clk_mux sgx_mux_fck_data = {
2818 .num_parents = ARRAY_SIZE(sgx_mux_fck_parents),
2819 .reg = 0xb40,
2820 .module = TI_CLKM_CM,
2821 .parents = sgx_mux_fck_parents,
2822};
2823
2824static struct ti_clk_composite sgx_fck_data = {
2825 .mux = &sgx_mux_fck_data,
2826 .gate = &sgx_gate_fck_data,
2827};
2828
2829static struct ti_clk sgx_fck = {
2830 .name = "sgx_fck",
2831 .type = TI_CLK_COMPOSITE,
2832 .data = &sgx_fck_data,
2833};
2834
2835static struct ti_clk_gate mcspi1_fck_data = {
2836 .parent = "core_48m_fck",
2837 .bit_shift = 18,
2838 .reg = 0xa00,
2839 .module = TI_CLKM_CM,
2840 .flags = CLKF_WAIT,
2841};
2842
2843static struct ti_clk mcspi1_fck = {
2844 .name = "mcspi1_fck",
2845 .clkdm_name = "core_l4_clkdm",
2846 .type = TI_CLK_GATE,
2847 .data = &mcspi1_fck_data,
2848};
2849
2850static struct ti_clk_gate mmchs2_fck_data = {
2851 .parent = "core_96m_fck",
2852 .bit_shift = 25,
2853 .reg = 0xa00,
2854 .module = TI_CLKM_CM,
2855 .flags = CLKF_WAIT,
2856};
2857
2858static struct ti_clk mmchs2_fck = {
2859 .name = "mmchs2_fck",
2860 .clkdm_name = "core_l4_clkdm",
2861 .type = TI_CLK_GATE,
2862 .data = &mmchs2_fck_data,
2863};
2864
2865static struct ti_clk_gate mcspi2_fck_data = {
2866 .parent = "core_48m_fck",
2867 .bit_shift = 19,
2868 .reg = 0xa00,
2869 .module = TI_CLKM_CM,
2870 .flags = CLKF_WAIT,
2871};
2872
2873static struct ti_clk mcspi2_fck = {
2874 .name = "mcspi2_fck",
2875 .clkdm_name = "core_l4_clkdm",
2876 .type = TI_CLK_GATE,
2877 .data = &mcspi2_fck_data,
2878};
2879
2880static struct ti_clk_gate vpfe_fck_data = {
2881 .parent = "pclk_ck",
2882 .bit_shift = 10,
2883 .reg = 0x59c,
2884 .module = TI_CLKM_SCRM,
2885};
2886
2887static struct ti_clk vpfe_fck = {
2888 .name = "vpfe_fck",
2889 .type = TI_CLK_GATE,
2890 .data = &vpfe_fck_data,
2891};
2892
2893static struct ti_clk_gate gpt4_gate_fck_data = {
2894 .parent = "sys_ck",
2895 .bit_shift = 5,
2896 .reg = 0x1000,
2897 .module = TI_CLKM_CM,
2898};
2899
2900static struct ti_clk_gate mcbsp1_gate_fck_data = {
2901 .parent = "mcbsp_clks",
2902 .bit_shift = 9,
2903 .reg = 0xa00,
2904 .module = TI_CLKM_CM,
2905};
2906
2907static struct ti_clk_gate gpt5_gate_fck_data = {
2908 .parent = "sys_ck",
2909 .bit_shift = 6,
2910 .reg = 0x1000,
2911 .module = TI_CLKM_CM,
2912};
2913
2914static const char *gpt5_mux_fck_parents[] = {
2915 "omap_32k_fck",
2916 "sys_ck",
2917};
2918
2919static struct ti_clk_mux gpt5_mux_fck_data = {
2920 .bit_shift = 3,
2921 .num_parents = ARRAY_SIZE(gpt5_mux_fck_parents),
2922 .reg = 0x1040,
2923 .module = TI_CLKM_CM,
2924 .parents = gpt5_mux_fck_parents,
2925};
2926
2927static struct ti_clk_composite gpt5_fck_data = {
2928 .mux = &gpt5_mux_fck_data,
2929 .gate = &gpt5_gate_fck_data,
2930};
2931
2932static struct ti_clk gpt5_fck = {
2933 .name = "gpt5_fck",
2934 .type = TI_CLK_COMPOSITE,
2935 .data = &gpt5_fck_data,
2936};
2937
2938static struct ti_clk_gate ts_fck_data = {
2939 .parent = "omap_32k_fck",
2940 .bit_shift = 1,
2941 .reg = 0xa08,
2942 .module = TI_CLKM_CM,
2943};
2944
2945static struct ti_clk ts_fck = {
2946 .name = "ts_fck",
2947 .clkdm_name = "core_l4_clkdm",
2948 .type = TI_CLK_GATE,
2949 .data = &ts_fck_data,
2950};
2951
2952static struct ti_clk_fixed_factor wdt1_fck_data = {
2953 .parent = "secure_32k_fck",
2954 .div = 1,
2955 .mult = 1,
2956};
2957
2958static struct ti_clk wdt1_fck = {
2959 .name = "wdt1_fck",
2960 .type = TI_CLK_FIXED_FACTOR,
2961 .data = &wdt1_fck_data,
2962};
2963
2964static struct ti_clk_gate dpll4_m6x2_ck_omap36xx_data = {
2965 .parent = "dpll4_m6x2_mul_ck",
2966 .bit_shift = 0x1f,
2967 .reg = 0xd00,
2968 .module = TI_CLKM_CM,
2969 .flags = CLKF_HSDIV | CLKF_SET_BIT_TO_DISABLE,
2970};
2971
2972static struct ti_clk dpll4_m6x2_ck_omap36xx = {
2973 .name = "dpll4_m6x2_ck",
2974 .type = TI_CLK_GATE,
2975 .data = &dpll4_m6x2_ck_omap36xx_data,
2976 .patch = &dpll4_m6x2_ck,
2977};
2978
2979static const char *gpt4_mux_fck_parents[] = {
2980 "omap_32k_fck",
2981 "sys_ck",
2982};
2983
2984static struct ti_clk_mux gpt4_mux_fck_data = {
2985 .bit_shift = 2,
2986 .num_parents = ARRAY_SIZE(gpt4_mux_fck_parents),
2987 .reg = 0x1040,
2988 .module = TI_CLKM_CM,
2989 .parents = gpt4_mux_fck_parents,
2990};
2991
2992static struct ti_clk_gate usbhost_ick_data = {
2993 .parent = "l4_ick",
2994 .bit_shift = 0,
2995 .reg = 0x1410,
2996 .module = TI_CLKM_CM,
2997 .flags = CLKF_DSS | CLKF_OMAP3 | CLKF_INTERFACE,
2998};
2999
3000static struct ti_clk usbhost_ick = {
3001 .name = "usbhost_ick",
3002 .clkdm_name = "usbhost_clkdm",
3003 .type = TI_CLK_GATE,
3004 .data = &usbhost_ick_data,
3005};
3006
3007static struct ti_clk_gate mcbsp2_ick_data = {
3008 .parent = "per_l4_ick",
3009 .bit_shift = 0,
3010 .reg = 0x1010,
3011 .module = TI_CLKM_CM,
3012 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3013};
3014
3015static struct ti_clk mcbsp2_ick = {
3016 .name = "mcbsp2_ick",
3017 .clkdm_name = "per_clkdm",
3018 .type = TI_CLK_GATE,
3019 .data = &mcbsp2_ick_data,
3020};
3021
3022static struct ti_clk_gate omapctrl_ick_data = {
3023 .parent = "core_l4_ick",
3024 .bit_shift = 6,
3025 .reg = 0xa10,
3026 .module = TI_CLKM_CM,
3027 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3028};
3029
3030static struct ti_clk omapctrl_ick = {
3031 .name = "omapctrl_ick",
3032 .clkdm_name = "core_l4_clkdm",
3033 .type = TI_CLK_GATE,
3034 .data = &omapctrl_ick_data,
3035};
3036
3037static struct ti_clk_fixed_factor omap_96m_d4_fck_data = {
3038 .parent = "omap_96m_fck",
3039 .div = 4,
3040 .mult = 1,
3041};
3042
3043static struct ti_clk omap_96m_d4_fck = {
3044 .name = "omap_96m_d4_fck",
3045 .type = TI_CLK_FIXED_FACTOR,
3046 .data = &omap_96m_d4_fck_data,
3047};
3048
3049static struct ti_clk_gate gpt6_ick_data = {
3050 .parent = "per_l4_ick",
3051 .bit_shift = 7,
3052 .reg = 0x1010,
3053 .module = TI_CLKM_CM,
3054 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3055};
3056
3057static struct ti_clk gpt6_ick = {
3058 .name = "gpt6_ick",
3059 .clkdm_name = "per_clkdm",
3060 .type = TI_CLK_GATE,
3061 .data = &gpt6_ick_data,
3062};
3063
3064static struct ti_clk_gate dpll3_m3x2_ck_omap36xx_data = {
3065 .parent = "dpll3_m3x2_mul_ck",
3066 .bit_shift = 0xc,
3067 .reg = 0xd00,
3068 .module = TI_CLKM_CM,
3069 .flags = CLKF_HSDIV | CLKF_SET_BIT_TO_DISABLE,
3070};
3071
3072static struct ti_clk dpll3_m3x2_ck_omap36xx = {
3073 .name = "dpll3_m3x2_ck",
3074 .type = TI_CLK_GATE,
3075 .data = &dpll3_m3x2_ck_omap36xx_data,
3076 .patch = &dpll3_m3x2_ck,
3077};
3078
3079static struct ti_clk_gate i2c3_ick_data = {
3080 .parent = "core_l4_ick",
3081 .bit_shift = 17,
3082 .reg = 0xa10,
3083 .module = TI_CLKM_CM,
3084 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3085};
3086
3087static struct ti_clk i2c3_ick = {
3088 .name = "i2c3_ick",
3089 .clkdm_name = "core_l4_clkdm",
3090 .type = TI_CLK_GATE,
3091 .data = &i2c3_ick_data,
3092};
3093
3094static struct ti_clk_gate gpio6_ick_data = {
3095 .parent = "per_l4_ick",
3096 .bit_shift = 17,
3097 .reg = 0x1010,
3098 .module = TI_CLKM_CM,
3099 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3100};
3101
3102static struct ti_clk gpio6_ick = {
3103 .name = "gpio6_ick",
3104 .clkdm_name = "per_clkdm",
3105 .type = TI_CLK_GATE,
3106 .data = &gpio6_ick_data,
3107};
3108
3109static struct ti_clk_gate mspro_ick_data = {
3110 .parent = "core_l4_ick",
3111 .bit_shift = 23,
3112 .reg = 0xa10,
3113 .module = TI_CLKM_CM,
3114 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3115};
3116
3117static struct ti_clk mspro_ick = {
3118 .name = "mspro_ick",
3119 .clkdm_name = "core_l4_clkdm",
3120 .type = TI_CLK_GATE,
3121 .data = &mspro_ick_data,
3122};
3123
3124static struct ti_clk_composite mcbsp1_fck_data = {
3125 .mux = &mcbsp1_mux_fck_data,
3126 .gate = &mcbsp1_gate_fck_data,
3127};
3128
3129static struct ti_clk mcbsp1_fck = {
3130 .name = "mcbsp1_fck",
3131 .type = TI_CLK_COMPOSITE,
3132 .data = &mcbsp1_fck_data,
3133};
3134
3135static struct ti_clk_gate gpt3_gate_fck_data = {
3136 .parent = "sys_ck",
3137 .bit_shift = 4,
3138 .reg = 0x1000,
3139 .module = TI_CLKM_CM,
3140};
3141
3142static struct ti_clk_fixed rmii_ck_data = {
3143 .frequency = 50000000,
3144};
3145
3146static struct ti_clk rmii_ck = {
3147 .name = "rmii_ck",
3148 .type = TI_CLK_FIXED,
3149 .data = &rmii_ck_data,
3150};
3151
3152static struct ti_clk_gate gpt6_gate_fck_data = {
3153 .parent = "sys_ck",
3154 .bit_shift = 7,
3155 .reg = 0x1000,
3156 .module = TI_CLKM_CM,
3157};
3158
3159static struct ti_clk_composite gpt6_fck_data = {
3160 .mux = &gpt6_mux_fck_data,
3161 .gate = &gpt6_gate_fck_data,
3162};
3163
3164static struct ti_clk gpt6_fck = {
3165 .name = "gpt6_fck",
3166 .type = TI_CLK_COMPOSITE,
3167 .data = &gpt6_fck_data,
3168};
3169
3170static struct ti_clk_fixed_factor dpll5_m2_d4_ck_data = {
3171 .parent = "dpll5_m2_ck",
3172 .div = 4,
3173 .mult = 1,
3174};
3175
3176static struct ti_clk dpll5_m2_d4_ck = {
3177 .name = "dpll5_m2_d4_ck",
3178 .type = TI_CLK_FIXED_FACTOR,
3179 .data = &dpll5_m2_d4_ck_data,
3180};
3181
3182static struct ti_clk_fixed_factor sys_d2_ck_data = {
3183 .parent = "sys_ck",
3184 .div = 2,
3185 .mult = 1,
3186};
3187
3188static struct ti_clk sys_d2_ck = {
3189 .name = "sys_d2_ck",
3190 .type = TI_CLK_FIXED_FACTOR,
3191 .data = &sys_d2_ck_data,
3192};
3193
3194static struct ti_clk_fixed_factor omap_96m_d2_fck_data = {
3195 .parent = "omap_96m_fck",
3196 .div = 2,
3197 .mult = 1,
3198};
3199
3200static struct ti_clk omap_96m_d2_fck = {
3201 .name = "omap_96m_d2_fck",
3202 .type = TI_CLK_FIXED_FACTOR,
3203 .data = &omap_96m_d2_fck_data,
3204};
3205
3206static struct ti_clk_fixed_factor dpll5_m2_d8_ck_data = {
3207 .parent = "dpll5_m2_ck",
3208 .div = 8,
3209 .mult = 1,
3210};
3211
3212static struct ti_clk dpll5_m2_d8_ck = {
3213 .name = "dpll5_m2_d8_ck",
3214 .type = TI_CLK_FIXED_FACTOR,
3215 .data = &dpll5_m2_d8_ck_data,
3216};
3217
3218static struct ti_clk_fixed_factor dpll5_m2_d16_ck_data = {
3219 .parent = "dpll5_m2_ck",
3220 .div = 16,
3221 .mult = 1,
3222};
3223
3224static struct ti_clk dpll5_m2_d16_ck = {
3225 .name = "dpll5_m2_d16_ck",
3226 .type = TI_CLK_FIXED_FACTOR,
3227 .data = &dpll5_m2_d16_ck_data,
3228};
3229
3230static const char *usim_mux_fck_parents[] = {
3231 "sys_ck",
3232 "sys_d2_ck",
3233 "omap_96m_d2_fck",
3234 "omap_96m_d4_fck",
3235 "omap_96m_d8_fck",
3236 "omap_96m_d10_fck",
3237 "dpll5_m2_d4_ck",
3238 "dpll5_m2_d8_ck",
3239 "dpll5_m2_d16_ck",
3240 "dpll5_m2_d20_ck",
3241};
3242
3243static struct ti_clk_mux usim_mux_fck_data = {
3244 .bit_shift = 3,
3245 .num_parents = ARRAY_SIZE(usim_mux_fck_parents),
3246 .reg = 0xc40,
3247 .module = TI_CLKM_CM,
3248 .parents = usim_mux_fck_parents,
3249 .flags = CLKF_INDEX_STARTS_AT_ONE,
3250};
3251
3252static struct ti_clk_composite usim_fck_data = {
3253 .mux = &usim_mux_fck_data,
3254 .gate = &usim_gate_fck_data,
3255};
3256
3257static struct ti_clk usim_fck = {
3258 .name = "usim_fck",
3259 .type = TI_CLK_COMPOSITE,
3260 .data = &usim_fck_data,
3261};
3262
3263static int ssi_ssr_div_fck_3430es2_divs[] = {
3264 0,
3265 1,
3266 2,
3267 3,
3268 4,
3269 0,
3270 6,
3271 0,
3272 8,
3273};
3274
3275static struct ti_clk_divider ssi_ssr_div_fck_3430es2_data = {
3276 .num_dividers = ARRAY_SIZE(ssi_ssr_div_fck_3430es2_divs),
3277 .parent = "corex2_fck",
3278 .bit_shift = 8,
3279 .dividers = ssi_ssr_div_fck_3430es2_divs,
3280 .reg = 0xa40,
3281 .module = TI_CLKM_CM,
3282};
3283
3284static struct ti_clk_composite ssi_ssr_fck_3430es2_data = {
3285 .gate = &ssi_ssr_gate_fck_3430es2_data,
3286 .divider = &ssi_ssr_div_fck_3430es2_data,
3287};
3288
3289static struct ti_clk ssi_ssr_fck_3430es2 = {
3290 .name = "ssi_ssr_fck",
3291 .type = TI_CLK_COMPOSITE,
3292 .data = &ssi_ssr_fck_3430es2_data,
3293};
3294
3295static struct ti_clk_gate dss1_alwon_fck_3430es1_data = {
3296 .parent = "dpll4_m4x2_ck",
3297 .bit_shift = 0,
3298 .reg = 0xe00,
3299 .module = TI_CLKM_CM,
3300 .flags = CLKF_SET_RATE_PARENT,
3301};
3302
3303static struct ti_clk dss1_alwon_fck_3430es1 = {
3304 .name = "dss1_alwon_fck",
3305 .clkdm_name = "dss_clkdm",
3306 .type = TI_CLK_GATE,
3307 .data = &dss1_alwon_fck_3430es1_data,
3308};
3309
3310static struct ti_clk_gate gpt3_ick_data = {
3311 .parent = "per_l4_ick",
3312 .bit_shift = 4,
3313 .reg = 0x1010,
3314 .module = TI_CLKM_CM,
3315 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3316};
3317
3318static struct ti_clk gpt3_ick = {
3319 .name = "gpt3_ick",
3320 .clkdm_name = "per_clkdm",
3321 .type = TI_CLK_GATE,
3322 .data = &gpt3_ick_data,
3323};
3324
3325static struct ti_clk_fixed_factor omap_12m_fck_data = {
3326 .parent = "omap_48m_fck",
3327 .div = 4,
3328 .mult = 1,
3329};
3330
3331static struct ti_clk omap_12m_fck = {
3332 .name = "omap_12m_fck",
3333 .type = TI_CLK_FIXED_FACTOR,
3334 .data = &omap_12m_fck_data,
3335};
3336
3337static struct ti_clk_fixed_factor core_12m_fck_data = {
3338 .parent = "omap_12m_fck",
3339 .div = 1,
3340 .mult = 1,
3341};
3342
3343static struct ti_clk core_12m_fck = {
3344 .name = "core_12m_fck",
3345 .type = TI_CLK_FIXED_FACTOR,
3346 .data = &core_12m_fck_data,
3347};
3348
3349static struct ti_clk_gate hdq_fck_data = {
3350 .parent = "core_12m_fck",
3351 .bit_shift = 22,
3352 .reg = 0xa00,
3353 .module = TI_CLKM_CM,
3354 .flags = CLKF_WAIT,
3355};
3356
3357static struct ti_clk hdq_fck = {
3358 .name = "hdq_fck",
3359 .clkdm_name = "core_l4_clkdm",
3360 .type = TI_CLK_GATE,
3361 .data = &hdq_fck_data,
3362};
3363
3364static struct ti_clk_gate usbtll_fck_data = {
3365 .parent = "dpll5_m2_ck",
3366 .bit_shift = 2,
3367 .reg = 0xa08,
3368 .module = TI_CLKM_CM,
3369 .flags = CLKF_WAIT,
3370};
3371
3372static struct ti_clk usbtll_fck = {
3373 .name = "usbtll_fck",
3374 .clkdm_name = "core_l4_clkdm",
3375 .type = TI_CLK_GATE,
3376 .data = &usbtll_fck_data,
3377};
3378
3379static struct ti_clk_gate hsotgusb_fck_am35xx_data = {
3380 .parent = "sys_ck",
3381 .bit_shift = 8,
3382 .reg = 0x59c,
3383 .module = TI_CLKM_SCRM,
3384};
3385
3386static struct ti_clk hsotgusb_fck_am35xx = {
3387 .name = "hsotgusb_fck_am35xx",
3388 .clkdm_name = "core_l3_clkdm",
3389 .type = TI_CLK_GATE,
3390 .data = &hsotgusb_fck_am35xx_data,
3391};
3392
3393static struct ti_clk_gate hsotgusb_ick_3430es2_data = {
3394 .parent = "core_l3_ick",
3395 .bit_shift = 4,
3396 .reg = 0xa10,
3397 .module = TI_CLKM_CM,
3398 .flags = CLKF_HSOTGUSB | CLKF_OMAP3 | CLKF_INTERFACE,
3399};
3400
3401static struct ti_clk hsotgusb_ick_3430es2 = {
3402 .name = "hsotgusb_ick_3430es2",
3403 .clkdm_name = "core_l3_clkdm",
3404 .type = TI_CLK_GATE,
3405 .data = &hsotgusb_ick_3430es2_data,
3406};
3407
3408static struct ti_clk_gate gfx_l3_ck_data = {
3409 .parent = "l3_ick",
3410 .bit_shift = 0,
3411 .reg = 0xb10,
3412 .module = TI_CLKM_CM,
3413 .flags = CLKF_WAIT,
3414};
3415
3416static struct ti_clk gfx_l3_ck = {
3417 .name = "gfx_l3_ck",
3418 .clkdm_name = "gfx_3430es1_clkdm",
3419 .type = TI_CLK_GATE,
3420 .data = &gfx_l3_ck_data,
3421};
3422
3423static struct ti_clk_fixed_factor gfx_l3_ick_data = {
3424 .parent = "gfx_l3_ck",
3425 .div = 1,
3426 .mult = 1,
3427};
3428
3429static struct ti_clk gfx_l3_ick = {
3430 .name = "gfx_l3_ick",
3431 .type = TI_CLK_FIXED_FACTOR,
3432 .data = &gfx_l3_ick_data,
3433};
3434
3435static struct ti_clk_gate mcbsp1_ick_data = {
3436 .parent = "core_l4_ick",
3437 .bit_shift = 9,
3438 .reg = 0xa10,
3439 .module = TI_CLKM_CM,
3440 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3441};
3442
3443static struct ti_clk mcbsp1_ick = {
3444 .name = "mcbsp1_ick",
3445 .clkdm_name = "core_l4_clkdm",
3446 .type = TI_CLK_GATE,
3447 .data = &mcbsp1_ick_data,
3448};
3449
3450static struct ti_clk_fixed_factor gpt12_fck_data = {
3451 .parent = "secure_32k_fck",
3452 .div = 1,
3453 .mult = 1,
3454};
3455
3456static struct ti_clk gpt12_fck = {
3457 .name = "gpt12_fck",
3458 .type = TI_CLK_FIXED_FACTOR,
3459 .data = &gpt12_fck_data,
3460};
3461
3462static struct ti_clk_gate gfx_cg2_ck_data = {
3463 .parent = "gfx_l3_fck",
3464 .bit_shift = 2,
3465 .reg = 0xb00,
3466 .module = TI_CLKM_CM,
3467 .flags = CLKF_WAIT,
3468};
3469
3470static struct ti_clk gfx_cg2_ck = {
3471 .name = "gfx_cg2_ck",
3472 .clkdm_name = "gfx_3430es1_clkdm",
3473 .type = TI_CLK_GATE,
3474 .data = &gfx_cg2_ck_data,
3475};
3476
3477static struct ti_clk_gate i2c2_ick_data = {
3478 .parent = "core_l4_ick",
3479 .bit_shift = 16,
3480 .reg = 0xa10,
3481 .module = TI_CLKM_CM,
3482 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3483};
3484
3485static struct ti_clk i2c2_ick = {
3486 .name = "i2c2_ick",
3487 .clkdm_name = "core_l4_clkdm",
3488 .type = TI_CLK_GATE,
3489 .data = &i2c2_ick_data,
3490};
3491
3492static struct ti_clk_gate gpio4_dbck_data = {
3493 .parent = "per_32k_alwon_fck",
3494 .bit_shift = 15,
3495 .reg = 0x1000,
3496 .module = TI_CLKM_CM,
3497};
3498
3499static struct ti_clk gpio4_dbck = {
3500 .name = "gpio4_dbck",
3501 .clkdm_name = "per_clkdm",
3502 .type = TI_CLK_GATE,
3503 .data = &gpio4_dbck_data,
3504};
3505
3506static struct ti_clk_gate i2c3_fck_data = {
3507 .parent = "core_96m_fck",
3508 .bit_shift = 17,
3509 .reg = 0xa00,
3510 .module = TI_CLKM_CM,
3511 .flags = CLKF_WAIT,
3512};
3513
3514static struct ti_clk i2c3_fck = {
3515 .name = "i2c3_fck",
3516 .clkdm_name = "core_l4_clkdm",
3517 .type = TI_CLK_GATE,
3518 .data = &i2c3_fck_data,
3519};
3520
3521static struct ti_clk_composite gpt3_fck_data = {
3522 .mux = &gpt3_mux_fck_data,
3523 .gate = &gpt3_gate_fck_data,
3524};
3525
3526static struct ti_clk gpt3_fck = {
3527 .name = "gpt3_fck",
3528 .type = TI_CLK_COMPOSITE,
3529 .data = &gpt3_fck_data,
3530};
3531
3532static struct ti_clk_gate i2c1_ick_data = {
3533 .parent = "core_l4_ick",
3534 .bit_shift = 15,
3535 .reg = 0xa10,
3536 .module = TI_CLKM_CM,
3537 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3538};
3539
3540static struct ti_clk i2c1_ick = {
3541 .name = "i2c1_ick",
3542 .clkdm_name = "core_l4_clkdm",
3543 .type = TI_CLK_GATE,
3544 .data = &i2c1_ick_data,
3545};
3546
3547static struct ti_clk_gate omap_32ksync_ick_data = {
3548 .parent = "wkup_l4_ick",
3549 .bit_shift = 2,
3550 .reg = 0xc10,
3551 .module = TI_CLKM_CM,
3552 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3553};
3554
3555static struct ti_clk omap_32ksync_ick = {
3556 .name = "omap_32ksync_ick",
3557 .clkdm_name = "wkup_clkdm",
3558 .type = TI_CLK_GATE,
3559 .data = &omap_32ksync_ick_data,
3560};
3561
3562static struct ti_clk_gate aes2_ick_data = {
3563 .parent = "core_l4_ick",
3564 .bit_shift = 28,
3565 .reg = 0xa10,
3566 .module = TI_CLKM_CM,
3567 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3568};
3569
3570static struct ti_clk aes2_ick = {
3571 .name = "aes2_ick",
3572 .clkdm_name = "core_l4_clkdm",
3573 .type = TI_CLK_GATE,
3574 .data = &aes2_ick_data,
3575};
3576
3577static const char *gpt8_mux_fck_parents[] = {
3578 "omap_32k_fck",
3579 "sys_ck",
3580};
3581
3582static struct ti_clk_mux gpt8_mux_fck_data = {
3583 .bit_shift = 6,
3584 .num_parents = ARRAY_SIZE(gpt8_mux_fck_parents),
3585 .reg = 0x1040,
3586 .module = TI_CLKM_CM,
3587 .parents = gpt8_mux_fck_parents,
3588};
3589
3590static struct ti_clk_composite gpt8_fck_data = {
3591 .mux = &gpt8_mux_fck_data,
3592 .gate = &gpt8_gate_fck_data,
3593};
3594
3595static struct ti_clk gpt8_fck = {
3596 .name = "gpt8_fck",
3597 .type = TI_CLK_COMPOSITE,
3598 .data = &gpt8_fck_data,
3599};
3600
3601static struct ti_clk_gate mcbsp4_gate_fck_data = {
3602 .parent = "mcbsp_clks",
3603 .bit_shift = 2,
3604 .reg = 0x1000,
3605 .module = TI_CLKM_CM,
3606};
3607
3608static struct ti_clk_composite mcbsp4_fck_data = {
3609 .mux = &mcbsp4_mux_fck_data,
3610 .gate = &mcbsp4_gate_fck_data,
3611};
3612
3613static struct ti_clk mcbsp4_fck = {
3614 .name = "mcbsp4_fck",
3615 .type = TI_CLK_COMPOSITE,
3616 .data = &mcbsp4_fck_data,
3617};
3618
3619static struct ti_clk_gate gpio2_dbck_data = {
3620 .parent = "per_32k_alwon_fck",
3621 .bit_shift = 13,
3622 .reg = 0x1000,
3623 .module = TI_CLKM_CM,
3624};
3625
3626static struct ti_clk gpio2_dbck = {
3627 .name = "gpio2_dbck",
3628 .clkdm_name = "per_clkdm",
3629 .type = TI_CLK_GATE,
3630 .data = &gpio2_dbck_data,
3631};
3632
3633static struct ti_clk_gate usbtll_ick_data = {
3634 .parent = "core_l4_ick",
3635 .bit_shift = 2,
3636 .reg = 0xa18,
3637 .module = TI_CLKM_CM,
3638 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3639};
3640
3641static struct ti_clk usbtll_ick = {
3642 .name = "usbtll_ick",
3643 .clkdm_name = "core_l4_clkdm",
3644 .type = TI_CLK_GATE,
3645 .data = &usbtll_ick_data,
3646};
3647
3648static struct ti_clk_gate mcspi4_ick_data = {
3649 .parent = "core_l4_ick",
3650 .bit_shift = 21,
3651 .reg = 0xa10,
3652 .module = TI_CLKM_CM,
3653 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3654};
3655
3656static struct ti_clk mcspi4_ick = {
3657 .name = "mcspi4_ick",
3658 .clkdm_name = "core_l4_clkdm",
3659 .type = TI_CLK_GATE,
3660 .data = &mcspi4_ick_data,
3661};
3662
3663static struct ti_clk_gate dss_96m_fck_data = {
3664 .parent = "omap_96m_fck",
3665 .bit_shift = 2,
3666 .reg = 0xe00,
3667 .module = TI_CLKM_CM,
3668};
3669
3670static struct ti_clk dss_96m_fck = {
3671 .name = "dss_96m_fck",
3672 .clkdm_name = "dss_clkdm",
3673 .type = TI_CLK_GATE,
3674 .data = &dss_96m_fck_data,
3675};
3676
3677static struct ti_clk_divider rm_ick_data = {
3678 .parent = "l4_ick",
3679 .bit_shift = 1,
3680 .max_div = 3,
3681 .reg = 0xc40,
3682 .module = TI_CLKM_CM,
3683 .flags = CLKF_INDEX_STARTS_AT_ONE,
3684};
3685
3686static struct ti_clk rm_ick = {
3687 .name = "rm_ick",
3688 .type = TI_CLK_DIVIDER,
3689 .data = &rm_ick_data,
3690};
3691
3692static struct ti_clk_gate hdq_ick_data = {
3693 .parent = "core_l4_ick",
3694 .bit_shift = 22,
3695 .reg = 0xa10,
3696 .module = TI_CLKM_CM,
3697 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3698};
3699
3700static struct ti_clk hdq_ick = {
3701 .name = "hdq_ick",
3702 .clkdm_name = "core_l4_clkdm",
3703 .type = TI_CLK_GATE,
3704 .data = &hdq_ick_data,
3705};
3706
3707static struct ti_clk_fixed_factor dpll3_x2_ck_data = {
3708 .parent = "dpll3_ck",
3709 .div = 1,
3710 .mult = 2,
3711};
3712
3713static struct ti_clk dpll3_x2_ck = {
3714 .name = "dpll3_x2_ck",
3715 .type = TI_CLK_FIXED_FACTOR,
3716 .data = &dpll3_x2_ck_data,
3717};
3718
3719static struct ti_clk_gate mad2d_ick_data = {
3720 .parent = "l3_ick",
3721 .bit_shift = 3,
3722 .reg = 0xa18,
3723 .module = TI_CLKM_CM,
3724 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3725};
3726
3727static struct ti_clk mad2d_ick = {
3728 .name = "mad2d_ick",
3729 .clkdm_name = "d2d_clkdm",
3730 .type = TI_CLK_GATE,
3731 .data = &mad2d_ick_data,
3732};
3733
3734static struct ti_clk_gate fshostusb_fck_data = {
3735 .parent = "core_48m_fck",
3736 .bit_shift = 5,
3737 .reg = 0xa00,
3738 .module = TI_CLKM_CM,
3739 .flags = CLKF_WAIT,
3740};
3741
3742static struct ti_clk fshostusb_fck = {
3743 .name = "fshostusb_fck",
3744 .clkdm_name = "core_l4_clkdm",
3745 .type = TI_CLK_GATE,
3746 .data = &fshostusb_fck_data,
3747};
3748
3749static struct ti_clk_gate sr1_fck_data = {
3750 .parent = "sys_ck",
3751 .bit_shift = 6,
3752 .reg = 0xc00,
3753 .module = TI_CLKM_CM,
3754 .flags = CLKF_WAIT,
3755};
3756
3757static struct ti_clk sr1_fck = {
3758 .name = "sr1_fck",
3759 .clkdm_name = "wkup_clkdm",
3760 .type = TI_CLK_GATE,
3761 .data = &sr1_fck_data,
3762};
3763
3764static struct ti_clk_gate des2_ick_data = {
3765 .parent = "core_l4_ick",
3766 .bit_shift = 26,
3767 .reg = 0xa10,
3768 .module = TI_CLKM_CM,
3769 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3770};
3771
3772static struct ti_clk des2_ick = {
3773 .name = "des2_ick",
3774 .clkdm_name = "core_l4_clkdm",
3775 .type = TI_CLK_GATE,
3776 .data = &des2_ick_data,
3777};
3778
3779static struct ti_clk_gate sdrc_ick_data = {
3780 .parent = "core_l3_ick",
3781 .bit_shift = 1,
3782 .reg = 0xa10,
3783 .module = TI_CLKM_CM,
3784 .flags = CLKF_WAIT,
3785};
3786
3787static struct ti_clk sdrc_ick = {
3788 .name = "sdrc_ick",
3789 .clkdm_name = "core_l3_clkdm",
3790 .type = TI_CLK_GATE,
3791 .data = &sdrc_ick_data,
3792};
3793
3794static struct ti_clk_composite gpt4_fck_data = {
3795 .mux = &gpt4_mux_fck_data,
3796 .gate = &gpt4_gate_fck_data,
3797};
3798
3799static struct ti_clk gpt4_fck = {
3800 .name = "gpt4_fck",
3801 .type = TI_CLK_COMPOSITE,
3802 .data = &gpt4_fck_data,
3803};
3804
3805static struct ti_clk_gate dpll4_m3x2_ck_omap36xx_data = {
3806 .parent = "dpll4_m3x2_mul_ck",
3807 .bit_shift = 0x1c,
3808 .reg = 0xd00,
3809 .module = TI_CLKM_CM,
3810 .flags = CLKF_HSDIV | CLKF_SET_BIT_TO_DISABLE,
3811};
3812
3813static struct ti_clk dpll4_m3x2_ck_omap36xx = {
3814 .name = "dpll4_m3x2_ck",
3815 .type = TI_CLK_GATE,
3816 .data = &dpll4_m3x2_ck_omap36xx_data,
3817 .patch = &dpll4_m3x2_ck,
3818};
3819
3820static struct ti_clk_gate cpefuse_fck_data = {
3821 .parent = "sys_ck",
3822 .bit_shift = 0,
3823 .reg = 0xa08,
3824 .module = TI_CLKM_CM,
3825};
3826
3827static struct ti_clk cpefuse_fck = {
3828 .name = "cpefuse_fck",
3829 .clkdm_name = "core_l4_clkdm",
3830 .type = TI_CLK_GATE,
3831 .data = &cpefuse_fck_data,
3832};
3833
3834static struct ti_clk_gate mcspi3_ick_data = {
3835 .parent = "core_l4_ick",
3836 .bit_shift = 20,
3837 .reg = 0xa10,
3838 .module = TI_CLKM_CM,
3839 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3840};
3841
3842static struct ti_clk mcspi3_ick = {
3843 .name = "mcspi3_ick",
3844 .clkdm_name = "core_l4_clkdm",
3845 .type = TI_CLK_GATE,
3846 .data = &mcspi3_ick_data,
3847};
3848
3849static struct ti_clk_fixed_factor ssi_sst_fck_3430es2_data = {
3850 .parent = "ssi_ssr_fck",
3851 .div = 2,
3852 .mult = 1,
3853};
3854
3855static struct ti_clk ssi_sst_fck_3430es2 = {
3856 .name = "ssi_sst_fck",
3857 .type = TI_CLK_FIXED_FACTOR,
3858 .data = &ssi_sst_fck_3430es2_data,
3859};
3860
3861static struct ti_clk_gate gpio1_dbck_data = {
3862 .parent = "wkup_32k_fck",
3863 .bit_shift = 3,
3864 .reg = 0xc00,
3865 .module = TI_CLKM_CM,
3866};
3867
3868static struct ti_clk gpio1_dbck = {
3869 .name = "gpio1_dbck",
3870 .clkdm_name = "wkup_clkdm",
3871 .type = TI_CLK_GATE,
3872 .data = &gpio1_dbck_data,
3873};
3874
3875static struct ti_clk_gate gpt4_ick_data = {
3876 .parent = "per_l4_ick",
3877 .bit_shift = 5,
3878 .reg = 0x1010,
3879 .module = TI_CLKM_CM,
3880 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3881};
3882
3883static struct ti_clk gpt4_ick = {
3884 .name = "gpt4_ick",
3885 .clkdm_name = "per_clkdm",
3886 .type = TI_CLK_GATE,
3887 .data = &gpt4_ick_data,
3888};
3889
3890static struct ti_clk_gate gpt2_ick_data = {
3891 .parent = "per_l4_ick",
3892 .bit_shift = 3,
3893 .reg = 0x1010,
3894 .module = TI_CLKM_CM,
3895 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3896};
3897
3898static struct ti_clk gpt2_ick = {
3899 .name = "gpt2_ick",
3900 .clkdm_name = "per_clkdm",
3901 .type = TI_CLK_GATE,
3902 .data = &gpt2_ick_data,
3903};
3904
3905static struct ti_clk_gate mmchs1_fck_data = {
3906 .parent = "core_96m_fck",
3907 .bit_shift = 24,
3908 .reg = 0xa00,
3909 .module = TI_CLKM_CM,
3910 .flags = CLKF_WAIT,
3911};
3912
3913static struct ti_clk mmchs1_fck = {
3914 .name = "mmchs1_fck",
3915 .clkdm_name = "core_l4_clkdm",
3916 .type = TI_CLK_GATE,
3917 .data = &mmchs1_fck_data,
3918};
3919
3920static struct ti_clk_fixed dummy_apb_pclk_data = {
3921 .frequency = 0x0,
3922};
3923
3924static struct ti_clk dummy_apb_pclk = {
3925 .name = "dummy_apb_pclk",
3926 .type = TI_CLK_FIXED,
3927 .data = &dummy_apb_pclk_data,
3928};
3929
3930static struct ti_clk_gate gpio6_dbck_data = {
3931 .parent = "per_32k_alwon_fck",
3932 .bit_shift = 17,
3933 .reg = 0x1000,
3934 .module = TI_CLKM_CM,
3935};
3936
3937static struct ti_clk gpio6_dbck = {
3938 .name = "gpio6_dbck",
3939 .clkdm_name = "per_clkdm",
3940 .type = TI_CLK_GATE,
3941 .data = &gpio6_dbck_data,
3942};
3943
3944static struct ti_clk_gate uart2_ick_data = {
3945 .parent = "core_l4_ick",
3946 .bit_shift = 14,
3947 .reg = 0xa10,
3948 .module = TI_CLKM_CM,
3949 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3950};
3951
3952static struct ti_clk uart2_ick = {
3953 .name = "uart2_ick",
3954 .clkdm_name = "core_l4_clkdm",
3955 .type = TI_CLK_GATE,
3956 .data = &uart2_ick_data,
3957};
3958
3959static struct ti_clk_fixed_factor dpll4_x2_ck_data = {
3960 .parent = "dpll4_ck",
3961 .div = 1,
3962 .mult = 2,
3963};
3964
3965static struct ti_clk dpll4_x2_ck = {
3966 .name = "dpll4_x2_ck",
3967 .type = TI_CLK_FIXED_FACTOR,
3968 .data = &dpll4_x2_ck_data,
3969};
3970
3971static struct ti_clk_gate gpt7_ick_data = {
3972 .parent = "per_l4_ick",
3973 .bit_shift = 8,
3974 .reg = 0x1010,
3975 .module = TI_CLKM_CM,
3976 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
3977};
3978
3979static struct ti_clk gpt7_ick = {
3980 .name = "gpt7_ick",
3981 .clkdm_name = "per_clkdm",
3982 .type = TI_CLK_GATE,
3983 .data = &gpt7_ick_data,
3984};
3985
3986static struct ti_clk_gate dss_tv_fck_data = {
3987 .parent = "omap_54m_fck",
3988 .bit_shift = 2,
3989 .reg = 0xe00,
3990 .module = TI_CLKM_CM,
3991};
3992
3993static struct ti_clk dss_tv_fck = {
3994 .name = "dss_tv_fck",
3995 .clkdm_name = "dss_clkdm",
3996 .type = TI_CLK_GATE,
3997 .data = &dss_tv_fck_data,
3998};
3999
4000static struct ti_clk_gate mcbsp5_ick_data = {
4001 .parent = "core_l4_ick",
4002 .bit_shift = 10,
4003 .reg = 0xa10,
4004 .module = TI_CLKM_CM,
4005 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
4006};
4007
4008static struct ti_clk mcbsp5_ick = {
4009 .name = "mcbsp5_ick",
4010 .clkdm_name = "core_l4_clkdm",
4011 .type = TI_CLK_GATE,
4012 .data = &mcbsp5_ick_data,
4013};
4014
4015static struct ti_clk_gate mcspi1_ick_data = {
4016 .parent = "core_l4_ick",
4017 .bit_shift = 18,
4018 .reg = 0xa10,
4019 .module = TI_CLKM_CM,
4020 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
4021};
4022
4023static struct ti_clk mcspi1_ick = {
4024 .name = "mcspi1_ick",
4025 .clkdm_name = "core_l4_clkdm",
4026 .type = TI_CLK_GATE,
4027 .data = &mcspi1_ick_data,
4028};
4029
4030static struct ti_clk_gate d2d_26m_fck_data = {
4031 .parent = "sys_ck",
4032 .bit_shift = 3,
4033 .reg = 0xa00,
4034 .module = TI_CLKM_CM,
4035 .flags = CLKF_WAIT,
4036};
4037
4038static struct ti_clk d2d_26m_fck = {
4039 .name = "d2d_26m_fck",
4040 .clkdm_name = "d2d_clkdm",
4041 .type = TI_CLK_GATE,
4042 .data = &d2d_26m_fck_data,
4043};
4044
4045static struct ti_clk_gate wdt3_ick_data = {
4046 .parent = "per_l4_ick",
4047 .bit_shift = 12,
4048 .reg = 0x1010,
4049 .module = TI_CLKM_CM,
4050 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
4051};
4052
4053static struct ti_clk wdt3_ick = {
4054 .name = "wdt3_ick",
4055 .clkdm_name = "per_clkdm",
4056 .type = TI_CLK_GATE,
4057 .data = &wdt3_ick_data,
4058};
4059
4060static struct ti_clk_divider pclkx2_fck_data = {
4061 .parent = "emu_src_ck",
4062 .bit_shift = 6,
4063 .max_div = 3,
4064 .reg = 0x1140,
4065 .module = TI_CLKM_CM,
4066 .flags = CLKF_INDEX_STARTS_AT_ONE,
4067};
4068
4069static struct ti_clk pclkx2_fck = {
4070 .name = "pclkx2_fck",
4071 .type = TI_CLK_DIVIDER,
4072 .data = &pclkx2_fck_data,
4073};
4074
4075static struct ti_clk_gate sha12_ick_data = {
4076 .parent = "core_l4_ick",
4077 .bit_shift = 27,
4078 .reg = 0xa10,
4079 .module = TI_CLKM_CM,
4080 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
4081};
4082
4083static struct ti_clk sha12_ick = {
4084 .name = "sha12_ick",
4085 .clkdm_name = "core_l4_clkdm",
4086 .type = TI_CLK_GATE,
4087 .data = &sha12_ick_data,
4088};
4089
4090static struct ti_clk_gate emac_fck_data = {
4091 .parent = "rmii_ck",
4092 .bit_shift = 9,
4093 .reg = 0x59c,
4094 .module = TI_CLKM_SCRM,
4095};
4096
4097static struct ti_clk emac_fck = {
4098 .name = "emac_fck",
4099 .type = TI_CLK_GATE,
4100 .data = &emac_fck_data,
4101};
4102
4103static struct ti_clk_composite gpt10_fck_data = {
4104 .mux = &gpt10_mux_fck_data,
4105 .gate = &gpt10_gate_fck_data,
4106};
4107
4108static struct ti_clk gpt10_fck = {
4109 .name = "gpt10_fck",
4110 .type = TI_CLK_COMPOSITE,
4111 .data = &gpt10_fck_data,
4112};
4113
4114static struct ti_clk_gate wdt2_fck_data = {
4115 .parent = "wkup_32k_fck",
4116 .bit_shift = 5,
4117 .reg = 0xc00,
4118 .module = TI_CLKM_CM,
4119 .flags = CLKF_WAIT,
4120};
4121
4122static struct ti_clk wdt2_fck = {
4123 .name = "wdt2_fck",
4124 .clkdm_name = "wkup_clkdm",
4125 .type = TI_CLK_GATE,
4126 .data = &wdt2_fck_data,
4127};
4128
4129static struct ti_clk_gate cam_ick_data = {
4130 .parent = "l4_ick",
4131 .bit_shift = 0,
4132 .reg = 0xf10,
4133 .module = TI_CLKM_CM,
4134 .flags = CLKF_OMAP3 | CLKF_NO_WAIT | CLKF_INTERFACE,
4135};
4136
4137static struct ti_clk cam_ick = {
4138 .name = "cam_ick",
4139 .clkdm_name = "cam_clkdm",
4140 .type = TI_CLK_GATE,
4141 .data = &cam_ick_data,
4142};
4143
4144static struct ti_clk_gate ssi_ick_3430es2_data = {
4145 .parent = "ssi_l4_ick",
4146 .bit_shift = 0,
4147 .reg = 0xa10,
4148 .module = TI_CLKM_CM,
4149 .flags = CLKF_SSI | CLKF_OMAP3 | CLKF_INTERFACE,
4150};
4151
4152static struct ti_clk ssi_ick_3430es2 = {
4153 .name = "ssi_ick",
4154 .clkdm_name = "core_l4_clkdm",
4155 .type = TI_CLK_GATE,
4156 .data = &ssi_ick_3430es2_data,
4157};
4158
4159static struct ti_clk_gate gpio4_ick_data = {
4160 .parent = "per_l4_ick",
4161 .bit_shift = 15,
4162 .reg = 0x1010,
4163 .module = TI_CLKM_CM,
4164 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
4165};
4166
4167static struct ti_clk gpio4_ick = {
4168 .name = "gpio4_ick",
4169 .clkdm_name = "per_clkdm",
4170 .type = TI_CLK_GATE,
4171 .data = &gpio4_ick_data,
4172};
4173
4174static struct ti_clk_gate wdt1_ick_data = {
4175 .parent = "wkup_l4_ick",
4176 .bit_shift = 4,
4177 .reg = 0xc10,
4178 .module = TI_CLKM_CM,
4179 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
4180};
4181
4182static struct ti_clk wdt1_ick = {
4183 .name = "wdt1_ick",
4184 .clkdm_name = "wkup_clkdm",
4185 .type = TI_CLK_GATE,
4186 .data = &wdt1_ick_data,
4187};
4188
4189static struct ti_clk_gate rng_ick_data = {
4190 .parent = "security_l4_ick2",
4191 .bit_shift = 2,
4192 .reg = 0xa14,
4193 .module = TI_CLKM_CM,
4194 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
4195};
4196
4197static struct ti_clk rng_ick = {
4198 .name = "rng_ick",
4199 .type = TI_CLK_GATE,
4200 .data = &rng_ick_data,
4201};
4202
4203static struct ti_clk_gate icr_ick_data = {
4204 .parent = "core_l4_ick",
4205 .bit_shift = 29,
4206 .reg = 0xa10,
4207 .module = TI_CLKM_CM,
4208 .flags = CLKF_OMAP3 | CLKF_INTERFACE,
4209};
4210
4211static struct ti_clk icr_ick = {
4212 .name = "icr_ick",
4213 .clkdm_name = "core_l4_clkdm",
4214 .type = TI_CLK_GATE,
4215 .data = &icr_ick_data,
4216};
4217
4218static struct ti_clk_gate sgx_ick_data = {
4219 .parent = "l3_ick",
4220 .bit_shift = 0,
4221 .reg = 0xb10,
4222 .module = TI_CLKM_CM,
4223 .flags = CLKF_WAIT,
4224};
4225
4226static struct ti_clk sgx_ick = {
4227 .name = "sgx_ick",
4228 .clkdm_name = "sgx_clkdm",
4229 .type = TI_CLK_GATE,
4230 .data = &sgx_ick_data,
4231};
4232
4233static struct ti_clk_divider sys_clkout2_data = {
4234 .parent = "clkout2_src_ck",
4235 .bit_shift = 3,
4236 .max_div = 64,
4237 .reg = 0xd70,
4238 .module = TI_CLKM_CM,
4239 .flags = CLKF_INDEX_POWER_OF_TWO,
4240};
4241
4242static struct ti_clk sys_clkout2 = {
4243 .name = "sys_clkout2",
4244 .type = TI_CLK_DIVIDER,
4245 .data = &sys_clkout2_data,
4246};
4247
4248static struct ti_clk_alias omap34xx_omap36xx_clks[] = {
4249 CLK(NULL, "security_l4_ick2", &security_l4_ick2),
4250 CLK(NULL, "aes1_ick", &aes1_ick),
4251 CLK("omap_rng", "ick", &rng_ick),
4252 CLK("omap3-rom-rng", "ick", &rng_ick),
4253 CLK(NULL, "sha11_ick", &sha11_ick),
4254 CLK(NULL, "des1_ick", &des1_ick),
4255 CLK(NULL, "cam_mclk", &cam_mclk),
4256 CLK(NULL, "cam_ick", &cam_ick),
4257 CLK(NULL, "csi2_96m_fck", &csi2_96m_fck),
4258 CLK(NULL, "security_l3_ick", &security_l3_ick),
4259 CLK(NULL, "pka_ick", &pka_ick),
4260 CLK(NULL, "icr_ick", &icr_ick),
4261 CLK(NULL, "des2_ick", &des2_ick),
4262 CLK(NULL, "mspro_ick", &mspro_ick),
4263 CLK(NULL, "mailboxes_ick", &mailboxes_ick),
4264 CLK(NULL, "ssi_l4_ick", &ssi_l4_ick),
4265 CLK(NULL, "sr1_fck", &sr1_fck),
4266 CLK(NULL, "sr2_fck", &sr2_fck),
4267 CLK(NULL, "sr_l4_ick", &sr_l4_ick),
4268 CLK(NULL, "dpll2_fck", &dpll2_fck),
4269 CLK(NULL, "dpll2_ck", &dpll2_ck),
4270 CLK(NULL, "dpll2_m2_ck", &dpll2_m2_ck),
4271 CLK(NULL, "iva2_ck", &iva2_ck),
4272 CLK(NULL, "modem_fck", &modem_fck),
4273 CLK(NULL, "sad2d_ick", &sad2d_ick),
4274 CLK(NULL, "mad2d_ick", &mad2d_ick),
4275 CLK(NULL, "mspro_fck", &mspro_fck),
4276 { NULL },
4277};
4278
4279static struct ti_clk_alias omap36xx_omap3430es2plus_clks[] = {
4280 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es2),
4281 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es2),
4282 CLK("musb-omap2430", "ick", &hsotgusb_ick_3430es2),
4283 CLK(NULL, "hsotgusb_ick", &hsotgusb_ick_3430es2),
4284 CLK(NULL, "ssi_ick", &ssi_ick_3430es2),
4285 CLK(NULL, "sys_d2_ck", &sys_d2_ck),
4286 CLK(NULL, "omap_96m_d2_fck", &omap_96m_d2_fck),
4287 CLK(NULL, "omap_96m_d4_fck", &omap_96m_d4_fck),
4288 CLK(NULL, "omap_96m_d8_fck", &omap_96m_d8_fck),
4289 CLK(NULL, "omap_96m_d10_fck", &omap_96m_d10_fck),
4290 CLK(NULL, "dpll5_m2_d4_ck", &dpll5_m2_d4_ck),
4291 CLK(NULL, "dpll5_m2_d8_ck", &dpll5_m2_d8_ck),
4292 CLK(NULL, "dpll5_m2_d16_ck", &dpll5_m2_d16_ck),
4293 CLK(NULL, "dpll5_m2_d20_ck", &dpll5_m2_d20_ck),
4294 CLK(NULL, "usim_fck", &usim_fck),
4295 CLK(NULL, "usim_ick", &usim_ick),
4296 { NULL },
4297};
4298
4299static struct ti_clk_alias omap3xxx_clks[] = {
4300 CLK(NULL, "apb_pclk", &dummy_apb_pclk),
4301 CLK(NULL, "omap_32k_fck", &omap_32k_fck),
4302 CLK(NULL, "virt_12m_ck", &virt_12m_ck),
4303 CLK(NULL, "virt_13m_ck", &virt_13m_ck),
4304 CLK(NULL, "virt_19200000_ck", &virt_19200000_ck),
4305 CLK(NULL, "virt_26000000_ck", &virt_26000000_ck),
4306 CLK(NULL, "virt_38_4m_ck", &virt_38_4m_ck),
4307 CLK(NULL, "virt_16_8m_ck", &virt_16_8m_ck),
4308 CLK(NULL, "osc_sys_ck", &osc_sys_ck),
4309 CLK("twl", "fck", &osc_sys_ck),
4310 CLK(NULL, "sys_ck", &sys_ck),
4311 CLK(NULL, "timer_sys_ck", &sys_ck),
4312 CLK(NULL, "dpll4_ck", &dpll4_ck),
4313 CLK(NULL, "dpll4_m2_ck", &dpll4_m2_ck),
4314 CLK(NULL, "dpll4_m2x2_mul_ck", &dpll4_m2x2_mul_ck),
4315 CLK(NULL, "dpll4_m2x2_ck", &dpll4_m2x2_ck),
4316 CLK(NULL, "omap_96m_alwon_fck", &omap_96m_alwon_fck),
4317 CLK(NULL, "dpll3_ck", &dpll3_ck),
4318 CLK(NULL, "dpll3_m3_ck", &dpll3_m3_ck),
4319 CLK(NULL, "dpll3_m3x2_mul_ck", &dpll3_m3x2_mul_ck),
4320 CLK(NULL, "dpll3_m3x2_ck", &dpll3_m3x2_ck),
4321 CLK("etb", "emu_core_alwon_ck", &emu_core_alwon_ck),
4322 CLK(NULL, "sys_altclk", &sys_altclk),
4323 CLK(NULL, "mcbsp_clks", &mcbsp_clks),
4324 CLK(NULL, "sys_clkout1", &sys_clkout1),
4325 CLK(NULL, "dpll3_m2_ck", &dpll3_m2_ck),
4326 CLK(NULL, "core_ck", &core_ck),
4327 CLK(NULL, "dpll1_fck", &dpll1_fck),
4328 CLK(NULL, "dpll1_ck", &dpll1_ck),
4329 CLK(NULL, "cpufreq_ck", &dpll1_ck),
4330 CLK(NULL, "dpll1_x2_ck", &dpll1_x2_ck),
4331 CLK(NULL, "dpll1_x2m2_ck", &dpll1_x2m2_ck),
4332 CLK(NULL, "dpll3_x2_ck", &dpll3_x2_ck),
4333 CLK(NULL, "dpll3_m2x2_ck", &dpll3_m2x2_ck),
4334 CLK(NULL, "dpll4_x2_ck", &dpll4_x2_ck),
4335 CLK(NULL, "cm_96m_fck", &cm_96m_fck),
4336 CLK(NULL, "omap_96m_fck", &omap_96m_fck),
4337 CLK(NULL, "dpll4_m3_ck", &dpll4_m3_ck),
4338 CLK(NULL, "dpll4_m3x2_mul_ck", &dpll4_m3x2_mul_ck),
4339 CLK(NULL, "dpll4_m3x2_ck", &dpll4_m3x2_ck),
4340 CLK(NULL, "omap_54m_fck", &omap_54m_fck),
4341 CLK(NULL, "cm_96m_d2_fck", &cm_96m_d2_fck),
4342 CLK(NULL, "omap_48m_fck", &omap_48m_fck),
4343 CLK(NULL, "omap_12m_fck", &omap_12m_fck),
4344 CLK(NULL, "dpll4_m4_ck", &dpll4_m4_ck),
4345 CLK(NULL, "dpll4_m4x2_mul_ck", &dpll4_m4x2_mul_ck),
4346 CLK(NULL, "dpll4_m4x2_ck", &dpll4_m4x2_ck),
4347 CLK(NULL, "dpll4_m5_ck", &dpll4_m5_ck),
4348 CLK(NULL, "dpll4_m5x2_mul_ck", &dpll4_m5x2_mul_ck),
4349 CLK(NULL, "dpll4_m5x2_ck", &dpll4_m5x2_ck),
4350 CLK(NULL, "dpll4_m6_ck", &dpll4_m6_ck),
4351 CLK(NULL, "dpll4_m6x2_mul_ck", &dpll4_m6x2_mul_ck),
4352 CLK(NULL, "dpll4_m6x2_ck", &dpll4_m6x2_ck),
4353 CLK("etb", "emu_per_alwon_ck", &emu_per_alwon_ck),
4354 CLK(NULL, "clkout2_src_ck", &clkout2_src_ck),
4355 CLK(NULL, "sys_clkout2", &sys_clkout2),
4356 CLK(NULL, "corex2_fck", &corex2_fck),
4357 CLK(NULL, "mpu_ck", &mpu_ck),
4358 CLK(NULL, "arm_fck", &arm_fck),
4359 CLK("etb", "emu_mpu_alwon_ck", &emu_mpu_alwon_ck),
4360 CLK(NULL, "l3_ick", &l3_ick),
4361 CLK(NULL, "l4_ick", &l4_ick),
4362 CLK(NULL, "rm_ick", &rm_ick),
4363 CLK(NULL, "timer_32k_ck", &omap_32k_fck),
4364 CLK(NULL, "gpt10_fck", &gpt10_fck),
4365 CLK(NULL, "gpt11_fck", &gpt11_fck),
4366 CLK(NULL, "core_96m_fck", &core_96m_fck),
4367 CLK(NULL, "mmchs2_fck", &mmchs2_fck),
4368 CLK(NULL, "mmchs1_fck", &mmchs1_fck),
4369 CLK(NULL, "i2c3_fck", &i2c3_fck),
4370 CLK(NULL, "i2c2_fck", &i2c2_fck),
4371 CLK(NULL, "i2c1_fck", &i2c1_fck),
4372 CLK(NULL, "mcbsp5_fck", &mcbsp5_fck),
4373 CLK(NULL, "mcbsp1_fck", &mcbsp1_fck),
4374 CLK(NULL, "core_48m_fck", &core_48m_fck),
4375 CLK(NULL, "mcspi4_fck", &mcspi4_fck),
4376 CLK(NULL, "mcspi3_fck", &mcspi3_fck),
4377 CLK(NULL, "mcspi2_fck", &mcspi2_fck),
4378 CLK(NULL, "mcspi1_fck", &mcspi1_fck),
4379 CLK(NULL, "uart2_fck", &uart2_fck),
4380 CLK(NULL, "uart1_fck", &uart1_fck),
4381 CLK(NULL, "core_12m_fck", &core_12m_fck),
4382 CLK("omap_hdq.0", "fck", &hdq_fck),
4383 CLK(NULL, "hdq_fck", &hdq_fck),
4384 CLK(NULL, "core_l3_ick", &core_l3_ick),
4385 CLK(NULL, "sdrc_ick", &sdrc_ick),
4386 CLK(NULL, "gpmc_fck", &gpmc_fck),
4387 CLK(NULL, "core_l4_ick", &core_l4_ick),
4388 CLK("omap_hsmmc.1", "ick", &mmchs2_ick),
4389 CLK("omap_hsmmc.0", "ick", &mmchs1_ick),
4390 CLK(NULL, "mmchs2_ick", &mmchs2_ick),
4391 CLK(NULL, "mmchs1_ick", &mmchs1_ick),
4392 CLK("omap_hdq.0", "ick", &hdq_ick),
4393 CLK(NULL, "hdq_ick", &hdq_ick),
4394 CLK("omap2_mcspi.4", "ick", &mcspi4_ick),
4395 CLK("omap2_mcspi.3", "ick", &mcspi3_ick),
4396 CLK("omap2_mcspi.2", "ick", &mcspi2_ick),
4397 CLK("omap2_mcspi.1", "ick", &mcspi1_ick),
4398 CLK(NULL, "mcspi4_ick", &mcspi4_ick),
4399 CLK(NULL, "mcspi3_ick", &mcspi3_ick),
4400 CLK(NULL, "mcspi2_ick", &mcspi2_ick),
4401 CLK(NULL, "mcspi1_ick", &mcspi1_ick),
4402 CLK("omap_i2c.3", "ick", &i2c3_ick),
4403 CLK("omap_i2c.2", "ick", &i2c2_ick),
4404 CLK("omap_i2c.1", "ick", &i2c1_ick),
4405 CLK(NULL, "i2c3_ick", &i2c3_ick),
4406 CLK(NULL, "i2c2_ick", &i2c2_ick),
4407 CLK(NULL, "i2c1_ick", &i2c1_ick),
4408 CLK(NULL, "uart2_ick", &uart2_ick),
4409 CLK(NULL, "uart1_ick", &uart1_ick),
4410 CLK(NULL, "gpt11_ick", &gpt11_ick),
4411 CLK(NULL, "gpt10_ick", &gpt10_ick),
4412 CLK("omap-mcbsp.5", "ick", &mcbsp5_ick),
4413 CLK("omap-mcbsp.1", "ick", &mcbsp1_ick),
4414 CLK(NULL, "mcbsp5_ick", &mcbsp5_ick),
4415 CLK(NULL, "mcbsp1_ick", &mcbsp1_ick),
4416 CLK(NULL, "omapctrl_ick", &omapctrl_ick),
4417 CLK(NULL, "dss_tv_fck", &dss_tv_fck),
4418 CLK(NULL, "dss_96m_fck", &dss_96m_fck),
4419 CLK(NULL, "dss2_alwon_fck", &dss2_alwon_fck),
4420 CLK(NULL, "init_60m_fclk", &dummy_ck),
4421 CLK(NULL, "gpt1_fck", &gpt1_fck),
4422 CLK(NULL, "aes2_ick", &aes2_ick),
4423 CLK(NULL, "wkup_32k_fck", &wkup_32k_fck),
4424 CLK(NULL, "gpio1_dbck", &gpio1_dbck),
4425 CLK(NULL, "sha12_ick", &sha12_ick),
4426 CLK(NULL, "wdt2_fck", &wdt2_fck),
4427 CLK(NULL, "wkup_l4_ick", &wkup_l4_ick),
4428 CLK("omap_wdt", "ick", &wdt2_ick),
4429 CLK(NULL, "wdt2_ick", &wdt2_ick),
4430 CLK(NULL, "wdt1_ick", &wdt1_ick),
4431 CLK(NULL, "gpio1_ick", &gpio1_ick),
4432 CLK(NULL, "omap_32ksync_ick", &omap_32ksync_ick),
4433 CLK(NULL, "gpt12_ick", &gpt12_ick),
4434 CLK(NULL, "gpt1_ick", &gpt1_ick),
4435 CLK(NULL, "per_96m_fck", &per_96m_fck),
4436 CLK(NULL, "per_48m_fck", &per_48m_fck),
4437 CLK(NULL, "uart3_fck", &uart3_fck),
4438 CLK(NULL, "gpt2_fck", &gpt2_fck),
4439 CLK(NULL, "gpt3_fck", &gpt3_fck),
4440 CLK(NULL, "gpt4_fck", &gpt4_fck),
4441 CLK(NULL, "gpt5_fck", &gpt5_fck),
4442 CLK(NULL, "gpt6_fck", &gpt6_fck),
4443 CLK(NULL, "gpt7_fck", &gpt7_fck),
4444 CLK(NULL, "gpt8_fck", &gpt8_fck),
4445 CLK(NULL, "gpt9_fck", &gpt9_fck),
4446 CLK(NULL, "per_32k_alwon_fck", &per_32k_alwon_fck),
4447 CLK(NULL, "gpio6_dbck", &gpio6_dbck),
4448 CLK(NULL, "gpio5_dbck", &gpio5_dbck),
4449 CLK(NULL, "gpio4_dbck", &gpio4_dbck),
4450 CLK(NULL, "gpio3_dbck", &gpio3_dbck),
4451 CLK(NULL, "gpio2_dbck", &gpio2_dbck),
4452 CLK(NULL, "wdt3_fck", &wdt3_fck),
4453 CLK(NULL, "per_l4_ick", &per_l4_ick),
4454 CLK(NULL, "gpio6_ick", &gpio6_ick),
4455 CLK(NULL, "gpio5_ick", &gpio5_ick),
4456 CLK(NULL, "gpio4_ick", &gpio4_ick),
4457 CLK(NULL, "gpio3_ick", &gpio3_ick),
4458 CLK(NULL, "gpio2_ick", &gpio2_ick),
4459 CLK(NULL, "wdt3_ick", &wdt3_ick),
4460 CLK(NULL, "uart3_ick", &uart3_ick),
4461 CLK(NULL, "uart4_ick", &uart4_ick),
4462 CLK(NULL, "gpt9_ick", &gpt9_ick),
4463 CLK(NULL, "gpt8_ick", &gpt8_ick),
4464 CLK(NULL, "gpt7_ick", &gpt7_ick),
4465 CLK(NULL, "gpt6_ick", &gpt6_ick),
4466 CLK(NULL, "gpt5_ick", &gpt5_ick),
4467 CLK(NULL, "gpt4_ick", &gpt4_ick),
4468 CLK(NULL, "gpt3_ick", &gpt3_ick),
4469 CLK(NULL, "gpt2_ick", &gpt2_ick),
4470 CLK("omap-mcbsp.2", "ick", &mcbsp2_ick),
4471 CLK("omap-mcbsp.3", "ick", &mcbsp3_ick),
4472 CLK("omap-mcbsp.4", "ick", &mcbsp4_ick),
4473 CLK(NULL, "mcbsp4_ick", &mcbsp2_ick),
4474 CLK(NULL, "mcbsp3_ick", &mcbsp3_ick),
4475 CLK(NULL, "mcbsp2_ick", &mcbsp4_ick),
4476 CLK(NULL, "mcbsp2_fck", &mcbsp2_fck),
4477 CLK(NULL, "mcbsp3_fck", &mcbsp3_fck),
4478 CLK(NULL, "mcbsp4_fck", &mcbsp4_fck),
4479 CLK(NULL, "emu_src_mux_ck", &emu_src_mux_ck),
4480 CLK("etb", "emu_src_ck", &emu_src_ck),
4481 CLK(NULL, "emu_src_mux_ck", &emu_src_mux_ck),
4482 CLK(NULL, "emu_src_ck", &emu_src_ck),
4483 CLK(NULL, "pclk_fck", &pclk_fck),
4484 CLK(NULL, "pclkx2_fck", &pclkx2_fck),
4485 CLK(NULL, "atclk_fck", &atclk_fck),
4486 CLK(NULL, "traceclk_src_fck", &traceclk_src_fck),
4487 CLK(NULL, "traceclk_fck", &traceclk_fck),
4488 CLK(NULL, "secure_32k_fck", &secure_32k_fck),
4489 CLK(NULL, "gpt12_fck", &gpt12_fck),
4490 CLK(NULL, "wdt1_fck", &wdt1_fck),
4491 { NULL },
4492};
4493
4494static struct ti_clk_alias omap36xx_am35xx_omap3430es2plus_clks[] = {
4495 CLK(NULL, "dpll5_ck", &dpll5_ck),
4496 CLK(NULL, "dpll5_m2_ck", &dpll5_m2_ck),
4497 CLK(NULL, "core_d3_ck", &core_d3_ck),
4498 CLK(NULL, "core_d4_ck", &core_d4_ck),
4499 CLK(NULL, "core_d6_ck", &core_d6_ck),
4500 CLK(NULL, "omap_192m_alwon_fck", &omap_192m_alwon_fck),
4501 CLK(NULL, "core_d2_ck", &core_d2_ck),
4502 CLK(NULL, "corex2_d3_fck", &corex2_d3_fck),
4503 CLK(NULL, "corex2_d5_fck", &corex2_d5_fck),
4504 CLK(NULL, "sgx_fck", &sgx_fck),
4505 CLK(NULL, "sgx_ick", &sgx_ick),
4506 CLK(NULL, "cpefuse_fck", &cpefuse_fck),
4507 CLK(NULL, "ts_fck", &ts_fck),
4508 CLK(NULL, "usbtll_fck", &usbtll_fck),
4509 CLK(NULL, "usbtll_ick", &usbtll_ick),
4510 CLK("omap_hsmmc.2", "ick", &mmchs3_ick),
4511 CLK(NULL, "mmchs3_ick", &mmchs3_ick),
4512 CLK(NULL, "mmchs3_fck", &mmchs3_fck),
4513 CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es2),
4514 CLK("omapdss_dss", "ick", &dss_ick_3430es2),
4515 CLK(NULL, "dss_ick", &dss_ick_3430es2),
4516 CLK(NULL, "usbhost_120m_fck", &usbhost_120m_fck),
4517 CLK(NULL, "usbhost_48m_fck", &usbhost_48m_fck),
4518 CLK(NULL, "usbhost_ick", &usbhost_ick),
4519 { NULL },
4520};
4521
4522static struct ti_clk_alias omap3430es1_clks[] = {
4523 CLK(NULL, "gfx_l3_ck", &gfx_l3_ck),
4524 CLK(NULL, "gfx_l3_fck", &gfx_l3_fck),
4525 CLK(NULL, "gfx_l3_ick", &gfx_l3_ick),
4526 CLK(NULL, "gfx_cg1_ck", &gfx_cg1_ck),
4527 CLK(NULL, "gfx_cg2_ck", &gfx_cg2_ck),
4528 CLK(NULL, "d2d_26m_fck", &d2d_26m_fck),
4529 CLK(NULL, "fshostusb_fck", &fshostusb_fck),
4530 CLK(NULL, "ssi_ssr_fck", &ssi_ssr_fck_3430es1),
4531 CLK(NULL, "ssi_sst_fck", &ssi_sst_fck_3430es1),
4532 CLK("musb-omap2430", "ick", &hsotgusb_ick_3430es1),
4533 CLK(NULL, "hsotgusb_ick", &hsotgusb_ick_3430es1),
4534 CLK(NULL, "fac_ick", &fac_ick),
4535 CLK(NULL, "ssi_ick", &ssi_ick_3430es1),
4536 CLK(NULL, "usb_l4_ick", &usb_l4_ick),
4537 CLK(NULL, "dss1_alwon_fck", &dss1_alwon_fck_3430es1),
4538 CLK("omapdss_dss", "ick", &dss_ick_3430es1),
4539 CLK(NULL, "dss_ick", &dss_ick_3430es1),
4540 { NULL },
4541};
4542
4543static struct ti_clk_alias omap36xx_clks[] = {
4544 CLK(NULL, "uart4_fck", &uart4_fck),
4545 { NULL },
4546};
4547
4548static struct ti_clk_alias am35xx_clks[] = {
4549 CLK(NULL, "ipss_ick", &ipss_ick),
4550 CLK(NULL, "rmii_ck", &rmii_ck),
4551 CLK(NULL, "pclk_ck", &pclk_ck),
4552 CLK(NULL, "emac_ick", &emac_ick),
4553 CLK(NULL, "emac_fck", &emac_fck),
4554 CLK("davinci_emac.0", NULL, &emac_ick),
4555 CLK("davinci_mdio.0", NULL, &emac_fck),
4556 CLK("vpfe-capture", "master", &vpfe_ick),
4557 CLK("vpfe-capture", "slave", &vpfe_fck),
4558 CLK(NULL, "hsotgusb_ick", &hsotgusb_ick_am35xx),
4559 CLK(NULL, "hsotgusb_fck", &hsotgusb_fck_am35xx),
4560 CLK(NULL, "hecc_ck", &hecc_ck),
4561 CLK(NULL, "uart4_ick", &uart4_ick_am35xx),
4562 CLK(NULL, "uart4_fck", &uart4_fck_am35xx),
4563 { NULL },
4564};
4565
4566static struct ti_clk *omap36xx_clk_patches[] = {
4567 &dpll4_m3x2_ck_omap36xx,
4568 &dpll3_m3x2_ck_omap36xx,
4569 &dpll4_m6x2_ck_omap36xx,
4570 &dpll4_m2x2_ck_omap36xx,
4571 &dpll4_m5x2_ck_omap36xx,
4572 &dpll4_ck_omap36xx,
4573 NULL,
4574};
4575
4576static const char *enable_init_clks[] = {
4577 "sdrc_ick",
4578 "gpmc_fck",
4579 "omapctrl_ick",
4580};
4581
4582static void __init omap3_clk_legacy_common_init(void)
4583{
4584 omap2_clk_disable_autoidle_all();
4585
4586 omap2_clk_enable_init_clocks(enable_init_clks,
4587 ARRAY_SIZE(enable_init_clks));
4588
4589 pr_info("Clocking rate (Crystal/Core/MPU): %ld.%01ld/%ld/%ld MHz\n",
4590 (clk_get_rate(osc_sys_ck.clk) / 1000000),
4591 (clk_get_rate(osc_sys_ck.clk) / 100000) % 10,
4592 (clk_get_rate(core_ck.clk) / 1000000),
4593 (clk_get_rate(arm_fck.clk) / 1000000));
4594}
4595
4596int __init omap3430es1_clk_legacy_init(void)
4597{
4598 int r;
4599
4600 r = ti_clk_register_legacy_clks(omap3430es1_clks);
4601 r |= ti_clk_register_legacy_clks(omap34xx_omap36xx_clks);
4602 r |= ti_clk_register_legacy_clks(omap3xxx_clks);
4603
4604 omap3_clk_legacy_common_init();
4605
4606 return r;
4607}
4608
4609int __init omap3430_clk_legacy_init(void)
4610{
4611 int r;
4612
4613 r = ti_clk_register_legacy_clks(omap34xx_omap36xx_clks);
4614 r |= ti_clk_register_legacy_clks(omap36xx_omap3430es2plus_clks);
4615 r |= ti_clk_register_legacy_clks(omap36xx_am35xx_omap3430es2plus_clks);
4616 r |= ti_clk_register_legacy_clks(omap3xxx_clks);
4617
4618 omap3_clk_legacy_common_init();
4619 omap3_clk_lock_dpll5();
4620
4621 return r;
4622}
4623
4624int __init omap36xx_clk_legacy_init(void)
4625{
4626 int r;
4627
4628 ti_clk_patch_legacy_clks(omap36xx_clk_patches);
4629 r = ti_clk_register_legacy_clks(omap36xx_clks);
4630 r |= ti_clk_register_legacy_clks(omap36xx_omap3430es2plus_clks);
4631 r |= ti_clk_register_legacy_clks(omap34xx_omap36xx_clks);
4632 r |= ti_clk_register_legacy_clks(omap36xx_am35xx_omap3430es2plus_clks);
4633 r |= ti_clk_register_legacy_clks(omap3xxx_clks);
4634
4635 omap3_clk_legacy_common_init();
4636 omap3_clk_lock_dpll5();
4637
4638 return r;
4639}
4640
4641int __init am35xx_clk_legacy_init(void)
4642{
4643 int r;
4644
4645 r = ti_clk_register_legacy_clks(am35xx_clks);
4646 r |= ti_clk_register_legacy_clks(omap36xx_am35xx_omap3430es2plus_clks);
4647 r |= ti_clk_register_legacy_clks(omap3xxx_clks);
4648
4649 omap3_clk_legacy_common_init();
4650 omap3_clk_lock_dpll5();
4651
4652 return r;
4653}
diff --git a/drivers/clk/ti/clk-3xxx.c b/drivers/clk/ti/clk-3xxx.c
index 0d1750a8aea4..383a06e49b09 100644
--- a/drivers/clk/ti/clk-3xxx.c
+++ b/drivers/clk/ti/clk-3xxx.c
@@ -327,7 +327,6 @@ enum {
327 OMAP3_SOC_OMAP3430_ES1, 327 OMAP3_SOC_OMAP3430_ES1,
328 OMAP3_SOC_OMAP3430_ES2_PLUS, 328 OMAP3_SOC_OMAP3430_ES2_PLUS,
329 OMAP3_SOC_OMAP3630, 329 OMAP3_SOC_OMAP3630,
330 OMAP3_SOC_TI81XX,
331}; 330};
332 331
333static int __init omap3xxx_dt_clk_init(int soc_type) 332static int __init omap3xxx_dt_clk_init(int soc_type)
@@ -370,7 +369,7 @@ static int __init omap3xxx_dt_clk_init(int soc_type)
370 (clk_get_rate(clk_get_sys(NULL, "core_ck")) / 1000000), 369 (clk_get_rate(clk_get_sys(NULL, "core_ck")) / 1000000),
371 (clk_get_rate(clk_get_sys(NULL, "arm_fck")) / 1000000)); 370 (clk_get_rate(clk_get_sys(NULL, "arm_fck")) / 1000000));
372 371
373 if (soc_type != OMAP3_SOC_TI81XX && soc_type != OMAP3_SOC_OMAP3430_ES1) 372 if (soc_type != OMAP3_SOC_OMAP3430_ES1)
374 omap3_clk_lock_dpll5(); 373 omap3_clk_lock_dpll5();
375 374
376 return 0; 375 return 0;
@@ -390,8 +389,3 @@ int __init am35xx_dt_clk_init(void)
390{ 389{
391 return omap3xxx_dt_clk_init(OMAP3_SOC_AM35XX); 390 return omap3xxx_dt_clk_init(OMAP3_SOC_AM35XX);
392} 391}
393
394int __init ti81xx_dt_clk_init(void)
395{
396 return omap3xxx_dt_clk_init(OMAP3_SOC_TI81XX);
397}
diff --git a/drivers/clk/ti/clk-44xx.c b/drivers/clk/ti/clk-44xx.c
index 02517a8206bd..4f4c87751db5 100644
--- a/drivers/clk/ti/clk-44xx.c
+++ b/drivers/clk/ti/clk-44xx.c
@@ -12,7 +12,7 @@
12 12
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/list.h> 14#include <linux/list.h>
15#include <linux/clk-private.h> 15#include <linux/clk.h>
16#include <linux/clkdev.h> 16#include <linux/clkdev.h>
17#include <linux/clk/ti.h> 17#include <linux/clk/ti.h>
18 18
diff --git a/drivers/clk/ti/clk-54xx.c b/drivers/clk/ti/clk-54xx.c
index 5e183993e3ec..14160b223548 100644
--- a/drivers/clk/ti/clk-54xx.c
+++ b/drivers/clk/ti/clk-54xx.c
@@ -12,7 +12,7 @@
12 12
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/list.h> 14#include <linux/list.h>
15#include <linux/clk-private.h> 15#include <linux/clk.h>
16#include <linux/clkdev.h> 16#include <linux/clkdev.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/clk/ti.h> 18#include <linux/clk/ti.h>
diff --git a/drivers/clk/ti/clk-7xx.c b/drivers/clk/ti/clk-7xx.c
index 62ac8f6e480c..ee32f4deebf4 100644
--- a/drivers/clk/ti/clk-7xx.c
+++ b/drivers/clk/ti/clk-7xx.c
@@ -12,7 +12,7 @@
12 12
13#include <linux/kernel.h> 13#include <linux/kernel.h>
14#include <linux/list.h> 14#include <linux/list.h>
15#include <linux/clk-private.h> 15#include <linux/clk.h>
16#include <linux/clkdev.h> 16#include <linux/clkdev.h>
17#include <linux/clk/ti.h> 17#include <linux/clk/ti.h>
18 18
diff --git a/drivers/clk/ti/clk-816x.c b/drivers/clk/ti/clk-816x.c
new file mode 100644
index 000000000000..9451e651a1ff
--- /dev/null
+++ b/drivers/clk/ti/clk-816x.c
@@ -0,0 +1,53 @@
1/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License as
4 * published by the Free Software Foundation version 2.
5 *
6 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
7 * kind, whether express or implied; without even the implied warranty
8 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 */
11
12#include <linux/kernel.h>
13#include <linux/list.h>
14#include <linux/clk-provider.h>
15#include <linux/clk/ti.h>
16
17static struct ti_dt_clk dm816x_clks[] = {
18 DT_CLK(NULL, "sys_clkin", "sys_clkin_ck"),
19 DT_CLK(NULL, "timer_sys_ck", "sys_clkin_ck"),
20 DT_CLK(NULL, "sys_32k_ck", "sys_32k_ck"),
21 DT_CLK(NULL, "mpu_ck", "mpu_ck"),
22 DT_CLK(NULL, "timer1_fck", "timer1_fck"),
23 DT_CLK(NULL, "timer2_fck", "timer2_fck"),
24 DT_CLK(NULL, "timer3_fck", "timer3_fck"),
25 DT_CLK(NULL, "timer4_fck", "timer4_fck"),
26 DT_CLK(NULL, "timer5_fck", "timer5_fck"),
27 DT_CLK(NULL, "timer6_fck", "timer6_fck"),
28 DT_CLK(NULL, "timer7_fck", "timer7_fck"),
29 DT_CLK(NULL, "sysclk4_ck", "sysclk4_ck"),
30 DT_CLK(NULL, "sysclk5_ck", "sysclk5_ck"),
31 DT_CLK(NULL, "sysclk6_ck", "sysclk6_ck"),
32 DT_CLK(NULL, "sysclk10_ck", "sysclk10_ck"),
33 DT_CLK(NULL, "sysclk18_ck", "sysclk18_ck"),
34 DT_CLK(NULL, "sysclk24_ck", "sysclk24_ck"),
35 DT_CLK("4a100000.ethernet", "sysclk24_ck", "sysclk24_ck"),
36 { .node_name = NULL },
37};
38
39static const char *enable_init_clks[] = {
40 "ddr_pll_clk1",
41 "ddr_pll_clk2",
42 "ddr_pll_clk3",
43};
44
45int __init ti81xx_dt_clk_init(void)
46{
47 ti_dt_clocks_register(dm816x_clks);
48 omap2_clk_disable_autoidle_all();
49 omap2_clk_enable_init_clocks(enable_init_clks,
50 ARRAY_SIZE(enable_init_clks));
51
52 return 0;
53}
diff --git a/drivers/clk/ti/clk.c b/drivers/clk/ti/clk.c
index 337abe5909e1..e22b95646e09 100644
--- a/drivers/clk/ti/clk.c
+++ b/drivers/clk/ti/clk.c
@@ -22,6 +22,8 @@
22#include <linux/of_address.h> 22#include <linux/of_address.h>
23#include <linux/list.h> 23#include <linux/list.h>
24 24
25#include "clock.h"
26
25#undef pr_fmt 27#undef pr_fmt
26#define pr_fmt(fmt) "%s: " fmt, __func__ 28#define pr_fmt(fmt) "%s: " fmt, __func__
27 29
@@ -183,3 +185,128 @@ void ti_dt_clk_init_retry_clks(void)
183 retries--; 185 retries--;
184 } 186 }
185} 187}
188
189#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
190void __init ti_clk_patch_legacy_clks(struct ti_clk **patch)
191{
192 while (*patch) {
193 memcpy((*patch)->patch, *patch, sizeof(**patch));
194 patch++;
195 }
196}
197
198struct clk __init *ti_clk_register_clk(struct ti_clk *setup)
199{
200 struct clk *clk;
201 struct ti_clk_fixed *fixed;
202 struct ti_clk_fixed_factor *fixed_factor;
203 struct clk_hw *clk_hw;
204
205 if (setup->clk)
206 return setup->clk;
207
208 switch (setup->type) {
209 case TI_CLK_FIXED:
210 fixed = setup->data;
211
212 clk = clk_register_fixed_rate(NULL, setup->name, NULL,
213 CLK_IS_ROOT, fixed->frequency);
214 break;
215 case TI_CLK_MUX:
216 clk = ti_clk_register_mux(setup);
217 break;
218 case TI_CLK_DIVIDER:
219 clk = ti_clk_register_divider(setup);
220 break;
221 case TI_CLK_COMPOSITE:
222 clk = ti_clk_register_composite(setup);
223 break;
224 case TI_CLK_FIXED_FACTOR:
225 fixed_factor = setup->data;
226
227 clk = clk_register_fixed_factor(NULL, setup->name,
228 fixed_factor->parent,
229 0, fixed_factor->mult,
230 fixed_factor->div);
231 break;
232 case TI_CLK_GATE:
233 clk = ti_clk_register_gate(setup);
234 break;
235 case TI_CLK_DPLL:
236 clk = ti_clk_register_dpll(setup);
237 break;
238 default:
239 pr_err("bad type for %s!\n", setup->name);
240 clk = ERR_PTR(-EINVAL);
241 }
242
243 if (!IS_ERR(clk)) {
244 setup->clk = clk;
245 if (setup->clkdm_name) {
246 if (__clk_get_flags(clk) & CLK_IS_BASIC) {
247 pr_warn("can't setup clkdm for basic clk %s\n",
248 setup->name);
249 } else {
250 clk_hw = __clk_get_hw(clk);
251 to_clk_hw_omap(clk_hw)->clkdm_name =
252 setup->clkdm_name;
253 omap2_init_clk_clkdm(clk_hw);
254 }
255 }
256 }
257
258 return clk;
259}
260
261int __init ti_clk_register_legacy_clks(struct ti_clk_alias *clks)
262{
263 struct clk *clk;
264 bool retry;
265 struct ti_clk_alias *retry_clk;
266 struct ti_clk_alias *tmp;
267
268 while (clks->clk) {
269 clk = ti_clk_register_clk(clks->clk);
270 if (IS_ERR(clk)) {
271 if (PTR_ERR(clk) == -EAGAIN) {
272 list_add(&clks->link, &retry_list);
273 } else {
274 pr_err("register for %s failed: %ld\n",
275 clks->clk->name, PTR_ERR(clk));
276 return PTR_ERR(clk);
277 }
278 } else {
279 clks->lk.clk = clk;
280 clkdev_add(&clks->lk);
281 }
282 clks++;
283 }
284
285 retry = true;
286
287 while (!list_empty(&retry_list) && retry) {
288 retry = false;
289 list_for_each_entry_safe(retry_clk, tmp, &retry_list, link) {
290 pr_debug("retry-init: %s\n", retry_clk->clk->name);
291 clk = ti_clk_register_clk(retry_clk->clk);
292 if (IS_ERR(clk)) {
293 if (PTR_ERR(clk) == -EAGAIN) {
294 continue;
295 } else {
296 pr_err("register for %s failed: %ld\n",
297 retry_clk->clk->name,
298 PTR_ERR(clk));
299 return PTR_ERR(clk);
300 }
301 } else {
302 retry = true;
303 retry_clk->lk.clk = clk;
304 clkdev_add(&retry_clk->lk);
305 list_del(&retry_clk->link);
306 }
307 }
308 }
309
310 return 0;
311}
312#endif
diff --git a/drivers/clk/ti/clock.h b/drivers/clk/ti/clock.h
new file mode 100644
index 000000000000..404158d2d7f8
--- /dev/null
+++ b/drivers/clk/ti/clock.h
@@ -0,0 +1,172 @@
1/*
2 * TI Clock driver internal definitions
3 *
4 * Copyright (C) 2014 Texas Instruments, Inc
5 * Tero Kristo (t-kristo@ti.com)
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation version 2.
10 *
11 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
12 * kind, whether express or implied; without even the implied warranty
13 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16#ifndef __DRIVERS_CLK_TI_CLOCK__
17#define __DRIVERS_CLK_TI_CLOCK__
18
19enum {
20 TI_CLK_FIXED,
21 TI_CLK_MUX,
22 TI_CLK_DIVIDER,
23 TI_CLK_COMPOSITE,
24 TI_CLK_FIXED_FACTOR,
25 TI_CLK_GATE,
26 TI_CLK_DPLL,
27};
28
29/* Global flags */
30#define CLKF_INDEX_POWER_OF_TWO (1 << 0)
31#define CLKF_INDEX_STARTS_AT_ONE (1 << 1)
32#define CLKF_SET_RATE_PARENT (1 << 2)
33#define CLKF_OMAP3 (1 << 3)
34#define CLKF_AM35XX (1 << 4)
35
36/* Gate flags */
37#define CLKF_SET_BIT_TO_DISABLE (1 << 5)
38#define CLKF_INTERFACE (1 << 6)
39#define CLKF_SSI (1 << 7)
40#define CLKF_DSS (1 << 8)
41#define CLKF_HSOTGUSB (1 << 9)
42#define CLKF_WAIT (1 << 10)
43#define CLKF_NO_WAIT (1 << 11)
44#define CLKF_HSDIV (1 << 12)
45#define CLKF_CLKDM (1 << 13)
46
47/* DPLL flags */
48#define CLKF_LOW_POWER_STOP (1 << 5)
49#define CLKF_LOCK (1 << 6)
50#define CLKF_LOW_POWER_BYPASS (1 << 7)
51#define CLKF_PER (1 << 8)
52#define CLKF_CORE (1 << 9)
53#define CLKF_J_TYPE (1 << 10)
54
55#define CLK(dev, con, ck) \
56 { \
57 .lk = { \
58 .dev_id = dev, \
59 .con_id = con, \
60 }, \
61 .clk = ck, \
62 }
63
64struct ti_clk {
65 const char *name;
66 const char *clkdm_name;
67 int type;
68 void *data;
69 struct ti_clk *patch;
70 struct clk *clk;
71};
72
73struct ti_clk_alias {
74 struct ti_clk *clk;
75 struct clk_lookup lk;
76 struct list_head link;
77};
78
79struct ti_clk_fixed {
80 u32 frequency;
81 u16 flags;
82};
83
84struct ti_clk_mux {
85 u8 bit_shift;
86 int num_parents;
87 u16 reg;
88 u8 module;
89 const char **parents;
90 u16 flags;
91};
92
93struct ti_clk_divider {
94 const char *parent;
95 u8 bit_shift;
96 u16 max_div;
97 u16 reg;
98 u8 module;
99 int *dividers;
100 int num_dividers;
101 u16 flags;
102};
103
104struct ti_clk_fixed_factor {
105 const char *parent;
106 u16 div;
107 u16 mult;
108 u16 flags;
109};
110
111struct ti_clk_gate {
112 const char *parent;
113 u8 bit_shift;
114 u16 reg;
115 u8 module;
116 u16 flags;
117};
118
119struct ti_clk_composite {
120 struct ti_clk_divider *divider;
121 struct ti_clk_mux *mux;
122 struct ti_clk_gate *gate;
123 u16 flags;
124};
125
126struct ti_clk_clkdm_gate {
127 const char *parent;
128 u16 flags;
129};
130
131struct ti_clk_dpll {
132 int num_parents;
133 u16 control_reg;
134 u16 idlest_reg;
135 u16 autoidle_reg;
136 u16 mult_div1_reg;
137 u8 module;
138 const char **parents;
139 u16 flags;
140 u8 modes;
141 u32 mult_mask;
142 u32 div1_mask;
143 u32 enable_mask;
144 u32 autoidle_mask;
145 u32 freqsel_mask;
146 u32 idlest_mask;
147 u32 dco_mask;
148 u32 sddiv_mask;
149 u16 max_multiplier;
150 u16 max_divider;
151 u8 min_divider;
152 u8 auto_recal_bit;
153 u8 recal_en_bit;
154 u8 recal_st_bit;
155};
156
157struct clk *ti_clk_register_gate(struct ti_clk *setup);
158struct clk *ti_clk_register_interface(struct ti_clk *setup);
159struct clk *ti_clk_register_mux(struct ti_clk *setup);
160struct clk *ti_clk_register_divider(struct ti_clk *setup);
161struct clk *ti_clk_register_composite(struct ti_clk *setup);
162struct clk *ti_clk_register_dpll(struct ti_clk *setup);
163
164struct clk_hw *ti_clk_build_component_div(struct ti_clk_divider *setup);
165struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup);
166struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup);
167
168void ti_clk_patch_legacy_clks(struct ti_clk **patch);
169struct clk *ti_clk_register_clk(struct ti_clk *setup);
170int ti_clk_register_legacy_clks(struct ti_clk_alias *clks);
171
172#endif
diff --git a/drivers/clk/ti/composite.c b/drivers/clk/ti/composite.c
index 19d8980ba458..3654f61912eb 100644
--- a/drivers/clk/ti/composite.c
+++ b/drivers/clk/ti/composite.c
@@ -23,6 +23,8 @@
23#include <linux/clk/ti.h> 23#include <linux/clk/ti.h>
24#include <linux/list.h> 24#include <linux/list.h>
25 25
26#include "clock.h"
27
26#undef pr_fmt 28#undef pr_fmt
27#define pr_fmt(fmt) "%s: " fmt, __func__ 29#define pr_fmt(fmt) "%s: " fmt, __func__
28 30
@@ -116,8 +118,46 @@ static inline struct clk_hw *_get_hw(struct clk_hw_omap_comp *clk, int idx)
116 118
117#define to_clk_hw_comp(_hw) container_of(_hw, struct clk_hw_omap_comp, hw) 119#define to_clk_hw_comp(_hw) container_of(_hw, struct clk_hw_omap_comp, hw)
118 120
119static void __init ti_clk_register_composite(struct clk_hw *hw, 121#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
120 struct device_node *node) 122struct clk *ti_clk_register_composite(struct ti_clk *setup)
123{
124 struct ti_clk_composite *comp;
125 struct clk_hw *gate;
126 struct clk_hw *mux;
127 struct clk_hw *div;
128 int num_parents = 1;
129 const char **parent_names = NULL;
130 struct clk *clk;
131
132 comp = setup->data;
133
134 div = ti_clk_build_component_div(comp->divider);
135 gate = ti_clk_build_component_gate(comp->gate);
136 mux = ti_clk_build_component_mux(comp->mux);
137
138 if (div)
139 parent_names = &comp->divider->parent;
140
141 if (gate)
142 parent_names = &comp->gate->parent;
143
144 if (mux) {
145 num_parents = comp->mux->num_parents;
146 parent_names = comp->mux->parents;
147 }
148
149 clk = clk_register_composite(NULL, setup->name,
150 parent_names, num_parents, mux,
151 &ti_clk_mux_ops, div,
152 &ti_composite_divider_ops, gate,
153 &ti_composite_gate_ops, 0);
154
155 return clk;
156}
157#endif
158
159static void __init _register_composite(struct clk_hw *hw,
160 struct device_node *node)
121{ 161{
122 struct clk *clk; 162 struct clk *clk;
123 struct clk_hw_omap_comp *cclk = to_clk_hw_comp(hw); 163 struct clk_hw_omap_comp *cclk = to_clk_hw_comp(hw);
@@ -136,7 +176,7 @@ static void __init ti_clk_register_composite(struct clk_hw *hw,
136 pr_debug("component %s not ready for %s, retry\n", 176 pr_debug("component %s not ready for %s, retry\n",
137 cclk->comp_nodes[i]->name, node->name); 177 cclk->comp_nodes[i]->name, node->name);
138 if (!ti_clk_retry_init(node, hw, 178 if (!ti_clk_retry_init(node, hw,
139 ti_clk_register_composite)) 179 _register_composite))
140 return; 180 return;
141 181
142 goto cleanup; 182 goto cleanup;
@@ -216,7 +256,7 @@ static void __init of_ti_composite_clk_setup(struct device_node *node)
216 for (i = 0; i < num_clks; i++) 256 for (i = 0; i < num_clks; i++)
217 cclk->comp_nodes[i] = _get_component_node(node, i); 257 cclk->comp_nodes[i] = _get_component_node(node, i);
218 258
219 ti_clk_register_composite(&cclk->hw, node); 259 _register_composite(&cclk->hw, node);
220} 260}
221CLK_OF_DECLARE(ti_composite_clock, "ti,composite-clock", 261CLK_OF_DECLARE(ti_composite_clock, "ti,composite-clock",
222 of_ti_composite_clk_setup); 262 of_ti_composite_clk_setup);
diff --git a/drivers/clk/ti/divider.c b/drivers/clk/ti/divider.c
index bff2b5b8ff59..6211893c0980 100644
--- a/drivers/clk/ti/divider.c
+++ b/drivers/clk/ti/divider.c
@@ -21,6 +21,7 @@
21#include <linux/of.h> 21#include <linux/of.h>
22#include <linux/of_address.h> 22#include <linux/of_address.h>
23#include <linux/clk/ti.h> 23#include <linux/clk/ti.h>
24#include "clock.h"
24 25
25#undef pr_fmt 26#undef pr_fmt
26#define pr_fmt(fmt) "%s: " fmt, __func__ 27#define pr_fmt(fmt) "%s: " fmt, __func__
@@ -301,6 +302,134 @@ static struct clk *_register_divider(struct device *dev, const char *name,
301} 302}
302 303
303static struct clk_div_table * 304static struct clk_div_table *
305_get_div_table_from_setup(struct ti_clk_divider *setup, u8 *width)
306{
307 int valid_div = 0;
308 struct clk_div_table *table;
309 int i;
310 int div;
311 u32 val;
312 u8 flags;
313
314 if (!setup->num_dividers) {
315 /* Clk divider table not provided, determine min/max divs */
316 flags = setup->flags;
317
318 if (flags & CLKF_INDEX_STARTS_AT_ONE)
319 val = 1;
320 else
321 val = 0;
322
323 div = 1;
324
325 while (div < setup->max_div) {
326 if (flags & CLKF_INDEX_POWER_OF_TWO)
327 div <<= 1;
328 else
329 div++;
330 val++;
331 }
332
333 *width = fls(val);
334
335 return NULL;
336 }
337
338 for (i = 0; i < setup->num_dividers; i++)
339 if (setup->dividers[i])
340 valid_div++;
341
342 table = kzalloc(sizeof(*table) * (valid_div + 1), GFP_KERNEL);
343 if (!table)
344 return ERR_PTR(-ENOMEM);
345
346 valid_div = 0;
347 *width = 0;
348
349 for (i = 0; i < setup->num_dividers; i++)
350 if (setup->dividers[i]) {
351 table[valid_div].div = setup->dividers[i];
352 table[valid_div].val = i;
353 valid_div++;
354 *width = i;
355 }
356
357 *width = fls(*width);
358
359 return table;
360}
361
362struct clk_hw *ti_clk_build_component_div(struct ti_clk_divider *setup)
363{
364 struct clk_divider *div;
365 struct clk_omap_reg *reg;
366
367 if (!setup)
368 return NULL;
369
370 div = kzalloc(sizeof(*div), GFP_KERNEL);
371 if (!div)
372 return ERR_PTR(-ENOMEM);
373
374 reg = (struct clk_omap_reg *)&div->reg;
375 reg->index = setup->module;
376 reg->offset = setup->reg;
377
378 if (setup->flags & CLKF_INDEX_STARTS_AT_ONE)
379 div->flags |= CLK_DIVIDER_ONE_BASED;
380
381 if (setup->flags & CLKF_INDEX_POWER_OF_TWO)
382 div->flags |= CLK_DIVIDER_POWER_OF_TWO;
383
384 div->table = _get_div_table_from_setup(setup, &div->width);
385
386 div->shift = setup->bit_shift;
387
388 return &div->hw;
389}
390
391struct clk *ti_clk_register_divider(struct ti_clk *setup)
392{
393 struct ti_clk_divider *div;
394 struct clk_omap_reg *reg_setup;
395 u32 reg;
396 u8 width;
397 u32 flags = 0;
398 u8 div_flags = 0;
399 struct clk_div_table *table;
400 struct clk *clk;
401
402 div = setup->data;
403
404 reg_setup = (struct clk_omap_reg *)&reg;
405
406 reg_setup->index = div->module;
407 reg_setup->offset = div->reg;
408
409 if (div->flags & CLKF_INDEX_STARTS_AT_ONE)
410 div_flags |= CLK_DIVIDER_ONE_BASED;
411
412 if (div->flags & CLKF_INDEX_POWER_OF_TWO)
413 div_flags |= CLK_DIVIDER_POWER_OF_TWO;
414
415 if (div->flags & CLKF_SET_RATE_PARENT)
416 flags |= CLK_SET_RATE_PARENT;
417
418 table = _get_div_table_from_setup(div, &width);
419 if (IS_ERR(table))
420 return (struct clk *)table;
421
422 clk = _register_divider(NULL, setup->name, div->parent,
423 flags, (void __iomem *)reg, div->bit_shift,
424 width, div_flags, table, NULL);
425
426 if (IS_ERR(clk))
427 kfree(table);
428
429 return clk;
430}
431
432static struct clk_div_table *
304__init ti_clk_get_div_table(struct device_node *node) 433__init ti_clk_get_div_table(struct device_node *node)
305{ 434{
306 struct clk_div_table *table; 435 struct clk_div_table *table;
@@ -455,7 +584,8 @@ static void __init of_ti_divider_clk_setup(struct device_node *node)
455 goto cleanup; 584 goto cleanup;
456 585
457 clk = _register_divider(NULL, node->name, parent_name, flags, reg, 586 clk = _register_divider(NULL, node->name, parent_name, flags, reg,
458 shift, width, clk_divider_flags, table, NULL); 587 shift, width, clk_divider_flags, table,
588 NULL);
459 589
460 if (!IS_ERR(clk)) { 590 if (!IS_ERR(clk)) {
461 of_clk_add_provider(node, of_clk_src_simple_get, clk); 591 of_clk_add_provider(node, of_clk_src_simple_get, clk);
diff --git a/drivers/clk/ti/dpll.c b/drivers/clk/ti/dpll.c
index 85ac0dd501de..81dc4698dc41 100644
--- a/drivers/clk/ti/dpll.c
+++ b/drivers/clk/ti/dpll.c
@@ -21,6 +21,7 @@
21#include <linux/of.h> 21#include <linux/of.h>
22#include <linux/of_address.h> 22#include <linux/of_address.h>
23#include <linux/clk/ti.h> 23#include <linux/clk/ti.h>
24#include "clock.h"
24 25
25#undef pr_fmt 26#undef pr_fmt
26#define pr_fmt(fmt) "%s: " fmt, __func__ 27#define pr_fmt(fmt) "%s: " fmt, __func__
@@ -130,7 +131,7 @@ static const struct clk_ops dpll_x2_ck_ops = {
130}; 131};
131 132
132/** 133/**
133 * ti_clk_register_dpll - low level registration of a DPLL clock 134 * _register_dpll - low level registration of a DPLL clock
134 * @hw: hardware clock definition for the clock 135 * @hw: hardware clock definition for the clock
135 * @node: device node for the clock 136 * @node: device node for the clock
136 * 137 *
@@ -138,8 +139,8 @@ static const struct clk_ops dpll_x2_ck_ops = {
138 * clk-bypass is missing), the clock is added to retry list and 139 * clk-bypass is missing), the clock is added to retry list and
139 * the initialization is retried on later stage. 140 * the initialization is retried on later stage.
140 */ 141 */
141static void __init ti_clk_register_dpll(struct clk_hw *hw, 142static void __init _register_dpll(struct clk_hw *hw,
142 struct device_node *node) 143 struct device_node *node)
143{ 144{
144 struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw); 145 struct clk_hw_omap *clk_hw = to_clk_hw_omap(hw);
145 struct dpll_data *dd = clk_hw->dpll_data; 146 struct dpll_data *dd = clk_hw->dpll_data;
@@ -151,7 +152,7 @@ static void __init ti_clk_register_dpll(struct clk_hw *hw,
151 if (IS_ERR(dd->clk_ref) || IS_ERR(dd->clk_bypass)) { 152 if (IS_ERR(dd->clk_ref) || IS_ERR(dd->clk_bypass)) {
152 pr_debug("clk-ref or clk-bypass missing for %s, retry later\n", 153 pr_debug("clk-ref or clk-bypass missing for %s, retry later\n",
153 node->name); 154 node->name);
154 if (!ti_clk_retry_init(node, hw, ti_clk_register_dpll)) 155 if (!ti_clk_retry_init(node, hw, _register_dpll))
155 return; 156 return;
156 157
157 goto cleanup; 158 goto cleanup;
@@ -175,20 +176,118 @@ cleanup:
175 kfree(clk_hw); 176 kfree(clk_hw);
176} 177}
177 178
179#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
180void __iomem *_get_reg(u8 module, u16 offset)
181{
182 u32 reg;
183 struct clk_omap_reg *reg_setup;
184
185 reg_setup = (struct clk_omap_reg *)&reg;
186
187 reg_setup->index = module;
188 reg_setup->offset = offset;
189
190 return (void __iomem *)reg;
191}
192
193struct clk *ti_clk_register_dpll(struct ti_clk *setup)
194{
195 struct clk_hw_omap *clk_hw;
196 struct clk_init_data init = { NULL };
197 struct dpll_data *dd;
198 struct clk *clk;
199 struct ti_clk_dpll *dpll;
200 const struct clk_ops *ops = &omap3_dpll_ck_ops;
201 struct clk *clk_ref;
202 struct clk *clk_bypass;
203
204 dpll = setup->data;
205
206 if (dpll->num_parents < 2)
207 return ERR_PTR(-EINVAL);
208
209 clk_ref = clk_get_sys(NULL, dpll->parents[0]);
210 clk_bypass = clk_get_sys(NULL, dpll->parents[1]);
211
212 if (IS_ERR_OR_NULL(clk_ref) || IS_ERR_OR_NULL(clk_bypass))
213 return ERR_PTR(-EAGAIN);
214
215 dd = kzalloc(sizeof(*dd), GFP_KERNEL);
216 clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
217 if (!dd || !clk_hw) {
218 clk = ERR_PTR(-ENOMEM);
219 goto cleanup;
220 }
221
222 clk_hw->dpll_data = dd;
223 clk_hw->ops = &clkhwops_omap3_dpll;
224 clk_hw->hw.init = &init;
225 clk_hw->flags = MEMMAP_ADDRESSING;
226
227 init.name = setup->name;
228 init.ops = ops;
229
230 init.num_parents = dpll->num_parents;
231 init.parent_names = dpll->parents;
232
233 dd->control_reg = _get_reg(dpll->module, dpll->control_reg);
234 dd->idlest_reg = _get_reg(dpll->module, dpll->idlest_reg);
235 dd->mult_div1_reg = _get_reg(dpll->module, dpll->mult_div1_reg);
236 dd->autoidle_reg = _get_reg(dpll->module, dpll->autoidle_reg);
237
238 dd->modes = dpll->modes;
239 dd->div1_mask = dpll->div1_mask;
240 dd->idlest_mask = dpll->idlest_mask;
241 dd->mult_mask = dpll->mult_mask;
242 dd->autoidle_mask = dpll->autoidle_mask;
243 dd->enable_mask = dpll->enable_mask;
244 dd->sddiv_mask = dpll->sddiv_mask;
245 dd->dco_mask = dpll->dco_mask;
246 dd->max_divider = dpll->max_divider;
247 dd->min_divider = dpll->min_divider;
248 dd->max_multiplier = dpll->max_multiplier;
249 dd->auto_recal_bit = dpll->auto_recal_bit;
250 dd->recal_en_bit = dpll->recal_en_bit;
251 dd->recal_st_bit = dpll->recal_st_bit;
252
253 dd->clk_ref = clk_ref;
254 dd->clk_bypass = clk_bypass;
255
256 if (dpll->flags & CLKF_CORE)
257 ops = &omap3_dpll_core_ck_ops;
258
259 if (dpll->flags & CLKF_PER)
260 ops = &omap3_dpll_per_ck_ops;
261
262 if (dpll->flags & CLKF_J_TYPE)
263 dd->flags |= DPLL_J_TYPE;
264
265 clk = clk_register(NULL, &clk_hw->hw);
266
267 if (!IS_ERR(clk))
268 return clk;
269
270cleanup:
271 kfree(dd);
272 kfree(clk_hw);
273 return clk;
274}
275#endif
276
178#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \ 277#if defined(CONFIG_ARCH_OMAP4) || defined(CONFIG_SOC_OMAP5) || \
179 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM33XX) || \ 278 defined(CONFIG_SOC_DRA7XX) || defined(CONFIG_SOC_AM33XX) || \
180 defined(CONFIG_SOC_AM43XX) 279 defined(CONFIG_SOC_AM43XX)
181/** 280/**
182 * ti_clk_register_dpll_x2 - Registers a DPLLx2 clock 281 * _register_dpll_x2 - Registers a DPLLx2 clock
183 * @node: device node for this clock 282 * @node: device node for this clock
184 * @ops: clk_ops for this clock 283 * @ops: clk_ops for this clock
185 * @hw_ops: clk_hw_ops for this clock 284 * @hw_ops: clk_hw_ops for this clock
186 * 285 *
187 * Initializes a DPLL x 2 clock from device tree data. 286 * Initializes a DPLL x 2 clock from device tree data.
188 */ 287 */
189static void ti_clk_register_dpll_x2(struct device_node *node, 288static void _register_dpll_x2(struct device_node *node,
190 const struct clk_ops *ops, 289 const struct clk_ops *ops,
191 const struct clk_hw_omap_ops *hw_ops) 290 const struct clk_hw_omap_ops *hw_ops)
192{ 291{
193 struct clk *clk; 292 struct clk *clk;
194 struct clk_init_data init = { NULL }; 293 struct clk_init_data init = { NULL };
@@ -318,7 +417,7 @@ static void __init of_ti_dpll_setup(struct device_node *node,
318 if (dpll_mode) 417 if (dpll_mode)
319 dd->modes = dpll_mode; 418 dd->modes = dpll_mode;
320 419
321 ti_clk_register_dpll(&clk_hw->hw, node); 420 _register_dpll(&clk_hw->hw, node);
322 return; 421 return;
323 422
324cleanup: 423cleanup:
@@ -332,7 +431,7 @@ cleanup:
332 defined(CONFIG_SOC_DRA7XX) 431 defined(CONFIG_SOC_DRA7XX)
333static void __init of_ti_omap4_dpll_x2_setup(struct device_node *node) 432static void __init of_ti_omap4_dpll_x2_setup(struct device_node *node)
334{ 433{
335 ti_clk_register_dpll_x2(node, &dpll_x2_ck_ops, &clkhwops_omap4_dpllmx); 434 _register_dpll_x2(node, &dpll_x2_ck_ops, &clkhwops_omap4_dpllmx);
336} 435}
337CLK_OF_DECLARE(ti_omap4_dpll_x2_clock, "ti,omap4-dpll-x2-clock", 436CLK_OF_DECLARE(ti_omap4_dpll_x2_clock, "ti,omap4-dpll-x2-clock",
338 of_ti_omap4_dpll_x2_setup); 437 of_ti_omap4_dpll_x2_setup);
@@ -341,7 +440,7 @@ CLK_OF_DECLARE(ti_omap4_dpll_x2_clock, "ti,omap4-dpll-x2-clock",
341#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX) 440#if defined(CONFIG_SOC_AM33XX) || defined(CONFIG_SOC_AM43XX)
342static void __init of_ti_am3_dpll_x2_setup(struct device_node *node) 441static void __init of_ti_am3_dpll_x2_setup(struct device_node *node)
343{ 442{
344 ti_clk_register_dpll_x2(node, &dpll_x2_ck_ops, NULL); 443 _register_dpll_x2(node, &dpll_x2_ck_ops, NULL);
345} 444}
346CLK_OF_DECLARE(ti_am3_dpll_x2_clock, "ti,am3-dpll-x2-clock", 445CLK_OF_DECLARE(ti_am3_dpll_x2_clock, "ti,am3-dpll-x2-clock",
347 of_ti_am3_dpll_x2_setup); 446 of_ti_am3_dpll_x2_setup);
diff --git a/drivers/clk/ti/fapll.c b/drivers/clk/ti/fapll.c
new file mode 100644
index 000000000000..d21640634adf
--- /dev/null
+++ b/drivers/clk/ti/fapll.c
@@ -0,0 +1,410 @@
1/*
2 * This program is free software; you can redistribute it and/or
3 * modify it under the terms of the GNU General Public License as
4 * published by the Free Software Foundation version 2.
5 *
6 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
7 * kind, whether express or implied; without even the implied warranty
8 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
9 * GNU General Public License for more details.
10 */
11
12#include <linux/clk-provider.h>
13#include <linux/delay.h>
14#include <linux/slab.h>
15#include <linux/err.h>
16#include <linux/of.h>
17#include <linux/of_address.h>
18#include <linux/clk/ti.h>
19#include <asm/div64.h>
20
21/* FAPLL Control Register PLL_CTRL */
22#define FAPLL_MAIN_LOCK BIT(7)
23#define FAPLL_MAIN_PLLEN BIT(3)
24#define FAPLL_MAIN_BP BIT(2)
25#define FAPLL_MAIN_LOC_CTL BIT(0)
26
27/* FAPLL powerdown register PWD */
28#define FAPLL_PWD_OFFSET 4
29
30#define MAX_FAPLL_OUTPUTS 7
31#define FAPLL_MAX_RETRIES 1000
32
33#define to_fapll(_hw) container_of(_hw, struct fapll_data, hw)
34#define to_synth(_hw) container_of(_hw, struct fapll_synth, hw)
35
36/* The bypass bit is inverted on the ddr_pll.. */
37#define fapll_is_ddr_pll(va) (((u32)(va) & 0xffff) == 0x0440)
38
39/*
40 * The audio_pll_clk1 input is hard wired to the 27MHz bypass clock,
41 * and the audio_pll_clk1 synthesizer is hardwared to 32KiHz output.
42 */
43#define is_ddr_pll_clk1(va) (((u32)(va) & 0xffff) == 0x044c)
44#define is_audio_pll_clk1(va) (((u32)(va) & 0xffff) == 0x04a8)
45
46/* Synthesizer divider register */
47#define SYNTH_LDMDIV1 BIT(8)
48
49/* Synthesizer frequency register */
50#define SYNTH_LDFREQ BIT(31)
51
52struct fapll_data {
53 struct clk_hw hw;
54 void __iomem *base;
55 const char *name;
56 struct clk *clk_ref;
57 struct clk *clk_bypass;
58 struct clk_onecell_data outputs;
59 bool bypass_bit_inverted;
60};
61
62struct fapll_synth {
63 struct clk_hw hw;
64 struct fapll_data *fd;
65 int index;
66 void __iomem *freq;
67 void __iomem *div;
68 const char *name;
69 struct clk *clk_pll;
70};
71
72static bool ti_fapll_clock_is_bypass(struct fapll_data *fd)
73{
74 u32 v = readl_relaxed(fd->base);
75
76 if (fd->bypass_bit_inverted)
77 return !(v & FAPLL_MAIN_BP);
78 else
79 return !!(v & FAPLL_MAIN_BP);
80}
81
82static int ti_fapll_enable(struct clk_hw *hw)
83{
84 struct fapll_data *fd = to_fapll(hw);
85 u32 v = readl_relaxed(fd->base);
86
87 v |= FAPLL_MAIN_PLLEN;
88 writel_relaxed(v, fd->base);
89
90 return 0;
91}
92
93static void ti_fapll_disable(struct clk_hw *hw)
94{
95 struct fapll_data *fd = to_fapll(hw);
96 u32 v = readl_relaxed(fd->base);
97
98 v &= ~FAPLL_MAIN_PLLEN;
99 writel_relaxed(v, fd->base);
100}
101
102static int ti_fapll_is_enabled(struct clk_hw *hw)
103{
104 struct fapll_data *fd = to_fapll(hw);
105 u32 v = readl_relaxed(fd->base);
106
107 return v & FAPLL_MAIN_PLLEN;
108}
109
110static unsigned long ti_fapll_recalc_rate(struct clk_hw *hw,
111 unsigned long parent_rate)
112{
113 struct fapll_data *fd = to_fapll(hw);
114 u32 fapll_n, fapll_p, v;
115 long long rate;
116
117 if (ti_fapll_clock_is_bypass(fd))
118 return parent_rate;
119
120 rate = parent_rate;
121
122 /* PLL pre-divider is P and multiplier is N */
123 v = readl_relaxed(fd->base);
124 fapll_p = (v >> 8) & 0xff;
125 if (fapll_p)
126 do_div(rate, fapll_p);
127 fapll_n = v >> 16;
128 if (fapll_n)
129 rate *= fapll_n;
130
131 return rate;
132}
133
134static u8 ti_fapll_get_parent(struct clk_hw *hw)
135{
136 struct fapll_data *fd = to_fapll(hw);
137
138 if (ti_fapll_clock_is_bypass(fd))
139 return 1;
140
141 return 0;
142}
143
144static struct clk_ops ti_fapll_ops = {
145 .enable = ti_fapll_enable,
146 .disable = ti_fapll_disable,
147 .is_enabled = ti_fapll_is_enabled,
148 .recalc_rate = ti_fapll_recalc_rate,
149 .get_parent = ti_fapll_get_parent,
150};
151
152static int ti_fapll_synth_enable(struct clk_hw *hw)
153{
154 struct fapll_synth *synth = to_synth(hw);
155 u32 v = readl_relaxed(synth->fd->base + FAPLL_PWD_OFFSET);
156
157 v &= ~(1 << synth->index);
158 writel_relaxed(v, synth->fd->base + FAPLL_PWD_OFFSET);
159
160 return 0;
161}
162
163static void ti_fapll_synth_disable(struct clk_hw *hw)
164{
165 struct fapll_synth *synth = to_synth(hw);
166 u32 v = readl_relaxed(synth->fd->base + FAPLL_PWD_OFFSET);
167
168 v |= 1 << synth->index;
169 writel_relaxed(v, synth->fd->base + FAPLL_PWD_OFFSET);
170}
171
172static int ti_fapll_synth_is_enabled(struct clk_hw *hw)
173{
174 struct fapll_synth *synth = to_synth(hw);
175 u32 v = readl_relaxed(synth->fd->base + FAPLL_PWD_OFFSET);
176
177 return !(v & (1 << synth->index));
178}
179
180/*
181 * See dm816x TRM chapter 1.10.3 Flying Adder PLL fore more info
182 */
183static unsigned long ti_fapll_synth_recalc_rate(struct clk_hw *hw,
184 unsigned long parent_rate)
185{
186 struct fapll_synth *synth = to_synth(hw);
187 u32 synth_div_m;
188 long long rate;
189
190 /* The audio_pll_clk1 is hardwired to produce 32.768KiHz clock */
191 if (!synth->div)
192 return 32768;
193
194 /*
195 * PLL in bypass sets the synths in bypass mode too. The PLL rate
196 * can be also be set to 27MHz, so we can't use parent_rate to
197 * check for bypass mode.
198 */
199 if (ti_fapll_clock_is_bypass(synth->fd))
200 return parent_rate;
201
202 rate = parent_rate;
203
204 /*
205 * Synth frequency integer and fractional divider.
206 * Note that the phase output K is 8, so the result needs
207 * to be multiplied by 8.
208 */
209 if (synth->freq) {
210 u32 v, synth_int_div, synth_frac_div, synth_div_freq;
211
212 v = readl_relaxed(synth->freq);
213 synth_int_div = (v >> 24) & 0xf;
214 synth_frac_div = v & 0xffffff;
215 synth_div_freq = (synth_int_div * 10000000) + synth_frac_div;
216 rate *= 10000000;
217 do_div(rate, synth_div_freq);
218 rate *= 8;
219 }
220
221 /* Synth ost-divider M */
222 synth_div_m = readl_relaxed(synth->div) & 0xff;
223 do_div(rate, synth_div_m);
224
225 return rate;
226}
227
228static struct clk_ops ti_fapll_synt_ops = {
229 .enable = ti_fapll_synth_enable,
230 .disable = ti_fapll_synth_disable,
231 .is_enabled = ti_fapll_synth_is_enabled,
232 .recalc_rate = ti_fapll_synth_recalc_rate,
233};
234
235static struct clk * __init ti_fapll_synth_setup(struct fapll_data *fd,
236 void __iomem *freq,
237 void __iomem *div,
238 int index,
239 const char *name,
240 const char *parent,
241 struct clk *pll_clk)
242{
243 struct clk_init_data *init;
244 struct fapll_synth *synth;
245
246 init = kzalloc(sizeof(*init), GFP_KERNEL);
247 if (!init)
248 return ERR_PTR(-ENOMEM);
249
250 init->ops = &ti_fapll_synt_ops;
251 init->name = name;
252 init->parent_names = &parent;
253 init->num_parents = 1;
254
255 synth = kzalloc(sizeof(*synth), GFP_KERNEL);
256 if (!synth)
257 goto free;
258
259 synth->fd = fd;
260 synth->index = index;
261 synth->freq = freq;
262 synth->div = div;
263 synth->name = name;
264 synth->hw.init = init;
265 synth->clk_pll = pll_clk;
266
267 return clk_register(NULL, &synth->hw);
268
269free:
270 kfree(synth);
271 kfree(init);
272
273 return ERR_PTR(-ENOMEM);
274}
275
276static void __init ti_fapll_setup(struct device_node *node)
277{
278 struct fapll_data *fd;
279 struct clk_init_data *init = NULL;
280 const char *parent_name[2];
281 struct clk *pll_clk;
282 int i;
283
284 fd = kzalloc(sizeof(*fd), GFP_KERNEL);
285 if (!fd)
286 return;
287
288 fd->outputs.clks = kzalloc(sizeof(struct clk *) *
289 MAX_FAPLL_OUTPUTS + 1,
290 GFP_KERNEL);
291 if (!fd->outputs.clks)
292 goto free;
293
294 init = kzalloc(sizeof(*init), GFP_KERNEL);
295 if (!init)
296 goto free;
297
298 init->ops = &ti_fapll_ops;
299 init->name = node->name;
300
301 init->num_parents = of_clk_get_parent_count(node);
302 if (init->num_parents != 2) {
303 pr_err("%s must have two parents\n", node->name);
304 goto free;
305 }
306
307 parent_name[0] = of_clk_get_parent_name(node, 0);
308 parent_name[1] = of_clk_get_parent_name(node, 1);
309 init->parent_names = parent_name;
310
311 fd->clk_ref = of_clk_get(node, 0);
312 if (IS_ERR(fd->clk_ref)) {
313 pr_err("%s could not get clk_ref\n", node->name);
314 goto free;
315 }
316
317 fd->clk_bypass = of_clk_get(node, 1);
318 if (IS_ERR(fd->clk_bypass)) {
319 pr_err("%s could not get clk_bypass\n", node->name);
320 goto free;
321 }
322
323 fd->base = of_iomap(node, 0);
324 if (!fd->base) {
325 pr_err("%s could not get IO base\n", node->name);
326 goto free;
327 }
328
329 if (fapll_is_ddr_pll(fd->base))
330 fd->bypass_bit_inverted = true;
331
332 fd->name = node->name;
333 fd->hw.init = init;
334
335 /* Register the parent PLL */
336 pll_clk = clk_register(NULL, &fd->hw);
337 if (IS_ERR(pll_clk))
338 goto unmap;
339
340 fd->outputs.clks[0] = pll_clk;
341 fd->outputs.clk_num++;
342
343 /*
344 * Set up the child synthesizers starting at index 1 as the
345 * PLL output is at index 0. We need to check the clock-indices
346 * for numbering in case there are holes in the synth mapping,
347 * and then probe the synth register to see if it has a FREQ
348 * register available.
349 */
350 for (i = 0; i < MAX_FAPLL_OUTPUTS; i++) {
351 const char *output_name;
352 void __iomem *freq, *div;
353 struct clk *synth_clk;
354 int output_instance;
355 u32 v;
356
357 if (of_property_read_string_index(node, "clock-output-names",
358 i, &output_name))
359 continue;
360
361 if (of_property_read_u32_index(node, "clock-indices", i,
362 &output_instance))
363 output_instance = i;
364
365 freq = fd->base + (output_instance * 8);
366 div = freq + 4;
367
368 /* Check for hardwired audio_pll_clk1 */
369 if (is_audio_pll_clk1(freq)) {
370 freq = 0;
371 div = 0;
372 } else {
373 /* Does the synthesizer have a FREQ register? */
374 v = readl_relaxed(freq);
375 if (!v)
376 freq = 0;
377 }
378 synth_clk = ti_fapll_synth_setup(fd, freq, div, output_instance,
379 output_name, node->name,
380 pll_clk);
381 if (IS_ERR(synth_clk))
382 continue;
383
384 fd->outputs.clks[output_instance] = synth_clk;
385 fd->outputs.clk_num++;
386
387 clk_register_clkdev(synth_clk, output_name, NULL);
388 }
389
390 /* Register the child synthesizers as the FAPLL outputs */
391 of_clk_add_provider(node, of_clk_src_onecell_get, &fd->outputs);
392 /* Add clock alias for the outputs */
393
394 kfree(init);
395
396 return;
397
398unmap:
399 iounmap(fd->base);
400free:
401 if (fd->clk_bypass)
402 clk_put(fd->clk_bypass);
403 if (fd->clk_ref)
404 clk_put(fd->clk_ref);
405 kfree(fd->outputs.clks);
406 kfree(fd);
407 kfree(init);
408}
409
410CLK_OF_DECLARE(ti_fapll_clock, "ti,dm816-fapll-clock", ti_fapll_setup);
diff --git a/drivers/clk/ti/gate.c b/drivers/clk/ti/gate.c
index b326d2797feb..d493307b73f4 100644
--- a/drivers/clk/ti/gate.c
+++ b/drivers/clk/ti/gate.c
@@ -22,6 +22,8 @@
22#include <linux/of_address.h> 22#include <linux/of_address.h>
23#include <linux/clk/ti.h> 23#include <linux/clk/ti.h>
24 24
25#include "clock.h"
26
25#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw) 27#define to_clk_divider(_hw) container_of(_hw, struct clk_divider, hw)
26 28
27#undef pr_fmt 29#undef pr_fmt
@@ -90,63 +92,164 @@ static int omap36xx_gate_clk_enable_with_hsdiv_restore(struct clk_hw *clk)
90 return ret; 92 return ret;
91} 93}
92 94
93static void __init _of_ti_gate_clk_setup(struct device_node *node, 95static struct clk *_register_gate(struct device *dev, const char *name,
94 const struct clk_ops *ops, 96 const char *parent_name, unsigned long flags,
95 const struct clk_hw_omap_ops *hw_ops) 97 void __iomem *reg, u8 bit_idx,
98 u8 clk_gate_flags, const struct clk_ops *ops,
99 const struct clk_hw_omap_ops *hw_ops)
96{ 100{
97 struct clk *clk;
98 struct clk_init_data init = { NULL }; 101 struct clk_init_data init = { NULL };
99 struct clk_hw_omap *clk_hw; 102 struct clk_hw_omap *clk_hw;
100 const char *clk_name = node->name; 103 struct clk *clk;
101 const char *parent_name;
102 u32 val;
103 104
104 clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL); 105 clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
105 if (!clk_hw) 106 if (!clk_hw)
106 return; 107 return ERR_PTR(-ENOMEM);
107 108
108 clk_hw->hw.init = &init; 109 clk_hw->hw.init = &init;
109 110
110 init.name = clk_name; 111 init.name = name;
111 init.ops = ops; 112 init.ops = ops;
112 113
113 if (ops != &omap_gate_clkdm_clk_ops) { 114 clk_hw->enable_reg = reg;
114 clk_hw->enable_reg = ti_clk_get_reg_addr(node, 0); 115 clk_hw->enable_bit = bit_idx;
115 if (!clk_hw->enable_reg) 116 clk_hw->ops = hw_ops;
116 goto cleanup;
117 117
118 if (!of_property_read_u32(node, "ti,bit-shift", &val)) 118 clk_hw->flags = MEMMAP_ADDRESSING | clk_gate_flags;
119 clk_hw->enable_bit = val; 119
120 init.parent_names = &parent_name;
121 init.num_parents = 1;
122
123 init.flags = flags;
124
125 clk = clk_register(NULL, &clk_hw->hw);
126
127 if (IS_ERR(clk))
128 kfree(clk_hw);
129
130 return clk;
131}
132
133#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
134struct clk *ti_clk_register_gate(struct ti_clk *setup)
135{
136 const struct clk_ops *ops = &omap_gate_clk_ops;
137 const struct clk_hw_omap_ops *hw_ops = NULL;
138 u32 reg;
139 struct clk_omap_reg *reg_setup;
140 u32 flags = 0;
141 u8 clk_gate_flags = 0;
142 struct ti_clk_gate *gate;
143
144 gate = setup->data;
145
146 if (gate->flags & CLKF_INTERFACE)
147 return ti_clk_register_interface(setup);
148
149 reg_setup = (struct clk_omap_reg *)&reg;
150
151 if (gate->flags & CLKF_SET_RATE_PARENT)
152 flags |= CLK_SET_RATE_PARENT;
153
154 if (gate->flags & CLKF_SET_BIT_TO_DISABLE)
155 clk_gate_flags |= INVERT_ENABLE;
156
157 if (gate->flags & CLKF_HSDIV) {
158 ops = &omap_gate_clk_hsdiv_restore_ops;
159 hw_ops = &clkhwops_wait;
120 } 160 }
121 161
122 clk_hw->ops = hw_ops; 162 if (gate->flags & CLKF_DSS)
163 hw_ops = &clkhwops_omap3430es2_dss_usbhost_wait;
164
165 if (gate->flags & CLKF_WAIT)
166 hw_ops = &clkhwops_wait;
167
168 if (gate->flags & CLKF_CLKDM)
169 ops = &omap_gate_clkdm_clk_ops;
170
171 if (gate->flags & CLKF_AM35XX)
172 hw_ops = &clkhwops_am35xx_ipss_module_wait;
123 173
124 clk_hw->flags = MEMMAP_ADDRESSING; 174 reg_setup->index = gate->module;
175 reg_setup->offset = gate->reg;
176
177 return _register_gate(NULL, setup->name, gate->parent, flags,
178 (void __iomem *)reg, gate->bit_shift,
179 clk_gate_flags, ops, hw_ops);
180}
181
182struct clk_hw *ti_clk_build_component_gate(struct ti_clk_gate *setup)
183{
184 struct clk_hw_omap *gate;
185 struct clk_omap_reg *reg;
186 const struct clk_hw_omap_ops *ops = &clkhwops_wait;
187
188 if (!setup)
189 return NULL;
190
191 gate = kzalloc(sizeof(*gate), GFP_KERNEL);
192 if (!gate)
193 return ERR_PTR(-ENOMEM);
194
195 reg = (struct clk_omap_reg *)&gate->enable_reg;
196 reg->index = setup->module;
197 reg->offset = setup->reg;
198
199 gate->enable_bit = setup->bit_shift;
200
201 if (setup->flags & CLKF_NO_WAIT)
202 ops = NULL;
203
204 if (setup->flags & CLKF_INTERFACE)
205 ops = &clkhwops_iclk_wait;
206
207 gate->ops = ops;
208 gate->flags = MEMMAP_ADDRESSING;
209
210 return &gate->hw;
211}
212#endif
213
214static void __init _of_ti_gate_clk_setup(struct device_node *node,
215 const struct clk_ops *ops,
216 const struct clk_hw_omap_ops *hw_ops)
217{
218 struct clk *clk;
219 const char *parent_name;
220 void __iomem *reg = NULL;
221 u8 enable_bit = 0;
222 u32 val;
223 u32 flags = 0;
224 u8 clk_gate_flags = 0;
225
226 if (ops != &omap_gate_clkdm_clk_ops) {
227 reg = ti_clk_get_reg_addr(node, 0);
228 if (!reg)
229 return;
230
231 if (!of_property_read_u32(node, "ti,bit-shift", &val))
232 enable_bit = val;
233 }
125 234
126 if (of_clk_get_parent_count(node) != 1) { 235 if (of_clk_get_parent_count(node) != 1) {
127 pr_err("%s must have 1 parent\n", clk_name); 236 pr_err("%s must have 1 parent\n", node->name);
128 goto cleanup; 237 return;
129 } 238 }
130 239
131 parent_name = of_clk_get_parent_name(node, 0); 240 parent_name = of_clk_get_parent_name(node, 0);
132 init.parent_names = &parent_name;
133 init.num_parents = 1;
134 241
135 if (of_property_read_bool(node, "ti,set-rate-parent")) 242 if (of_property_read_bool(node, "ti,set-rate-parent"))
136 init.flags |= CLK_SET_RATE_PARENT; 243 flags |= CLK_SET_RATE_PARENT;
137 244
138 if (of_property_read_bool(node, "ti,set-bit-to-disable")) 245 if (of_property_read_bool(node, "ti,set-bit-to-disable"))
139 clk_hw->flags |= INVERT_ENABLE; 246 clk_gate_flags |= INVERT_ENABLE;
140 247
141 clk = clk_register(NULL, &clk_hw->hw); 248 clk = _register_gate(NULL, node->name, parent_name, flags, reg,
249 enable_bit, clk_gate_flags, ops, hw_ops);
142 250
143 if (!IS_ERR(clk)) { 251 if (!IS_ERR(clk))
144 of_clk_add_provider(node, of_clk_src_simple_get, clk); 252 of_clk_add_provider(node, of_clk_src_simple_get, clk);
145 return;
146 }
147
148cleanup:
149 kfree(clk_hw);
150} 253}
151 254
152static void __init 255static void __init
diff --git a/drivers/clk/ti/interface.c b/drivers/clk/ti/interface.c
index 9c3e8c4aaa40..265d91f071c5 100644
--- a/drivers/clk/ti/interface.c
+++ b/drivers/clk/ti/interface.c
@@ -20,6 +20,7 @@
20#include <linux/of.h> 20#include <linux/of.h>
21#include <linux/of_address.h> 21#include <linux/of_address.h>
22#include <linux/clk/ti.h> 22#include <linux/clk/ti.h>
23#include "clock.h"
23 24
24#undef pr_fmt 25#undef pr_fmt
25#define pr_fmt(fmt) "%s: " fmt, __func__ 26#define pr_fmt(fmt) "%s: " fmt, __func__
@@ -31,53 +32,102 @@ static const struct clk_ops ti_interface_clk_ops = {
31 .is_enabled = &omap2_dflt_clk_is_enabled, 32 .is_enabled = &omap2_dflt_clk_is_enabled,
32}; 33};
33 34
34static void __init _of_ti_interface_clk_setup(struct device_node *node, 35static struct clk *_register_interface(struct device *dev, const char *name,
35 const struct clk_hw_omap_ops *ops) 36 const char *parent_name,
37 void __iomem *reg, u8 bit_idx,
38 const struct clk_hw_omap_ops *ops)
36{ 39{
37 struct clk *clk;
38 struct clk_init_data init = { NULL }; 40 struct clk_init_data init = { NULL };
39 struct clk_hw_omap *clk_hw; 41 struct clk_hw_omap *clk_hw;
40 const char *parent_name; 42 struct clk *clk;
41 u32 val;
42 43
43 clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL); 44 clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
44 if (!clk_hw) 45 if (!clk_hw)
45 return; 46 return ERR_PTR(-ENOMEM);
46 47
47 clk_hw->hw.init = &init; 48 clk_hw->hw.init = &init;
48 clk_hw->ops = ops; 49 clk_hw->ops = ops;
49 clk_hw->flags = MEMMAP_ADDRESSING; 50 clk_hw->flags = MEMMAP_ADDRESSING;
51 clk_hw->enable_reg = reg;
52 clk_hw->enable_bit = bit_idx;
50 53
51 clk_hw->enable_reg = ti_clk_get_reg_addr(node, 0); 54 init.name = name;
52 if (!clk_hw->enable_reg)
53 goto cleanup;
54
55 if (!of_property_read_u32(node, "ti,bit-shift", &val))
56 clk_hw->enable_bit = val;
57
58 init.name = node->name;
59 init.ops = &ti_interface_clk_ops; 55 init.ops = &ti_interface_clk_ops;
60 init.flags = 0; 56 init.flags = 0;
61 57
62 parent_name = of_clk_get_parent_name(node, 0);
63 if (!parent_name) {
64 pr_err("%s must have a parent\n", node->name);
65 goto cleanup;
66 }
67
68 init.num_parents = 1; 58 init.num_parents = 1;
69 init.parent_names = &parent_name; 59 init.parent_names = &parent_name;
70 60
71 clk = clk_register(NULL, &clk_hw->hw); 61 clk = clk_register(NULL, &clk_hw->hw);
72 62
73 if (!IS_ERR(clk)) { 63 if (IS_ERR(clk))
74 of_clk_add_provider(node, of_clk_src_simple_get, clk); 64 kfree(clk_hw);
65 else
75 omap2_init_clk_hw_omap_clocks(clk); 66 omap2_init_clk_hw_omap_clocks(clk);
67
68 return clk;
69}
70
71#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_ATAGS)
72struct clk *ti_clk_register_interface(struct ti_clk *setup)
73{
74 const struct clk_hw_omap_ops *ops = &clkhwops_iclk_wait;
75 u32 reg;
76 struct clk_omap_reg *reg_setup;
77 struct ti_clk_gate *gate;
78
79 gate = setup->data;
80 reg_setup = (struct clk_omap_reg *)&reg;
81 reg_setup->index = gate->module;
82 reg_setup->offset = gate->reg;
83
84 if (gate->flags & CLKF_NO_WAIT)
85 ops = &clkhwops_iclk;
86
87 if (gate->flags & CLKF_HSOTGUSB)
88 ops = &clkhwops_omap3430es2_iclk_hsotgusb_wait;
89
90 if (gate->flags & CLKF_DSS)
91 ops = &clkhwops_omap3430es2_iclk_dss_usbhost_wait;
92
93 if (gate->flags & CLKF_SSI)
94 ops = &clkhwops_omap3430es2_iclk_ssi_wait;
95
96 if (gate->flags & CLKF_AM35XX)
97 ops = &clkhwops_am35xx_ipss_wait;
98
99 return _register_interface(NULL, setup->name, gate->parent,
100 (void __iomem *)reg, gate->bit_shift, ops);
101}
102#endif
103
104static void __init _of_ti_interface_clk_setup(struct device_node *node,
105 const struct clk_hw_omap_ops *ops)
106{
107 struct clk *clk;
108 const char *parent_name;
109 void __iomem *reg;
110 u8 enable_bit = 0;
111 u32 val;
112
113 reg = ti_clk_get_reg_addr(node, 0);
114 if (!reg)
115 return;
116
117 if (!of_property_read_u32(node, "ti,bit-shift", &val))
118 enable_bit = val;
119
120 parent_name = of_clk_get_parent_name(node, 0);
121 if (!parent_name) {
122 pr_err("%s must have a parent\n", node->name);
76 return; 123 return;
77 } 124 }
78 125
79cleanup: 126 clk = _register_interface(NULL, node->name, parent_name, reg,
80 kfree(clk_hw); 127 enable_bit, ops);
128
129 if (!IS_ERR(clk))
130 of_clk_add_provider(node, of_clk_src_simple_get, clk);
81} 131}
82 132
83static void __init of_ti_interface_clk_setup(struct device_node *node) 133static void __init of_ti_interface_clk_setup(struct device_node *node)
diff --git a/drivers/clk/ti/mux.c b/drivers/clk/ti/mux.c
index e9d650e51287..728e253606bc 100644
--- a/drivers/clk/ti/mux.c
+++ b/drivers/clk/ti/mux.c
@@ -21,6 +21,7 @@
21#include <linux/of.h> 21#include <linux/of.h>
22#include <linux/of_address.h> 22#include <linux/of_address.h>
23#include <linux/clk/ti.h> 23#include <linux/clk/ti.h>
24#include "clock.h"
24 25
25#undef pr_fmt 26#undef pr_fmt
26#define pr_fmt(fmt) "%s: " fmt, __func__ 27#define pr_fmt(fmt) "%s: " fmt, __func__
@@ -144,6 +145,39 @@ static struct clk *_register_mux(struct device *dev, const char *name,
144 return clk; 145 return clk;
145} 146}
146 147
148struct clk *ti_clk_register_mux(struct ti_clk *setup)
149{
150 struct ti_clk_mux *mux;
151 u32 flags;
152 u8 mux_flags = 0;
153 struct clk_omap_reg *reg_setup;
154 u32 reg;
155 u32 mask;
156
157 reg_setup = (struct clk_omap_reg *)&reg;
158
159 mux = setup->data;
160 flags = CLK_SET_RATE_NO_REPARENT;
161
162 mask = mux->num_parents;
163 if (!(mux->flags & CLKF_INDEX_STARTS_AT_ONE))
164 mask--;
165
166 mask = (1 << fls(mask)) - 1;
167 reg_setup->index = mux->module;
168 reg_setup->offset = mux->reg;
169
170 if (mux->flags & CLKF_INDEX_STARTS_AT_ONE)
171 mux_flags |= CLK_MUX_INDEX_ONE;
172
173 if (mux->flags & CLKF_SET_RATE_PARENT)
174 flags |= CLK_SET_RATE_PARENT;
175
176 return _register_mux(NULL, setup->name, mux->parents, mux->num_parents,
177 flags, (void __iomem *)reg, mux->bit_shift, mask,
178 mux_flags, NULL, NULL);
179}
180
147/** 181/**
148 * of_mux_clk_setup - Setup function for simple mux rate clock 182 * of_mux_clk_setup - Setup function for simple mux rate clock
149 * @node: DT node for the clock 183 * @node: DT node for the clock
@@ -194,8 +228,9 @@ static void of_mux_clk_setup(struct device_node *node)
194 228
195 mask = (1 << fls(mask)) - 1; 229 mask = (1 << fls(mask)) - 1;
196 230
197 clk = _register_mux(NULL, node->name, parent_names, num_parents, flags, 231 clk = _register_mux(NULL, node->name, parent_names, num_parents,
198 reg, shift, mask, clk_mux_flags, NULL, NULL); 232 flags, reg, shift, mask, clk_mux_flags, NULL,
233 NULL);
199 234
200 if (!IS_ERR(clk)) 235 if (!IS_ERR(clk))
201 of_clk_add_provider(node, of_clk_src_simple_get, clk); 236 of_clk_add_provider(node, of_clk_src_simple_get, clk);
@@ -205,6 +240,37 @@ cleanup:
205} 240}
206CLK_OF_DECLARE(mux_clk, "ti,mux-clock", of_mux_clk_setup); 241CLK_OF_DECLARE(mux_clk, "ti,mux-clock", of_mux_clk_setup);
207 242
243struct clk_hw *ti_clk_build_component_mux(struct ti_clk_mux *setup)
244{
245 struct clk_mux *mux;
246 struct clk_omap_reg *reg;
247 int num_parents;
248
249 if (!setup)
250 return NULL;
251
252 mux = kzalloc(sizeof(*mux), GFP_KERNEL);
253 if (!mux)
254 return ERR_PTR(-ENOMEM);
255
256 reg = (struct clk_omap_reg *)&mux->reg;
257
258 mux->shift = setup->bit_shift;
259
260 reg->index = setup->module;
261 reg->offset = setup->reg;
262
263 if (setup->flags & CLKF_INDEX_STARTS_AT_ONE)
264 mux->flags |= CLK_MUX_INDEX_ONE;
265
266 num_parents = setup->num_parents;
267
268 mux->mask = num_parents - 1;
269 mux->mask = (1 << fls(mux->mask)) - 1;
270
271 return &mux->hw;
272}
273
208static void __init of_ti_composite_mux_clk_setup(struct device_node *node) 274static void __init of_ti_composite_mux_clk_setup(struct device_node *node)
209{ 275{
210 struct clk_mux *mux; 276 struct clk_mux *mux;
diff --git a/drivers/clk/ux500/clk-prcc.c b/drivers/clk/ux500/clk-prcc.c
index bd4769a84485..0e950769ed03 100644
--- a/drivers/clk/ux500/clk-prcc.c
+++ b/drivers/clk/ux500/clk-prcc.c
@@ -8,7 +8,6 @@
8 */ 8 */
9 9
10#include <linux/clk-provider.h> 10#include <linux/clk-provider.h>
11#include <linux/clk-private.h>
12#include <linux/slab.h> 11#include <linux/slab.h>
13#include <linux/io.h> 12#include <linux/io.h>
14#include <linux/err.h> 13#include <linux/err.h>
diff --git a/drivers/clk/ux500/clk-prcmu.c b/drivers/clk/ux500/clk-prcmu.c
index e2d63bc47436..bf63c96acb1a 100644
--- a/drivers/clk/ux500/clk-prcmu.c
+++ b/drivers/clk/ux500/clk-prcmu.c
@@ -8,7 +8,6 @@
8 */ 8 */
9 9
10#include <linux/clk-provider.h> 10#include <linux/clk-provider.h>
11#include <linux/clk-private.h>
12#include <linux/mfd/dbx500-prcmu.h> 11#include <linux/mfd/dbx500-prcmu.h>
13#include <linux/slab.h> 12#include <linux/slab.h>
14#include <linux/io.h> 13#include <linux/io.h>
diff --git a/drivers/clk/zynq/clkc.c b/drivers/clk/zynq/clkc.c
index 9037bebd69f7..f870aad57711 100644
--- a/drivers/clk/zynq/clkc.c
+++ b/drivers/clk/zynq/clkc.c
@@ -303,6 +303,7 @@ static void __init zynq_clk_setup(struct device_node *np)
303 clks[cpu_2x] = clk_register_gate(NULL, clk_output_name[cpu_2x], 303 clks[cpu_2x] = clk_register_gate(NULL, clk_output_name[cpu_2x],
304 "cpu_2x_div", CLK_IGNORE_UNUSED, SLCR_ARM_CLK_CTRL, 304 "cpu_2x_div", CLK_IGNORE_UNUSED, SLCR_ARM_CLK_CTRL,
305 26, 0, &armclk_lock); 305 26, 0, &armclk_lock);
306 clk_prepare_enable(clks[cpu_2x]);
306 307
307 clk = clk_register_fixed_factor(NULL, "cpu_1x_div", "cpu_div", 0, 1, 308 clk = clk_register_fixed_factor(NULL, "cpu_1x_div", "cpu_div", 0, 1,
308 4 + 2 * tmp); 309 4 + 2 * tmp);
diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig
index 1c2506f68122..68161f7a07d6 100644
--- a/drivers/clocksource/Kconfig
+++ b/drivers/clocksource/Kconfig
@@ -63,6 +63,11 @@ config VT8500_TIMER
63config CADENCE_TTC_TIMER 63config CADENCE_TTC_TIMER
64 bool 64 bool
65 65
66config ASM9260_TIMER
67 bool
68 select CLKSRC_MMIO
69 select CLKSRC_OF
70
66config CLKSRC_NOMADIK_MTU 71config CLKSRC_NOMADIK_MTU
67 bool 72 bool
68 depends on (ARCH_NOMADIK || ARCH_U8500) 73 depends on (ARCH_NOMADIK || ARCH_U8500)
@@ -245,15 +250,4 @@ config CLKSRC_PXA
245 help 250 help
246 This enables OST0 support available on PXA and SA-11x0 251 This enables OST0 support available on PXA and SA-11x0
247 platforms. 252 platforms.
248
249config ASM9260_TIMER
250 bool "Alphascale ASM9260 timer driver"
251 depends on GENERIC_CLOCKEVENTS
252 select CLKSRC_MMIO
253 select CLKSRC_OF
254 default y if MACH_ASM9260
255 help
256 This enables build of a clocksource and clockevent driver for
257 the 32-bit System Timer hardware available on a Alphascale ASM9260.
258
259endmenu 253endmenu
diff --git a/drivers/clocksource/mtk_timer.c b/drivers/clocksource/mtk_timer.c
index 32a3d25795d3..68ab42356d0e 100644
--- a/drivers/clocksource/mtk_timer.c
+++ b/drivers/clocksource/mtk_timer.c
@@ -224,6 +224,8 @@ static void __init mtk_timer_init(struct device_node *node)
224 } 224 }
225 rate = clk_get_rate(clk); 225 rate = clk_get_rate(clk);
226 226
227 mtk_timer_global_reset(evt);
228
227 if (request_irq(evt->dev.irq, mtk_timer_interrupt, 229 if (request_irq(evt->dev.irq, mtk_timer_interrupt,
228 IRQF_TIMER | IRQF_IRQPOLL, "mtk_timer", evt)) { 230 IRQF_TIMER | IRQF_IRQPOLL, "mtk_timer", evt)) {
229 pr_warn("failed to setup irq %d\n", evt->dev.irq); 231 pr_warn("failed to setup irq %d\n", evt->dev.irq);
@@ -232,8 +234,6 @@ static void __init mtk_timer_init(struct device_node *node)
232 234
233 evt->ticks_per_jiffy = DIV_ROUND_UP(rate, HZ); 235 evt->ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
234 236
235 mtk_timer_global_reset(evt);
236
237 /* Configure clock source */ 237 /* Configure clock source */
238 mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN); 238 mtk_timer_setup(evt, GPT_CLK_SRC, TIMER_CTRL_OP_FREERUN);
239 clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC), 239 clocksource_mmio_init(evt->gpt_base + TIMER_CNT_REG(GPT_CLK_SRC),
@@ -241,10 +241,11 @@ static void __init mtk_timer_init(struct device_node *node)
241 241
242 /* Configure clock event */ 242 /* Configure clock event */
243 mtk_timer_setup(evt, GPT_CLK_EVT, TIMER_CTRL_OP_REPEAT); 243 mtk_timer_setup(evt, GPT_CLK_EVT, TIMER_CTRL_OP_REPEAT);
244 mtk_timer_enable_irq(evt, GPT_CLK_EVT);
245
246 clockevents_config_and_register(&evt->dev, rate, 0x3, 244 clockevents_config_and_register(&evt->dev, rate, 0x3,
247 0xffffffff); 245 0xffffffff);
246
247 mtk_timer_enable_irq(evt, GPT_CLK_EVT);
248
248 return; 249 return;
249 250
250err_clk_disable: 251err_clk_disable:
diff --git a/drivers/clocksource/pxa_timer.c b/drivers/clocksource/pxa_timer.c
index 941f3f344e08..d9438af2bbd6 100644
--- a/drivers/clocksource/pxa_timer.c
+++ b/drivers/clocksource/pxa_timer.c
@@ -163,7 +163,7 @@ static struct irqaction pxa_ost0_irq = {
163 .dev_id = &ckevt_pxa_osmr0, 163 .dev_id = &ckevt_pxa_osmr0,
164}; 164};
165 165
166static void pxa_timer_common_init(int irq, unsigned long clock_tick_rate) 166static void __init pxa_timer_common_init(int irq, unsigned long clock_tick_rate)
167{ 167{
168 timer_writel(0, OIER); 168 timer_writel(0, OIER);
169 timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR); 169 timer_writel(OSSR_M0 | OSSR_M1 | OSSR_M2 | OSSR_M3, OSSR);
diff --git a/drivers/clocksource/time-efm32.c b/drivers/clocksource/time-efm32.c
index bba62f9deefb..ec57ba2bbd87 100644
--- a/drivers/clocksource/time-efm32.c
+++ b/drivers/clocksource/time-efm32.c
@@ -225,12 +225,12 @@ static int __init efm32_clockevent_init(struct device_node *np)
225 clock_event_ddata.base = base; 225 clock_event_ddata.base = base;
226 clock_event_ddata.periodic_top = DIV_ROUND_CLOSEST(rate, 1024 * HZ); 226 clock_event_ddata.periodic_top = DIV_ROUND_CLOSEST(rate, 1024 * HZ);
227 227
228 setup_irq(irq, &efm32_clock_event_irq);
229
230 clockevents_config_and_register(&clock_event_ddata.evtdev, 228 clockevents_config_and_register(&clock_event_ddata.evtdev,
231 DIV_ROUND_CLOSEST(rate, 1024), 229 DIV_ROUND_CLOSEST(rate, 1024),
232 0xf, 0xffff); 230 0xf, 0xffff);
233 231
232 setup_irq(irq, &efm32_clock_event_irq);
233
234 return 0; 234 return 0;
235 235
236err_get_irq: 236err_get_irq:
diff --git a/drivers/clocksource/timer-sun5i.c b/drivers/clocksource/timer-sun5i.c
index 02268448dc85..5dcbf90b8015 100644
--- a/drivers/clocksource/timer-sun5i.c
+++ b/drivers/clocksource/timer-sun5i.c
@@ -178,10 +178,6 @@ static void __init sun5i_timer_init(struct device_node *node)
178 178
179 ticks_per_jiffy = DIV_ROUND_UP(rate, HZ); 179 ticks_per_jiffy = DIV_ROUND_UP(rate, HZ);
180 180
181 ret = setup_irq(irq, &sun5i_timer_irq);
182 if (ret)
183 pr_warn("failed to setup irq %d\n", irq);
184
185 /* Enable timer0 interrupt */ 181 /* Enable timer0 interrupt */
186 val = readl(timer_base + TIMER_IRQ_EN_REG); 182 val = readl(timer_base + TIMER_IRQ_EN_REG);
187 writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG); 183 writel(val | TIMER_IRQ_EN(0), timer_base + TIMER_IRQ_EN_REG);
@@ -191,6 +187,10 @@ static void __init sun5i_timer_init(struct device_node *node)
191 187
192 clockevents_config_and_register(&sun5i_clockevent, rate, 188 clockevents_config_and_register(&sun5i_clockevent, rate,
193 TIMER_SYNC_TICKS, 0xffffffff); 189 TIMER_SYNC_TICKS, 0xffffffff);
190
191 ret = setup_irq(irq, &sun5i_timer_irq);
192 if (ret)
193 pr_warn("failed to setup irq %d\n", irq);
194} 194}
195CLOCKSOURCE_OF_DECLARE(sun5i_a13, "allwinner,sun5i-a13-hstimer", 195CLOCKSOURCE_OF_DECLARE(sun5i_a13, "allwinner,sun5i-a13-hstimer",
196 sun5i_timer_init); 196 sun5i_timer_init);
diff --git a/drivers/cpufreq/Kconfig.powerpc b/drivers/cpufreq/Kconfig.powerpc
index 72564b701b4a..7ea24413cee6 100644
--- a/drivers/cpufreq/Kconfig.powerpc
+++ b/drivers/cpufreq/Kconfig.powerpc
@@ -26,7 +26,7 @@ config CPU_FREQ_MAPLE
26config PPC_CORENET_CPUFREQ 26config PPC_CORENET_CPUFREQ
27 tristate "CPU frequency scaling driver for Freescale E500MC SoCs" 27 tristate "CPU frequency scaling driver for Freescale E500MC SoCs"
28 depends on PPC_E500MC && OF && COMMON_CLK 28 depends on PPC_E500MC && OF && COMMON_CLK
29 select CLK_PPC_CORENET 29 select CLK_QORIQ
30 help 30 help
31 This adds the CPUFreq driver support for Freescale e500mc, 31 This adds the CPUFreq driver support for Freescale e500mc,
32 e5500 and e6500 series SoCs which are capable of changing 32 e5500 and e6500 series SoCs which are capable of changing
diff --git a/drivers/cpufreq/exynos-cpufreq.c b/drivers/cpufreq/exynos-cpufreq.c
index 5e98c6b1f284..82d2fbb20f7e 100644
--- a/drivers/cpufreq/exynos-cpufreq.c
+++ b/drivers/cpufreq/exynos-cpufreq.c
@@ -159,7 +159,7 @@ static struct cpufreq_driver exynos_driver = {
159 159
160static int exynos_cpufreq_probe(struct platform_device *pdev) 160static int exynos_cpufreq_probe(struct platform_device *pdev)
161{ 161{
162 struct device_node *cpus, *np; 162 struct device_node *cpu0;
163 int ret = -EINVAL; 163 int ret = -EINVAL;
164 164
165 exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL); 165 exynos_info = kzalloc(sizeof(*exynos_info), GFP_KERNEL);
@@ -206,28 +206,19 @@ static int exynos_cpufreq_probe(struct platform_device *pdev)
206 if (ret) 206 if (ret)
207 goto err_cpufreq_reg; 207 goto err_cpufreq_reg;
208 208
209 cpus = of_find_node_by_path("/cpus"); 209 cpu0 = of_get_cpu_node(0, NULL);
210 if (!cpus) { 210 if (!cpu0) {
211 pr_err("failed to find cpus node\n"); 211 pr_err("failed to find cpu0 node\n");
212 return 0; 212 return 0;
213 } 213 }
214 214
215 np = of_get_next_child(cpus, NULL); 215 if (of_find_property(cpu0, "#cooling-cells", NULL)) {
216 if (!np) { 216 cdev = of_cpufreq_cooling_register(cpu0,
217 pr_err("failed to find cpus child node\n");
218 of_node_put(cpus);
219 return 0;
220 }
221
222 if (of_find_property(np, "#cooling-cells", NULL)) {
223 cdev = of_cpufreq_cooling_register(np,
224 cpu_present_mask); 217 cpu_present_mask);
225 if (IS_ERR(cdev)) 218 if (IS_ERR(cdev))
226 pr_err("running cpufreq without cooling device: %ld\n", 219 pr_err("running cpufreq without cooling device: %ld\n",
227 PTR_ERR(cdev)); 220 PTR_ERR(cdev));
228 } 221 }
229 of_node_put(np);
230 of_node_put(cpus);
231 222
232 return 0; 223 return 0;
233 224
diff --git a/drivers/cpufreq/ppc-corenet-cpufreq.c b/drivers/cpufreq/ppc-corenet-cpufreq.c
index bee5df7794d3..7cb4b766cf94 100644
--- a/drivers/cpufreq/ppc-corenet-cpufreq.c
+++ b/drivers/cpufreq/ppc-corenet-cpufreq.c
@@ -22,6 +22,8 @@
22#include <linux/smp.h> 22#include <linux/smp.h>
23#include <sysdev/fsl_soc.h> 23#include <sysdev/fsl_soc.h>
24 24
25#include <asm/smp.h> /* for get_hard_smp_processor_id() in UP configs */
26
25/** 27/**
26 * struct cpu_data - per CPU data struct 28 * struct cpu_data - per CPU data struct
27 * @parent: the parent node of cpu clock 29 * @parent: the parent node of cpu clock
diff --git a/drivers/cpufreq/s3c2416-cpufreq.c b/drivers/cpufreq/s3c2416-cpufreq.c
index 2fd53eaaec20..d6d425773fa4 100644
--- a/drivers/cpufreq/s3c2416-cpufreq.c
+++ b/drivers/cpufreq/s3c2416-cpufreq.c
@@ -263,7 +263,7 @@ out:
263} 263}
264 264
265#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE 265#ifdef CONFIG_ARM_S3C2416_CPUFREQ_VCORESCALE
266static void __init s3c2416_cpufreq_cfg_regulator(struct s3c2416_data *s3c_freq) 266static void s3c2416_cpufreq_cfg_regulator(struct s3c2416_data *s3c_freq)
267{ 267{
268 int count, v, i, found; 268 int count, v, i, found;
269 struct cpufreq_frequency_table *pos; 269 struct cpufreq_frequency_table *pos;
@@ -333,7 +333,7 @@ static struct notifier_block s3c2416_cpufreq_reboot_notifier = {
333 .notifier_call = s3c2416_cpufreq_reboot_notifier_evt, 333 .notifier_call = s3c2416_cpufreq_reboot_notifier_evt,
334}; 334};
335 335
336static int __init s3c2416_cpufreq_driver_init(struct cpufreq_policy *policy) 336static int s3c2416_cpufreq_driver_init(struct cpufreq_policy *policy)
337{ 337{
338 struct s3c2416_data *s3c_freq = &s3c2416_cpufreq; 338 struct s3c2416_data *s3c_freq = &s3c2416_cpufreq;
339 struct cpufreq_frequency_table *pos; 339 struct cpufreq_frequency_table *pos;
diff --git a/drivers/cpufreq/s3c24xx-cpufreq.c b/drivers/cpufreq/s3c24xx-cpufreq.c
index d00f1cee4509..733aa5153e74 100644
--- a/drivers/cpufreq/s3c24xx-cpufreq.c
+++ b/drivers/cpufreq/s3c24xx-cpufreq.c
@@ -144,11 +144,6 @@ static void s3c_cpufreq_setfvco(struct s3c_cpufreq_config *cfg)
144 (cfg->info->set_fvco)(cfg); 144 (cfg->info->set_fvco)(cfg);
145} 145}
146 146
147static inline void s3c_cpufreq_resume_clocks(void)
148{
149 cpu_cur.info->resume_clocks();
150}
151
152static inline void s3c_cpufreq_updateclk(struct clk *clk, 147static inline void s3c_cpufreq_updateclk(struct clk *clk,
153 unsigned int freq) 148 unsigned int freq)
154{ 149{
@@ -417,9 +412,6 @@ static int s3c_cpufreq_resume(struct cpufreq_policy *policy)
417 412
418 last_target = ~0; /* invalidate last_target setting */ 413 last_target = ~0; /* invalidate last_target setting */
419 414
420 /* first, find out what speed we resumed at. */
421 s3c_cpufreq_resume_clocks();
422
423 /* whilst we will be called later on, we try and re-set the 415 /* whilst we will be called later on, we try and re-set the
424 * cpu frequencies as soon as possible so that we do not end 416 * cpu frequencies as soon as possible so that we do not end
425 * up resuming devices and then immediately having to re-set 417 * up resuming devices and then immediately having to re-set
@@ -454,7 +446,7 @@ static struct cpufreq_driver s3c24xx_driver = {
454}; 446};
455 447
456 448
457int __init s3c_cpufreq_register(struct s3c_cpufreq_info *info) 449int s3c_cpufreq_register(struct s3c_cpufreq_info *info)
458{ 450{
459 if (!info || !info->name) { 451 if (!info || !info->name) {
460 printk(KERN_ERR "%s: failed to pass valid information\n", 452 printk(KERN_ERR "%s: failed to pass valid information\n",
diff --git a/drivers/cpuidle/cpuidle-mvebu-v7.c b/drivers/cpuidle/cpuidle-mvebu-v7.c
index 38e68618513a..980151f34707 100644
--- a/drivers/cpuidle/cpuidle-mvebu-v7.c
+++ b/drivers/cpuidle/cpuidle-mvebu-v7.c
@@ -37,11 +37,11 @@ static int mvebu_v7_enter_idle(struct cpuidle_device *dev,
37 deepidle = true; 37 deepidle = true;
38 38
39 ret = mvebu_v7_cpu_suspend(deepidle); 39 ret = mvebu_v7_cpu_suspend(deepidle);
40 cpu_pm_exit();
41
40 if (ret) 42 if (ret)
41 return ret; 43 return ret;
42 44
43 cpu_pm_exit();
44
45 return index; 45 return index;
46} 46}
47 47
@@ -50,17 +50,17 @@ static struct cpuidle_driver armadaxp_idle_driver = {
50 .states[0] = ARM_CPUIDLE_WFI_STATE, 50 .states[0] = ARM_CPUIDLE_WFI_STATE,
51 .states[1] = { 51 .states[1] = {
52 .enter = mvebu_v7_enter_idle, 52 .enter = mvebu_v7_enter_idle,
53 .exit_latency = 10, 53 .exit_latency = 100,
54 .power_usage = 50, 54 .power_usage = 50,
55 .target_residency = 100, 55 .target_residency = 1000,
56 .name = "MV CPU IDLE", 56 .name = "MV CPU IDLE",
57 .desc = "CPU power down", 57 .desc = "CPU power down",
58 }, 58 },
59 .states[2] = { 59 .states[2] = {
60 .enter = mvebu_v7_enter_idle, 60 .enter = mvebu_v7_enter_idle,
61 .exit_latency = 100, 61 .exit_latency = 1000,
62 .power_usage = 5, 62 .power_usage = 5,
63 .target_residency = 1000, 63 .target_residency = 10000,
64 .flags = MVEBU_V7_FLAG_DEEP_IDLE, 64 .flags = MVEBU_V7_FLAG_DEEP_IDLE,
65 .name = "MV CPU DEEP IDLE", 65 .name = "MV CPU DEEP IDLE",
66 .desc = "CPU and L2 Fabric power down", 66 .desc = "CPU and L2 Fabric power down",
diff --git a/drivers/cpuidle/cpuidle-powernv.c b/drivers/cpuidle/cpuidle-powernv.c
index aedec0957934..59372077ec7c 100644
--- a/drivers/cpuidle/cpuidle-powernv.c
+++ b/drivers/cpuidle/cpuidle-powernv.c
@@ -13,6 +13,7 @@
13#include <linux/notifier.h> 13#include <linux/notifier.h>
14#include <linux/clockchips.h> 14#include <linux/clockchips.h>
15#include <linux/of.h> 15#include <linux/of.h>
16#include <linux/slab.h>
16 17
17#include <asm/machdep.h> 18#include <asm/machdep.h>
18#include <asm/firmware.h> 19#include <asm/firmware.h>
@@ -158,70 +159,83 @@ static int powernv_add_idle_states(void)
158 struct device_node *power_mgt; 159 struct device_node *power_mgt;
159 int nr_idle_states = 1; /* Snooze */ 160 int nr_idle_states = 1; /* Snooze */
160 int dt_idle_states; 161 int dt_idle_states;
161 const __be32 *idle_state_flags; 162 u32 *latency_ns, *residency_ns, *flags;
162 const __be32 *idle_state_latency; 163 int i, rc;
163 u32 len_flags, flags, latency_ns;
164 int i;
165 164
166 /* Currently we have snooze statically defined */ 165 /* Currently we have snooze statically defined */
167 166
168 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt"); 167 power_mgt = of_find_node_by_path("/ibm,opal/power-mgt");
169 if (!power_mgt) { 168 if (!power_mgt) {
170 pr_warn("opal: PowerMgmt Node not found\n"); 169 pr_warn("opal: PowerMgmt Node not found\n");
171 return nr_idle_states; 170 goto out;
172 } 171 }
173 172
174 idle_state_flags = of_get_property(power_mgt, "ibm,cpu-idle-state-flags", &len_flags); 173 /* Read values of any property to determine the num of idle states */
175 if (!idle_state_flags) { 174 dt_idle_states = of_property_count_u32_elems(power_mgt, "ibm,cpu-idle-state-flags");
176 pr_warn("DT-PowerMgmt: missing ibm,cpu-idle-state-flags\n"); 175 if (dt_idle_states < 0) {
177 return nr_idle_states; 176 pr_warn("cpuidle-powernv: no idle states found in the DT\n");
177 goto out;
178 } 178 }
179 179
180 idle_state_latency = of_get_property(power_mgt, 180 flags = kzalloc(sizeof(*flags) * dt_idle_states, GFP_KERNEL);
181 "ibm,cpu-idle-state-latencies-ns", NULL); 181 if (of_property_read_u32_array(power_mgt,
182 if (!idle_state_latency) { 182 "ibm,cpu-idle-state-flags", flags, dt_idle_states)) {
183 pr_warn("DT-PowerMgmt: missing ibm,cpu-idle-state-latencies-ns\n"); 183 pr_warn("cpuidle-powernv : missing ibm,cpu-idle-state-flags in DT\n");
184 return nr_idle_states; 184 goto out_free_flags;
185 } 185 }
186 186
187 dt_idle_states = len_flags / sizeof(u32); 187 latency_ns = kzalloc(sizeof(*latency_ns) * dt_idle_states, GFP_KERNEL);
188 rc = of_property_read_u32_array(power_mgt,
189 "ibm,cpu-idle-state-latencies-ns", latency_ns, dt_idle_states);
190 if (rc) {
191 pr_warn("cpuidle-powernv: missing ibm,cpu-idle-state-latencies-ns in DT\n");
192 goto out_free_latency;
193 }
188 194
189 for (i = 0; i < dt_idle_states; i++) { 195 residency_ns = kzalloc(sizeof(*residency_ns) * dt_idle_states, GFP_KERNEL);
196 rc = of_property_read_u32_array(power_mgt,
197 "ibm,cpu-idle-state-residency-ns", residency_ns, dt_idle_states);
190 198
191 flags = be32_to_cpu(idle_state_flags[i]); 199 for (i = 0; i < dt_idle_states; i++) {
192 200
193 /* Cpuidle accepts exit_latency in us and we estimate 201 /*
194 * target residency to be 10x exit_latency 202 * Cpuidle accepts exit_latency and target_residency in us.
203 * Use default target_residency values if f/w does not expose it.
195 */ 204 */
196 latency_ns = be32_to_cpu(idle_state_latency[i]); 205 if (flags[i] & OPAL_PM_NAP_ENABLED) {
197 if (flags & OPAL_PM_NAP_ENABLED) {
198 /* Add NAP state */ 206 /* Add NAP state */
199 strcpy(powernv_states[nr_idle_states].name, "Nap"); 207 strcpy(powernv_states[nr_idle_states].name, "Nap");
200 strcpy(powernv_states[nr_idle_states].desc, "Nap"); 208 strcpy(powernv_states[nr_idle_states].desc, "Nap");
201 powernv_states[nr_idle_states].flags = 0; 209 powernv_states[nr_idle_states].flags = 0;
202 powernv_states[nr_idle_states].exit_latency = 210 powernv_states[nr_idle_states].target_residency = 100;
203 ((unsigned int)latency_ns) / 1000;
204 powernv_states[nr_idle_states].target_residency =
205 ((unsigned int)latency_ns / 100);
206 powernv_states[nr_idle_states].enter = &nap_loop; 211 powernv_states[nr_idle_states].enter = &nap_loop;
207 nr_idle_states++; 212 } else if (flags[i] & OPAL_PM_SLEEP_ENABLED ||
208 } 213 flags[i] & OPAL_PM_SLEEP_ENABLED_ER1) {
209
210 if (flags & OPAL_PM_SLEEP_ENABLED ||
211 flags & OPAL_PM_SLEEP_ENABLED_ER1) {
212 /* Add FASTSLEEP state */ 214 /* Add FASTSLEEP state */
213 strcpy(powernv_states[nr_idle_states].name, "FastSleep"); 215 strcpy(powernv_states[nr_idle_states].name, "FastSleep");
214 strcpy(powernv_states[nr_idle_states].desc, "FastSleep"); 216 strcpy(powernv_states[nr_idle_states].desc, "FastSleep");
215 powernv_states[nr_idle_states].flags = CPUIDLE_FLAG_TIMER_STOP; 217 powernv_states[nr_idle_states].flags = CPUIDLE_FLAG_TIMER_STOP;
216 powernv_states[nr_idle_states].exit_latency = 218 powernv_states[nr_idle_states].target_residency = 300000;
217 ((unsigned int)latency_ns) / 1000;
218 powernv_states[nr_idle_states].target_residency =
219 ((unsigned int)latency_ns / 100);
220 powernv_states[nr_idle_states].enter = &fastsleep_loop; 219 powernv_states[nr_idle_states].enter = &fastsleep_loop;
221 nr_idle_states++;
222 } 220 }
221
222 powernv_states[nr_idle_states].exit_latency =
223 ((unsigned int)latency_ns[i]) / 1000;
224
225 if (!rc) {
226 powernv_states[nr_idle_states].target_residency =
227 ((unsigned int)residency_ns[i]) / 1000;
228 }
229
230 nr_idle_states++;
223 } 231 }
224 232
233 kfree(residency_ns);
234out_free_latency:
235 kfree(latency_ns);
236out_free_flags:
237 kfree(flags);
238out:
225 return nr_idle_states; 239 return nr_idle_states;
226} 240}
227 241
diff --git a/drivers/cpuidle/cpuidle.c b/drivers/cpuidle/cpuidle.c
index 4d534582514e..080bd2dbde4b 100644
--- a/drivers/cpuidle/cpuidle.c
+++ b/drivers/cpuidle/cpuidle.c
@@ -44,6 +44,12 @@ void disable_cpuidle(void)
44 off = 1; 44 off = 1;
45} 45}
46 46
47bool cpuidle_not_available(struct cpuidle_driver *drv,
48 struct cpuidle_device *dev)
49{
50 return off || !initialized || !drv || !dev || !dev->enabled;
51}
52
47/** 53/**
48 * cpuidle_play_dead - cpu off-lining 54 * cpuidle_play_dead - cpu off-lining
49 * 55 *
@@ -66,14 +72,8 @@ int cpuidle_play_dead(void)
66 return -ENODEV; 72 return -ENODEV;
67} 73}
68 74
69/** 75static int find_deepest_state(struct cpuidle_driver *drv,
70 * cpuidle_find_deepest_state - Find deepest state meeting specific conditions. 76 struct cpuidle_device *dev, bool freeze)
71 * @drv: cpuidle driver for the given CPU.
72 * @dev: cpuidle device for the given CPU.
73 * @freeze: Whether or not the state should be suitable for suspend-to-idle.
74 */
75static int cpuidle_find_deepest_state(struct cpuidle_driver *drv,
76 struct cpuidle_device *dev, bool freeze)
77{ 77{
78 unsigned int latency_req = 0; 78 unsigned int latency_req = 0;
79 int i, ret = freeze ? -1 : CPUIDLE_DRIVER_STATE_START - 1; 79 int i, ret = freeze ? -1 : CPUIDLE_DRIVER_STATE_START - 1;
@@ -92,6 +92,17 @@ static int cpuidle_find_deepest_state(struct cpuidle_driver *drv,
92 return ret; 92 return ret;
93} 93}
94 94
95/**
96 * cpuidle_find_deepest_state - Find the deepest available idle state.
97 * @drv: cpuidle driver for the given CPU.
98 * @dev: cpuidle device for the given CPU.
99 */
100int cpuidle_find_deepest_state(struct cpuidle_driver *drv,
101 struct cpuidle_device *dev)
102{
103 return find_deepest_state(drv, dev, false);
104}
105
95static void enter_freeze_proper(struct cpuidle_driver *drv, 106static void enter_freeze_proper(struct cpuidle_driver *drv,
96 struct cpuidle_device *dev, int index) 107 struct cpuidle_device *dev, int index)
97{ 108{
@@ -113,15 +124,14 @@ static void enter_freeze_proper(struct cpuidle_driver *drv,
113 124
114/** 125/**
115 * cpuidle_enter_freeze - Enter an idle state suitable for suspend-to-idle. 126 * cpuidle_enter_freeze - Enter an idle state suitable for suspend-to-idle.
127 * @drv: cpuidle driver for the given CPU.
128 * @dev: cpuidle device for the given CPU.
116 * 129 *
117 * If there are states with the ->enter_freeze callback, find the deepest of 130 * If there are states with the ->enter_freeze callback, find the deepest of
118 * them and enter it with frozen tick. Otherwise, find the deepest state 131 * them and enter it with frozen tick.
119 * available and enter it normally.
120 */ 132 */
121void cpuidle_enter_freeze(void) 133int cpuidle_enter_freeze(struct cpuidle_driver *drv, struct cpuidle_device *dev)
122{ 134{
123 struct cpuidle_device *dev = __this_cpu_read(cpuidle_devices);
124 struct cpuidle_driver *drv = cpuidle_get_cpu_driver(dev);
125 int index; 135 int index;
126 136
127 /* 137 /*
@@ -129,24 +139,11 @@ void cpuidle_enter_freeze(void)
129 * that interrupts won't be enabled when it exits and allows the tick to 139 * that interrupts won't be enabled when it exits and allows the tick to
130 * be frozen safely. 140 * be frozen safely.
131 */ 141 */
132 index = cpuidle_find_deepest_state(drv, dev, true); 142 index = find_deepest_state(drv, dev, true);
133 if (index >= 0) {
134 enter_freeze_proper(drv, dev, index);
135 return;
136 }
137
138 /*
139 * It is not safe to freeze the tick, find the deepest state available
140 * at all and try to enter it normally.
141 */
142 index = cpuidle_find_deepest_state(drv, dev, false);
143 if (index >= 0) 143 if (index >= 0)
144 cpuidle_enter(drv, dev, index); 144 enter_freeze_proper(drv, dev, index);
145 else
146 arch_cpu_idle();
147 145
148 /* Interrupts are enabled again here. */ 146 return index;
149 local_irq_disable();
150} 147}
151 148
152/** 149/**
@@ -205,12 +202,6 @@ int cpuidle_enter_state(struct cpuidle_device *dev, struct cpuidle_driver *drv,
205 */ 202 */
206int cpuidle_select(struct cpuidle_driver *drv, struct cpuidle_device *dev) 203int cpuidle_select(struct cpuidle_driver *drv, struct cpuidle_device *dev)
207{ 204{
208 if (off || !initialized)
209 return -ENODEV;
210
211 if (!drv || !dev || !dev->enabled)
212 return -EBUSY;
213
214 return cpuidle_curr_governor->select(drv, dev); 205 return cpuidle_curr_governor->select(drv, dev);
215} 206}
216 207
diff --git a/drivers/dma-buf/fence.c b/drivers/dma-buf/fence.c
index e5541117b3e9..50ef8bd8708b 100644
--- a/drivers/dma-buf/fence.c
+++ b/drivers/dma-buf/fence.c
@@ -159,6 +159,9 @@ fence_wait_timeout(struct fence *fence, bool intr, signed long timeout)
159 if (WARN_ON(timeout < 0)) 159 if (WARN_ON(timeout < 0))
160 return -EINVAL; 160 return -EINVAL;
161 161
162 if (timeout == 0)
163 return fence_is_signaled(fence);
164
162 trace_fence_wait_start(fence); 165 trace_fence_wait_start(fence);
163 ret = fence->ops->wait(fence, intr, timeout); 166 ret = fence->ops->wait(fence, intr, timeout);
164 trace_fence_wait_end(fence); 167 trace_fence_wait_end(fence);
diff --git a/drivers/dma-buf/reservation.c b/drivers/dma-buf/reservation.c
index 3c97c8fa8d02..39920d77f288 100644
--- a/drivers/dma-buf/reservation.c
+++ b/drivers/dma-buf/reservation.c
@@ -327,6 +327,9 @@ long reservation_object_wait_timeout_rcu(struct reservation_object *obj,
327 unsigned seq, shared_count, i = 0; 327 unsigned seq, shared_count, i = 0;
328 long ret = timeout; 328 long ret = timeout;
329 329
330 if (!timeout)
331 return reservation_object_test_signaled_rcu(obj, wait_all);
332
330retry: 333retry:
331 fence = NULL; 334 fence = NULL;
332 shared_count = 0; 335 shared_count = 0;
@@ -402,8 +405,6 @@ reservation_object_test_signaled_single(struct fence *passed_fence)
402 int ret = 1; 405 int ret = 1;
403 406
404 if (!test_bit(FENCE_FLAG_SIGNALED_BIT, &lfence->flags)) { 407 if (!test_bit(FENCE_FLAG_SIGNALED_BIT, &lfence->flags)) {
405 int ret;
406
407 fence = fence_get_rcu(lfence); 408 fence = fence_get_rcu(lfence);
408 if (!fence) 409 if (!fence)
409 return -1; 410 return -1;
diff --git a/drivers/dma/amba-pl08x.c b/drivers/dma/amba-pl08x.c
index 4a5fd245014e..83aa55d6fa5d 100644
--- a/drivers/dma/amba-pl08x.c
+++ b/drivers/dma/amba-pl08x.c
@@ -97,6 +97,12 @@
97 97
98#define DRIVER_NAME "pl08xdmac" 98#define DRIVER_NAME "pl08xdmac"
99 99
100#define PL80X_DMA_BUSWIDTHS \
101 BIT(DMA_SLAVE_BUSWIDTH_UNDEFINED) | \
102 BIT(DMA_SLAVE_BUSWIDTH_1_BYTE) | \
103 BIT(DMA_SLAVE_BUSWIDTH_2_BYTES) | \
104 BIT(DMA_SLAVE_BUSWIDTH_4_BYTES)
105
100static struct amba_driver pl08x_amba_driver; 106static struct amba_driver pl08x_amba_driver;
101struct pl08x_driver_data; 107struct pl08x_driver_data;
102 108
@@ -2070,6 +2076,10 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id)
2070 pl08x->memcpy.device_pause = pl08x_pause; 2076 pl08x->memcpy.device_pause = pl08x_pause;
2071 pl08x->memcpy.device_resume = pl08x_resume; 2077 pl08x->memcpy.device_resume = pl08x_resume;
2072 pl08x->memcpy.device_terminate_all = pl08x_terminate_all; 2078 pl08x->memcpy.device_terminate_all = pl08x_terminate_all;
2079 pl08x->memcpy.src_addr_widths = PL80X_DMA_BUSWIDTHS;
2080 pl08x->memcpy.dst_addr_widths = PL80X_DMA_BUSWIDTHS;
2081 pl08x->memcpy.directions = BIT(DMA_MEM_TO_MEM);
2082 pl08x->memcpy.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
2073 2083
2074 /* Initialize slave engine */ 2084 /* Initialize slave engine */
2075 dma_cap_set(DMA_SLAVE, pl08x->slave.cap_mask); 2085 dma_cap_set(DMA_SLAVE, pl08x->slave.cap_mask);
@@ -2086,6 +2096,10 @@ static int pl08x_probe(struct amba_device *adev, const struct amba_id *id)
2086 pl08x->slave.device_pause = pl08x_pause; 2096 pl08x->slave.device_pause = pl08x_pause;
2087 pl08x->slave.device_resume = pl08x_resume; 2097 pl08x->slave.device_resume = pl08x_resume;
2088 pl08x->slave.device_terminate_all = pl08x_terminate_all; 2098 pl08x->slave.device_terminate_all = pl08x_terminate_all;
2099 pl08x->slave.src_addr_widths = PL80X_DMA_BUSWIDTHS;
2100 pl08x->slave.dst_addr_widths = PL80X_DMA_BUSWIDTHS;
2101 pl08x->slave.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
2102 pl08x->slave.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
2089 2103
2090 /* Get the platform data */ 2104 /* Get the platform data */
2091 pl08x->pd = dev_get_platdata(&adev->dev); 2105 pl08x->pd = dev_get_platdata(&adev->dev);
diff --git a/drivers/dma/at_hdmac.c b/drivers/dma/at_hdmac.c
index 1e1a4c567542..0b4fc6fb48ce 100644
--- a/drivers/dma/at_hdmac.c
+++ b/drivers/dma/at_hdmac.c
@@ -238,93 +238,126 @@ static void atc_dostart(struct at_dma_chan *atchan, struct at_desc *first)
238} 238}
239 239
240/* 240/*
241 * atc_get_current_descriptors - 241 * atc_get_desc_by_cookie - get the descriptor of a cookie
242 * locate the descriptor which equal to physical address in DSCR 242 * @atchan: the DMA channel
243 * @atchan: the channel we want to start 243 * @cookie: the cookie to get the descriptor for
244 * @dscr_addr: physical descriptor address in DSCR
245 */ 244 */
246static struct at_desc *atc_get_current_descriptors(struct at_dma_chan *atchan, 245static struct at_desc *atc_get_desc_by_cookie(struct at_dma_chan *atchan,
247 u32 dscr_addr) 246 dma_cookie_t cookie)
248{ 247{
249 struct at_desc *desc, *_desc, *child, *desc_cur = NULL; 248 struct at_desc *desc, *_desc;
250 249
251 list_for_each_entry_safe(desc, _desc, &atchan->active_list, desc_node) { 250 list_for_each_entry_safe(desc, _desc, &atchan->queue, desc_node) {
252 if (desc->lli.dscr == dscr_addr) { 251 if (desc->txd.cookie == cookie)
253 desc_cur = desc; 252 return desc;
254 break; 253 }
255 }
256 254
257 list_for_each_entry(child, &desc->tx_list, desc_node) { 255 list_for_each_entry_safe(desc, _desc, &atchan->active_list, desc_node) {
258 if (child->lli.dscr == dscr_addr) { 256 if (desc->txd.cookie == cookie)
259 desc_cur = child; 257 return desc;
260 break;
261 }
262 }
263 } 258 }
264 259
265 return desc_cur; 260 return NULL;
266} 261}
267 262
268/* 263/**
269 * atc_get_bytes_left - 264 * atc_calc_bytes_left - calculates the number of bytes left according to the
270 * Get the number of bytes residue in dma buffer, 265 * value read from CTRLA.
271 * @chan: the channel we want to start 266 *
267 * @current_len: the number of bytes left before reading CTRLA
268 * @ctrla: the value of CTRLA
269 * @desc: the descriptor containing the transfer width
270 */
271static inline int atc_calc_bytes_left(int current_len, u32 ctrla,
272 struct at_desc *desc)
273{
274 return current_len - ((ctrla & ATC_BTSIZE_MAX) << desc->tx_width);
275}
276
277/**
278 * atc_calc_bytes_left_from_reg - calculates the number of bytes left according
279 * to the current value of CTRLA.
280 *
281 * @current_len: the number of bytes left before reading CTRLA
282 * @atchan: the channel to read CTRLA for
283 * @desc: the descriptor containing the transfer width
284 */
285static inline int atc_calc_bytes_left_from_reg(int current_len,
286 struct at_dma_chan *atchan, struct at_desc *desc)
287{
288 u32 ctrla = channel_readl(atchan, CTRLA);
289
290 return atc_calc_bytes_left(current_len, ctrla, desc);
291}
292
293/**
294 * atc_get_bytes_left - get the number of bytes residue for a cookie
295 * @chan: DMA channel
296 * @cookie: transaction identifier to check status of
272 */ 297 */
273static int atc_get_bytes_left(struct dma_chan *chan) 298static int atc_get_bytes_left(struct dma_chan *chan, dma_cookie_t cookie)
274{ 299{
275 struct at_dma_chan *atchan = to_at_dma_chan(chan); 300 struct at_dma_chan *atchan = to_at_dma_chan(chan);
276 struct at_dma *atdma = to_at_dma(chan->device);
277 int chan_id = atchan->chan_common.chan_id;
278 struct at_desc *desc_first = atc_first_active(atchan); 301 struct at_desc *desc_first = atc_first_active(atchan);
279 struct at_desc *desc_cur; 302 struct at_desc *desc;
280 int ret = 0, count = 0; 303 int ret;
304 u32 ctrla, dscr;
281 305
282 /* 306 /*
283 * Initialize necessary values in the first time. 307 * If the cookie doesn't match to the currently running transfer then
284 * remain_desc record remain desc length. 308 * we can return the total length of the associated DMA transfer,
309 * because it is still queued.
285 */ 310 */
286 if (atchan->remain_desc == 0) 311 desc = atc_get_desc_by_cookie(atchan, cookie);
287 /* First descriptor embedds the transaction length */ 312 if (desc == NULL)
288 atchan->remain_desc = desc_first->len; 313 return -EINVAL;
314 else if (desc != desc_first)
315 return desc->total_len;
289 316
290 /* 317 /* cookie matches to the currently running transfer */
291 * This happens when current descriptor transfer complete. 318 ret = desc_first->total_len;
292 * The residual buffer size should reduce current descriptor length.
293 */
294 if (unlikely(test_bit(ATC_IS_BTC, &atchan->status))) {
295 clear_bit(ATC_IS_BTC, &atchan->status);
296 desc_cur = atc_get_current_descriptors(atchan,
297 channel_readl(atchan, DSCR));
298 if (!desc_cur) {
299 ret = -EINVAL;
300 goto out;
301 }
302 319
303 count = (desc_cur->lli.ctrla & ATC_BTSIZE_MAX) 320 if (desc_first->lli.dscr) {
304 << desc_first->tx_width; 321 /* hardware linked list transfer */
305 if (atchan->remain_desc < count) { 322
306 ret = -EINVAL; 323 /*
307 goto out; 324 * Calculate the residue by removing the length of the child
325 * descriptors already transferred from the total length.
326 * To get the current child descriptor we can use the value of
327 * the channel's DSCR register and compare it against the value
328 * of the hardware linked list structure of each child
329 * descriptor.
330 */
331
332 ctrla = channel_readl(atchan, CTRLA);
333 rmb(); /* ensure CTRLA is read before DSCR */
334 dscr = channel_readl(atchan, DSCR);
335
336 /* for the first descriptor we can be more accurate */
337 if (desc_first->lli.dscr == dscr)
338 return atc_calc_bytes_left(ret, ctrla, desc_first);
339
340 ret -= desc_first->len;
341 list_for_each_entry(desc, &desc_first->tx_list, desc_node) {
342 if (desc->lli.dscr == dscr)
343 break;
344
345 ret -= desc->len;
308 } 346 }
309 347
310 atchan->remain_desc -= count;
311 ret = atchan->remain_desc;
312 } else {
313 /* 348 /*
314 * Get residual bytes when current 349 * For the last descriptor in the chain we can calculate
315 * descriptor transfer in progress. 350 * the remaining bytes using the channel's register.
351 * Note that the transfer width of the first and last
352 * descriptor may differ.
316 */ 353 */
317 count = (channel_readl(atchan, CTRLA) & ATC_BTSIZE_MAX) 354 if (!desc->lli.dscr)
318 << (desc_first->tx_width); 355 ret = atc_calc_bytes_left_from_reg(ret, atchan, desc);
319 ret = atchan->remain_desc - count; 356 } else {
357 /* single transfer */
358 ret = atc_calc_bytes_left_from_reg(ret, atchan, desc_first);
320 } 359 }
321 /*
322 * Check fifo empty.
323 */
324 if (!(dma_readl(atdma, CHSR) & AT_DMA_EMPT(chan_id)))
325 atc_issue_pending(chan);
326 360
327out:
328 return ret; 361 return ret;
329} 362}
330 363
@@ -539,8 +572,6 @@ static irqreturn_t at_dma_interrupt(int irq, void *dev_id)
539 /* Give information to tasklet */ 572 /* Give information to tasklet */
540 set_bit(ATC_IS_ERROR, &atchan->status); 573 set_bit(ATC_IS_ERROR, &atchan->status);
541 } 574 }
542 if (pending & AT_DMA_BTC(i))
543 set_bit(ATC_IS_BTC, &atchan->status);
544 tasklet_schedule(&atchan->tasklet); 575 tasklet_schedule(&atchan->tasklet);
545 ret = IRQ_HANDLED; 576 ret = IRQ_HANDLED;
546 } 577 }
@@ -653,14 +684,18 @@ atc_prep_dma_memcpy(struct dma_chan *chan, dma_addr_t dest, dma_addr_t src,
653 desc->lli.ctrlb = ctrlb; 684 desc->lli.ctrlb = ctrlb;
654 685
655 desc->txd.cookie = 0; 686 desc->txd.cookie = 0;
687 desc->len = xfer_count << src_width;
656 688
657 atc_desc_chain(&first, &prev, desc); 689 atc_desc_chain(&first, &prev, desc);
658 } 690 }
659 691
660 /* First descriptor of the chain embedds additional information */ 692 /* First descriptor of the chain embedds additional information */
661 first->txd.cookie = -EBUSY; 693 first->txd.cookie = -EBUSY;
662 first->len = len; 694 first->total_len = len;
695
696 /* set transfer width for the calculation of the residue */
663 first->tx_width = src_width; 697 first->tx_width = src_width;
698 prev->tx_width = src_width;
664 699
665 /* set end-of-link to the last link descriptor of list*/ 700 /* set end-of-link to the last link descriptor of list*/
666 set_desc_eol(desc); 701 set_desc_eol(desc);
@@ -752,6 +787,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
752 | ATC_SRC_WIDTH(mem_width) 787 | ATC_SRC_WIDTH(mem_width)
753 | len >> mem_width; 788 | len >> mem_width;
754 desc->lli.ctrlb = ctrlb; 789 desc->lli.ctrlb = ctrlb;
790 desc->len = len;
755 791
756 atc_desc_chain(&first, &prev, desc); 792 atc_desc_chain(&first, &prev, desc);
757 total_len += len; 793 total_len += len;
@@ -792,6 +828,7 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
792 | ATC_DST_WIDTH(mem_width) 828 | ATC_DST_WIDTH(mem_width)
793 | len >> reg_width; 829 | len >> reg_width;
794 desc->lli.ctrlb = ctrlb; 830 desc->lli.ctrlb = ctrlb;
831 desc->len = len;
795 832
796 atc_desc_chain(&first, &prev, desc); 833 atc_desc_chain(&first, &prev, desc);
797 total_len += len; 834 total_len += len;
@@ -806,8 +843,11 @@ atc_prep_slave_sg(struct dma_chan *chan, struct scatterlist *sgl,
806 843
807 /* First descriptor of the chain embedds additional information */ 844 /* First descriptor of the chain embedds additional information */
808 first->txd.cookie = -EBUSY; 845 first->txd.cookie = -EBUSY;
809 first->len = total_len; 846 first->total_len = total_len;
847
848 /* set transfer width for the calculation of the residue */
810 first->tx_width = reg_width; 849 first->tx_width = reg_width;
850 prev->tx_width = reg_width;
811 851
812 /* first link descriptor of list is responsible of flags */ 852 /* first link descriptor of list is responsible of flags */
813 first->txd.flags = flags; /* client is in control of this ack */ 853 first->txd.flags = flags; /* client is in control of this ack */
@@ -872,6 +912,7 @@ atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc,
872 | ATC_FC_MEM2PER 912 | ATC_FC_MEM2PER
873 | ATC_SIF(atchan->mem_if) 913 | ATC_SIF(atchan->mem_if)
874 | ATC_DIF(atchan->per_if); 914 | ATC_DIF(atchan->per_if);
915 desc->len = period_len;
875 break; 916 break;
876 917
877 case DMA_DEV_TO_MEM: 918 case DMA_DEV_TO_MEM:
@@ -883,6 +924,7 @@ atc_dma_cyclic_fill_desc(struct dma_chan *chan, struct at_desc *desc,
883 | ATC_FC_PER2MEM 924 | ATC_FC_PER2MEM
884 | ATC_SIF(atchan->per_if) 925 | ATC_SIF(atchan->per_if)
885 | ATC_DIF(atchan->mem_if); 926 | ATC_DIF(atchan->mem_if);
927 desc->len = period_len;
886 break; 928 break;
887 929
888 default: 930 default:
@@ -964,7 +1006,7 @@ atc_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr, size_t buf_len,
964 1006
965 /* First descriptor of the chain embedds additional information */ 1007 /* First descriptor of the chain embedds additional information */
966 first->txd.cookie = -EBUSY; 1008 first->txd.cookie = -EBUSY;
967 first->len = buf_len; 1009 first->total_len = buf_len;
968 first->tx_width = reg_width; 1010 first->tx_width = reg_width;
969 1011
970 return &first->txd; 1012 return &first->txd;
@@ -1118,7 +1160,7 @@ atc_tx_status(struct dma_chan *chan,
1118 spin_lock_irqsave(&atchan->lock, flags); 1160 spin_lock_irqsave(&atchan->lock, flags);
1119 1161
1120 /* Get number of bytes left in the active transactions */ 1162 /* Get number of bytes left in the active transactions */
1121 bytes = atc_get_bytes_left(chan); 1163 bytes = atc_get_bytes_left(chan, cookie);
1122 1164
1123 spin_unlock_irqrestore(&atchan->lock, flags); 1165 spin_unlock_irqrestore(&atchan->lock, flags);
1124 1166
@@ -1214,7 +1256,6 @@ static int atc_alloc_chan_resources(struct dma_chan *chan)
1214 1256
1215 spin_lock_irqsave(&atchan->lock, flags); 1257 spin_lock_irqsave(&atchan->lock, flags);
1216 atchan->descs_allocated = i; 1258 atchan->descs_allocated = i;
1217 atchan->remain_desc = 0;
1218 list_splice(&tmp_list, &atchan->free_list); 1259 list_splice(&tmp_list, &atchan->free_list);
1219 dma_cookie_init(chan); 1260 dma_cookie_init(chan);
1220 spin_unlock_irqrestore(&atchan->lock, flags); 1261 spin_unlock_irqrestore(&atchan->lock, flags);
@@ -1257,7 +1298,6 @@ static void atc_free_chan_resources(struct dma_chan *chan)
1257 list_splice_init(&atchan->free_list, &list); 1298 list_splice_init(&atchan->free_list, &list);
1258 atchan->descs_allocated = 0; 1299 atchan->descs_allocated = 0;
1259 atchan->status = 0; 1300 atchan->status = 0;
1260 atchan->remain_desc = 0;
1261 1301
1262 dev_vdbg(chan2dev(chan), "free_chan_resources: done\n"); 1302 dev_vdbg(chan2dev(chan), "free_chan_resources: done\n");
1263} 1303}
diff --git a/drivers/dma/at_hdmac_regs.h b/drivers/dma/at_hdmac_regs.h
index d6bba6c636c2..2727ca560572 100644
--- a/drivers/dma/at_hdmac_regs.h
+++ b/drivers/dma/at_hdmac_regs.h
@@ -181,8 +181,9 @@ struct at_lli {
181 * @at_lli: hardware lli structure 181 * @at_lli: hardware lli structure
182 * @txd: support for the async_tx api 182 * @txd: support for the async_tx api
183 * @desc_node: node on the channed descriptors list 183 * @desc_node: node on the channed descriptors list
184 * @len: total transaction bytecount 184 * @len: descriptor byte count
185 * @tx_width: transfer width 185 * @tx_width: transfer width
186 * @total_len: total transaction byte count
186 */ 187 */
187struct at_desc { 188struct at_desc {
188 /* FIRST values the hardware uses */ 189 /* FIRST values the hardware uses */
@@ -194,6 +195,7 @@ struct at_desc {
194 struct list_head desc_node; 195 struct list_head desc_node;
195 size_t len; 196 size_t len;
196 u32 tx_width; 197 u32 tx_width;
198 size_t total_len;
197}; 199};
198 200
199static inline struct at_desc * 201static inline struct at_desc *
@@ -213,7 +215,6 @@ txd_to_at_desc(struct dma_async_tx_descriptor *txd)
213enum atc_status { 215enum atc_status {
214 ATC_IS_ERROR = 0, 216 ATC_IS_ERROR = 0,
215 ATC_IS_PAUSED = 1, 217 ATC_IS_PAUSED = 1,
216 ATC_IS_BTC = 2,
217 ATC_IS_CYCLIC = 24, 218 ATC_IS_CYCLIC = 24,
218}; 219};
219 220
@@ -231,7 +232,6 @@ enum atc_status {
231 * @save_cfg: configuration register that is saved on suspend/resume cycle 232 * @save_cfg: configuration register that is saved on suspend/resume cycle
232 * @save_dscr: for cyclic operations, preserve next descriptor address in 233 * @save_dscr: for cyclic operations, preserve next descriptor address in
233 * the cyclic list on suspend/resume cycle 234 * the cyclic list on suspend/resume cycle
234 * @remain_desc: to save remain desc length
235 * @dma_sconfig: configuration for slave transfers, passed via 235 * @dma_sconfig: configuration for slave transfers, passed via
236 * .device_config 236 * .device_config
237 * @lock: serializes enqueue/dequeue operations to descriptors lists 237 * @lock: serializes enqueue/dequeue operations to descriptors lists
@@ -251,7 +251,6 @@ struct at_dma_chan {
251 struct tasklet_struct tasklet; 251 struct tasklet_struct tasklet;
252 u32 save_cfg; 252 u32 save_cfg;
253 u32 save_dscr; 253 u32 save_dscr;
254 u32 remain_desc;
255 struct dma_slave_config dma_sconfig; 254 struct dma_slave_config dma_sconfig;
256 255
257 spinlock_t lock; 256 spinlock_t lock;
diff --git a/drivers/dma/at_xdmac.c b/drivers/dma/at_xdmac.c
index 09e2825a547a..d9891d3461f6 100644
--- a/drivers/dma/at_xdmac.c
+++ b/drivers/dma/at_xdmac.c
@@ -664,7 +664,6 @@ at_xdmac_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr,
664 struct at_xdmac_desc *first = NULL, *prev = NULL; 664 struct at_xdmac_desc *first = NULL, *prev = NULL;
665 unsigned int periods = buf_len / period_len; 665 unsigned int periods = buf_len / period_len;
666 int i; 666 int i;
667 u32 cfg;
668 667
669 dev_dbg(chan2dev(chan), "%s: buf_addr=%pad, buf_len=%zd, period_len=%zd, dir=%s, flags=0x%lx\n", 668 dev_dbg(chan2dev(chan), "%s: buf_addr=%pad, buf_len=%zd, period_len=%zd, dir=%s, flags=0x%lx\n",
670 __func__, &buf_addr, buf_len, period_len, 669 __func__, &buf_addr, buf_len, period_len,
@@ -700,17 +699,17 @@ at_xdmac_prep_dma_cyclic(struct dma_chan *chan, dma_addr_t buf_addr,
700 if (direction == DMA_DEV_TO_MEM) { 699 if (direction == DMA_DEV_TO_MEM) {
701 desc->lld.mbr_sa = atchan->per_src_addr; 700 desc->lld.mbr_sa = atchan->per_src_addr;
702 desc->lld.mbr_da = buf_addr + i * period_len; 701 desc->lld.mbr_da = buf_addr + i * period_len;
703 cfg = atchan->cfg[AT_XDMAC_DEV_TO_MEM_CFG]; 702 desc->lld.mbr_cfg = atchan->cfg[AT_XDMAC_DEV_TO_MEM_CFG];
704 } else { 703 } else {
705 desc->lld.mbr_sa = buf_addr + i * period_len; 704 desc->lld.mbr_sa = buf_addr + i * period_len;
706 desc->lld.mbr_da = atchan->per_dst_addr; 705 desc->lld.mbr_da = atchan->per_dst_addr;
707 cfg = atchan->cfg[AT_XDMAC_MEM_TO_DEV_CFG]; 706 desc->lld.mbr_cfg = atchan->cfg[AT_XDMAC_MEM_TO_DEV_CFG];
708 } 707 }
709 desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV1 708 desc->lld.mbr_ubc = AT_XDMAC_MBR_UBC_NDV1
710 | AT_XDMAC_MBR_UBC_NDEN 709 | AT_XDMAC_MBR_UBC_NDEN
711 | AT_XDMAC_MBR_UBC_NSEN 710 | AT_XDMAC_MBR_UBC_NSEN
712 | AT_XDMAC_MBR_UBC_NDE 711 | AT_XDMAC_MBR_UBC_NDE
713 | period_len >> at_xdmac_get_dwidth(cfg); 712 | period_len >> at_xdmac_get_dwidth(desc->lld.mbr_cfg);
714 713
715 dev_dbg(chan2dev(chan), 714 dev_dbg(chan2dev(chan),
716 "%s: lld: mbr_sa=%pad, mbr_da=%pad, mbr_ubc=0x%08x\n", 715 "%s: lld: mbr_sa=%pad, mbr_da=%pad, mbr_ubc=0x%08x\n",
diff --git a/drivers/dma/dw/core.c b/drivers/dma/dw/core.c
index 455b7a4f1e87..a8ad05291b27 100644
--- a/drivers/dma/dw/core.c
+++ b/drivers/dma/dw/core.c
@@ -626,7 +626,7 @@ static irqreturn_t dw_dma_interrupt(int irq, void *dev_id)
626 dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__, status); 626 dev_vdbg(dw->dma.dev, "%s: status=0x%x\n", __func__, status);
627 627
628 /* Check if we have any interrupt from the DMAC */ 628 /* Check if we have any interrupt from the DMAC */
629 if (!status) 629 if (!status || !dw->in_use)
630 return IRQ_NONE; 630 return IRQ_NONE;
631 631
632 /* 632 /*
diff --git a/drivers/dma/dw/platform.c b/drivers/dma/dw/platform.c
index 6565a361e7e5..b2c3ae071429 100644
--- a/drivers/dma/dw/platform.c
+++ b/drivers/dma/dw/platform.c
@@ -26,6 +26,8 @@
26 26
27#include "internal.h" 27#include "internal.h"
28 28
29#define DRV_NAME "dw_dmac"
30
29static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec, 31static struct dma_chan *dw_dma_of_xlate(struct of_phandle_args *dma_spec,
30 struct of_dma *ofdma) 32 struct of_dma *ofdma)
31{ 33{
@@ -284,7 +286,7 @@ static struct platform_driver dw_driver = {
284 .remove = dw_remove, 286 .remove = dw_remove,
285 .shutdown = dw_shutdown, 287 .shutdown = dw_shutdown,
286 .driver = { 288 .driver = {
287 .name = "dw_dmac", 289 .name = DRV_NAME,
288 .pm = &dw_dev_pm_ops, 290 .pm = &dw_dev_pm_ops,
289 .of_match_table = of_match_ptr(dw_dma_of_id_table), 291 .of_match_table = of_match_ptr(dw_dma_of_id_table),
290 .acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table), 292 .acpi_match_table = ACPI_PTR(dw_dma_acpi_id_table),
@@ -305,3 +307,4 @@ module_exit(dw_exit);
305 307
306MODULE_LICENSE("GPL v2"); 308MODULE_LICENSE("GPL v2");
307MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver"); 309MODULE_DESCRIPTION("Synopsys DesignWare DMA Controller platform driver");
310MODULE_ALIAS("platform:" DRV_NAME);
diff --git a/drivers/dma/imx-sdma.c b/drivers/dma/imx-sdma.c
index 18c0a131e4e4..66a0efb9651d 100644
--- a/drivers/dma/imx-sdma.c
+++ b/drivers/dma/imx-sdma.c
@@ -531,6 +531,10 @@ static int sdma_run_channel0(struct sdma_engine *sdma)
531 dev_err(sdma->dev, "Timeout waiting for CH0 ready\n"); 531 dev_err(sdma->dev, "Timeout waiting for CH0 ready\n");
532 } 532 }
533 533
534 /* Set bits of CONFIG register with dynamic context switching */
535 if (readl(sdma->regs + SDMA_H_CONFIG) == 0)
536 writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
537
534 return ret ? 0 : -ETIMEDOUT; 538 return ret ? 0 : -ETIMEDOUT;
535} 539}
536 540
@@ -1394,9 +1398,6 @@ static int sdma_init(struct sdma_engine *sdma)
1394 1398
1395 writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR); 1399 writel_relaxed(ccb_phys, sdma->regs + SDMA_H_C0PTR);
1396 1400
1397 /* Set bits of CONFIG register with given context switching mode */
1398 writel_relaxed(SDMA_H_CONFIG_CSM, sdma->regs + SDMA_H_CONFIG);
1399
1400 /* Initializes channel's priorities */ 1401 /* Initializes channel's priorities */
1401 sdma_set_channel_priority(&sdma->channel[0], 7); 1402 sdma_set_channel_priority(&sdma->channel[0], 7);
1402 1403
diff --git a/drivers/dma/ioat/dma_v3.c b/drivers/dma/ioat/dma_v3.c
index 77a6dcf25b98..194ec20c9408 100644
--- a/drivers/dma/ioat/dma_v3.c
+++ b/drivers/dma/ioat/dma_v3.c
@@ -230,6 +230,10 @@ static bool is_bwd_noraid(struct pci_dev *pdev)
230 switch (pdev->device) { 230 switch (pdev->device) {
231 case PCI_DEVICE_ID_INTEL_IOAT_BWD2: 231 case PCI_DEVICE_ID_INTEL_IOAT_BWD2:
232 case PCI_DEVICE_ID_INTEL_IOAT_BWD3: 232 case PCI_DEVICE_ID_INTEL_IOAT_BWD3:
233 case PCI_DEVICE_ID_INTEL_IOAT_BDXDE0:
234 case PCI_DEVICE_ID_INTEL_IOAT_BDXDE1:
235 case PCI_DEVICE_ID_INTEL_IOAT_BDXDE2:
236 case PCI_DEVICE_ID_INTEL_IOAT_BDXDE3:
233 return true; 237 return true;
234 default: 238 default:
235 return false; 239 return false;
diff --git a/drivers/dma/mmp_pdma.c b/drivers/dma/mmp_pdma.c
index 8926f271904e..eb410044e1af 100644
--- a/drivers/dma/mmp_pdma.c
+++ b/drivers/dma/mmp_pdma.c
@@ -219,6 +219,9 @@ static irqreturn_t mmp_pdma_int_handler(int irq, void *dev_id)
219 219
220 while (dint) { 220 while (dint) {
221 i = __ffs(dint); 221 i = __ffs(dint);
222 /* only handle interrupts belonging to pdma driver*/
223 if (i >= pdev->dma_channels)
224 break;
222 dint &= (dint - 1); 225 dint &= (dint - 1);
223 phy = &pdev->phy[i]; 226 phy = &pdev->phy[i];
224 ret = mmp_pdma_chan_handler(irq, phy); 227 ret = mmp_pdma_chan_handler(irq, phy);
@@ -999,6 +1002,9 @@ static int mmp_pdma_probe(struct platform_device *op)
999 struct resource *iores; 1002 struct resource *iores;
1000 int i, ret, irq = 0; 1003 int i, ret, irq = 0;
1001 int dma_channels = 0, irq_num = 0; 1004 int dma_channels = 0, irq_num = 0;
1005 const enum dma_slave_buswidth widths =
1006 DMA_SLAVE_BUSWIDTH_1_BYTE | DMA_SLAVE_BUSWIDTH_2_BYTES |
1007 DMA_SLAVE_BUSWIDTH_4_BYTES;
1002 1008
1003 pdev = devm_kzalloc(&op->dev, sizeof(*pdev), GFP_KERNEL); 1009 pdev = devm_kzalloc(&op->dev, sizeof(*pdev), GFP_KERNEL);
1004 if (!pdev) 1010 if (!pdev)
@@ -1066,6 +1072,10 @@ static int mmp_pdma_probe(struct platform_device *op)
1066 pdev->device.device_config = mmp_pdma_config; 1072 pdev->device.device_config = mmp_pdma_config;
1067 pdev->device.device_terminate_all = mmp_pdma_terminate_all; 1073 pdev->device.device_terminate_all = mmp_pdma_terminate_all;
1068 pdev->device.copy_align = PDMA_ALIGNMENT; 1074 pdev->device.copy_align = PDMA_ALIGNMENT;
1075 pdev->device.src_addr_widths = widths;
1076 pdev->device.dst_addr_widths = widths;
1077 pdev->device.directions = BIT(DMA_MEM_TO_DEV) | BIT(DMA_DEV_TO_MEM);
1078 pdev->device.residue_granularity = DMA_RESIDUE_GRANULARITY_DESCRIPTOR;
1069 1079
1070 if (pdev->dev->coherent_dma_mask) 1080 if (pdev->dev->coherent_dma_mask)
1071 dma_set_mask(pdev->dev, pdev->dev->coherent_dma_mask); 1081 dma_set_mask(pdev->dev, pdev->dev->coherent_dma_mask);
diff --git a/drivers/dma/mmp_tdma.c b/drivers/dma/mmp_tdma.c
index 70c2fa9963cd..b6f4e1fc9c78 100644
--- a/drivers/dma/mmp_tdma.c
+++ b/drivers/dma/mmp_tdma.c
@@ -110,7 +110,7 @@ struct mmp_tdma_chan {
110 struct tasklet_struct tasklet; 110 struct tasklet_struct tasklet;
111 111
112 struct mmp_tdma_desc *desc_arr; 112 struct mmp_tdma_desc *desc_arr;
113 phys_addr_t desc_arr_phys; 113 dma_addr_t desc_arr_phys;
114 int desc_num; 114 int desc_num;
115 enum dma_transfer_direction dir; 115 enum dma_transfer_direction dir;
116 dma_addr_t dev_addr; 116 dma_addr_t dev_addr;
@@ -166,9 +166,12 @@ static void mmp_tdma_enable_chan(struct mmp_tdma_chan *tdmac)
166static int mmp_tdma_disable_chan(struct dma_chan *chan) 166static int mmp_tdma_disable_chan(struct dma_chan *chan)
167{ 167{
168 struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan); 168 struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
169 u32 tdcr;
169 170
170 writel(readl(tdmac->reg_base + TDCR) & ~TDCR_CHANEN, 171 tdcr = readl(tdmac->reg_base + TDCR);
171 tdmac->reg_base + TDCR); 172 tdcr |= TDCR_ABR;
173 tdcr &= ~TDCR_CHANEN;
174 writel(tdcr, tdmac->reg_base + TDCR);
172 175
173 tdmac->status = DMA_COMPLETE; 176 tdmac->status = DMA_COMPLETE;
174 177
@@ -296,12 +299,27 @@ static int mmp_tdma_clear_chan_irq(struct mmp_tdma_chan *tdmac)
296 return -EAGAIN; 299 return -EAGAIN;
297} 300}
298 301
302static size_t mmp_tdma_get_pos(struct mmp_tdma_chan *tdmac)
303{
304 size_t reg;
305
306 if (tdmac->idx == 0) {
307 reg = __raw_readl(tdmac->reg_base + TDSAR);
308 reg -= tdmac->desc_arr[0].src_addr;
309 } else if (tdmac->idx == 1) {
310 reg = __raw_readl(tdmac->reg_base + TDDAR);
311 reg -= tdmac->desc_arr[0].dst_addr;
312 } else
313 return -EINVAL;
314
315 return reg;
316}
317
299static irqreturn_t mmp_tdma_chan_handler(int irq, void *dev_id) 318static irqreturn_t mmp_tdma_chan_handler(int irq, void *dev_id)
300{ 319{
301 struct mmp_tdma_chan *tdmac = dev_id; 320 struct mmp_tdma_chan *tdmac = dev_id;
302 321
303 if (mmp_tdma_clear_chan_irq(tdmac) == 0) { 322 if (mmp_tdma_clear_chan_irq(tdmac) == 0) {
304 tdmac->pos = (tdmac->pos + tdmac->period_len) % tdmac->buf_len;
305 tasklet_schedule(&tdmac->tasklet); 323 tasklet_schedule(&tdmac->tasklet);
306 return IRQ_HANDLED; 324 return IRQ_HANDLED;
307 } else 325 } else
@@ -343,7 +361,7 @@ static void mmp_tdma_free_descriptor(struct mmp_tdma_chan *tdmac)
343 int size = tdmac->desc_num * sizeof(struct mmp_tdma_desc); 361 int size = tdmac->desc_num * sizeof(struct mmp_tdma_desc);
344 362
345 gpool = tdmac->pool; 363 gpool = tdmac->pool;
346 if (tdmac->desc_arr) 364 if (gpool && tdmac->desc_arr)
347 gen_pool_free(gpool, (unsigned long)tdmac->desc_arr, 365 gen_pool_free(gpool, (unsigned long)tdmac->desc_arr,
348 size); 366 size);
349 tdmac->desc_arr = NULL; 367 tdmac->desc_arr = NULL;
@@ -499,6 +517,7 @@ static enum dma_status mmp_tdma_tx_status(struct dma_chan *chan,
499{ 517{
500 struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan); 518 struct mmp_tdma_chan *tdmac = to_mmp_tdma_chan(chan);
501 519
520 tdmac->pos = mmp_tdma_get_pos(tdmac);
502 dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie, 521 dma_set_tx_state(txstate, chan->completed_cookie, chan->cookie,
503 tdmac->buf_len - tdmac->pos); 522 tdmac->buf_len - tdmac->pos);
504 523
@@ -610,7 +629,7 @@ static int mmp_tdma_probe(struct platform_device *pdev)
610 int i, ret; 629 int i, ret;
611 int irq = 0, irq_num = 0; 630 int irq = 0, irq_num = 0;
612 int chan_num = TDMA_CHANNEL_NUM; 631 int chan_num = TDMA_CHANNEL_NUM;
613 struct gen_pool *pool; 632 struct gen_pool *pool = NULL;
614 633
615 of_id = of_match_device(mmp_tdma_dt_ids, &pdev->dev); 634 of_id = of_match_device(mmp_tdma_dt_ids, &pdev->dev);
616 if (of_id) 635 if (of_id)
diff --git a/drivers/dma/qcom_bam_dma.c b/drivers/dma/qcom_bam_dma.c
index d7a33b3ac466..9c914d625906 100644
--- a/drivers/dma/qcom_bam_dma.c
+++ b/drivers/dma/qcom_bam_dma.c
@@ -162,9 +162,9 @@ static const struct reg_offset_data bam_v1_4_reg_info[] = {
162 [BAM_P_IRQ_STTS] = { 0x1010, 0x1000, 0x00, 0x00 }, 162 [BAM_P_IRQ_STTS] = { 0x1010, 0x1000, 0x00, 0x00 },
163 [BAM_P_IRQ_CLR] = { 0x1014, 0x1000, 0x00, 0x00 }, 163 [BAM_P_IRQ_CLR] = { 0x1014, 0x1000, 0x00, 0x00 },
164 [BAM_P_IRQ_EN] = { 0x1018, 0x1000, 0x00, 0x00 }, 164 [BAM_P_IRQ_EN] = { 0x1018, 0x1000, 0x00, 0x00 },
165 [BAM_P_EVNT_DEST_ADDR] = { 0x102C, 0x00, 0x1000, 0x00 }, 165 [BAM_P_EVNT_DEST_ADDR] = { 0x182C, 0x00, 0x1000, 0x00 },
166 [BAM_P_EVNT_REG] = { 0x1018, 0x00, 0x1000, 0x00 }, 166 [BAM_P_EVNT_REG] = { 0x1818, 0x00, 0x1000, 0x00 },
167 [BAM_P_SW_OFSTS] = { 0x1000, 0x00, 0x1000, 0x00 }, 167 [BAM_P_SW_OFSTS] = { 0x1800, 0x00, 0x1000, 0x00 },
168 [BAM_P_DATA_FIFO_ADDR] = { 0x1824, 0x00, 0x1000, 0x00 }, 168 [BAM_P_DATA_FIFO_ADDR] = { 0x1824, 0x00, 0x1000, 0x00 },
169 [BAM_P_DESC_FIFO_ADDR] = { 0x181C, 0x00, 0x1000, 0x00 }, 169 [BAM_P_DESC_FIFO_ADDR] = { 0x181C, 0x00, 0x1000, 0x00 },
170 [BAM_P_EVNT_GEN_TRSHLD] = { 0x1828, 0x00, 0x1000, 0x00 }, 170 [BAM_P_EVNT_GEN_TRSHLD] = { 0x1828, 0x00, 0x1000, 0x00 },
@@ -1143,6 +1143,10 @@ static int bam_dma_probe(struct platform_device *pdev)
1143 dma_cap_set(DMA_SLAVE, bdev->common.cap_mask); 1143 dma_cap_set(DMA_SLAVE, bdev->common.cap_mask);
1144 1144
1145 /* initialize dmaengine apis */ 1145 /* initialize dmaengine apis */
1146 bdev->common.directions = BIT(DMA_DEV_TO_MEM) | BIT(DMA_MEM_TO_DEV);
1147 bdev->common.residue_granularity = DMA_RESIDUE_GRANULARITY_SEGMENT;
1148 bdev->common.src_addr_widths = DMA_SLAVE_BUSWIDTH_4_BYTES;
1149 bdev->common.dst_addr_widths = DMA_SLAVE_BUSWIDTH_4_BYTES;
1146 bdev->common.device_alloc_chan_resources = bam_alloc_chan; 1150 bdev->common.device_alloc_chan_resources = bam_alloc_chan;
1147 bdev->common.device_free_chan_resources = bam_free_chan; 1151 bdev->common.device_free_chan_resources = bam_free_chan;
1148 bdev->common.device_prep_slave_sg = bam_prep_slave_sg; 1152 bdev->common.device_prep_slave_sg = bam_prep_slave_sg;
diff --git a/drivers/dma/sh/shdmac.c b/drivers/dma/sh/shdmac.c
index b2431aa30033..9f1d4c7dbab8 100644
--- a/drivers/dma/sh/shdmac.c
+++ b/drivers/dma/sh/shdmac.c
@@ -582,15 +582,12 @@ static void sh_dmae_chan_remove(struct sh_dmae_device *shdev)
582 } 582 }
583} 583}
584 584
585static void sh_dmae_shutdown(struct platform_device *pdev)
586{
587 struct sh_dmae_device *shdev = platform_get_drvdata(pdev);
588 sh_dmae_ctl_stop(shdev);
589}
590
591#ifdef CONFIG_PM 585#ifdef CONFIG_PM
592static int sh_dmae_runtime_suspend(struct device *dev) 586static int sh_dmae_runtime_suspend(struct device *dev)
593{ 587{
588 struct sh_dmae_device *shdev = dev_get_drvdata(dev);
589
590 sh_dmae_ctl_stop(shdev);
594 return 0; 591 return 0;
595} 592}
596 593
@@ -605,6 +602,9 @@ static int sh_dmae_runtime_resume(struct device *dev)
605#ifdef CONFIG_PM_SLEEP 602#ifdef CONFIG_PM_SLEEP
606static int sh_dmae_suspend(struct device *dev) 603static int sh_dmae_suspend(struct device *dev)
607{ 604{
605 struct sh_dmae_device *shdev = dev_get_drvdata(dev);
606
607 sh_dmae_ctl_stop(shdev);
608 return 0; 608 return 0;
609} 609}
610 610
@@ -929,13 +929,12 @@ static int sh_dmae_remove(struct platform_device *pdev)
929} 929}
930 930
931static struct platform_driver sh_dmae_driver = { 931static struct platform_driver sh_dmae_driver = {
932 .driver = { 932 .driver = {
933 .pm = &sh_dmae_pm, 933 .pm = &sh_dmae_pm,
934 .name = SH_DMAE_DRV_NAME, 934 .name = SH_DMAE_DRV_NAME,
935 .of_match_table = sh_dmae_of_match, 935 .of_match_table = sh_dmae_of_match,
936 }, 936 },
937 .remove = sh_dmae_remove, 937 .remove = sh_dmae_remove,
938 .shutdown = sh_dmae_shutdown,
939}; 938};
940 939
941static int __init sh_dmae_init(void) 940static int __init sh_dmae_init(void)
diff --git a/drivers/firmware/dmi_scan.c b/drivers/firmware/dmi_scan.c
index c5f7b4e9eb6c..69fac068669f 100644
--- a/drivers/firmware/dmi_scan.c
+++ b/drivers/firmware/dmi_scan.c
@@ -78,7 +78,7 @@ static const char * __init dmi_string(const struct dmi_header *dm, u8 s)
78 * We have to be cautious here. We have seen BIOSes with DMI pointers 78 * We have to be cautious here. We have seen BIOSes with DMI pointers
79 * pointing to completely the wrong place for example 79 * pointing to completely the wrong place for example
80 */ 80 */
81static void dmi_table(u8 *buf, int len, int num, 81static void dmi_table(u8 *buf, u32 len, int num,
82 void (*decode)(const struct dmi_header *, void *), 82 void (*decode)(const struct dmi_header *, void *),
83 void *private_data) 83 void *private_data)
84{ 84{
@@ -93,12 +93,6 @@ static void dmi_table(u8 *buf, int len, int num,
93 const struct dmi_header *dm = (const struct dmi_header *)data; 93 const struct dmi_header *dm = (const struct dmi_header *)data;
94 94
95 /* 95 /*
96 * 7.45 End-of-Table (Type 127) [SMBIOS reference spec v3.0.0]
97 */
98 if (dm->type == DMI_ENTRY_END_OF_TABLE)
99 break;
100
101 /*
102 * We want to know the total length (formatted area and 96 * We want to know the total length (formatted area and
103 * strings) before decoding to make sure we won't run off the 97 * strings) before decoding to make sure we won't run off the
104 * table in dmi_decode or dmi_string 98 * table in dmi_decode or dmi_string
@@ -108,13 +102,20 @@ static void dmi_table(u8 *buf, int len, int num,
108 data++; 102 data++;
109 if (data - buf < len - 1) 103 if (data - buf < len - 1)
110 decode(dm, private_data); 104 decode(dm, private_data);
105
106 /*
107 * 7.45 End-of-Table (Type 127) [SMBIOS reference spec v3.0.0]
108 */
109 if (dm->type == DMI_ENTRY_END_OF_TABLE)
110 break;
111
111 data += 2; 112 data += 2;
112 i++; 113 i++;
113 } 114 }
114} 115}
115 116
116static phys_addr_t dmi_base; 117static phys_addr_t dmi_base;
117static u16 dmi_len; 118static u32 dmi_len;
118static u16 dmi_num; 119static u16 dmi_num;
119 120
120static int __init dmi_walk_early(void (*decode)(const struct dmi_header *, 121static int __init dmi_walk_early(void (*decode)(const struct dmi_header *,
diff --git a/drivers/firmware/efi/libstub/efi-stub-helper.c b/drivers/firmware/efi/libstub/efi-stub-helper.c
index af5d63c7cc53..f07d4a67fa76 100644
--- a/drivers/firmware/efi/libstub/efi-stub-helper.c
+++ b/drivers/firmware/efi/libstub/efi-stub-helper.c
@@ -75,29 +75,25 @@ efi_status_t efi_get_memory_map(efi_system_table_t *sys_table_arg,
75 unsigned long key; 75 unsigned long key;
76 u32 desc_version; 76 u32 desc_version;
77 77
78 *map_size = 0; 78 *map_size = sizeof(*m) * 32;
79 *desc_size = 0; 79again:
80 key = 0;
81 status = efi_call_early(get_memory_map, map_size, NULL,
82 &key, desc_size, &desc_version);
83 if (status != EFI_BUFFER_TOO_SMALL)
84 return EFI_LOAD_ERROR;
85
86 /* 80 /*
87 * Add an additional efi_memory_desc_t because we're doing an 81 * Add an additional efi_memory_desc_t because we're doing an
88 * allocation which may be in a new descriptor region. 82 * allocation which may be in a new descriptor region.
89 */ 83 */
90 *map_size += *desc_size; 84 *map_size += sizeof(*m);
91 status = efi_call_early(allocate_pool, EFI_LOADER_DATA, 85 status = efi_call_early(allocate_pool, EFI_LOADER_DATA,
92 *map_size, (void **)&m); 86 *map_size, (void **)&m);
93 if (status != EFI_SUCCESS) 87 if (status != EFI_SUCCESS)
94 goto fail; 88 goto fail;
95 89
90 *desc_size = 0;
91 key = 0;
96 status = efi_call_early(get_memory_map, map_size, m, 92 status = efi_call_early(get_memory_map, map_size, m,
97 &key, desc_size, &desc_version); 93 &key, desc_size, &desc_version);
98 if (status == EFI_BUFFER_TOO_SMALL) { 94 if (status == EFI_BUFFER_TOO_SMALL) {
99 efi_call_early(free_pool, m); 95 efi_call_early(free_pool, m);
100 return EFI_LOAD_ERROR; 96 goto again;
101 } 97 }
102 98
103 if (status != EFI_SUCCESS) 99 if (status != EFI_SUCCESS)
@@ -183,12 +179,12 @@ again:
183 start = desc->phys_addr; 179 start = desc->phys_addr;
184 end = start + desc->num_pages * (1UL << EFI_PAGE_SHIFT); 180 end = start + desc->num_pages * (1UL << EFI_PAGE_SHIFT);
185 181
186 if ((start + size) > end || (start + size) > max) 182 if (end > max)
187 continue;
188
189 if (end - size > max)
190 end = max; 183 end = max;
191 184
185 if ((start + size) > end)
186 continue;
187
192 if (round_down(end - size, align) < start) 188 if (round_down(end - size, align) < start)
193 continue; 189 continue;
194 190
diff --git a/drivers/gpio/gpio-tps65912.c b/drivers/gpio/gpio-tps65912.c
index 472fb5b8779f..9cdbc0c9cb2d 100644
--- a/drivers/gpio/gpio-tps65912.c
+++ b/drivers/gpio/gpio-tps65912.c
@@ -26,9 +26,12 @@ struct tps65912_gpio_data {
26 struct gpio_chip gpio_chip; 26 struct gpio_chip gpio_chip;
27}; 27};
28 28
29#define to_tgd(gc) container_of(gc, struct tps65912_gpio_data, gpio_chip)
30
29static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset) 31static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset)
30{ 32{
31 struct tps65912 *tps65912 = container_of(gc, struct tps65912, gpio); 33 struct tps65912_gpio_data *tps65912_gpio = to_tgd(gc);
34 struct tps65912 *tps65912 = tps65912_gpio->tps65912;
32 int val; 35 int val;
33 36
34 val = tps65912_reg_read(tps65912, TPS65912_GPIO1 + offset); 37 val = tps65912_reg_read(tps65912, TPS65912_GPIO1 + offset);
@@ -42,7 +45,8 @@ static int tps65912_gpio_get(struct gpio_chip *gc, unsigned offset)
42static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset, 45static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset,
43 int value) 46 int value)
44{ 47{
45 struct tps65912 *tps65912 = container_of(gc, struct tps65912, gpio); 48 struct tps65912_gpio_data *tps65912_gpio = to_tgd(gc);
49 struct tps65912 *tps65912 = tps65912_gpio->tps65912;
46 50
47 if (value) 51 if (value)
48 tps65912_set_bits(tps65912, TPS65912_GPIO1 + offset, 52 tps65912_set_bits(tps65912, TPS65912_GPIO1 + offset,
@@ -55,7 +59,8 @@ static void tps65912_gpio_set(struct gpio_chip *gc, unsigned offset,
55static int tps65912_gpio_output(struct gpio_chip *gc, unsigned offset, 59static int tps65912_gpio_output(struct gpio_chip *gc, unsigned offset,
56 int value) 60 int value)
57{ 61{
58 struct tps65912 *tps65912 = container_of(gc, struct tps65912, gpio); 62 struct tps65912_gpio_data *tps65912_gpio = to_tgd(gc);
63 struct tps65912 *tps65912 = tps65912_gpio->tps65912;
59 64
60 /* Set the initial value */ 65 /* Set the initial value */
61 tps65912_gpio_set(gc, offset, value); 66 tps65912_gpio_set(gc, offset, value);
@@ -66,7 +71,8 @@ static int tps65912_gpio_output(struct gpio_chip *gc, unsigned offset,
66 71
67static int tps65912_gpio_input(struct gpio_chip *gc, unsigned offset) 72static int tps65912_gpio_input(struct gpio_chip *gc, unsigned offset)
68{ 73{
69 struct tps65912 *tps65912 = container_of(gc, struct tps65912, gpio); 74 struct tps65912_gpio_data *tps65912_gpio = to_tgd(gc);
75 struct tps65912 *tps65912 = tps65912_gpio->tps65912;
70 76
71 return tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset, 77 return tps65912_clear_bits(tps65912, TPS65912_GPIO1 + offset,
72 GPIO_CFG_MASK); 78 GPIO_CFG_MASK);
diff --git a/drivers/gpio/gpiolib-of.c b/drivers/gpio/gpiolib-of.c
index 8cad8e400b44..4650bf830d6b 100644
--- a/drivers/gpio/gpiolib-of.c
+++ b/drivers/gpio/gpiolib-of.c
@@ -46,12 +46,13 @@ static int of_gpiochip_find_and_xlate(struct gpio_chip *gc, void *data)
46 46
47 ret = gc->of_xlate(gc, &gg_data->gpiospec, gg_data->flags); 47 ret = gc->of_xlate(gc, &gg_data->gpiospec, gg_data->flags);
48 if (ret < 0) { 48 if (ret < 0) {
49 /* We've found the gpio chip, but the translation failed. 49 /* We've found a gpio chip, but the translation failed.
50 * Return true to stop looking and return the translation 50 * Store translation error in out_gpio.
51 * error via out_gpio 51 * Return false to keep looking, as more than one gpio chip
52 * could be registered per of-node.
52 */ 53 */
53 gg_data->out_gpio = ERR_PTR(ret); 54 gg_data->out_gpio = ERR_PTR(ret);
54 return true; 55 return false;
55 } 56 }
56 57
57 gg_data->out_gpio = gpiochip_get_desc(gc, ret); 58 gg_data->out_gpio = gpiochip_get_desc(gc, ret);
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
index b3589d0e39b9..d8135adb2238 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c
@@ -62,12 +62,18 @@ enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type)
62 return KFD_MQD_TYPE_CP; 62 return KFD_MQD_TYPE_CP;
63} 63}
64 64
65static inline unsigned int get_first_pipe(struct device_queue_manager *dqm) 65unsigned int get_first_pipe(struct device_queue_manager *dqm)
66{ 66{
67 BUG_ON(!dqm); 67 BUG_ON(!dqm || !dqm->dev);
68 return dqm->dev->shared_resources.first_compute_pipe; 68 return dqm->dev->shared_resources.first_compute_pipe;
69} 69}
70 70
71unsigned int get_pipes_num(struct device_queue_manager *dqm)
72{
73 BUG_ON(!dqm || !dqm->dev);
74 return dqm->dev->shared_resources.compute_pipe_count;
75}
76
71static inline unsigned int get_pipes_num_cpsch(void) 77static inline unsigned int get_pipes_num_cpsch(void)
72{ 78{
73 return PIPE_PER_ME_CP_SCHEDULING; 79 return PIPE_PER_ME_CP_SCHEDULING;
@@ -639,6 +645,7 @@ static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
639 pr_debug(" sdma queue id: %d\n", q->properties.sdma_queue_id); 645 pr_debug(" sdma queue id: %d\n", q->properties.sdma_queue_id);
640 pr_debug(" sdma engine id: %d\n", q->properties.sdma_engine_id); 646 pr_debug(" sdma engine id: %d\n", q->properties.sdma_engine_id);
641 647
648 init_sdma_vm(dqm, q, qpd);
642 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj, 649 retval = mqd->init_mqd(mqd, &q->mqd, &q->mqd_mem_obj,
643 &q->gart_mqd_addr, &q->properties); 650 &q->gart_mqd_addr, &q->properties);
644 if (retval != 0) { 651 if (retval != 0) {
@@ -646,7 +653,14 @@ static int create_sdma_queue_nocpsch(struct device_queue_manager *dqm,
646 return retval; 653 return retval;
647 } 654 }
648 655
649 init_sdma_vm(dqm, q, qpd); 656 retval = mqd->load_mqd(mqd, q->mqd, 0,
657 0, NULL);
658 if (retval != 0) {
659 deallocate_sdma_queue(dqm, q->sdma_id);
660 mqd->uninit_mqd(mqd, q->mqd, q->mqd_mem_obj);
661 return retval;
662 }
663
650 return 0; 664 return 0;
651} 665}
652 666
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
index d64f86cda34f..488f51d19427 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.h
@@ -163,6 +163,8 @@ void program_sh_mem_settings(struct device_queue_manager *dqm,
163 struct qcm_process_device *qpd); 163 struct qcm_process_device *qpd);
164int init_pipelines(struct device_queue_manager *dqm, 164int init_pipelines(struct device_queue_manager *dqm,
165 unsigned int pipes_num, unsigned int first_pipe); 165 unsigned int pipes_num, unsigned int first_pipe);
166unsigned int get_first_pipe(struct device_queue_manager *dqm);
167unsigned int get_pipes_num(struct device_queue_manager *dqm);
166 168
167extern inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd) 169extern inline unsigned int get_sh_mem_bases_32(struct kfd_process_device *pdd)
168{ 170{
@@ -175,10 +177,4 @@ get_sh_mem_bases_nybble_64(struct kfd_process_device *pdd)
175 return (pdd->lds_base >> 60) & 0x0E; 177 return (pdd->lds_base >> 60) & 0x0E;
176} 178}
177 179
178extern inline unsigned int get_pipes_num(struct device_queue_manager *dqm)
179{
180 BUG_ON(!dqm || !dqm->dev);
181 return dqm->dev->shared_resources.compute_pipe_count;
182}
183
184#endif /* KFD_DEVICE_QUEUE_MANAGER_H_ */ 180#endif /* KFD_DEVICE_QUEUE_MANAGER_H_ */
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c
index 6b072466e2a6..5469efe0523e 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager_cik.c
@@ -131,5 +131,5 @@ static int register_process_cik(struct device_queue_manager *dqm,
131 131
132static int initialize_cpsch_cik(struct device_queue_manager *dqm) 132static int initialize_cpsch_cik(struct device_queue_manager *dqm)
133{ 133{
134 return init_pipelines(dqm, get_pipes_num(dqm), 0); 134 return init_pipelines(dqm, get_pipes_num(dqm), get_first_pipe(dqm));
135} 135}
diff --git a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
index e415a2a9207e..c7d298e62c96 100644
--- a/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
+++ b/drivers/gpu/drm/amd/amdkfd/kfd_kernel_queue.c
@@ -44,7 +44,7 @@ static bool initialize(struct kernel_queue *kq, struct kfd_dev *dev,
44 BUG_ON(!kq || !dev); 44 BUG_ON(!kq || !dev);
45 BUG_ON(type != KFD_QUEUE_TYPE_DIQ && type != KFD_QUEUE_TYPE_HIQ); 45 BUG_ON(type != KFD_QUEUE_TYPE_DIQ && type != KFD_QUEUE_TYPE_HIQ);
46 46
47 pr_debug("kfd: In func %s initializing queue type %d size %d\n", 47 pr_debug("amdkfd: In func %s initializing queue type %d size %d\n",
48 __func__, KFD_QUEUE_TYPE_HIQ, queue_size); 48 __func__, KFD_QUEUE_TYPE_HIQ, queue_size);
49 49
50 nop.opcode = IT_NOP; 50 nop.opcode = IT_NOP;
@@ -69,12 +69,16 @@ static bool initialize(struct kernel_queue *kq, struct kfd_dev *dev,
69 69
70 prop.doorbell_ptr = kfd_get_kernel_doorbell(dev, &prop.doorbell_off); 70 prop.doorbell_ptr = kfd_get_kernel_doorbell(dev, &prop.doorbell_off);
71 71
72 if (prop.doorbell_ptr == NULL) 72 if (prop.doorbell_ptr == NULL) {
73 pr_err("amdkfd: error init doorbell");
73 goto err_get_kernel_doorbell; 74 goto err_get_kernel_doorbell;
75 }
74 76
75 retval = kfd_gtt_sa_allocate(dev, queue_size, &kq->pq); 77 retval = kfd_gtt_sa_allocate(dev, queue_size, &kq->pq);
76 if (retval != 0) 78 if (retval != 0) {
79 pr_err("amdkfd: error init pq queues size (%d)\n", queue_size);
77 goto err_pq_allocate_vidmem; 80 goto err_pq_allocate_vidmem;
81 }
78 82
79 kq->pq_kernel_addr = kq->pq->cpu_ptr; 83 kq->pq_kernel_addr = kq->pq->cpu_ptr;
80 kq->pq_gpu_addr = kq->pq->gpu_addr; 84 kq->pq_gpu_addr = kq->pq->gpu_addr;
@@ -165,10 +169,8 @@ err_rptr_allocate_vidmem:
165err_eop_allocate_vidmem: 169err_eop_allocate_vidmem:
166 kfd_gtt_sa_free(dev, kq->pq); 170 kfd_gtt_sa_free(dev, kq->pq);
167err_pq_allocate_vidmem: 171err_pq_allocate_vidmem:
168 pr_err("kfd: error init pq\n");
169 kfd_release_kernel_doorbell(dev, prop.doorbell_ptr); 172 kfd_release_kernel_doorbell(dev, prop.doorbell_ptr);
170err_get_kernel_doorbell: 173err_get_kernel_doorbell:
171 pr_err("kfd: error init doorbell");
172 return false; 174 return false;
173 175
174} 176}
@@ -187,6 +189,8 @@ static void uninitialize(struct kernel_queue *kq)
187 else if (kq->queue->properties.type == KFD_QUEUE_TYPE_DIQ) 189 else if (kq->queue->properties.type == KFD_QUEUE_TYPE_DIQ)
188 kfd_gtt_sa_free(kq->dev, kq->fence_mem_obj); 190 kfd_gtt_sa_free(kq->dev, kq->fence_mem_obj);
189 191
192 kq->mqd->uninit_mqd(kq->mqd, kq->queue->mqd, kq->queue->mqd_mem_obj);
193
190 kfd_gtt_sa_free(kq->dev, kq->rptr_mem); 194 kfd_gtt_sa_free(kq->dev, kq->rptr_mem);
191 kfd_gtt_sa_free(kq->dev, kq->wptr_mem); 195 kfd_gtt_sa_free(kq->dev, kq->wptr_mem);
192 kq->ops_asic_specific.uninitialize(kq); 196 kq->ops_asic_specific.uninitialize(kq);
@@ -211,7 +215,7 @@ static int acquire_packet_buffer(struct kernel_queue *kq,
211 queue_address = (unsigned int *)kq->pq_kernel_addr; 215 queue_address = (unsigned int *)kq->pq_kernel_addr;
212 queue_size_dwords = kq->queue->properties.queue_size / sizeof(uint32_t); 216 queue_size_dwords = kq->queue->properties.queue_size / sizeof(uint32_t);
213 217
214 pr_debug("kfd: In func %s\nrptr: %d\nwptr: %d\nqueue_address 0x%p\n", 218 pr_debug("amdkfd: In func %s\nrptr: %d\nwptr: %d\nqueue_address 0x%p\n",
215 __func__, rptr, wptr, queue_address); 219 __func__, rptr, wptr, queue_address);
216 220
217 available_size = (rptr - 1 - wptr + queue_size_dwords) % 221 available_size = (rptr - 1 - wptr + queue_size_dwords) %
@@ -296,7 +300,7 @@ struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
296 } 300 }
297 301
298 if (kq->ops.initialize(kq, dev, type, KFD_KERNEL_QUEUE_SIZE) == false) { 302 if (kq->ops.initialize(kq, dev, type, KFD_KERNEL_QUEUE_SIZE) == false) {
299 pr_err("kfd: failed to init kernel queue\n"); 303 pr_err("amdkfd: failed to init kernel queue\n");
300 kfree(kq); 304 kfree(kq);
301 return NULL; 305 return NULL;
302 } 306 }
@@ -319,7 +323,7 @@ static __attribute__((unused)) void test_kq(struct kfd_dev *dev)
319 323
320 BUG_ON(!dev); 324 BUG_ON(!dev);
321 325
322 pr_err("kfd: starting kernel queue test\n"); 326 pr_err("amdkfd: starting kernel queue test\n");
323 327
324 kq = kernel_queue_init(dev, KFD_QUEUE_TYPE_HIQ); 328 kq = kernel_queue_init(dev, KFD_QUEUE_TYPE_HIQ);
325 BUG_ON(!kq); 329 BUG_ON(!kq);
@@ -330,7 +334,7 @@ static __attribute__((unused)) void test_kq(struct kfd_dev *dev)
330 buffer[i] = kq->nop_packet; 334 buffer[i] = kq->nop_packet;
331 kq->ops.submit_packet(kq); 335 kq->ops.submit_packet(kq);
332 336
333 pr_err("kfd: ending kernel queue test\n"); 337 pr_err("amdkfd: ending kernel queue test\n");
334} 338}
335 339
336 340
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
index 0409b907de5d..b3e3068c6ec0 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c
@@ -153,7 +153,7 @@ static int atmel_hlcdc_crtc_mode_set(struct drm_crtc *c,
153 (adj->crtc_hdisplay - 1) | 153 (adj->crtc_hdisplay - 1) |
154 ((adj->crtc_vdisplay - 1) << 16)); 154 ((adj->crtc_vdisplay - 1) << 16));
155 155
156 cfg = ATMEL_HLCDC_CLKPOL; 156 cfg = 0;
157 157
158 prate = clk_get_rate(crtc->dc->hlcdc->sys_clk); 158 prate = clk_get_rate(crtc->dc->hlcdc->sys_clk);
159 mode_rate = mode->crtc_clock * 1000; 159 mode_rate = mode->crtc_clock * 1000;
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
index 7320a6c6613f..c1cb17493e0d 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_dc.c
@@ -311,8 +311,6 @@ static int atmel_hlcdc_dc_load(struct drm_device *dev)
311 311
312 pm_runtime_enable(dev->dev); 312 pm_runtime_enable(dev->dev);
313 313
314 pm_runtime_put_sync(dev->dev);
315
316 ret = atmel_hlcdc_dc_modeset_init(dev); 314 ret = atmel_hlcdc_dc_modeset_init(dev);
317 if (ret < 0) { 315 if (ret < 0) {
318 dev_err(dev->dev, "failed to initialize mode setting\n"); 316 dev_err(dev->dev, "failed to initialize mode setting\n");
diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c
index 063d2a7b941f..e79bd9ba474b 100644
--- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c
+++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_layer.c
@@ -311,7 +311,8 @@ int atmel_hlcdc_layer_disable(struct atmel_hlcdc_layer *layer)
311 311
312 /* Disable the layer */ 312 /* Disable the layer */
313 regmap_write(regmap, desc->regs_offset + ATMEL_HLCDC_LAYER_CHDR, 313 regmap_write(regmap, desc->regs_offset + ATMEL_HLCDC_LAYER_CHDR,
314 ATMEL_HLCDC_LAYER_RST); 314 ATMEL_HLCDC_LAYER_RST | ATMEL_HLCDC_LAYER_A2Q |
315 ATMEL_HLCDC_LAYER_UPDATE);
315 316
316 /* Clear all pending interrupts */ 317 /* Clear all pending interrupts */
317 regmap_read(regmap, desc->regs_offset + ATMEL_HLCDC_LAYER_ISR, &isr); 318 regmap_read(regmap, desc->regs_offset + ATMEL_HLCDC_LAYER_ISR, &isr);
diff --git a/drivers/gpu/drm/drm_crtc.c b/drivers/gpu/drm/drm_crtc.c
index 6b00173d1be4..f6d04c7b5115 100644
--- a/drivers/gpu/drm/drm_crtc.c
+++ b/drivers/gpu/drm/drm_crtc.c
@@ -43,9 +43,10 @@
43#include "drm_crtc_internal.h" 43#include "drm_crtc_internal.h"
44#include "drm_internal.h" 44#include "drm_internal.h"
45 45
46static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev, 46static struct drm_framebuffer *
47 struct drm_mode_fb_cmd2 *r, 47internal_framebuffer_create(struct drm_device *dev,
48 struct drm_file *file_priv); 48 struct drm_mode_fb_cmd2 *r,
49 struct drm_file *file_priv);
49 50
50/* Avoid boilerplate. I'm tired of typing. */ 51/* Avoid boilerplate. I'm tired of typing. */
51#define DRM_ENUM_NAME_FN(fnname, list) \ 52#define DRM_ENUM_NAME_FN(fnname, list) \
@@ -2127,7 +2128,6 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,
2127 DRM_DEBUG_KMS("[CONNECTOR:%d:?]\n", out_resp->connector_id); 2128 DRM_DEBUG_KMS("[CONNECTOR:%d:?]\n", out_resp->connector_id);
2128 2129
2129 mutex_lock(&dev->mode_config.mutex); 2130 mutex_lock(&dev->mode_config.mutex);
2130 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
2131 2131
2132 connector = drm_connector_find(dev, out_resp->connector_id); 2132 connector = drm_connector_find(dev, out_resp->connector_id);
2133 if (!connector) { 2133 if (!connector) {
@@ -2157,6 +2157,8 @@ int drm_mode_getconnector(struct drm_device *dev, void *data,
2157 out_resp->mm_height = connector->display_info.height_mm; 2157 out_resp->mm_height = connector->display_info.height_mm;
2158 out_resp->subpixel = connector->display_info.subpixel_order; 2158 out_resp->subpixel = connector->display_info.subpixel_order;
2159 out_resp->connection = connector->status; 2159 out_resp->connection = connector->status;
2160
2161 drm_modeset_lock(&dev->mode_config.connection_mutex, NULL);
2160 encoder = drm_connector_get_encoder(connector); 2162 encoder = drm_connector_get_encoder(connector);
2161 if (encoder) 2163 if (encoder)
2162 out_resp->encoder_id = encoder->base.id; 2164 out_resp->encoder_id = encoder->base.id;
@@ -2907,13 +2909,11 @@ static int drm_mode_cursor_universal(struct drm_crtc *crtc,
2907 */ 2909 */
2908 if (req->flags & DRM_MODE_CURSOR_BO) { 2910 if (req->flags & DRM_MODE_CURSOR_BO) {
2909 if (req->handle) { 2911 if (req->handle) {
2910 fb = add_framebuffer_internal(dev, &fbreq, file_priv); 2912 fb = internal_framebuffer_create(dev, &fbreq, file_priv);
2911 if (IS_ERR(fb)) { 2913 if (IS_ERR(fb)) {
2912 DRM_DEBUG_KMS("failed to wrap cursor buffer in drm framebuffer\n"); 2914 DRM_DEBUG_KMS("failed to wrap cursor buffer in drm framebuffer\n");
2913 return PTR_ERR(fb); 2915 return PTR_ERR(fb);
2914 } 2916 }
2915
2916 drm_framebuffer_reference(fb);
2917 } else { 2917 } else {
2918 fb = NULL; 2918 fb = NULL;
2919 } 2919 }
@@ -3266,9 +3266,10 @@ static int framebuffer_check(const struct drm_mode_fb_cmd2 *r)
3266 return 0; 3266 return 0;
3267} 3267}
3268 3268
3269static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev, 3269static struct drm_framebuffer *
3270 struct drm_mode_fb_cmd2 *r, 3270internal_framebuffer_create(struct drm_device *dev,
3271 struct drm_file *file_priv) 3271 struct drm_mode_fb_cmd2 *r,
3272 struct drm_file *file_priv)
3272{ 3273{
3273 struct drm_mode_config *config = &dev->mode_config; 3274 struct drm_mode_config *config = &dev->mode_config;
3274 struct drm_framebuffer *fb; 3275 struct drm_framebuffer *fb;
@@ -3300,12 +3301,6 @@ static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev,
3300 return fb; 3301 return fb;
3301 } 3302 }
3302 3303
3303 mutex_lock(&file_priv->fbs_lock);
3304 r->fb_id = fb->base.id;
3305 list_add(&fb->filp_head, &file_priv->fbs);
3306 DRM_DEBUG_KMS("[FB:%d]\n", fb->base.id);
3307 mutex_unlock(&file_priv->fbs_lock);
3308
3309 return fb; 3304 return fb;
3310} 3305}
3311 3306
@@ -3327,15 +3322,24 @@ static struct drm_framebuffer *add_framebuffer_internal(struct drm_device *dev,
3327int drm_mode_addfb2(struct drm_device *dev, 3322int drm_mode_addfb2(struct drm_device *dev,
3328 void *data, struct drm_file *file_priv) 3323 void *data, struct drm_file *file_priv)
3329{ 3324{
3325 struct drm_mode_fb_cmd2 *r = data;
3330 struct drm_framebuffer *fb; 3326 struct drm_framebuffer *fb;
3331 3327
3332 if (!drm_core_check_feature(dev, DRIVER_MODESET)) 3328 if (!drm_core_check_feature(dev, DRIVER_MODESET))
3333 return -EINVAL; 3329 return -EINVAL;
3334 3330
3335 fb = add_framebuffer_internal(dev, data, file_priv); 3331 fb = internal_framebuffer_create(dev, r, file_priv);
3336 if (IS_ERR(fb)) 3332 if (IS_ERR(fb))
3337 return PTR_ERR(fb); 3333 return PTR_ERR(fb);
3338 3334
3335 /* Transfer ownership to the filp for reaping on close */
3336
3337 DRM_DEBUG_KMS("[FB:%d]\n", fb->base.id);
3338 mutex_lock(&file_priv->fbs_lock);
3339 r->fb_id = fb->base.id;
3340 list_add(&fb->filp_head, &file_priv->fbs);
3341 mutex_unlock(&file_priv->fbs_lock);
3342
3339 return 0; 3343 return 0;
3340} 3344}
3341 3345
diff --git a/drivers/gpu/drm/drm_dp_mst_topology.c b/drivers/gpu/drm/drm_dp_mst_topology.c
index 9a5b68717ec8..379ab4555756 100644
--- a/drivers/gpu/drm/drm_dp_mst_topology.c
+++ b/drivers/gpu/drm/drm_dp_mst_topology.c
@@ -733,10 +733,14 @@ static bool check_txmsg_state(struct drm_dp_mst_topology_mgr *mgr,
733 struct drm_dp_sideband_msg_tx *txmsg) 733 struct drm_dp_sideband_msg_tx *txmsg)
734{ 734{
735 bool ret; 735 bool ret;
736 mutex_lock(&mgr->qlock); 736
737 /*
738 * All updates to txmsg->state are protected by mgr->qlock, and the two
739 * cases we check here are terminal states. For those the barriers
740 * provided by the wake_up/wait_event pair are enough.
741 */
737 ret = (txmsg->state == DRM_DP_SIDEBAND_TX_RX || 742 ret = (txmsg->state == DRM_DP_SIDEBAND_TX_RX ||
738 txmsg->state == DRM_DP_SIDEBAND_TX_TIMEOUT); 743 txmsg->state == DRM_DP_SIDEBAND_TX_TIMEOUT);
739 mutex_unlock(&mgr->qlock);
740 return ret; 744 return ret;
741} 745}
742 746
@@ -1363,12 +1367,13 @@ static int process_single_tx_qlock(struct drm_dp_mst_topology_mgr *mgr,
1363 return 0; 1367 return 0;
1364} 1368}
1365 1369
1366/* must be called holding qlock */
1367static void process_single_down_tx_qlock(struct drm_dp_mst_topology_mgr *mgr) 1370static void process_single_down_tx_qlock(struct drm_dp_mst_topology_mgr *mgr)
1368{ 1371{
1369 struct drm_dp_sideband_msg_tx *txmsg; 1372 struct drm_dp_sideband_msg_tx *txmsg;
1370 int ret; 1373 int ret;
1371 1374
1375 WARN_ON(!mutex_is_locked(&mgr->qlock));
1376
1372 /* construct a chunk from the first msg in the tx_msg queue */ 1377 /* construct a chunk from the first msg in the tx_msg queue */
1373 if (list_empty(&mgr->tx_msg_downq)) { 1378 if (list_empty(&mgr->tx_msg_downq)) {
1374 mgr->tx_down_in_progress = false; 1379 mgr->tx_down_in_progress = false;
diff --git a/drivers/gpu/drm/drm_mm.c b/drivers/gpu/drm/drm_mm.c
index 04a209e2b66d..1134526286c8 100644
--- a/drivers/gpu/drm/drm_mm.c
+++ b/drivers/gpu/drm/drm_mm.c
@@ -91,29 +91,29 @@
91 */ 91 */
92 92
93static struct drm_mm_node *drm_mm_search_free_generic(const struct drm_mm *mm, 93static struct drm_mm_node *drm_mm_search_free_generic(const struct drm_mm *mm,
94 unsigned long size, 94 u64 size,
95 unsigned alignment, 95 unsigned alignment,
96 unsigned long color, 96 unsigned long color,
97 enum drm_mm_search_flags flags); 97 enum drm_mm_search_flags flags);
98static struct drm_mm_node *drm_mm_search_free_in_range_generic(const struct drm_mm *mm, 98static struct drm_mm_node *drm_mm_search_free_in_range_generic(const struct drm_mm *mm,
99 unsigned long size, 99 u64 size,
100 unsigned alignment, 100 unsigned alignment,
101 unsigned long color, 101 unsigned long color,
102 unsigned long start, 102 u64 start,
103 unsigned long end, 103 u64 end,
104 enum drm_mm_search_flags flags); 104 enum drm_mm_search_flags flags);
105 105
106static void drm_mm_insert_helper(struct drm_mm_node *hole_node, 106static void drm_mm_insert_helper(struct drm_mm_node *hole_node,
107 struct drm_mm_node *node, 107 struct drm_mm_node *node,
108 unsigned long size, unsigned alignment, 108 u64 size, unsigned alignment,
109 unsigned long color, 109 unsigned long color,
110 enum drm_mm_allocator_flags flags) 110 enum drm_mm_allocator_flags flags)
111{ 111{
112 struct drm_mm *mm = hole_node->mm; 112 struct drm_mm *mm = hole_node->mm;
113 unsigned long hole_start = drm_mm_hole_node_start(hole_node); 113 u64 hole_start = drm_mm_hole_node_start(hole_node);
114 unsigned long hole_end = drm_mm_hole_node_end(hole_node); 114 u64 hole_end = drm_mm_hole_node_end(hole_node);
115 unsigned long adj_start = hole_start; 115 u64 adj_start = hole_start;
116 unsigned long adj_end = hole_end; 116 u64 adj_end = hole_end;
117 117
118 BUG_ON(node->allocated); 118 BUG_ON(node->allocated);
119 119
@@ -124,12 +124,15 @@ static void drm_mm_insert_helper(struct drm_mm_node *hole_node,
124 adj_start = adj_end - size; 124 adj_start = adj_end - size;
125 125
126 if (alignment) { 126 if (alignment) {
127 unsigned tmp = adj_start % alignment; 127 u64 tmp = adj_start;
128 if (tmp) { 128 unsigned rem;
129
130 rem = do_div(tmp, alignment);
131 if (rem) {
129 if (flags & DRM_MM_CREATE_TOP) 132 if (flags & DRM_MM_CREATE_TOP)
130 adj_start -= tmp; 133 adj_start -= rem;
131 else 134 else
132 adj_start += alignment - tmp; 135 adj_start += alignment - rem;
133 } 136 }
134 } 137 }
135 138
@@ -176,9 +179,9 @@ static void drm_mm_insert_helper(struct drm_mm_node *hole_node,
176int drm_mm_reserve_node(struct drm_mm *mm, struct drm_mm_node *node) 179int drm_mm_reserve_node(struct drm_mm *mm, struct drm_mm_node *node)
177{ 180{
178 struct drm_mm_node *hole; 181 struct drm_mm_node *hole;
179 unsigned long end = node->start + node->size; 182 u64 end = node->start + node->size;
180 unsigned long hole_start; 183 u64 hole_start;
181 unsigned long hole_end; 184 u64 hole_end;
182 185
183 BUG_ON(node == NULL); 186 BUG_ON(node == NULL);
184 187
@@ -227,7 +230,7 @@ EXPORT_SYMBOL(drm_mm_reserve_node);
227 * 0 on success, -ENOSPC if there's no suitable hole. 230 * 0 on success, -ENOSPC if there's no suitable hole.
228 */ 231 */
229int drm_mm_insert_node_generic(struct drm_mm *mm, struct drm_mm_node *node, 232int drm_mm_insert_node_generic(struct drm_mm *mm, struct drm_mm_node *node,
230 unsigned long size, unsigned alignment, 233 u64 size, unsigned alignment,
231 unsigned long color, 234 unsigned long color,
232 enum drm_mm_search_flags sflags, 235 enum drm_mm_search_flags sflags,
233 enum drm_mm_allocator_flags aflags) 236 enum drm_mm_allocator_flags aflags)
@@ -246,16 +249,16 @@ EXPORT_SYMBOL(drm_mm_insert_node_generic);
246 249
247static void drm_mm_insert_helper_range(struct drm_mm_node *hole_node, 250static void drm_mm_insert_helper_range(struct drm_mm_node *hole_node,
248 struct drm_mm_node *node, 251 struct drm_mm_node *node,
249 unsigned long size, unsigned alignment, 252 u64 size, unsigned alignment,
250 unsigned long color, 253 unsigned long color,
251 unsigned long start, unsigned long end, 254 u64 start, u64 end,
252 enum drm_mm_allocator_flags flags) 255 enum drm_mm_allocator_flags flags)
253{ 256{
254 struct drm_mm *mm = hole_node->mm; 257 struct drm_mm *mm = hole_node->mm;
255 unsigned long hole_start = drm_mm_hole_node_start(hole_node); 258 u64 hole_start = drm_mm_hole_node_start(hole_node);
256 unsigned long hole_end = drm_mm_hole_node_end(hole_node); 259 u64 hole_end = drm_mm_hole_node_end(hole_node);
257 unsigned long adj_start = hole_start; 260 u64 adj_start = hole_start;
258 unsigned long adj_end = hole_end; 261 u64 adj_end = hole_end;
259 262
260 BUG_ON(!hole_node->hole_follows || node->allocated); 263 BUG_ON(!hole_node->hole_follows || node->allocated);
261 264
@@ -271,12 +274,15 @@ static void drm_mm_insert_helper_range(struct drm_mm_node *hole_node,
271 mm->color_adjust(hole_node, color, &adj_start, &adj_end); 274 mm->color_adjust(hole_node, color, &adj_start, &adj_end);
272 275
273 if (alignment) { 276 if (alignment) {
274 unsigned tmp = adj_start % alignment; 277 u64 tmp = adj_start;
275 if (tmp) { 278 unsigned rem;
279
280 rem = do_div(tmp, alignment);
281 if (rem) {
276 if (flags & DRM_MM_CREATE_TOP) 282 if (flags & DRM_MM_CREATE_TOP)
277 adj_start -= tmp; 283 adj_start -= rem;
278 else 284 else
279 adj_start += alignment - tmp; 285 adj_start += alignment - rem;
280 } 286 }
281 } 287 }
282 288
@@ -324,9 +330,9 @@ static void drm_mm_insert_helper_range(struct drm_mm_node *hole_node,
324 * 0 on success, -ENOSPC if there's no suitable hole. 330 * 0 on success, -ENOSPC if there's no suitable hole.
325 */ 331 */
326int drm_mm_insert_node_in_range_generic(struct drm_mm *mm, struct drm_mm_node *node, 332int drm_mm_insert_node_in_range_generic(struct drm_mm *mm, struct drm_mm_node *node,
327 unsigned long size, unsigned alignment, 333 u64 size, unsigned alignment,
328 unsigned long color, 334 unsigned long color,
329 unsigned long start, unsigned long end, 335 u64 start, u64 end,
330 enum drm_mm_search_flags sflags, 336 enum drm_mm_search_flags sflags,
331 enum drm_mm_allocator_flags aflags) 337 enum drm_mm_allocator_flags aflags)
332{ 338{
@@ -387,32 +393,34 @@ void drm_mm_remove_node(struct drm_mm_node *node)
387} 393}
388EXPORT_SYMBOL(drm_mm_remove_node); 394EXPORT_SYMBOL(drm_mm_remove_node);
389 395
390static int check_free_hole(unsigned long start, unsigned long end, 396static int check_free_hole(u64 start, u64 end, u64 size, unsigned alignment)
391 unsigned long size, unsigned alignment)
392{ 397{
393 if (end - start < size) 398 if (end - start < size)
394 return 0; 399 return 0;
395 400
396 if (alignment) { 401 if (alignment) {
397 unsigned tmp = start % alignment; 402 u64 tmp = start;
398 if (tmp) 403 unsigned rem;
399 start += alignment - tmp; 404
405 rem = do_div(tmp, alignment);
406 if (rem)
407 start += alignment - rem;
400 } 408 }
401 409
402 return end >= start + size; 410 return end >= start + size;
403} 411}
404 412
405static struct drm_mm_node *drm_mm_search_free_generic(const struct drm_mm *mm, 413static struct drm_mm_node *drm_mm_search_free_generic(const struct drm_mm *mm,
406 unsigned long size, 414 u64 size,
407 unsigned alignment, 415 unsigned alignment,
408 unsigned long color, 416 unsigned long color,
409 enum drm_mm_search_flags flags) 417 enum drm_mm_search_flags flags)
410{ 418{
411 struct drm_mm_node *entry; 419 struct drm_mm_node *entry;
412 struct drm_mm_node *best; 420 struct drm_mm_node *best;
413 unsigned long adj_start; 421 u64 adj_start;
414 unsigned long adj_end; 422 u64 adj_end;
415 unsigned long best_size; 423 u64 best_size;
416 424
417 BUG_ON(mm->scanned_blocks); 425 BUG_ON(mm->scanned_blocks);
418 426
@@ -421,7 +429,7 @@ static struct drm_mm_node *drm_mm_search_free_generic(const struct drm_mm *mm,
421 429
422 __drm_mm_for_each_hole(entry, mm, adj_start, adj_end, 430 __drm_mm_for_each_hole(entry, mm, adj_start, adj_end,
423 flags & DRM_MM_SEARCH_BELOW) { 431 flags & DRM_MM_SEARCH_BELOW) {
424 unsigned long hole_size = adj_end - adj_start; 432 u64 hole_size = adj_end - adj_start;
425 433
426 if (mm->color_adjust) { 434 if (mm->color_adjust) {
427 mm->color_adjust(entry, color, &adj_start, &adj_end); 435 mm->color_adjust(entry, color, &adj_start, &adj_end);
@@ -445,18 +453,18 @@ static struct drm_mm_node *drm_mm_search_free_generic(const struct drm_mm *mm,
445} 453}
446 454
447static struct drm_mm_node *drm_mm_search_free_in_range_generic(const struct drm_mm *mm, 455static struct drm_mm_node *drm_mm_search_free_in_range_generic(const struct drm_mm *mm,
448 unsigned long size, 456 u64 size,
449 unsigned alignment, 457 unsigned alignment,
450 unsigned long color, 458 unsigned long color,
451 unsigned long start, 459 u64 start,
452 unsigned long end, 460 u64 end,
453 enum drm_mm_search_flags flags) 461 enum drm_mm_search_flags flags)
454{ 462{
455 struct drm_mm_node *entry; 463 struct drm_mm_node *entry;
456 struct drm_mm_node *best; 464 struct drm_mm_node *best;
457 unsigned long adj_start; 465 u64 adj_start;
458 unsigned long adj_end; 466 u64 adj_end;
459 unsigned long best_size; 467 u64 best_size;
460 468
461 BUG_ON(mm->scanned_blocks); 469 BUG_ON(mm->scanned_blocks);
462 470
@@ -465,7 +473,7 @@ static struct drm_mm_node *drm_mm_search_free_in_range_generic(const struct drm_
465 473
466 __drm_mm_for_each_hole(entry, mm, adj_start, adj_end, 474 __drm_mm_for_each_hole(entry, mm, adj_start, adj_end,
467 flags & DRM_MM_SEARCH_BELOW) { 475 flags & DRM_MM_SEARCH_BELOW) {
468 unsigned long hole_size = adj_end - adj_start; 476 u64 hole_size = adj_end - adj_start;
469 477
470 if (adj_start < start) 478 if (adj_start < start)
471 adj_start = start; 479 adj_start = start;
@@ -561,7 +569,7 @@ EXPORT_SYMBOL(drm_mm_replace_node);
561 * adding/removing nodes to/from the scan list are allowed. 569 * adding/removing nodes to/from the scan list are allowed.
562 */ 570 */
563void drm_mm_init_scan(struct drm_mm *mm, 571void drm_mm_init_scan(struct drm_mm *mm,
564 unsigned long size, 572 u64 size,
565 unsigned alignment, 573 unsigned alignment,
566 unsigned long color) 574 unsigned long color)
567{ 575{
@@ -594,11 +602,11 @@ EXPORT_SYMBOL(drm_mm_init_scan);
594 * adding/removing nodes to/from the scan list are allowed. 602 * adding/removing nodes to/from the scan list are allowed.
595 */ 603 */
596void drm_mm_init_scan_with_range(struct drm_mm *mm, 604void drm_mm_init_scan_with_range(struct drm_mm *mm,
597 unsigned long size, 605 u64 size,
598 unsigned alignment, 606 unsigned alignment,
599 unsigned long color, 607 unsigned long color,
600 unsigned long start, 608 u64 start,
601 unsigned long end) 609 u64 end)
602{ 610{
603 mm->scan_color = color; 611 mm->scan_color = color;
604 mm->scan_alignment = alignment; 612 mm->scan_alignment = alignment;
@@ -627,8 +635,8 @@ bool drm_mm_scan_add_block(struct drm_mm_node *node)
627{ 635{
628 struct drm_mm *mm = node->mm; 636 struct drm_mm *mm = node->mm;
629 struct drm_mm_node *prev_node; 637 struct drm_mm_node *prev_node;
630 unsigned long hole_start, hole_end; 638 u64 hole_start, hole_end;
631 unsigned long adj_start, adj_end; 639 u64 adj_start, adj_end;
632 640
633 mm->scanned_blocks++; 641 mm->scanned_blocks++;
634 642
@@ -731,7 +739,7 @@ EXPORT_SYMBOL(drm_mm_clean);
731 * 739 *
732 * Note that @mm must be cleared to 0 before calling this function. 740 * Note that @mm must be cleared to 0 before calling this function.
733 */ 741 */
734void drm_mm_init(struct drm_mm * mm, unsigned long start, unsigned long size) 742void drm_mm_init(struct drm_mm * mm, u64 start, u64 size)
735{ 743{
736 INIT_LIST_HEAD(&mm->hole_stack); 744 INIT_LIST_HEAD(&mm->hole_stack);
737 mm->scanned_blocks = 0; 745 mm->scanned_blocks = 0;
@@ -766,18 +774,17 @@ void drm_mm_takedown(struct drm_mm * mm)
766} 774}
767EXPORT_SYMBOL(drm_mm_takedown); 775EXPORT_SYMBOL(drm_mm_takedown);
768 776
769static unsigned long drm_mm_debug_hole(struct drm_mm_node *entry, 777static u64 drm_mm_debug_hole(struct drm_mm_node *entry,
770 const char *prefix) 778 const char *prefix)
771{ 779{
772 unsigned long hole_start, hole_end, hole_size; 780 u64 hole_start, hole_end, hole_size;
773 781
774 if (entry->hole_follows) { 782 if (entry->hole_follows) {
775 hole_start = drm_mm_hole_node_start(entry); 783 hole_start = drm_mm_hole_node_start(entry);
776 hole_end = drm_mm_hole_node_end(entry); 784 hole_end = drm_mm_hole_node_end(entry);
777 hole_size = hole_end - hole_start; 785 hole_size = hole_end - hole_start;
778 printk(KERN_DEBUG "%s 0x%08lx-0x%08lx: %8lu: free\n", 786 pr_debug("%s %#llx-%#llx: %llu: free\n", prefix, hole_start,
779 prefix, hole_start, hole_end, 787 hole_end, hole_size);
780 hole_size);
781 return hole_size; 788 return hole_size;
782 } 789 }
783 790
@@ -792,35 +799,34 @@ static unsigned long drm_mm_debug_hole(struct drm_mm_node *entry,
792void drm_mm_debug_table(struct drm_mm *mm, const char *prefix) 799void drm_mm_debug_table(struct drm_mm *mm, const char *prefix)
793{ 800{
794 struct drm_mm_node *entry; 801 struct drm_mm_node *entry;
795 unsigned long total_used = 0, total_free = 0, total = 0; 802 u64 total_used = 0, total_free = 0, total = 0;
796 803
797 total_free += drm_mm_debug_hole(&mm->head_node, prefix); 804 total_free += drm_mm_debug_hole(&mm->head_node, prefix);
798 805
799 drm_mm_for_each_node(entry, mm) { 806 drm_mm_for_each_node(entry, mm) {
800 printk(KERN_DEBUG "%s 0x%08lx-0x%08lx: %8lu: used\n", 807 pr_debug("%s %#llx-%#llx: %llu: used\n", prefix, entry->start,
801 prefix, entry->start, entry->start + entry->size, 808 entry->start + entry->size, entry->size);
802 entry->size);
803 total_used += entry->size; 809 total_used += entry->size;
804 total_free += drm_mm_debug_hole(entry, prefix); 810 total_free += drm_mm_debug_hole(entry, prefix);
805 } 811 }
806 total = total_free + total_used; 812 total = total_free + total_used;
807 813
808 printk(KERN_DEBUG "%s total: %lu, used %lu free %lu\n", prefix, total, 814 pr_debug("%s total: %llu, used %llu free %llu\n", prefix, total,
809 total_used, total_free); 815 total_used, total_free);
810} 816}
811EXPORT_SYMBOL(drm_mm_debug_table); 817EXPORT_SYMBOL(drm_mm_debug_table);
812 818
813#if defined(CONFIG_DEBUG_FS) 819#if defined(CONFIG_DEBUG_FS)
814static unsigned long drm_mm_dump_hole(struct seq_file *m, struct drm_mm_node *entry) 820static u64 drm_mm_dump_hole(struct seq_file *m, struct drm_mm_node *entry)
815{ 821{
816 unsigned long hole_start, hole_end, hole_size; 822 u64 hole_start, hole_end, hole_size;
817 823
818 if (entry->hole_follows) { 824 if (entry->hole_follows) {
819 hole_start = drm_mm_hole_node_start(entry); 825 hole_start = drm_mm_hole_node_start(entry);
820 hole_end = drm_mm_hole_node_end(entry); 826 hole_end = drm_mm_hole_node_end(entry);
821 hole_size = hole_end - hole_start; 827 hole_size = hole_end - hole_start;
822 seq_printf(m, "0x%08lx-0x%08lx: 0x%08lx: free\n", 828 seq_printf(m, "%#llx-%#llx: %llu: free\n", hole_start,
823 hole_start, hole_end, hole_size); 829 hole_end, hole_size);
824 return hole_size; 830 return hole_size;
825 } 831 }
826 832
@@ -835,20 +841,20 @@ static unsigned long drm_mm_dump_hole(struct seq_file *m, struct drm_mm_node *en
835int drm_mm_dump_table(struct seq_file *m, struct drm_mm *mm) 841int drm_mm_dump_table(struct seq_file *m, struct drm_mm *mm)
836{ 842{
837 struct drm_mm_node *entry; 843 struct drm_mm_node *entry;
838 unsigned long total_used = 0, total_free = 0, total = 0; 844 u64 total_used = 0, total_free = 0, total = 0;
839 845
840 total_free += drm_mm_dump_hole(m, &mm->head_node); 846 total_free += drm_mm_dump_hole(m, &mm->head_node);
841 847
842 drm_mm_for_each_node(entry, mm) { 848 drm_mm_for_each_node(entry, mm) {
843 seq_printf(m, "0x%08lx-0x%08lx: 0x%08lx: used\n", 849 seq_printf(m, "%#016llx-%#016llx: %llu: used\n", entry->start,
844 entry->start, entry->start + entry->size, 850 entry->start + entry->size, entry->size);
845 entry->size);
846 total_used += entry->size; 851 total_used += entry->size;
847 total_free += drm_mm_dump_hole(m, entry); 852 total_free += drm_mm_dump_hole(m, entry);
848 } 853 }
849 total = total_free + total_used; 854 total = total_free + total_used;
850 855
851 seq_printf(m, "total: %lu, used %lu free %lu\n", total, total_used, total_free); 856 seq_printf(m, "total: %llu, used %llu free %llu\n", total,
857 total_used, total_free);
852 return 0; 858 return 0;
853} 859}
854EXPORT_SYMBOL(drm_mm_dump_table); 860EXPORT_SYMBOL(drm_mm_dump_table);
diff --git a/drivers/gpu/drm/exynos/Kconfig b/drivers/gpu/drm/exynos/Kconfig
index a5e74612100e..0a6780367d28 100644
--- a/drivers/gpu/drm/exynos/Kconfig
+++ b/drivers/gpu/drm/exynos/Kconfig
@@ -50,7 +50,7 @@ config DRM_EXYNOS_DSI
50 50
51config DRM_EXYNOS_DP 51config DRM_EXYNOS_DP
52 bool "EXYNOS DRM DP driver support" 52 bool "EXYNOS DRM DP driver support"
53 depends on (DRM_EXYNOS_FIMD || DRM_EXYNOS7DECON) && ARCH_EXYNOS && (DRM_PTN3460=n || DRM_PTN3460=y || DRM_PTN3460=DRM_EXYNOS) 53 depends on (DRM_EXYNOS_FIMD || DRM_EXYNOS7_DECON) && ARCH_EXYNOS && (DRM_PTN3460=n || DRM_PTN3460=y || DRM_PTN3460=DRM_EXYNOS)
54 default DRM_EXYNOS 54 default DRM_EXYNOS
55 select DRM_PANEL 55 select DRM_PANEL
56 help 56 help
diff --git a/drivers/gpu/drm/exynos/exynos7_drm_decon.c b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
index 63f02e2380ae..970046199608 100644
--- a/drivers/gpu/drm/exynos/exynos7_drm_decon.c
+++ b/drivers/gpu/drm/exynos/exynos7_drm_decon.c
@@ -888,8 +888,8 @@ static int decon_probe(struct platform_device *pdev)
888 of_node_put(i80_if_timings); 888 of_node_put(i80_if_timings);
889 889
890 ctx->regs = of_iomap(dev->of_node, 0); 890 ctx->regs = of_iomap(dev->of_node, 0);
891 if (IS_ERR(ctx->regs)) { 891 if (!ctx->regs) {
892 ret = PTR_ERR(ctx->regs); 892 ret = -ENOMEM;
893 goto err_del_component; 893 goto err_del_component;
894 } 894 }
895 895
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.c b/drivers/gpu/drm/exynos/exynos_drm_connector.c
deleted file mode 100644
index ba9b3d5ed672..000000000000
--- a/drivers/gpu/drm/exynos/exynos_drm_connector.c
+++ /dev/null
@@ -1,245 +0,0 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * Authors:
4 * Inki Dae <inki.dae@samsung.com>
5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Seung-Woo Kim <sw0312.kim@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <drm/drmP.h>
15#include <drm/drm_crtc_helper.h>
16
17#include <drm/exynos_drm.h>
18#include "exynos_drm_drv.h"
19#include "exynos_drm_encoder.h"
20#include "exynos_drm_connector.h"
21
22#define to_exynos_connector(x) container_of(x, struct exynos_drm_connector,\
23 drm_connector)
24
25struct exynos_drm_connector {
26 struct drm_connector drm_connector;
27 uint32_t encoder_id;
28 struct exynos_drm_display *display;
29};
30
31static int exynos_drm_connector_get_modes(struct drm_connector *connector)
32{
33 struct exynos_drm_connector *exynos_connector =
34 to_exynos_connector(connector);
35 struct exynos_drm_display *display = exynos_connector->display;
36 struct edid *edid = NULL;
37 unsigned int count = 0;
38 int ret;
39
40 /*
41 * if get_edid() exists then get_edid() callback of hdmi side
42 * is called to get edid data through i2c interface else
43 * get timing from the FIMD driver(display controller).
44 *
45 * P.S. in case of lcd panel, count is always 1 if success
46 * because lcd panel has only one mode.
47 */
48 if (display->ops->get_edid) {
49 edid = display->ops->get_edid(display, connector);
50 if (IS_ERR_OR_NULL(edid)) {
51 ret = PTR_ERR(edid);
52 edid = NULL;
53 DRM_ERROR("Panel operation get_edid failed %d\n", ret);
54 goto out;
55 }
56
57 count = drm_add_edid_modes(connector, edid);
58 if (!count) {
59 DRM_ERROR("Add edid modes failed %d\n", count);
60 goto out;
61 }
62
63 drm_mode_connector_update_edid_property(connector, edid);
64 } else {
65 struct exynos_drm_panel_info *panel;
66 struct drm_display_mode *mode = drm_mode_create(connector->dev);
67 if (!mode) {
68 DRM_ERROR("failed to create a new display mode.\n");
69 return 0;
70 }
71
72 if (display->ops->get_panel)
73 panel = display->ops->get_panel(display);
74 else {
75 drm_mode_destroy(connector->dev, mode);
76 return 0;
77 }
78
79 drm_display_mode_from_videomode(&panel->vm, mode);
80 mode->width_mm = panel->width_mm;
81 mode->height_mm = panel->height_mm;
82 connector->display_info.width_mm = mode->width_mm;
83 connector->display_info.height_mm = mode->height_mm;
84
85 mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
86 drm_mode_set_name(mode);
87 drm_mode_probed_add(connector, mode);
88
89 count = 1;
90 }
91
92out:
93 kfree(edid);
94 return count;
95}
96
97static int exynos_drm_connector_mode_valid(struct drm_connector *connector,
98 struct drm_display_mode *mode)
99{
100 struct exynos_drm_connector *exynos_connector =
101 to_exynos_connector(connector);
102 struct exynos_drm_display *display = exynos_connector->display;
103 int ret = MODE_BAD;
104
105 DRM_DEBUG_KMS("%s\n", __FILE__);
106
107 if (display->ops->check_mode)
108 if (!display->ops->check_mode(display, mode))
109 ret = MODE_OK;
110
111 return ret;
112}
113
114static struct drm_encoder *exynos_drm_best_encoder(
115 struct drm_connector *connector)
116{
117 struct drm_device *dev = connector->dev;
118 struct exynos_drm_connector *exynos_connector =
119 to_exynos_connector(connector);
120 return drm_encoder_find(dev, exynos_connector->encoder_id);
121}
122
123static struct drm_connector_helper_funcs exynos_connector_helper_funcs = {
124 .get_modes = exynos_drm_connector_get_modes,
125 .mode_valid = exynos_drm_connector_mode_valid,
126 .best_encoder = exynos_drm_best_encoder,
127};
128
129static int exynos_drm_connector_fill_modes(struct drm_connector *connector,
130 unsigned int max_width, unsigned int max_height)
131{
132 struct exynos_drm_connector *exynos_connector =
133 to_exynos_connector(connector);
134 struct exynos_drm_display *display = exynos_connector->display;
135 unsigned int width, height;
136
137 width = max_width;
138 height = max_height;
139
140 /*
141 * if specific driver want to find desired_mode using maxmum
142 * resolution then get max width and height from that driver.
143 */
144 if (display->ops->get_max_resol)
145 display->ops->get_max_resol(display, &width, &height);
146
147 return drm_helper_probe_single_connector_modes(connector, width,
148 height);
149}
150
151/* get detection status of display device. */
152static enum drm_connector_status
153exynos_drm_connector_detect(struct drm_connector *connector, bool force)
154{
155 struct exynos_drm_connector *exynos_connector =
156 to_exynos_connector(connector);
157 struct exynos_drm_display *display = exynos_connector->display;
158 enum drm_connector_status status = connector_status_disconnected;
159
160 if (display->ops->is_connected) {
161 if (display->ops->is_connected(display))
162 status = connector_status_connected;
163 else
164 status = connector_status_disconnected;
165 }
166
167 return status;
168}
169
170static void exynos_drm_connector_destroy(struct drm_connector *connector)
171{
172 struct exynos_drm_connector *exynos_connector =
173 to_exynos_connector(connector);
174
175 drm_connector_unregister(connector);
176 drm_connector_cleanup(connector);
177 kfree(exynos_connector);
178}
179
180static struct drm_connector_funcs exynos_connector_funcs = {
181 .dpms = drm_helper_connector_dpms,
182 .fill_modes = exynos_drm_connector_fill_modes,
183 .detect = exynos_drm_connector_detect,
184 .destroy = exynos_drm_connector_destroy,
185};
186
187struct drm_connector *exynos_drm_connector_create(struct drm_device *dev,
188 struct drm_encoder *encoder)
189{
190 struct exynos_drm_connector *exynos_connector;
191 struct exynos_drm_display *display = exynos_drm_get_display(encoder);
192 struct drm_connector *connector;
193 int type;
194 int err;
195
196 exynos_connector = kzalloc(sizeof(*exynos_connector), GFP_KERNEL);
197 if (!exynos_connector)
198 return NULL;
199
200 connector = &exynos_connector->drm_connector;
201
202 switch (display->type) {
203 case EXYNOS_DISPLAY_TYPE_HDMI:
204 type = DRM_MODE_CONNECTOR_HDMIA;
205 connector->interlace_allowed = true;
206 connector->polled = DRM_CONNECTOR_POLL_HPD;
207 break;
208 case EXYNOS_DISPLAY_TYPE_VIDI:
209 type = DRM_MODE_CONNECTOR_VIRTUAL;
210 connector->polled = DRM_CONNECTOR_POLL_HPD;
211 break;
212 default:
213 type = DRM_MODE_CONNECTOR_Unknown;
214 break;
215 }
216
217 drm_connector_init(dev, connector, &exynos_connector_funcs, type);
218 drm_connector_helper_add(connector, &exynos_connector_helper_funcs);
219
220 err = drm_connector_register(connector);
221 if (err)
222 goto err_connector;
223
224 exynos_connector->encoder_id = encoder->base.id;
225 exynos_connector->display = display;
226 connector->dpms = DRM_MODE_DPMS_OFF;
227 connector->encoder = encoder;
228
229 err = drm_mode_connector_attach_encoder(connector, encoder);
230 if (err) {
231 DRM_ERROR("failed to attach a connector to a encoder\n");
232 goto err_sysfs;
233 }
234
235 DRM_DEBUG_KMS("connector has been created\n");
236
237 return connector;
238
239err_sysfs:
240 drm_connector_unregister(connector);
241err_connector:
242 drm_connector_cleanup(connector);
243 kfree(exynos_connector);
244 return NULL;
245}
diff --git a/drivers/gpu/drm/exynos/exynos_drm_connector.h b/drivers/gpu/drm/exynos/exynos_drm_connector.h
deleted file mode 100644
index 4eb20d78379a..000000000000
--- a/drivers/gpu/drm/exynos/exynos_drm_connector.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
3 * Authors:
4 * Inki Dae <inki.dae@samsung.com>
5 * Joonyoung Shim <jy0922.shim@samsung.com>
6 * Seung-Woo Kim <sw0312.kim@samsung.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#ifndef _EXYNOS_DRM_CONNECTOR_H_
15#define _EXYNOS_DRM_CONNECTOR_H_
16
17struct drm_connector *exynos_drm_connector_create(struct drm_device *dev,
18 struct drm_encoder *encoder);
19
20#endif
diff --git a/drivers/gpu/drm/exynos/exynos_drm_fimd.c b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
index 925fc69af1a0..c300e22da8ac 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_fimd.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_fimd.c
@@ -284,14 +284,9 @@ static void fimd_clear_channel(struct fimd_context *ctx)
284 } 284 }
285} 285}
286 286
287static int fimd_ctx_initialize(struct fimd_context *ctx, 287static int fimd_iommu_attach_devices(struct fimd_context *ctx,
288 struct drm_device *drm_dev) 288 struct drm_device *drm_dev)
289{ 289{
290 struct exynos_drm_private *priv;
291 priv = drm_dev->dev_private;
292
293 ctx->drm_dev = drm_dev;
294 ctx->pipe = priv->pipe++;
295 290
296 /* attach this sub driver to iommu mapping if supported. */ 291 /* attach this sub driver to iommu mapping if supported. */
297 if (is_drm_iommu_supported(ctx->drm_dev)) { 292 if (is_drm_iommu_supported(ctx->drm_dev)) {
@@ -313,7 +308,7 @@ static int fimd_ctx_initialize(struct fimd_context *ctx,
313 return 0; 308 return 0;
314} 309}
315 310
316static void fimd_ctx_remove(struct fimd_context *ctx) 311static void fimd_iommu_detach_devices(struct fimd_context *ctx)
317{ 312{
318 /* detach this sub driver from iommu mapping if supported. */ 313 /* detach this sub driver from iommu mapping if supported. */
319 if (is_drm_iommu_supported(ctx->drm_dev)) 314 if (is_drm_iommu_supported(ctx->drm_dev))
@@ -1056,25 +1051,23 @@ static int fimd_bind(struct device *dev, struct device *master, void *data)
1056{ 1051{
1057 struct fimd_context *ctx = dev_get_drvdata(dev); 1052 struct fimd_context *ctx = dev_get_drvdata(dev);
1058 struct drm_device *drm_dev = data; 1053 struct drm_device *drm_dev = data;
1054 struct exynos_drm_private *priv = drm_dev->dev_private;
1059 int ret; 1055 int ret;
1060 1056
1061 ret = fimd_ctx_initialize(ctx, drm_dev); 1057 ctx->drm_dev = drm_dev;
1062 if (ret) { 1058 ctx->pipe = priv->pipe++;
1063 DRM_ERROR("fimd_ctx_initialize failed.\n");
1064 return ret;
1065 }
1066 1059
1067 ctx->crtc = exynos_drm_crtc_create(drm_dev, ctx->pipe, 1060 ctx->crtc = exynos_drm_crtc_create(drm_dev, ctx->pipe,
1068 EXYNOS_DISPLAY_TYPE_LCD, 1061 EXYNOS_DISPLAY_TYPE_LCD,
1069 &fimd_crtc_ops, ctx); 1062 &fimd_crtc_ops, ctx);
1070 if (IS_ERR(ctx->crtc)) {
1071 fimd_ctx_remove(ctx);
1072 return PTR_ERR(ctx->crtc);
1073 }
1074 1063
1075 if (ctx->display) 1064 if (ctx->display)
1076 exynos_drm_create_enc_conn(drm_dev, ctx->display); 1065 exynos_drm_create_enc_conn(drm_dev, ctx->display);
1077 1066
1067 ret = fimd_iommu_attach_devices(ctx, drm_dev);
1068 if (ret)
1069 return ret;
1070
1078 return 0; 1071 return 0;
1079 1072
1080} 1073}
@@ -1086,10 +1079,10 @@ static void fimd_unbind(struct device *dev, struct device *master,
1086 1079
1087 fimd_dpms(ctx->crtc, DRM_MODE_DPMS_OFF); 1080 fimd_dpms(ctx->crtc, DRM_MODE_DPMS_OFF);
1088 1081
1082 fimd_iommu_detach_devices(ctx);
1083
1089 if (ctx->display) 1084 if (ctx->display)
1090 exynos_dpi_remove(ctx->display); 1085 exynos_dpi_remove(ctx->display);
1091
1092 fimd_ctx_remove(ctx);
1093} 1086}
1094 1087
1095static const struct component_ops fimd_component_ops = { 1088static const struct component_ops fimd_component_ops = {
diff --git a/drivers/gpu/drm/exynos/exynos_drm_plane.c b/drivers/gpu/drm/exynos/exynos_drm_plane.c
index a5616872eee7..8ad5b7294eb4 100644
--- a/drivers/gpu/drm/exynos/exynos_drm_plane.c
+++ b/drivers/gpu/drm/exynos/exynos_drm_plane.c
@@ -175,7 +175,7 @@ static int exynos_disable_plane(struct drm_plane *plane)
175 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane); 175 struct exynos_drm_plane *exynos_plane = to_exynos_plane(plane);
176 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(plane->crtc); 176 struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(plane->crtc);
177 177
178 if (exynos_crtc->ops->win_disable) 178 if (exynos_crtc && exynos_crtc->ops->win_disable)
179 exynos_crtc->ops->win_disable(exynos_crtc, 179 exynos_crtc->ops->win_disable(exynos_crtc,
180 exynos_plane->zpos); 180 exynos_plane->zpos);
181 181
diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c
index 96e811fe24ca..e8b18e542da4 100644
--- a/drivers/gpu/drm/i915/i915_debugfs.c
+++ b/drivers/gpu/drm/i915/i915_debugfs.c
@@ -152,12 +152,12 @@ describe_obj(struct seq_file *m, struct drm_i915_gem_object *obj)
152 seq_puts(m, " (pp"); 152 seq_puts(m, " (pp");
153 else 153 else
154 seq_puts(m, " (g"); 154 seq_puts(m, " (g");
155 seq_printf(m, "gtt offset: %08lx, size: %08lx, type: %u)", 155 seq_printf(m, "gtt offset: %08llx, size: %08llx, type: %u)",
156 vma->node.start, vma->node.size, 156 vma->node.start, vma->node.size,
157 vma->ggtt_view.type); 157 vma->ggtt_view.type);
158 } 158 }
159 if (obj->stolen) 159 if (obj->stolen)
160 seq_printf(m, " (stolen: %08lx)", obj->stolen->start); 160 seq_printf(m, " (stolen: %08llx)", obj->stolen->start);
161 if (obj->pin_mappable || obj->fault_mappable) { 161 if (obj->pin_mappable || obj->fault_mappable) {
162 char s[3], *t = s; 162 char s[3], *t = s;
163 if (obj->pin_mappable) 163 if (obj->pin_mappable)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 8039cec71fc2..cc6ea53d2b81 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -622,7 +622,7 @@ static int i915_drm_suspend(struct drm_device *dev)
622 return 0; 622 return 0;
623} 623}
624 624
625static int i915_drm_suspend_late(struct drm_device *drm_dev) 625static int i915_drm_suspend_late(struct drm_device *drm_dev, bool hibernation)
626{ 626{
627 struct drm_i915_private *dev_priv = drm_dev->dev_private; 627 struct drm_i915_private *dev_priv = drm_dev->dev_private;
628 int ret; 628 int ret;
@@ -636,7 +636,17 @@ static int i915_drm_suspend_late(struct drm_device *drm_dev)
636 } 636 }
637 637
638 pci_disable_device(drm_dev->pdev); 638 pci_disable_device(drm_dev->pdev);
639 pci_set_power_state(drm_dev->pdev, PCI_D3hot); 639 /*
640 * During hibernation on some GEN4 platforms the BIOS may try to access
641 * the device even though it's already in D3 and hang the machine. So
642 * leave the device in D0 on those platforms and hope the BIOS will
643 * power down the device properly. Platforms where this was seen:
644 * Lenovo Thinkpad X301, X61s
645 */
646 if (!(hibernation &&
647 drm_dev->pdev->subsystem_vendor == PCI_VENDOR_ID_LENOVO &&
648 INTEL_INFO(dev_priv)->gen == 4))
649 pci_set_power_state(drm_dev->pdev, PCI_D3hot);
640 650
641 return 0; 651 return 0;
642} 652}
@@ -662,7 +672,7 @@ int i915_suspend_legacy(struct drm_device *dev, pm_message_t state)
662 if (error) 672 if (error)
663 return error; 673 return error;
664 674
665 return i915_drm_suspend_late(dev); 675 return i915_drm_suspend_late(dev, false);
666} 676}
667 677
668static int i915_drm_resume(struct drm_device *dev) 678static int i915_drm_resume(struct drm_device *dev)
@@ -950,7 +960,17 @@ static int i915_pm_suspend_late(struct device *dev)
950 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF) 960 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
951 return 0; 961 return 0;
952 962
953 return i915_drm_suspend_late(drm_dev); 963 return i915_drm_suspend_late(drm_dev, false);
964}
965
966static int i915_pm_poweroff_late(struct device *dev)
967{
968 struct drm_device *drm_dev = dev_to_i915(dev)->dev;
969
970 if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF)
971 return 0;
972
973 return i915_drm_suspend_late(drm_dev, true);
954} 974}
955 975
956static int i915_pm_resume_early(struct device *dev) 976static int i915_pm_resume_early(struct device *dev)
@@ -1520,7 +1540,7 @@ static const struct dev_pm_ops i915_pm_ops = {
1520 .thaw_early = i915_pm_resume_early, 1540 .thaw_early = i915_pm_resume_early,
1521 .thaw = i915_pm_resume, 1541 .thaw = i915_pm_resume,
1522 .poweroff = i915_pm_suspend, 1542 .poweroff = i915_pm_suspend,
1523 .poweroff_late = i915_pm_suspend_late, 1543 .poweroff_late = i915_pm_poweroff_late,
1524 .restore_early = i915_pm_resume_early, 1544 .restore_early = i915_pm_resume_early,
1525 .restore = i915_pm_resume, 1545 .restore = i915_pm_resume,
1526 1546
diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
index f2a825e39646..8727086cf48c 100644
--- a/drivers/gpu/drm/i915/i915_drv.h
+++ b/drivers/gpu/drm/i915/i915_drv.h
@@ -2114,6 +2114,9 @@ void i915_gem_track_fb(struct drm_i915_gem_object *old,
2114 * number comparisons on buffer last_read|write_seqno. It also allows an 2114 * number comparisons on buffer last_read|write_seqno. It also allows an
2115 * emission time to be associated with the request for tracking how far ahead 2115 * emission time to be associated with the request for tracking how far ahead
2116 * of the GPU the submission is. 2116 * of the GPU the submission is.
2117 *
2118 * The requests are reference counted, so upon creation they should have an
2119 * initial reference taken using kref_init
2117 */ 2120 */
2118struct drm_i915_gem_request { 2121struct drm_i915_gem_request {
2119 struct kref ref; 2122 struct kref ref;
@@ -2137,7 +2140,16 @@ struct drm_i915_gem_request {
2137 /** Position in the ringbuffer of the end of the whole request */ 2140 /** Position in the ringbuffer of the end of the whole request */
2138 u32 tail; 2141 u32 tail;
2139 2142
2140 /** Context related to this request */ 2143 /**
2144 * Context related to this request
2145 * Contexts are refcounted, so when this request is associated with a
2146 * context, we must increment the context's refcount, to guarantee that
2147 * it persists while any request is linked to it. Requests themselves
2148 * are also refcounted, so the request will only be freed when the last
2149 * reference to it is dismissed, and the code in
2150 * i915_gem_request_free() will then decrement the refcount on the
2151 * context.
2152 */
2141 struct intel_context *ctx; 2153 struct intel_context *ctx;
2142 2154
2143 /** Batch buffer related to this request if any */ 2155 /** Batch buffer related to this request if any */
@@ -2374,6 +2386,7 @@ struct drm_i915_cmd_table {
2374 (INTEL_DEVID(dev) & 0xFF00) == 0x0C00) 2386 (INTEL_DEVID(dev) & 0xFF00) == 0x0C00)
2375#define IS_BDW_ULT(dev) (IS_BROADWELL(dev) && \ 2387#define IS_BDW_ULT(dev) (IS_BROADWELL(dev) && \
2376 ((INTEL_DEVID(dev) & 0xf) == 0x6 || \ 2388 ((INTEL_DEVID(dev) & 0xf) == 0x6 || \
2389 (INTEL_DEVID(dev) & 0xf) == 0xb || \
2377 (INTEL_DEVID(dev) & 0xf) == 0xe)) 2390 (INTEL_DEVID(dev) & 0xf) == 0xe))
2378#define IS_BDW_GT3(dev) (IS_BROADWELL(dev) && \ 2391#define IS_BDW_GT3(dev) (IS_BROADWELL(dev) && \
2379 (INTEL_DEVID(dev) & 0x00F0) == 0x0020) 2392 (INTEL_DEVID(dev) & 0x00F0) == 0x0020)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index c26d36cc4b31..5b205863b659 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -2659,8 +2659,7 @@ static void i915_gem_reset_ring_cleanup(struct drm_i915_private *dev_priv,
2659 if (submit_req->ctx != ring->default_context) 2659 if (submit_req->ctx != ring->default_context)
2660 intel_lr_context_unpin(ring, submit_req->ctx); 2660 intel_lr_context_unpin(ring, submit_req->ctx);
2661 2661
2662 i915_gem_context_unreference(submit_req->ctx); 2662 i915_gem_request_unreference(submit_req);
2663 kfree(submit_req);
2664 } 2663 }
2665 2664
2666 /* 2665 /*
@@ -2937,9 +2936,9 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
2937 req = obj->last_read_req; 2936 req = obj->last_read_req;
2938 2937
2939 /* Do this after OLR check to make sure we make forward progress polling 2938 /* Do this after OLR check to make sure we make forward progress polling
2940 * on this IOCTL with a timeout <=0 (like busy ioctl) 2939 * on this IOCTL with a timeout == 0 (like busy ioctl)
2941 */ 2940 */
2942 if (args->timeout_ns <= 0) { 2941 if (args->timeout_ns == 0) {
2943 ret = -ETIME; 2942 ret = -ETIME;
2944 goto out; 2943 goto out;
2945 } 2944 }
@@ -2949,7 +2948,8 @@ i915_gem_wait_ioctl(struct drm_device *dev, void *data, struct drm_file *file)
2949 i915_gem_request_reference(req); 2948 i915_gem_request_reference(req);
2950 mutex_unlock(&dev->struct_mutex); 2949 mutex_unlock(&dev->struct_mutex);
2951 2950
2952 ret = __i915_wait_request(req, reset_counter, true, &args->timeout_ns, 2951 ret = __i915_wait_request(req, reset_counter, true,
2952 args->timeout_ns > 0 ? &args->timeout_ns : NULL,
2953 file->driver_priv); 2953 file->driver_priv);
2954 mutex_lock(&dev->struct_mutex); 2954 mutex_lock(&dev->struct_mutex);
2955 i915_gem_request_unreference(req); 2955 i915_gem_request_unreference(req);
@@ -4793,6 +4793,9 @@ i915_gem_init_hw(struct drm_device *dev)
4793 if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt()) 4793 if (INTEL_INFO(dev)->gen < 6 && !intel_enable_gtt())
4794 return -EIO; 4794 return -EIO;
4795 4795
4796 /* Double layer security blanket, see i915_gem_init() */
4797 intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
4798
4796 if (dev_priv->ellc_size) 4799 if (dev_priv->ellc_size)
4797 I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf)); 4800 I915_WRITE(HSW_IDICR, I915_READ(HSW_IDICR) | IDIHASHMSK(0xf));
4798 4801
@@ -4825,7 +4828,7 @@ i915_gem_init_hw(struct drm_device *dev)
4825 for_each_ring(ring, dev_priv, i) { 4828 for_each_ring(ring, dev_priv, i) {
4826 ret = ring->init_hw(ring); 4829 ret = ring->init_hw(ring);
4827 if (ret) 4830 if (ret)
4828 return ret; 4831 goto out;
4829 } 4832 }
4830 4833
4831 for (i = 0; i < NUM_L3_SLICES(dev); i++) 4834 for (i = 0; i < NUM_L3_SLICES(dev); i++)
@@ -4842,9 +4845,11 @@ i915_gem_init_hw(struct drm_device *dev)
4842 DRM_ERROR("Context enable failed %d\n", ret); 4845 DRM_ERROR("Context enable failed %d\n", ret);
4843 i915_gem_cleanup_ringbuffer(dev); 4846 i915_gem_cleanup_ringbuffer(dev);
4844 4847
4845 return ret; 4848 goto out;
4846 } 4849 }
4847 4850
4851out:
4852 intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
4848 return ret; 4853 return ret;
4849} 4854}
4850 4855
@@ -4878,6 +4883,14 @@ int i915_gem_init(struct drm_device *dev)
4878 dev_priv->gt.stop_ring = intel_logical_ring_stop; 4883 dev_priv->gt.stop_ring = intel_logical_ring_stop;
4879 } 4884 }
4880 4885
4886 /* This is just a security blanket to placate dragons.
4887 * On some systems, we very sporadically observe that the first TLBs
4888 * used by the CS may be stale, despite us poking the TLB reset. If
4889 * we hold the forcewake during initialisation these problems
4890 * just magically go away.
4891 */
4892 intel_uncore_forcewake_get(dev_priv, FORCEWAKE_ALL);
4893
4881 ret = i915_gem_init_userptr(dev); 4894 ret = i915_gem_init_userptr(dev);
4882 if (ret) 4895 if (ret)
4883 goto out_unlock; 4896 goto out_unlock;
@@ -4904,6 +4917,7 @@ int i915_gem_init(struct drm_device *dev)
4904 } 4917 }
4905 4918
4906out_unlock: 4919out_unlock:
4920 intel_uncore_forcewake_put(dev_priv, FORCEWAKE_ALL);
4907 mutex_unlock(&dev->struct_mutex); 4921 mutex_unlock(&dev->struct_mutex);
4908 4922
4909 return ret; 4923 return ret;
diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index 746f77fb57a3..dccdc8aad2e2 100644
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -1145,7 +1145,7 @@ static int gen6_ppgtt_init(struct i915_hw_ppgtt *ppgtt)
1145 1145
1146 ppgtt->base.clear_range(&ppgtt->base, 0, ppgtt->base.total, true); 1146 ppgtt->base.clear_range(&ppgtt->base, 0, ppgtt->base.total, true);
1147 1147
1148 DRM_DEBUG_DRIVER("Allocated pde space (%ldM) at GTT entry: %lx\n", 1148 DRM_DEBUG_DRIVER("Allocated pde space (%lldM) at GTT entry: %llx\n",
1149 ppgtt->node.size >> 20, 1149 ppgtt->node.size >> 20,
1150 ppgtt->node.start / PAGE_SIZE); 1150 ppgtt->node.start / PAGE_SIZE);
1151 1151
@@ -1713,8 +1713,8 @@ void i915_gem_gtt_finish_object(struct drm_i915_gem_object *obj)
1713 1713
1714static void i915_gtt_color_adjust(struct drm_mm_node *node, 1714static void i915_gtt_color_adjust(struct drm_mm_node *node,
1715 unsigned long color, 1715 unsigned long color,
1716 unsigned long *start, 1716 u64 *start,
1717 unsigned long *end) 1717 u64 *end)
1718{ 1718{
1719 if (node->color != color) 1719 if (node->color != color)
1720 *start += 4096; 1720 *start += 4096;
diff --git a/drivers/gpu/drm/i915/i915_gem_stolen.c b/drivers/gpu/drm/i915/i915_gem_stolen.c
index a2045848bd1a..9c6f93ec886b 100644
--- a/drivers/gpu/drm/i915/i915_gem_stolen.c
+++ b/drivers/gpu/drm/i915/i915_gem_stolen.c
@@ -485,10 +485,8 @@ i915_gem_object_create_stolen_for_preallocated(struct drm_device *dev,
485 stolen_offset, gtt_offset, size); 485 stolen_offset, gtt_offset, size);
486 486
487 /* KISS and expect everything to be page-aligned */ 487 /* KISS and expect everything to be page-aligned */
488 BUG_ON(stolen_offset & 4095); 488 if (WARN_ON(size == 0) || WARN_ON(size & 4095) ||
489 BUG_ON(size & 4095); 489 WARN_ON(stolen_offset & 4095))
490
491 if (WARN_ON(size == 0))
492 return NULL; 490 return NULL;
493 491
494 stolen = kzalloc(sizeof(*stolen), GFP_KERNEL); 492 stolen = kzalloc(sizeof(*stolen), GFP_KERNEL);
diff --git a/drivers/gpu/drm/i915/i915_gem_tiling.c b/drivers/gpu/drm/i915/i915_gem_tiling.c
index 7a24bd1a51f6..6377b22269ad 100644
--- a/drivers/gpu/drm/i915/i915_gem_tiling.c
+++ b/drivers/gpu/drm/i915/i915_gem_tiling.c
@@ -335,9 +335,10 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
335 return -EINVAL; 335 return -EINVAL;
336 } 336 }
337 337
338 mutex_lock(&dev->struct_mutex);
338 if (i915_gem_obj_is_pinned(obj) || obj->framebuffer_references) { 339 if (i915_gem_obj_is_pinned(obj) || obj->framebuffer_references) {
339 drm_gem_object_unreference_unlocked(&obj->base); 340 ret = -EBUSY;
340 return -EBUSY; 341 goto err;
341 } 342 }
342 343
343 if (args->tiling_mode == I915_TILING_NONE) { 344 if (args->tiling_mode == I915_TILING_NONE) {
@@ -369,7 +370,6 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
369 } 370 }
370 } 371 }
371 372
372 mutex_lock(&dev->struct_mutex);
373 if (args->tiling_mode != obj->tiling_mode || 373 if (args->tiling_mode != obj->tiling_mode ||
374 args->stride != obj->stride) { 374 args->stride != obj->stride) {
375 /* We need to rebind the object if its current allocation 375 /* We need to rebind the object if its current allocation
@@ -424,6 +424,7 @@ i915_gem_set_tiling(struct drm_device *dev, void *data,
424 obj->bit_17 = NULL; 424 obj->bit_17 = NULL;
425 } 425 }
426 426
427err:
427 drm_gem_object_unreference(&obj->base); 428 drm_gem_object_unreference(&obj->base);
428 mutex_unlock(&dev->struct_mutex); 429 mutex_unlock(&dev->struct_mutex);
429 430
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c
index 4145d95902f5..ede5bbbd8a08 100644
--- a/drivers/gpu/drm/i915/i915_irq.c
+++ b/drivers/gpu/drm/i915/i915_irq.c
@@ -1892,6 +1892,9 @@ static irqreturn_t valleyview_irq_handler(int irq, void *arg)
1892 u32 iir, gt_iir, pm_iir; 1892 u32 iir, gt_iir, pm_iir;
1893 irqreturn_t ret = IRQ_NONE; 1893 irqreturn_t ret = IRQ_NONE;
1894 1894
1895 if (!intel_irqs_enabled(dev_priv))
1896 return IRQ_NONE;
1897
1895 while (true) { 1898 while (true) {
1896 /* Find, clear, then process each source of interrupt */ 1899 /* Find, clear, then process each source of interrupt */
1897 1900
@@ -1936,6 +1939,9 @@ static irqreturn_t cherryview_irq_handler(int irq, void *arg)
1936 u32 master_ctl, iir; 1939 u32 master_ctl, iir;
1937 irqreturn_t ret = IRQ_NONE; 1940 irqreturn_t ret = IRQ_NONE;
1938 1941
1942 if (!intel_irqs_enabled(dev_priv))
1943 return IRQ_NONE;
1944
1939 for (;;) { 1945 for (;;) {
1940 master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL; 1946 master_ctl = I915_READ(GEN8_MASTER_IRQ) & ~GEN8_MASTER_IRQ_CONTROL;
1941 iir = I915_READ(VLV_IIR); 1947 iir = I915_READ(VLV_IIR);
@@ -2208,6 +2214,9 @@ static irqreturn_t ironlake_irq_handler(int irq, void *arg)
2208 u32 de_iir, gt_iir, de_ier, sde_ier = 0; 2214 u32 de_iir, gt_iir, de_ier, sde_ier = 0;
2209 irqreturn_t ret = IRQ_NONE; 2215 irqreturn_t ret = IRQ_NONE;
2210 2216
2217 if (!intel_irqs_enabled(dev_priv))
2218 return IRQ_NONE;
2219
2211 /* We get interrupts on unclaimed registers, so check for this before we 2220 /* We get interrupts on unclaimed registers, so check for this before we
2212 * do any I915_{READ,WRITE}. */ 2221 * do any I915_{READ,WRITE}. */
2213 intel_uncore_check_errors(dev); 2222 intel_uncore_check_errors(dev);
@@ -2279,6 +2288,9 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg)
2279 enum pipe pipe; 2288 enum pipe pipe;
2280 u32 aux_mask = GEN8_AUX_CHANNEL_A; 2289 u32 aux_mask = GEN8_AUX_CHANNEL_A;
2281 2290
2291 if (!intel_irqs_enabled(dev_priv))
2292 return IRQ_NONE;
2293
2282 if (IS_GEN9(dev)) 2294 if (IS_GEN9(dev))
2283 aux_mask |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C | 2295 aux_mask |= GEN9_AUX_CHANNEL_B | GEN9_AUX_CHANNEL_C |
2284 GEN9_AUX_CHANNEL_D; 2296 GEN9_AUX_CHANNEL_D;
@@ -3771,6 +3783,9 @@ static irqreturn_t i8xx_irq_handler(int irq, void *arg)
3771 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT | 3783 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
3772 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT; 3784 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;
3773 3785
3786 if (!intel_irqs_enabled(dev_priv))
3787 return IRQ_NONE;
3788
3774 iir = I915_READ16(IIR); 3789 iir = I915_READ16(IIR);
3775 if (iir == 0) 3790 if (iir == 0)
3776 return IRQ_NONE; 3791 return IRQ_NONE;
@@ -3951,6 +3966,9 @@ static irqreturn_t i915_irq_handler(int irq, void *arg)
3951 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT; 3966 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;
3952 int pipe, ret = IRQ_NONE; 3967 int pipe, ret = IRQ_NONE;
3953 3968
3969 if (!intel_irqs_enabled(dev_priv))
3970 return IRQ_NONE;
3971
3954 iir = I915_READ(IIR); 3972 iir = I915_READ(IIR);
3955 do { 3973 do {
3956 bool irq_received = (iir & ~flip_mask) != 0; 3974 bool irq_received = (iir & ~flip_mask) != 0;
@@ -4171,6 +4189,9 @@ static irqreturn_t i965_irq_handler(int irq, void *arg)
4171 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT | 4189 I915_DISPLAY_PLANE_A_FLIP_PENDING_INTERRUPT |
4172 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT; 4190 I915_DISPLAY_PLANE_B_FLIP_PENDING_INTERRUPT;
4173 4191
4192 if (!intel_irqs_enabled(dev_priv))
4193 return IRQ_NONE;
4194
4174 iir = I915_READ(IIR); 4195 iir = I915_READ(IIR);
4175 4196
4176 for (;;) { 4197 for (;;) {
@@ -4520,6 +4541,7 @@ void intel_runtime_pm_disable_interrupts(struct drm_i915_private *dev_priv)
4520{ 4541{
4521 dev_priv->dev->driver->irq_uninstall(dev_priv->dev); 4542 dev_priv->dev->driver->irq_uninstall(dev_priv->dev);
4522 dev_priv->pm.irqs_enabled = false; 4543 dev_priv->pm.irqs_enabled = false;
4544 synchronize_irq(dev_priv->dev->irq);
4523} 4545}
4524 4546
4525/** 4547/**
diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
index 3d220a67f865..6d22128d97b1 100644
--- a/drivers/gpu/drm/i915/intel_display.c
+++ b/drivers/gpu/drm/i915/intel_display.c
@@ -37,6 +37,7 @@
37#include <drm/i915_drm.h> 37#include <drm/i915_drm.h>
38#include "i915_drv.h" 38#include "i915_drv.h"
39#include "i915_trace.h" 39#include "i915_trace.h"
40#include <drm/drm_atomic.h>
40#include <drm/drm_atomic_helper.h> 41#include <drm/drm_atomic_helper.h>
41#include <drm/drm_dp_helper.h> 42#include <drm/drm_dp_helper.h>
42#include <drm/drm_crtc_helper.h> 43#include <drm/drm_crtc_helper.h>
@@ -2371,13 +2372,19 @@ intel_alloc_plane_obj(struct intel_crtc *crtc,
2371 struct drm_device *dev = crtc->base.dev; 2372 struct drm_device *dev = crtc->base.dev;
2372 struct drm_i915_gem_object *obj = NULL; 2373 struct drm_i915_gem_object *obj = NULL;
2373 struct drm_mode_fb_cmd2 mode_cmd = { 0 }; 2374 struct drm_mode_fb_cmd2 mode_cmd = { 0 };
2374 u32 base = plane_config->base; 2375 u32 base_aligned = round_down(plane_config->base, PAGE_SIZE);
2376 u32 size_aligned = round_up(plane_config->base + plane_config->size,
2377 PAGE_SIZE);
2378
2379 size_aligned -= base_aligned;
2375 2380
2376 if (plane_config->size == 0) 2381 if (plane_config->size == 0)
2377 return false; 2382 return false;
2378 2383
2379 obj = i915_gem_object_create_stolen_for_preallocated(dev, base, base, 2384 obj = i915_gem_object_create_stolen_for_preallocated(dev,
2380 plane_config->size); 2385 base_aligned,
2386 base_aligned,
2387 size_aligned);
2381 if (!obj) 2388 if (!obj)
2382 return false; 2389 return false;
2383 2390
@@ -2410,6 +2417,14 @@ out_unref_obj:
2410 return false; 2417 return false;
2411} 2418}
2412 2419
2420/* Update plane->state->fb to match plane->fb after driver-internal updates */
2421static void
2422update_state_fb(struct drm_plane *plane)
2423{
2424 if (plane->fb != plane->state->fb)
2425 drm_atomic_set_fb_for_plane(plane->state, plane->fb);
2426}
2427
2413static void 2428static void
2414intel_find_plane_obj(struct intel_crtc *intel_crtc, 2429intel_find_plane_obj(struct intel_crtc *intel_crtc,
2415 struct intel_initial_plane_config *plane_config) 2430 struct intel_initial_plane_config *plane_config)
@@ -2456,6 +2471,8 @@ intel_find_plane_obj(struct intel_crtc *intel_crtc,
2456 break; 2471 break;
2457 } 2472 }
2458 } 2473 }
2474
2475 update_state_fb(intel_crtc->base.primary);
2459} 2476}
2460 2477
2461static void i9xx_update_primary_plane(struct drm_crtc *crtc, 2478static void i9xx_update_primary_plane(struct drm_crtc *crtc,
@@ -2725,10 +2742,19 @@ static void skylake_update_primary_plane(struct drm_crtc *crtc,
2725 case DRM_FORMAT_XRGB8888: 2742 case DRM_FORMAT_XRGB8888:
2726 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888; 2743 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
2727 break; 2744 break;
2745 case DRM_FORMAT_ARGB8888:
2746 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
2747 plane_ctl |= PLANE_CTL_ALPHA_SW_PREMULTIPLY;
2748 break;
2728 case DRM_FORMAT_XBGR8888: 2749 case DRM_FORMAT_XBGR8888:
2729 plane_ctl |= PLANE_CTL_ORDER_RGBX; 2750 plane_ctl |= PLANE_CTL_ORDER_RGBX;
2730 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888; 2751 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
2731 break; 2752 break;
2753 case DRM_FORMAT_ABGR8888:
2754 plane_ctl |= PLANE_CTL_ORDER_RGBX;
2755 plane_ctl |= PLANE_CTL_FORMAT_XRGB_8888;
2756 plane_ctl |= PLANE_CTL_ALPHA_SW_PREMULTIPLY;
2757 break;
2732 case DRM_FORMAT_XRGB2101010: 2758 case DRM_FORMAT_XRGB2101010:
2733 plane_ctl |= PLANE_CTL_FORMAT_XRGB_2101010; 2759 plane_ctl |= PLANE_CTL_FORMAT_XRGB_2101010;
2734 break; 2760 break;
@@ -6587,6 +6613,10 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
6587 struct drm_framebuffer *fb; 6613 struct drm_framebuffer *fb;
6588 struct intel_framebuffer *intel_fb; 6614 struct intel_framebuffer *intel_fb;
6589 6615
6616 val = I915_READ(DSPCNTR(plane));
6617 if (!(val & DISPLAY_PLANE_ENABLE))
6618 return;
6619
6590 intel_fb = kzalloc(sizeof(*intel_fb), GFP_KERNEL); 6620 intel_fb = kzalloc(sizeof(*intel_fb), GFP_KERNEL);
6591 if (!intel_fb) { 6621 if (!intel_fb) {
6592 DRM_DEBUG_KMS("failed to alloc fb\n"); 6622 DRM_DEBUG_KMS("failed to alloc fb\n");
@@ -6595,8 +6625,6 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
6595 6625
6596 fb = &intel_fb->base; 6626 fb = &intel_fb->base;
6597 6627
6598 val = I915_READ(DSPCNTR(plane));
6599
6600 if (INTEL_INFO(dev)->gen >= 4) 6628 if (INTEL_INFO(dev)->gen >= 4)
6601 if (val & DISPPLANE_TILED) 6629 if (val & DISPPLANE_TILED)
6602 plane_config->tiling = I915_TILING_X; 6630 plane_config->tiling = I915_TILING_X;
@@ -6627,7 +6655,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
6627 aligned_height = intel_fb_align_height(dev, fb->height, 6655 aligned_height = intel_fb_align_height(dev, fb->height,
6628 plane_config->tiling); 6656 plane_config->tiling);
6629 6657
6630 plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height); 6658 plane_config->size = fb->pitches[0] * aligned_height;
6631 6659
6632 DRM_DEBUG_KMS("pipe/plane %c/%d with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", 6660 DRM_DEBUG_KMS("pipe/plane %c/%d with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
6633 pipe_name(pipe), plane, fb->width, fb->height, 6661 pipe_name(pipe), plane, fb->width, fb->height,
@@ -6635,6 +6663,7 @@ i9xx_get_initial_plane_config(struct intel_crtc *crtc,
6635 plane_config->size); 6663 plane_config->size);
6636 6664
6637 crtc->base.primary->fb = fb; 6665 crtc->base.primary->fb = fb;
6666 update_state_fb(crtc->base.primary);
6638} 6667}
6639 6668
6640static void chv_crtc_clock_get(struct intel_crtc *crtc, 6669static void chv_crtc_clock_get(struct intel_crtc *crtc,
@@ -7628,6 +7657,9 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
7628 fb = &intel_fb->base; 7657 fb = &intel_fb->base;
7629 7658
7630 val = I915_READ(PLANE_CTL(pipe, 0)); 7659 val = I915_READ(PLANE_CTL(pipe, 0));
7660 if (!(val & PLANE_CTL_ENABLE))
7661 goto error;
7662
7631 if (val & PLANE_CTL_TILED_MASK) 7663 if (val & PLANE_CTL_TILED_MASK)
7632 plane_config->tiling = I915_TILING_X; 7664 plane_config->tiling = I915_TILING_X;
7633 7665
@@ -7664,7 +7696,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
7664 aligned_height = intel_fb_align_height(dev, fb->height, 7696 aligned_height = intel_fb_align_height(dev, fb->height,
7665 plane_config->tiling); 7697 plane_config->tiling);
7666 7698
7667 plane_config->size = ALIGN(fb->pitches[0] * aligned_height, PAGE_SIZE); 7699 plane_config->size = fb->pitches[0] * aligned_height;
7668 7700
7669 DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", 7701 DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
7670 pipe_name(pipe), fb->width, fb->height, 7702 pipe_name(pipe), fb->width, fb->height,
@@ -7672,6 +7704,7 @@ skylake_get_initial_plane_config(struct intel_crtc *crtc,
7672 plane_config->size); 7704 plane_config->size);
7673 7705
7674 crtc->base.primary->fb = fb; 7706 crtc->base.primary->fb = fb;
7707 update_state_fb(crtc->base.primary);
7675 return; 7708 return;
7676 7709
7677error: 7710error:
@@ -7715,6 +7748,10 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
7715 struct drm_framebuffer *fb; 7748 struct drm_framebuffer *fb;
7716 struct intel_framebuffer *intel_fb; 7749 struct intel_framebuffer *intel_fb;
7717 7750
7751 val = I915_READ(DSPCNTR(pipe));
7752 if (!(val & DISPLAY_PLANE_ENABLE))
7753 return;
7754
7718 intel_fb = kzalloc(sizeof(*intel_fb), GFP_KERNEL); 7755 intel_fb = kzalloc(sizeof(*intel_fb), GFP_KERNEL);
7719 if (!intel_fb) { 7756 if (!intel_fb) {
7720 DRM_DEBUG_KMS("failed to alloc fb\n"); 7757 DRM_DEBUG_KMS("failed to alloc fb\n");
@@ -7723,8 +7760,6 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
7723 7760
7724 fb = &intel_fb->base; 7761 fb = &intel_fb->base;
7725 7762
7726 val = I915_READ(DSPCNTR(pipe));
7727
7728 if (INTEL_INFO(dev)->gen >= 4) 7763 if (INTEL_INFO(dev)->gen >= 4)
7729 if (val & DISPPLANE_TILED) 7764 if (val & DISPPLANE_TILED)
7730 plane_config->tiling = I915_TILING_X; 7765 plane_config->tiling = I915_TILING_X;
@@ -7755,7 +7790,7 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
7755 aligned_height = intel_fb_align_height(dev, fb->height, 7790 aligned_height = intel_fb_align_height(dev, fb->height,
7756 plane_config->tiling); 7791 plane_config->tiling);
7757 7792
7758 plane_config->size = PAGE_ALIGN(fb->pitches[0] * aligned_height); 7793 plane_config->size = fb->pitches[0] * aligned_height;
7759 7794
7760 DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n", 7795 DRM_DEBUG_KMS("pipe %c with fb: size=%dx%d@%d, offset=%x, pitch %d, size 0x%x\n",
7761 pipe_name(pipe), fb->width, fb->height, 7796 pipe_name(pipe), fb->width, fb->height,
@@ -7763,6 +7798,7 @@ ironlake_get_initial_plane_config(struct intel_crtc *crtc,
7763 plane_config->size); 7798 plane_config->size);
7764 7799
7765 crtc->base.primary->fb = fb; 7800 crtc->base.primary->fb = fb;
7801 update_state_fb(crtc->base.primary);
7766} 7802}
7767 7803
7768static bool ironlake_get_pipe_config(struct intel_crtc *crtc, 7804static bool ironlake_get_pipe_config(struct intel_crtc *crtc,
@@ -8698,6 +8734,7 @@ retry:
8698 old->release_fb->funcs->destroy(old->release_fb); 8734 old->release_fb->funcs->destroy(old->release_fb);
8699 goto fail; 8735 goto fail;
8700 } 8736 }
8737 crtc->primary->crtc = crtc;
8701 8738
8702 /* let the connector get through one full cycle before testing */ 8739 /* let the connector get through one full cycle before testing */
8703 intel_wait_for_vblank(dev, intel_crtc->pipe); 8740 intel_wait_for_vblank(dev, intel_crtc->pipe);
@@ -9700,7 +9737,7 @@ void intel_check_page_flip(struct drm_device *dev, int pipe)
9700 struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe]; 9737 struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
9701 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); 9738 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
9702 9739
9703 WARN_ON(!in_irq()); 9740 WARN_ON(!in_interrupt());
9704 9741
9705 if (crtc == NULL) 9742 if (crtc == NULL)
9706 return; 9743 return;
@@ -9800,6 +9837,7 @@ static int intel_crtc_page_flip(struct drm_crtc *crtc,
9800 drm_gem_object_reference(&obj->base); 9837 drm_gem_object_reference(&obj->base);
9801 9838
9802 crtc->primary->fb = fb; 9839 crtc->primary->fb = fb;
9840 update_state_fb(crtc->primary);
9803 9841
9804 work->pending_flip_obj = obj; 9842 work->pending_flip_obj = obj;
9805 9843
@@ -9868,6 +9906,7 @@ cleanup_unpin:
9868cleanup_pending: 9906cleanup_pending:
9869 atomic_dec(&intel_crtc->unpin_work_count); 9907 atomic_dec(&intel_crtc->unpin_work_count);
9870 crtc->primary->fb = old_fb; 9908 crtc->primary->fb = old_fb;
9909 update_state_fb(crtc->primary);
9871 drm_gem_object_unreference(&work->old_fb_obj->base); 9910 drm_gem_object_unreference(&work->old_fb_obj->base);
9872 drm_gem_object_unreference(&obj->base); 9911 drm_gem_object_unreference(&obj->base);
9873 mutex_unlock(&dev->struct_mutex); 9912 mutex_unlock(&dev->struct_mutex);
@@ -12182,9 +12221,6 @@ intel_check_cursor_plane(struct drm_plane *plane,
12182 return -ENOMEM; 12221 return -ENOMEM;
12183 } 12222 }
12184 12223
12185 if (fb == crtc->cursor->fb)
12186 return 0;
12187
12188 /* we only need to pin inside GTT if cursor is non-phy */ 12224 /* we only need to pin inside GTT if cursor is non-phy */
12189 mutex_lock(&dev->struct_mutex); 12225 mutex_lock(&dev->struct_mutex);
12190 if (!INTEL_INFO(dev)->cursor_needs_physical && obj->tiling_mode) { 12226 if (!INTEL_INFO(dev)->cursor_needs_physical && obj->tiling_mode) {
@@ -13096,6 +13132,9 @@ static struct intel_quirk intel_quirks[] = {
13096 13132
13097 /* HP Chromebook 14 (Celeron 2955U) */ 13133 /* HP Chromebook 14 (Celeron 2955U) */
13098 { 0x0a06, 0x103c, 0x21ed, quirk_backlight_present }, 13134 { 0x0a06, 0x103c, 0x21ed, quirk_backlight_present },
13135
13136 /* Dell Chromebook 11 */
13137 { 0x0a06, 0x1028, 0x0a35, quirk_backlight_present },
13099}; 13138};
13100 13139
13101static void intel_init_quirks(struct drm_device *dev) 13140static void intel_init_quirks(struct drm_device *dev)
@@ -13702,6 +13741,7 @@ void intel_modeset_gem_init(struct drm_device *dev)
13702 to_intel_crtc(c)->pipe); 13741 to_intel_crtc(c)->pipe);
13703 drm_framebuffer_unreference(c->primary->fb); 13742 drm_framebuffer_unreference(c->primary->fb);
13704 c->primary->fb = NULL; 13743 c->primary->fb = NULL;
13744 update_state_fb(c->primary);
13705 } 13745 }
13706 } 13746 }
13707 mutex_unlock(&dev->struct_mutex); 13747 mutex_unlock(&dev->struct_mutex);
diff --git a/drivers/gpu/drm/i915/intel_fifo_underrun.c b/drivers/gpu/drm/i915/intel_fifo_underrun.c
index 04e248dd2259..54daa66c6970 100644
--- a/drivers/gpu/drm/i915/intel_fifo_underrun.c
+++ b/drivers/gpu/drm/i915/intel_fifo_underrun.c
@@ -282,16 +282,6 @@ bool intel_set_cpu_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
282 return ret; 282 return ret;
283} 283}
284 284
285static bool
286__cpu_fifo_underrun_reporting_enabled(struct drm_i915_private *dev_priv,
287 enum pipe pipe)
288{
289 struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
290 struct intel_crtc *intel_crtc = to_intel_crtc(crtc);
291
292 return !intel_crtc->cpu_fifo_underrun_disabled;
293}
294
295/** 285/**
296 * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state 286 * intel_set_pch_fifo_underrun_reporting - set PCH fifo underrun reporting state
297 * @dev_priv: i915 device instance 287 * @dev_priv: i915 device instance
@@ -352,9 +342,15 @@ bool intel_set_pch_fifo_underrun_reporting(struct drm_i915_private *dev_priv,
352void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv, 342void intel_cpu_fifo_underrun_irq_handler(struct drm_i915_private *dev_priv,
353 enum pipe pipe) 343 enum pipe pipe)
354{ 344{
345 struct drm_crtc *crtc = dev_priv->pipe_to_crtc_mapping[pipe];
346
347 /* We may be called too early in init, thanks BIOS! */
348 if (crtc == NULL)
349 return;
350
355 /* GMCH can't disable fifo underruns, filter them. */ 351 /* GMCH can't disable fifo underruns, filter them. */
356 if (HAS_GMCH_DISPLAY(dev_priv->dev) && 352 if (HAS_GMCH_DISPLAY(dev_priv->dev) &&
357 !__cpu_fifo_underrun_reporting_enabled(dev_priv, pipe)) 353 to_intel_crtc(crtc)->cpu_fifo_underrun_disabled)
358 return; 354 return;
359 355
360 if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false)) 356 if (intel_set_cpu_fifo_underrun_reporting(dev_priv, pipe, false))
diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c
index 0f358c5999ec..e8d3da9f3373 100644
--- a/drivers/gpu/drm/i915/intel_lrc.c
+++ b/drivers/gpu/drm/i915/intel_lrc.c
@@ -503,18 +503,19 @@ static int execlists_context_queue(struct intel_engine_cs *ring,
503 * If there isn't a request associated with this submission, 503 * If there isn't a request associated with this submission,
504 * create one as a temporary holder. 504 * create one as a temporary holder.
505 */ 505 */
506 WARN(1, "execlist context submission without request");
507 request = kzalloc(sizeof(*request), GFP_KERNEL); 506 request = kzalloc(sizeof(*request), GFP_KERNEL);
508 if (request == NULL) 507 if (request == NULL)
509 return -ENOMEM; 508 return -ENOMEM;
510 request->ring = ring; 509 request->ring = ring;
511 request->ctx = to; 510 request->ctx = to;
511 kref_init(&request->ref);
512 request->uniq = dev_priv->request_uniq++;
513 i915_gem_context_reference(request->ctx);
512 } else { 514 } else {
515 i915_gem_request_reference(request);
513 WARN_ON(to != request->ctx); 516 WARN_ON(to != request->ctx);
514 } 517 }
515 request->tail = tail; 518 request->tail = tail;
516 i915_gem_request_reference(request);
517 i915_gem_context_reference(request->ctx);
518 519
519 intel_runtime_pm_get(dev_priv); 520 intel_runtime_pm_get(dev_priv);
520 521
@@ -731,7 +732,6 @@ void intel_execlists_retire_requests(struct intel_engine_cs *ring)
731 if (ctx_obj && (ctx != ring->default_context)) 732 if (ctx_obj && (ctx != ring->default_context))
732 intel_lr_context_unpin(ring, ctx); 733 intel_lr_context_unpin(ring, ctx);
733 intel_runtime_pm_put(dev_priv); 734 intel_runtime_pm_put(dev_priv);
734 i915_gem_context_unreference(ctx);
735 list_del(&req->execlist_link); 735 list_del(&req->execlist_link);
736 i915_gem_request_unreference(req); 736 i915_gem_request_unreference(req);
737 } 737 }
diff --git a/drivers/gpu/drm/i915/intel_uncore.c b/drivers/gpu/drm/i915/intel_uncore.c
index c47a3baa53d5..4e8fb891d4ea 100644
--- a/drivers/gpu/drm/i915/intel_uncore.c
+++ b/drivers/gpu/drm/i915/intel_uncore.c
@@ -1048,8 +1048,14 @@ static void intel_uncore_fw_domains_init(struct drm_device *dev)
1048 1048
1049 /* We need to init first for ECOBUS access and then 1049 /* We need to init first for ECOBUS access and then
1050 * determine later if we want to reinit, in case of MT access is 1050 * determine later if we want to reinit, in case of MT access is
1051 * not working 1051 * not working. In this stage we don't know which flavour this
1052 * ivb is, so it is better to reset also the gen6 fw registers
1053 * before the ecobus check.
1052 */ 1054 */
1055
1056 __raw_i915_write32(dev_priv, FORCEWAKE, 0);
1057 __raw_posting_read(dev_priv, ECOBUS);
1058
1053 fw_domain_init(dev_priv, FW_DOMAIN_ID_RENDER, 1059 fw_domain_init(dev_priv, FW_DOMAIN_ID_RENDER,
1054 FORCEWAKE_MT, FORCEWAKE_MT_ACK); 1060 FORCEWAKE_MT, FORCEWAKE_MT_ACK);
1055 1061
diff --git a/drivers/gpu/drm/imx/dw_hdmi-imx.c b/drivers/gpu/drm/imx/dw_hdmi-imx.c
index 121d30ca2d44..87fe8ed92ebe 100644
--- a/drivers/gpu/drm/imx/dw_hdmi-imx.c
+++ b/drivers/gpu/drm/imx/dw_hdmi-imx.c
@@ -70,7 +70,9 @@ static const struct dw_hdmi_curr_ctrl imx_cur_ctr[] = {
70 118800000, { 0x091c, 0x091c, 0x06dc }, 70 118800000, { 0x091c, 0x091c, 0x06dc },
71 }, { 71 }, {
72 216000000, { 0x06dc, 0x0b5c, 0x091c }, 72 216000000, { 0x06dc, 0x0b5c, 0x091c },
73 } 73 }, {
74 ~0UL, { 0x0000, 0x0000, 0x0000 },
75 },
74}; 76};
75 77
76static const struct dw_hdmi_sym_term imx_sym_term[] = { 78static const struct dw_hdmi_sym_term imx_sym_term[] = {
@@ -136,11 +138,34 @@ static struct drm_encoder_funcs dw_hdmi_imx_encoder_funcs = {
136 .destroy = drm_encoder_cleanup, 138 .destroy = drm_encoder_cleanup,
137}; 139};
138 140
141static enum drm_mode_status imx6q_hdmi_mode_valid(struct drm_connector *con,
142 struct drm_display_mode *mode)
143{
144 if (mode->clock < 13500)
145 return MODE_CLOCK_LOW;
146 if (mode->clock > 266000)
147 return MODE_CLOCK_HIGH;
148
149 return MODE_OK;
150}
151
152static enum drm_mode_status imx6dl_hdmi_mode_valid(struct drm_connector *con,
153 struct drm_display_mode *mode)
154{
155 if (mode->clock < 13500)
156 return MODE_CLOCK_LOW;
157 if (mode->clock > 270000)
158 return MODE_CLOCK_HIGH;
159
160 return MODE_OK;
161}
162
139static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = { 163static struct dw_hdmi_plat_data imx6q_hdmi_drv_data = {
140 .mpll_cfg = imx_mpll_cfg, 164 .mpll_cfg = imx_mpll_cfg,
141 .cur_ctr = imx_cur_ctr, 165 .cur_ctr = imx_cur_ctr,
142 .sym_term = imx_sym_term, 166 .sym_term = imx_sym_term,
143 .dev_type = IMX6Q_HDMI, 167 .dev_type = IMX6Q_HDMI,
168 .mode_valid = imx6q_hdmi_mode_valid,
144}; 169};
145 170
146static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = { 171static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
@@ -148,6 +173,7 @@ static struct dw_hdmi_plat_data imx6dl_hdmi_drv_data = {
148 .cur_ctr = imx_cur_ctr, 173 .cur_ctr = imx_cur_ctr,
149 .sym_term = imx_sym_term, 174 .sym_term = imx_sym_term,
150 .dev_type = IMX6DL_HDMI, 175 .dev_type = IMX6DL_HDMI,
176 .mode_valid = imx6dl_hdmi_mode_valid,
151}; 177};
152 178
153static const struct of_device_id dw_hdmi_imx_dt_ids[] = { 179static const struct of_device_id dw_hdmi_imx_dt_ids[] = {
diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c
index 1b86aac0b341..2d6dc94e1e64 100644
--- a/drivers/gpu/drm/imx/imx-ldb.c
+++ b/drivers/gpu/drm/imx/imx-ldb.c
@@ -163,22 +163,7 @@ static void imx_ldb_encoder_prepare(struct drm_encoder *encoder)
163{ 163{
164 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder); 164 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
165 struct imx_ldb *ldb = imx_ldb_ch->ldb; 165 struct imx_ldb *ldb = imx_ldb_ch->ldb;
166 struct drm_display_mode *mode = &encoder->crtc->hwmode;
167 u32 pixel_fmt; 166 u32 pixel_fmt;
168 unsigned long serial_clk;
169 unsigned long di_clk = mode->clock * 1000;
170 int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder);
171
172 if (ldb->ldb_ctrl & LDB_SPLIT_MODE_EN) {
173 /* dual channel LVDS mode */
174 serial_clk = 3500UL * mode->clock;
175 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
176 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
177 } else {
178 serial_clk = 7000UL * mode->clock;
179 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
180 di_clk);
181 }
182 167
183 switch (imx_ldb_ch->chno) { 168 switch (imx_ldb_ch->chno) {
184 case 0: 169 case 0:
@@ -247,6 +232,9 @@ static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
247 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder); 232 struct imx_ldb_channel *imx_ldb_ch = enc_to_imx_ldb_ch(encoder);
248 struct imx_ldb *ldb = imx_ldb_ch->ldb; 233 struct imx_ldb *ldb = imx_ldb_ch->ldb;
249 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN; 234 int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN;
235 unsigned long serial_clk;
236 unsigned long di_clk = mode->clock * 1000;
237 int mux = imx_drm_encoder_get_mux_id(imx_ldb_ch->child, encoder);
250 238
251 if (mode->clock > 170000) { 239 if (mode->clock > 170000) {
252 dev_warn(ldb->dev, 240 dev_warn(ldb->dev,
@@ -257,6 +245,16 @@ static void imx_ldb_encoder_mode_set(struct drm_encoder *encoder,
257 "%s: mode exceeds 85 MHz pixel clock\n", __func__); 245 "%s: mode exceeds 85 MHz pixel clock\n", __func__);
258 } 246 }
259 247
248 if (dual) {
249 serial_clk = 3500UL * mode->clock;
250 imx_ldb_set_clock(ldb, mux, 0, serial_clk, di_clk);
251 imx_ldb_set_clock(ldb, mux, 1, serial_clk, di_clk);
252 } else {
253 serial_clk = 7000UL * mode->clock;
254 imx_ldb_set_clock(ldb, mux, imx_ldb_ch->chno, serial_clk,
255 di_clk);
256 }
257
260 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */ 258 /* FIXME - assumes straight connections DI0 --> CH0, DI1 --> CH1 */
261 if (imx_ldb_ch == &ldb->channel[0]) { 259 if (imx_ldb_ch == &ldb->channel[0]) {
262 if (mode->flags & DRM_MODE_FLAG_NVSYNC) 260 if (mode->flags & DRM_MODE_FLAG_NVSYNC)
diff --git a/drivers/gpu/drm/imx/parallel-display.c b/drivers/gpu/drm/imx/parallel-display.c
index 5e83e007080f..900dda6a8e71 100644
--- a/drivers/gpu/drm/imx/parallel-display.c
+++ b/drivers/gpu/drm/imx/parallel-display.c
@@ -236,8 +236,11 @@ static int imx_pd_bind(struct device *dev, struct device *master, void *data)
236 } 236 }
237 237
238 panel_node = of_parse_phandle(np, "fsl,panel", 0); 238 panel_node = of_parse_phandle(np, "fsl,panel", 0);
239 if (panel_node) 239 if (panel_node) {
240 imxpd->panel = of_drm_find_panel(panel_node); 240 imxpd->panel = of_drm_find_panel(panel_node);
241 if (!imxpd->panel)
242 return -EPROBE_DEFER;
243 }
241 244
242 imxpd->dev = dev; 245 imxpd->dev = dev;
243 246
diff --git a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c
index 8edd531cb621..7369ee7f0c55 100644
--- a/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c
+++ b/drivers/gpu/drm/msm/mdp/mdp4/mdp4_irq.c
@@ -32,7 +32,10 @@ static void mdp4_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus)
32void mdp4_irq_preinstall(struct msm_kms *kms) 32void mdp4_irq_preinstall(struct msm_kms *kms)
33{ 33{
34 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); 34 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
35 mdp4_enable(mdp4_kms);
35 mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, 0xffffffff); 36 mdp4_write(mdp4_kms, REG_MDP4_INTR_CLEAR, 0xffffffff);
37 mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
38 mdp4_disable(mdp4_kms);
36} 39}
37 40
38int mdp4_irq_postinstall(struct msm_kms *kms) 41int mdp4_irq_postinstall(struct msm_kms *kms)
@@ -53,7 +56,9 @@ int mdp4_irq_postinstall(struct msm_kms *kms)
53void mdp4_irq_uninstall(struct msm_kms *kms) 56void mdp4_irq_uninstall(struct msm_kms *kms)
54{ 57{
55 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms)); 58 struct mdp4_kms *mdp4_kms = to_mdp4_kms(to_mdp_kms(kms));
59 mdp4_enable(mdp4_kms);
56 mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000); 60 mdp4_write(mdp4_kms, REG_MDP4_INTR_ENABLE, 0x00000000);
61 mdp4_disable(mdp4_kms);
57} 62}
58 63
59irqreturn_t mdp4_irq(struct msm_kms *kms) 64irqreturn_t mdp4_irq(struct msm_kms *kms)
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h b/drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h
index 09b4a25eb553..c276624290af 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5.xml.h
@@ -8,17 +8,9 @@ http://github.com/freedreno/envytools/
8git clone https://github.com/freedreno/envytools.git 8git clone https://github.com/freedreno/envytools.git
9 9
10The rules-ng-ng source files this header was generated from are: 10The rules-ng-ng source files this header was generated from are:
11- /home/robclark/src/freedreno/envytools/rnndb/msm.xml ( 676 bytes, from 2014-12-05 15:34:49) 11- /local/mnt2/workspace2/sviau/envytools/rnndb/mdp/mdp5.xml ( 27229 bytes, from 2015-02-10 17:00:41)
12- /home/robclark/src/freedreno/envytools/rnndb/freedreno_copyright.xml ( 1453 bytes, from 2013-03-31 16:51:27) 12- /local/mnt2/workspace2/sviau/envytools/rnndb/freedreno_copyright.xml ( 1453 bytes, from 2014-06-02 18:31:15)
13- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp4.xml ( 20908 bytes, from 2014-12-08 16:13:00) 13- /local/mnt2/workspace2/sviau/envytools/rnndb/mdp/mdp_common.xml ( 2357 bytes, from 2015-01-23 16:20:19)
14- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp_common.xml ( 2357 bytes, from 2014-12-08 16:13:00)
15- /home/robclark/src/freedreno/envytools/rnndb/mdp/mdp5.xml ( 27208 bytes, from 2015-01-13 23:56:11)
16- /home/robclark/src/freedreno/envytools/rnndb/dsi/dsi.xml ( 11712 bytes, from 2013-08-17 17:13:43)
17- /home/robclark/src/freedreno/envytools/rnndb/dsi/sfpb.xml ( 344 bytes, from 2013-08-11 19:26:32)
18- /home/robclark/src/freedreno/envytools/rnndb/dsi/mmss_cc.xml ( 1686 bytes, from 2014-10-31 16:48:57)
19- /home/robclark/src/freedreno/envytools/rnndb/hdmi/qfprom.xml ( 600 bytes, from 2013-07-05 19:21:12)
20- /home/robclark/src/freedreno/envytools/rnndb/hdmi/hdmi.xml ( 26848 bytes, from 2015-01-13 23:55:57)
21- /home/robclark/src/freedreno/envytools/rnndb/edp/edp.xml ( 8253 bytes, from 2014-12-08 16:13:00)
22 14
23Copyright (C) 2013-2015 by the following authors: 15Copyright (C) 2013-2015 by the following authors:
24- Rob Clark <robdclark@gmail.com> (robclark) 16- Rob Clark <robdclark@gmail.com> (robclark)
@@ -910,6 +902,7 @@ static inline uint32_t __offset_LM(uint32_t idx)
910 case 2: return (mdp5_cfg->lm.base[2]); 902 case 2: return (mdp5_cfg->lm.base[2]);
911 case 3: return (mdp5_cfg->lm.base[3]); 903 case 3: return (mdp5_cfg->lm.base[3]);
912 case 4: return (mdp5_cfg->lm.base[4]); 904 case 4: return (mdp5_cfg->lm.base[4]);
905 case 5: return (mdp5_cfg->lm.base[5]);
913 default: return INVALID_IDX(idx); 906 default: return INVALID_IDX(idx);
914 } 907 }
915} 908}
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
index 46fac545dc2b..2f2863cf8b45 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_crtc.c
@@ -62,8 +62,8 @@ struct mdp5_crtc {
62 62
63 /* current cursor being scanned out: */ 63 /* current cursor being scanned out: */
64 struct drm_gem_object *scanout_bo; 64 struct drm_gem_object *scanout_bo;
65 uint32_t width; 65 uint32_t width, height;
66 uint32_t height; 66 uint32_t x, y;
67 } cursor; 67 } cursor;
68}; 68};
69#define to_mdp5_crtc(x) container_of(x, struct mdp5_crtc, base) 69#define to_mdp5_crtc(x) container_of(x, struct mdp5_crtc, base)
@@ -103,8 +103,8 @@ static void crtc_flush_all(struct drm_crtc *crtc)
103 struct drm_plane *plane; 103 struct drm_plane *plane;
104 uint32_t flush_mask = 0; 104 uint32_t flush_mask = 0;
105 105
106 /* we could have already released CTL in the disable path: */ 106 /* this should not happen: */
107 if (!mdp5_crtc->ctl) 107 if (WARN_ON(!mdp5_crtc->ctl))
108 return; 108 return;
109 109
110 drm_atomic_crtc_for_each_plane(plane, crtc) { 110 drm_atomic_crtc_for_each_plane(plane, crtc) {
@@ -143,6 +143,11 @@ static void complete_flip(struct drm_crtc *crtc, struct drm_file *file)
143 drm_atomic_crtc_for_each_plane(plane, crtc) { 143 drm_atomic_crtc_for_each_plane(plane, crtc) {
144 mdp5_plane_complete_flip(plane); 144 mdp5_plane_complete_flip(plane);
145 } 145 }
146
147 if (mdp5_crtc->ctl && !crtc->state->enable) {
148 mdp5_ctl_release(mdp5_crtc->ctl);
149 mdp5_crtc->ctl = NULL;
150 }
146} 151}
147 152
148static void unref_cursor_worker(struct drm_flip_work *work, void *val) 153static void unref_cursor_worker(struct drm_flip_work *work, void *val)
@@ -386,14 +391,17 @@ static void mdp5_crtc_atomic_flush(struct drm_crtc *crtc)
386 mdp5_crtc->event = crtc->state->event; 391 mdp5_crtc->event = crtc->state->event;
387 spin_unlock_irqrestore(&dev->event_lock, flags); 392 spin_unlock_irqrestore(&dev->event_lock, flags);
388 393
394 /*
395 * If no CTL has been allocated in mdp5_crtc_atomic_check(),
396 * it means we are trying to flush a CRTC whose state is disabled:
397 * nothing else needs to be done.
398 */
399 if (unlikely(!mdp5_crtc->ctl))
400 return;
401
389 blend_setup(crtc); 402 blend_setup(crtc);
390 crtc_flush_all(crtc); 403 crtc_flush_all(crtc);
391 request_pending(crtc, PENDING_FLIP); 404 request_pending(crtc, PENDING_FLIP);
392
393 if (mdp5_crtc->ctl && !crtc->state->enable) {
394 mdp5_ctl_release(mdp5_crtc->ctl);
395 mdp5_crtc->ctl = NULL;
396 }
397} 405}
398 406
399static int mdp5_crtc_set_property(struct drm_crtc *crtc, 407static int mdp5_crtc_set_property(struct drm_crtc *crtc,
@@ -403,6 +411,32 @@ static int mdp5_crtc_set_property(struct drm_crtc *crtc,
403 return -EINVAL; 411 return -EINVAL;
404} 412}
405 413
414static void get_roi(struct drm_crtc *crtc, uint32_t *roi_w, uint32_t *roi_h)
415{
416 struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
417 uint32_t xres = crtc->mode.hdisplay;
418 uint32_t yres = crtc->mode.vdisplay;
419
420 /*
421 * Cursor Region Of Interest (ROI) is a plane read from cursor
422 * buffer to render. The ROI region is determined by the visibility of
423 * the cursor point. In the default Cursor image the cursor point will
424 * be at the top left of the cursor image, unless it is specified
425 * otherwise using hotspot feature.
426 *
427 * If the cursor point reaches the right (xres - x < cursor.width) or
428 * bottom (yres - y < cursor.height) boundary of the screen, then ROI
429 * width and ROI height need to be evaluated to crop the cursor image
430 * accordingly.
431 * (xres-x) will be new cursor width when x > (xres - cursor.width)
432 * (yres-y) will be new cursor height when y > (yres - cursor.height)
433 */
434 *roi_w = min(mdp5_crtc->cursor.width, xres -
435 mdp5_crtc->cursor.x);
436 *roi_h = min(mdp5_crtc->cursor.height, yres -
437 mdp5_crtc->cursor.y);
438}
439
406static int mdp5_crtc_cursor_set(struct drm_crtc *crtc, 440static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,
407 struct drm_file *file, uint32_t handle, 441 struct drm_file *file, uint32_t handle,
408 uint32_t width, uint32_t height) 442 uint32_t width, uint32_t height)
@@ -416,6 +450,7 @@ static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,
416 unsigned int depth; 450 unsigned int depth;
417 enum mdp5_cursor_alpha cur_alpha = CURSOR_ALPHA_PER_PIXEL; 451 enum mdp5_cursor_alpha cur_alpha = CURSOR_ALPHA_PER_PIXEL;
418 uint32_t flush_mask = mdp_ctl_flush_mask_cursor(0); 452 uint32_t flush_mask = mdp_ctl_flush_mask_cursor(0);
453 uint32_t roi_w, roi_h;
419 unsigned long flags; 454 unsigned long flags;
420 455
421 if ((width > CURSOR_WIDTH) || (height > CURSOR_HEIGHT)) { 456 if ((width > CURSOR_WIDTH) || (height > CURSOR_HEIGHT)) {
@@ -446,6 +481,12 @@ static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,
446 spin_lock_irqsave(&mdp5_crtc->cursor.lock, flags); 481 spin_lock_irqsave(&mdp5_crtc->cursor.lock, flags);
447 old_bo = mdp5_crtc->cursor.scanout_bo; 482 old_bo = mdp5_crtc->cursor.scanout_bo;
448 483
484 mdp5_crtc->cursor.scanout_bo = cursor_bo;
485 mdp5_crtc->cursor.width = width;
486 mdp5_crtc->cursor.height = height;
487
488 get_roi(crtc, &roi_w, &roi_h);
489
449 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_STRIDE(lm), stride); 490 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_STRIDE(lm), stride);
450 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_FORMAT(lm), 491 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_FORMAT(lm),
451 MDP5_LM_CURSOR_FORMAT_FORMAT(CURSOR_FMT_ARGB8888)); 492 MDP5_LM_CURSOR_FORMAT_FORMAT(CURSOR_FMT_ARGB8888));
@@ -453,19 +494,14 @@ static int mdp5_crtc_cursor_set(struct drm_crtc *crtc,
453 MDP5_LM_CURSOR_IMG_SIZE_SRC_H(height) | 494 MDP5_LM_CURSOR_IMG_SIZE_SRC_H(height) |
454 MDP5_LM_CURSOR_IMG_SIZE_SRC_W(width)); 495 MDP5_LM_CURSOR_IMG_SIZE_SRC_W(width));
455 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_SIZE(lm), 496 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_SIZE(lm),
456 MDP5_LM_CURSOR_SIZE_ROI_H(height) | 497 MDP5_LM_CURSOR_SIZE_ROI_H(roi_h) |
457 MDP5_LM_CURSOR_SIZE_ROI_W(width)); 498 MDP5_LM_CURSOR_SIZE_ROI_W(roi_w));
458 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_BASE_ADDR(lm), cursor_addr); 499 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_BASE_ADDR(lm), cursor_addr);
459 500
460
461 blendcfg = MDP5_LM_CURSOR_BLEND_CONFIG_BLEND_EN; 501 blendcfg = MDP5_LM_CURSOR_BLEND_CONFIG_BLEND_EN;
462 blendcfg |= MDP5_LM_CURSOR_BLEND_CONFIG_BLEND_TRANSP_EN;
463 blendcfg |= MDP5_LM_CURSOR_BLEND_CONFIG_BLEND_ALPHA_SEL(cur_alpha); 502 blendcfg |= MDP5_LM_CURSOR_BLEND_CONFIG_BLEND_ALPHA_SEL(cur_alpha);
464 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_BLEND_CONFIG(lm), blendcfg); 503 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_BLEND_CONFIG(lm), blendcfg);
465 504
466 mdp5_crtc->cursor.scanout_bo = cursor_bo;
467 mdp5_crtc->cursor.width = width;
468 mdp5_crtc->cursor.height = height;
469 spin_unlock_irqrestore(&mdp5_crtc->cursor.lock, flags); 505 spin_unlock_irqrestore(&mdp5_crtc->cursor.lock, flags);
470 506
471 ret = mdp5_ctl_set_cursor(mdp5_crtc->ctl, true); 507 ret = mdp5_ctl_set_cursor(mdp5_crtc->ctl, true);
@@ -489,31 +525,18 @@ static int mdp5_crtc_cursor_move(struct drm_crtc *crtc, int x, int y)
489 struct mdp5_kms *mdp5_kms = get_kms(crtc); 525 struct mdp5_kms *mdp5_kms = get_kms(crtc);
490 struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc); 526 struct mdp5_crtc *mdp5_crtc = to_mdp5_crtc(crtc);
491 uint32_t flush_mask = mdp_ctl_flush_mask_cursor(0); 527 uint32_t flush_mask = mdp_ctl_flush_mask_cursor(0);
492 uint32_t xres = crtc->mode.hdisplay;
493 uint32_t yres = crtc->mode.vdisplay;
494 uint32_t roi_w; 528 uint32_t roi_w;
495 uint32_t roi_h; 529 uint32_t roi_h;
496 unsigned long flags; 530 unsigned long flags;
497 531
498 x = (x > 0) ? x : 0; 532 /* In case the CRTC is disabled, just drop the cursor update */
499 y = (y > 0) ? y : 0; 533 if (unlikely(!crtc->state->enable))
534 return 0;
500 535
501 /* 536 mdp5_crtc->cursor.x = x = max(x, 0);
502 * Cursor Region Of Interest (ROI) is a plane read from cursor 537 mdp5_crtc->cursor.y = y = max(y, 0);
503 * buffer to render. The ROI region is determined by the visiblity of 538
504 * the cursor point. In the default Cursor image the cursor point will 539 get_roi(crtc, &roi_w, &roi_h);
505 * be at the top left of the cursor image, unless it is specified
506 * otherwise using hotspot feature.
507 *
508 * If the cursor point reaches the right (xres - x < cursor.width) or
509 * bottom (yres - y < cursor.height) boundary of the screen, then ROI
510 * width and ROI height need to be evaluated to crop the cursor image
511 * accordingly.
512 * (xres-x) will be new cursor width when x > (xres - cursor.width)
513 * (yres-y) will be new cursor height when y > (yres - cursor.height)
514 */
515 roi_w = min(mdp5_crtc->cursor.width, xres - x);
516 roi_h = min(mdp5_crtc->cursor.height, yres - y);
517 540
518 spin_lock_irqsave(&mdp5_crtc->cursor.lock, flags); 541 spin_lock_irqsave(&mdp5_crtc->cursor.lock, flags);
519 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_SIZE(mdp5_crtc->lm), 542 mdp5_write(mdp5_kms, REG_MDP5_LM_CURSOR_SIZE(mdp5_crtc->lm),
@@ -544,8 +567,8 @@ static const struct drm_crtc_funcs mdp5_crtc_funcs = {
544static const struct drm_crtc_helper_funcs mdp5_crtc_helper_funcs = { 567static const struct drm_crtc_helper_funcs mdp5_crtc_helper_funcs = {
545 .mode_fixup = mdp5_crtc_mode_fixup, 568 .mode_fixup = mdp5_crtc_mode_fixup,
546 .mode_set_nofb = mdp5_crtc_mode_set_nofb, 569 .mode_set_nofb = mdp5_crtc_mode_set_nofb,
547 .prepare = mdp5_crtc_disable, 570 .disable = mdp5_crtc_disable,
548 .commit = mdp5_crtc_enable, 571 .enable = mdp5_crtc_enable,
549 .atomic_check = mdp5_crtc_atomic_check, 572 .atomic_check = mdp5_crtc_atomic_check,
550 .atomic_begin = mdp5_crtc_atomic_begin, 573 .atomic_begin = mdp5_crtc_atomic_begin,
551 .atomic_flush = mdp5_crtc_atomic_flush, 574 .atomic_flush = mdp5_crtc_atomic_flush,
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
index d6a14bb99988..af0e02fa4f48 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_encoder.c
@@ -267,14 +267,14 @@ static void mdp5_encoder_enable(struct drm_encoder *encoder)
267 mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(intf), 1); 267 mdp5_write(mdp5_kms, REG_MDP5_INTF_TIMING_ENGINE_EN(intf), 1);
268 spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags); 268 spin_unlock_irqrestore(&mdp5_encoder->intf_lock, flags);
269 269
270 mdp5_encoder->enabled = false; 270 mdp5_encoder->enabled = true;
271} 271}
272 272
273static const struct drm_encoder_helper_funcs mdp5_encoder_helper_funcs = { 273static const struct drm_encoder_helper_funcs mdp5_encoder_helper_funcs = {
274 .mode_fixup = mdp5_encoder_mode_fixup, 274 .mode_fixup = mdp5_encoder_mode_fixup,
275 .mode_set = mdp5_encoder_mode_set, 275 .mode_set = mdp5_encoder_mode_set,
276 .prepare = mdp5_encoder_disable, 276 .disable = mdp5_encoder_disable,
277 .commit = mdp5_encoder_enable, 277 .enable = mdp5_encoder_enable,
278}; 278};
279 279
280/* initialize encoder */ 280/* initialize encoder */
diff --git a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
index 70ac81edd40f..a9407105b9b7 100644
--- a/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
+++ b/drivers/gpu/drm/msm/mdp/mdp5/mdp5_irq.c
@@ -34,7 +34,10 @@ static void mdp5_irq_error_handler(struct mdp_irq *irq, uint32_t irqstatus)
34void mdp5_irq_preinstall(struct msm_kms *kms) 34void mdp5_irq_preinstall(struct msm_kms *kms)
35{ 35{
36 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); 36 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
37 mdp5_enable(mdp5_kms);
37 mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, 0xffffffff); 38 mdp5_write(mdp5_kms, REG_MDP5_INTR_CLEAR, 0xffffffff);
39 mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
40 mdp5_disable(mdp5_kms);
38} 41}
39 42
40int mdp5_irq_postinstall(struct msm_kms *kms) 43int mdp5_irq_postinstall(struct msm_kms *kms)
@@ -57,7 +60,9 @@ int mdp5_irq_postinstall(struct msm_kms *kms)
57void mdp5_irq_uninstall(struct msm_kms *kms) 60void mdp5_irq_uninstall(struct msm_kms *kms)
58{ 61{
59 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms)); 62 struct mdp5_kms *mdp5_kms = to_mdp5_kms(to_mdp_kms(kms));
63 mdp5_enable(mdp5_kms);
60 mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000); 64 mdp5_write(mdp5_kms, REG_MDP5_INTR_EN, 0x00000000);
65 mdp5_disable(mdp5_kms);
61} 66}
62 67
63static void mdp5_irq_mdp(struct mdp_kms *mdp_kms) 68static void mdp5_irq_mdp(struct mdp_kms *mdp_kms)
diff --git a/drivers/gpu/drm/msm/msm_atomic.c b/drivers/gpu/drm/msm/msm_atomic.c
index 871aa2108dc6..18fd643b6e69 100644
--- a/drivers/gpu/drm/msm/msm_atomic.c
+++ b/drivers/gpu/drm/msm/msm_atomic.c
@@ -219,8 +219,10 @@ int msm_atomic_commit(struct drm_device *dev,
219 * mark our set of crtc's as busy: 219 * mark our set of crtc's as busy:
220 */ 220 */
221 ret = start_atomic(dev->dev_private, c->crtc_mask); 221 ret = start_atomic(dev->dev_private, c->crtc_mask);
222 if (ret) 222 if (ret) {
223 kfree(c);
223 return ret; 224 return ret;
225 }
224 226
225 /* 227 /*
226 * This is the point of no return - everything below never fails except 228 * This is the point of no return - everything below never fails except
diff --git a/drivers/gpu/drm/nouveau/nouveau_fbcon.c b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
index 79924e4b1b49..6751553abe4a 100644
--- a/drivers/gpu/drm/nouveau/nouveau_fbcon.c
+++ b/drivers/gpu/drm/nouveau/nouveau_fbcon.c
@@ -418,7 +418,7 @@ nouveau_fbcon_create(struct drm_fb_helper *helper,
418 nouveau_fbcon_zfill(dev, fbcon); 418 nouveau_fbcon_zfill(dev, fbcon);
419 419
420 /* To allow resizeing without swapping buffers */ 420 /* To allow resizeing without swapping buffers */
421 NV_INFO(drm, "allocated %dx%d fb: 0x%lx, bo %p\n", 421 NV_INFO(drm, "allocated %dx%d fb: 0x%llx, bo %p\n",
422 nouveau_fb->base.width, nouveau_fb->base.height, 422 nouveau_fb->base.width, nouveau_fb->base.height,
423 nvbo->bo.offset, nvbo); 423 nvbo->bo.offset, nvbo);
424 424
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
index 29bd539af183..6efa8f38ff54 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/base.c
@@ -340,11 +340,13 @@ nvkm_devobj_ctor(struct nvkm_object *parent, struct nvkm_object *engine,
340 340
341 /* switch mmio to cpu's native endianness */ 341 /* switch mmio to cpu's native endianness */
342#ifndef __BIG_ENDIAN 342#ifndef __BIG_ENDIAN
343 if (ioread32_native(map + 0x000004) != 0x00000000) 343 if (ioread32_native(map + 0x000004) != 0x00000000) {
344#else 344#else
345 if (ioread32_native(map + 0x000004) == 0x00000000) 345 if (ioread32_native(map + 0x000004) == 0x00000000) {
346#endif 346#endif
347 iowrite32_native(0x01000001, map + 0x000004); 347 iowrite32_native(0x01000001, map + 0x000004);
348 ioread32_native(map);
349 }
348 350
349 /* read boot0 and strapping information */ 351 /* read boot0 and strapping information */
350 boot0 = ioread32_native(map + 0x000000); 352 boot0 = ioread32_native(map + 0x000000);
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
index 539561ed3281..108d048da764 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/device/gm100.c
@@ -142,6 +142,49 @@ gm100_identify(struct nvkm_device *device)
142 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass; 142 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
143#endif 143#endif
144 break; 144 break;
145 case 0x126:
146 device->cname = "GM206";
147 device->oclass[NVDEV_SUBDEV_VBIOS ] = &nvkm_bios_oclass;
148 device->oclass[NVDEV_SUBDEV_GPIO ] = gk104_gpio_oclass;
149 device->oclass[NVDEV_SUBDEV_I2C ] = gm204_i2c_oclass;
150 device->oclass[NVDEV_SUBDEV_FUSE ] = &gm107_fuse_oclass;
151#if 0
152 /* looks to be some non-trivial changes */
153 device->oclass[NVDEV_SUBDEV_CLK ] = &gk104_clk_oclass;
154 /* priv ring says no to 0x10eb14 writes */
155 device->oclass[NVDEV_SUBDEV_THERM ] = &gm107_therm_oclass;
156#endif
157 device->oclass[NVDEV_SUBDEV_MXM ] = &nv50_mxm_oclass;
158 device->oclass[NVDEV_SUBDEV_DEVINIT] = gm204_devinit_oclass;
159 device->oclass[NVDEV_SUBDEV_MC ] = gk20a_mc_oclass;
160 device->oclass[NVDEV_SUBDEV_BUS ] = gf100_bus_oclass;
161 device->oclass[NVDEV_SUBDEV_TIMER ] = &gk20a_timer_oclass;
162 device->oclass[NVDEV_SUBDEV_FB ] = gm107_fb_oclass;
163 device->oclass[NVDEV_SUBDEV_LTC ] = gm107_ltc_oclass;
164 device->oclass[NVDEV_SUBDEV_IBUS ] = &gk104_ibus_oclass;
165 device->oclass[NVDEV_SUBDEV_INSTMEM] = nv50_instmem_oclass;
166 device->oclass[NVDEV_SUBDEV_MMU ] = &gf100_mmu_oclass;
167 device->oclass[NVDEV_SUBDEV_BAR ] = &gf100_bar_oclass;
168 device->oclass[NVDEV_SUBDEV_PMU ] = gk208_pmu_oclass;
169#if 0
170 device->oclass[NVDEV_SUBDEV_VOLT ] = &nv40_volt_oclass;
171#endif
172 device->oclass[NVDEV_ENGINE_DMAOBJ ] = gf110_dmaeng_oclass;
173#if 0
174 device->oclass[NVDEV_ENGINE_FIFO ] = gk208_fifo_oclass;
175 device->oclass[NVDEV_ENGINE_SW ] = gf100_sw_oclass;
176 device->oclass[NVDEV_ENGINE_GR ] = gm107_gr_oclass;
177#endif
178 device->oclass[NVDEV_ENGINE_DISP ] = gm204_disp_oclass;
179#if 0
180 device->oclass[NVDEV_ENGINE_CE0 ] = &gm204_ce0_oclass;
181 device->oclass[NVDEV_ENGINE_CE1 ] = &gm204_ce1_oclass;
182 device->oclass[NVDEV_ENGINE_CE2 ] = &gm204_ce2_oclass;
183 device->oclass[NVDEV_ENGINE_MSVLD ] = &gk104_msvld_oclass;
184 device->oclass[NVDEV_ENGINE_MSPDEC ] = &gk104_mspdec_oclass;
185 device->oclass[NVDEV_ENGINE_MSPPP ] = &gf100_msppp_oclass;
186#endif
187 break;
145 default: 188 default:
146 nv_fatal(device, "unknown Maxwell chipset\n"); 189 nv_fatal(device, "unknown Maxwell chipset\n");
147 return -EINVAL; 190 return -EINVAL;
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
index b038b6eb51db..043e4296084c 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/fifo/nv04.c
@@ -502,72 +502,57 @@ nv04_fifo_intr(struct nvkm_subdev *subdev)
502{ 502{
503 struct nvkm_device *device = nv_device(subdev); 503 struct nvkm_device *device = nv_device(subdev);
504 struct nv04_fifo_priv *priv = (void *)subdev; 504 struct nv04_fifo_priv *priv = (void *)subdev;
505 uint32_t status, reassign; 505 u32 mask = nv_rd32(priv, NV03_PFIFO_INTR_EN_0);
506 int cnt = 0; 506 u32 stat = nv_rd32(priv, NV03_PFIFO_INTR_0) & mask;
507 u32 reassign, chid, get, sem;
507 508
508 reassign = nv_rd32(priv, NV03_PFIFO_CACHES) & 1; 509 reassign = nv_rd32(priv, NV03_PFIFO_CACHES) & 1;
509 while ((status = nv_rd32(priv, NV03_PFIFO_INTR_0)) && (cnt++ < 100)) { 510 nv_wr32(priv, NV03_PFIFO_CACHES, 0);
510 uint32_t chid, get;
511
512 nv_wr32(priv, NV03_PFIFO_CACHES, 0);
513
514 chid = nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH1) & priv->base.max;
515 get = nv_rd32(priv, NV03_PFIFO_CACHE1_GET);
516 511
517 if (status & NV_PFIFO_INTR_CACHE_ERROR) { 512 chid = nv_rd32(priv, NV03_PFIFO_CACHE1_PUSH1) & priv->base.max;
518 nv04_fifo_cache_error(device, priv, chid, get); 513 get = nv_rd32(priv, NV03_PFIFO_CACHE1_GET);
519 status &= ~NV_PFIFO_INTR_CACHE_ERROR;
520 }
521 514
522 if (status & NV_PFIFO_INTR_DMA_PUSHER) { 515 if (stat & NV_PFIFO_INTR_CACHE_ERROR) {
523 nv04_fifo_dma_pusher(device, priv, chid); 516 nv04_fifo_cache_error(device, priv, chid, get);
524 status &= ~NV_PFIFO_INTR_DMA_PUSHER; 517 stat &= ~NV_PFIFO_INTR_CACHE_ERROR;
525 } 518 }
526 519
527 if (status & NV_PFIFO_INTR_SEMAPHORE) { 520 if (stat & NV_PFIFO_INTR_DMA_PUSHER) {
528 uint32_t sem; 521 nv04_fifo_dma_pusher(device, priv, chid);
522 stat &= ~NV_PFIFO_INTR_DMA_PUSHER;
523 }
529 524
530 status &= ~NV_PFIFO_INTR_SEMAPHORE; 525 if (stat & NV_PFIFO_INTR_SEMAPHORE) {
531 nv_wr32(priv, NV03_PFIFO_INTR_0, 526 stat &= ~NV_PFIFO_INTR_SEMAPHORE;
532 NV_PFIFO_INTR_SEMAPHORE); 527 nv_wr32(priv, NV03_PFIFO_INTR_0, NV_PFIFO_INTR_SEMAPHORE);
533 528
534 sem = nv_rd32(priv, NV10_PFIFO_CACHE1_SEMAPHORE); 529 sem = nv_rd32(priv, NV10_PFIFO_CACHE1_SEMAPHORE);
535 nv_wr32(priv, NV10_PFIFO_CACHE1_SEMAPHORE, sem | 0x1); 530 nv_wr32(priv, NV10_PFIFO_CACHE1_SEMAPHORE, sem | 0x1);
536 531
537 nv_wr32(priv, NV03_PFIFO_CACHE1_GET, get + 4); 532 nv_wr32(priv, NV03_PFIFO_CACHE1_GET, get + 4);
538 nv_wr32(priv, NV04_PFIFO_CACHE1_PULL0, 1); 533 nv_wr32(priv, NV04_PFIFO_CACHE1_PULL0, 1);
539 } 534 }
540 535
541 if (device->card_type == NV_50) { 536 if (device->card_type == NV_50) {
542 if (status & 0x00000010) { 537 if (stat & 0x00000010) {
543 status &= ~0x00000010; 538 stat &= ~0x00000010;
544 nv_wr32(priv, 0x002100, 0x00000010); 539 nv_wr32(priv, 0x002100, 0x00000010);
545 }
546
547 if (status & 0x40000000) {
548 nv_wr32(priv, 0x002100, 0x40000000);
549 nvkm_fifo_uevent(&priv->base);
550 status &= ~0x40000000;
551 }
552 } 540 }
553 541
554 if (status) { 542 if (stat & 0x40000000) {
555 nv_warn(priv, "unknown intr 0x%08x, ch %d\n", 543 nv_wr32(priv, 0x002100, 0x40000000);
556 status, chid); 544 nvkm_fifo_uevent(&priv->base);
557 nv_wr32(priv, NV03_PFIFO_INTR_0, status); 545 stat &= ~0x40000000;
558 status = 0;
559 } 546 }
560
561 nv_wr32(priv, NV03_PFIFO_CACHES, reassign);
562 } 547 }
563 548
564 if (status) { 549 if (stat) {
565 nv_error(priv, "still angry after %d spins, halt\n", cnt); 550 nv_warn(priv, "unknown intr 0x%08x\n", stat);
566 nv_wr32(priv, 0x002140, 0); 551 nv_mask(priv, NV03_PFIFO_INTR_EN_0, stat, 0x00000000);
567 nv_wr32(priv, 0x000140, 0); 552 nv_wr32(priv, NV03_PFIFO_INTR_0, stat);
568 } 553 }
569 554
570 nv_wr32(priv, 0x000100, 0x00000100); 555 nv_wr32(priv, NV03_PFIFO_CACHES, reassign);
571} 556}
572 557
573static int 558static int
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c
index 2e7ec389eea7..57e2c5b13123 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgf100.c
@@ -1032,9 +1032,9 @@ gf100_grctx_generate_bundle(struct gf100_grctx *info)
1032 const int s = 8; 1032 const int s = 8;
1033 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access); 1033 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access);
1034 mmio_refn(info, 0x408004, 0x00000000, s, b); 1034 mmio_refn(info, 0x408004, 0x00000000, s, b);
1035 mmio_refn(info, 0x408008, 0x80000000 | (impl->bundle_size >> s), 0, b); 1035 mmio_wr32(info, 0x408008, 0x80000000 | (impl->bundle_size >> s));
1036 mmio_refn(info, 0x418808, 0x00000000, s, b); 1036 mmio_refn(info, 0x418808, 0x00000000, s, b);
1037 mmio_refn(info, 0x41880c, 0x80000000 | (impl->bundle_size >> s), 0, b); 1037 mmio_wr32(info, 0x41880c, 0x80000000 | (impl->bundle_size >> s));
1038} 1038}
1039 1039
1040void 1040void
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c
index b52300d8861a..5e9454ba158f 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgk104.c
@@ -851,9 +851,9 @@ gk104_grctx_generate_bundle(struct gf100_grctx *info)
851 const int s = 8; 851 const int s = 8;
852 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access); 852 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access);
853 mmio_refn(info, 0x408004, 0x00000000, s, b); 853 mmio_refn(info, 0x408004, 0x00000000, s, b);
854 mmio_refn(info, 0x408008, 0x80000000 | (impl->bundle_size >> s), 0, b); 854 mmio_wr32(info, 0x408008, 0x80000000 | (impl->bundle_size >> s));
855 mmio_refn(info, 0x418808, 0x00000000, s, b); 855 mmio_refn(info, 0x418808, 0x00000000, s, b);
856 mmio_refn(info, 0x41880c, 0x80000000 | (impl->bundle_size >> s), 0, b); 856 mmio_wr32(info, 0x41880c, 0x80000000 | (impl->bundle_size >> s));
857 mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit); 857 mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit);
858} 858}
859 859
diff --git a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c
index 956f4dce960c..b2fae6e389e2 100644
--- a/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c
+++ b/drivers/gpu/drm/nouveau/nvkm/engine/gr/ctxgm107.c
@@ -871,9 +871,9 @@ gm107_grctx_generate_bundle(struct gf100_grctx *info)
871 const int s = 8; 871 const int s = 8;
872 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access); 872 const int b = mmio_vram(info, impl->bundle_size, (1 << s), access);
873 mmio_refn(info, 0x408004, 0x00000000, s, b); 873 mmio_refn(info, 0x408004, 0x00000000, s, b);
874 mmio_refn(info, 0x408008, 0x80000000 | (impl->bundle_size >> s), 0, b); 874 mmio_wr32(info, 0x408008, 0x80000000 | (impl->bundle_size >> s));
875 mmio_refn(info, 0x418e24, 0x00000000, s, b); 875 mmio_refn(info, 0x418e24, 0x00000000, s, b);
876 mmio_refn(info, 0x418e28, 0x80000000 | (impl->bundle_size >> s), 0, b); 876 mmio_wr32(info, 0x418e28, 0x80000000 | (impl->bundle_size >> s));
877 mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit); 877 mmio_wr32(info, 0x4064c8, (state_limit << 16) | token_limit);
878} 878}
879 879
diff --git a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.c b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.c
index d1a89b2bd5c1..c4e1f085ee10 100644
--- a/drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.c
+++ b/drivers/gpu/drm/nouveau/nvkm/subdev/bios/i2c.c
@@ -74,7 +74,11 @@ dcb_i2c_parse(struct nvkm_bios *bios, u8 idx, struct dcb_i2c_entry *info)
74 u16 ent = dcb_i2c_entry(bios, idx, &ver, &len); 74 u16 ent = dcb_i2c_entry(bios, idx, &ver, &len);
75 if (ent) { 75 if (ent) {
76 if (ver >= 0x41) { 76 if (ver >= 0x41) {
77 if (!(nv_ro32(bios, ent) & 0x80000000)) 77 u32 ent_value = nv_ro32(bios, ent);
78 u8 i2c_port = (ent_value >> 27) & 0x1f;
79 u8 dpaux_port = (ent_value >> 22) & 0x1f;
80 /* value 0x1f means unused according to DCB 4.x spec */
81 if (i2c_port == 0x1f && dpaux_port == 0x1f)
78 info->type = DCB_I2C_UNUSED; 82 info->type = DCB_I2C_UNUSED;
79 else 83 else
80 info->type = DCB_I2C_PMGR; 84 info->type = DCB_I2C_PMGR;
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index ed644a4f6f57..86807ee91bd1 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1405,6 +1405,9 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
1405 (x << 16) | y); 1405 (x << 16) | y);
1406 viewport_w = crtc->mode.hdisplay; 1406 viewport_w = crtc->mode.hdisplay;
1407 viewport_h = (crtc->mode.vdisplay + 1) & ~1; 1407 viewport_h = (crtc->mode.vdisplay + 1) & ~1;
1408 if ((rdev->family >= CHIP_BONAIRE) &&
1409 (crtc->mode.flags & DRM_MODE_FLAG_INTERLACE))
1410 viewport_h *= 2;
1408 WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset, 1411 WREG32(EVERGREEN_VIEWPORT_SIZE + radeon_crtc->crtc_offset,
1409 (viewport_w << 16) | viewport_h); 1412 (viewport_w << 16) | viewport_h);
1410 1413
diff --git a/drivers/gpu/drm/radeon/atombios_dp.c b/drivers/gpu/drm/radeon/atombios_dp.c
index 5bf825dfaa09..8d74de82456e 100644
--- a/drivers/gpu/drm/radeon/atombios_dp.c
+++ b/drivers/gpu/drm/radeon/atombios_dp.c
@@ -178,6 +178,13 @@ radeon_dp_aux_transfer(struct drm_dp_aux *aux, struct drm_dp_aux_msg *msg)
178 switch (msg->request & ~DP_AUX_I2C_MOT) { 178 switch (msg->request & ~DP_AUX_I2C_MOT) {
179 case DP_AUX_NATIVE_WRITE: 179 case DP_AUX_NATIVE_WRITE:
180 case DP_AUX_I2C_WRITE: 180 case DP_AUX_I2C_WRITE:
181 /* The atom implementation only supports writes with a max payload of
182 * 12 bytes since it uses 4 bits for the total count (header + payload)
183 * in the parameter space. The atom interface supports 16 byte
184 * payloads for reads. The hw itself supports up to 16 bytes of payload.
185 */
186 if (WARN_ON_ONCE(msg->size > 12))
187 return -E2BIG;
181 /* tx_size needs to be 4 even for bare address packets since the atom 188 /* tx_size needs to be 4 even for bare address packets since the atom
182 * table needs the info in tx_buf[3]. 189 * table needs the info in tx_buf[3].
183 */ 190 */
diff --git a/drivers/gpu/drm/radeon/atombios_encoders.c b/drivers/gpu/drm/radeon/atombios_encoders.c
index 7c9df1eac065..c39c1d0d9d4e 100644
--- a/drivers/gpu/drm/radeon/atombios_encoders.c
+++ b/drivers/gpu/drm/radeon/atombios_encoders.c
@@ -731,7 +731,9 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
731 dig_connector = radeon_connector->con_priv; 731 dig_connector = radeon_connector->con_priv;
732 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) || 732 if ((dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_DISPLAYPORT) ||
733 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) { 733 (dig_connector->dp_sink_type == CONNECTOR_OBJECT_ID_eDP)) {
734 if (radeon_audio != 0 && ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev)) 734 if (radeon_audio != 0 &&
735 drm_detect_monitor_audio(radeon_connector_edid(connector)) &&
736 ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev))
735 return ATOM_ENCODER_MODE_DP_AUDIO; 737 return ATOM_ENCODER_MODE_DP_AUDIO;
736 return ATOM_ENCODER_MODE_DP; 738 return ATOM_ENCODER_MODE_DP;
737 } else if (radeon_audio != 0) { 739 } else if (radeon_audio != 0) {
@@ -747,7 +749,9 @@ atombios_get_encoder_mode(struct drm_encoder *encoder)
747 } 749 }
748 break; 750 break;
749 case DRM_MODE_CONNECTOR_eDP: 751 case DRM_MODE_CONNECTOR_eDP:
750 if (radeon_audio != 0 && ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev)) 752 if (radeon_audio != 0 &&
753 drm_detect_monitor_audio(radeon_connector_edid(connector)) &&
754 ASIC_IS_DCE4(rdev) && !ASIC_IS_DCE5(rdev))
751 return ATOM_ENCODER_MODE_DP_AUDIO; 755 return ATOM_ENCODER_MODE_DP_AUDIO;
752 return ATOM_ENCODER_MODE_DP; 756 return ATOM_ENCODER_MODE_DP;
753 case DRM_MODE_CONNECTOR_DVIA: 757 case DRM_MODE_CONNECTOR_DVIA:
@@ -1622,7 +1626,6 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
1622 struct radeon_connector *radeon_connector = NULL; 1626 struct radeon_connector *radeon_connector = NULL;
1623 struct radeon_connector_atom_dig *radeon_dig_connector = NULL; 1627 struct radeon_connector_atom_dig *radeon_dig_connector = NULL;
1624 bool travis_quirk = false; 1628 bool travis_quirk = false;
1625 int encoder_mode;
1626 1629
1627 if (connector) { 1630 if (connector) {
1628 radeon_connector = to_radeon_connector(connector); 1631 radeon_connector = to_radeon_connector(connector);
@@ -1718,11 +1721,6 @@ radeon_atom_encoder_dpms_dig(struct drm_encoder *encoder, int mode)
1718 } 1721 }
1719 break; 1722 break;
1720 } 1723 }
1721
1722 encoder_mode = atombios_get_encoder_mode(encoder);
1723 if (radeon_audio != 0 &&
1724 (encoder_mode == ATOM_ENCODER_MODE_HDMI || ENCODER_MODE_IS_DP(encoder_mode)))
1725 radeon_audio_dpms(encoder, mode);
1726} 1724}
1727 1725
1728static void 1726static void
@@ -1731,10 +1729,19 @@ radeon_atom_encoder_dpms(struct drm_encoder *encoder, int mode)
1731 struct drm_device *dev = encoder->dev; 1729 struct drm_device *dev = encoder->dev;
1732 struct radeon_device *rdev = dev->dev_private; 1730 struct radeon_device *rdev = dev->dev_private;
1733 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 1731 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
1732 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
1733 int encoder_mode = atombios_get_encoder_mode(encoder);
1734 1734
1735 DRM_DEBUG_KMS("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n", 1735 DRM_DEBUG_KMS("encoder dpms %d to mode %d, devices %08x, active_devices %08x\n",
1736 radeon_encoder->encoder_id, mode, radeon_encoder->devices, 1736 radeon_encoder->encoder_id, mode, radeon_encoder->devices,
1737 radeon_encoder->active_device); 1737 radeon_encoder->active_device);
1738
1739 if (connector && (radeon_audio != 0) &&
1740 ((encoder_mode == ATOM_ENCODER_MODE_HDMI) ||
1741 (ENCODER_MODE_IS_DP(encoder_mode) &&
1742 drm_detect_monitor_audio(radeon_connector_edid(connector)))))
1743 radeon_audio_dpms(encoder, mode);
1744
1738 switch (radeon_encoder->encoder_id) { 1745 switch (radeon_encoder->encoder_id) {
1739 case ENCODER_OBJECT_ID_INTERNAL_TMDS1: 1746 case ENCODER_OBJECT_ID_INTERNAL_TMDS1:
1740 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1: 1747 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1:
@@ -2136,6 +2143,7 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
2136 struct drm_device *dev = encoder->dev; 2143 struct drm_device *dev = encoder->dev;
2137 struct radeon_device *rdev = dev->dev_private; 2144 struct radeon_device *rdev = dev->dev_private;
2138 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 2145 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
2146 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
2139 int encoder_mode; 2147 int encoder_mode;
2140 2148
2141 radeon_encoder->pixel_clock = adjusted_mode->clock; 2149 radeon_encoder->pixel_clock = adjusted_mode->clock;
@@ -2163,10 +2171,6 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
2163 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3: 2171 case ENCODER_OBJECT_ID_INTERNAL_UNIPHY3:
2164 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA: 2172 case ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA:
2165 /* handled in dpms */ 2173 /* handled in dpms */
2166 encoder_mode = atombios_get_encoder_mode(encoder);
2167 if (radeon_audio != 0 &&
2168 (encoder_mode == ATOM_ENCODER_MODE_HDMI || ENCODER_MODE_IS_DP(encoder_mode)))
2169 radeon_audio_mode_set(encoder, adjusted_mode);
2170 break; 2174 break;
2171 case ENCODER_OBJECT_ID_INTERNAL_DDI: 2175 case ENCODER_OBJECT_ID_INTERNAL_DDI:
2172 case ENCODER_OBJECT_ID_INTERNAL_DVO1: 2176 case ENCODER_OBJECT_ID_INTERNAL_DVO1:
@@ -2188,6 +2192,13 @@ radeon_atom_encoder_mode_set(struct drm_encoder *encoder,
2188 } 2192 }
2189 2193
2190 atombios_apply_encoder_quirks(encoder, adjusted_mode); 2194 atombios_apply_encoder_quirks(encoder, adjusted_mode);
2195
2196 encoder_mode = atombios_get_encoder_mode(encoder);
2197 if (connector && (radeon_audio != 0) &&
2198 ((encoder_mode == ATOM_ENCODER_MODE_HDMI) ||
2199 (ENCODER_MODE_IS_DP(encoder_mode) &&
2200 drm_detect_monitor_audio(radeon_connector_edid(connector)))))
2201 radeon_audio_mode_set(encoder, adjusted_mode);
2191} 2202}
2192 2203
2193static bool 2204static bool
diff --git a/drivers/gpu/drm/radeon/cik.c b/drivers/gpu/drm/radeon/cik.c
index e6a4ba236c70..3e670d344a20 100644
--- a/drivers/gpu/drm/radeon/cik.c
+++ b/drivers/gpu/drm/radeon/cik.c
@@ -3613,6 +3613,8 @@ static void cik_gpu_init(struct radeon_device *rdev)
3613 } 3613 }
3614 3614
3615 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); 3615 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
3616 WREG32(SRBM_INT_CNTL, 0x1);
3617 WREG32(SRBM_INT_ACK, 0x1);
3616 3618
3617 WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN); 3619 WREG32(BIF_FB_EN, FB_READ_EN | FB_WRITE_EN);
3618 3620
@@ -7230,6 +7232,8 @@ static void cik_disable_interrupt_state(struct radeon_device *rdev)
7230 WREG32(CP_ME2_PIPE3_INT_CNTL, 0); 7232 WREG32(CP_ME2_PIPE3_INT_CNTL, 0);
7231 /* grbm */ 7233 /* grbm */
7232 WREG32(GRBM_INT_CNTL, 0); 7234 WREG32(GRBM_INT_CNTL, 0);
7235 /* SRBM */
7236 WREG32(SRBM_INT_CNTL, 0);
7233 /* vline/vblank, etc. */ 7237 /* vline/vblank, etc. */
7234 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 7238 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
7235 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 7239 WREG32(LB_INTERRUPT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
@@ -7551,6 +7555,9 @@ int cik_irq_set(struct radeon_device *rdev)
7551 WREG32(DC_HPD5_INT_CONTROL, hpd5); 7555 WREG32(DC_HPD5_INT_CONTROL, hpd5);
7552 WREG32(DC_HPD6_INT_CONTROL, hpd6); 7556 WREG32(DC_HPD6_INT_CONTROL, hpd6);
7553 7557
7558 /* posting read */
7559 RREG32(SRBM_STATUS);
7560
7554 return 0; 7561 return 0;
7555} 7562}
7556 7563
@@ -8046,6 +8053,10 @@ restart_ih:
8046 break; 8053 break;
8047 } 8054 }
8048 break; 8055 break;
8056 case 96:
8057 DRM_ERROR("SRBM_READ_ERROR: 0x%x\n", RREG32(SRBM_READ_ERROR));
8058 WREG32(SRBM_INT_ACK, 0x1);
8059 break;
8049 case 124: /* UVD */ 8060 case 124: /* UVD */
8050 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data); 8061 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
8051 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); 8062 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
diff --git a/drivers/gpu/drm/radeon/cikd.h b/drivers/gpu/drm/radeon/cikd.h
index 03003f8a6de6..c648e1996dab 100644
--- a/drivers/gpu/drm/radeon/cikd.h
+++ b/drivers/gpu/drm/radeon/cikd.h
@@ -482,6 +482,10 @@
482#define SOFT_RESET_ORB (1 << 23) 482#define SOFT_RESET_ORB (1 << 23)
483#define SOFT_RESET_VCE (1 << 24) 483#define SOFT_RESET_VCE (1 << 24)
484 484
485#define SRBM_READ_ERROR 0xE98
486#define SRBM_INT_CNTL 0xEA0
487#define SRBM_INT_ACK 0xEA8
488
485#define VM_L2_CNTL 0x1400 489#define VM_L2_CNTL 0x1400
486#define ENABLE_L2_CACHE (1 << 0) 490#define ENABLE_L2_CACHE (1 << 0)
487#define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1) 491#define ENABLE_L2_FRAGMENT_PROCESSING (1 << 1)
diff --git a/drivers/gpu/drm/radeon/dce6_afmt.c b/drivers/gpu/drm/radeon/dce6_afmt.c
index 192c80389151..3adc2afe32aa 100644
--- a/drivers/gpu/drm/radeon/dce6_afmt.c
+++ b/drivers/gpu/drm/radeon/dce6_afmt.c
@@ -26,6 +26,9 @@
26#include "radeon_audio.h" 26#include "radeon_audio.h"
27#include "sid.h" 27#include "sid.h"
28 28
29#define DCE8_DCCG_AUDIO_DTO1_PHASE 0x05b8
30#define DCE8_DCCG_AUDIO_DTO1_MODULE 0x05bc
31
29u32 dce6_endpoint_rreg(struct radeon_device *rdev, 32u32 dce6_endpoint_rreg(struct radeon_device *rdev,
30 u32 block_offset, u32 reg) 33 u32 block_offset, u32 reg)
31{ 34{
@@ -252,72 +255,67 @@ void dce6_audio_enable(struct radeon_device *rdev,
252void dce6_hdmi_audio_set_dto(struct radeon_device *rdev, 255void dce6_hdmi_audio_set_dto(struct radeon_device *rdev,
253 struct radeon_crtc *crtc, unsigned int clock) 256 struct radeon_crtc *crtc, unsigned int clock)
254{ 257{
255 /* Two dtos; generally use dto0 for HDMI */ 258 /* Two dtos; generally use dto0 for HDMI */
256 u32 value = 0; 259 u32 value = 0;
257 260
258 if (crtc) 261 if (crtc)
259 value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id); 262 value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);
260 263
261 WREG32(DCCG_AUDIO_DTO_SOURCE, value); 264 WREG32(DCCG_AUDIO_DTO_SOURCE, value);
262 265
263 /* Express [24MHz / target pixel clock] as an exact rational 266 /* Express [24MHz / target pixel clock] as an exact rational
264 * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE 267 * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE
265 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator 268 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator
266 */ 269 */
267 WREG32(DCCG_AUDIO_DTO0_PHASE, 24000); 270 WREG32(DCCG_AUDIO_DTO0_PHASE, 24000);
268 WREG32(DCCG_AUDIO_DTO0_MODULE, clock); 271 WREG32(DCCG_AUDIO_DTO0_MODULE, clock);
269} 272}
270 273
271void dce6_dp_audio_set_dto(struct radeon_device *rdev, 274void dce6_dp_audio_set_dto(struct radeon_device *rdev,
272 struct radeon_crtc *crtc, unsigned int clock) 275 struct radeon_crtc *crtc, unsigned int clock)
273{ 276{
274 /* Two dtos; generally use dto1 for DP */ 277 /* Two dtos; generally use dto1 for DP */
275 u32 value = 0; 278 u32 value = 0;
276 value |= DCCG_AUDIO_DTO_SEL; 279 value |= DCCG_AUDIO_DTO_SEL;
277 280
278 if (crtc) 281 if (crtc)
279 value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id); 282 value |= DCCG_AUDIO_DTO0_SOURCE_SEL(crtc->crtc_id);
280 283
281 WREG32(DCCG_AUDIO_DTO_SOURCE, value); 284 WREG32(DCCG_AUDIO_DTO_SOURCE, value);
282 285
283 /* Express [24MHz / target pixel clock] as an exact rational 286 /* Express [24MHz / target pixel clock] as an exact rational
284 * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE 287 * number (coefficient of two integer numbers. DCCG_AUDIO_DTOx_PHASE
285 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator 288 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator
286 */ 289 */
287 WREG32(DCCG_AUDIO_DTO1_PHASE, 24000); 290 if (ASIC_IS_DCE8(rdev)) {
288 WREG32(DCCG_AUDIO_DTO1_MODULE, clock); 291 WREG32(DCE8_DCCG_AUDIO_DTO1_PHASE, 24000);
292 WREG32(DCE8_DCCG_AUDIO_DTO1_MODULE, clock);
293 } else {
294 WREG32(DCCG_AUDIO_DTO1_PHASE, 24000);
295 WREG32(DCCG_AUDIO_DTO1_MODULE, clock);
296 }
289} 297}
290 298
291void dce6_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable) 299void dce6_dp_enable(struct drm_encoder *encoder, bool enable)
292{ 300{
293 struct drm_device *dev = encoder->dev; 301 struct drm_device *dev = encoder->dev;
294 struct radeon_device *rdev = dev->dev_private; 302 struct radeon_device *rdev = dev->dev_private;
295 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 303 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
296 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 304 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
297 uint32_t offset;
298 305
299 if (!dig || !dig->afmt) 306 if (!dig || !dig->afmt)
300 return; 307 return;
301 308
302 offset = dig->afmt->offset;
303
304 if (enable) { 309 if (enable) {
305 if (dig->afmt->enabled) 310 WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset,
306 return; 311 EVERGREEN_DP_SEC_TIMESTAMP_MODE(1));
307 312 WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset,
308 WREG32(EVERGREEN_DP_SEC_TIMESTAMP + offset, EVERGREEN_DP_SEC_TIMESTAMP_MODE(1)); 313 EVERGREEN_DP_SEC_ASP_ENABLE | /* Audio packet transmission */
309 WREG32(EVERGREEN_DP_SEC_CNTL + offset, 314 EVERGREEN_DP_SEC_ATP_ENABLE | /* Audio timestamp packet transmission */
310 EVERGREEN_DP_SEC_ASP_ENABLE | /* Audio packet transmission */ 315 EVERGREEN_DP_SEC_AIP_ENABLE | /* Audio infoframe packet transmission */
311 EVERGREEN_DP_SEC_ATP_ENABLE | /* Audio timestamp packet transmission */ 316 EVERGREEN_DP_SEC_STREAM_ENABLE); /* Master enable for secondary stream engine */
312 EVERGREEN_DP_SEC_AIP_ENABLE | /* Audio infoframe packet transmission */
313 EVERGREEN_DP_SEC_STREAM_ENABLE); /* Master enable for secondary stream engine */
314 radeon_audio_enable(rdev, dig->afmt->pin, true);
315 } else { 317 } else {
316 if (!dig->afmt->enabled) 318 WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0);
317 return;
318
319 WREG32(EVERGREEN_DP_SEC_CNTL + offset, 0);
320 radeon_audio_enable(rdev, dig->afmt->pin, false);
321 } 319 }
322 320
323 dig->afmt->enabled = enable; 321 dig->afmt->enabled = enable;
diff --git a/drivers/gpu/drm/radeon/evergreen.c b/drivers/gpu/drm/radeon/evergreen.c
index 78600f534c80..973df064c14f 100644
--- a/drivers/gpu/drm/radeon/evergreen.c
+++ b/drivers/gpu/drm/radeon/evergreen.c
@@ -3253,6 +3253,8 @@ static void evergreen_gpu_init(struct radeon_device *rdev)
3253 } 3253 }
3254 3254
3255 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); 3255 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
3256 WREG32(SRBM_INT_CNTL, 0x1);
3257 WREG32(SRBM_INT_ACK, 0x1);
3256 3258
3257 evergreen_fix_pci_max_read_req_size(rdev); 3259 evergreen_fix_pci_max_read_req_size(rdev);
3258 3260
@@ -4324,6 +4326,7 @@ void evergreen_disable_interrupt_state(struct radeon_device *rdev)
4324 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE; 4326 tmp = RREG32(DMA_CNTL) & ~TRAP_ENABLE;
4325 WREG32(DMA_CNTL, tmp); 4327 WREG32(DMA_CNTL, tmp);
4326 WREG32(GRBM_INT_CNTL, 0); 4328 WREG32(GRBM_INT_CNTL, 0);
4329 WREG32(SRBM_INT_CNTL, 0);
4327 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 4330 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
4328 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 4331 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
4329 if (rdev->num_crtc >= 4) { 4332 if (rdev->num_crtc >= 4) {
@@ -4590,6 +4593,9 @@ int evergreen_irq_set(struct radeon_device *rdev)
4590 WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, afmt5); 4593 WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC4_REGISTER_OFFSET, afmt5);
4591 WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, afmt6); 4594 WREG32(AFMT_AUDIO_PACKET_CONTROL + EVERGREEN_CRTC5_REGISTER_OFFSET, afmt6);
4592 4595
4596 /* posting read */
4597 RREG32(SRBM_STATUS);
4598
4593 return 0; 4599 return 0;
4594} 4600}
4595 4601
@@ -5066,6 +5072,10 @@ restart_ih:
5066 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data); 5072 DRM_ERROR("Unhandled interrupt: %d %d\n", src_id, src_data);
5067 break; 5073 break;
5068 } 5074 }
5075 case 96:
5076 DRM_ERROR("SRBM_READ_ERROR: 0x%x\n", RREG32(SRBM_READ_ERROR));
5077 WREG32(SRBM_INT_ACK, 0x1);
5078 break;
5069 case 124: /* UVD */ 5079 case 124: /* UVD */
5070 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data); 5080 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
5071 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); 5081 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
diff --git a/drivers/gpu/drm/radeon/evergreen_hdmi.c b/drivers/gpu/drm/radeon/evergreen_hdmi.c
index 1d9aebc79595..c18d4ecbd95d 100644
--- a/drivers/gpu/drm/radeon/evergreen_hdmi.c
+++ b/drivers/gpu/drm/radeon/evergreen_hdmi.c
@@ -272,7 +272,7 @@ void dce4_hdmi_audio_set_dto(struct radeon_device *rdev,
272} 272}
273 273
274void dce4_dp_audio_set_dto(struct radeon_device *rdev, 274void dce4_dp_audio_set_dto(struct radeon_device *rdev,
275 struct radeon_crtc *crtc, unsigned int clock) 275 struct radeon_crtc *crtc, unsigned int clock)
276{ 276{
277 u32 value; 277 u32 value;
278 278
@@ -294,7 +294,7 @@ void dce4_dp_audio_set_dto(struct radeon_device *rdev,
294 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator 294 * is the numerator, DCCG_AUDIO_DTOx_MODULE is the denominator
295 */ 295 */
296 WREG32(DCCG_AUDIO_DTO1_PHASE, 24000); 296 WREG32(DCCG_AUDIO_DTO1_PHASE, 24000);
297 WREG32(DCCG_AUDIO_DTO1_MODULE, rdev->clock.max_pixel_clock * 10); 297 WREG32(DCCG_AUDIO_DTO1_MODULE, clock);
298} 298}
299 299
300void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset) 300void dce4_set_vbi_packet(struct drm_encoder *encoder, u32 offset)
@@ -350,20 +350,9 @@ void dce4_set_audio_packet(struct drm_encoder *encoder, u32 offset)
350 struct drm_device *dev = encoder->dev; 350 struct drm_device *dev = encoder->dev;
351 struct radeon_device *rdev = dev->dev_private; 351 struct radeon_device *rdev = dev->dev_private;
352 352
353 WREG32(HDMI_INFOFRAME_CONTROL0 + offset,
354 HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */
355 HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */
356
357 WREG32(AFMT_INFOFRAME_CONTROL0 + offset, 353 WREG32(AFMT_INFOFRAME_CONTROL0 + offset,
358 AFMT_AUDIO_INFO_UPDATE); /* required for audio info values to be updated */ 354 AFMT_AUDIO_INFO_UPDATE); /* required for audio info values to be updated */
359 355
360 WREG32(HDMI_INFOFRAME_CONTROL1 + offset,
361 HDMI_AUDIO_INFO_LINE(2)); /* anything other than 0 */
362
363 WREG32(HDMI_AUDIO_PACKET_CONTROL + offset,
364 HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */
365 HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */
366
367 WREG32(AFMT_60958_0 + offset, 356 WREG32(AFMT_60958_0 + offset,
368 AFMT_60958_CS_CHANNEL_NUMBER_L(1)); 357 AFMT_60958_CS_CHANNEL_NUMBER_L(1));
369 358
@@ -408,15 +397,19 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
408 if (!dig || !dig->afmt) 397 if (!dig || !dig->afmt)
409 return; 398 return;
410 399
411 /* Silent, r600_hdmi_enable will raise WARN for us */ 400 if (enable) {
412 if (enable && dig->afmt->enabled) 401 WREG32(HDMI_INFOFRAME_CONTROL1 + dig->afmt->offset,
413 return; 402 HDMI_AUDIO_INFO_LINE(2)); /* anything other than 0 */
414 if (!enable && !dig->afmt->enabled) 403
415 return; 404 WREG32(HDMI_AUDIO_PACKET_CONTROL + dig->afmt->offset,
405 HDMI_AUDIO_DELAY_EN(1) | /* set the default audio delay */
406 HDMI_AUDIO_PACKETS_PER_LINE(3)); /* should be suffient for all audio modes and small enough for all hblanks */
416 407
417 if (!enable && dig->afmt->pin) { 408 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset,
418 radeon_audio_enable(rdev, dig->afmt->pin, 0); 409 HDMI_AUDIO_INFO_SEND | /* enable audio info frames (frames won't be set until audio is enabled) */
419 dig->afmt->pin = NULL; 410 HDMI_AUDIO_INFO_CONT); /* required for audio info values to be updated */
411 } else {
412 WREG32(HDMI_INFOFRAME_CONTROL0 + dig->afmt->offset, 0);
420 } 413 }
421 414
422 dig->afmt->enabled = enable; 415 dig->afmt->enabled = enable;
@@ -425,33 +418,28 @@ void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable)
425 enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id); 418 enable ? "En" : "Dis", dig->afmt->offset, radeon_encoder->encoder_id);
426} 419}
427 420
428void evergreen_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable) 421void evergreen_dp_enable(struct drm_encoder *encoder, bool enable)
429{ 422{
430 struct drm_device *dev = encoder->dev; 423 struct drm_device *dev = encoder->dev;
431 struct radeon_device *rdev = dev->dev_private; 424 struct radeon_device *rdev = dev->dev_private;
432 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 425 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
433 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 426 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
434 uint32_t offset;
435 427
436 if (!dig || !dig->afmt) 428 if (!dig || !dig->afmt)
437 return; 429 return;
438 430
439 offset = dig->afmt->offset;
440
441 if (enable) { 431 if (enable) {
442 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder); 432 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
443 struct radeon_connector *radeon_connector = to_radeon_connector(connector); 433 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
444 struct radeon_connector_atom_dig *dig_connector; 434 struct radeon_connector_atom_dig *dig_connector;
445 uint32_t val; 435 uint32_t val;
446 436
447 if (dig->afmt->enabled) 437 WREG32(EVERGREEN_DP_SEC_TIMESTAMP + dig->afmt->offset,
448 return; 438 EVERGREEN_DP_SEC_TIMESTAMP_MODE(1));
449
450 WREG32(EVERGREEN_DP_SEC_TIMESTAMP + offset, EVERGREEN_DP_SEC_TIMESTAMP_MODE(1));
451 439
452 if (radeon_connector->con_priv) { 440 if (radeon_connector->con_priv) {
453 dig_connector = radeon_connector->con_priv; 441 dig_connector = radeon_connector->con_priv;
454 val = RREG32(EVERGREEN_DP_SEC_AUD_N + offset); 442 val = RREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset);
455 val &= ~EVERGREEN_DP_SEC_N_BASE_MULTIPLE(0xf); 443 val &= ~EVERGREEN_DP_SEC_N_BASE_MULTIPLE(0xf);
456 444
457 if (dig_connector->dp_clock == 162000) 445 if (dig_connector->dp_clock == 162000)
@@ -459,21 +447,16 @@ void evergreen_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable)
459 else 447 else
460 val |= EVERGREEN_DP_SEC_N_BASE_MULTIPLE(5); 448 val |= EVERGREEN_DP_SEC_N_BASE_MULTIPLE(5);
461 449
462 WREG32(EVERGREEN_DP_SEC_AUD_N + offset, val); 450 WREG32(EVERGREEN_DP_SEC_AUD_N + dig->afmt->offset, val);
463 } 451 }
464 452
465 WREG32(EVERGREEN_DP_SEC_CNTL + offset, 453 WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset,
466 EVERGREEN_DP_SEC_ASP_ENABLE | /* Audio packet transmission */ 454 EVERGREEN_DP_SEC_ASP_ENABLE | /* Audio packet transmission */
467 EVERGREEN_DP_SEC_ATP_ENABLE | /* Audio timestamp packet transmission */ 455 EVERGREEN_DP_SEC_ATP_ENABLE | /* Audio timestamp packet transmission */
468 EVERGREEN_DP_SEC_AIP_ENABLE | /* Audio infoframe packet transmission */ 456 EVERGREEN_DP_SEC_AIP_ENABLE | /* Audio infoframe packet transmission */
469 EVERGREEN_DP_SEC_STREAM_ENABLE); /* Master enable for secondary stream engine */ 457 EVERGREEN_DP_SEC_STREAM_ENABLE); /* Master enable for secondary stream engine */
470 radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
471 } else { 458 } else {
472 if (!dig->afmt->enabled) 459 WREG32(EVERGREEN_DP_SEC_CNTL + dig->afmt->offset, 0);
473 return;
474
475 WREG32(EVERGREEN_DP_SEC_CNTL + offset, 0);
476 radeon_audio_enable(rdev, dig->afmt->pin, 0);
477 } 460 }
478 461
479 dig->afmt->enabled = enable; 462 dig->afmt->enabled = enable;
diff --git a/drivers/gpu/drm/radeon/evergreend.h b/drivers/gpu/drm/radeon/evergreend.h
index ee83d2a88750..a8d1d5240fcb 100644
--- a/drivers/gpu/drm/radeon/evergreend.h
+++ b/drivers/gpu/drm/radeon/evergreend.h
@@ -1191,6 +1191,10 @@
1191#define SOFT_RESET_REGBB (1 << 22) 1191#define SOFT_RESET_REGBB (1 << 22)
1192#define SOFT_RESET_ORB (1 << 23) 1192#define SOFT_RESET_ORB (1 << 23)
1193 1193
1194#define SRBM_READ_ERROR 0xE98
1195#define SRBM_INT_CNTL 0xEA0
1196#define SRBM_INT_ACK 0xEA8
1197
1194/* display watermarks */ 1198/* display watermarks */
1195#define DC_LB_MEMORY_SPLIT 0x6b0c 1199#define DC_LB_MEMORY_SPLIT 0x6b0c
1196#define PRIORITY_A_CNT 0x6b18 1200#define PRIORITY_A_CNT 0x6b18
diff --git a/drivers/gpu/drm/radeon/ni.c b/drivers/gpu/drm/radeon/ni.c
index 24242a7f0ac3..dab00812abaa 100644
--- a/drivers/gpu/drm/radeon/ni.c
+++ b/drivers/gpu/drm/radeon/ni.c
@@ -962,6 +962,8 @@ static void cayman_gpu_init(struct radeon_device *rdev)
962 } 962 }
963 963
964 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); 964 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
965 WREG32(SRBM_INT_CNTL, 0x1);
966 WREG32(SRBM_INT_ACK, 0x1);
965 967
966 evergreen_fix_pci_max_read_req_size(rdev); 968 evergreen_fix_pci_max_read_req_size(rdev);
967 969
@@ -1086,12 +1088,12 @@ static void cayman_gpu_init(struct radeon_device *rdev)
1086 1088
1087 if ((rdev->config.cayman.max_backends_per_se == 1) && 1089 if ((rdev->config.cayman.max_backends_per_se == 1) &&
1088 (rdev->flags & RADEON_IS_IGP)) { 1090 (rdev->flags & RADEON_IS_IGP)) {
1089 if ((disabled_rb_mask & 3) == 1) { 1091 if ((disabled_rb_mask & 3) == 2) {
1090 /* RB0 disabled, RB1 enabled */
1091 tmp = 0x11111111;
1092 } else {
1093 /* RB1 disabled, RB0 enabled */ 1092 /* RB1 disabled, RB0 enabled */
1094 tmp = 0x00000000; 1093 tmp = 0x00000000;
1094 } else {
1095 /* RB0 disabled, RB1 enabled */
1096 tmp = 0x11111111;
1095 } 1097 }
1096 } else { 1098 } else {
1097 tmp = gb_addr_config & NUM_PIPES_MASK; 1099 tmp = gb_addr_config & NUM_PIPES_MASK;
diff --git a/drivers/gpu/drm/radeon/nid.h b/drivers/gpu/drm/radeon/nid.h
index ad7125486894..6b44580440d0 100644
--- a/drivers/gpu/drm/radeon/nid.h
+++ b/drivers/gpu/drm/radeon/nid.h
@@ -82,6 +82,10 @@
82#define SOFT_RESET_REGBB (1 << 22) 82#define SOFT_RESET_REGBB (1 << 22)
83#define SOFT_RESET_ORB (1 << 23) 83#define SOFT_RESET_ORB (1 << 23)
84 84
85#define SRBM_READ_ERROR 0xE98
86#define SRBM_INT_CNTL 0xEA0
87#define SRBM_INT_ACK 0xEA8
88
85#define SRBM_STATUS2 0x0EC4 89#define SRBM_STATUS2 0x0EC4
86#define DMA_BUSY (1 << 5) 90#define DMA_BUSY (1 << 5)
87#define DMA1_BUSY (1 << 6) 91#define DMA1_BUSY (1 << 6)
diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 279801ca5110..04f2514f7564 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -728,6 +728,10 @@ int r100_irq_set(struct radeon_device *rdev)
728 tmp |= RADEON_FP2_DETECT_MASK; 728 tmp |= RADEON_FP2_DETECT_MASK;
729 } 729 }
730 WREG32(RADEON_GEN_INT_CNTL, tmp); 730 WREG32(RADEON_GEN_INT_CNTL, tmp);
731
732 /* read back to post the write */
733 RREG32(RADEON_GEN_INT_CNTL);
734
731 return 0; 735 return 0;
732} 736}
733 737
diff --git a/drivers/gpu/drm/radeon/r600.c b/drivers/gpu/drm/radeon/r600.c
index 07a71a2488c9..2fcad344492f 100644
--- a/drivers/gpu/drm/radeon/r600.c
+++ b/drivers/gpu/drm/radeon/r600.c
@@ -3784,6 +3784,9 @@ int r600_irq_set(struct radeon_device *rdev)
3784 WREG32(RV770_CG_THERMAL_INT, thermal_int); 3784 WREG32(RV770_CG_THERMAL_INT, thermal_int);
3785 } 3785 }
3786 3786
3787 /* posting read */
3788 RREG32(R_000E50_SRBM_STATUS);
3789
3787 return 0; 3790 return 0;
3788} 3791}
3789 3792
diff --git a/drivers/gpu/drm/radeon/r600_dpm.c b/drivers/gpu/drm/radeon/r600_dpm.c
index 843b65f46ece..fa2154493cf1 100644
--- a/drivers/gpu/drm/radeon/r600_dpm.c
+++ b/drivers/gpu/drm/radeon/r600_dpm.c
@@ -188,7 +188,7 @@ u32 r600_dpm_get_vrefresh(struct radeon_device *rdev)
188 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) { 188 list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
189 radeon_crtc = to_radeon_crtc(crtc); 189 radeon_crtc = to_radeon_crtc(crtc);
190 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) { 190 if (crtc->enabled && radeon_crtc->enabled && radeon_crtc->hw_mode.clock) {
191 vrefresh = radeon_crtc->hw_mode.vrefresh; 191 vrefresh = drm_mode_vrefresh(&radeon_crtc->hw_mode);
192 break; 192 break;
193 } 193 }
194 } 194 }
diff --git a/drivers/gpu/drm/radeon/r600_hdmi.c b/drivers/gpu/drm/radeon/r600_hdmi.c
index 62c91ed669ce..dd6606b8e23c 100644
--- a/drivers/gpu/drm/radeon/r600_hdmi.c
+++ b/drivers/gpu/drm/radeon/r600_hdmi.c
@@ -476,17 +476,6 @@ void r600_hdmi_enable(struct drm_encoder *encoder, bool enable)
476 if (!dig || !dig->afmt) 476 if (!dig || !dig->afmt)
477 return; 477 return;
478 478
479 /* Silent, r600_hdmi_enable will raise WARN for us */
480 if (enable && dig->afmt->enabled)
481 return;
482 if (!enable && !dig->afmt->enabled)
483 return;
484
485 if (!enable && dig->afmt->pin) {
486 radeon_audio_enable(rdev, dig->afmt->pin, 0);
487 dig->afmt->pin = NULL;
488 }
489
490 /* Older chipsets require setting HDMI and routing manually */ 479 /* Older chipsets require setting HDMI and routing manually */
491 if (!ASIC_IS_DCE3(rdev)) { 480 if (!ASIC_IS_DCE3(rdev)) {
492 if (enable) 481 if (enable)
diff --git a/drivers/gpu/drm/radeon/radeon_audio.c b/drivers/gpu/drm/radeon/radeon_audio.c
index a3ceef6d9632..b21ef69a34ac 100644
--- a/drivers/gpu/drm/radeon/radeon_audio.c
+++ b/drivers/gpu/drm/radeon/radeon_audio.c
@@ -101,8 +101,8 @@ static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
101 struct drm_display_mode *mode); 101 struct drm_display_mode *mode);
102void r600_hdmi_enable(struct drm_encoder *encoder, bool enable); 102void r600_hdmi_enable(struct drm_encoder *encoder, bool enable);
103void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable); 103void evergreen_hdmi_enable(struct drm_encoder *encoder, bool enable);
104void evergreen_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable); 104void evergreen_dp_enable(struct drm_encoder *encoder, bool enable);
105void dce6_enable_dp_audio_packets(struct drm_encoder *encoder, bool enable); 105void dce6_dp_enable(struct drm_encoder *encoder, bool enable);
106 106
107static const u32 pin_offsets[7] = 107static const u32 pin_offsets[7] =
108{ 108{
@@ -210,7 +210,7 @@ static struct radeon_audio_funcs dce4_dp_funcs = {
210 .set_avi_packet = evergreen_set_avi_packet, 210 .set_avi_packet = evergreen_set_avi_packet,
211 .set_audio_packet = dce4_set_audio_packet, 211 .set_audio_packet = dce4_set_audio_packet,
212 .mode_set = radeon_audio_dp_mode_set, 212 .mode_set = radeon_audio_dp_mode_set,
213 .dpms = evergreen_enable_dp_audio_packets, 213 .dpms = evergreen_dp_enable,
214}; 214};
215 215
216static struct radeon_audio_funcs dce6_hdmi_funcs = { 216static struct radeon_audio_funcs dce6_hdmi_funcs = {
@@ -240,7 +240,7 @@ static struct radeon_audio_funcs dce6_dp_funcs = {
240 .set_avi_packet = evergreen_set_avi_packet, 240 .set_avi_packet = evergreen_set_avi_packet,
241 .set_audio_packet = dce4_set_audio_packet, 241 .set_audio_packet = dce4_set_audio_packet,
242 .mode_set = radeon_audio_dp_mode_set, 242 .mode_set = radeon_audio_dp_mode_set,
243 .dpms = dce6_enable_dp_audio_packets, 243 .dpms = dce6_dp_enable,
244}; 244};
245 245
246static void radeon_audio_interface_init(struct radeon_device *rdev) 246static void radeon_audio_interface_init(struct radeon_device *rdev)
@@ -452,7 +452,7 @@ void radeon_audio_enable(struct radeon_device *rdev,
452} 452}
453 453
454void radeon_audio_detect(struct drm_connector *connector, 454void radeon_audio_detect(struct drm_connector *connector,
455 enum drm_connector_status status) 455 enum drm_connector_status status)
456{ 456{
457 struct radeon_device *rdev; 457 struct radeon_device *rdev;
458 struct radeon_encoder *radeon_encoder; 458 struct radeon_encoder *radeon_encoder;
@@ -483,14 +483,11 @@ void radeon_audio_detect(struct drm_connector *connector,
483 else 483 else
484 radeon_encoder->audio = rdev->audio.hdmi_funcs; 484 radeon_encoder->audio = rdev->audio.hdmi_funcs;
485 485
486 radeon_audio_write_speaker_allocation(connector->encoder); 486 dig->afmt->pin = radeon_audio_get_pin(connector->encoder);
487 radeon_audio_write_sad_regs(connector->encoder);
488 if (connector->encoder->crtc)
489 radeon_audio_write_latency_fields(connector->encoder,
490 &connector->encoder->crtc->mode);
491 radeon_audio_enable(rdev, dig->afmt->pin, 0xf); 487 radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
492 } else { 488 } else {
493 radeon_audio_enable(rdev, dig->afmt->pin, 0); 489 radeon_audio_enable(rdev, dig->afmt->pin, 0);
490 dig->afmt->pin = NULL;
494 } 491 }
495} 492}
496 493
@@ -694,23 +691,22 @@ static void radeon_audio_set_mute(struct drm_encoder *encoder, bool mute)
694 * update the info frames with the data from the current display mode 691 * update the info frames with the data from the current display mode
695 */ 692 */
696static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder, 693static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
697 struct drm_display_mode *mode) 694 struct drm_display_mode *mode)
698{ 695{
699 struct radeon_device *rdev = encoder->dev->dev_private;
700 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 696 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
701 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 697 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
702 698
703 if (!dig || !dig->afmt) 699 if (!dig || !dig->afmt)
704 return; 700 return;
705 701
706 /* disable audio prior to setting up hw */ 702 radeon_audio_set_mute(encoder, true);
707 dig->afmt->pin = radeon_audio_get_pin(encoder);
708 radeon_audio_enable(rdev, dig->afmt->pin, 0);
709 703
704 radeon_audio_write_speaker_allocation(encoder);
705 radeon_audio_write_sad_regs(encoder);
706 radeon_audio_write_latency_fields(encoder, mode);
710 radeon_audio_set_dto(encoder, mode->clock); 707 radeon_audio_set_dto(encoder, mode->clock);
711 radeon_audio_set_vbi_packet(encoder); 708 radeon_audio_set_vbi_packet(encoder);
712 radeon_hdmi_set_color_depth(encoder); 709 radeon_hdmi_set_color_depth(encoder);
713 radeon_audio_set_mute(encoder, false);
714 radeon_audio_update_acr(encoder, mode->clock); 710 radeon_audio_update_acr(encoder, mode->clock);
715 radeon_audio_set_audio_packet(encoder); 711 radeon_audio_set_audio_packet(encoder);
716 radeon_audio_select_pin(encoder); 712 radeon_audio_select_pin(encoder);
@@ -718,8 +714,7 @@ static void radeon_audio_hdmi_mode_set(struct drm_encoder *encoder,
718 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 714 if (radeon_audio_set_avi_packet(encoder, mode) < 0)
719 return; 715 return;
720 716
721 /* enable audio after to setting up hw */ 717 radeon_audio_set_mute(encoder, false);
722 radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
723} 718}
724 719
725static void radeon_audio_dp_mode_set(struct drm_encoder *encoder, 720static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
@@ -729,23 +724,26 @@ static void radeon_audio_dp_mode_set(struct drm_encoder *encoder,
729 struct radeon_device *rdev = dev->dev_private; 724 struct radeon_device *rdev = dev->dev_private;
730 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder); 725 struct radeon_encoder *radeon_encoder = to_radeon_encoder(encoder);
731 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv; 726 struct radeon_encoder_atom_dig *dig = radeon_encoder->enc_priv;
727 struct drm_connector *connector = radeon_get_connector_for_encoder(encoder);
728 struct radeon_connector *radeon_connector = to_radeon_connector(connector);
729 struct radeon_connector_atom_dig *dig_connector =
730 radeon_connector->con_priv;
732 731
733 if (!dig || !dig->afmt) 732 if (!dig || !dig->afmt)
734 return; 733 return;
735 734
736 /* disable audio prior to setting up hw */ 735 radeon_audio_write_speaker_allocation(encoder);
737 dig->afmt->pin = radeon_audio_get_pin(encoder); 736 radeon_audio_write_sad_regs(encoder);
738 radeon_audio_enable(rdev, dig->afmt->pin, 0); 737 radeon_audio_write_latency_fields(encoder, mode);
739 738 if (rdev->clock.dp_extclk || ASIC_IS_DCE5(rdev))
740 radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10); 739 radeon_audio_set_dto(encoder, rdev->clock.default_dispclk * 10);
740 else
741 radeon_audio_set_dto(encoder, dig_connector->dp_clock);
741 radeon_audio_set_audio_packet(encoder); 742 radeon_audio_set_audio_packet(encoder);
742 radeon_audio_select_pin(encoder); 743 radeon_audio_select_pin(encoder);
743 744
744 if (radeon_audio_set_avi_packet(encoder, mode) < 0) 745 if (radeon_audio_set_avi_packet(encoder, mode) < 0)
745 return; 746 return;
746
747 /* enable audio after to setting up hw */
748 radeon_audio_enable(rdev, dig->afmt->pin, 0xf);
749} 747}
750 748
751void radeon_audio_mode_set(struct drm_encoder *encoder, 749void radeon_audio_mode_set(struct drm_encoder *encoder,
diff --git a/drivers/gpu/drm/radeon/radeon_cs.c b/drivers/gpu/drm/radeon/radeon_cs.c
index c830863bc98a..4d0f96cc3da4 100644
--- a/drivers/gpu/drm/radeon/radeon_cs.c
+++ b/drivers/gpu/drm/radeon/radeon_cs.c
@@ -256,11 +256,13 @@ int radeon_cs_parser_init(struct radeon_cs_parser *p, void *data)
256 u32 ring = RADEON_CS_RING_GFX; 256 u32 ring = RADEON_CS_RING_GFX;
257 s32 priority = 0; 257 s32 priority = 0;
258 258
259 INIT_LIST_HEAD(&p->validated);
260
259 if (!cs->num_chunks) { 261 if (!cs->num_chunks) {
260 return 0; 262 return 0;
261 } 263 }
264
262 /* get chunks */ 265 /* get chunks */
263 INIT_LIST_HEAD(&p->validated);
264 p->idx = 0; 266 p->idx = 0;
265 p->ib.sa_bo = NULL; 267 p->ib.sa_bo = NULL;
266 p->const_ib.sa_bo = NULL; 268 p->const_ib.sa_bo = NULL;
@@ -715,6 +717,7 @@ int radeon_cs_packet_parse(struct radeon_cs_parser *p,
715 struct radeon_cs_chunk *ib_chunk = p->chunk_ib; 717 struct radeon_cs_chunk *ib_chunk = p->chunk_ib;
716 struct radeon_device *rdev = p->rdev; 718 struct radeon_device *rdev = p->rdev;
717 uint32_t header; 719 uint32_t header;
720 int ret = 0, i;
718 721
719 if (idx >= ib_chunk->length_dw) { 722 if (idx >= ib_chunk->length_dw) {
720 DRM_ERROR("Can not parse packet at %d after CS end %d !\n", 723 DRM_ERROR("Can not parse packet at %d after CS end %d !\n",
@@ -743,14 +746,25 @@ int radeon_cs_packet_parse(struct radeon_cs_parser *p,
743 break; 746 break;
744 default: 747 default:
745 DRM_ERROR("Unknown packet type %d at %d !\n", pkt->type, idx); 748 DRM_ERROR("Unknown packet type %d at %d !\n", pkt->type, idx);
746 return -EINVAL; 749 ret = -EINVAL;
750 goto dump_ib;
747 } 751 }
748 if ((pkt->count + 1 + pkt->idx) >= ib_chunk->length_dw) { 752 if ((pkt->count + 1 + pkt->idx) >= ib_chunk->length_dw) {
749 DRM_ERROR("Packet (%d:%d:%d) end after CS buffer (%d) !\n", 753 DRM_ERROR("Packet (%d:%d:%d) end after CS buffer (%d) !\n",
750 pkt->idx, pkt->type, pkt->count, ib_chunk->length_dw); 754 pkt->idx, pkt->type, pkt->count, ib_chunk->length_dw);
751 return -EINVAL; 755 ret = -EINVAL;
756 goto dump_ib;
752 } 757 }
753 return 0; 758 return 0;
759
760dump_ib:
761 for (i = 0; i < ib_chunk->length_dw; i++) {
762 if (i == idx)
763 printk("\t0x%08x <---\n", radeon_get_ib_value(p, i));
764 else
765 printk("\t0x%08x\n", radeon_get_ib_value(p, i));
766 }
767 return ret;
754} 768}
755 769
756/** 770/**
diff --git a/drivers/gpu/drm/radeon/radeon_encoders.c b/drivers/gpu/drm/radeon/radeon_encoders.c
index 6b670b0bc47b..3a297037cc17 100644
--- a/drivers/gpu/drm/radeon/radeon_encoders.c
+++ b/drivers/gpu/drm/radeon/radeon_encoders.c
@@ -179,9 +179,12 @@ static void radeon_encoder_add_backlight(struct radeon_encoder *radeon_encoder,
179 (rdev->pdev->subsystem_vendor == 0x1734) && 179 (rdev->pdev->subsystem_vendor == 0x1734) &&
180 (rdev->pdev->subsystem_device == 0x1107)) 180 (rdev->pdev->subsystem_device == 0x1107))
181 use_bl = false; 181 use_bl = false;
182/* Older PPC macs use on-GPU backlight controller */
183#ifndef CONFIG_PPC_PMAC
182 /* disable native backlight control on older asics */ 184 /* disable native backlight control on older asics */
183 else if (rdev->family < CHIP_R600) 185 else if (rdev->family < CHIP_R600)
184 use_bl = false; 186 use_bl = false;
187#endif
185 else 188 else
186 use_bl = true; 189 use_bl = true;
187 } 190 }
diff --git a/drivers/gpu/drm/radeon/radeon_fence.c b/drivers/gpu/drm/radeon/radeon_fence.c
index d13d1b5a859f..df09ca7c4889 100644
--- a/drivers/gpu/drm/radeon/radeon_fence.c
+++ b/drivers/gpu/drm/radeon/radeon_fence.c
@@ -1030,37 +1030,59 @@ static inline bool radeon_test_signaled(struct radeon_fence *fence)
1030 return test_bit(FENCE_FLAG_SIGNALED_BIT, &fence->base.flags); 1030 return test_bit(FENCE_FLAG_SIGNALED_BIT, &fence->base.flags);
1031} 1031}
1032 1032
1033struct radeon_wait_cb {
1034 struct fence_cb base;
1035 struct task_struct *task;
1036};
1037
1038static void
1039radeon_fence_wait_cb(struct fence *fence, struct fence_cb *cb)
1040{
1041 struct radeon_wait_cb *wait =
1042 container_of(cb, struct radeon_wait_cb, base);
1043
1044 wake_up_process(wait->task);
1045}
1046
1033static signed long radeon_fence_default_wait(struct fence *f, bool intr, 1047static signed long radeon_fence_default_wait(struct fence *f, bool intr,
1034 signed long t) 1048 signed long t)
1035{ 1049{
1036 struct radeon_fence *fence = to_radeon_fence(f); 1050 struct radeon_fence *fence = to_radeon_fence(f);
1037 struct radeon_device *rdev = fence->rdev; 1051 struct radeon_device *rdev = fence->rdev;
1038 bool signaled; 1052 struct radeon_wait_cb cb;
1039 1053
1040 fence_enable_sw_signaling(&fence->base); 1054 cb.task = current;
1041 1055
1042 /* 1056 if (fence_add_callback(f, &cb.base, radeon_fence_wait_cb))
1043 * This function has to return -EDEADLK, but cannot hold 1057 return t;
1044 * exclusive_lock during the wait because some callers 1058
1045 * may already hold it. This means checking needs_reset without 1059 while (t > 0) {
1046 * lock, and not fiddling with any gpu internals. 1060 if (intr)
1047 * 1061 set_current_state(TASK_INTERRUPTIBLE);
1048 * The callback installed with fence_enable_sw_signaling will 1062 else
1049 * run before our wait_event_*timeout call, so we will see 1063 set_current_state(TASK_UNINTERRUPTIBLE);
1050 * both the signaled fence and the changes to needs_reset. 1064
1051 */ 1065 /*
1066 * radeon_test_signaled must be called after
1067 * set_current_state to prevent a race with wake_up_process
1068 */
1069 if (radeon_test_signaled(fence))
1070 break;
1071
1072 if (rdev->needs_reset) {
1073 t = -EDEADLK;
1074 break;
1075 }
1076
1077 t = schedule_timeout(t);
1078
1079 if (t > 0 && intr && signal_pending(current))
1080 t = -ERESTARTSYS;
1081 }
1082
1083 __set_current_state(TASK_RUNNING);
1084 fence_remove_callback(f, &cb.base);
1052 1085
1053 if (intr)
1054 t = wait_event_interruptible_timeout(rdev->fence_queue,
1055 ((signaled = radeon_test_signaled(fence)) ||
1056 rdev->needs_reset), t);
1057 else
1058 t = wait_event_timeout(rdev->fence_queue,
1059 ((signaled = radeon_test_signaled(fence)) ||
1060 rdev->needs_reset), t);
1061
1062 if (t > 0 && !signaled)
1063 return -EDEADLK;
1064 return t; 1086 return t;
1065} 1087}
1066 1088
diff --git a/drivers/gpu/drm/radeon/radeon_kfd.c b/drivers/gpu/drm/radeon/radeon_kfd.c
index 061eaa9c19c7..122eb5693ba1 100644
--- a/drivers/gpu/drm/radeon/radeon_kfd.c
+++ b/drivers/gpu/drm/radeon/radeon_kfd.c
@@ -153,7 +153,7 @@ void radeon_kfd_device_init(struct radeon_device *rdev)
153 .compute_vmid_bitmap = 0xFF00, 153 .compute_vmid_bitmap = 0xFF00,
154 154
155 .first_compute_pipe = 1, 155 .first_compute_pipe = 1,
156 .compute_pipe_count = 8 - 1, 156 .compute_pipe_count = 4 - 1,
157 }; 157 };
158 158
159 radeon_doorbell_get_kfd_info(rdev, 159 radeon_doorbell_get_kfd_info(rdev,
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c
index 43e09942823e..318165d4855c 100644
--- a/drivers/gpu/drm/radeon/radeon_object.c
+++ b/drivers/gpu/drm/radeon/radeon_object.c
@@ -173,17 +173,6 @@ void radeon_ttm_placement_from_domain(struct radeon_bo *rbo, u32 domain)
173 else 173 else
174 rbo->placements[i].lpfn = 0; 174 rbo->placements[i].lpfn = 0;
175 } 175 }
176
177 /*
178 * Use two-ended allocation depending on the buffer size to
179 * improve fragmentation quality.
180 * 512kb was measured as the most optimal number.
181 */
182 if (rbo->tbo.mem.size > 512 * 1024) {
183 for (i = 0; i < c; i++) {
184 rbo->placements[i].flags |= TTM_PL_FLAG_TOPDOWN;
185 }
186 }
187} 176}
188 177
189int radeon_bo_create(struct radeon_device *rdev, 178int radeon_bo_create(struct radeon_device *rdev,
diff --git a/drivers/gpu/drm/radeon/radeon_pm.c b/drivers/gpu/drm/radeon/radeon_pm.c
index 9f758d39420d..33cf4108386d 100644
--- a/drivers/gpu/drm/radeon/radeon_pm.c
+++ b/drivers/gpu/drm/radeon/radeon_pm.c
@@ -852,6 +852,12 @@ static struct radeon_ps *radeon_dpm_pick_power_state(struct radeon_device *rdev,
852 single_display = false; 852 single_display = false;
853 } 853 }
854 854
855 /* 120hz tends to be problematic even if they are under the
856 * vblank limit.
857 */
858 if (single_display && (r600_dpm_get_vrefresh(rdev) >= 120))
859 single_display = false;
860
855 /* certain older asics have a separare 3D performance state, 861 /* certain older asics have a separare 3D performance state,
856 * so try that first if the user selected performance 862 * so try that first if the user selected performance
857 */ 863 */
diff --git a/drivers/gpu/drm/radeon/rs600.c b/drivers/gpu/drm/radeon/rs600.c
index d81182ad53ec..97a904835759 100644
--- a/drivers/gpu/drm/radeon/rs600.c
+++ b/drivers/gpu/drm/radeon/rs600.c
@@ -694,6 +694,10 @@ int rs600_irq_set(struct radeon_device *rdev)
694 WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, hpd2); 694 WREG32(R_007D18_DC_HOT_PLUG_DETECT2_INT_CONTROL, hpd2);
695 if (ASIC_IS_DCE2(rdev)) 695 if (ASIC_IS_DCE2(rdev))
696 WREG32(R_007408_HDMI0_AUDIO_PACKET_CONTROL, hdmi0); 696 WREG32(R_007408_HDMI0_AUDIO_PACKET_CONTROL, hdmi0);
697
698 /* posting read */
699 RREG32(R_000040_GEN_INT_CNTL);
700
697 return 0; 701 return 0;
698} 702}
699 703
diff --git a/drivers/gpu/drm/radeon/si.c b/drivers/gpu/drm/radeon/si.c
index 73107fe9e46f..a7fb2735d4a9 100644
--- a/drivers/gpu/drm/radeon/si.c
+++ b/drivers/gpu/drm/radeon/si.c
@@ -3162,6 +3162,8 @@ static void si_gpu_init(struct radeon_device *rdev)
3162 } 3162 }
3163 3163
3164 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff)); 3164 WREG32(GRBM_CNTL, GRBM_READ_TIMEOUT(0xff));
3165 WREG32(SRBM_INT_CNTL, 1);
3166 WREG32(SRBM_INT_ACK, 1);
3165 3167
3166 evergreen_fix_pci_max_read_req_size(rdev); 3168 evergreen_fix_pci_max_read_req_size(rdev);
3167 3169
@@ -4699,12 +4701,6 @@ int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib)
4699 switch (pkt.type) { 4701 switch (pkt.type) {
4700 case RADEON_PACKET_TYPE0: 4702 case RADEON_PACKET_TYPE0:
4701 dev_err(rdev->dev, "Packet0 not allowed!\n"); 4703 dev_err(rdev->dev, "Packet0 not allowed!\n");
4702 for (i = 0; i < ib->length_dw; i++) {
4703 if (i == idx)
4704 printk("\t0x%08x <---\n", ib->ptr[i]);
4705 else
4706 printk("\t0x%08x\n", ib->ptr[i]);
4707 }
4708 ret = -EINVAL; 4704 ret = -EINVAL;
4709 break; 4705 break;
4710 case RADEON_PACKET_TYPE2: 4706 case RADEON_PACKET_TYPE2:
@@ -4736,8 +4732,15 @@ int si_ib_parse(struct radeon_device *rdev, struct radeon_ib *ib)
4736 ret = -EINVAL; 4732 ret = -EINVAL;
4737 break; 4733 break;
4738 } 4734 }
4739 if (ret) 4735 if (ret) {
4736 for (i = 0; i < ib->length_dw; i++) {
4737 if (i == idx)
4738 printk("\t0x%08x <---\n", ib->ptr[i]);
4739 else
4740 printk("\t0x%08x\n", ib->ptr[i]);
4741 }
4740 break; 4742 break;
4743 }
4741 } while (idx < ib->length_dw); 4744 } while (idx < ib->length_dw);
4742 4745
4743 return ret; 4746 return ret;
@@ -5910,6 +5913,7 @@ static void si_disable_interrupt_state(struct radeon_device *rdev)
5910 tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE; 5913 tmp = RREG32(DMA_CNTL + DMA1_REGISTER_OFFSET) & ~TRAP_ENABLE;
5911 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, tmp); 5914 WREG32(DMA_CNTL + DMA1_REGISTER_OFFSET, tmp);
5912 WREG32(GRBM_INT_CNTL, 0); 5915 WREG32(GRBM_INT_CNTL, 0);
5916 WREG32(SRBM_INT_CNTL, 0);
5913 if (rdev->num_crtc >= 2) { 5917 if (rdev->num_crtc >= 2) {
5914 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0); 5918 WREG32(INT_MASK + EVERGREEN_CRTC0_REGISTER_OFFSET, 0);
5915 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0); 5919 WREG32(INT_MASK + EVERGREEN_CRTC1_REGISTER_OFFSET, 0);
@@ -6199,6 +6203,9 @@ int si_irq_set(struct radeon_device *rdev)
6199 6203
6200 WREG32(CG_THERMAL_INT, thermal_int); 6204 WREG32(CG_THERMAL_INT, thermal_int);
6201 6205
6206 /* posting read */
6207 RREG32(SRBM_STATUS);
6208
6202 return 0; 6209 return 0;
6203} 6210}
6204 6211
@@ -6609,6 +6616,10 @@ restart_ih:
6609 break; 6616 break;
6610 } 6617 }
6611 break; 6618 break;
6619 case 96:
6620 DRM_ERROR("SRBM_READ_ERROR: 0x%x\n", RREG32(SRBM_READ_ERROR));
6621 WREG32(SRBM_INT_ACK, 0x1);
6622 break;
6612 case 124: /* UVD */ 6623 case 124: /* UVD */
6613 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data); 6624 DRM_DEBUG("IH: UVD int: 0x%08x\n", src_data);
6614 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX); 6625 radeon_fence_process(rdev, R600_RING_TYPE_UVD_INDEX);
@@ -7119,8 +7130,7 @@ int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk)
7119 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK); 7130 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_BYPASS_EN_MASK, ~UPLL_BYPASS_EN_MASK);
7120 7131
7121 if (!vclk || !dclk) { 7132 if (!vclk || !dclk) {
7122 /* keep the Bypass mode, put PLL to sleep */ 7133 /* keep the Bypass mode */
7123 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_SLEEP_MASK, ~UPLL_SLEEP_MASK);
7124 return 0; 7134 return 0;
7125 } 7135 }
7126 7136
@@ -7136,8 +7146,7 @@ int si_set_uvd_clocks(struct radeon_device *rdev, u32 vclk, u32 dclk)
7136 /* set VCO_MODE to 1 */ 7146 /* set VCO_MODE to 1 */
7137 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_VCO_MODE_MASK, ~UPLL_VCO_MODE_MASK); 7147 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_VCO_MODE_MASK, ~UPLL_VCO_MODE_MASK);
7138 7148
7139 /* toggle UPLL_SLEEP to 1 then back to 0 */ 7149 /* disable sleep mode */
7140 WREG32_P(CG_UPLL_FUNC_CNTL, UPLL_SLEEP_MASK, ~UPLL_SLEEP_MASK);
7141 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_SLEEP_MASK); 7150 WREG32_P(CG_UPLL_FUNC_CNTL, 0, ~UPLL_SLEEP_MASK);
7142 7151
7143 /* deassert UPLL_RESET */ 7152 /* deassert UPLL_RESET */
diff --git a/drivers/gpu/drm/radeon/sid.h b/drivers/gpu/drm/radeon/sid.h
index cbd91d226f3c..99a9835c9f61 100644
--- a/drivers/gpu/drm/radeon/sid.h
+++ b/drivers/gpu/drm/radeon/sid.h
@@ -358,6 +358,10 @@
358#define CC_SYS_RB_BACKEND_DISABLE 0xe80 358#define CC_SYS_RB_BACKEND_DISABLE 0xe80
359#define GC_USER_SYS_RB_BACKEND_DISABLE 0xe84 359#define GC_USER_SYS_RB_BACKEND_DISABLE 0xe84
360 360
361#define SRBM_READ_ERROR 0xE98
362#define SRBM_INT_CNTL 0xEA0
363#define SRBM_INT_ACK 0xEA8
364
361#define SRBM_STATUS2 0x0EC4 365#define SRBM_STATUS2 0x0EC4
362#define DMA_BUSY (1 << 5) 366#define DMA_BUSY (1 << 5)
363#define DMA1_BUSY (1 << 6) 367#define DMA1_BUSY (1 << 6)
@@ -908,8 +912,8 @@
908 912
909#define DCCG_AUDIO_DTO0_PHASE 0x05b0 913#define DCCG_AUDIO_DTO0_PHASE 0x05b0
910#define DCCG_AUDIO_DTO0_MODULE 0x05b4 914#define DCCG_AUDIO_DTO0_MODULE 0x05b4
911#define DCCG_AUDIO_DTO1_PHASE 0x05b8 915#define DCCG_AUDIO_DTO1_PHASE 0x05c0
912#define DCCG_AUDIO_DTO1_MODULE 0x05bc 916#define DCCG_AUDIO_DTO1_MODULE 0x05c4
913 917
914#define AFMT_AUDIO_SRC_CONTROL 0x713c 918#define AFMT_AUDIO_SRC_CONTROL 0x713c
915#define AFMT_AUDIO_SRC_SELECT(x) (((x) & 7) << 0) 919#define AFMT_AUDIO_SRC_SELECT(x) (((x) & 7) << 0)
diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c
index 3aaa84ae2681..1a52522f5da7 100644
--- a/drivers/gpu/drm/tegra/dc.c
+++ b/drivers/gpu/drm/tegra/dc.c
@@ -997,8 +997,10 @@ static void tegra_crtc_reset(struct drm_crtc *crtc)
997 crtc->state = NULL; 997 crtc->state = NULL;
998 998
999 state = kzalloc(sizeof(*state), GFP_KERNEL); 999 state = kzalloc(sizeof(*state), GFP_KERNEL);
1000 if (state) 1000 if (state) {
1001 crtc->state = &state->base; 1001 crtc->state = &state->base;
1002 crtc->state->crtc = crtc;
1003 }
1002} 1004}
1003 1005
1004static struct drm_crtc_state * 1006static struct drm_crtc_state *
@@ -1012,6 +1014,7 @@ tegra_crtc_atomic_duplicate_state(struct drm_crtc *crtc)
1012 return NULL; 1014 return NULL;
1013 1015
1014 copy->base.mode_changed = false; 1016 copy->base.mode_changed = false;
1017 copy->base.active_changed = false;
1015 copy->base.planes_changed = false; 1018 copy->base.planes_changed = false;
1016 copy->base.event = NULL; 1019 copy->base.event = NULL;
1017 1020
@@ -1227,9 +1230,6 @@ static void tegra_crtc_mode_set_nofb(struct drm_crtc *crtc)
1227 /* program display mode */ 1230 /* program display mode */
1228 tegra_dc_set_timings(dc, mode); 1231 tegra_dc_set_timings(dc, mode);
1229 1232
1230 if (dc->soc->supports_border_color)
1231 tegra_dc_writel(dc, 0, DC_DISP_BORDER_COLOR);
1232
1233 /* interlacing isn't supported yet, so disable it */ 1233 /* interlacing isn't supported yet, so disable it */
1234 if (dc->soc->supports_interlacing) { 1234 if (dc->soc->supports_interlacing) {
1235 value = tegra_dc_readl(dc, DC_DISP_INTERLACE_CONTROL); 1235 value = tegra_dc_readl(dc, DC_DISP_INTERLACE_CONTROL);
@@ -1252,42 +1252,7 @@ static void tegra_crtc_mode_set_nofb(struct drm_crtc *crtc)
1252 1252
1253static void tegra_crtc_prepare(struct drm_crtc *crtc) 1253static void tegra_crtc_prepare(struct drm_crtc *crtc)
1254{ 1254{
1255 struct tegra_dc *dc = to_tegra_dc(crtc);
1256 unsigned int syncpt;
1257 unsigned long value;
1258
1259 drm_crtc_vblank_off(crtc); 1255 drm_crtc_vblank_off(crtc);
1260
1261 if (dc->pipe)
1262 syncpt = SYNCPT_VBLANK1;
1263 else
1264 syncpt = SYNCPT_VBLANK0;
1265
1266 /* initialize display controller */
1267 tegra_dc_writel(dc, 0x00000100, DC_CMD_GENERAL_INCR_SYNCPT_CNTRL);
1268 tegra_dc_writel(dc, 0x100 | syncpt, DC_CMD_CONT_SYNCPT_VSYNC);
1269
1270 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT | WIN_A_OF_INT;
1271 tegra_dc_writel(dc, value, DC_CMD_INT_TYPE);
1272
1273 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT |
1274 WIN_A_OF_INT | WIN_B_OF_INT | WIN_C_OF_INT;
1275 tegra_dc_writel(dc, value, DC_CMD_INT_POLARITY);
1276
1277 /* initialize timer */
1278 value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(0x20) |
1279 WINDOW_B_THRESHOLD(0x20) | WINDOW_C_THRESHOLD(0x20);
1280 tegra_dc_writel(dc, value, DC_DISP_DISP_MEM_HIGH_PRIORITY);
1281
1282 value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(1) |
1283 WINDOW_B_THRESHOLD(1) | WINDOW_C_THRESHOLD(1);
1284 tegra_dc_writel(dc, value, DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER);
1285
1286 value = VBLANK_INT | WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT;
1287 tegra_dc_writel(dc, value, DC_CMD_INT_ENABLE);
1288
1289 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT;
1290 tegra_dc_writel(dc, value, DC_CMD_INT_MASK);
1291} 1256}
1292 1257
1293static void tegra_crtc_commit(struct drm_crtc *crtc) 1258static void tegra_crtc_commit(struct drm_crtc *crtc)
@@ -1664,6 +1629,8 @@ static int tegra_dc_init(struct host1x_client *client)
1664 struct tegra_drm *tegra = drm->dev_private; 1629 struct tegra_drm *tegra = drm->dev_private;
1665 struct drm_plane *primary = NULL; 1630 struct drm_plane *primary = NULL;
1666 struct drm_plane *cursor = NULL; 1631 struct drm_plane *cursor = NULL;
1632 unsigned int syncpt;
1633 u32 value;
1667 int err; 1634 int err;
1668 1635
1669 if (tegra->domain) { 1636 if (tegra->domain) {
@@ -1730,6 +1697,40 @@ static int tegra_dc_init(struct host1x_client *client)
1730 goto cleanup; 1697 goto cleanup;
1731 } 1698 }
1732 1699
1700 /* initialize display controller */
1701 if (dc->pipe)
1702 syncpt = SYNCPT_VBLANK1;
1703 else
1704 syncpt = SYNCPT_VBLANK0;
1705
1706 tegra_dc_writel(dc, 0x00000100, DC_CMD_GENERAL_INCR_SYNCPT_CNTRL);
1707 tegra_dc_writel(dc, 0x100 | syncpt, DC_CMD_CONT_SYNCPT_VSYNC);
1708
1709 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT | WIN_A_OF_INT;
1710 tegra_dc_writel(dc, value, DC_CMD_INT_TYPE);
1711
1712 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT |
1713 WIN_A_OF_INT | WIN_B_OF_INT | WIN_C_OF_INT;
1714 tegra_dc_writel(dc, value, DC_CMD_INT_POLARITY);
1715
1716 /* initialize timer */
1717 value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(0x20) |
1718 WINDOW_B_THRESHOLD(0x20) | WINDOW_C_THRESHOLD(0x20);
1719 tegra_dc_writel(dc, value, DC_DISP_DISP_MEM_HIGH_PRIORITY);
1720
1721 value = CURSOR_THRESHOLD(0) | WINDOW_A_THRESHOLD(1) |
1722 WINDOW_B_THRESHOLD(1) | WINDOW_C_THRESHOLD(1);
1723 tegra_dc_writel(dc, value, DC_DISP_DISP_MEM_HIGH_PRIORITY_TIMER);
1724
1725 value = VBLANK_INT | WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT;
1726 tegra_dc_writel(dc, value, DC_CMD_INT_ENABLE);
1727
1728 value = WIN_A_UF_INT | WIN_B_UF_INT | WIN_C_UF_INT;
1729 tegra_dc_writel(dc, value, DC_CMD_INT_MASK);
1730
1731 if (dc->soc->supports_border_color)
1732 tegra_dc_writel(dc, 0, DC_DISP_BORDER_COLOR);
1733
1733 return 0; 1734 return 0;
1734 1735
1735cleanup: 1736cleanup:
diff --git a/drivers/gpu/drm/tegra/hdmi.c b/drivers/gpu/drm/tegra/hdmi.c
index 7e06657ae58b..7eaaee74a039 100644
--- a/drivers/gpu/drm/tegra/hdmi.c
+++ b/drivers/gpu/drm/tegra/hdmi.c
@@ -851,6 +851,14 @@ static void tegra_hdmi_encoder_mode_set(struct drm_encoder *encoder,
851 h_back_porch = mode->htotal - mode->hsync_end; 851 h_back_porch = mode->htotal - mode->hsync_end;
852 h_front_porch = mode->hsync_start - mode->hdisplay; 852 h_front_porch = mode->hsync_start - mode->hdisplay;
853 853
854 err = clk_set_rate(hdmi->clk, pclk);
855 if (err < 0) {
856 dev_err(hdmi->dev, "failed to set HDMI clock frequency: %d\n",
857 err);
858 }
859
860 DRM_DEBUG_KMS("HDMI clock rate: %lu Hz\n", clk_get_rate(hdmi->clk));
861
854 /* power up sequence */ 862 /* power up sequence */
855 value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PLL0); 863 value = tegra_hdmi_readl(hdmi, HDMI_NV_PDISP_SOR_PLL0);
856 value &= ~SOR_PLL_PDBG; 864 value &= ~SOR_PLL_PDBG;
diff --git a/drivers/gpu/drm/ttm/ttm_bo.c b/drivers/gpu/drm/ttm/ttm_bo.c
index d395b0bef73b..8d9b7de25613 100644
--- a/drivers/gpu/drm/ttm/ttm_bo.c
+++ b/drivers/gpu/drm/ttm/ttm_bo.c
@@ -74,7 +74,7 @@ static void ttm_mem_type_debug(struct ttm_bo_device *bdev, int mem_type)
74 pr_err(" has_type: %d\n", man->has_type); 74 pr_err(" has_type: %d\n", man->has_type);
75 pr_err(" use_type: %d\n", man->use_type); 75 pr_err(" use_type: %d\n", man->use_type);
76 pr_err(" flags: 0x%08X\n", man->flags); 76 pr_err(" flags: 0x%08X\n", man->flags);
77 pr_err(" gpu_offset: 0x%08lX\n", man->gpu_offset); 77 pr_err(" gpu_offset: 0x%08llX\n", man->gpu_offset);
78 pr_err(" size: %llu\n", man->size); 78 pr_err(" size: %llu\n", man->size);
79 pr_err(" available_caching: 0x%08X\n", man->available_caching); 79 pr_err(" available_caching: 0x%08X\n", man->available_caching);
80 pr_err(" default_caching: 0x%08X\n", man->default_caching); 80 pr_err(" default_caching: 0x%08X\n", man->default_caching);
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
index 6c6b655defcf..e13b9cbc304e 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_drv.c
@@ -725,32 +725,6 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
725 goto out_err1; 725 goto out_err1;
726 } 726 }
727 727
728 ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
729 (dev_priv->vram_size >> PAGE_SHIFT));
730 if (unlikely(ret != 0)) {
731 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
732 goto out_err2;
733 }
734
735 dev_priv->has_gmr = true;
736 if (((dev_priv->capabilities & (SVGA_CAP_GMR | SVGA_CAP_GMR2)) == 0) ||
737 refuse_dma || ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_GMR,
738 VMW_PL_GMR) != 0) {
739 DRM_INFO("No GMR memory available. "
740 "Graphics memory resources are very limited.\n");
741 dev_priv->has_gmr = false;
742 }
743
744 if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) {
745 dev_priv->has_mob = true;
746 if (ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_MOB,
747 VMW_PL_MOB) != 0) {
748 DRM_INFO("No MOB memory available. "
749 "3D will be disabled.\n");
750 dev_priv->has_mob = false;
751 }
752 }
753
754 dev_priv->mmio_mtrr = arch_phys_wc_add(dev_priv->mmio_start, 728 dev_priv->mmio_mtrr = arch_phys_wc_add(dev_priv->mmio_start,
755 dev_priv->mmio_size); 729 dev_priv->mmio_size);
756 730
@@ -813,6 +787,33 @@ static int vmw_driver_load(struct drm_device *dev, unsigned long chipset)
813 goto out_no_fman; 787 goto out_no_fman;
814 } 788 }
815 789
790
791 ret = ttm_bo_init_mm(&dev_priv->bdev, TTM_PL_VRAM,
792 (dev_priv->vram_size >> PAGE_SHIFT));
793 if (unlikely(ret != 0)) {
794 DRM_ERROR("Failed initializing memory manager for VRAM.\n");
795 goto out_no_vram;
796 }
797
798 dev_priv->has_gmr = true;
799 if (((dev_priv->capabilities & (SVGA_CAP_GMR | SVGA_CAP_GMR2)) == 0) ||
800 refuse_dma || ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_GMR,
801 VMW_PL_GMR) != 0) {
802 DRM_INFO("No GMR memory available. "
803 "Graphics memory resources are very limited.\n");
804 dev_priv->has_gmr = false;
805 }
806
807 if (dev_priv->capabilities & SVGA_CAP_GBOBJECTS) {
808 dev_priv->has_mob = true;
809 if (ttm_bo_init_mm(&dev_priv->bdev, VMW_PL_MOB,
810 VMW_PL_MOB) != 0) {
811 DRM_INFO("No MOB memory available. "
812 "3D will be disabled.\n");
813 dev_priv->has_mob = false;
814 }
815 }
816
816 vmw_kms_save_vga(dev_priv); 817 vmw_kms_save_vga(dev_priv);
817 818
818 /* Start kms and overlay systems, needs fifo. */ 819 /* Start kms and overlay systems, needs fifo. */
@@ -838,6 +839,12 @@ out_no_fifo:
838 vmw_kms_close(dev_priv); 839 vmw_kms_close(dev_priv);
839out_no_kms: 840out_no_kms:
840 vmw_kms_restore_vga(dev_priv); 841 vmw_kms_restore_vga(dev_priv);
842 if (dev_priv->has_mob)
843 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
844 if (dev_priv->has_gmr)
845 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
846 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
847out_no_vram:
841 vmw_fence_manager_takedown(dev_priv->fman); 848 vmw_fence_manager_takedown(dev_priv->fman);
842out_no_fman: 849out_no_fman:
843 if (dev_priv->capabilities & SVGA_CAP_IRQMASK) 850 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
@@ -853,12 +860,6 @@ out_err4:
853 iounmap(dev_priv->mmio_virt); 860 iounmap(dev_priv->mmio_virt);
854out_err3: 861out_err3:
855 arch_phys_wc_del(dev_priv->mmio_mtrr); 862 arch_phys_wc_del(dev_priv->mmio_mtrr);
856 if (dev_priv->has_mob)
857 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
858 if (dev_priv->has_gmr)
859 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
860 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
861out_err2:
862 (void)ttm_bo_device_release(&dev_priv->bdev); 863 (void)ttm_bo_device_release(&dev_priv->bdev);
863out_err1: 864out_err1:
864 vmw_ttm_global_release(dev_priv); 865 vmw_ttm_global_release(dev_priv);
@@ -887,6 +888,13 @@ static int vmw_driver_unload(struct drm_device *dev)
887 } 888 }
888 vmw_kms_close(dev_priv); 889 vmw_kms_close(dev_priv);
889 vmw_overlay_close(dev_priv); 890 vmw_overlay_close(dev_priv);
891
892 if (dev_priv->has_mob)
893 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
894 if (dev_priv->has_gmr)
895 (void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
896 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
897
890 vmw_fence_manager_takedown(dev_priv->fman); 898 vmw_fence_manager_takedown(dev_priv->fman);
891 if (dev_priv->capabilities & SVGA_CAP_IRQMASK) 899 if (dev_priv->capabilities & SVGA_CAP_IRQMASK)
892 drm_irq_uninstall(dev_priv->dev); 900 drm_irq_uninstall(dev_priv->dev);
@@ -898,11 +906,6 @@ static int vmw_driver_unload(struct drm_device *dev)
898 ttm_object_device_release(&dev_priv->tdev); 906 ttm_object_device_release(&dev_priv->tdev);
899 iounmap(dev_priv->mmio_virt); 907 iounmap(dev_priv->mmio_virt);
900 arch_phys_wc_del(dev_priv->mmio_mtrr); 908 arch_phys_wc_del(dev_priv->mmio_mtrr);
901 if (dev_priv->has_mob)
902 (void) ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_MOB);
903 if (dev_priv->has_gmr)
904 (void)ttm_bo_clean_mm(&dev_priv->bdev, VMW_PL_GMR);
905 (void)ttm_bo_clean_mm(&dev_priv->bdev, TTM_PL_VRAM);
906 (void)ttm_bo_device_release(&dev_priv->bdev); 909 (void)ttm_bo_device_release(&dev_priv->bdev);
907 vmw_ttm_global_release(dev_priv); 910 vmw_ttm_global_release(dev_priv);
908 911
@@ -1235,6 +1238,7 @@ static void vmw_remove(struct pci_dev *pdev)
1235{ 1238{
1236 struct drm_device *dev = pci_get_drvdata(pdev); 1239 struct drm_device *dev = pci_get_drvdata(pdev);
1237 1240
1241 pci_disable_device(pdev);
1238 drm_put_dev(dev); 1242 drm_put_dev(dev);
1239} 1243}
1240 1244
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
index 33176d05db35..654c8daeb5ab 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_execbuf.c
@@ -890,7 +890,8 @@ static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
890 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo); 890 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
891 if (unlikely(ret != 0)) { 891 if (unlikely(ret != 0)) {
892 DRM_ERROR("Could not find or use MOB buffer.\n"); 892 DRM_ERROR("Could not find or use MOB buffer.\n");
893 return -EINVAL; 893 ret = -EINVAL;
894 goto out_no_reloc;
894 } 895 }
895 bo = &vmw_bo->base; 896 bo = &vmw_bo->base;
896 897
@@ -914,7 +915,7 @@ static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
914 915
915out_no_reloc: 916out_no_reloc:
916 vmw_dmabuf_unreference(&vmw_bo); 917 vmw_dmabuf_unreference(&vmw_bo);
917 vmw_bo_p = NULL; 918 *vmw_bo_p = NULL;
918 return ret; 919 return ret;
919} 920}
920 921
@@ -951,7 +952,8 @@ static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
951 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo); 952 ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
952 if (unlikely(ret != 0)) { 953 if (unlikely(ret != 0)) {
953 DRM_ERROR("Could not find or use GMR region.\n"); 954 DRM_ERROR("Could not find or use GMR region.\n");
954 return -EINVAL; 955 ret = -EINVAL;
956 goto out_no_reloc;
955 } 957 }
956 bo = &vmw_bo->base; 958 bo = &vmw_bo->base;
957 959
@@ -974,7 +976,7 @@ static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
974 976
975out_no_reloc: 977out_no_reloc:
976 vmw_dmabuf_unreference(&vmw_bo); 978 vmw_dmabuf_unreference(&vmw_bo);
977 vmw_bo_p = NULL; 979 *vmw_bo_p = NULL;
978 return ret; 980 return ret;
979} 981}
980 982
@@ -2780,13 +2782,11 @@ int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
2780 NULL, arg->command_size, arg->throttle_us, 2782 NULL, arg->command_size, arg->throttle_us,
2781 (void __user *)(unsigned long)arg->fence_rep, 2783 (void __user *)(unsigned long)arg->fence_rep,
2782 NULL); 2784 NULL);
2783 2785 ttm_read_unlock(&dev_priv->reservation_sem);
2784 if (unlikely(ret != 0)) 2786 if (unlikely(ret != 0))
2785 goto out_unlock; 2787 return ret;
2786 2788
2787 vmw_kms_cursor_post_execbuf(dev_priv); 2789 vmw_kms_cursor_post_execbuf(dev_priv);
2788 2790
2789out_unlock: 2791 return 0;
2790 ttm_read_unlock(&dev_priv->reservation_sem);
2791 return ret;
2792} 2792}
diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
index 8725b79e7847..07cda8cbbddb 100644
--- a/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
+++ b/drivers/gpu/drm/vmwgfx/vmwgfx_kms.c
@@ -2033,23 +2033,17 @@ int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
2033 int i; 2033 int i;
2034 struct drm_mode_config *mode_config = &dev->mode_config; 2034 struct drm_mode_config *mode_config = &dev->mode_config;
2035 2035
2036 ret = ttm_read_lock(&dev_priv->reservation_sem, true);
2037 if (unlikely(ret != 0))
2038 return ret;
2039
2040 if (!arg->num_outputs) { 2036 if (!arg->num_outputs) {
2041 struct drm_vmw_rect def_rect = {0, 0, 800, 600}; 2037 struct drm_vmw_rect def_rect = {0, 0, 800, 600};
2042 vmw_du_update_layout(dev_priv, 1, &def_rect); 2038 vmw_du_update_layout(dev_priv, 1, &def_rect);
2043 goto out_unlock; 2039 return 0;
2044 } 2040 }
2045 2041
2046 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect); 2042 rects_size = arg->num_outputs * sizeof(struct drm_vmw_rect);
2047 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect), 2043 rects = kcalloc(arg->num_outputs, sizeof(struct drm_vmw_rect),
2048 GFP_KERNEL); 2044 GFP_KERNEL);
2049 if (unlikely(!rects)) { 2045 if (unlikely(!rects))
2050 ret = -ENOMEM; 2046 return -ENOMEM;
2051 goto out_unlock;
2052 }
2053 2047
2054 user_rects = (void __user *)(unsigned long)arg->rects; 2048 user_rects = (void __user *)(unsigned long)arg->rects;
2055 ret = copy_from_user(rects, user_rects, rects_size); 2049 ret = copy_from_user(rects, user_rects, rects_size);
@@ -2074,7 +2068,5 @@ int vmw_kms_update_layout_ioctl(struct drm_device *dev, void *data,
2074 2068
2075out_free: 2069out_free:
2076 kfree(rects); 2070 kfree(rects);
2077out_unlock:
2078 ttm_read_unlock(&dev_priv->reservation_sem);
2079 return ret; 2071 return ret;
2080} 2072}
diff --git a/drivers/gpu/ipu-v3/ipu-di.c b/drivers/gpu/ipu-v3/ipu-di.c
index b61d6be97602..3ddfb3d0b64d 100644
--- a/drivers/gpu/ipu-v3/ipu-di.c
+++ b/drivers/gpu/ipu-v3/ipu-di.c
@@ -459,6 +459,8 @@ static void ipu_di_config_clock(struct ipu_di *di,
459 459
460 clkrate = clk_get_rate(di->clk_ipu); 460 clkrate = clk_get_rate(di->clk_ipu);
461 div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock); 461 div = DIV_ROUND_CLOSEST(clkrate, sig->mode.pixelclock);
462 if (div == 0)
463 div = 1;
462 rate = clkrate / div; 464 rate = clkrate / div;
463 465
464 error = rate / (sig->mode.pixelclock / 1000); 466 error = rate / (sig->mode.pixelclock / 1000);
diff --git a/drivers/hid/hid-core.c b/drivers/hid/hid-core.c
index db4fb6e1cc5b..56ce8c2b5530 100644
--- a/drivers/hid/hid-core.c
+++ b/drivers/hid/hid-core.c
@@ -1872,6 +1872,7 @@ static const struct hid_device_id hid_have_special_driver[] = {
1872 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_SIDEWINDER_GV) }, 1872 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_SIDEWINDER_GV) },
1873 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K) }, 1873 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K) },
1874 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K_JP) }, 1874 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K_JP) },
1875 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE7K) },
1875 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_LK6K) }, 1876 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_LK6K) },
1876 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB) }, 1877 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB) },
1877 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K) }, 1878 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K) },
@@ -1926,6 +1927,7 @@ static const struct hid_device_id hid_have_special_driver[] = {
1926#endif 1927#endif
1927#if IS_ENABLED(CONFIG_HID_SAITEK) 1928#if IS_ENABLED(CONFIG_HID_SAITEK)
1928 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_PS1000) }, 1929 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_PS1000) },
1930 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7_OLD) },
1929 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7) }, 1931 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7) },
1930 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_MMO7) }, 1932 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_MMO7) },
1931 { HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_RAT9) }, 1933 { HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_RAT9) },
@@ -1957,6 +1959,7 @@ static const struct hid_device_id hid_have_special_driver[] = {
1957 { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb65a) }, 1959 { HID_USB_DEVICE(USB_VENDOR_ID_THRUSTMASTER, 0xb65a) },
1958 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE_BT) }, 1960 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE_BT) },
1959 { HID_USB_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE) }, 1961 { HID_USB_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE) },
1962 { HID_USB_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE_PRO) },
1960 { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED, USB_DEVICE_ID_TOPSEED_CYBERLINK) }, 1963 { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED, USB_DEVICE_ID_TOPSEED_CYBERLINK) },
1961 { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED2, USB_DEVICE_ID_TOPSEED2_RF_COMBO) }, 1964 { HID_USB_DEVICE(USB_VENDOR_ID_TOPSEED2, USB_DEVICE_ID_TOPSEED2_RF_COMBO) },
1962 { HID_USB_DEVICE(USB_VENDOR_ID_TWINHAN, USB_DEVICE_ID_TWINHAN_IR_REMOTE) }, 1965 { HID_USB_DEVICE(USB_VENDOR_ID_TWINHAN, USB_DEVICE_ID_TWINHAN_IR_REMOTE) },
diff --git a/drivers/hid/hid-ids.h b/drivers/hid/hid-ids.h
index 46edb4d3ed28..9c4786759f16 100644
--- a/drivers/hid/hid-ids.h
+++ b/drivers/hid/hid-ids.h
@@ -586,6 +586,7 @@
586#define USB_VENDOR_ID_LOGITECH 0x046d 586#define USB_VENDOR_ID_LOGITECH 0x046d
587#define USB_DEVICE_ID_LOGITECH_AUDIOHUB 0x0a0e 587#define USB_DEVICE_ID_LOGITECH_AUDIOHUB 0x0a0e
588#define USB_DEVICE_ID_LOGITECH_T651 0xb00c 588#define USB_DEVICE_ID_LOGITECH_T651 0xb00c
589#define USB_DEVICE_ID_LOGITECH_C077 0xc007
589#define USB_DEVICE_ID_LOGITECH_RECEIVER 0xc101 590#define USB_DEVICE_ID_LOGITECH_RECEIVER 0xc101
590#define USB_DEVICE_ID_LOGITECH_HARMONY_FIRST 0xc110 591#define USB_DEVICE_ID_LOGITECH_HARMONY_FIRST 0xc110
591#define USB_DEVICE_ID_LOGITECH_HARMONY_LAST 0xc14f 592#define USB_DEVICE_ID_LOGITECH_HARMONY_LAST 0xc14f
@@ -654,6 +655,7 @@
654#define USB_DEVICE_ID_MS_LK6K 0x00f9 655#define USB_DEVICE_ID_MS_LK6K 0x00f9
655#define USB_DEVICE_ID_MS_PRESENTER_8K_BT 0x0701 656#define USB_DEVICE_ID_MS_PRESENTER_8K_BT 0x0701
656#define USB_DEVICE_ID_MS_PRESENTER_8K_USB 0x0713 657#define USB_DEVICE_ID_MS_PRESENTER_8K_USB 0x0713
658#define USB_DEVICE_ID_MS_NE7K 0x071d
657#define USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K 0x0730 659#define USB_DEVICE_ID_MS_DIGITAL_MEDIA_3K 0x0730
658#define USB_DEVICE_ID_MS_COMFORT_MOUSE_4500 0x076c 660#define USB_DEVICE_ID_MS_COMFORT_MOUSE_4500 0x076c
659#define USB_DEVICE_ID_MS_SURFACE_PRO_2 0x0799 661#define USB_DEVICE_ID_MS_SURFACE_PRO_2 0x0799
@@ -802,6 +804,7 @@
802#define USB_VENDOR_ID_SAITEK 0x06a3 804#define USB_VENDOR_ID_SAITEK 0x06a3
803#define USB_DEVICE_ID_SAITEK_RUMBLEPAD 0xff17 805#define USB_DEVICE_ID_SAITEK_RUMBLEPAD 0xff17
804#define USB_DEVICE_ID_SAITEK_PS1000 0x0621 806#define USB_DEVICE_ID_SAITEK_PS1000 0x0621
807#define USB_DEVICE_ID_SAITEK_RAT7_OLD 0x0ccb
805#define USB_DEVICE_ID_SAITEK_RAT7 0x0cd7 808#define USB_DEVICE_ID_SAITEK_RAT7 0x0cd7
806#define USB_DEVICE_ID_SAITEK_MMO7 0x0cd0 809#define USB_DEVICE_ID_SAITEK_MMO7 0x0cd0
807 810
@@ -896,6 +899,7 @@
896#define USB_VENDOR_ID_TIVO 0x150a 899#define USB_VENDOR_ID_TIVO 0x150a
897#define USB_DEVICE_ID_TIVO_SLIDE_BT 0x1200 900#define USB_DEVICE_ID_TIVO_SLIDE_BT 0x1200
898#define USB_DEVICE_ID_TIVO_SLIDE 0x1201 901#define USB_DEVICE_ID_TIVO_SLIDE 0x1201
902#define USB_DEVICE_ID_TIVO_SLIDE_PRO 0x1203
899 903
900#define USB_VENDOR_ID_TOPSEED 0x0766 904#define USB_VENDOR_ID_TOPSEED 0x0766
901#define USB_DEVICE_ID_TOPSEED_CYBERLINK 0x0204 905#define USB_DEVICE_ID_TOPSEED_CYBERLINK 0x0204
diff --git a/drivers/hid/hid-microsoft.c b/drivers/hid/hid-microsoft.c
index fbaea6eb882e..af935eb198c9 100644
--- a/drivers/hid/hid-microsoft.c
+++ b/drivers/hid/hid-microsoft.c
@@ -264,6 +264,8 @@ static const struct hid_device_id ms_devices[] = {
264 .driver_data = MS_ERGONOMY }, 264 .driver_data = MS_ERGONOMY },
265 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K_JP), 265 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE4K_JP),
266 .driver_data = MS_ERGONOMY }, 266 .driver_data = MS_ERGONOMY },
267 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_NE7K),
268 .driver_data = MS_ERGONOMY },
267 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_LK6K), 269 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_LK6K),
268 .driver_data = MS_ERGONOMY | MS_RDESC }, 270 .driver_data = MS_ERGONOMY | MS_RDESC },
269 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB), 271 { HID_USB_DEVICE(USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_PRESENTER_8K_USB),
diff --git a/drivers/hid/hid-saitek.c b/drivers/hid/hid-saitek.c
index 5632c54eadf0..a014f21275d8 100644
--- a/drivers/hid/hid-saitek.c
+++ b/drivers/hid/hid-saitek.c
@@ -177,6 +177,8 @@ static int saitek_event(struct hid_device *hdev, struct hid_field *field,
177static const struct hid_device_id saitek_devices[] = { 177static const struct hid_device_id saitek_devices[] = {
178 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_PS1000), 178 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_PS1000),
179 .driver_data = SAITEK_FIX_PS1000 }, 179 .driver_data = SAITEK_FIX_PS1000 },
180 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7_OLD),
181 .driver_data = SAITEK_RELEASE_MODE_RAT7 },
180 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7), 182 { HID_USB_DEVICE(USB_VENDOR_ID_SAITEK, USB_DEVICE_ID_SAITEK_RAT7),
181 .driver_data = SAITEK_RELEASE_MODE_RAT7 }, 183 .driver_data = SAITEK_RELEASE_MODE_RAT7 },
182 { HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_RAT9), 184 { HID_USB_DEVICE(USB_VENDOR_ID_MADCATZ, USB_DEVICE_ID_MADCATZ_RAT9),
diff --git a/drivers/hid/hid-sensor-hub.c b/drivers/hid/hid-sensor-hub.c
index 6a58b6c723aa..e54ce1097e2c 100644
--- a/drivers/hid/hid-sensor-hub.c
+++ b/drivers/hid/hid-sensor-hub.c
@@ -135,8 +135,9 @@ static struct hid_sensor_hub_callbacks *sensor_hub_get_callback(
135{ 135{
136 struct hid_sensor_hub_callbacks_list *callback; 136 struct hid_sensor_hub_callbacks_list *callback;
137 struct sensor_hub_data *pdata = hid_get_drvdata(hdev); 137 struct sensor_hub_data *pdata = hid_get_drvdata(hdev);
138 unsigned long flags;
138 139
139 spin_lock(&pdata->dyn_callback_lock); 140 spin_lock_irqsave(&pdata->dyn_callback_lock, flags);
140 list_for_each_entry(callback, &pdata->dyn_callback_list, list) 141 list_for_each_entry(callback, &pdata->dyn_callback_list, list)
141 if (callback->usage_id == usage_id && 142 if (callback->usage_id == usage_id &&
142 (collection_index >= 143 (collection_index >=
@@ -145,10 +146,11 @@ static struct hid_sensor_hub_callbacks *sensor_hub_get_callback(
145 callback->hsdev->end_collection_index)) { 146 callback->hsdev->end_collection_index)) {
146 *priv = callback->priv; 147 *priv = callback->priv;
147 *hsdev = callback->hsdev; 148 *hsdev = callback->hsdev;
148 spin_unlock(&pdata->dyn_callback_lock); 149 spin_unlock_irqrestore(&pdata->dyn_callback_lock,
150 flags);
149 return callback->usage_callback; 151 return callback->usage_callback;
150 } 152 }
151 spin_unlock(&pdata->dyn_callback_lock); 153 spin_unlock_irqrestore(&pdata->dyn_callback_lock, flags);
152 154
153 return NULL; 155 return NULL;
154} 156}
diff --git a/drivers/hid/hid-sony.c b/drivers/hid/hid-sony.c
index 31e9d2561106..1896c019e302 100644
--- a/drivers/hid/hid-sony.c
+++ b/drivers/hid/hid-sony.c
@@ -804,7 +804,7 @@ union sixaxis_output_report_01 {
804#define DS4_REPORT_0x81_SIZE 7 804#define DS4_REPORT_0x81_SIZE 7
805#define SIXAXIS_REPORT_0xF2_SIZE 18 805#define SIXAXIS_REPORT_0xF2_SIZE 18
806 806
807static spinlock_t sony_dev_list_lock; 807static DEFINE_SPINLOCK(sony_dev_list_lock);
808static LIST_HEAD(sony_device_list); 808static LIST_HEAD(sony_device_list);
809static DEFINE_IDA(sony_device_id_allocator); 809static DEFINE_IDA(sony_device_id_allocator);
810 810
@@ -1944,6 +1944,8 @@ static int sony_probe(struct hid_device *hdev, const struct hid_device_id *id)
1944 return -ENOMEM; 1944 return -ENOMEM;
1945 } 1945 }
1946 1946
1947 spin_lock_init(&sc->lock);
1948
1947 sc->quirks = quirks; 1949 sc->quirks = quirks;
1948 hid_set_drvdata(hdev, sc); 1950 hid_set_drvdata(hdev, sc);
1949 sc->hdev = hdev; 1951 sc->hdev = hdev;
@@ -2147,8 +2149,8 @@ static void __exit sony_exit(void)
2147{ 2149{
2148 dbg_hid("Sony:%s\n", __func__); 2150 dbg_hid("Sony:%s\n", __func__);
2149 2151
2150 ida_destroy(&sony_device_id_allocator);
2151 hid_unregister_driver(&sony_driver); 2152 hid_unregister_driver(&sony_driver);
2153 ida_destroy(&sony_device_id_allocator);
2152} 2154}
2153module_init(sony_init); 2155module_init(sony_init);
2154module_exit(sony_exit); 2156module_exit(sony_exit);
diff --git a/drivers/hid/hid-tivo.c b/drivers/hid/hid-tivo.c
index d790d8d71f7f..d98696927453 100644
--- a/drivers/hid/hid-tivo.c
+++ b/drivers/hid/hid-tivo.c
@@ -64,6 +64,7 @@ static const struct hid_device_id tivo_devices[] = {
64 /* TiVo Slide Bluetooth remote, pairs with a Broadcom dongle */ 64 /* TiVo Slide Bluetooth remote, pairs with a Broadcom dongle */
65 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE_BT) }, 65 { HID_BLUETOOTH_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE_BT) },
66 { HID_USB_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE) }, 66 { HID_USB_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE) },
67 { HID_USB_DEVICE(USB_VENDOR_ID_TIVO, USB_DEVICE_ID_TIVO_SLIDE_PRO) },
67 { } 68 { }
68}; 69};
69MODULE_DEVICE_TABLE(hid, tivo_devices); 70MODULE_DEVICE_TABLE(hid, tivo_devices);
diff --git a/drivers/hid/i2c-hid/i2c-hid.c b/drivers/hid/i2c-hid/i2c-hid.c
index d43e967e7533..36053f33d6d9 100644
--- a/drivers/hid/i2c-hid/i2c-hid.c
+++ b/drivers/hid/i2c-hid/i2c-hid.c
@@ -370,7 +370,10 @@ static int i2c_hid_hwreset(struct i2c_client *client)
370static void i2c_hid_get_input(struct i2c_hid *ihid) 370static void i2c_hid_get_input(struct i2c_hid *ihid)
371{ 371{
372 int ret, ret_size; 372 int ret, ret_size;
373 int size = ihid->bufsize; 373 int size = le16_to_cpu(ihid->hdesc.wMaxInputLength);
374
375 if (size > ihid->bufsize)
376 size = ihid->bufsize;
374 377
375 ret = i2c_master_recv(ihid->client, ihid->inbuf, size); 378 ret = i2c_master_recv(ihid->client, ihid->inbuf, size);
376 if (ret != size) { 379 if (ret != size) {
@@ -785,7 +788,7 @@ static int i2c_hid_init_irq(struct i2c_client *client)
785 dev_dbg(&client->dev, "Requesting IRQ: %d\n", client->irq); 788 dev_dbg(&client->dev, "Requesting IRQ: %d\n", client->irq);
786 789
787 ret = request_threaded_irq(client->irq, NULL, i2c_hid_irq, 790 ret = request_threaded_irq(client->irq, NULL, i2c_hid_irq,
788 IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 791 IRQF_TRIGGER_LOW | IRQF_ONESHOT,
789 client->name, ihid); 792 client->name, ihid);
790 if (ret < 0) { 793 if (ret < 0) {
791 dev_warn(&client->dev, 794 dev_warn(&client->dev,
diff --git a/drivers/hid/usbhid/hid-quirks.c b/drivers/hid/usbhid/hid-quirks.c
index 9be99a67bfe2..a82127753461 100644
--- a/drivers/hid/usbhid/hid-quirks.c
+++ b/drivers/hid/usbhid/hid-quirks.c
@@ -78,6 +78,7 @@ static const struct hid_blacklist {
78 { USB_VENDOR_ID_ELO, USB_DEVICE_ID_ELO_TS2700, HID_QUIRK_NOGET }, 78 { USB_VENDOR_ID_ELO, USB_DEVICE_ID_ELO_TS2700, HID_QUIRK_NOGET },
79 { USB_VENDOR_ID_FORMOSA, USB_DEVICE_ID_FORMOSA_IR_RECEIVER, HID_QUIRK_NO_INIT_REPORTS }, 79 { USB_VENDOR_ID_FORMOSA, USB_DEVICE_ID_FORMOSA_IR_RECEIVER, HID_QUIRK_NO_INIT_REPORTS },
80 { USB_VENDOR_ID_FREESCALE, USB_DEVICE_ID_FREESCALE_MX28, HID_QUIRK_NOGET }, 80 { USB_VENDOR_ID_FREESCALE, USB_DEVICE_ID_FREESCALE_MX28, HID_QUIRK_NOGET },
81 { USB_VENDOR_ID_LOGITECH, USB_DEVICE_ID_LOGITECH_C077, HID_QUIRK_ALWAYS_POLL },
81 { USB_VENDOR_ID_MGE, USB_DEVICE_ID_MGE_UPS, HID_QUIRK_NOGET }, 82 { USB_VENDOR_ID_MGE, USB_DEVICE_ID_MGE_UPS, HID_QUIRK_NOGET },
82 { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3, HID_QUIRK_NO_INIT_REPORTS }, 83 { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3, HID_QUIRK_NO_INIT_REPORTS },
83 { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3_JP, HID_QUIRK_NO_INIT_REPORTS }, 84 { USB_VENDOR_ID_MICROSOFT, USB_DEVICE_ID_MS_TYPE_COVER_3_JP, HID_QUIRK_NO_INIT_REPORTS },
diff --git a/drivers/hid/wacom_wac.c b/drivers/hid/wacom_wac.c
index 1a6507999a65..bbe32d66e500 100644
--- a/drivers/hid/wacom_wac.c
+++ b/drivers/hid/wacom_wac.c
@@ -551,9 +551,13 @@ static int wacom_intuos_inout(struct wacom_wac *wacom)
551 (features->type == CINTIQ && !(data[1] & 0x40))) 551 (features->type == CINTIQ && !(data[1] & 0x40)))
552 return 1; 552 return 1;
553 553
554 if (features->quirks & WACOM_QUIRK_MULTI_INPUT) 554 if (wacom->shared) {
555 wacom->shared->stylus_in_proximity = true; 555 wacom->shared->stylus_in_proximity = true;
556 556
557 if (wacom->shared->touch_down)
558 return 1;
559 }
560
557 /* in Range while exiting */ 561 /* in Range while exiting */
558 if (((data[1] & 0xfe) == 0x20) && wacom->reporting_data) { 562 if (((data[1] & 0xfe) == 0x20) && wacom->reporting_data) {
559 input_report_key(input, BTN_TOUCH, 0); 563 input_report_key(input, BTN_TOUCH, 0);
@@ -778,6 +782,11 @@ static int wacom_intuos_irq(struct wacom_wac *wacom)
778 input_report_abs(input, ABS_X, be16_to_cpup((__be16 *)&data[4])); 782 input_report_abs(input, ABS_X, be16_to_cpup((__be16 *)&data[4]));
779 input_report_abs(input, ABS_Y, be16_to_cpup((__be16 *)&data[6])); 783 input_report_abs(input, ABS_Y, be16_to_cpup((__be16 *)&data[6]));
780 input_report_abs(input, ABS_Z, be16_to_cpup((__be16 *)&data[8])); 784 input_report_abs(input, ABS_Z, be16_to_cpup((__be16 *)&data[8]));
785 if ((data[2] & 0x07) | data[4] | data[5] | data[6] | data[7] | data[8] | data[9]) {
786 input_report_abs(input, ABS_MISC, PAD_DEVICE_ID);
787 } else {
788 input_report_abs(input, ABS_MISC, 0);
789 }
781 } else if (features->type == CINTIQ_HYBRID) { 790 } else if (features->type == CINTIQ_HYBRID) {
782 /* 791 /*
783 * Do not send hardware buttons under Android. They 792 * Do not send hardware buttons under Android. They
@@ -1038,27 +1047,28 @@ static int wacom_24hdt_irq(struct wacom_wac *wacom)
1038 struct input_dev *input = wacom->input; 1047 struct input_dev *input = wacom->input;
1039 unsigned char *data = wacom->data; 1048 unsigned char *data = wacom->data;
1040 int i; 1049 int i;
1041 int current_num_contacts = 0; 1050 int current_num_contacts = data[61];
1042 int contacts_to_send = 0; 1051 int contacts_to_send = 0;
1043 int num_contacts_left = 4; /* maximum contacts per packet */ 1052 int num_contacts_left = 4; /* maximum contacts per packet */
1044 int byte_per_packet = WACOM_BYTES_PER_24HDT_PACKET; 1053 int byte_per_packet = WACOM_BYTES_PER_24HDT_PACKET;
1045 int y_offset = 2; 1054 int y_offset = 2;
1055 static int contact_with_no_pen_down_count = 0;
1046 1056
1047 if (wacom->features.type == WACOM_27QHDT) { 1057 if (wacom->features.type == WACOM_27QHDT) {
1048 current_num_contacts = data[63]; 1058 current_num_contacts = data[63];
1049 num_contacts_left = 10; 1059 num_contacts_left = 10;
1050 byte_per_packet = WACOM_BYTES_PER_QHDTHID_PACKET; 1060 byte_per_packet = WACOM_BYTES_PER_QHDTHID_PACKET;
1051 y_offset = 0; 1061 y_offset = 0;
1052 } else {
1053 current_num_contacts = data[61];
1054 } 1062 }
1055 1063
1056 /* 1064 /*
1057 * First packet resets the counter since only the first 1065 * First packet resets the counter since only the first
1058 * packet in series will have non-zero current_num_contacts. 1066 * packet in series will have non-zero current_num_contacts.
1059 */ 1067 */
1060 if (current_num_contacts) 1068 if (current_num_contacts) {
1061 wacom->num_contacts_left = current_num_contacts; 1069 wacom->num_contacts_left = current_num_contacts;
1070 contact_with_no_pen_down_count = 0;
1071 }
1062 1072
1063 contacts_to_send = min(num_contacts_left, wacom->num_contacts_left); 1073 contacts_to_send = min(num_contacts_left, wacom->num_contacts_left);
1064 1074
@@ -1091,15 +1101,16 @@ static int wacom_24hdt_irq(struct wacom_wac *wacom)
1091 input_report_abs(input, ABS_MT_WIDTH_MINOR, min(w, h)); 1101 input_report_abs(input, ABS_MT_WIDTH_MINOR, min(w, h));
1092 input_report_abs(input, ABS_MT_ORIENTATION, w > h); 1102 input_report_abs(input, ABS_MT_ORIENTATION, w > h);
1093 } 1103 }
1104 contact_with_no_pen_down_count++;
1094 } 1105 }
1095 } 1106 }
1096 input_mt_report_pointer_emulation(input, true); 1107 input_mt_report_pointer_emulation(input, true);
1097 1108
1098 wacom->num_contacts_left -= contacts_to_send; 1109 wacom->num_contacts_left -= contacts_to_send;
1099 if (wacom->num_contacts_left <= 0) 1110 if (wacom->num_contacts_left <= 0) {
1100 wacom->num_contacts_left = 0; 1111 wacom->num_contacts_left = 0;
1101 1112 wacom->shared->touch_down = (contact_with_no_pen_down_count > 0);
1102 wacom->shared->touch_down = (wacom->num_contacts_left > 0); 1113 }
1103 return 1; 1114 return 1;
1104} 1115}
1105 1116
@@ -1111,6 +1122,7 @@ static int wacom_mt_touch(struct wacom_wac *wacom)
1111 int current_num_contacts = data[2]; 1122 int current_num_contacts = data[2];
1112 int contacts_to_send = 0; 1123 int contacts_to_send = 0;
1113 int x_offset = 0; 1124 int x_offset = 0;
1125 static int contact_with_no_pen_down_count = 0;
1114 1126
1115 /* MTTPC does not support Height and Width */ 1127 /* MTTPC does not support Height and Width */
1116 if (wacom->features.type == MTTPC || wacom->features.type == MTTPC_B) 1128 if (wacom->features.type == MTTPC || wacom->features.type == MTTPC_B)
@@ -1120,8 +1132,10 @@ static int wacom_mt_touch(struct wacom_wac *wacom)
1120 * First packet resets the counter since only the first 1132 * First packet resets the counter since only the first
1121 * packet in series will have non-zero current_num_contacts. 1133 * packet in series will have non-zero current_num_contacts.
1122 */ 1134 */
1123 if (current_num_contacts) 1135 if (current_num_contacts) {
1124 wacom->num_contacts_left = current_num_contacts; 1136 wacom->num_contacts_left = current_num_contacts;
1137 contact_with_no_pen_down_count = 0;
1138 }
1125 1139
1126 /* There are at most 5 contacts per packet */ 1140 /* There are at most 5 contacts per packet */
1127 contacts_to_send = min(5, wacom->num_contacts_left); 1141 contacts_to_send = min(5, wacom->num_contacts_left);
@@ -1142,15 +1156,16 @@ static int wacom_mt_touch(struct wacom_wac *wacom)
1142 int y = get_unaligned_le16(&data[offset + x_offset + 9]); 1156 int y = get_unaligned_le16(&data[offset + x_offset + 9]);
1143 input_report_abs(input, ABS_MT_POSITION_X, x); 1157 input_report_abs(input, ABS_MT_POSITION_X, x);
1144 input_report_abs(input, ABS_MT_POSITION_Y, y); 1158 input_report_abs(input, ABS_MT_POSITION_Y, y);
1159 contact_with_no_pen_down_count++;
1145 } 1160 }
1146 } 1161 }
1147 input_mt_report_pointer_emulation(input, true); 1162 input_mt_report_pointer_emulation(input, true);
1148 1163
1149 wacom->num_contacts_left -= contacts_to_send; 1164 wacom->num_contacts_left -= contacts_to_send;
1150 if (wacom->num_contacts_left < 0) 1165 if (wacom->num_contacts_left <= 0) {
1151 wacom->num_contacts_left = 0; 1166 wacom->num_contacts_left = 0;
1152 1167 wacom->shared->touch_down = (contact_with_no_pen_down_count > 0);
1153 wacom->shared->touch_down = (wacom->num_contacts_left > 0); 1168 }
1154 return 1; 1169 return 1;
1155} 1170}
1156 1171
@@ -1188,29 +1203,25 @@ static int wacom_tpc_single_touch(struct wacom_wac *wacom, size_t len)
1188{ 1203{
1189 unsigned char *data = wacom->data; 1204 unsigned char *data = wacom->data;
1190 struct input_dev *input = wacom->input; 1205 struct input_dev *input = wacom->input;
1191 bool prox; 1206 bool prox = !wacom->shared->stylus_in_proximity;
1192 int x = 0, y = 0; 1207 int x = 0, y = 0;
1193 1208
1194 if (wacom->features.touch_max > 1 || len > WACOM_PKGLEN_TPC2FG) 1209 if (wacom->features.touch_max > 1 || len > WACOM_PKGLEN_TPC2FG)
1195 return 0; 1210 return 0;
1196 1211
1197 if (!wacom->shared->stylus_in_proximity) { 1212 if (len == WACOM_PKGLEN_TPC1FG) {
1198 if (len == WACOM_PKGLEN_TPC1FG) { 1213 prox = prox && (data[0] & 0x01);
1199 prox = data[0] & 0x01; 1214 x = get_unaligned_le16(&data[1]);
1200 x = get_unaligned_le16(&data[1]); 1215 y = get_unaligned_le16(&data[3]);
1201 y = get_unaligned_le16(&data[3]); 1216 } else if (len == WACOM_PKGLEN_TPC1FG_B) {
1202 } else if (len == WACOM_PKGLEN_TPC1FG_B) { 1217 prox = prox && (data[2] & 0x01);
1203 prox = data[2] & 0x01; 1218 x = get_unaligned_le16(&data[3]);
1204 x = get_unaligned_le16(&data[3]); 1219 y = get_unaligned_le16(&data[5]);
1205 y = get_unaligned_le16(&data[5]); 1220 } else {
1206 } else { 1221 prox = prox && (data[1] & 0x01);
1207 prox = data[1] & 0x01; 1222 x = le16_to_cpup((__le16 *)&data[2]);
1208 x = le16_to_cpup((__le16 *)&data[2]); 1223 y = le16_to_cpup((__le16 *)&data[4]);
1209 y = le16_to_cpup((__le16 *)&data[4]); 1224 }
1210 }
1211 } else
1212 /* force touch out when pen is in prox */
1213 prox = 0;
1214 1225
1215 if (prox) { 1226 if (prox) {
1216 input_report_abs(input, ABS_X, x); 1227 input_report_abs(input, ABS_X, x);
@@ -1608,6 +1619,7 @@ static int wacom_bpt_touch(struct wacom_wac *wacom)
1608 struct input_dev *pad_input = wacom->pad_input; 1619 struct input_dev *pad_input = wacom->pad_input;
1609 unsigned char *data = wacom->data; 1620 unsigned char *data = wacom->data;
1610 int i; 1621 int i;
1622 int contact_with_no_pen_down_count = 0;
1611 1623
1612 if (data[0] != 0x02) 1624 if (data[0] != 0x02)
1613 return 0; 1625 return 0;
@@ -1635,6 +1647,7 @@ static int wacom_bpt_touch(struct wacom_wac *wacom)
1635 } 1647 }
1636 input_report_abs(input, ABS_MT_POSITION_X, x); 1648 input_report_abs(input, ABS_MT_POSITION_X, x);
1637 input_report_abs(input, ABS_MT_POSITION_Y, y); 1649 input_report_abs(input, ABS_MT_POSITION_Y, y);
1650 contact_with_no_pen_down_count++;
1638 } 1651 }
1639 } 1652 }
1640 1653
@@ -1644,11 +1657,12 @@ static int wacom_bpt_touch(struct wacom_wac *wacom)
1644 input_report_key(pad_input, BTN_FORWARD, (data[1] & 0x04) != 0); 1657 input_report_key(pad_input, BTN_FORWARD, (data[1] & 0x04) != 0);
1645 input_report_key(pad_input, BTN_BACK, (data[1] & 0x02) != 0); 1658 input_report_key(pad_input, BTN_BACK, (data[1] & 0x02) != 0);
1646 input_report_key(pad_input, BTN_RIGHT, (data[1] & 0x01) != 0); 1659 input_report_key(pad_input, BTN_RIGHT, (data[1] & 0x01) != 0);
1660 wacom->shared->touch_down = (contact_with_no_pen_down_count > 0);
1647 1661
1648 return 1; 1662 return 1;
1649} 1663}
1650 1664
1651static void wacom_bpt3_touch_msg(struct wacom_wac *wacom, unsigned char *data) 1665static int wacom_bpt3_touch_msg(struct wacom_wac *wacom, unsigned char *data, int last_touch_count)
1652{ 1666{
1653 struct wacom_features *features = &wacom->features; 1667 struct wacom_features *features = &wacom->features;
1654 struct input_dev *input = wacom->input; 1668 struct input_dev *input = wacom->input;
@@ -1656,7 +1670,7 @@ static void wacom_bpt3_touch_msg(struct wacom_wac *wacom, unsigned char *data)
1656 int slot = input_mt_get_slot_by_key(input, data[0]); 1670 int slot = input_mt_get_slot_by_key(input, data[0]);
1657 1671
1658 if (slot < 0) 1672 if (slot < 0)
1659 return; 1673 return 0;
1660 1674
1661 touch = touch && !wacom->shared->stylus_in_proximity; 1675 touch = touch && !wacom->shared->stylus_in_proximity;
1662 1676
@@ -1688,7 +1702,9 @@ static void wacom_bpt3_touch_msg(struct wacom_wac *wacom, unsigned char *data)
1688 input_report_abs(input, ABS_MT_POSITION_Y, y); 1702 input_report_abs(input, ABS_MT_POSITION_Y, y);
1689 input_report_abs(input, ABS_MT_TOUCH_MAJOR, width); 1703 input_report_abs(input, ABS_MT_TOUCH_MAJOR, width);
1690 input_report_abs(input, ABS_MT_TOUCH_MINOR, height); 1704 input_report_abs(input, ABS_MT_TOUCH_MINOR, height);
1705 last_touch_count++;
1691 } 1706 }
1707 return last_touch_count;
1692} 1708}
1693 1709
1694static void wacom_bpt3_button_msg(struct wacom_wac *wacom, unsigned char *data) 1710static void wacom_bpt3_button_msg(struct wacom_wac *wacom, unsigned char *data)
@@ -1713,6 +1729,7 @@ static int wacom_bpt3_touch(struct wacom_wac *wacom)
1713 unsigned char *data = wacom->data; 1729 unsigned char *data = wacom->data;
1714 int count = data[1] & 0x07; 1730 int count = data[1] & 0x07;
1715 int i; 1731 int i;
1732 int contact_with_no_pen_down_count = 0;
1716 1733
1717 if (data[0] != 0x02) 1734 if (data[0] != 0x02)
1718 return 0; 1735 return 0;
@@ -1723,12 +1740,15 @@ static int wacom_bpt3_touch(struct wacom_wac *wacom)
1723 int msg_id = data[offset]; 1740 int msg_id = data[offset];
1724 1741
1725 if (msg_id >= 2 && msg_id <= 17) 1742 if (msg_id >= 2 && msg_id <= 17)
1726 wacom_bpt3_touch_msg(wacom, data + offset); 1743 contact_with_no_pen_down_count =
1744 wacom_bpt3_touch_msg(wacom, data + offset,
1745 contact_with_no_pen_down_count);
1727 else if (msg_id == 128) 1746 else if (msg_id == 128)
1728 wacom_bpt3_button_msg(wacom, data + offset); 1747 wacom_bpt3_button_msg(wacom, data + offset);
1729 1748
1730 } 1749 }
1731 input_mt_report_pointer_emulation(input, true); 1750 input_mt_report_pointer_emulation(input, true);
1751 wacom->shared->touch_down = (contact_with_no_pen_down_count > 0);
1732 1752
1733 return 1; 1753 return 1;
1734} 1754}
@@ -1754,6 +1774,9 @@ static int wacom_bpt_pen(struct wacom_wac *wacom)
1754 return 0; 1774 return 0;
1755 } 1775 }
1756 1776
1777 if (wacom->shared->touch_down)
1778 return 0;
1779
1757 prox = (data[1] & 0x20) == 0x20; 1780 prox = (data[1] & 0x20) == 0x20;
1758 1781
1759 /* 1782 /*
@@ -2725,9 +2748,9 @@ static const struct wacom_features wacom_features_0xF6 =
2725 .oVid = USB_VENDOR_ID_WACOM, .oPid = 0xf8, .touch_max = 10, 2748 .oVid = USB_VENDOR_ID_WACOM, .oPid = 0xf8, .touch_max = 10,
2726 .check_for_hid_type = true, .hid_type = HID_TYPE_USBNONE }; 2749 .check_for_hid_type = true, .hid_type = HID_TYPE_USBNONE };
2727static const struct wacom_features wacom_features_0x32A = 2750static const struct wacom_features wacom_features_0x32A =
2728 { "Wacom Cintiq 27QHD", 119740, 67520, 2047, 2751 { "Wacom Cintiq 27QHD", 119740, 67520, 2047, 63,
2729 63, WACOM_27QHD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES, 2752 WACOM_27QHD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES,
2730 WACOM_27QHD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES }; 2753 WACOM_CINTIQ_OFFSET, WACOM_CINTIQ_OFFSET };
2731static const struct wacom_features wacom_features_0x32B = 2754static const struct wacom_features wacom_features_0x32B =
2732 { "Wacom Cintiq 27QHD touch", 119740, 67520, 2047, 63, 2755 { "Wacom Cintiq 27QHD touch", 119740, 67520, 2047, 63,
2733 WACOM_27QHD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES, 2756 WACOM_27QHD, WACOM_INTUOS3_RES, WACOM_INTUOS3_RES,
diff --git a/drivers/hwmon/ads7828.c b/drivers/hwmon/ads7828.c
index bce4e9ff21bf..6c99ee7bafa3 100644
--- a/drivers/hwmon/ads7828.c
+++ b/drivers/hwmon/ads7828.c
@@ -147,6 +147,9 @@ static int ads7828_probe(struct i2c_client *client,
147 &ads2830_regmap_config); 147 &ads2830_regmap_config);
148 } 148 }
149 149
150 if (IS_ERR(data->regmap))
151 return PTR_ERR(data->regmap);
152
150 data->cmd_byte = ext_vref ? ADS7828_CMD_PD1 : ADS7828_CMD_PD3; 153 data->cmd_byte = ext_vref ? ADS7828_CMD_PD1 : ADS7828_CMD_PD3;
151 if (!diff_input) 154 if (!diff_input)
152 data->cmd_byte |= ADS7828_CMD_SD_SE; 155 data->cmd_byte |= ADS7828_CMD_SD_SE;
diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig
index ab838d9e28b6..22da9c2ffa22 100644
--- a/drivers/i2c/busses/Kconfig
+++ b/drivers/i2c/busses/Kconfig
@@ -79,7 +79,7 @@ config I2C_AMD8111
79 79
80config I2C_HIX5HD2 80config I2C_HIX5HD2
81 tristate "Hix5hd2 high-speed I2C driver" 81 tristate "Hix5hd2 high-speed I2C driver"
82 depends on ARCH_HIX5HD2 82 depends on ARCH_HIX5HD2 || COMPILE_TEST
83 help 83 help
84 Say Y here to include support for high-speed I2C controller in the 84 Say Y here to include support for high-speed I2C controller in the
85 Hisilicon based hix5hd2 SoCs. 85 Hisilicon based hix5hd2 SoCs.
@@ -372,6 +372,16 @@ config I2C_BCM2835
372 This support is also available as a module. If so, the module 372 This support is also available as a module. If so, the module
373 will be called i2c-bcm2835. 373 will be called i2c-bcm2835.
374 374
375config I2C_BCM_IPROC
376 tristate "Broadcom iProc I2C controller"
377 depends on ARCH_BCM_IPROC || COMPILE_TEST
378 default ARCH_BCM_IPROC
379 help
380 If you say yes to this option, support will be included for the
381 Broadcom iProc I2C controller.
382
383 If you don't know what to do here, say N.
384
375config I2C_BCM_KONA 385config I2C_BCM_KONA
376 tristate "BCM Kona I2C adapter" 386 tristate "BCM Kona I2C adapter"
377 depends on ARCH_BCM_MOBILE 387 depends on ARCH_BCM_MOBILE
@@ -465,6 +475,16 @@ config I2C_DESIGNWARE_PCI
465 This driver can also be built as a module. If so, the module 475 This driver can also be built as a module. If so, the module
466 will be called i2c-designware-pci. 476 will be called i2c-designware-pci.
467 477
478config I2C_DESIGNWARE_BAYTRAIL
479 bool "Intel Baytrail I2C semaphore support"
480 depends on I2C_DESIGNWARE_PLATFORM && IOSF_MBI=y && ACPI
481 help
482 This driver enables managed host access to the PMIC I2C bus on select
483 Intel BayTrail platforms using the X-Powers AXP288 PMIC. It allows
484 the host to request uninterrupted access to the PMIC's I2C bus from
485 the platform firmware controlling it. You should say Y if running on
486 a BayTrail system using the AXP288.
487
468config I2C_EFM32 488config I2C_EFM32
469 tristate "EFM32 I2C controller" 489 tristate "EFM32 I2C controller"
470 depends on ARCH_EFM32 || COMPILE_TEST 490 depends on ARCH_EFM32 || COMPILE_TEST
diff --git a/drivers/i2c/busses/Makefile b/drivers/i2c/busses/Makefile
index 56388f658d2f..3638feb6677e 100644
--- a/drivers/i2c/busses/Makefile
+++ b/drivers/i2c/busses/Makefile
@@ -33,6 +33,7 @@ obj-$(CONFIG_I2C_AT91) += i2c-at91.o
33obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o 33obj-$(CONFIG_I2C_AU1550) += i2c-au1550.o
34obj-$(CONFIG_I2C_AXXIA) += i2c-axxia.o 34obj-$(CONFIG_I2C_AXXIA) += i2c-axxia.o
35obj-$(CONFIG_I2C_BCM2835) += i2c-bcm2835.o 35obj-$(CONFIG_I2C_BCM2835) += i2c-bcm2835.o
36obj-$(CONFIG_I2C_BCM_IPROC) += i2c-bcm-iproc.o
36obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o 37obj-$(CONFIG_I2C_BLACKFIN_TWI) += i2c-bfin-twi.o
37obj-$(CONFIG_I2C_CADENCE) += i2c-cadence.o 38obj-$(CONFIG_I2C_CADENCE) += i2c-cadence.o
38obj-$(CONFIG_I2C_CBUS_GPIO) += i2c-cbus-gpio.o 39obj-$(CONFIG_I2C_CBUS_GPIO) += i2c-cbus-gpio.o
@@ -41,6 +42,7 @@ obj-$(CONFIG_I2C_DAVINCI) += i2c-davinci.o
41obj-$(CONFIG_I2C_DESIGNWARE_CORE) += i2c-designware-core.o 42obj-$(CONFIG_I2C_DESIGNWARE_CORE) += i2c-designware-core.o
42obj-$(CONFIG_I2C_DESIGNWARE_PLATFORM) += i2c-designware-platform.o 43obj-$(CONFIG_I2C_DESIGNWARE_PLATFORM) += i2c-designware-platform.o
43i2c-designware-platform-objs := i2c-designware-platdrv.o 44i2c-designware-platform-objs := i2c-designware-platdrv.o
45i2c-designware-platform-$(CONFIG_I2C_DESIGNWARE_BAYTRAIL) += i2c-designware-baytrail.o
44obj-$(CONFIG_I2C_DESIGNWARE_PCI) += i2c-designware-pci.o 46obj-$(CONFIG_I2C_DESIGNWARE_PCI) += i2c-designware-pci.o
45i2c-designware-pci-objs := i2c-designware-pcidrv.o 47i2c-designware-pci-objs := i2c-designware-pcidrv.o
46obj-$(CONFIG_I2C_EFM32) += i2c-efm32.o 48obj-$(CONFIG_I2C_EFM32) += i2c-efm32.o
diff --git a/drivers/i2c/busses/i2c-bcm-iproc.c b/drivers/i2c/busses/i2c-bcm-iproc.c
new file mode 100644
index 000000000000..d3c89157b337
--- /dev/null
+++ b/drivers/i2c/busses/i2c-bcm-iproc.c
@@ -0,0 +1,461 @@
1/*
2 * Copyright (C) 2014 Broadcom Corporation
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation version 2.
7 *
8 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
9 * kind, whether express or implied; without even the implied warranty
10 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#include <linux/delay.h>
15#include <linux/i2c.h>
16#include <linux/interrupt.h>
17#include <linux/io.h>
18#include <linux/kernel.h>
19#include <linux/module.h>
20#include <linux/platform_device.h>
21#include <linux/slab.h>
22
23#define CFG_OFFSET 0x00
24#define CFG_RESET_SHIFT 31
25#define CFG_EN_SHIFT 30
26#define CFG_M_RETRY_CNT_SHIFT 16
27#define CFG_M_RETRY_CNT_MASK 0x0f
28
29#define TIM_CFG_OFFSET 0x04
30#define TIM_CFG_MODE_400_SHIFT 31
31
32#define M_FIFO_CTRL_OFFSET 0x0c
33#define M_FIFO_RX_FLUSH_SHIFT 31
34#define M_FIFO_TX_FLUSH_SHIFT 30
35#define M_FIFO_RX_CNT_SHIFT 16
36#define M_FIFO_RX_CNT_MASK 0x7f
37#define M_FIFO_RX_THLD_SHIFT 8
38#define M_FIFO_RX_THLD_MASK 0x3f
39
40#define M_CMD_OFFSET 0x30
41#define M_CMD_START_BUSY_SHIFT 31
42#define M_CMD_STATUS_SHIFT 25
43#define M_CMD_STATUS_MASK 0x07
44#define M_CMD_STATUS_SUCCESS 0x0
45#define M_CMD_STATUS_LOST_ARB 0x1
46#define M_CMD_STATUS_NACK_ADDR 0x2
47#define M_CMD_STATUS_NACK_DATA 0x3
48#define M_CMD_STATUS_TIMEOUT 0x4
49#define M_CMD_PROTOCOL_SHIFT 9
50#define M_CMD_PROTOCOL_MASK 0xf
51#define M_CMD_PROTOCOL_BLK_WR 0x7
52#define M_CMD_PROTOCOL_BLK_RD 0x8
53#define M_CMD_PEC_SHIFT 8
54#define M_CMD_RD_CNT_SHIFT 0
55#define M_CMD_RD_CNT_MASK 0xff
56
57#define IE_OFFSET 0x38
58#define IE_M_RX_FIFO_FULL_SHIFT 31
59#define IE_M_RX_THLD_SHIFT 30
60#define IE_M_START_BUSY_SHIFT 28
61
62#define IS_OFFSET 0x3c
63#define IS_M_RX_FIFO_FULL_SHIFT 31
64#define IS_M_RX_THLD_SHIFT 30
65#define IS_M_START_BUSY_SHIFT 28
66
67#define M_TX_OFFSET 0x40
68#define M_TX_WR_STATUS_SHIFT 31
69#define M_TX_DATA_SHIFT 0
70#define M_TX_DATA_MASK 0xff
71
72#define M_RX_OFFSET 0x44
73#define M_RX_STATUS_SHIFT 30
74#define M_RX_STATUS_MASK 0x03
75#define M_RX_PEC_ERR_SHIFT 29
76#define M_RX_DATA_SHIFT 0
77#define M_RX_DATA_MASK 0xff
78
79#define I2C_TIMEOUT_MESC 100
80#define M_TX_RX_FIFO_SIZE 64
81
82enum bus_speed_index {
83 I2C_SPD_100K = 0,
84 I2C_SPD_400K,
85};
86
87struct bcm_iproc_i2c_dev {
88 struct device *device;
89 int irq;
90
91 void __iomem *base;
92
93 struct i2c_adapter adapter;
94
95 struct completion done;
96 int xfer_is_done;
97};
98
99/*
100 * Can be expanded in the future if more interrupt status bits are utilized
101 */
102#define ISR_MASK (1 << IS_M_START_BUSY_SHIFT)
103
104static irqreturn_t bcm_iproc_i2c_isr(int irq, void *data)
105{
106 struct bcm_iproc_i2c_dev *iproc_i2c = data;
107 u32 status = readl(iproc_i2c->base + IS_OFFSET);
108
109 status &= ISR_MASK;
110
111 if (!status)
112 return IRQ_NONE;
113
114 writel(status, iproc_i2c->base + IS_OFFSET);
115 iproc_i2c->xfer_is_done = 1;
116 complete_all(&iproc_i2c->done);
117
118 return IRQ_HANDLED;
119}
120
121static int bcm_iproc_i2c_check_status(struct bcm_iproc_i2c_dev *iproc_i2c,
122 struct i2c_msg *msg)
123{
124 u32 val;
125
126 val = readl(iproc_i2c->base + M_CMD_OFFSET);
127 val = (val >> M_CMD_STATUS_SHIFT) & M_CMD_STATUS_MASK;
128
129 switch (val) {
130 case M_CMD_STATUS_SUCCESS:
131 return 0;
132
133 case M_CMD_STATUS_LOST_ARB:
134 dev_dbg(iproc_i2c->device, "lost bus arbitration\n");
135 return -EAGAIN;
136
137 case M_CMD_STATUS_NACK_ADDR:
138 dev_dbg(iproc_i2c->device, "NAK addr:0x%02x\n", msg->addr);
139 return -ENXIO;
140
141 case M_CMD_STATUS_NACK_DATA:
142 dev_dbg(iproc_i2c->device, "NAK data\n");
143 return -ENXIO;
144
145 case M_CMD_STATUS_TIMEOUT:
146 dev_dbg(iproc_i2c->device, "bus timeout\n");
147 return -ETIMEDOUT;
148
149 default:
150 dev_dbg(iproc_i2c->device, "unknown error code=%d\n", val);
151 return -EIO;
152 }
153}
154
155static int bcm_iproc_i2c_xfer_single_msg(struct bcm_iproc_i2c_dev *iproc_i2c,
156 struct i2c_msg *msg)
157{
158 int ret, i;
159 u8 addr;
160 u32 val;
161 unsigned long time_left = msecs_to_jiffies(I2C_TIMEOUT_MESC);
162
163 /* need to reserve one byte in the FIFO for the slave address */
164 if (msg->len > M_TX_RX_FIFO_SIZE - 1) {
165 dev_err(iproc_i2c->device,
166 "only support data length up to %u bytes\n",
167 M_TX_RX_FIFO_SIZE - 1);
168 return -EOPNOTSUPP;
169 }
170
171 /* check if bus is busy */
172 if (!!(readl(iproc_i2c->base + M_CMD_OFFSET) &
173 BIT(M_CMD_START_BUSY_SHIFT))) {
174 dev_warn(iproc_i2c->device, "bus is busy\n");
175 return -EBUSY;
176 }
177
178 /* format and load slave address into the TX FIFO */
179 addr = msg->addr << 1 | (msg->flags & I2C_M_RD ? 1 : 0);
180 writel(addr, iproc_i2c->base + M_TX_OFFSET);
181
182 /* for a write transaction, load data into the TX FIFO */
183 if (!(msg->flags & I2C_M_RD)) {
184 for (i = 0; i < msg->len; i++) {
185 val = msg->buf[i];
186
187 /* mark the last byte */
188 if (i == msg->len - 1)
189 val |= 1 << M_TX_WR_STATUS_SHIFT;
190
191 writel(val, iproc_i2c->base + M_TX_OFFSET);
192 }
193 }
194
195 /* mark as incomplete before starting the transaction */
196 reinit_completion(&iproc_i2c->done);
197 iproc_i2c->xfer_is_done = 0;
198
199 /*
200 * Enable the "start busy" interrupt, which will be triggered after the
201 * transaction is done, i.e., the internal start_busy bit, transitions
202 * from 1 to 0.
203 */
204 writel(1 << IE_M_START_BUSY_SHIFT, iproc_i2c->base + IE_OFFSET);
205
206 /*
207 * Now we can activate the transfer. For a read operation, specify the
208 * number of bytes to read
209 */
210 val = 1 << M_CMD_START_BUSY_SHIFT;
211 if (msg->flags & I2C_M_RD) {
212 val |= (M_CMD_PROTOCOL_BLK_RD << M_CMD_PROTOCOL_SHIFT) |
213 (msg->len << M_CMD_RD_CNT_SHIFT);
214 } else {
215 val |= (M_CMD_PROTOCOL_BLK_WR << M_CMD_PROTOCOL_SHIFT);
216 }
217 writel(val, iproc_i2c->base + M_CMD_OFFSET);
218
219 time_left = wait_for_completion_timeout(&iproc_i2c->done, time_left);
220
221 /* disable all interrupts */
222 writel(0, iproc_i2c->base + IE_OFFSET);
223 /* read it back to flush the write */
224 readl(iproc_i2c->base + IE_OFFSET);
225
226 /* make sure the interrupt handler isn't running */
227 synchronize_irq(iproc_i2c->irq);
228
229 if (!time_left && !iproc_i2c->xfer_is_done) {
230 dev_err(iproc_i2c->device, "transaction timed out\n");
231
232 /* flush FIFOs */
233 val = (1 << M_FIFO_RX_FLUSH_SHIFT) |
234 (1 << M_FIFO_TX_FLUSH_SHIFT);
235 writel(val, iproc_i2c->base + M_FIFO_CTRL_OFFSET);
236 return -ETIMEDOUT;
237 }
238
239 ret = bcm_iproc_i2c_check_status(iproc_i2c, msg);
240 if (ret) {
241 /* flush both TX/RX FIFOs */
242 val = (1 << M_FIFO_RX_FLUSH_SHIFT) |
243 (1 << M_FIFO_TX_FLUSH_SHIFT);
244 writel(val, iproc_i2c->base + M_FIFO_CTRL_OFFSET);
245 return ret;
246 }
247
248 /*
249 * For a read operation, we now need to load the data from FIFO
250 * into the memory buffer
251 */
252 if (msg->flags & I2C_M_RD) {
253 for (i = 0; i < msg->len; i++) {
254 msg->buf[i] = (readl(iproc_i2c->base + M_RX_OFFSET) >>
255 M_RX_DATA_SHIFT) & M_RX_DATA_MASK;
256 }
257 }
258
259 return 0;
260}
261
262static int bcm_iproc_i2c_xfer(struct i2c_adapter *adapter,
263 struct i2c_msg msgs[], int num)
264{
265 struct bcm_iproc_i2c_dev *iproc_i2c = i2c_get_adapdata(adapter);
266 int ret, i;
267
268 /* go through all messages */
269 for (i = 0; i < num; i++) {
270 ret = bcm_iproc_i2c_xfer_single_msg(iproc_i2c, &msgs[i]);
271 if (ret) {
272 dev_dbg(iproc_i2c->device, "xfer failed\n");
273 return ret;
274 }
275 }
276
277 return num;
278}
279
280static uint32_t bcm_iproc_i2c_functionality(struct i2c_adapter *adap)
281{
282 return I2C_FUNC_I2C | I2C_FUNC_SMBUS_EMUL;
283}
284
285static const struct i2c_algorithm bcm_iproc_algo = {
286 .master_xfer = bcm_iproc_i2c_xfer,
287 .functionality = bcm_iproc_i2c_functionality,
288};
289
290static int bcm_iproc_i2c_cfg_speed(struct bcm_iproc_i2c_dev *iproc_i2c)
291{
292 unsigned int bus_speed;
293 u32 val;
294 int ret = of_property_read_u32(iproc_i2c->device->of_node,
295 "clock-frequency", &bus_speed);
296 if (ret < 0) {
297 dev_info(iproc_i2c->device,
298 "unable to interpret clock-frequency DT property\n");
299 bus_speed = 100000;
300 }
301
302 if (bus_speed < 100000) {
303 dev_err(iproc_i2c->device, "%d Hz bus speed not supported\n",
304 bus_speed);
305 dev_err(iproc_i2c->device,
306 "valid speeds are 100khz and 400khz\n");
307 return -EINVAL;
308 } else if (bus_speed < 400000) {
309 bus_speed = 100000;
310 } else {
311 bus_speed = 400000;
312 }
313
314 val = readl(iproc_i2c->base + TIM_CFG_OFFSET);
315 val &= ~(1 << TIM_CFG_MODE_400_SHIFT);
316 val |= (bus_speed == 400000) << TIM_CFG_MODE_400_SHIFT;
317 writel(val, iproc_i2c->base + TIM_CFG_OFFSET);
318
319 dev_info(iproc_i2c->device, "bus set to %u Hz\n", bus_speed);
320
321 return 0;
322}
323
324static int bcm_iproc_i2c_init(struct bcm_iproc_i2c_dev *iproc_i2c)
325{
326 u32 val;
327
328 /* put controller in reset */
329 val = readl(iproc_i2c->base + CFG_OFFSET);
330 val |= 1 << CFG_RESET_SHIFT;
331 val &= ~(1 << CFG_EN_SHIFT);
332 writel(val, iproc_i2c->base + CFG_OFFSET);
333
334 /* wait 100 usec per spec */
335 udelay(100);
336
337 /* bring controller out of reset */
338 val &= ~(1 << CFG_RESET_SHIFT);
339 writel(val, iproc_i2c->base + CFG_OFFSET);
340
341 /* flush TX/RX FIFOs and set RX FIFO threshold to zero */
342 val = (1 << M_FIFO_RX_FLUSH_SHIFT) | (1 << M_FIFO_TX_FLUSH_SHIFT);
343 writel(val, iproc_i2c->base + M_FIFO_CTRL_OFFSET);
344
345 /* disable all interrupts */
346 writel(0, iproc_i2c->base + IE_OFFSET);
347
348 /* clear all pending interrupts */
349 writel(0xffffffff, iproc_i2c->base + IS_OFFSET);
350
351 return 0;
352}
353
354static void bcm_iproc_i2c_enable_disable(struct bcm_iproc_i2c_dev *iproc_i2c,
355 bool enable)
356{
357 u32 val;
358
359 val = readl(iproc_i2c->base + CFG_OFFSET);
360 if (enable)
361 val |= BIT(CFG_EN_SHIFT);
362 else
363 val &= ~BIT(CFG_EN_SHIFT);
364 writel(val, iproc_i2c->base + CFG_OFFSET);
365}
366
367static int bcm_iproc_i2c_probe(struct platform_device *pdev)
368{
369 int irq, ret = 0;
370 struct bcm_iproc_i2c_dev *iproc_i2c;
371 struct i2c_adapter *adap;
372 struct resource *res;
373
374 iproc_i2c = devm_kzalloc(&pdev->dev, sizeof(*iproc_i2c),
375 GFP_KERNEL);
376 if (!iproc_i2c)
377 return -ENOMEM;
378
379 platform_set_drvdata(pdev, iproc_i2c);
380 iproc_i2c->device = &pdev->dev;
381 init_completion(&iproc_i2c->done);
382
383 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
384 iproc_i2c->base = devm_ioremap_resource(iproc_i2c->device, res);
385 if (IS_ERR(iproc_i2c->base))
386 return PTR_ERR(iproc_i2c->base);
387
388 ret = bcm_iproc_i2c_init(iproc_i2c);
389 if (ret)
390 return ret;
391
392 ret = bcm_iproc_i2c_cfg_speed(iproc_i2c);
393 if (ret)
394 return ret;
395
396 irq = platform_get_irq(pdev, 0);
397 if (irq <= 0) {
398 dev_err(iproc_i2c->device, "no irq resource\n");
399 return irq;
400 }
401 iproc_i2c->irq = irq;
402
403 ret = devm_request_irq(iproc_i2c->device, irq, bcm_iproc_i2c_isr, 0,
404 pdev->name, iproc_i2c);
405 if (ret < 0) {
406 dev_err(iproc_i2c->device, "unable to request irq %i\n", irq);
407 return ret;
408 }
409
410 bcm_iproc_i2c_enable_disable(iproc_i2c, true);
411
412 adap = &iproc_i2c->adapter;
413 i2c_set_adapdata(adap, iproc_i2c);
414 strlcpy(adap->name, "Broadcom iProc I2C adapter", sizeof(adap->name));
415 adap->algo = &bcm_iproc_algo;
416 adap->dev.parent = &pdev->dev;
417 adap->dev.of_node = pdev->dev.of_node;
418
419 ret = i2c_add_adapter(adap);
420 if (ret) {
421 dev_err(iproc_i2c->device, "failed to add adapter\n");
422 return ret;
423 }
424
425 return 0;
426}
427
428static int bcm_iproc_i2c_remove(struct platform_device *pdev)
429{
430 struct bcm_iproc_i2c_dev *iproc_i2c = platform_get_drvdata(pdev);
431
432 /* make sure there's no pending interrupt when we remove the adapter */
433 writel(0, iproc_i2c->base + IE_OFFSET);
434 readl(iproc_i2c->base + IE_OFFSET);
435 synchronize_irq(iproc_i2c->irq);
436
437 i2c_del_adapter(&iproc_i2c->adapter);
438 bcm_iproc_i2c_enable_disable(iproc_i2c, false);
439
440 return 0;
441}
442
443static const struct of_device_id bcm_iproc_i2c_of_match[] = {
444 { .compatible = "brcm,iproc-i2c" },
445 { /* sentinel */ }
446};
447MODULE_DEVICE_TABLE(of, bcm_iproc_i2c_of_match);
448
449static struct platform_driver bcm_iproc_i2c_driver = {
450 .driver = {
451 .name = "bcm-iproc-i2c",
452 .of_match_table = bcm_iproc_i2c_of_match,
453 },
454 .probe = bcm_iproc_i2c_probe,
455 .remove = bcm_iproc_i2c_remove,
456};
457module_platform_driver(bcm_iproc_i2c_driver);
458
459MODULE_AUTHOR("Ray Jui <rjui@broadcom.com>");
460MODULE_DESCRIPTION("Broadcom iProc I2C Driver");
461MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/i2c-cadence.c b/drivers/i2c/busses/i2c-cadence.c
index 626f74ecd4be..7d7a14cdadfb 100644
--- a/drivers/i2c/busses/i2c-cadence.c
+++ b/drivers/i2c/busses/i2c-cadence.c
@@ -128,6 +128,7 @@
128 * @suspended: Flag holding the device's PM status 128 * @suspended: Flag holding the device's PM status
129 * @send_count: Number of bytes still expected to send 129 * @send_count: Number of bytes still expected to send
130 * @recv_count: Number of bytes still expected to receive 130 * @recv_count: Number of bytes still expected to receive
131 * @curr_recv_count: Number of bytes to be received in current transfer
131 * @irq: IRQ number 132 * @irq: IRQ number
132 * @input_clk: Input clock to I2C controller 133 * @input_clk: Input clock to I2C controller
133 * @i2c_clk: Maximum I2C clock speed 134 * @i2c_clk: Maximum I2C clock speed
@@ -146,6 +147,7 @@ struct cdns_i2c {
146 u8 suspended; 147 u8 suspended;
147 unsigned int send_count; 148 unsigned int send_count;
148 unsigned int recv_count; 149 unsigned int recv_count;
150 unsigned int curr_recv_count;
149 int irq; 151 int irq;
150 unsigned long input_clk; 152 unsigned long input_clk;
151 unsigned int i2c_clk; 153 unsigned int i2c_clk;
@@ -182,14 +184,15 @@ static void cdns_i2c_clear_bus_hold(struct cdns_i2c *id)
182 */ 184 */
183static irqreturn_t cdns_i2c_isr(int irq, void *ptr) 185static irqreturn_t cdns_i2c_isr(int irq, void *ptr)
184{ 186{
185 unsigned int isr_status, avail_bytes; 187 unsigned int isr_status, avail_bytes, updatetx;
186 unsigned int bytes_to_recv, bytes_to_send; 188 unsigned int bytes_to_send;
187 struct cdns_i2c *id = ptr; 189 struct cdns_i2c *id = ptr;
188 /* Signal completion only after everything is updated */ 190 /* Signal completion only after everything is updated */
189 int done_flag = 0; 191 int done_flag = 0;
190 irqreturn_t status = IRQ_NONE; 192 irqreturn_t status = IRQ_NONE;
191 193
192 isr_status = cdns_i2c_readreg(CDNS_I2C_ISR_OFFSET); 194 isr_status = cdns_i2c_readreg(CDNS_I2C_ISR_OFFSET);
195 cdns_i2c_writereg(isr_status, CDNS_I2C_ISR_OFFSET);
193 196
194 /* Handling nack and arbitration lost interrupt */ 197 /* Handling nack and arbitration lost interrupt */
195 if (isr_status & (CDNS_I2C_IXR_NACK | CDNS_I2C_IXR_ARB_LOST)) { 198 if (isr_status & (CDNS_I2C_IXR_NACK | CDNS_I2C_IXR_ARB_LOST)) {
@@ -197,89 +200,112 @@ static irqreturn_t cdns_i2c_isr(int irq, void *ptr)
197 status = IRQ_HANDLED; 200 status = IRQ_HANDLED;
198 } 201 }
199 202
200 /* Handling Data interrupt */ 203 /*
201 if ((isr_status & CDNS_I2C_IXR_DATA) && 204 * Check if transfer size register needs to be updated again for a
202 (id->recv_count >= CDNS_I2C_DATA_INTR_DEPTH)) { 205 * large data receive operation.
203 /* Always read data interrupt threshold bytes */ 206 */
204 bytes_to_recv = CDNS_I2C_DATA_INTR_DEPTH; 207 updatetx = 0;
205 id->recv_count -= CDNS_I2C_DATA_INTR_DEPTH; 208 if (id->recv_count > id->curr_recv_count)
206 avail_bytes = cdns_i2c_readreg(CDNS_I2C_XFER_SIZE_OFFSET); 209 updatetx = 1;
207 210
208 /* 211 /* When receiving, handle data interrupt and completion interrupt */
209 * if the tranfer size register value is zero, then 212 if (id->p_recv_buf &&
210 * check for the remaining bytes and update the 213 ((isr_status & CDNS_I2C_IXR_COMP) ||
211 * transfer size register. 214 (isr_status & CDNS_I2C_IXR_DATA))) {
212 */ 215 /* Read data if receive data valid is set */
213 if (!avail_bytes) { 216 while (cdns_i2c_readreg(CDNS_I2C_SR_OFFSET) &
214 if (id->recv_count > CDNS_I2C_TRANSFER_SIZE) 217 CDNS_I2C_SR_RXDV) {
215 cdns_i2c_writereg(CDNS_I2C_TRANSFER_SIZE, 218 /*
216 CDNS_I2C_XFER_SIZE_OFFSET); 219 * Clear hold bit that was set for FIFO control if
217 else 220 * RX data left is less than FIFO depth, unless
218 cdns_i2c_writereg(id->recv_count, 221 * repeated start is selected.
219 CDNS_I2C_XFER_SIZE_OFFSET); 222 */
220 } 223 if ((id->recv_count < CDNS_I2C_FIFO_DEPTH) &&
224 !id->bus_hold_flag)
225 cdns_i2c_clear_bus_hold(id);
221 226
222 /* Process the data received */
223 while (bytes_to_recv--)
224 *(id->p_recv_buf)++ = 227 *(id->p_recv_buf)++ =
225 cdns_i2c_readreg(CDNS_I2C_DATA_OFFSET); 228 cdns_i2c_readreg(CDNS_I2C_DATA_OFFSET);
229 id->recv_count--;
230 id->curr_recv_count--;
226 231
227 if (!id->bus_hold_flag && 232 if (updatetx &&
228 (id->recv_count <= CDNS_I2C_FIFO_DEPTH)) 233 (id->curr_recv_count == CDNS_I2C_FIFO_DEPTH + 1))
229 cdns_i2c_clear_bus_hold(id); 234 break;
235 }
230 236
231 status = IRQ_HANDLED; 237 /*
232 } 238 * The controller sends NACK to the slave when transfer size
239 * register reaches zero without considering the HOLD bit.
240 * This workaround is implemented for large data transfers to
241 * maintain transfer size non-zero while performing a large
242 * receive operation.
243 */
244 if (updatetx &&
245 (id->curr_recv_count == CDNS_I2C_FIFO_DEPTH + 1)) {
246 /* wait while fifo is full */
247 while (cdns_i2c_readreg(CDNS_I2C_XFER_SIZE_OFFSET) !=
248 (id->curr_recv_count - CDNS_I2C_FIFO_DEPTH))
249 ;
233 250
234 /* Handling Transfer Complete interrupt */
235 if (isr_status & CDNS_I2C_IXR_COMP) {
236 if (!id->p_recv_buf) {
237 /* 251 /*
238 * If the device is sending data If there is further 252 * Check number of bytes to be received against maximum
239 * data to be sent. Calculate the available space 253 * transfer size and update register accordingly.
240 * in FIFO and fill the FIFO with that many bytes.
241 */ 254 */
242 if (id->send_count) { 255 if (((int)(id->recv_count) - CDNS_I2C_FIFO_DEPTH) >
243 avail_bytes = CDNS_I2C_FIFO_DEPTH - 256 CDNS_I2C_TRANSFER_SIZE) {
244 cdns_i2c_readreg(CDNS_I2C_XFER_SIZE_OFFSET); 257 cdns_i2c_writereg(CDNS_I2C_TRANSFER_SIZE,
245 if (id->send_count > avail_bytes) 258 CDNS_I2C_XFER_SIZE_OFFSET);
246 bytes_to_send = avail_bytes; 259 id->curr_recv_count = CDNS_I2C_TRANSFER_SIZE +
247 else 260 CDNS_I2C_FIFO_DEPTH;
248 bytes_to_send = id->send_count;
249
250 while (bytes_to_send--) {
251 cdns_i2c_writereg(
252 (*(id->p_send_buf)++),
253 CDNS_I2C_DATA_OFFSET);
254 id->send_count--;
255 }
256 } else { 261 } else {
257 /* 262 cdns_i2c_writereg(id->recv_count -
258 * Signal the completion of transaction and 263 CDNS_I2C_FIFO_DEPTH,
259 * clear the hold bus bit if there are no 264 CDNS_I2C_XFER_SIZE_OFFSET);
260 * further messages to be processed. 265 id->curr_recv_count = id->recv_count;
261 */
262 done_flag = 1;
263 } 266 }
264 if (!id->send_count && !id->bus_hold_flag) 267 }
265 cdns_i2c_clear_bus_hold(id); 268
266 } else { 269 /* Clear hold (if not repeated start) and signal completion */
270 if ((isr_status & CDNS_I2C_IXR_COMP) && !id->recv_count) {
267 if (!id->bus_hold_flag) 271 if (!id->bus_hold_flag)
268 cdns_i2c_clear_bus_hold(id); 272 cdns_i2c_clear_bus_hold(id);
273 done_flag = 1;
274 }
275
276 status = IRQ_HANDLED;
277 }
278
279 /* When sending, handle transfer complete interrupt */
280 if ((isr_status & CDNS_I2C_IXR_COMP) && !id->p_recv_buf) {
281 /*
282 * If there is more data to be sent, calculate the
283 * space available in FIFO and fill with that many bytes.
284 */
285 if (id->send_count) {
286 avail_bytes = CDNS_I2C_FIFO_DEPTH -
287 cdns_i2c_readreg(CDNS_I2C_XFER_SIZE_OFFSET);
288 if (id->send_count > avail_bytes)
289 bytes_to_send = avail_bytes;
290 else
291 bytes_to_send = id->send_count;
292
293 while (bytes_to_send--) {
294 cdns_i2c_writereg(
295 (*(id->p_send_buf)++),
296 CDNS_I2C_DATA_OFFSET);
297 id->send_count--;
298 }
299 } else {
269 /* 300 /*
270 * If the device is receiving data, then signal 301 * Signal the completion of transaction and
271 * the completion of transaction and read the data 302 * clear the hold bus bit if there are no
272 * present in the FIFO. Signal the completion of 303 * further messages to be processed.
273 * transaction.
274 */ 304 */
275 while (cdns_i2c_readreg(CDNS_I2C_SR_OFFSET) &
276 CDNS_I2C_SR_RXDV) {
277 *(id->p_recv_buf)++ =
278 cdns_i2c_readreg(CDNS_I2C_DATA_OFFSET);
279 id->recv_count--;
280 }
281 done_flag = 1; 305 done_flag = 1;
282 } 306 }
307 if (!id->send_count && !id->bus_hold_flag)
308 cdns_i2c_clear_bus_hold(id);
283 309
284 status = IRQ_HANDLED; 310 status = IRQ_HANDLED;
285 } 311 }
@@ -289,8 +315,6 @@ static irqreturn_t cdns_i2c_isr(int irq, void *ptr)
289 if (id->err_status) 315 if (id->err_status)
290 status = IRQ_HANDLED; 316 status = IRQ_HANDLED;
291 317
292 cdns_i2c_writereg(isr_status, CDNS_I2C_ISR_OFFSET);
293
294 if (done_flag) 318 if (done_flag)
295 complete(&id->xfer_done); 319 complete(&id->xfer_done);
296 320
@@ -316,6 +340,8 @@ static void cdns_i2c_mrecv(struct cdns_i2c *id)
316 if (id->p_msg->flags & I2C_M_RECV_LEN) 340 if (id->p_msg->flags & I2C_M_RECV_LEN)
317 id->recv_count = I2C_SMBUS_BLOCK_MAX + 1; 341 id->recv_count = I2C_SMBUS_BLOCK_MAX + 1;
318 342
343 id->curr_recv_count = id->recv_count;
344
319 /* 345 /*
320 * Check for the message size against FIFO depth and set the 346 * Check for the message size against FIFO depth and set the
321 * 'hold bus' bit if it is greater than FIFO depth. 347 * 'hold bus' bit if it is greater than FIFO depth.
@@ -335,11 +361,14 @@ static void cdns_i2c_mrecv(struct cdns_i2c *id)
335 * receive if it is less than transfer size and transfer size if 361 * receive if it is less than transfer size and transfer size if
336 * it is more. Enable the interrupts. 362 * it is more. Enable the interrupts.
337 */ 363 */
338 if (id->recv_count > CDNS_I2C_TRANSFER_SIZE) 364 if (id->recv_count > CDNS_I2C_TRANSFER_SIZE) {
339 cdns_i2c_writereg(CDNS_I2C_TRANSFER_SIZE, 365 cdns_i2c_writereg(CDNS_I2C_TRANSFER_SIZE,
340 CDNS_I2C_XFER_SIZE_OFFSET); 366 CDNS_I2C_XFER_SIZE_OFFSET);
341 else 367 id->curr_recv_count = CDNS_I2C_TRANSFER_SIZE;
368 } else {
342 cdns_i2c_writereg(id->recv_count, CDNS_I2C_XFER_SIZE_OFFSET); 369 cdns_i2c_writereg(id->recv_count, CDNS_I2C_XFER_SIZE_OFFSET);
370 }
371
343 /* Clear the bus hold flag if bytes to receive is less than FIFO size */ 372 /* Clear the bus hold flag if bytes to receive is less than FIFO size */
344 if (!id->bus_hold_flag && 373 if (!id->bus_hold_flag &&
345 ((id->p_msg->flags & I2C_M_RECV_LEN) != I2C_M_RECV_LEN) && 374 ((id->p_msg->flags & I2C_M_RECV_LEN) != I2C_M_RECV_LEN) &&
@@ -516,6 +545,20 @@ static int cdns_i2c_master_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs,
516 * processed with a repeated start. 545 * processed with a repeated start.
517 */ 546 */
518 if (num > 1) { 547 if (num > 1) {
548 /*
549 * This controller does not give completion interrupt after a
550 * master receive message if HOLD bit is set (repeated start),
551 * resulting in SW timeout. Hence, if a receive message is
552 * followed by any other message, an error is returned
553 * indicating that this sequence is not supported.
554 */
555 for (count = 0; count < num - 1; count++) {
556 if (msgs[count].flags & I2C_M_RD) {
557 dev_warn(adap->dev.parent,
558 "Can't do repeated start after a receive message\n");
559 return -EOPNOTSUPP;
560 }
561 }
519 id->bus_hold_flag = 1; 562 id->bus_hold_flag = 1;
520 reg = cdns_i2c_readreg(CDNS_I2C_CR_OFFSET); 563 reg = cdns_i2c_readreg(CDNS_I2C_CR_OFFSET);
521 reg |= CDNS_I2C_CR_HOLD; 564 reg |= CDNS_I2C_CR_HOLD;
diff --git a/drivers/i2c/busses/i2c-designware-baytrail.c b/drivers/i2c/busses/i2c-designware-baytrail.c
new file mode 100644
index 000000000000..7d7ae97476e2
--- /dev/null
+++ b/drivers/i2c/busses/i2c-designware-baytrail.c
@@ -0,0 +1,162 @@
1/*
2 * Intel BayTrail PMIC I2C bus semaphore implementaion
3 * Copyright (c) 2014, Intel Corporation.
4 *
5 * This program is free software; you can redistribute it and/or modify it
6 * under the terms and conditions of the GNU General Public License,
7 * version 2, as published by the Free Software Foundation.
8 *
9 * This program is distributed in the hope it will be useful, but WITHOUT
10 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
11 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
12 * more details.
13 */
14#include <linux/module.h>
15#include <linux/delay.h>
16#include <linux/device.h>
17#include <linux/acpi.h>
18#include <linux/i2c.h>
19#include <linux/interrupt.h>
20
21#include <asm/iosf_mbi.h>
22
23#include "i2c-designware-core.h"
24
25#define SEMAPHORE_TIMEOUT 100
26#define PUNIT_SEMAPHORE 0x7
27#define PUNIT_SEMAPHORE_BIT BIT(0)
28#define PUNIT_SEMAPHORE_ACQUIRE BIT(1)
29
30static unsigned long acquired;
31
32static int get_sem(struct device *dev, u32 *sem)
33{
34 u32 data;
35 int ret;
36
37 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ, PUNIT_SEMAPHORE,
38 &data);
39 if (ret) {
40 dev_err(dev, "iosf failed to read punit semaphore\n");
41 return ret;
42 }
43
44 *sem = data & PUNIT_SEMAPHORE_BIT;
45
46 return 0;
47}
48
49static void reset_semaphore(struct device *dev)
50{
51 u32 data;
52
53 if (iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ,
54 PUNIT_SEMAPHORE, &data)) {
55 dev_err(dev, "iosf failed to reset punit semaphore during read\n");
56 return;
57 }
58
59 data &= ~PUNIT_SEMAPHORE_BIT;
60 if (iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE,
61 PUNIT_SEMAPHORE, data))
62 dev_err(dev, "iosf failed to reset punit semaphore during write\n");
63}
64
65static int baytrail_i2c_acquire(struct dw_i2c_dev *dev)
66{
67 u32 sem;
68 int ret;
69 unsigned long start, end;
70
71 might_sleep();
72
73 if (!dev || !dev->dev)
74 return -ENODEV;
75
76 if (!dev->release_lock)
77 return 0;
78
79 /* host driver writes to side band semaphore register */
80 ret = iosf_mbi_write(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_WRITE,
81 PUNIT_SEMAPHORE, PUNIT_SEMAPHORE_ACQUIRE);
82 if (ret) {
83 dev_err(dev->dev, "iosf punit semaphore request failed\n");
84 return ret;
85 }
86
87 /* host driver waits for bit 0 to be set in semaphore register */
88 start = jiffies;
89 end = start + msecs_to_jiffies(SEMAPHORE_TIMEOUT);
90 do {
91 ret = get_sem(dev->dev, &sem);
92 if (!ret && sem) {
93 acquired = jiffies;
94 dev_dbg(dev->dev, "punit semaphore acquired after %ums\n",
95 jiffies_to_msecs(jiffies - start));
96 return 0;
97 }
98
99 usleep_range(1000, 2000);
100 } while (time_before(jiffies, end));
101
102 dev_err(dev->dev, "punit semaphore timed out, resetting\n");
103 reset_semaphore(dev->dev);
104
105 ret = iosf_mbi_read(BT_MBI_UNIT_PMC, BT_MBI_BUNIT_READ,
106 PUNIT_SEMAPHORE, &sem);
107 if (ret)
108 dev_err(dev->dev, "iosf failed to read punit semaphore\n");
109 else
110 dev_err(dev->dev, "PUNIT SEM: %d\n", sem);
111
112 WARN_ON(1);
113
114 return -ETIMEDOUT;
115}
116
117static void baytrail_i2c_release(struct dw_i2c_dev *dev)
118{
119 if (!dev || !dev->dev)
120 return;
121
122 if (!dev->acquire_lock)
123 return;
124
125 reset_semaphore(dev->dev);
126 dev_dbg(dev->dev, "punit semaphore held for %ums\n",
127 jiffies_to_msecs(jiffies - acquired));
128}
129
130int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev)
131{
132 acpi_status status;
133 unsigned long long shared_host = 0;
134 acpi_handle handle;
135
136 if (!dev || !dev->dev)
137 return 0;
138
139 handle = ACPI_HANDLE(dev->dev);
140 if (!handle)
141 return 0;
142
143 status = acpi_evaluate_integer(handle, "_SEM", NULL, &shared_host);
144 if (ACPI_FAILURE(status))
145 return 0;
146
147 if (shared_host) {
148 dev_info(dev->dev, "I2C bus managed by PUNIT\n");
149 dev->acquire_lock = baytrail_i2c_acquire;
150 dev->release_lock = baytrail_i2c_release;
151 dev->pm_runtime_disabled = true;
152 }
153
154 if (!iosf_mbi_available())
155 return -EPROBE_DEFER;
156
157 return 0;
158}
159
160MODULE_AUTHOR("David E. Box <david.e.box@linux.intel.com>");
161MODULE_DESCRIPTION("Baytrail I2C Semaphore driver");
162MODULE_LICENSE("GPL v2");
diff --git a/drivers/i2c/busses/i2c-designware-core.c b/drivers/i2c/busses/i2c-designware-core.c
index 23628b7bfb8d..6e25c010e690 100644
--- a/drivers/i2c/busses/i2c-designware-core.c
+++ b/drivers/i2c/busses/i2c-designware-core.c
@@ -170,10 +170,10 @@ u32 dw_readl(struct dw_i2c_dev *dev, int offset)
170 u32 value; 170 u32 value;
171 171
172 if (dev->accessor_flags & ACCESS_16BIT) 172 if (dev->accessor_flags & ACCESS_16BIT)
173 value = readw(dev->base + offset) | 173 value = readw_relaxed(dev->base + offset) |
174 (readw(dev->base + offset + 2) << 16); 174 (readw_relaxed(dev->base + offset + 2) << 16);
175 else 175 else
176 value = readl(dev->base + offset); 176 value = readl_relaxed(dev->base + offset);
177 177
178 if (dev->accessor_flags & ACCESS_SWAP) 178 if (dev->accessor_flags & ACCESS_SWAP)
179 return swab32(value); 179 return swab32(value);
@@ -187,10 +187,10 @@ void dw_writel(struct dw_i2c_dev *dev, u32 b, int offset)
187 b = swab32(b); 187 b = swab32(b);
188 188
189 if (dev->accessor_flags & ACCESS_16BIT) { 189 if (dev->accessor_flags & ACCESS_16BIT) {
190 writew((u16)b, dev->base + offset); 190 writew_relaxed((u16)b, dev->base + offset);
191 writew((u16)(b >> 16), dev->base + offset + 2); 191 writew_relaxed((u16)(b >> 16), dev->base + offset + 2);
192 } else { 192 } else {
193 writel(b, dev->base + offset); 193 writel_relaxed(b, dev->base + offset);
194 } 194 }
195} 195}
196 196
@@ -285,6 +285,15 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
285 u32 hcnt, lcnt; 285 u32 hcnt, lcnt;
286 u32 reg; 286 u32 reg;
287 u32 sda_falling_time, scl_falling_time; 287 u32 sda_falling_time, scl_falling_time;
288 int ret;
289
290 if (dev->acquire_lock) {
291 ret = dev->acquire_lock(dev);
292 if (ret) {
293 dev_err(dev->dev, "couldn't acquire bus ownership\n");
294 return ret;
295 }
296 }
288 297
289 input_clock_khz = dev->get_clk_rate_khz(dev); 298 input_clock_khz = dev->get_clk_rate_khz(dev);
290 299
@@ -298,6 +307,8 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
298 } else if (reg != DW_IC_COMP_TYPE_VALUE) { 307 } else if (reg != DW_IC_COMP_TYPE_VALUE) {
299 dev_err(dev->dev, "Unknown Synopsys component type: " 308 dev_err(dev->dev, "Unknown Synopsys component type: "
300 "0x%08x\n", reg); 309 "0x%08x\n", reg);
310 if (dev->release_lock)
311 dev->release_lock(dev);
301 return -ENODEV; 312 return -ENODEV;
302 } 313 }
303 314
@@ -309,40 +320,39 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
309 sda_falling_time = dev->sda_falling_time ?: 300; /* ns */ 320 sda_falling_time = dev->sda_falling_time ?: 300; /* ns */
310 scl_falling_time = dev->scl_falling_time ?: 300; /* ns */ 321 scl_falling_time = dev->scl_falling_time ?: 300; /* ns */
311 322
312 /* Standard-mode */ 323 /* Set SCL timing parameters for standard-mode */
313 hcnt = i2c_dw_scl_hcnt(input_clock_khz,
314 4000, /* tHD;STA = tHIGH = 4.0 us */
315 sda_falling_time,
316 0, /* 0: DW default, 1: Ideal */
317 0); /* No offset */
318 lcnt = i2c_dw_scl_lcnt(input_clock_khz,
319 4700, /* tLOW = 4.7 us */
320 scl_falling_time,
321 0); /* No offset */
322
323 /* Allow platforms to specify the ideal HCNT and LCNT values */
324 if (dev->ss_hcnt && dev->ss_lcnt) { 324 if (dev->ss_hcnt && dev->ss_lcnt) {
325 hcnt = dev->ss_hcnt; 325 hcnt = dev->ss_hcnt;
326 lcnt = dev->ss_lcnt; 326 lcnt = dev->ss_lcnt;
327 } else {
328 hcnt = i2c_dw_scl_hcnt(input_clock_khz,
329 4000, /* tHD;STA = tHIGH = 4.0 us */
330 sda_falling_time,
331 0, /* 0: DW default, 1: Ideal */
332 0); /* No offset */
333 lcnt = i2c_dw_scl_lcnt(input_clock_khz,
334 4700, /* tLOW = 4.7 us */
335 scl_falling_time,
336 0); /* No offset */
327 } 337 }
328 dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT); 338 dw_writel(dev, hcnt, DW_IC_SS_SCL_HCNT);
329 dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT); 339 dw_writel(dev, lcnt, DW_IC_SS_SCL_LCNT);
330 dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt); 340 dev_dbg(dev->dev, "Standard-mode HCNT:LCNT = %d:%d\n", hcnt, lcnt);
331 341
332 /* Fast-mode */ 342 /* Set SCL timing parameters for fast-mode */
333 hcnt = i2c_dw_scl_hcnt(input_clock_khz,
334 600, /* tHD;STA = tHIGH = 0.6 us */
335 sda_falling_time,
336 0, /* 0: DW default, 1: Ideal */
337 0); /* No offset */
338 lcnt = i2c_dw_scl_lcnt(input_clock_khz,
339 1300, /* tLOW = 1.3 us */
340 scl_falling_time,
341 0); /* No offset */
342
343 if (dev->fs_hcnt && dev->fs_lcnt) { 343 if (dev->fs_hcnt && dev->fs_lcnt) {
344 hcnt = dev->fs_hcnt; 344 hcnt = dev->fs_hcnt;
345 lcnt = dev->fs_lcnt; 345 lcnt = dev->fs_lcnt;
346 } else {
347 hcnt = i2c_dw_scl_hcnt(input_clock_khz,
348 600, /* tHD;STA = tHIGH = 0.6 us */
349 sda_falling_time,
350 0, /* 0: DW default, 1: Ideal */
351 0); /* No offset */
352 lcnt = i2c_dw_scl_lcnt(input_clock_khz,
353 1300, /* tLOW = 1.3 us */
354 scl_falling_time,
355 0); /* No offset */
346 } 356 }
347 dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT); 357 dw_writel(dev, hcnt, DW_IC_FS_SCL_HCNT);
348 dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT); 358 dw_writel(dev, lcnt, DW_IC_FS_SCL_LCNT);
@@ -364,6 +374,9 @@ int i2c_dw_init(struct dw_i2c_dev *dev)
364 374
365 /* configure the i2c master */ 375 /* configure the i2c master */
366 dw_writel(dev, dev->master_cfg , DW_IC_CON); 376 dw_writel(dev, dev->master_cfg , DW_IC_CON);
377
378 if (dev->release_lock)
379 dev->release_lock(dev);
367 return 0; 380 return 0;
368} 381}
369EXPORT_SYMBOL_GPL(i2c_dw_init); 382EXPORT_SYMBOL_GPL(i2c_dw_init);
@@ -627,6 +640,14 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
627 dev->abort_source = 0; 640 dev->abort_source = 0;
628 dev->rx_outstanding = 0; 641 dev->rx_outstanding = 0;
629 642
643 if (dev->acquire_lock) {
644 ret = dev->acquire_lock(dev);
645 if (ret) {
646 dev_err(dev->dev, "couldn't acquire bus ownership\n");
647 goto done_nolock;
648 }
649 }
650
630 ret = i2c_dw_wait_bus_not_busy(dev); 651 ret = i2c_dw_wait_bus_not_busy(dev);
631 if (ret < 0) 652 if (ret < 0)
632 goto done; 653 goto done;
@@ -672,6 +693,10 @@ i2c_dw_xfer(struct i2c_adapter *adap, struct i2c_msg msgs[], int num)
672 ret = -EIO; 693 ret = -EIO;
673 694
674done: 695done:
696 if (dev->release_lock)
697 dev->release_lock(dev);
698
699done_nolock:
675 pm_runtime_mark_last_busy(dev->dev); 700 pm_runtime_mark_last_busy(dev->dev);
676 pm_runtime_put_autosuspend(dev->dev); 701 pm_runtime_put_autosuspend(dev->dev);
677 mutex_unlock(&dev->lock); 702 mutex_unlock(&dev->lock);
diff --git a/drivers/i2c/busses/i2c-designware-core.h b/drivers/i2c/busses/i2c-designware-core.h
index 5a410ef17abd..9630222abf32 100644
--- a/drivers/i2c/busses/i2c-designware-core.h
+++ b/drivers/i2c/busses/i2c-designware-core.h
@@ -61,6 +61,9 @@
61 * @ss_lcnt: standard speed LCNT value 61 * @ss_lcnt: standard speed LCNT value
62 * @fs_hcnt: fast speed HCNT value 62 * @fs_hcnt: fast speed HCNT value
63 * @fs_lcnt: fast speed LCNT value 63 * @fs_lcnt: fast speed LCNT value
64 * @acquire_lock: function to acquire a hardware lock on the bus
65 * @release_lock: function to release a hardware lock on the bus
66 * @pm_runtime_disabled: true if pm runtime is disabled
64 * 67 *
65 * HCNT and LCNT parameters can be used if the platform knows more accurate 68 * HCNT and LCNT parameters can be used if the platform knows more accurate
66 * values than the one computed based only on the input clock frequency. 69 * values than the one computed based only on the input clock frequency.
@@ -101,6 +104,9 @@ struct dw_i2c_dev {
101 u16 ss_lcnt; 104 u16 ss_lcnt;
102 u16 fs_hcnt; 105 u16 fs_hcnt;
103 u16 fs_lcnt; 106 u16 fs_lcnt;
107 int (*acquire_lock)(struct dw_i2c_dev *dev);
108 void (*release_lock)(struct dw_i2c_dev *dev);
109 bool pm_runtime_disabled;
104}; 110};
105 111
106#define ACCESS_SWAP 0x00000001 112#define ACCESS_SWAP 0x00000001
@@ -119,3 +125,9 @@ extern void i2c_dw_disable(struct dw_i2c_dev *dev);
119extern void i2c_dw_clear_int(struct dw_i2c_dev *dev); 125extern void i2c_dw_clear_int(struct dw_i2c_dev *dev);
120extern void i2c_dw_disable_int(struct dw_i2c_dev *dev); 126extern void i2c_dw_disable_int(struct dw_i2c_dev *dev);
121extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev); 127extern u32 i2c_dw_read_comp_param(struct dw_i2c_dev *dev);
128
129#if IS_ENABLED(CONFIG_I2C_DESIGNWARE_BAYTRAIL)
130extern int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev);
131#else
132static inline int i2c_dw_eval_lock_support(struct dw_i2c_dev *dev) { return 0; }
133#endif
diff --git a/drivers/i2c/busses/i2c-designware-pcidrv.c b/drivers/i2c/busses/i2c-designware-pcidrv.c
index acb40f95db78..6643d2dc0b25 100644
--- a/drivers/i2c/busses/i2c-designware-pcidrv.c
+++ b/drivers/i2c/busses/i2c-designware-pcidrv.c
@@ -6,7 +6,7 @@
6 * Copyright (C) 2006 Texas Instruments. 6 * Copyright (C) 2006 Texas Instruments.
7 * Copyright (C) 2007 MontaVista Software Inc. 7 * Copyright (C) 2007 MontaVista Software Inc.
8 * Copyright (C) 2009 Provigent Ltd. 8 * Copyright (C) 2009 Provigent Ltd.
9 * Copyright (C) 2011 Intel corporation. 9 * Copyright (C) 2011, 2015 Intel Corporation.
10 * 10 *
11 * ---------------------------------------------------------------------------- 11 * ----------------------------------------------------------------------------
12 * 12 *
@@ -40,10 +40,6 @@
40#define DRIVER_NAME "i2c-designware-pci" 40#define DRIVER_NAME "i2c-designware-pci"
41 41
42enum dw_pci_ctl_id_t { 42enum dw_pci_ctl_id_t {
43 moorestown_0,
44 moorestown_1,
45 moorestown_2,
46
47 medfield_0, 43 medfield_0,
48 medfield_1, 44 medfield_1,
49 medfield_2, 45 medfield_2,
@@ -101,28 +97,7 @@ static struct dw_scl_sda_cfg hsw_config = {
101 .sda_hold = 0x9, 97 .sda_hold = 0x9,
102}; 98};
103 99
104static struct dw_pci_controller dw_pci_controllers[] = { 100static struct dw_pci_controller dw_pci_controllers[] = {
105 [moorestown_0] = {
106 .bus_num = 0,
107 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
108 .tx_fifo_depth = 32,
109 .rx_fifo_depth = 32,
110 .clk_khz = 25000,
111 },
112 [moorestown_1] = {
113 .bus_num = 1,
114 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
115 .tx_fifo_depth = 32,
116 .rx_fifo_depth = 32,
117 .clk_khz = 25000,
118 },
119 [moorestown_2] = {
120 .bus_num = 2,
121 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
122 .tx_fifo_depth = 32,
123 .rx_fifo_depth = 32,
124 .clk_khz = 25000,
125 },
126 [medfield_0] = { 101 [medfield_0] = {
127 .bus_num = 0, 102 .bus_num = 0,
128 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 103 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
@@ -170,7 +145,6 @@ static struct dw_pci_controller dw_pci_controllers[] = {
170 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 145 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
171 .tx_fifo_depth = 32, 146 .tx_fifo_depth = 32,
172 .rx_fifo_depth = 32, 147 .rx_fifo_depth = 32,
173 .clk_khz = 100000,
174 .functionality = I2C_FUNC_10BIT_ADDR, 148 .functionality = I2C_FUNC_10BIT_ADDR,
175 .scl_sda_cfg = &byt_config, 149 .scl_sda_cfg = &byt_config,
176 }, 150 },
@@ -179,7 +153,6 @@ static struct dw_pci_controller dw_pci_controllers[] = {
179 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST, 153 .bus_cfg = INTEL_MID_STD_CFG | DW_IC_CON_SPEED_FAST,
180 .tx_fifo_depth = 32, 154 .tx_fifo_depth = 32,
181 .rx_fifo_depth = 32, 155 .rx_fifo_depth = 32,
182 .clk_khz = 100000,
183 .functionality = I2C_FUNC_10BIT_ADDR, 156 .functionality = I2C_FUNC_10BIT_ADDR,
184 .scl_sda_cfg = &hsw_config, 157 .scl_sda_cfg = &hsw_config,
185 }, 158 },
@@ -259,7 +232,7 @@ static int i2c_dw_pci_probe(struct pci_dev *pdev,
259 dev->functionality = controller->functionality | 232 dev->functionality = controller->functionality |
260 DW_DEFAULT_FUNCTIONALITY; 233 DW_DEFAULT_FUNCTIONALITY;
261 234
262 dev->master_cfg = controller->bus_cfg; 235 dev->master_cfg = controller->bus_cfg;
263 if (controller->scl_sda_cfg) { 236 if (controller->scl_sda_cfg) {
264 cfg = controller->scl_sda_cfg; 237 cfg = controller->scl_sda_cfg;
265 dev->ss_hcnt = cfg->ss_hcnt; 238 dev->ss_hcnt = cfg->ss_hcnt;
@@ -325,12 +298,8 @@ static void i2c_dw_pci_remove(struct pci_dev *pdev)
325MODULE_ALIAS("i2c_designware-pci"); 298MODULE_ALIAS("i2c_designware-pci");
326 299
327static const struct pci_device_id i2_designware_pci_ids[] = { 300static const struct pci_device_id i2_designware_pci_ids[] = {
328 /* Moorestown */
329 { PCI_VDEVICE(INTEL, 0x0802), moorestown_0 },
330 { PCI_VDEVICE(INTEL, 0x0803), moorestown_1 },
331 { PCI_VDEVICE(INTEL, 0x0804), moorestown_2 },
332 /* Medfield */ 301 /* Medfield */
333 { PCI_VDEVICE(INTEL, 0x0817), medfield_3,}, 302 { PCI_VDEVICE(INTEL, 0x0817), medfield_3 },
334 { PCI_VDEVICE(INTEL, 0x0818), medfield_4 }, 303 { PCI_VDEVICE(INTEL, 0x0818), medfield_4 },
335 { PCI_VDEVICE(INTEL, 0x0819), medfield_5 }, 304 { PCI_VDEVICE(INTEL, 0x0819), medfield_5 },
336 { PCI_VDEVICE(INTEL, 0x082C), medfield_0 }, 305 { PCI_VDEVICE(INTEL, 0x082C), medfield_0 },
@@ -348,7 +317,7 @@ static const struct pci_device_id i2_designware_pci_ids[] = {
348 { PCI_VDEVICE(INTEL, 0x9c61), haswell }, 317 { PCI_VDEVICE(INTEL, 0x9c61), haswell },
349 { PCI_VDEVICE(INTEL, 0x9c62), haswell }, 318 { PCI_VDEVICE(INTEL, 0x9c62), haswell },
350 /* Braswell / Cherrytrail */ 319 /* Braswell / Cherrytrail */
351 { PCI_VDEVICE(INTEL, 0x22C1), baytrail,}, 320 { PCI_VDEVICE(INTEL, 0x22C1), baytrail },
352 { PCI_VDEVICE(INTEL, 0x22C2), baytrail }, 321 { PCI_VDEVICE(INTEL, 0x22C2), baytrail },
353 { PCI_VDEVICE(INTEL, 0x22C3), baytrail }, 322 { PCI_VDEVICE(INTEL, 0x22C3), baytrail },
354 { PCI_VDEVICE(INTEL, 0x22C4), baytrail }, 323 { PCI_VDEVICE(INTEL, 0x22C4), baytrail },
diff --git a/drivers/i2c/busses/i2c-designware-platdrv.c b/drivers/i2c/busses/i2c-designware-platdrv.c
index 2b463c313e4e..c270f5f9a8f9 100644
--- a/drivers/i2c/busses/i2c-designware-platdrv.c
+++ b/drivers/i2c/busses/i2c-designware-platdrv.c
@@ -195,6 +195,10 @@ static int dw_i2c_probe(struct platform_device *pdev)
195 clk_freq = pdata->i2c_scl_freq; 195 clk_freq = pdata->i2c_scl_freq;
196 } 196 }
197 197
198 r = i2c_dw_eval_lock_support(dev);
199 if (r)
200 return r;
201
198 dev->functionality = 202 dev->functionality =
199 I2C_FUNC_I2C | 203 I2C_FUNC_I2C |
200 I2C_FUNC_10BIT_ADDR | 204 I2C_FUNC_10BIT_ADDR |
@@ -257,10 +261,14 @@ static int dw_i2c_probe(struct platform_device *pdev)
257 return r; 261 return r;
258 } 262 }
259 263
260 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000); 264 if (dev->pm_runtime_disabled) {
261 pm_runtime_use_autosuspend(&pdev->dev); 265 pm_runtime_forbid(&pdev->dev);
262 pm_runtime_set_active(&pdev->dev); 266 } else {
263 pm_runtime_enable(&pdev->dev); 267 pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
268 pm_runtime_use_autosuspend(&pdev->dev);
269 pm_runtime_set_active(&pdev->dev);
270 pm_runtime_enable(&pdev->dev);
271 }
264 272
265 return 0; 273 return 0;
266} 274}
@@ -310,7 +318,9 @@ static int dw_i2c_resume(struct device *dev)
310 struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev); 318 struct dw_i2c_dev *i_dev = platform_get_drvdata(pdev);
311 319
312 clk_prepare_enable(i_dev->clk); 320 clk_prepare_enable(i_dev->clk);
313 i2c_dw_init(i_dev); 321
322 if (!i_dev->pm_runtime_disabled)
323 i2c_dw_init(i_dev);
314 324
315 return 0; 325 return 0;
316} 326}
diff --git a/drivers/i2c/busses/i2c-imx.c b/drivers/i2c/busses/i2c-imx.c
index 7f3a9fe9bf4e..d7b26fc6f432 100644
--- a/drivers/i2c/busses/i2c-imx.c
+++ b/drivers/i2c/busses/i2c-imx.c
@@ -201,7 +201,7 @@ struct imx_i2c_struct {
201 void __iomem *base; 201 void __iomem *base;
202 wait_queue_head_t queue; 202 wait_queue_head_t queue;
203 unsigned long i2csr; 203 unsigned long i2csr;
204 unsigned int disable_delay; 204 unsigned int disable_delay;
205 int stopped; 205 int stopped;
206 unsigned int ifdr; /* IMX_I2C_IFDR */ 206 unsigned int ifdr; /* IMX_I2C_IFDR */
207 unsigned int cur_clk; 207 unsigned int cur_clk;
@@ -295,7 +295,6 @@ static void i2c_imx_dma_request(struct imx_i2c_struct *i2c_imx,
295 dma->chan_tx = dma_request_slave_channel(dev, "tx"); 295 dma->chan_tx = dma_request_slave_channel(dev, "tx");
296 if (!dma->chan_tx) { 296 if (!dma->chan_tx) {
297 dev_dbg(dev, "can't request DMA tx channel\n"); 297 dev_dbg(dev, "can't request DMA tx channel\n");
298 ret = -ENODEV;
299 goto fail_al; 298 goto fail_al;
300 } 299 }
301 300
@@ -313,7 +312,6 @@ static void i2c_imx_dma_request(struct imx_i2c_struct *i2c_imx,
313 dma->chan_rx = dma_request_slave_channel(dev, "rx"); 312 dma->chan_rx = dma_request_slave_channel(dev, "rx");
314 if (!dma->chan_rx) { 313 if (!dma->chan_rx) {
315 dev_dbg(dev, "can't request DMA rx channel\n"); 314 dev_dbg(dev, "can't request DMA rx channel\n");
316 ret = -ENODEV;
317 goto fail_tx; 315 goto fail_tx;
318 } 316 }
319 317
@@ -481,8 +479,8 @@ static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx)
481 i2c_clk_rate = clk_get_rate(i2c_imx->clk); 479 i2c_clk_rate = clk_get_rate(i2c_imx->clk);
482 if (i2c_imx->cur_clk == i2c_clk_rate) 480 if (i2c_imx->cur_clk == i2c_clk_rate)
483 return; 481 return;
484 else 482
485 i2c_imx->cur_clk = i2c_clk_rate; 483 i2c_imx->cur_clk = i2c_clk_rate;
486 484
487 div = (i2c_clk_rate + i2c_imx->bitrate - 1) / i2c_imx->bitrate; 485 div = (i2c_clk_rate + i2c_imx->bitrate - 1) / i2c_imx->bitrate;
488 if (div < i2c_clk_div[0].div) 486 if (div < i2c_clk_div[0].div)
@@ -490,7 +488,8 @@ static void i2c_imx_set_clk(struct imx_i2c_struct *i2c_imx)
490 else if (div > i2c_clk_div[i2c_imx->hwdata->ndivs - 1].div) 488 else if (div > i2c_clk_div[i2c_imx->hwdata->ndivs - 1].div)
491 i = i2c_imx->hwdata->ndivs - 1; 489 i = i2c_imx->hwdata->ndivs - 1;
492 else 490 else
493 for (i = 0; i2c_clk_div[i].div < div; i++); 491 for (i = 0; i2c_clk_div[i].div < div; i++)
492 ;
494 493
495 /* Store divider value */ 494 /* Store divider value */
496 i2c_imx->ifdr = i2c_clk_div[i].val; 495 i2c_imx->ifdr = i2c_clk_div[i].val;
@@ -628,9 +627,9 @@ static int i2c_imx_dma_write(struct imx_i2c_struct *i2c_imx,
628 result = wait_for_completion_timeout( 627 result = wait_for_completion_timeout(
629 &i2c_imx->dma->cmd_complete, 628 &i2c_imx->dma->cmd_complete,
630 msecs_to_jiffies(DMA_TIMEOUT)); 629 msecs_to_jiffies(DMA_TIMEOUT));
631 if (result <= 0) { 630 if (result == 0) {
632 dmaengine_terminate_all(dma->chan_using); 631 dmaengine_terminate_all(dma->chan_using);
633 return result ?: -ETIMEDOUT; 632 return -ETIMEDOUT;
634 } 633 }
635 634
636 /* Waiting for transfer complete. */ 635 /* Waiting for transfer complete. */
@@ -686,9 +685,9 @@ static int i2c_imx_dma_read(struct imx_i2c_struct *i2c_imx,
686 result = wait_for_completion_timeout( 685 result = wait_for_completion_timeout(
687 &i2c_imx->dma->cmd_complete, 686 &i2c_imx->dma->cmd_complete,
688 msecs_to_jiffies(DMA_TIMEOUT)); 687 msecs_to_jiffies(DMA_TIMEOUT));
689 if (result <= 0) { 688 if (result == 0) {
690 dmaengine_terminate_all(dma->chan_using); 689 dmaengine_terminate_all(dma->chan_using);
691 return result ?: -ETIMEDOUT; 690 return -ETIMEDOUT;
692 } 691 }
693 692
694 /* waiting for transfer complete. */ 693 /* waiting for transfer complete. */
@@ -822,6 +821,7 @@ static int i2c_imx_read(struct imx_i2c_struct *i2c_imx, struct i2c_msg *msgs, bo
822 /* read data */ 821 /* read data */
823 for (i = 0; i < msgs->len; i++) { 822 for (i = 0; i < msgs->len; i++) {
824 u8 len = 0; 823 u8 len = 0;
824
825 result = i2c_imx_trx_complete(i2c_imx); 825 result = i2c_imx_trx_complete(i2c_imx);
826 if (result) 826 if (result)
827 return result; 827 return result;
@@ -917,15 +917,16 @@ static int i2c_imx_xfer(struct i2c_adapter *adapter,
917 /* write/read data */ 917 /* write/read data */
918#ifdef CONFIG_I2C_DEBUG_BUS 918#ifdef CONFIG_I2C_DEBUG_BUS
919 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR); 919 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2CR);
920 dev_dbg(&i2c_imx->adapter.dev, "<%s> CONTROL: IEN=%d, IIEN=%d, " 920 dev_dbg(&i2c_imx->adapter.dev,
921 "MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n", __func__, 921 "<%s> CONTROL: IEN=%d, IIEN=%d, MSTA=%d, MTX=%d, TXAK=%d, RSTA=%d\n",
922 __func__,
922 (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0), 923 (temp & I2CR_IEN ? 1 : 0), (temp & I2CR_IIEN ? 1 : 0),
923 (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0), 924 (temp & I2CR_MSTA ? 1 : 0), (temp & I2CR_MTX ? 1 : 0),
924 (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0)); 925 (temp & I2CR_TXAK ? 1 : 0), (temp & I2CR_RSTA ? 1 : 0));
925 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR); 926 temp = imx_i2c_read_reg(i2c_imx, IMX_I2C_I2SR);
926 dev_dbg(&i2c_imx->adapter.dev, 927 dev_dbg(&i2c_imx->adapter.dev,
927 "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, " 928 "<%s> STATUS: ICF=%d, IAAS=%d, IBB=%d, IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n",
928 "IAL=%d, SRW=%d, IIF=%d, RXAK=%d\n", __func__, 929 __func__,
929 (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0), 930 (temp & I2SR_ICF ? 1 : 0), (temp & I2SR_IAAS ? 1 : 0),
930 (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0), 931 (temp & I2SR_IBB ? 1 : 0), (temp & I2SR_IAL ? 1 : 0),
931 (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0), 932 (temp & I2SR_SRW ? 1 : 0), (temp & I2SR_IIF ? 1 : 0),
@@ -1004,7 +1005,7 @@ static int i2c_imx_probe(struct platform_device *pdev)
1004 i2c_imx->adapter.owner = THIS_MODULE; 1005 i2c_imx->adapter.owner = THIS_MODULE;
1005 i2c_imx->adapter.algo = &i2c_imx_algo; 1006 i2c_imx->adapter.algo = &i2c_imx_algo;
1006 i2c_imx->adapter.dev.parent = &pdev->dev; 1007 i2c_imx->adapter.dev.parent = &pdev->dev;
1007 i2c_imx->adapter.nr = pdev->id; 1008 i2c_imx->adapter.nr = pdev->id;
1008 i2c_imx->adapter.dev.of_node = pdev->dev.of_node; 1009 i2c_imx->adapter.dev.of_node = pdev->dev.of_node;
1009 i2c_imx->base = base; 1010 i2c_imx->base = base;
1010 1011
@@ -1063,7 +1064,7 @@ static int i2c_imx_probe(struct platform_device *pdev)
1063 i2c_imx->adapter.name); 1064 i2c_imx->adapter.name);
1064 dev_info(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n"); 1065 dev_info(&i2c_imx->adapter.dev, "IMX I2C adapter registered\n");
1065 1066
1066 /* Init DMA config if support*/ 1067 /* Init DMA config if supported */
1067 i2c_imx_dma_request(i2c_imx, phy_addr); 1068 i2c_imx_dma_request(i2c_imx, phy_addr);
1068 1069
1069 return 0; /* Return OK */ 1070 return 0; /* Return OK */
diff --git a/drivers/i2c/busses/i2c-ocores.c b/drivers/i2c/busses/i2c-ocores.c
index 7249b5b1e5d0..abf5db7e441e 100644
--- a/drivers/i2c/busses/i2c-ocores.c
+++ b/drivers/i2c/busses/i2c-ocores.c
@@ -12,6 +12,7 @@
12 * kind, whether express or implied. 12 * kind, whether express or implied.
13 */ 13 */
14 14
15#include <linux/clk.h>
15#include <linux/err.h> 16#include <linux/err.h>
16#include <linux/kernel.h> 17#include <linux/kernel.h>
17#include <linux/module.h> 18#include <linux/module.h>
@@ -35,7 +36,9 @@ struct ocores_i2c {
35 int pos; 36 int pos;
36 int nmsgs; 37 int nmsgs;
37 int state; /* see STATE_ */ 38 int state; /* see STATE_ */
38 int clock_khz; 39 struct clk *clk;
40 int ip_clock_khz;
41 int bus_clock_khz;
39 void (*setreg)(struct ocores_i2c *i2c, int reg, u8 value); 42 void (*setreg)(struct ocores_i2c *i2c, int reg, u8 value);
40 u8 (*getreg)(struct ocores_i2c *i2c, int reg); 43 u8 (*getreg)(struct ocores_i2c *i2c, int reg);
41}; 44};
@@ -215,21 +218,34 @@ static int ocores_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
215 return -ETIMEDOUT; 218 return -ETIMEDOUT;
216} 219}
217 220
218static void ocores_init(struct ocores_i2c *i2c) 221static int ocores_init(struct device *dev, struct ocores_i2c *i2c)
219{ 222{
220 int prescale; 223 int prescale;
224 int diff;
221 u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL); 225 u8 ctrl = oc_getreg(i2c, OCI2C_CONTROL);
222 226
223 /* make sure the device is disabled */ 227 /* make sure the device is disabled */
224 oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN)); 228 oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
225 229
226 prescale = (i2c->clock_khz / (5*100)) - 1; 230 prescale = (i2c->ip_clock_khz / (5 * i2c->bus_clock_khz)) - 1;
231 prescale = clamp(prescale, 0, 0xffff);
232
233 diff = i2c->ip_clock_khz / (5 * (prescale + 1)) - i2c->bus_clock_khz;
234 if (abs(diff) > i2c->bus_clock_khz / 10) {
235 dev_err(dev,
236 "Unsupported clock settings: core: %d KHz, bus: %d KHz\n",
237 i2c->ip_clock_khz, i2c->bus_clock_khz);
238 return -EINVAL;
239 }
240
227 oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff); 241 oc_setreg(i2c, OCI2C_PRELOW, prescale & 0xff);
228 oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8); 242 oc_setreg(i2c, OCI2C_PREHIGH, prescale >> 8);
229 243
230 /* Init the device */ 244 /* Init the device */
231 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK); 245 oc_setreg(i2c, OCI2C_CMD, OCI2C_CMD_IACK);
232 oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN); 246 oc_setreg(i2c, OCI2C_CONTROL, ctrl | OCI2C_CTRL_IEN | OCI2C_CTRL_EN);
247
248 return 0;
233} 249}
234 250
235 251
@@ -304,6 +320,8 @@ static int ocores_i2c_of_probe(struct platform_device *pdev,
304 struct device_node *np = pdev->dev.of_node; 320 struct device_node *np = pdev->dev.of_node;
305 const struct of_device_id *match; 321 const struct of_device_id *match;
306 u32 val; 322 u32 val;
323 u32 clock_frequency;
324 bool clock_frequency_present;
307 325
308 if (of_property_read_u32(np, "reg-shift", &i2c->reg_shift)) { 326 if (of_property_read_u32(np, "reg-shift", &i2c->reg_shift)) {
309 /* no 'reg-shift', check for deprecated 'regstep' */ 327 /* no 'reg-shift', check for deprecated 'regstep' */
@@ -319,12 +337,42 @@ static int ocores_i2c_of_probe(struct platform_device *pdev,
319 } 337 }
320 } 338 }
321 339
322 if (of_property_read_u32(np, "clock-frequency", &val)) { 340 clock_frequency_present = !of_property_read_u32(np, "clock-frequency",
323 dev_err(&pdev->dev, 341 &clock_frequency);
324 "Missing required parameter 'clock-frequency'\n"); 342 i2c->bus_clock_khz = 100;
325 return -ENODEV; 343
344 i2c->clk = devm_clk_get(&pdev->dev, NULL);
345
346 if (!IS_ERR(i2c->clk)) {
347 int ret = clk_prepare_enable(i2c->clk);
348
349 if (ret) {
350 dev_err(&pdev->dev,
351 "clk_prepare_enable failed: %d\n", ret);
352 return ret;
353 }
354 i2c->ip_clock_khz = clk_get_rate(i2c->clk) / 1000;
355 if (clock_frequency_present)
356 i2c->bus_clock_khz = clock_frequency / 1000;
357 }
358
359 if (i2c->ip_clock_khz == 0) {
360 if (of_property_read_u32(np, "opencores,ip-clock-frequency",
361 &val)) {
362 if (!clock_frequency_present) {
363 dev_err(&pdev->dev,
364 "Missing required parameter 'opencores,ip-clock-frequency'\n");
365 return -ENODEV;
366 }
367 i2c->ip_clock_khz = clock_frequency / 1000;
368 dev_warn(&pdev->dev,
369 "Deprecated usage of the 'clock-frequency' property, please update to 'opencores,ip-clock-frequency'\n");
370 } else {
371 i2c->ip_clock_khz = val / 1000;
372 if (clock_frequency_present)
373 i2c->bus_clock_khz = clock_frequency / 1000;
374 }
326 } 375 }
327 i2c->clock_khz = val / 1000;
328 376
329 of_property_read_u32(pdev->dev.of_node, "reg-io-width", 377 of_property_read_u32(pdev->dev.of_node, "reg-io-width",
330 &i2c->reg_io_width); 378 &i2c->reg_io_width);
@@ -368,7 +416,8 @@ static int ocores_i2c_probe(struct platform_device *pdev)
368 if (pdata) { 416 if (pdata) {
369 i2c->reg_shift = pdata->reg_shift; 417 i2c->reg_shift = pdata->reg_shift;
370 i2c->reg_io_width = pdata->reg_io_width; 418 i2c->reg_io_width = pdata->reg_io_width;
371 i2c->clock_khz = pdata->clock_khz; 419 i2c->ip_clock_khz = pdata->clock_khz;
420 i2c->bus_clock_khz = 100;
372 } else { 421 } else {
373 ret = ocores_i2c_of_probe(pdev, i2c); 422 ret = ocores_i2c_of_probe(pdev, i2c);
374 if (ret) 423 if (ret)
@@ -402,7 +451,9 @@ static int ocores_i2c_probe(struct platform_device *pdev)
402 } 451 }
403 } 452 }
404 453
405 ocores_init(i2c); 454 ret = ocores_init(&pdev->dev, i2c);
455 if (ret)
456 return ret;
406 457
407 init_waitqueue_head(&i2c->wait); 458 init_waitqueue_head(&i2c->wait);
408 ret = devm_request_irq(&pdev->dev, irq, ocores_isr, 0, 459 ret = devm_request_irq(&pdev->dev, irq, ocores_isr, 0,
@@ -446,6 +497,9 @@ static int ocores_i2c_remove(struct platform_device *pdev)
446 /* remove adapter & data */ 497 /* remove adapter & data */
447 i2c_del_adapter(&i2c->adap); 498 i2c_del_adapter(&i2c->adap);
448 499
500 if (!IS_ERR(i2c->clk))
501 clk_disable_unprepare(i2c->clk);
502
449 return 0; 503 return 0;
450} 504}
451 505
@@ -458,6 +512,8 @@ static int ocores_i2c_suspend(struct device *dev)
458 /* make sure the device is disabled */ 512 /* make sure the device is disabled */
459 oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN)); 513 oc_setreg(i2c, OCI2C_CONTROL, ctrl & ~(OCI2C_CTRL_EN|OCI2C_CTRL_IEN));
460 514
515 if (!IS_ERR(i2c->clk))
516 clk_disable_unprepare(i2c->clk);
461 return 0; 517 return 0;
462} 518}
463 519
@@ -465,9 +521,20 @@ static int ocores_i2c_resume(struct device *dev)
465{ 521{
466 struct ocores_i2c *i2c = dev_get_drvdata(dev); 522 struct ocores_i2c *i2c = dev_get_drvdata(dev);
467 523
468 ocores_init(i2c); 524 if (!IS_ERR(i2c->clk)) {
525 unsigned long rate;
526 int ret = clk_prepare_enable(i2c->clk);
469 527
470 return 0; 528 if (ret) {
529 dev_err(dev,
530 "clk_prepare_enable failed: %d\n", ret);
531 return ret;
532 }
533 rate = clk_get_rate(i2c->clk) / 1000;
534 if (rate)
535 i2c->ip_clock_khz = rate;
536 }
537 return ocores_init(dev, i2c);
471} 538}
472 539
473static SIMPLE_DEV_PM_OPS(ocores_i2c_pm, ocores_i2c_suspend, ocores_i2c_resume); 540static SIMPLE_DEV_PM_OPS(ocores_i2c_pm, ocores_i2c_suspend, ocores_i2c_resume);
diff --git a/drivers/i2c/busses/i2c-pmcmsp.c b/drivers/i2c/busses/i2c-pmcmsp.c
index 44f03eed00dd..d37d9db6681e 100644
--- a/drivers/i2c/busses/i2c-pmcmsp.c
+++ b/drivers/i2c/busses/i2c-pmcmsp.c
@@ -148,13 +148,6 @@ static inline u32 pmcmsptwi_clock_to_reg(
148 return ((clock->filter & 0xf) << 12) | (clock->clock & 0x03ff); 148 return ((clock->filter & 0xf) << 12) | (clock->clock & 0x03ff);
149} 149}
150 150
151static inline void pmcmsptwi_reg_to_clock(
152 u32 reg, struct pmcmsptwi_clock *clock)
153{
154 clock->filter = (reg >> 12) & 0xf;
155 clock->clock = reg & 0x03ff;
156}
157
158static inline u32 pmcmsptwi_cfg_to_reg(const struct pmcmsptwi_cfg *cfg) 151static inline u32 pmcmsptwi_cfg_to_reg(const struct pmcmsptwi_cfg *cfg)
159{ 152{
160 return ((cfg->arbf & 0xf) << 12) | 153 return ((cfg->arbf & 0xf) << 12) |
diff --git a/drivers/i2c/busses/i2c-rk3x.c b/drivers/i2c/busses/i2c-rk3x.c
index 92462843db66..5f96b1b3e3a5 100644
--- a/drivers/i2c/busses/i2c-rk3x.c
+++ b/drivers/i2c/busses/i2c-rk3x.c
@@ -102,6 +102,9 @@ struct rk3x_i2c {
102 102
103 /* Settings */ 103 /* Settings */
104 unsigned int scl_frequency; 104 unsigned int scl_frequency;
105 unsigned int scl_rise_ns;
106 unsigned int scl_fall_ns;
107 unsigned int sda_fall_ns;
105 108
106 /* Synchronization & notification */ 109 /* Synchronization & notification */
107 spinlock_t lock; 110 spinlock_t lock;
@@ -435,6 +438,9 @@ out:
435 * 438 *
436 * @clk_rate: I2C input clock rate 439 * @clk_rate: I2C input clock rate
437 * @scl_rate: Desired SCL rate 440 * @scl_rate: Desired SCL rate
441 * @scl_rise_ns: How many ns it takes for SCL to rise.
442 * @scl_fall_ns: How many ns it takes for SCL to fall.
443 * @sda_fall_ns: How many ns it takes for SDA to fall.
438 * @div_low: Divider output for low 444 * @div_low: Divider output for low
439 * @div_high: Divider output for high 445 * @div_high: Divider output for high
440 * 446 *
@@ -443,11 +449,16 @@ out:
443 * too high, we silently use the highest possible rate. 449 * too high, we silently use the highest possible rate.
444 */ 450 */
445static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate, 451static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
452 unsigned long scl_rise_ns,
453 unsigned long scl_fall_ns,
454 unsigned long sda_fall_ns,
446 unsigned long *div_low, unsigned long *div_high) 455 unsigned long *div_low, unsigned long *div_high)
447{ 456{
448 unsigned long min_low_ns, min_high_ns; 457 unsigned long spec_min_low_ns, spec_min_high_ns;
449 unsigned long max_data_hold_ns; 458 unsigned long spec_setup_start, spec_max_data_hold_ns;
450 unsigned long data_hold_buffer_ns; 459 unsigned long data_hold_buffer_ns;
460
461 unsigned long min_low_ns, min_high_ns;
451 unsigned long max_low_ns, min_total_ns; 462 unsigned long max_low_ns, min_total_ns;
452 463
453 unsigned long clk_rate_khz, scl_rate_khz; 464 unsigned long clk_rate_khz, scl_rate_khz;
@@ -469,29 +480,50 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
469 scl_rate = 1000; 480 scl_rate = 1000;
470 481
471 /* 482 /*
472 * min_low_ns: The minimum number of ns we need to hold low 483 * min_low_ns: The minimum number of ns we need to hold low to
473 * to meet i2c spec 484 * meet I2C specification, should include fall time.
474 * min_high_ns: The minimum number of ns we need to hold high 485 * min_high_ns: The minimum number of ns we need to hold high to
475 * to meet i2c spec 486 * meet I2C specification, should include rise time.
476 * max_low_ns: The maximum number of ns we can hold low 487 * max_low_ns: The maximum number of ns we can hold low to meet
477 * to meet i2c spec 488 * I2C specification.
478 * 489 *
479 * Note: max_low_ns should be (max data hold time * 2 - buffer) 490 * Note: max_low_ns should be (maximum data hold time * 2 - buffer)
480 * This is because the i2c host on Rockchip holds the data line 491 * This is because the i2c host on Rockchip holds the data line
481 * for half the low time. 492 * for half the low time.
482 */ 493 */
483 if (scl_rate <= 100000) { 494 if (scl_rate <= 100000) {
484 min_low_ns = 4700; 495 /* Standard-mode */
485 min_high_ns = 4000; 496 spec_min_low_ns = 4700;
486 max_data_hold_ns = 3450; 497 spec_setup_start = 4700;
498 spec_min_high_ns = 4000;
499 spec_max_data_hold_ns = 3450;
487 data_hold_buffer_ns = 50; 500 data_hold_buffer_ns = 50;
488 } else { 501 } else {
489 min_low_ns = 1300; 502 /* Fast-mode */
490 min_high_ns = 600; 503 spec_min_low_ns = 1300;
491 max_data_hold_ns = 900; 504 spec_setup_start = 600;
505 spec_min_high_ns = 600;
506 spec_max_data_hold_ns = 900;
492 data_hold_buffer_ns = 50; 507 data_hold_buffer_ns = 50;
493 } 508 }
494 max_low_ns = max_data_hold_ns * 2 - data_hold_buffer_ns; 509 min_high_ns = scl_rise_ns + spec_min_high_ns;
510
511 /*
512 * Timings for repeated start:
513 * - controller appears to drop SDA at .875x (7/8) programmed clk high.
514 * - controller appears to keep SCL high for 2x programmed clk high.
515 *
516 * We need to account for those rules in picking our "high" time so
517 * we meet tSU;STA and tHD;STA times.
518 */
519 min_high_ns = max(min_high_ns,
520 DIV_ROUND_UP((scl_rise_ns + spec_setup_start) * 1000, 875));
521 min_high_ns = max(min_high_ns,
522 DIV_ROUND_UP((scl_rise_ns + spec_setup_start +
523 sda_fall_ns + spec_min_high_ns), 2));
524
525 min_low_ns = scl_fall_ns + spec_min_low_ns;
526 max_low_ns = spec_max_data_hold_ns * 2 - data_hold_buffer_ns;
495 min_total_ns = min_low_ns + min_high_ns; 527 min_total_ns = min_low_ns + min_high_ns;
496 528
497 /* Adjust to avoid overflow */ 529 /* Adjust to avoid overflow */
@@ -510,8 +542,8 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
510 min_div_for_hold = (min_low_div + min_high_div); 542 min_div_for_hold = (min_low_div + min_high_div);
511 543
512 /* 544 /*
513 * This is the maximum divider so we don't go over the max. 545 * This is the maximum divider so we don't go over the maximum.
514 * We don't round up here (we round down) since this is a max. 546 * We don't round up here (we round down) since this is a maximum.
515 */ 547 */
516 max_low_div = clk_rate_khz * max_low_ns / (8 * 1000000); 548 max_low_div = clk_rate_khz * max_low_ns / (8 * 1000000);
517 549
@@ -544,7 +576,7 @@ static int rk3x_i2c_calc_divs(unsigned long clk_rate, unsigned long scl_rate,
544 ideal_low_div = DIV_ROUND_UP(clk_rate_khz * min_low_ns, 576 ideal_low_div = DIV_ROUND_UP(clk_rate_khz * min_low_ns,
545 scl_rate_khz * 8 * min_total_ns); 577 scl_rate_khz * 8 * min_total_ns);
546 578
547 /* Don't allow it to go over the max */ 579 /* Don't allow it to go over the maximum */
548 if (ideal_low_div > max_low_div) 580 if (ideal_low_div > max_low_div)
549 ideal_low_div = max_low_div; 581 ideal_low_div = max_low_div;
550 582
@@ -588,9 +620,9 @@ static void rk3x_i2c_adapt_div(struct rk3x_i2c *i2c, unsigned long clk_rate)
588 u64 t_low_ns, t_high_ns; 620 u64 t_low_ns, t_high_ns;
589 int ret; 621 int ret;
590 622
591 ret = rk3x_i2c_calc_divs(clk_rate, i2c->scl_frequency, &div_low, 623 ret = rk3x_i2c_calc_divs(clk_rate, i2c->scl_frequency, i2c->scl_rise_ns,
592 &div_high); 624 i2c->scl_fall_ns, i2c->sda_fall_ns,
593 625 &div_low, &div_high);
594 WARN_ONCE(ret != 0, "Could not reach SCL freq %u", i2c->scl_frequency); 626 WARN_ONCE(ret != 0, "Could not reach SCL freq %u", i2c->scl_frequency);
595 627
596 clk_enable(i2c->clk); 628 clk_enable(i2c->clk);
@@ -633,9 +665,10 @@ static int rk3x_i2c_clk_notifier_cb(struct notifier_block *nb, unsigned long
633 switch (event) { 665 switch (event) {
634 case PRE_RATE_CHANGE: 666 case PRE_RATE_CHANGE:
635 if (rk3x_i2c_calc_divs(ndata->new_rate, i2c->scl_frequency, 667 if (rk3x_i2c_calc_divs(ndata->new_rate, i2c->scl_frequency,
636 &div_low, &div_high) != 0) { 668 i2c->scl_rise_ns, i2c->scl_fall_ns,
669 i2c->sda_fall_ns,
670 &div_low, &div_high) != 0)
637 return NOTIFY_STOP; 671 return NOTIFY_STOP;
638 }
639 672
640 /* scale up */ 673 /* scale up */
641 if (ndata->new_rate > ndata->old_rate) 674 if (ndata->new_rate > ndata->old_rate)
@@ -859,6 +892,24 @@ static int rk3x_i2c_probe(struct platform_device *pdev)
859 i2c->scl_frequency = DEFAULT_SCL_RATE; 892 i2c->scl_frequency = DEFAULT_SCL_RATE;
860 } 893 }
861 894
895 /*
896 * Read rise and fall time from device tree. If not available use
897 * the default maximum timing from the specification.
898 */
899 if (of_property_read_u32(pdev->dev.of_node, "i2c-scl-rising-time-ns",
900 &i2c->scl_rise_ns)) {
901 if (i2c->scl_frequency <= 100000)
902 i2c->scl_rise_ns = 1000;
903 else
904 i2c->scl_rise_ns = 300;
905 }
906 if (of_property_read_u32(pdev->dev.of_node, "i2c-scl-falling-time-ns",
907 &i2c->scl_fall_ns))
908 i2c->scl_fall_ns = 300;
909 if (of_property_read_u32(pdev->dev.of_node, "i2c-sda-falling-time-ns",
910 &i2c->scl_fall_ns))
911 i2c->sda_fall_ns = i2c->scl_fall_ns;
912
862 strlcpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name)); 913 strlcpy(i2c->adap.name, "rk3x-i2c", sizeof(i2c->adap.name));
863 i2c->adap.owner = THIS_MODULE; 914 i2c->adap.owner = THIS_MODULE;
864 i2c->adap.algo = &rk3x_i2c_algorithm; 915 i2c->adap.algo = &rk3x_i2c_algorithm;
diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c
index 28b87e683503..29f14331dd9d 100644
--- a/drivers/i2c/busses/i2c-tegra.c
+++ b/drivers/i2c/busses/i2c-tegra.c
@@ -286,6 +286,7 @@ static int tegra_i2c_empty_rx_fifo(struct tegra_i2c_dev *i2c_dev)
286 if (rx_fifo_avail > 0 && buf_remaining > 0) { 286 if (rx_fifo_avail > 0 && buf_remaining > 0) {
287 BUG_ON(buf_remaining > 3); 287 BUG_ON(buf_remaining > 3);
288 val = i2c_readl(i2c_dev, I2C_RX_FIFO); 288 val = i2c_readl(i2c_dev, I2C_RX_FIFO);
289 val = cpu_to_le32(val);
289 memcpy(buf, &val, buf_remaining); 290 memcpy(buf, &val, buf_remaining);
290 buf_remaining = 0; 291 buf_remaining = 0;
291 rx_fifo_avail--; 292 rx_fifo_avail--;
@@ -344,6 +345,7 @@ static int tegra_i2c_fill_tx_fifo(struct tegra_i2c_dev *i2c_dev)
344 if (tx_fifo_avail > 0 && buf_remaining > 0) { 345 if (tx_fifo_avail > 0 && buf_remaining > 0) {
345 BUG_ON(buf_remaining > 3); 346 BUG_ON(buf_remaining > 3);
346 memcpy(&val, buf, buf_remaining); 347 memcpy(&val, buf, buf_remaining);
348 val = le32_to_cpu(val);
347 349
348 /* Again update before writing to FIFO to make sure isr sees. */ 350 /* Again update before writing to FIFO to make sure isr sees. */
349 i2c_dev->msg_buf_remaining = 0; 351 i2c_dev->msg_buf_remaining = 0;
diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index e9eae57a2b50..edf274cabe81 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -102,7 +102,7 @@ static int acpi_i2c_add_resource(struct acpi_resource *ares, void *data)
102 struct acpi_resource_i2c_serialbus *sb; 102 struct acpi_resource_i2c_serialbus *sb;
103 103
104 sb = &ares->data.i2c_serial_bus; 104 sb = &ares->data.i2c_serial_bus;
105 if (sb->type == ACPI_RESOURCE_SERIAL_TYPE_I2C) { 105 if (!info->addr && sb->type == ACPI_RESOURCE_SERIAL_TYPE_I2C) {
106 info->addr = sb->slave_address; 106 info->addr = sb->slave_address;
107 if (sb->access_mode == ACPI_I2C_10BIT_MODE) 107 if (sb->access_mode == ACPI_I2C_10BIT_MODE)
108 info->flags |= I2C_CLIENT_TEN; 108 info->flags |= I2C_CLIENT_TEN;
@@ -679,9 +679,6 @@ static int i2c_device_remove(struct device *dev)
679 status = driver->remove(client); 679 status = driver->remove(client);
680 } 680 }
681 681
682 if (dev->of_node)
683 irq_dispose_mapping(client->irq);
684
685 dev_pm_domain_detach(&client->dev, true); 682 dev_pm_domain_detach(&client->dev, true);
686 return status; 683 return status;
687} 684}
@@ -698,101 +695,6 @@ static void i2c_device_shutdown(struct device *dev)
698 driver->shutdown(client); 695 driver->shutdown(client);
699} 696}
700 697
701#ifdef CONFIG_PM_SLEEP
702static int i2c_legacy_suspend(struct device *dev, pm_message_t mesg)
703{
704 struct i2c_client *client = i2c_verify_client(dev);
705 struct i2c_driver *driver;
706
707 if (!client || !dev->driver)
708 return 0;
709 driver = to_i2c_driver(dev->driver);
710 if (!driver->suspend)
711 return 0;
712 return driver->suspend(client, mesg);
713}
714
715static int i2c_legacy_resume(struct device *dev)
716{
717 struct i2c_client *client = i2c_verify_client(dev);
718 struct i2c_driver *driver;
719
720 if (!client || !dev->driver)
721 return 0;
722 driver = to_i2c_driver(dev->driver);
723 if (!driver->resume)
724 return 0;
725 return driver->resume(client);
726}
727
728static int i2c_device_pm_suspend(struct device *dev)
729{
730 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
731
732 if (pm)
733 return pm_generic_suspend(dev);
734 else
735 return i2c_legacy_suspend(dev, PMSG_SUSPEND);
736}
737
738static int i2c_device_pm_resume(struct device *dev)
739{
740 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
741
742 if (pm)
743 return pm_generic_resume(dev);
744 else
745 return i2c_legacy_resume(dev);
746}
747
748static int i2c_device_pm_freeze(struct device *dev)
749{
750 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
751
752 if (pm)
753 return pm_generic_freeze(dev);
754 else
755 return i2c_legacy_suspend(dev, PMSG_FREEZE);
756}
757
758static int i2c_device_pm_thaw(struct device *dev)
759{
760 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
761
762 if (pm)
763 return pm_generic_thaw(dev);
764 else
765 return i2c_legacy_resume(dev);
766}
767
768static int i2c_device_pm_poweroff(struct device *dev)
769{
770 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
771
772 if (pm)
773 return pm_generic_poweroff(dev);
774 else
775 return i2c_legacy_suspend(dev, PMSG_HIBERNATE);
776}
777
778static int i2c_device_pm_restore(struct device *dev)
779{
780 const struct dev_pm_ops *pm = dev->driver ? dev->driver->pm : NULL;
781
782 if (pm)
783 return pm_generic_restore(dev);
784 else
785 return i2c_legacy_resume(dev);
786}
787#else /* !CONFIG_PM_SLEEP */
788#define i2c_device_pm_suspend NULL
789#define i2c_device_pm_resume NULL
790#define i2c_device_pm_freeze NULL
791#define i2c_device_pm_thaw NULL
792#define i2c_device_pm_poweroff NULL
793#define i2c_device_pm_restore NULL
794#endif /* !CONFIG_PM_SLEEP */
795
796static void i2c_client_dev_release(struct device *dev) 698static void i2c_client_dev_release(struct device *dev)
797{ 699{
798 kfree(to_i2c_client(dev)); 700 kfree(to_i2c_client(dev));
@@ -804,6 +706,7 @@ show_name(struct device *dev, struct device_attribute *attr, char *buf)
804 return sprintf(buf, "%s\n", dev->type == &i2c_client_type ? 706 return sprintf(buf, "%s\n", dev->type == &i2c_client_type ?
805 to_i2c_client(dev)->name : to_i2c_adapter(dev)->name); 707 to_i2c_client(dev)->name : to_i2c_adapter(dev)->name);
806} 708}
709static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
807 710
808static ssize_t 711static ssize_t
809show_modalias(struct device *dev, struct device_attribute *attr, char *buf) 712show_modalias(struct device *dev, struct device_attribute *attr, char *buf)
@@ -817,8 +720,6 @@ show_modalias(struct device *dev, struct device_attribute *attr, char *buf)
817 720
818 return sprintf(buf, "%s%s\n", I2C_MODULE_PREFIX, client->name); 721 return sprintf(buf, "%s%s\n", I2C_MODULE_PREFIX, client->name);
819} 722}
820
821static DEVICE_ATTR(name, S_IRUGO, show_name, NULL);
822static DEVICE_ATTR(modalias, S_IRUGO, show_modalias, NULL); 723static DEVICE_ATTR(modalias, S_IRUGO, show_modalias, NULL);
823 724
824static struct attribute *i2c_dev_attrs[] = { 725static struct attribute *i2c_dev_attrs[] = {
@@ -827,29 +728,7 @@ static struct attribute *i2c_dev_attrs[] = {
827 &dev_attr_modalias.attr, 728 &dev_attr_modalias.attr,
828 NULL 729 NULL
829}; 730};
830 731ATTRIBUTE_GROUPS(i2c_dev);
831static struct attribute_group i2c_dev_attr_group = {
832 .attrs = i2c_dev_attrs,
833};
834
835static const struct attribute_group *i2c_dev_attr_groups[] = {
836 &i2c_dev_attr_group,
837 NULL
838};
839
840static const struct dev_pm_ops i2c_device_pm_ops = {
841 .suspend = i2c_device_pm_suspend,
842 .resume = i2c_device_pm_resume,
843 .freeze = i2c_device_pm_freeze,
844 .thaw = i2c_device_pm_thaw,
845 .poweroff = i2c_device_pm_poweroff,
846 .restore = i2c_device_pm_restore,
847 SET_RUNTIME_PM_OPS(
848 pm_generic_runtime_suspend,
849 pm_generic_runtime_resume,
850 NULL
851 )
852};
853 732
854struct bus_type i2c_bus_type = { 733struct bus_type i2c_bus_type = {
855 .name = "i2c", 734 .name = "i2c",
@@ -857,12 +736,11 @@ struct bus_type i2c_bus_type = {
857 .probe = i2c_device_probe, 736 .probe = i2c_device_probe,
858 .remove = i2c_device_remove, 737 .remove = i2c_device_remove,
859 .shutdown = i2c_device_shutdown, 738 .shutdown = i2c_device_shutdown,
860 .pm = &i2c_device_pm_ops,
861}; 739};
862EXPORT_SYMBOL_GPL(i2c_bus_type); 740EXPORT_SYMBOL_GPL(i2c_bus_type);
863 741
864static struct device_type i2c_client_type = { 742static struct device_type i2c_client_type = {
865 .groups = i2c_dev_attr_groups, 743 .groups = i2c_dev_groups,
866 .uevent = i2c_device_uevent, 744 .uevent = i2c_device_uevent,
867 .release = i2c_client_dev_release, 745 .release = i2c_client_dev_release,
868}; 746};
@@ -1261,6 +1139,7 @@ i2c_sysfs_new_device(struct device *dev, struct device_attribute *attr,
1261 1139
1262 return count; 1140 return count;
1263} 1141}
1142static DEVICE_ATTR(new_device, S_IWUSR, NULL, i2c_sysfs_new_device);
1264 1143
1265/* 1144/*
1266 * And of course let the users delete the devices they instantiated, if 1145 * And of course let the users delete the devices they instantiated, if
@@ -1315,8 +1194,6 @@ i2c_sysfs_delete_device(struct device *dev, struct device_attribute *attr,
1315 "delete_device"); 1194 "delete_device");
1316 return res; 1195 return res;
1317} 1196}
1318
1319static DEVICE_ATTR(new_device, S_IWUSR, NULL, i2c_sysfs_new_device);
1320static DEVICE_ATTR_IGNORE_LOCKDEP(delete_device, S_IWUSR, NULL, 1197static DEVICE_ATTR_IGNORE_LOCKDEP(delete_device, S_IWUSR, NULL,
1321 i2c_sysfs_delete_device); 1198 i2c_sysfs_delete_device);
1322 1199
@@ -1326,18 +1203,10 @@ static struct attribute *i2c_adapter_attrs[] = {
1326 &dev_attr_delete_device.attr, 1203 &dev_attr_delete_device.attr,
1327 NULL 1204 NULL
1328}; 1205};
1329 1206ATTRIBUTE_GROUPS(i2c_adapter);
1330static struct attribute_group i2c_adapter_attr_group = {
1331 .attrs = i2c_adapter_attrs,
1332};
1333
1334static const struct attribute_group *i2c_adapter_attr_groups[] = {
1335 &i2c_adapter_attr_group,
1336 NULL
1337};
1338 1207
1339struct device_type i2c_adapter_type = { 1208struct device_type i2c_adapter_type = {
1340 .groups = i2c_adapter_attr_groups, 1209 .groups = i2c_adapter_groups,
1341 .release = i2c_adapter_dev_release, 1210 .release = i2c_adapter_dev_release,
1342}; 1211};
1343EXPORT_SYMBOL_GPL(i2c_adapter_type); 1212EXPORT_SYMBOL_GPL(i2c_adapter_type);
@@ -1419,8 +1288,6 @@ static struct i2c_client *of_i2c_register_device(struct i2c_adapter *adap,
1419 if (of_get_property(node, "wakeup-source", NULL)) 1288 if (of_get_property(node, "wakeup-source", NULL))
1420 info.flags |= I2C_CLIENT_WAKE; 1289 info.flags |= I2C_CLIENT_WAKE;
1421 1290
1422 request_module("%s%s", I2C_MODULE_PREFIX, info.type);
1423
1424 result = i2c_new_device(adap, &info); 1291 result = i2c_new_device(adap, &info);
1425 if (result == NULL) { 1292 if (result == NULL) {
1426 dev_err(&adap->dev, "of_i2c: Failure registering %s\n", 1293 dev_err(&adap->dev, "of_i2c: Failure registering %s\n",
@@ -1796,11 +1663,15 @@ void i2c_del_adapter(struct i2c_adapter *adap)
1796 /* device name is gone after device_unregister */ 1663 /* device name is gone after device_unregister */
1797 dev_dbg(&adap->dev, "adapter [%s] unregistered\n", adap->name); 1664 dev_dbg(&adap->dev, "adapter [%s] unregistered\n", adap->name);
1798 1665
1799 /* clean up the sysfs representation */ 1666 /* wait until all references to the device are gone
1667 *
1668 * FIXME: This is old code and should ideally be replaced by an
1669 * alternative which results in decoupling the lifetime of the struct
1670 * device from the i2c_adapter, like spi or netdev do. Any solution
1671 * should be throughly tested with DEBUG_KOBJECT_RELEASE enabled!
1672 */
1800 init_completion(&adap->dev_released); 1673 init_completion(&adap->dev_released);
1801 device_unregister(&adap->dev); 1674 device_unregister(&adap->dev);
1802
1803 /* wait for sysfs to drop all references */
1804 wait_for_completion(&adap->dev_released); 1675 wait_for_completion(&adap->dev_released);
1805 1676
1806 /* free bus id */ 1677 /* free bus id */
@@ -1859,14 +1730,6 @@ int i2c_register_driver(struct module *owner, struct i2c_driver *driver)
1859 if (res) 1730 if (res)
1860 return res; 1731 return res;
1861 1732
1862 /* Drivers should switch to dev_pm_ops instead. */
1863 if (driver->suspend)
1864 pr_warn("i2c-core: driver [%s] using legacy suspend method\n",
1865 driver->driver.name);
1866 if (driver->resume)
1867 pr_warn("i2c-core: driver [%s] using legacy resume method\n",
1868 driver->driver.name);
1869
1870 pr_debug("i2c-core: driver [%s] registered\n", driver->driver.name); 1733 pr_debug("i2c-core: driver [%s] registered\n", driver->driver.name);
1871 1734
1872 INIT_LIST_HEAD(&driver->clients); 1735 INIT_LIST_HEAD(&driver->clients);
diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c b/drivers/i2c/muxes/i2c-mux-pca954x.c
index ec11b404b433..3d8f4fe2e47e 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -41,6 +41,7 @@
41#include <linux/i2c-mux.h> 41#include <linux/i2c-mux.h>
42#include <linux/i2c/pca954x.h> 42#include <linux/i2c/pca954x.h>
43#include <linux/module.h> 43#include <linux/module.h>
44#include <linux/of.h>
44#include <linux/pm.h> 45#include <linux/pm.h>
45#include <linux/slab.h> 46#include <linux/slab.h>
46 47
@@ -186,6 +187,8 @@ static int pca954x_probe(struct i2c_client *client,
186{ 187{
187 struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent); 188 struct i2c_adapter *adap = to_i2c_adapter(client->dev.parent);
188 struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev); 189 struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev);
190 struct device_node *of_node = client->dev.of_node;
191 bool idle_disconnect_dt;
189 struct gpio_desc *gpio; 192 struct gpio_desc *gpio;
190 int num, force, class; 193 int num, force, class;
191 struct pca954x *data; 194 struct pca954x *data;
@@ -217,8 +220,13 @@ static int pca954x_probe(struct i2c_client *client,
217 data->type = id->driver_data; 220 data->type = id->driver_data;
218 data->last_chan = 0; /* force the first selection */ 221 data->last_chan = 0; /* force the first selection */
219 222
223 idle_disconnect_dt = of_node &&
224 of_property_read_bool(of_node, "i2c-mux-idle-disconnect");
225
220 /* Now create an adapter for each channel */ 226 /* Now create an adapter for each channel */
221 for (num = 0; num < chips[data->type].nchans; num++) { 227 for (num = 0; num < chips[data->type].nchans; num++) {
228 bool idle_disconnect_pd = false;
229
222 force = 0; /* dynamic adap number */ 230 force = 0; /* dynamic adap number */
223 class = 0; /* no class by default */ 231 class = 0; /* no class by default */
224 if (pdata) { 232 if (pdata) {
@@ -229,12 +237,13 @@ static int pca954x_probe(struct i2c_client *client,
229 } else 237 } else
230 /* discard unconfigured channels */ 238 /* discard unconfigured channels */
231 break; 239 break;
240 idle_disconnect_pd = pdata->modes[num].deselect_on_exit;
232 } 241 }
233 242
234 data->virt_adaps[num] = 243 data->virt_adaps[num] =
235 i2c_add_mux_adapter(adap, &client->dev, client, 244 i2c_add_mux_adapter(adap, &client->dev, client,
236 force, num, class, pca954x_select_chan, 245 force, num, class, pca954x_select_chan,
237 (pdata && pdata->modes[num].deselect_on_exit) 246 (idle_disconnect_pd || idle_disconnect_dt)
238 ? pca954x_deselect_mux : NULL); 247 ? pca954x_deselect_mux : NULL);
239 248
240 if (data->virt_adaps[num] == NULL) { 249 if (data->virt_adaps[num] == NULL) {
diff --git a/drivers/ide/ide-tape.c b/drivers/ide/ide-tape.c
index 1793aea4a7d2..6eb738ca6d2f 100644
--- a/drivers/ide/ide-tape.c
+++ b/drivers/ide/ide-tape.c
@@ -1793,11 +1793,11 @@ static void idetape_setup(ide_drive_t *drive, idetape_tape_t *tape, int minor)
1793 tape->best_dsc_rw_freq = clamp_t(unsigned long, t, IDETAPE_DSC_RW_MIN, 1793 tape->best_dsc_rw_freq = clamp_t(unsigned long, t, IDETAPE_DSC_RW_MIN,
1794 IDETAPE_DSC_RW_MAX); 1794 IDETAPE_DSC_RW_MAX);
1795 printk(KERN_INFO "ide-tape: %s <-> %s: %dKBps, %d*%dkB buffer, " 1795 printk(KERN_INFO "ide-tape: %s <-> %s: %dKBps, %d*%dkB buffer, "
1796 "%lums tDSC%s\n", 1796 "%ums tDSC%s\n",
1797 drive->name, tape->name, *(u16 *)&tape->caps[14], 1797 drive->name, tape->name, *(u16 *)&tape->caps[14],
1798 (*(u16 *)&tape->caps[16] * 512) / tape->buffer_size, 1798 (*(u16 *)&tape->caps[16] * 512) / tape->buffer_size,
1799 tape->buffer_size / 1024, 1799 tape->buffer_size / 1024,
1800 tape->best_dsc_rw_freq * 1000 / HZ, 1800 jiffies_to_msecs(tape->best_dsc_rw_freq),
1801 (drive->dev_flags & IDE_DFLAG_USING_DMA) ? ", DMA" : ""); 1801 (drive->dev_flags & IDE_DFLAG_USING_DMA) ? ", DMA" : "");
1802 1802
1803 ide_proc_register_driver(drive, tape->driver); 1803 ide_proc_register_driver(drive, tape->driver);
diff --git a/drivers/iio/adc/mcp3422.c b/drivers/iio/adc/mcp3422.c
index 51672256072b..b96c636470ef 100644
--- a/drivers/iio/adc/mcp3422.c
+++ b/drivers/iio/adc/mcp3422.c
@@ -58,20 +58,11 @@
58 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \ 58 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SAMP_FREQ), \
59 } 59 }
60 60
61/* LSB is in nV to eliminate floating point */
62static const u32 rates_to_lsb[] = {1000000, 250000, 62500, 15625};
63
64/*
65 * scales calculated as:
66 * rates_to_lsb[sample_rate] / (1 << pga);
67 * pga is 1 for 0, 2
68 */
69
70static const int mcp3422_scales[4][4] = { 61static const int mcp3422_scales[4][4] = {
71 { 1000000, 250000, 62500, 15625 }, 62 { 1000000, 500000, 250000, 125000 },
72 { 500000 , 125000, 31250, 7812 }, 63 { 250000 , 125000, 62500 , 31250 },
73 { 250000 , 62500 , 15625, 3906 }, 64 { 62500 , 31250 , 15625 , 7812 },
74 { 125000 , 31250 , 7812 , 1953 } }; 65 { 15625 , 7812 , 3906 , 1953 } };
75 66
76/* Constant msleep times for data acquisitions */ 67/* Constant msleep times for data acquisitions */
77static const int mcp3422_read_times[4] = { 68static const int mcp3422_read_times[4] = {
diff --git a/drivers/iio/adc/qcom-spmi-iadc.c b/drivers/iio/adc/qcom-spmi-iadc.c
index b9666f2f5e51..fabd24edc2a1 100644
--- a/drivers/iio/adc/qcom-spmi-iadc.c
+++ b/drivers/iio/adc/qcom-spmi-iadc.c
@@ -296,7 +296,8 @@ static int iadc_do_conversion(struct iadc_chip *iadc, int chan, u16 *data)
296 if (iadc->poll_eoc) { 296 if (iadc->poll_eoc) {
297 ret = iadc_poll_wait_eoc(iadc, wait); 297 ret = iadc_poll_wait_eoc(iadc, wait);
298 } else { 298 } else {
299 ret = wait_for_completion_timeout(&iadc->complete, wait); 299 ret = wait_for_completion_timeout(&iadc->complete,
300 usecs_to_jiffies(wait));
300 if (!ret) 301 if (!ret)
301 ret = -ETIMEDOUT; 302 ret = -ETIMEDOUT;
302 else 303 else
diff --git a/drivers/iio/common/ssp_sensors/ssp_dev.c b/drivers/iio/common/ssp_sensors/ssp_dev.c
index 52d70435f5a1..55a90082a29b 100644
--- a/drivers/iio/common/ssp_sensors/ssp_dev.c
+++ b/drivers/iio/common/ssp_sensors/ssp_dev.c
@@ -640,6 +640,7 @@ static int ssp_remove(struct spi_device *spi)
640 return 0; 640 return 0;
641} 641}
642 642
643#ifdef CONFIG_PM_SLEEP
643static int ssp_suspend(struct device *dev) 644static int ssp_suspend(struct device *dev)
644{ 645{
645 int ret; 646 int ret;
@@ -688,6 +689,7 @@ static int ssp_resume(struct device *dev)
688 689
689 return 0; 690 return 0;
690} 691}
692#endif /* CONFIG_PM_SLEEP */
691 693
692static const struct dev_pm_ops ssp_pm_ops = { 694static const struct dev_pm_ops ssp_pm_ops = {
693 SET_SYSTEM_SLEEP_PM_OPS(ssp_suspend, ssp_resume) 695 SET_SYSTEM_SLEEP_PM_OPS(ssp_suspend, ssp_resume)
diff --git a/drivers/iio/dac/ad5686.c b/drivers/iio/dac/ad5686.c
index f57562aa396f..15c73e20272d 100644
--- a/drivers/iio/dac/ad5686.c
+++ b/drivers/iio/dac/ad5686.c
@@ -322,7 +322,7 @@ static int ad5686_probe(struct spi_device *spi)
322 st = iio_priv(indio_dev); 322 st = iio_priv(indio_dev);
323 spi_set_drvdata(spi, indio_dev); 323 spi_set_drvdata(spi, indio_dev);
324 324
325 st->reg = devm_regulator_get(&spi->dev, "vcc"); 325 st->reg = devm_regulator_get_optional(&spi->dev, "vcc");
326 if (!IS_ERR(st->reg)) { 326 if (!IS_ERR(st->reg)) {
327 ret = regulator_enable(st->reg); 327 ret = regulator_enable(st->reg);
328 if (ret) 328 if (ret)
diff --git a/drivers/iio/humidity/dht11.c b/drivers/iio/humidity/dht11.c
index 623c145d8a97..7d79a1ac5f5f 100644
--- a/drivers/iio/humidity/dht11.c
+++ b/drivers/iio/humidity/dht11.c
@@ -29,6 +29,7 @@
29#include <linux/wait.h> 29#include <linux/wait.h>
30#include <linux/bitops.h> 30#include <linux/bitops.h>
31#include <linux/completion.h> 31#include <linux/completion.h>
32#include <linux/mutex.h>
32#include <linux/delay.h> 33#include <linux/delay.h>
33#include <linux/gpio.h> 34#include <linux/gpio.h>
34#include <linux/of_gpio.h> 35#include <linux/of_gpio.h>
@@ -39,8 +40,12 @@
39 40
40#define DHT11_DATA_VALID_TIME 2000000000 /* 2s in ns */ 41#define DHT11_DATA_VALID_TIME 2000000000 /* 2s in ns */
41 42
42#define DHT11_EDGES_PREAMBLE 4 43#define DHT11_EDGES_PREAMBLE 2
43#define DHT11_BITS_PER_READ 40 44#define DHT11_BITS_PER_READ 40
45/*
46 * Note that when reading the sensor actually 84 edges are detected, but
47 * since the last edge is not significant, we only store 83:
48 */
44#define DHT11_EDGES_PER_READ (2*DHT11_BITS_PER_READ + DHT11_EDGES_PREAMBLE + 1) 49#define DHT11_EDGES_PER_READ (2*DHT11_BITS_PER_READ + DHT11_EDGES_PREAMBLE + 1)
45 50
46/* Data transmission timing (nano seconds) */ 51/* Data transmission timing (nano seconds) */
@@ -57,6 +62,7 @@ struct dht11 {
57 int irq; 62 int irq;
58 63
59 struct completion completion; 64 struct completion completion;
65 struct mutex lock;
60 66
61 s64 timestamp; 67 s64 timestamp;
62 int temperature; 68 int temperature;
@@ -88,7 +94,7 @@ static int dht11_decode(struct dht11 *dht11, int offset)
88 unsigned char temp_int, temp_dec, hum_int, hum_dec, checksum; 94 unsigned char temp_int, temp_dec, hum_int, hum_dec, checksum;
89 95
90 /* Calculate timestamp resolution */ 96 /* Calculate timestamp resolution */
91 for (i = 0; i < dht11->num_edges; ++i) { 97 for (i = 1; i < dht11->num_edges; ++i) {
92 t = dht11->edges[i].ts - dht11->edges[i-1].ts; 98 t = dht11->edges[i].ts - dht11->edges[i-1].ts;
93 if (t > 0 && t < timeres) 99 if (t > 0 && t < timeres)
94 timeres = t; 100 timeres = t;
@@ -138,6 +144,27 @@ static int dht11_decode(struct dht11 *dht11, int offset)
138 return 0; 144 return 0;
139} 145}
140 146
147/*
148 * IRQ handler called on GPIO edges
149 */
150static irqreturn_t dht11_handle_irq(int irq, void *data)
151{
152 struct iio_dev *iio = data;
153 struct dht11 *dht11 = iio_priv(iio);
154
155 /* TODO: Consider making the handler safe for IRQ sharing */
156 if (dht11->num_edges < DHT11_EDGES_PER_READ && dht11->num_edges >= 0) {
157 dht11->edges[dht11->num_edges].ts = iio_get_time_ns();
158 dht11->edges[dht11->num_edges++].value =
159 gpio_get_value(dht11->gpio);
160
161 if (dht11->num_edges >= DHT11_EDGES_PER_READ)
162 complete(&dht11->completion);
163 }
164
165 return IRQ_HANDLED;
166}
167
141static int dht11_read_raw(struct iio_dev *iio_dev, 168static int dht11_read_raw(struct iio_dev *iio_dev,
142 const struct iio_chan_spec *chan, 169 const struct iio_chan_spec *chan,
143 int *val, int *val2, long m) 170 int *val, int *val2, long m)
@@ -145,6 +172,7 @@ static int dht11_read_raw(struct iio_dev *iio_dev,
145 struct dht11 *dht11 = iio_priv(iio_dev); 172 struct dht11 *dht11 = iio_priv(iio_dev);
146 int ret; 173 int ret;
147 174
175 mutex_lock(&dht11->lock);
148 if (dht11->timestamp + DHT11_DATA_VALID_TIME < iio_get_time_ns()) { 176 if (dht11->timestamp + DHT11_DATA_VALID_TIME < iio_get_time_ns()) {
149 reinit_completion(&dht11->completion); 177 reinit_completion(&dht11->completion);
150 178
@@ -157,8 +185,17 @@ static int dht11_read_raw(struct iio_dev *iio_dev,
157 if (ret) 185 if (ret)
158 goto err; 186 goto err;
159 187
188 ret = request_irq(dht11->irq, dht11_handle_irq,
189 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
190 iio_dev->name, iio_dev);
191 if (ret)
192 goto err;
193
160 ret = wait_for_completion_killable_timeout(&dht11->completion, 194 ret = wait_for_completion_killable_timeout(&dht11->completion,
161 HZ); 195 HZ);
196
197 free_irq(dht11->irq, iio_dev);
198
162 if (ret == 0 && dht11->num_edges < DHT11_EDGES_PER_READ - 1) { 199 if (ret == 0 && dht11->num_edges < DHT11_EDGES_PER_READ - 1) {
163 dev_err(&iio_dev->dev, 200 dev_err(&iio_dev->dev,
164 "Only %d signal edges detected\n", 201 "Only %d signal edges detected\n",
@@ -185,6 +222,7 @@ static int dht11_read_raw(struct iio_dev *iio_dev,
185 ret = -EINVAL; 222 ret = -EINVAL;
186err: 223err:
187 dht11->num_edges = -1; 224 dht11->num_edges = -1;
225 mutex_unlock(&dht11->lock);
188 return ret; 226 return ret;
189} 227}
190 228
@@ -193,27 +231,6 @@ static const struct iio_info dht11_iio_info = {
193 .read_raw = dht11_read_raw, 231 .read_raw = dht11_read_raw,
194}; 232};
195 233
196/*
197 * IRQ handler called on GPIO edges
198*/
199static irqreturn_t dht11_handle_irq(int irq, void *data)
200{
201 struct iio_dev *iio = data;
202 struct dht11 *dht11 = iio_priv(iio);
203
204 /* TODO: Consider making the handler safe for IRQ sharing */
205 if (dht11->num_edges < DHT11_EDGES_PER_READ && dht11->num_edges >= 0) {
206 dht11->edges[dht11->num_edges].ts = iio_get_time_ns();
207 dht11->edges[dht11->num_edges++].value =
208 gpio_get_value(dht11->gpio);
209
210 if (dht11->num_edges >= DHT11_EDGES_PER_READ)
211 complete(&dht11->completion);
212 }
213
214 return IRQ_HANDLED;
215}
216
217static const struct iio_chan_spec dht11_chan_spec[] = { 234static const struct iio_chan_spec dht11_chan_spec[] = {
218 { .type = IIO_TEMP, 235 { .type = IIO_TEMP,
219 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), }, 236 .info_mask_separate = BIT(IIO_CHAN_INFO_PROCESSED), },
@@ -256,11 +273,6 @@ static int dht11_probe(struct platform_device *pdev)
256 dev_err(dev, "GPIO %d has no interrupt\n", dht11->gpio); 273 dev_err(dev, "GPIO %d has no interrupt\n", dht11->gpio);
257 return -EINVAL; 274 return -EINVAL;
258 } 275 }
259 ret = devm_request_irq(dev, dht11->irq, dht11_handle_irq,
260 IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING,
261 pdev->name, iio);
262 if (ret)
263 return ret;
264 276
265 dht11->timestamp = iio_get_time_ns() - DHT11_DATA_VALID_TIME - 1; 277 dht11->timestamp = iio_get_time_ns() - DHT11_DATA_VALID_TIME - 1;
266 dht11->num_edges = -1; 278 dht11->num_edges = -1;
@@ -268,6 +280,7 @@ static int dht11_probe(struct platform_device *pdev)
268 platform_set_drvdata(pdev, iio); 280 platform_set_drvdata(pdev, iio);
269 281
270 init_completion(&dht11->completion); 282 init_completion(&dht11->completion);
283 mutex_init(&dht11->lock);
271 iio->name = pdev->name; 284 iio->name = pdev->name;
272 iio->dev.parent = &pdev->dev; 285 iio->dev.parent = &pdev->dev;
273 iio->info = &dht11_iio_info; 286 iio->info = &dht11_iio_info;
diff --git a/drivers/iio/humidity/si7020.c b/drivers/iio/humidity/si7020.c
index b54164677b89..fa3b809aff5e 100644
--- a/drivers/iio/humidity/si7020.c
+++ b/drivers/iio/humidity/si7020.c
@@ -45,12 +45,12 @@ static int si7020_read_raw(struct iio_dev *indio_dev,
45 struct iio_chan_spec const *chan, int *val, 45 struct iio_chan_spec const *chan, int *val,
46 int *val2, long mask) 46 int *val2, long mask)
47{ 47{
48 struct i2c_client *client = iio_priv(indio_dev); 48 struct i2c_client **client = iio_priv(indio_dev);
49 int ret; 49 int ret;
50 50
51 switch (mask) { 51 switch (mask) {
52 case IIO_CHAN_INFO_RAW: 52 case IIO_CHAN_INFO_RAW:
53 ret = i2c_smbus_read_word_data(client, 53 ret = i2c_smbus_read_word_data(*client,
54 chan->type == IIO_TEMP ? 54 chan->type == IIO_TEMP ?
55 SI7020CMD_TEMP_HOLD : 55 SI7020CMD_TEMP_HOLD :
56 SI7020CMD_RH_HOLD); 56 SI7020CMD_RH_HOLD);
@@ -126,7 +126,7 @@ static int si7020_probe(struct i2c_client *client,
126 /* Wait the maximum power-up time after software reset. */ 126 /* Wait the maximum power-up time after software reset. */
127 msleep(15); 127 msleep(15);
128 128
129 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*client)); 129 indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*data));
130 if (!indio_dev) 130 if (!indio_dev)
131 return -ENOMEM; 131 return -ENOMEM;
132 132
diff --git a/drivers/iio/imu/adis16400_core.c b/drivers/iio/imu/adis16400_core.c
index b70873de04ea..fa795dcd5f75 100644
--- a/drivers/iio/imu/adis16400_core.c
+++ b/drivers/iio/imu/adis16400_core.c
@@ -26,6 +26,7 @@
26#include <linux/list.h> 26#include <linux/list.h>
27#include <linux/module.h> 27#include <linux/module.h>
28#include <linux/debugfs.h> 28#include <linux/debugfs.h>
29#include <linux/bitops.h>
29 30
30#include <linux/iio/iio.h> 31#include <linux/iio/iio.h>
31#include <linux/iio/sysfs.h> 32#include <linux/iio/sysfs.h>
@@ -414,7 +415,7 @@ static int adis16400_read_raw(struct iio_dev *indio_dev,
414 mutex_unlock(&indio_dev->mlock); 415 mutex_unlock(&indio_dev->mlock);
415 if (ret) 416 if (ret)
416 return ret; 417 return ret;
417 val16 = ((val16 & 0xFFF) << 4) >> 4; 418 val16 = sign_extend32(val16, 11);
418 *val = val16; 419 *val = val16;
419 return IIO_VAL_INT; 420 return IIO_VAL_INT;
420 case IIO_CHAN_INFO_OFFSET: 421 case IIO_CHAN_INFO_OFFSET:
diff --git a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
index f73e60b7a796..d8d5bed65e07 100644
--- a/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
+++ b/drivers/iio/imu/inv_mpu6050/inv_mpu_core.c
@@ -780,7 +780,11 @@ static int inv_mpu_probe(struct i2c_client *client,
780 780
781 i2c_set_clientdata(client, indio_dev); 781 i2c_set_clientdata(client, indio_dev);
782 indio_dev->dev.parent = &client->dev; 782 indio_dev->dev.parent = &client->dev;
783 indio_dev->name = id->name; 783 /* id will be NULL when enumerated via ACPI */
784 if (id)
785 indio_dev->name = (char *)id->name;
786 else
787 indio_dev->name = (char *)dev_name(&client->dev);
784 indio_dev->channels = inv_mpu_channels; 788 indio_dev->channels = inv_mpu_channels;
785 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels); 789 indio_dev->num_channels = ARRAY_SIZE(inv_mpu_channels);
786 790
diff --git a/drivers/iio/light/Kconfig b/drivers/iio/light/Kconfig
index ae68c64bdad3..a224afd6380c 100644
--- a/drivers/iio/light/Kconfig
+++ b/drivers/iio/light/Kconfig
@@ -73,6 +73,7 @@ config CM36651
73config GP2AP020A00F 73config GP2AP020A00F
74 tristate "Sharp GP2AP020A00F Proximity/ALS sensor" 74 tristate "Sharp GP2AP020A00F Proximity/ALS sensor"
75 depends on I2C 75 depends on I2C
76 select REGMAP_I2C
76 select IIO_BUFFER 77 select IIO_BUFFER
77 select IIO_TRIGGERED_BUFFER 78 select IIO_TRIGGERED_BUFFER
78 select IRQ_WORK 79 select IRQ_WORK
@@ -126,6 +127,7 @@ config HID_SENSOR_PROX
126config JSA1212 127config JSA1212
127 tristate "JSA1212 ALS and proximity sensor driver" 128 tristate "JSA1212 ALS and proximity sensor driver"
128 depends on I2C 129 depends on I2C
130 select REGMAP_I2C
129 help 131 help
130 Say Y here if you want to build a IIO driver for JSA1212 132 Say Y here if you want to build a IIO driver for JSA1212
131 proximity & ALS sensor device. 133 proximity & ALS sensor device.
diff --git a/drivers/iio/magnetometer/Kconfig b/drivers/iio/magnetometer/Kconfig
index 4c7a4c52dd06..a5d6de72c523 100644
--- a/drivers/iio/magnetometer/Kconfig
+++ b/drivers/iio/magnetometer/Kconfig
@@ -18,6 +18,8 @@ config AK8975
18 18
19config AK09911 19config AK09911
20 tristate "Asahi Kasei AK09911 3-axis Compass" 20 tristate "Asahi Kasei AK09911 3-axis Compass"
21 depends on I2C
22 depends on GPIOLIB
21 select AK8975 23 select AK8975
22 help 24 help
23 Deprecated: AK09911 is now supported by AK8975 driver. 25 Deprecated: AK09911 is now supported by AK8975 driver.
diff --git a/drivers/infiniband/core/ucma.c b/drivers/infiniband/core/ucma.c
index 56a4b7ca7ee3..45d67e9228d7 100644
--- a/drivers/infiniband/core/ucma.c
+++ b/drivers/infiniband/core/ucma.c
@@ -1124,6 +1124,9 @@ static int ucma_set_ib_path(struct ucma_context *ctx,
1124 if (!optlen) 1124 if (!optlen)
1125 return -EINVAL; 1125 return -EINVAL;
1126 1126
1127 memset(&sa_path, 0, sizeof(sa_path));
1128 sa_path.vlan_id = 0xffff;
1129
1127 ib_sa_unpack_path(path_data->path_rec, &sa_path); 1130 ib_sa_unpack_path(path_data->path_rec, &sa_path);
1128 ret = rdma_set_ib_paths(ctx->cm_id, &sa_path, 1); 1131 ret = rdma_set_ib_paths(ctx->cm_id, &sa_path, 1);
1129 if (ret) 1132 if (ret)
diff --git a/drivers/infiniband/core/umem_odp.c b/drivers/infiniband/core/umem_odp.c
index 6095872549e7..8b8cc6fa0ab0 100644
--- a/drivers/infiniband/core/umem_odp.c
+++ b/drivers/infiniband/core/umem_odp.c
@@ -294,7 +294,8 @@ int ib_umem_odp_get(struct ib_ucontext *context, struct ib_umem *umem)
294 if (likely(ib_umem_start(umem) != ib_umem_end(umem))) 294 if (likely(ib_umem_start(umem) != ib_umem_end(umem)))
295 rbt_ib_umem_insert(&umem->odp_data->interval_tree, 295 rbt_ib_umem_insert(&umem->odp_data->interval_tree,
296 &context->umem_tree); 296 &context->umem_tree);
297 if (likely(!atomic_read(&context->notifier_count))) 297 if (likely(!atomic_read(&context->notifier_count)) ||
298 context->odp_mrs_count == 1)
298 umem->odp_data->mn_counters_active = true; 299 umem->odp_data->mn_counters_active = true;
299 else 300 else
300 list_add(&umem->odp_data->no_private_counters, 301 list_add(&umem->odp_data->no_private_counters,
diff --git a/drivers/infiniband/core/uverbs.h b/drivers/infiniband/core/uverbs.h
index 643c08a025a5..b716b0815644 100644
--- a/drivers/infiniband/core/uverbs.h
+++ b/drivers/infiniband/core/uverbs.h
@@ -258,5 +258,6 @@ IB_UVERBS_DECLARE_CMD(close_xrcd);
258 258
259IB_UVERBS_DECLARE_EX_CMD(create_flow); 259IB_UVERBS_DECLARE_EX_CMD(create_flow);
260IB_UVERBS_DECLARE_EX_CMD(destroy_flow); 260IB_UVERBS_DECLARE_EX_CMD(destroy_flow);
261IB_UVERBS_DECLARE_EX_CMD(query_device);
261 262
262#endif /* UVERBS_H */ 263#endif /* UVERBS_H */
diff --git a/drivers/infiniband/core/uverbs_cmd.c b/drivers/infiniband/core/uverbs_cmd.c
index b7943ff16ed3..a9f048990dfc 100644
--- a/drivers/infiniband/core/uverbs_cmd.c
+++ b/drivers/infiniband/core/uverbs_cmd.c
@@ -400,6 +400,52 @@ err:
400 return ret; 400 return ret;
401} 401}
402 402
403static void copy_query_dev_fields(struct ib_uverbs_file *file,
404 struct ib_uverbs_query_device_resp *resp,
405 struct ib_device_attr *attr)
406{
407 resp->fw_ver = attr->fw_ver;
408 resp->node_guid = file->device->ib_dev->node_guid;
409 resp->sys_image_guid = attr->sys_image_guid;
410 resp->max_mr_size = attr->max_mr_size;
411 resp->page_size_cap = attr->page_size_cap;
412 resp->vendor_id = attr->vendor_id;
413 resp->vendor_part_id = attr->vendor_part_id;
414 resp->hw_ver = attr->hw_ver;
415 resp->max_qp = attr->max_qp;
416 resp->max_qp_wr = attr->max_qp_wr;
417 resp->device_cap_flags = attr->device_cap_flags;
418 resp->max_sge = attr->max_sge;
419 resp->max_sge_rd = attr->max_sge_rd;
420 resp->max_cq = attr->max_cq;
421 resp->max_cqe = attr->max_cqe;
422 resp->max_mr = attr->max_mr;
423 resp->max_pd = attr->max_pd;
424 resp->max_qp_rd_atom = attr->max_qp_rd_atom;
425 resp->max_ee_rd_atom = attr->max_ee_rd_atom;
426 resp->max_res_rd_atom = attr->max_res_rd_atom;
427 resp->max_qp_init_rd_atom = attr->max_qp_init_rd_atom;
428 resp->max_ee_init_rd_atom = attr->max_ee_init_rd_atom;
429 resp->atomic_cap = attr->atomic_cap;
430 resp->max_ee = attr->max_ee;
431 resp->max_rdd = attr->max_rdd;
432 resp->max_mw = attr->max_mw;
433 resp->max_raw_ipv6_qp = attr->max_raw_ipv6_qp;
434 resp->max_raw_ethy_qp = attr->max_raw_ethy_qp;
435 resp->max_mcast_grp = attr->max_mcast_grp;
436 resp->max_mcast_qp_attach = attr->max_mcast_qp_attach;
437 resp->max_total_mcast_qp_attach = attr->max_total_mcast_qp_attach;
438 resp->max_ah = attr->max_ah;
439 resp->max_fmr = attr->max_fmr;
440 resp->max_map_per_fmr = attr->max_map_per_fmr;
441 resp->max_srq = attr->max_srq;
442 resp->max_srq_wr = attr->max_srq_wr;
443 resp->max_srq_sge = attr->max_srq_sge;
444 resp->max_pkeys = attr->max_pkeys;
445 resp->local_ca_ack_delay = attr->local_ca_ack_delay;
446 resp->phys_port_cnt = file->device->ib_dev->phys_port_cnt;
447}
448
403ssize_t ib_uverbs_query_device(struct ib_uverbs_file *file, 449ssize_t ib_uverbs_query_device(struct ib_uverbs_file *file,
404 const char __user *buf, 450 const char __user *buf,
405 int in_len, int out_len) 451 int in_len, int out_len)
@@ -420,47 +466,7 @@ ssize_t ib_uverbs_query_device(struct ib_uverbs_file *file,
420 return ret; 466 return ret;
421 467
422 memset(&resp, 0, sizeof resp); 468 memset(&resp, 0, sizeof resp);
423 469 copy_query_dev_fields(file, &resp, &attr);
424 resp.fw_ver = attr.fw_ver;
425 resp.node_guid = file->device->ib_dev->node_guid;
426 resp.sys_image_guid = attr.sys_image_guid;
427 resp.max_mr_size = attr.max_mr_size;
428 resp.page_size_cap = attr.page_size_cap;
429 resp.vendor_id = attr.vendor_id;
430 resp.vendor_part_id = attr.vendor_part_id;
431 resp.hw_ver = attr.hw_ver;
432 resp.max_qp = attr.max_qp;
433 resp.max_qp_wr = attr.max_qp_wr;
434 resp.device_cap_flags = attr.device_cap_flags;
435 resp.max_sge = attr.max_sge;
436 resp.max_sge_rd = attr.max_sge_rd;
437 resp.max_cq = attr.max_cq;
438 resp.max_cqe = attr.max_cqe;
439 resp.max_mr = attr.max_mr;
440 resp.max_pd = attr.max_pd;
441 resp.max_qp_rd_atom = attr.max_qp_rd_atom;
442 resp.max_ee_rd_atom = attr.max_ee_rd_atom;
443 resp.max_res_rd_atom = attr.max_res_rd_atom;
444 resp.max_qp_init_rd_atom = attr.max_qp_init_rd_atom;
445 resp.max_ee_init_rd_atom = attr.max_ee_init_rd_atom;
446 resp.atomic_cap = attr.atomic_cap;
447 resp.max_ee = attr.max_ee;
448 resp.max_rdd = attr.max_rdd;
449 resp.max_mw = attr.max_mw;
450 resp.max_raw_ipv6_qp = attr.max_raw_ipv6_qp;
451 resp.max_raw_ethy_qp = attr.max_raw_ethy_qp;
452 resp.max_mcast_grp = attr.max_mcast_grp;
453 resp.max_mcast_qp_attach = attr.max_mcast_qp_attach;
454 resp.max_total_mcast_qp_attach = attr.max_total_mcast_qp_attach;
455 resp.max_ah = attr.max_ah;
456 resp.max_fmr = attr.max_fmr;
457 resp.max_map_per_fmr = attr.max_map_per_fmr;
458 resp.max_srq = attr.max_srq;
459 resp.max_srq_wr = attr.max_srq_wr;
460 resp.max_srq_sge = attr.max_srq_sge;
461 resp.max_pkeys = attr.max_pkeys;
462 resp.local_ca_ack_delay = attr.local_ca_ack_delay;
463 resp.phys_port_cnt = file->device->ib_dev->phys_port_cnt;
464 470
465 if (copy_to_user((void __user *) (unsigned long) cmd.response, 471 if (copy_to_user((void __user *) (unsigned long) cmd.response,
466 &resp, sizeof resp)) 472 &resp, sizeof resp))
@@ -2091,20 +2097,21 @@ ssize_t ib_uverbs_modify_qp(struct ib_uverbs_file *file,
2091 if (qp->real_qp == qp) { 2097 if (qp->real_qp == qp) {
2092 ret = ib_resolve_eth_l2_attrs(qp, attr, &cmd.attr_mask); 2098 ret = ib_resolve_eth_l2_attrs(qp, attr, &cmd.attr_mask);
2093 if (ret) 2099 if (ret)
2094 goto out; 2100 goto release_qp;
2095 ret = qp->device->modify_qp(qp, attr, 2101 ret = qp->device->modify_qp(qp, attr,
2096 modify_qp_mask(qp->qp_type, cmd.attr_mask), &udata); 2102 modify_qp_mask(qp->qp_type, cmd.attr_mask), &udata);
2097 } else { 2103 } else {
2098 ret = ib_modify_qp(qp, attr, modify_qp_mask(qp->qp_type, cmd.attr_mask)); 2104 ret = ib_modify_qp(qp, attr, modify_qp_mask(qp->qp_type, cmd.attr_mask));
2099 } 2105 }
2100 2106
2101 put_qp_read(qp);
2102
2103 if (ret) 2107 if (ret)
2104 goto out; 2108 goto release_qp;
2105 2109
2106 ret = in_len; 2110 ret = in_len;
2107 2111
2112release_qp:
2113 put_qp_read(qp);
2114
2108out: 2115out:
2109 kfree(attr); 2116 kfree(attr);
2110 2117
@@ -3287,3 +3294,64 @@ ssize_t ib_uverbs_destroy_srq(struct ib_uverbs_file *file,
3287 3294
3288 return ret ? ret : in_len; 3295 return ret ? ret : in_len;
3289} 3296}
3297
3298int ib_uverbs_ex_query_device(struct ib_uverbs_file *file,
3299 struct ib_udata *ucore,
3300 struct ib_udata *uhw)
3301{
3302 struct ib_uverbs_ex_query_device_resp resp;
3303 struct ib_uverbs_ex_query_device cmd;
3304 struct ib_device_attr attr;
3305 struct ib_device *device;
3306 int err;
3307
3308 device = file->device->ib_dev;
3309 if (ucore->inlen < sizeof(cmd))
3310 return -EINVAL;
3311
3312 err = ib_copy_from_udata(&cmd, ucore, sizeof(cmd));
3313 if (err)
3314 return err;
3315
3316 if (cmd.comp_mask)
3317 return -EINVAL;
3318
3319 if (cmd.reserved)
3320 return -EINVAL;
3321
3322 resp.response_length = offsetof(typeof(resp), odp_caps);
3323
3324 if (ucore->outlen < resp.response_length)
3325 return -ENOSPC;
3326
3327 err = device->query_device(device, &attr);
3328 if (err)
3329 return err;
3330
3331 copy_query_dev_fields(file, &resp.base, &attr);
3332 resp.comp_mask = 0;
3333
3334 if (ucore->outlen < resp.response_length + sizeof(resp.odp_caps))
3335 goto end;
3336
3337#ifdef CONFIG_INFINIBAND_ON_DEMAND_PAGING
3338 resp.odp_caps.general_caps = attr.odp_caps.general_caps;
3339 resp.odp_caps.per_transport_caps.rc_odp_caps =
3340 attr.odp_caps.per_transport_caps.rc_odp_caps;
3341 resp.odp_caps.per_transport_caps.uc_odp_caps =
3342 attr.odp_caps.per_transport_caps.uc_odp_caps;
3343 resp.odp_caps.per_transport_caps.ud_odp_caps =
3344 attr.odp_caps.per_transport_caps.ud_odp_caps;
3345 resp.odp_caps.reserved = 0;
3346#else
3347 memset(&resp.odp_caps, 0, sizeof(resp.odp_caps));
3348#endif
3349 resp.response_length += sizeof(resp.odp_caps);
3350
3351end:
3352 err = ib_copy_to_udata(ucore, &resp, resp.response_length);
3353 if (err)
3354 return err;
3355
3356 return 0;
3357}
diff --git a/drivers/infiniband/core/uverbs_main.c b/drivers/infiniband/core/uverbs_main.c
index 5db1a8cc388d..259dcc7779f5 100644
--- a/drivers/infiniband/core/uverbs_main.c
+++ b/drivers/infiniband/core/uverbs_main.c
@@ -123,6 +123,7 @@ static int (*uverbs_ex_cmd_table[])(struct ib_uverbs_file *file,
123 struct ib_udata *uhw) = { 123 struct ib_udata *uhw) = {
124 [IB_USER_VERBS_EX_CMD_CREATE_FLOW] = ib_uverbs_ex_create_flow, 124 [IB_USER_VERBS_EX_CMD_CREATE_FLOW] = ib_uverbs_ex_create_flow,
125 [IB_USER_VERBS_EX_CMD_DESTROY_FLOW] = ib_uverbs_ex_destroy_flow, 125 [IB_USER_VERBS_EX_CMD_DESTROY_FLOW] = ib_uverbs_ex_destroy_flow,
126 [IB_USER_VERBS_EX_CMD_QUERY_DEVICE] = ib_uverbs_ex_query_device,
126}; 127};
127 128
128static void ib_uverbs_add_one(struct ib_device *device); 129static void ib_uverbs_add_one(struct ib_device *device);
diff --git a/drivers/infiniband/hw/cxgb4/ev.c b/drivers/infiniband/hw/cxgb4/ev.c
index 794555dc86a5..bdfac2ccb704 100644
--- a/drivers/infiniband/hw/cxgb4/ev.c
+++ b/drivers/infiniband/hw/cxgb4/ev.c
@@ -225,13 +225,20 @@ int c4iw_ev_handler(struct c4iw_dev *dev, u32 qid)
225 struct c4iw_cq *chp; 225 struct c4iw_cq *chp;
226 unsigned long flag; 226 unsigned long flag;
227 227
228 spin_lock_irqsave(&dev->lock, flag);
228 chp = get_chp(dev, qid); 229 chp = get_chp(dev, qid);
229 if (chp) { 230 if (chp) {
231 atomic_inc(&chp->refcnt);
232 spin_unlock_irqrestore(&dev->lock, flag);
230 t4_clear_cq_armed(&chp->cq); 233 t4_clear_cq_armed(&chp->cq);
231 spin_lock_irqsave(&chp->comp_handler_lock, flag); 234 spin_lock_irqsave(&chp->comp_handler_lock, flag);
232 (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context); 235 (*chp->ibcq.comp_handler)(&chp->ibcq, chp->ibcq.cq_context);
233 spin_unlock_irqrestore(&chp->comp_handler_lock, flag); 236 spin_unlock_irqrestore(&chp->comp_handler_lock, flag);
234 } else 237 if (atomic_dec_and_test(&chp->refcnt))
238 wake_up(&chp->wait);
239 } else {
235 PDBG("%s unknown cqid 0x%x\n", __func__, qid); 240 PDBG("%s unknown cqid 0x%x\n", __func__, qid);
241 spin_unlock_irqrestore(&dev->lock, flag);
242 }
236 return 0; 243 return 0;
237} 244}
diff --git a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
index b5678ac97393..d87e1650f643 100644
--- a/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
+++ b/drivers/infiniband/hw/cxgb4/iw_cxgb4.h
@@ -196,7 +196,7 @@ static inline int c4iw_num_stags(struct c4iw_rdev *rdev)
196 return (int)(rdev->lldi.vr->stag.size >> 5); 196 return (int)(rdev->lldi.vr->stag.size >> 5);
197} 197}
198 198
199#define C4IW_WR_TO (30*HZ) 199#define C4IW_WR_TO (60*HZ)
200 200
201struct c4iw_wr_wait { 201struct c4iw_wr_wait {
202 struct completion completion; 202 struct completion completion;
@@ -220,22 +220,21 @@ static inline int c4iw_wait_for_reply(struct c4iw_rdev *rdev,
220 u32 hwtid, u32 qpid, 220 u32 hwtid, u32 qpid,
221 const char *func) 221 const char *func)
222{ 222{
223 unsigned to = C4IW_WR_TO;
224 int ret; 223 int ret;
225 224
226 do { 225 if (c4iw_fatal_error(rdev)) {
227 ret = wait_for_completion_timeout(&wr_waitp->completion, to); 226 wr_waitp->ret = -EIO;
228 if (!ret) { 227 goto out;
229 printk(KERN_ERR MOD "%s - Device %s not responding - " 228 }
230 "tid %u qpid %u\n", func, 229
231 pci_name(rdev->lldi.pdev), hwtid, qpid); 230 ret = wait_for_completion_timeout(&wr_waitp->completion, C4IW_WR_TO);
232 if (c4iw_fatal_error(rdev)) { 231 if (!ret) {
233 wr_waitp->ret = -EIO; 232 PDBG("%s - Device %s not responding (disabling device) - tid %u qpid %u\n",
234 break; 233 func, pci_name(rdev->lldi.pdev), hwtid, qpid);
235 } 234 rdev->flags |= T4_FATAL_ERROR;
236 to = to << 2; 235 wr_waitp->ret = -EIO;
237 } 236 }
238 } while (!ret); 237out:
239 if (wr_waitp->ret) 238 if (wr_waitp->ret)
240 PDBG("%s: FW reply %d tid %u qpid %u\n", 239 PDBG("%s: FW reply %d tid %u qpid %u\n",
241 pci_name(rdev->lldi.pdev), wr_waitp->ret, hwtid, qpid); 240 pci_name(rdev->lldi.pdev), wr_waitp->ret, hwtid, qpid);
diff --git a/drivers/infiniband/hw/ipath/ipath_fs.c b/drivers/infiniband/hw/ipath/ipath_fs.c
index 4977082e081f..33c45dfcbd88 100644
--- a/drivers/infiniband/hw/ipath/ipath_fs.c
+++ b/drivers/infiniband/hw/ipath/ipath_fs.c
@@ -277,7 +277,7 @@ static int remove_file(struct dentry *parent, char *name)
277 } 277 }
278 278
279 spin_lock(&tmp->d_lock); 279 spin_lock(&tmp->d_lock);
280 if (!(d_unhashed(tmp) && tmp->d_inode)) { 280 if (!d_unhashed(tmp) && tmp->d_inode) {
281 dget_dlock(tmp); 281 dget_dlock(tmp);
282 __d_drop(tmp); 282 __d_drop(tmp);
283 spin_unlock(&tmp->d_lock); 283 spin_unlock(&tmp->d_lock);
diff --git a/drivers/infiniband/hw/ipath/ipath_kernel.h b/drivers/infiniband/hw/ipath/ipath_kernel.h
index 6559af60bffd..e08db7020cd4 100644
--- a/drivers/infiniband/hw/ipath/ipath_kernel.h
+++ b/drivers/infiniband/hw/ipath/ipath_kernel.h
@@ -908,9 +908,6 @@ void ipath_chip_cleanup(struct ipath_devdata *);
908/* clean up any chip type-specific stuff */ 908/* clean up any chip type-specific stuff */
909void ipath_chip_done(void); 909void ipath_chip_done(void);
910 910
911/* check to see if we have to force ordering for write combining */
912int ipath_unordered_wc(void);
913
914void ipath_disarm_piobufs(struct ipath_devdata *, unsigned first, 911void ipath_disarm_piobufs(struct ipath_devdata *, unsigned first,
915 unsigned cnt); 912 unsigned cnt);
916void ipath_cancel_sends(struct ipath_devdata *, int); 913void ipath_cancel_sends(struct ipath_devdata *, int);
diff --git a/drivers/infiniband/hw/ipath/ipath_wc_ppc64.c b/drivers/infiniband/hw/ipath/ipath_wc_ppc64.c
index 1d7bd82a1fb1..1a7e20a75149 100644
--- a/drivers/infiniband/hw/ipath/ipath_wc_ppc64.c
+++ b/drivers/infiniband/hw/ipath/ipath_wc_ppc64.c
@@ -47,16 +47,3 @@ int ipath_enable_wc(struct ipath_devdata *dd)
47{ 47{
48 return 0; 48 return 0;
49} 49}
50
51/**
52 * ipath_unordered_wc - indicate whether write combining is unordered
53 *
54 * Because our performance depends on our ability to do write
55 * combining mmio writes in the most efficient way, we need to
56 * know if we are on a processor that may reorder stores when
57 * write combining.
58 */
59int ipath_unordered_wc(void)
60{
61 return 1;
62}
diff --git a/drivers/infiniband/hw/ipath/ipath_wc_x86_64.c b/drivers/infiniband/hw/ipath/ipath_wc_x86_64.c
index 3428acb0868c..4ad0b932df1f 100644
--- a/drivers/infiniband/hw/ipath/ipath_wc_x86_64.c
+++ b/drivers/infiniband/hw/ipath/ipath_wc_x86_64.c
@@ -167,18 +167,3 @@ void ipath_disable_wc(struct ipath_devdata *dd)
167 dd->ipath_wc_cookie = 0; /* even on failure */ 167 dd->ipath_wc_cookie = 0; /* even on failure */
168 } 168 }
169} 169}
170
171/**
172 * ipath_unordered_wc - indicate whether write combining is ordered
173 *
174 * Because our performance depends on our ability to do write combining mmio
175 * writes in the most efficient way, we need to know if we are on an Intel
176 * or AMD x86_64 processor. AMD x86_64 processors flush WC buffers out in
177 * the order completed, and so no special flushing is required to get
178 * correct ordering. Intel processors, however, will flush write buffers
179 * out in "random" orders, and so explicit ordering is needed at times.
180 */
181int ipath_unordered_wc(void)
182{
183 return boot_cpu_data.x86_vendor != X86_VENDOR_AMD;
184}
diff --git a/drivers/infiniband/hw/mlx4/cm.c b/drivers/infiniband/hw/mlx4/cm.c
index 56a593e0ae5d..39a488889fc7 100644
--- a/drivers/infiniband/hw/mlx4/cm.c
+++ b/drivers/infiniband/hw/mlx4/cm.c
@@ -372,7 +372,7 @@ int mlx4_ib_demux_cm_handler(struct ib_device *ibdev, int port, int *slave,
372 *slave = mlx4_ib_find_real_gid(ibdev, port, gid.global.interface_id); 372 *slave = mlx4_ib_find_real_gid(ibdev, port, gid.global.interface_id);
373 if (*slave < 0) { 373 if (*slave < 0) {
374 mlx4_ib_warn(ibdev, "failed matching slave_id by gid (0x%llx)\n", 374 mlx4_ib_warn(ibdev, "failed matching slave_id by gid (0x%llx)\n",
375 gid.global.interface_id); 375 be64_to_cpu(gid.global.interface_id));
376 return -ENOENT; 376 return -ENOENT;
377 } 377 }
378 return 0; 378 return 0;
diff --git a/drivers/infiniband/hw/mlx4/cq.c b/drivers/infiniband/hw/mlx4/cq.c
index 543ecdd8667b..0176caa5792c 100644
--- a/drivers/infiniband/hw/mlx4/cq.c
+++ b/drivers/infiniband/hw/mlx4/cq.c
@@ -369,8 +369,7 @@ int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata)
369 int err; 369 int err;
370 370
371 mutex_lock(&cq->resize_mutex); 371 mutex_lock(&cq->resize_mutex);
372 372 if (entries < 1 || entries > dev->dev->caps.max_cqes) {
373 if (entries < 1) {
374 err = -EINVAL; 373 err = -EINVAL;
375 goto out; 374 goto out;
376 } 375 }
@@ -381,7 +380,7 @@ int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata)
381 goto out; 380 goto out;
382 } 381 }
383 382
384 if (entries > dev->dev->caps.max_cqes) { 383 if (entries > dev->dev->caps.max_cqes + 1) {
385 err = -EINVAL; 384 err = -EINVAL;
386 goto out; 385 goto out;
387 } 386 }
@@ -394,7 +393,7 @@ int mlx4_ib_resize_cq(struct ib_cq *ibcq, int entries, struct ib_udata *udata)
394 /* Can't be smaller than the number of outstanding CQEs */ 393 /* Can't be smaller than the number of outstanding CQEs */
395 outst_cqe = mlx4_ib_get_outstanding_cqes(cq); 394 outst_cqe = mlx4_ib_get_outstanding_cqes(cq);
396 if (entries < outst_cqe + 1) { 395 if (entries < outst_cqe + 1) {
397 err = 0; 396 err = -EINVAL;
398 goto out; 397 goto out;
399 } 398 }
400 399
diff --git a/drivers/infiniband/hw/mlx4/mad.c b/drivers/infiniband/hw/mlx4/mad.c
index c7619716c31d..59040265e361 100644
--- a/drivers/infiniband/hw/mlx4/mad.c
+++ b/drivers/infiniband/hw/mlx4/mad.c
@@ -64,6 +64,14 @@ enum {
64#define GUID_TBL_BLK_NUM_ENTRIES 8 64#define GUID_TBL_BLK_NUM_ENTRIES 8
65#define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES) 65#define GUID_TBL_BLK_SIZE (GUID_TBL_ENTRY_SIZE * GUID_TBL_BLK_NUM_ENTRIES)
66 66
67/* Counters should be saturate once they reach their maximum value */
68#define ASSIGN_32BIT_COUNTER(counter, value) do {\
69 if ((value) > U32_MAX) \
70 counter = cpu_to_be32(U32_MAX); \
71 else \
72 counter = cpu_to_be32(value); \
73} while (0)
74
67struct mlx4_mad_rcv_buf { 75struct mlx4_mad_rcv_buf {
68 struct ib_grh grh; 76 struct ib_grh grh;
69 u8 payload[256]; 77 u8 payload[256];
@@ -806,10 +814,14 @@ static int ib_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
806static void edit_counter(struct mlx4_counter *cnt, 814static void edit_counter(struct mlx4_counter *cnt,
807 struct ib_pma_portcounters *pma_cnt) 815 struct ib_pma_portcounters *pma_cnt)
808{ 816{
809 pma_cnt->port_xmit_data = cpu_to_be32((be64_to_cpu(cnt->tx_bytes)>>2)); 817 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_data,
810 pma_cnt->port_rcv_data = cpu_to_be32((be64_to_cpu(cnt->rx_bytes)>>2)); 818 (be64_to_cpu(cnt->tx_bytes) >> 2));
811 pma_cnt->port_xmit_packets = cpu_to_be32(be64_to_cpu(cnt->tx_frames)); 819 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_data,
812 pma_cnt->port_rcv_packets = cpu_to_be32(be64_to_cpu(cnt->rx_frames)); 820 (be64_to_cpu(cnt->rx_bytes) >> 2));
821 ASSIGN_32BIT_COUNTER(pma_cnt->port_xmit_packets,
822 be64_to_cpu(cnt->tx_frames));
823 ASSIGN_32BIT_COUNTER(pma_cnt->port_rcv_packets,
824 be64_to_cpu(cnt->rx_frames));
813} 825}
814 826
815static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num, 827static int iboe_process_mad(struct ib_device *ibdev, int mad_flags, u8 port_num,
diff --git a/drivers/infiniband/hw/mlx4/main.c b/drivers/infiniband/hw/mlx4/main.c
index eb8e215f1613..b972c0b41799 100644
--- a/drivers/infiniband/hw/mlx4/main.c
+++ b/drivers/infiniband/hw/mlx4/main.c
@@ -1269,8 +1269,7 @@ static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1269 struct mlx4_dev *dev = mdev->dev; 1269 struct mlx4_dev *dev = mdev->dev;
1270 struct mlx4_ib_qp *mqp = to_mqp(ibqp); 1270 struct mlx4_ib_qp *mqp = to_mqp(ibqp);
1271 struct mlx4_ib_steering *ib_steering = NULL; 1271 struct mlx4_ib_steering *ib_steering = NULL;
1272 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ? 1272 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1273 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
1274 struct mlx4_flow_reg_id reg_id; 1273 struct mlx4_flow_reg_id reg_id;
1275 1274
1276 if (mdev->dev->caps.steering_mode == 1275 if (mdev->dev->caps.steering_mode ==
@@ -1284,8 +1283,10 @@ static int mlx4_ib_mcg_attach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1284 !!(mqp->flags & 1283 !!(mqp->flags &
1285 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK), 1284 MLX4_IB_QP_BLOCK_MULTICAST_LOOPBACK),
1286 prot, &reg_id.id); 1285 prot, &reg_id.id);
1287 if (err) 1286 if (err) {
1287 pr_err("multicast attach op failed, err %d\n", err);
1288 goto err_malloc; 1288 goto err_malloc;
1289 }
1289 1290
1290 reg_id.mirror = 0; 1291 reg_id.mirror = 0;
1291 if (mlx4_is_bonded(dev)) { 1292 if (mlx4_is_bonded(dev)) {
@@ -1348,9 +1349,7 @@ static int mlx4_ib_mcg_detach(struct ib_qp *ibqp, union ib_gid *gid, u16 lid)
1348 struct net_device *ndev; 1349 struct net_device *ndev;
1349 struct mlx4_ib_gid_entry *ge; 1350 struct mlx4_ib_gid_entry *ge;
1350 struct mlx4_flow_reg_id reg_id = {0, 0}; 1351 struct mlx4_flow_reg_id reg_id = {0, 0};
1351 1352 enum mlx4_protocol prot = MLX4_PROT_IB_IPV6;
1352 enum mlx4_protocol prot = (gid->raw[1] == 0x0e) ?
1353 MLX4_PROT_IB_IPV4 : MLX4_PROT_IB_IPV6;
1354 1353
1355 if (mdev->dev->caps.steering_mode == 1354 if (mdev->dev->caps.steering_mode ==
1356 MLX4_STEERING_MODE_DEVICE_MANAGED) { 1355 MLX4_STEERING_MODE_DEVICE_MANAGED) {
@@ -2698,8 +2697,12 @@ static void handle_bonded_port_state_event(struct work_struct *work)
2698 spin_lock_bh(&ibdev->iboe.lock); 2697 spin_lock_bh(&ibdev->iboe.lock);
2699 for (i = 0; i < MLX4_MAX_PORTS; ++i) { 2698 for (i = 0; i < MLX4_MAX_PORTS; ++i) {
2700 struct net_device *curr_netdev = ibdev->iboe.netdevs[i]; 2699 struct net_device *curr_netdev = ibdev->iboe.netdevs[i];
2700 enum ib_port_state curr_port_state;
2701
2702 if (!curr_netdev)
2703 continue;
2701 2704
2702 enum ib_port_state curr_port_state = 2705 curr_port_state =
2703 (netif_running(curr_netdev) && 2706 (netif_running(curr_netdev) &&
2704 netif_carrier_ok(curr_netdev)) ? 2707 netif_carrier_ok(curr_netdev)) ?
2705 IB_PORT_ACTIVE : IB_PORT_DOWN; 2708 IB_PORT_ACTIVE : IB_PORT_DOWN;
diff --git a/drivers/infiniband/hw/mlx4/qp.c b/drivers/infiniband/hw/mlx4/qp.c
index dfc6ca128a7e..ed2bd6701f9b 100644
--- a/drivers/infiniband/hw/mlx4/qp.c
+++ b/drivers/infiniband/hw/mlx4/qp.c
@@ -1696,8 +1696,10 @@ static int __mlx4_ib_modify_qp(struct ib_qp *ibqp,
1696 qp->mlx4_ib_qp_type == MLX4_IB_QPT_PROXY_GSI || 1696 qp->mlx4_ib_qp_type == MLX4_IB_QPT_PROXY_GSI ||
1697 qp->mlx4_ib_qp_type == MLX4_IB_QPT_TUN_GSI) { 1697 qp->mlx4_ib_qp_type == MLX4_IB_QPT_TUN_GSI) {
1698 err = handle_eth_ud_smac_index(dev, qp, (u8 *)attr->smac, context); 1698 err = handle_eth_ud_smac_index(dev, qp, (u8 *)attr->smac, context);
1699 if (err) 1699 if (err) {
1700 return -EINVAL; 1700 err = -EINVAL;
1701 goto out;
1702 }
1701 if (qp->mlx4_ib_qp_type == MLX4_IB_QPT_PROXY_GSI) 1703 if (qp->mlx4_ib_qp_type == MLX4_IB_QPT_PROXY_GSI)
1702 dev->qp1_proxy[qp->port - 1] = qp; 1704 dev->qp1_proxy[qp->port - 1] = qp;
1703 } 1705 }
diff --git a/drivers/infiniband/hw/mlx5/main.c b/drivers/infiniband/hw/mlx5/main.c
index 03bf81211a54..cc4ac1e583b2 100644
--- a/drivers/infiniband/hw/mlx5/main.c
+++ b/drivers/infiniband/hw/mlx5/main.c
@@ -997,7 +997,7 @@ static int get_port_caps(struct mlx5_ib_dev *dev)
997 struct ib_device_attr *dprops = NULL; 997 struct ib_device_attr *dprops = NULL;
998 struct ib_port_attr *pprops = NULL; 998 struct ib_port_attr *pprops = NULL;
999 struct mlx5_general_caps *gen; 999 struct mlx5_general_caps *gen;
1000 int err = 0; 1000 int err = -ENOMEM;
1001 int port; 1001 int port;
1002 1002
1003 gen = &dev->mdev->caps.gen; 1003 gen = &dev->mdev->caps.gen;
@@ -1331,6 +1331,8 @@ static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
1331 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) | 1331 (1ull << IB_USER_VERBS_CMD_DESTROY_SRQ) |
1332 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) | 1332 (1ull << IB_USER_VERBS_CMD_CREATE_XSRQ) |
1333 (1ull << IB_USER_VERBS_CMD_OPEN_QP); 1333 (1ull << IB_USER_VERBS_CMD_OPEN_QP);
1334 dev->ib_dev.uverbs_ex_cmd_mask =
1335 (1ull << IB_USER_VERBS_EX_CMD_QUERY_DEVICE);
1334 1336
1335 dev->ib_dev.query_device = mlx5_ib_query_device; 1337 dev->ib_dev.query_device = mlx5_ib_query_device;
1336 dev->ib_dev.query_port = mlx5_ib_query_port; 1338 dev->ib_dev.query_port = mlx5_ib_query_port;
diff --git a/drivers/infiniband/hw/mlx5/mr.c b/drivers/infiniband/hw/mlx5/mr.c
index 32a28bd50b20..cd9822eeacae 100644
--- a/drivers/infiniband/hw/mlx5/mr.c
+++ b/drivers/infiniband/hw/mlx5/mr.c
@@ -1012,6 +1012,7 @@ static struct mlx5_ib_mr *reg_create(struct ib_pd *pd, u64 virt_addr,
1012 goto err_2; 1012 goto err_2;
1013 } 1013 }
1014 mr->umem = umem; 1014 mr->umem = umem;
1015 mr->dev = dev;
1015 mr->live = 1; 1016 mr->live = 1;
1016 kvfree(in); 1017 kvfree(in);
1017 1018
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma.h b/drivers/infiniband/hw/ocrdma/ocrdma.h
index b43456ae124b..c9780d919769 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma.h
+++ b/drivers/infiniband/hw/ocrdma/ocrdma.h
@@ -40,7 +40,7 @@
40#include <be_roce.h> 40#include <be_roce.h>
41#include "ocrdma_sli.h" 41#include "ocrdma_sli.h"
42 42
43#define OCRDMA_ROCE_DRV_VERSION "10.2.287.0u" 43#define OCRDMA_ROCE_DRV_VERSION "10.4.205.0u"
44 44
45#define OCRDMA_ROCE_DRV_DESC "Emulex OneConnect RoCE Driver" 45#define OCRDMA_ROCE_DRV_DESC "Emulex OneConnect RoCE Driver"
46#define OCRDMA_NODE_DESC "Emulex OneConnect RoCE HCA" 46#define OCRDMA_NODE_DESC "Emulex OneConnect RoCE HCA"
@@ -55,12 +55,19 @@
55#define OCRDMA_UVERBS(CMD_NAME) (1ull << IB_USER_VERBS_CMD_##CMD_NAME) 55#define OCRDMA_UVERBS(CMD_NAME) (1ull << IB_USER_VERBS_CMD_##CMD_NAME)
56 56
57#define convert_to_64bit(lo, hi) ((u64)hi << 32 | (u64)lo) 57#define convert_to_64bit(lo, hi) ((u64)hi << 32 | (u64)lo)
58#define EQ_INTR_PER_SEC_THRSH_HI 150000
59#define EQ_INTR_PER_SEC_THRSH_LOW 100000
60#define EQ_AIC_MAX_EQD 20
61#define EQ_AIC_MIN_EQD 0
62
63void ocrdma_eqd_set_task(struct work_struct *work);
58 64
59struct ocrdma_dev_attr { 65struct ocrdma_dev_attr {
60 u8 fw_ver[32]; 66 u8 fw_ver[32];
61 u32 vendor_id; 67 u32 vendor_id;
62 u32 device_id; 68 u32 device_id;
63 u16 max_pd; 69 u16 max_pd;
70 u16 max_dpp_pds;
64 u16 max_cq; 71 u16 max_cq;
65 u16 max_cqe; 72 u16 max_cqe;
66 u16 max_qp; 73 u16 max_qp;
@@ -116,12 +123,19 @@ struct ocrdma_queue_info {
116 bool created; 123 bool created;
117}; 124};
118 125
126struct ocrdma_aic_obj { /* Adaptive interrupt coalescing (AIC) info */
127 u32 prev_eqd;
128 u64 eq_intr_cnt;
129 u64 prev_eq_intr_cnt;
130};
131
119struct ocrdma_eq { 132struct ocrdma_eq {
120 struct ocrdma_queue_info q; 133 struct ocrdma_queue_info q;
121 u32 vector; 134 u32 vector;
122 int cq_cnt; 135 int cq_cnt;
123 struct ocrdma_dev *dev; 136 struct ocrdma_dev *dev;
124 char irq_name[32]; 137 char irq_name[32];
138 struct ocrdma_aic_obj aic_obj;
125}; 139};
126 140
127struct ocrdma_mq { 141struct ocrdma_mq {
@@ -171,6 +185,21 @@ struct ocrdma_stats {
171 struct ocrdma_dev *dev; 185 struct ocrdma_dev *dev;
172}; 186};
173 187
188struct ocrdma_pd_resource_mgr {
189 u32 pd_norm_start;
190 u16 pd_norm_count;
191 u16 pd_norm_thrsh;
192 u16 max_normal_pd;
193 u32 pd_dpp_start;
194 u16 pd_dpp_count;
195 u16 pd_dpp_thrsh;
196 u16 max_dpp_pd;
197 u16 dpp_page_index;
198 unsigned long *pd_norm_bitmap;
199 unsigned long *pd_dpp_bitmap;
200 bool pd_prealloc_valid;
201};
202
174struct stats_mem { 203struct stats_mem {
175 struct ocrdma_mqe mqe; 204 struct ocrdma_mqe mqe;
176 void *va; 205 void *va;
@@ -198,6 +227,7 @@ struct ocrdma_dev {
198 227
199 struct ocrdma_eq *eq_tbl; 228 struct ocrdma_eq *eq_tbl;
200 int eq_cnt; 229 int eq_cnt;
230 struct delayed_work eqd_work;
201 u16 base_eqid; 231 u16 base_eqid;
202 u16 max_eq; 232 u16 max_eq;
203 233
@@ -255,7 +285,12 @@ struct ocrdma_dev {
255 struct ocrdma_stats rx_qp_err_stats; 285 struct ocrdma_stats rx_qp_err_stats;
256 struct ocrdma_stats tx_dbg_stats; 286 struct ocrdma_stats tx_dbg_stats;
257 struct ocrdma_stats rx_dbg_stats; 287 struct ocrdma_stats rx_dbg_stats;
288 struct ocrdma_stats driver_stats;
289 struct ocrdma_stats reset_stats;
258 struct dentry *dir; 290 struct dentry *dir;
291 atomic_t async_err_stats[OCRDMA_MAX_ASYNC_ERRORS];
292 atomic_t cqe_err_stats[OCRDMA_MAX_CQE_ERR];
293 struct ocrdma_pd_resource_mgr *pd_mgr;
259}; 294};
260 295
261struct ocrdma_cq { 296struct ocrdma_cq {
@@ -335,7 +370,6 @@ struct ocrdma_srq {
335 370
336struct ocrdma_qp { 371struct ocrdma_qp {
337 struct ib_qp ibqp; 372 struct ib_qp ibqp;
338 struct ocrdma_dev *dev;
339 373
340 u8 __iomem *sq_db; 374 u8 __iomem *sq_db;
341 struct ocrdma_qp_hwq_info sq; 375 struct ocrdma_qp_hwq_info sq;
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_ah.c b/drivers/infiniband/hw/ocrdma/ocrdma_ah.c
index f3cc8c9e65ae..d812904f3984 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_ah.c
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_ah.c
@@ -29,19 +29,22 @@
29#include <net/netevent.h> 29#include <net/netevent.h>
30 30
31#include <rdma/ib_addr.h> 31#include <rdma/ib_addr.h>
32#include <rdma/ib_mad.h>
32 33
33#include "ocrdma.h" 34#include "ocrdma.h"
34#include "ocrdma_verbs.h" 35#include "ocrdma_verbs.h"
35#include "ocrdma_ah.h" 36#include "ocrdma_ah.h"
36#include "ocrdma_hw.h" 37#include "ocrdma_hw.h"
38#include "ocrdma_stats.h"
37 39
38#define OCRDMA_VID_PCP_SHIFT 0xD 40#define OCRDMA_VID_PCP_SHIFT 0xD
39 41
40static inline int set_av_attr(struct ocrdma_dev *dev, struct ocrdma_ah *ah, 42static inline int set_av_attr(struct ocrdma_dev *dev, struct ocrdma_ah *ah,
41 struct ib_ah_attr *attr, union ib_gid *sgid, int pdid) 43 struct ib_ah_attr *attr, union ib_gid *sgid,
44 int pdid, bool *isvlan)
42{ 45{
43 int status = 0; 46 int status = 0;
44 u16 vlan_tag; bool vlan_enabled = false; 47 u16 vlan_tag;
45 struct ocrdma_eth_vlan eth; 48 struct ocrdma_eth_vlan eth;
46 struct ocrdma_grh grh; 49 struct ocrdma_grh grh;
47 int eth_sz; 50 int eth_sz;
@@ -59,7 +62,7 @@ static inline int set_av_attr(struct ocrdma_dev *dev, struct ocrdma_ah *ah,
59 vlan_tag |= (dev->sl & 0x07) << OCRDMA_VID_PCP_SHIFT; 62 vlan_tag |= (dev->sl & 0x07) << OCRDMA_VID_PCP_SHIFT;
60 eth.vlan_tag = cpu_to_be16(vlan_tag); 63 eth.vlan_tag = cpu_to_be16(vlan_tag);
61 eth_sz = sizeof(struct ocrdma_eth_vlan); 64 eth_sz = sizeof(struct ocrdma_eth_vlan);
62 vlan_enabled = true; 65 *isvlan = true;
63 } else { 66 } else {
64 eth.eth_type = cpu_to_be16(OCRDMA_ROCE_ETH_TYPE); 67 eth.eth_type = cpu_to_be16(OCRDMA_ROCE_ETH_TYPE);
65 eth_sz = sizeof(struct ocrdma_eth_basic); 68 eth_sz = sizeof(struct ocrdma_eth_basic);
@@ -82,7 +85,7 @@ static inline int set_av_attr(struct ocrdma_dev *dev, struct ocrdma_ah *ah,
82 /* Eth HDR */ 85 /* Eth HDR */
83 memcpy(&ah->av->eth_hdr, &eth, eth_sz); 86 memcpy(&ah->av->eth_hdr, &eth, eth_sz);
84 memcpy((u8 *)ah->av + eth_sz, &grh, sizeof(struct ocrdma_grh)); 87 memcpy((u8 *)ah->av + eth_sz, &grh, sizeof(struct ocrdma_grh));
85 if (vlan_enabled) 88 if (*isvlan)
86 ah->av->valid |= OCRDMA_AV_VLAN_VALID; 89 ah->av->valid |= OCRDMA_AV_VLAN_VALID;
87 ah->av->valid = cpu_to_le32(ah->av->valid); 90 ah->av->valid = cpu_to_le32(ah->av->valid);
88 return status; 91 return status;
@@ -91,6 +94,7 @@ static inline int set_av_attr(struct ocrdma_dev *dev, struct ocrdma_ah *ah,
91struct ib_ah *ocrdma_create_ah(struct ib_pd *ibpd, struct ib_ah_attr *attr) 94struct ib_ah *ocrdma_create_ah(struct ib_pd *ibpd, struct ib_ah_attr *attr)
92{ 95{
93 u32 *ahid_addr; 96 u32 *ahid_addr;
97 bool isvlan = false;
94 int status; 98 int status;
95 struct ocrdma_ah *ah; 99 struct ocrdma_ah *ah;
96 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd); 100 struct ocrdma_pd *pd = get_ocrdma_pd(ibpd);
@@ -127,15 +131,20 @@ struct ib_ah *ocrdma_create_ah(struct ib_pd *ibpd, struct ib_ah_attr *attr)
127 } 131 }
128 } 132 }
129 133
130 status = set_av_attr(dev, ah, attr, &sgid, pd->id); 134 status = set_av_attr(dev, ah, attr, &sgid, pd->id, &isvlan);
131 if (status) 135 if (status)
132 goto av_conf_err; 136 goto av_conf_err;
133 137
134 /* if pd is for the user process, pass the ah_id to user space */ 138 /* if pd is for the user process, pass the ah_id to user space */
135 if ((pd->uctx) && (pd->uctx->ah_tbl.va)) { 139 if ((pd->uctx) && (pd->uctx->ah_tbl.va)) {
136 ahid_addr = pd->uctx->ah_tbl.va + attr->dlid; 140 ahid_addr = pd->uctx->ah_tbl.va + attr->dlid;
137 *ahid_addr = ah->id; 141 *ahid_addr = 0;
142 *ahid_addr |= ah->id & OCRDMA_AH_ID_MASK;
143 if (isvlan)
144 *ahid_addr |= (OCRDMA_AH_VLAN_VALID_MASK <<
145 OCRDMA_AH_VLAN_VALID_SHIFT);
138 } 146 }
147
139 return &ah->ibah; 148 return &ah->ibah;
140 149
141av_conf_err: 150av_conf_err:
@@ -191,5 +200,20 @@ int ocrdma_process_mad(struct ib_device *ibdev,
191 struct ib_grh *in_grh, 200 struct ib_grh *in_grh,
192 struct ib_mad *in_mad, struct ib_mad *out_mad) 201 struct ib_mad *in_mad, struct ib_mad *out_mad)
193{ 202{
194 return IB_MAD_RESULT_SUCCESS; 203 int status;
204 struct ocrdma_dev *dev;
205
206 switch (in_mad->mad_hdr.mgmt_class) {
207 case IB_MGMT_CLASS_PERF_MGMT:
208 dev = get_ocrdma_dev(ibdev);
209 if (!ocrdma_pma_counters(dev, out_mad))
210 status = IB_MAD_RESULT_SUCCESS | IB_MAD_RESULT_REPLY;
211 else
212 status = IB_MAD_RESULT_SUCCESS;
213 break;
214 default:
215 status = IB_MAD_RESULT_SUCCESS;
216 break;
217 }
218 return status;
195} 219}
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_ah.h b/drivers/infiniband/hw/ocrdma/ocrdma_ah.h
index 8ac49e7f96d1..726a87cf22dc 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_ah.h
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_ah.h
@@ -28,6 +28,12 @@
28#ifndef __OCRDMA_AH_H__ 28#ifndef __OCRDMA_AH_H__
29#define __OCRDMA_AH_H__ 29#define __OCRDMA_AH_H__
30 30
31enum {
32 OCRDMA_AH_ID_MASK = 0x3FF,
33 OCRDMA_AH_VLAN_VALID_MASK = 0x01,
34 OCRDMA_AH_VLAN_VALID_SHIFT = 0x1F
35};
36
31struct ib_ah *ocrdma_create_ah(struct ib_pd *, struct ib_ah_attr *); 37struct ib_ah *ocrdma_create_ah(struct ib_pd *, struct ib_ah_attr *);
32int ocrdma_destroy_ah(struct ib_ah *); 38int ocrdma_destroy_ah(struct ib_ah *);
33int ocrdma_query_ah(struct ib_ah *, struct ib_ah_attr *); 39int ocrdma_query_ah(struct ib_ah *, struct ib_ah_attr *);
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_hw.c b/drivers/infiniband/hw/ocrdma/ocrdma_hw.c
index 638bff1ffc6c..0c9e95909a64 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_hw.c
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_hw.c
@@ -734,6 +734,9 @@ static void ocrdma_dispatch_ibevent(struct ocrdma_dev *dev,
734 break; 734 break;
735 } 735 }
736 736
737 if (type < OCRDMA_MAX_ASYNC_ERRORS)
738 atomic_inc(&dev->async_err_stats[type]);
739
737 if (qp_event) { 740 if (qp_event) {
738 if (qp->ibqp.event_handler) 741 if (qp->ibqp.event_handler)
739 qp->ibqp.event_handler(&ib_evt, qp->ibqp.qp_context); 742 qp->ibqp.event_handler(&ib_evt, qp->ibqp.qp_context);
@@ -831,20 +834,20 @@ static int ocrdma_mq_cq_handler(struct ocrdma_dev *dev, u16 cq_id)
831 return 0; 834 return 0;
832} 835}
833 836
834static void ocrdma_qp_buddy_cq_handler(struct ocrdma_dev *dev, 837static struct ocrdma_cq *_ocrdma_qp_buddy_cq_handler(struct ocrdma_dev *dev,
835 struct ocrdma_cq *cq) 838 struct ocrdma_cq *cq, bool sq)
836{ 839{
837 unsigned long flags;
838 struct ocrdma_qp *qp; 840 struct ocrdma_qp *qp;
839 bool buddy_cq_found = false; 841 struct list_head *cur;
840 /* Go through list of QPs in error state which are using this CQ 842 struct ocrdma_cq *bcq = NULL;
841 * and invoke its callback handler to trigger CQE processing for 843 struct list_head *head = sq?(&cq->sq_head):(&cq->rq_head);
842 * error/flushed CQE. It is rare to find more than few entries in 844
843 * this list as most consumers stops after getting error CQE. 845 list_for_each(cur, head) {
844 * List is traversed only once when a matching buddy cq found for a QP. 846 if (sq)
845 */ 847 qp = list_entry(cur, struct ocrdma_qp, sq_entry);
846 spin_lock_irqsave(&dev->flush_q_lock, flags); 848 else
847 list_for_each_entry(qp, &cq->sq_head, sq_entry) { 849 qp = list_entry(cur, struct ocrdma_qp, rq_entry);
850
848 if (qp->srq) 851 if (qp->srq)
849 continue; 852 continue;
850 /* if wq and rq share the same cq, than comp_handler 853 /* if wq and rq share the same cq, than comp_handler
@@ -856,19 +859,41 @@ static void ocrdma_qp_buddy_cq_handler(struct ocrdma_dev *dev,
856 * if completion came on rq, sq's cq is buddy cq. 859 * if completion came on rq, sq's cq is buddy cq.
857 */ 860 */
858 if (qp->sq_cq == cq) 861 if (qp->sq_cq == cq)
859 cq = qp->rq_cq; 862 bcq = qp->rq_cq;
860 else 863 else
861 cq = qp->sq_cq; 864 bcq = qp->sq_cq;
862 buddy_cq_found = true; 865 return bcq;
863 break;
864 } 866 }
867 return NULL;
868}
869
870static void ocrdma_qp_buddy_cq_handler(struct ocrdma_dev *dev,
871 struct ocrdma_cq *cq)
872{
873 unsigned long flags;
874 struct ocrdma_cq *bcq = NULL;
875
876 /* Go through list of QPs in error state which are using this CQ
877 * and invoke its callback handler to trigger CQE processing for
878 * error/flushed CQE. It is rare to find more than few entries in
879 * this list as most consumers stops after getting error CQE.
880 * List is traversed only once when a matching buddy cq found for a QP.
881 */
882 spin_lock_irqsave(&dev->flush_q_lock, flags);
883 /* Check if buddy CQ is present.
884 * true - Check for SQ CQ
885 * false - Check for RQ CQ
886 */
887 bcq = _ocrdma_qp_buddy_cq_handler(dev, cq, true);
888 if (bcq == NULL)
889 bcq = _ocrdma_qp_buddy_cq_handler(dev, cq, false);
865 spin_unlock_irqrestore(&dev->flush_q_lock, flags); 890 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
866 if (buddy_cq_found == false) 891
867 return; 892 /* if there is valid buddy cq, look for its completion handler */
868 if (cq->ibcq.comp_handler) { 893 if (bcq && bcq->ibcq.comp_handler) {
869 spin_lock_irqsave(&cq->comp_handler_lock, flags); 894 spin_lock_irqsave(&bcq->comp_handler_lock, flags);
870 (*cq->ibcq.comp_handler) (&cq->ibcq, cq->ibcq.cq_context); 895 (*bcq->ibcq.comp_handler) (&bcq->ibcq, bcq->ibcq.cq_context);
871 spin_unlock_irqrestore(&cq->comp_handler_lock, flags); 896 spin_unlock_irqrestore(&bcq->comp_handler_lock, flags);
872 } 897 }
873} 898}
874 899
@@ -935,6 +960,7 @@ static irqreturn_t ocrdma_irq_handler(int irq, void *handle)
935 960
936 } while (budget); 961 } while (budget);
937 962
963 eq->aic_obj.eq_intr_cnt++;
938 ocrdma_ring_eq_db(dev, eq->q.id, true, true, 0); 964 ocrdma_ring_eq_db(dev, eq->q.id, true, true, 0);
939 return IRQ_HANDLED; 965 return IRQ_HANDLED;
940} 966}
@@ -1050,6 +1076,9 @@ static void ocrdma_get_attr(struct ocrdma_dev *dev,
1050 attr->max_pd = 1076 attr->max_pd =
1051 (rsp->max_pd_ca_ack_delay & OCRDMA_MBX_QUERY_CFG_MAX_PD_MASK) >> 1077 (rsp->max_pd_ca_ack_delay & OCRDMA_MBX_QUERY_CFG_MAX_PD_MASK) >>
1052 OCRDMA_MBX_QUERY_CFG_MAX_PD_SHIFT; 1078 OCRDMA_MBX_QUERY_CFG_MAX_PD_SHIFT;
1079 attr->max_dpp_pds =
1080 (rsp->max_dpp_pds_credits & OCRDMA_MBX_QUERY_CFG_MAX_DPP_PDS_MASK) >>
1081 OCRDMA_MBX_QUERY_CFG_MAX_DPP_PDS_OFFSET;
1053 attr->max_qp = 1082 attr->max_qp =
1054 (rsp->qp_srq_cq_ird_ord & OCRDMA_MBX_QUERY_CFG_MAX_QP_MASK) >> 1083 (rsp->qp_srq_cq_ird_ord & OCRDMA_MBX_QUERY_CFG_MAX_QP_MASK) >>
1055 OCRDMA_MBX_QUERY_CFG_MAX_QP_SHIFT; 1084 OCRDMA_MBX_QUERY_CFG_MAX_QP_SHIFT;
@@ -1396,6 +1425,122 @@ int ocrdma_mbx_dealloc_pd(struct ocrdma_dev *dev, struct ocrdma_pd *pd)
1396 return status; 1425 return status;
1397} 1426}
1398 1427
1428
1429static int ocrdma_mbx_alloc_pd_range(struct ocrdma_dev *dev)
1430{
1431 int status = -ENOMEM;
1432 size_t pd_bitmap_size;
1433 struct ocrdma_alloc_pd_range *cmd;
1434 struct ocrdma_alloc_pd_range_rsp *rsp;
1435
1436 /* Pre allocate the DPP PDs */
1437 cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_ALLOC_PD_RANGE, sizeof(*cmd));
1438 if (!cmd)
1439 return -ENOMEM;
1440 cmd->pd_count = dev->attr.max_dpp_pds;
1441 cmd->enable_dpp_rsvd |= OCRDMA_ALLOC_PD_ENABLE_DPP;
1442 status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);
1443 if (status)
1444 goto mbx_err;
1445 rsp = (struct ocrdma_alloc_pd_range_rsp *)cmd;
1446
1447 if ((rsp->dpp_page_pdid & OCRDMA_ALLOC_PD_RSP_DPP) && rsp->pd_count) {
1448 dev->pd_mgr->dpp_page_index = rsp->dpp_page_pdid >>
1449 OCRDMA_ALLOC_PD_RSP_DPP_PAGE_SHIFT;
1450 dev->pd_mgr->pd_dpp_start = rsp->dpp_page_pdid &
1451 OCRDMA_ALLOC_PD_RNG_RSP_START_PDID_MASK;
1452 dev->pd_mgr->max_dpp_pd = rsp->pd_count;
1453 pd_bitmap_size = BITS_TO_LONGS(rsp->pd_count) * sizeof(long);
1454 dev->pd_mgr->pd_dpp_bitmap = kzalloc(pd_bitmap_size,
1455 GFP_KERNEL);
1456 }
1457 kfree(cmd);
1458
1459 cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_ALLOC_PD_RANGE, sizeof(*cmd));
1460 if (!cmd)
1461 return -ENOMEM;
1462
1463 cmd->pd_count = dev->attr.max_pd - dev->attr.max_dpp_pds;
1464 status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);
1465 if (status)
1466 goto mbx_err;
1467 rsp = (struct ocrdma_alloc_pd_range_rsp *)cmd;
1468 if (rsp->pd_count) {
1469 dev->pd_mgr->pd_norm_start = rsp->dpp_page_pdid &
1470 OCRDMA_ALLOC_PD_RNG_RSP_START_PDID_MASK;
1471 dev->pd_mgr->max_normal_pd = rsp->pd_count;
1472 pd_bitmap_size = BITS_TO_LONGS(rsp->pd_count) * sizeof(long);
1473 dev->pd_mgr->pd_norm_bitmap = kzalloc(pd_bitmap_size,
1474 GFP_KERNEL);
1475 }
1476
1477 if (dev->pd_mgr->pd_norm_bitmap || dev->pd_mgr->pd_dpp_bitmap) {
1478 /* Enable PD resource manager */
1479 dev->pd_mgr->pd_prealloc_valid = true;
1480 } else {
1481 return -ENOMEM;
1482 }
1483mbx_err:
1484 kfree(cmd);
1485 return status;
1486}
1487
1488static void ocrdma_mbx_dealloc_pd_range(struct ocrdma_dev *dev)
1489{
1490 struct ocrdma_dealloc_pd_range *cmd;
1491
1492 /* return normal PDs to firmware */
1493 cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_DEALLOC_PD_RANGE, sizeof(*cmd));
1494 if (!cmd)
1495 goto mbx_err;
1496
1497 if (dev->pd_mgr->max_normal_pd) {
1498 cmd->start_pd_id = dev->pd_mgr->pd_norm_start;
1499 cmd->pd_count = dev->pd_mgr->max_normal_pd;
1500 ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);
1501 }
1502
1503 if (dev->pd_mgr->max_dpp_pd) {
1504 kfree(cmd);
1505 /* return DPP PDs to firmware */
1506 cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_DEALLOC_PD_RANGE,
1507 sizeof(*cmd));
1508 if (!cmd)
1509 goto mbx_err;
1510
1511 cmd->start_pd_id = dev->pd_mgr->pd_dpp_start;
1512 cmd->pd_count = dev->pd_mgr->max_dpp_pd;
1513 ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);
1514 }
1515mbx_err:
1516 kfree(cmd);
1517}
1518
1519void ocrdma_alloc_pd_pool(struct ocrdma_dev *dev)
1520{
1521 int status;
1522
1523 dev->pd_mgr = kzalloc(sizeof(struct ocrdma_pd_resource_mgr),
1524 GFP_KERNEL);
1525 if (!dev->pd_mgr) {
1526 pr_err("%s(%d)Memory allocation failure.\n", __func__, dev->id);
1527 return;
1528 }
1529 status = ocrdma_mbx_alloc_pd_range(dev);
1530 if (status) {
1531 pr_err("%s(%d) Unable to initialize PD pool, using default.\n",
1532 __func__, dev->id);
1533 }
1534}
1535
1536static void ocrdma_free_pd_pool(struct ocrdma_dev *dev)
1537{
1538 ocrdma_mbx_dealloc_pd_range(dev);
1539 kfree(dev->pd_mgr->pd_norm_bitmap);
1540 kfree(dev->pd_mgr->pd_dpp_bitmap);
1541 kfree(dev->pd_mgr);
1542}
1543
1399static int ocrdma_build_q_conf(u32 *num_entries, int entry_size, 1544static int ocrdma_build_q_conf(u32 *num_entries, int entry_size,
1400 int *num_pages, int *page_size) 1545 int *num_pages, int *page_size)
1401{ 1546{
@@ -1896,8 +2041,9 @@ void ocrdma_flush_qp(struct ocrdma_qp *qp)
1896{ 2041{
1897 bool found; 2042 bool found;
1898 unsigned long flags; 2043 unsigned long flags;
2044 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
1899 2045
1900 spin_lock_irqsave(&qp->dev->flush_q_lock, flags); 2046 spin_lock_irqsave(&dev->flush_q_lock, flags);
1901 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp); 2047 found = ocrdma_is_qp_in_sq_flushlist(qp->sq_cq, qp);
1902 if (!found) 2048 if (!found)
1903 list_add_tail(&qp->sq_entry, &qp->sq_cq->sq_head); 2049 list_add_tail(&qp->sq_entry, &qp->sq_cq->sq_head);
@@ -1906,7 +2052,7 @@ void ocrdma_flush_qp(struct ocrdma_qp *qp)
1906 if (!found) 2052 if (!found)
1907 list_add_tail(&qp->rq_entry, &qp->rq_cq->rq_head); 2053 list_add_tail(&qp->rq_entry, &qp->rq_cq->rq_head);
1908 } 2054 }
1909 spin_unlock_irqrestore(&qp->dev->flush_q_lock, flags); 2055 spin_unlock_irqrestore(&dev->flush_q_lock, flags);
1910} 2056}
1911 2057
1912static void ocrdma_init_hwq_ptr(struct ocrdma_qp *qp) 2058static void ocrdma_init_hwq_ptr(struct ocrdma_qp *qp)
@@ -1972,7 +2118,8 @@ static int ocrdma_set_create_qp_sq_cmd(struct ocrdma_create_qp_req *cmd,
1972 int status; 2118 int status;
1973 u32 len, hw_pages, hw_page_size; 2119 u32 len, hw_pages, hw_page_size;
1974 dma_addr_t pa; 2120 dma_addr_t pa;
1975 struct ocrdma_dev *dev = qp->dev; 2121 struct ocrdma_pd *pd = qp->pd;
2122 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
1976 struct pci_dev *pdev = dev->nic_info.pdev; 2123 struct pci_dev *pdev = dev->nic_info.pdev;
1977 u32 max_wqe_allocated; 2124 u32 max_wqe_allocated;
1978 u32 max_sges = attrs->cap.max_send_sge; 2125 u32 max_sges = attrs->cap.max_send_sge;
@@ -2027,7 +2174,8 @@ static int ocrdma_set_create_qp_rq_cmd(struct ocrdma_create_qp_req *cmd,
2027 int status; 2174 int status;
2028 u32 len, hw_pages, hw_page_size; 2175 u32 len, hw_pages, hw_page_size;
2029 dma_addr_t pa = 0; 2176 dma_addr_t pa = 0;
2030 struct ocrdma_dev *dev = qp->dev; 2177 struct ocrdma_pd *pd = qp->pd;
2178 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
2031 struct pci_dev *pdev = dev->nic_info.pdev; 2179 struct pci_dev *pdev = dev->nic_info.pdev;
2032 u32 max_rqe_allocated = attrs->cap.max_recv_wr + 1; 2180 u32 max_rqe_allocated = attrs->cap.max_recv_wr + 1;
2033 2181
@@ -2086,7 +2234,8 @@ static void ocrdma_set_create_qp_dpp_cmd(struct ocrdma_create_qp_req *cmd,
2086static int ocrdma_set_create_qp_ird_cmd(struct ocrdma_create_qp_req *cmd, 2234static int ocrdma_set_create_qp_ird_cmd(struct ocrdma_create_qp_req *cmd,
2087 struct ocrdma_qp *qp) 2235 struct ocrdma_qp *qp)
2088{ 2236{
2089 struct ocrdma_dev *dev = qp->dev; 2237 struct ocrdma_pd *pd = qp->pd;
2238 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
2090 struct pci_dev *pdev = dev->nic_info.pdev; 2239 struct pci_dev *pdev = dev->nic_info.pdev;
2091 dma_addr_t pa = 0; 2240 dma_addr_t pa = 0;
2092 int ird_page_size = dev->attr.ird_page_size; 2241 int ird_page_size = dev->attr.ird_page_size;
@@ -2157,8 +2306,8 @@ int ocrdma_mbx_create_qp(struct ocrdma_qp *qp, struct ib_qp_init_attr *attrs,
2157{ 2306{
2158 int status = -ENOMEM; 2307 int status = -ENOMEM;
2159 u32 flags = 0; 2308 u32 flags = 0;
2160 struct ocrdma_dev *dev = qp->dev;
2161 struct ocrdma_pd *pd = qp->pd; 2309 struct ocrdma_pd *pd = qp->pd;
2310 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
2162 struct pci_dev *pdev = dev->nic_info.pdev; 2311 struct pci_dev *pdev = dev->nic_info.pdev;
2163 struct ocrdma_cq *cq; 2312 struct ocrdma_cq *cq;
2164 struct ocrdma_create_qp_req *cmd; 2313 struct ocrdma_create_qp_req *cmd;
@@ -2281,11 +2430,12 @@ static int ocrdma_set_av_params(struct ocrdma_qp *qp,
2281 union ib_gid sgid, zgid; 2430 union ib_gid sgid, zgid;
2282 u32 vlan_id; 2431 u32 vlan_id;
2283 u8 mac_addr[6]; 2432 u8 mac_addr[6];
2433 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2284 2434
2285 if ((ah_attr->ah_flags & IB_AH_GRH) == 0) 2435 if ((ah_attr->ah_flags & IB_AH_GRH) == 0)
2286 return -EINVAL; 2436 return -EINVAL;
2287 if (atomic_cmpxchg(&qp->dev->update_sl, 1, 0)) 2437 if (atomic_cmpxchg(&dev->update_sl, 1, 0))
2288 ocrdma_init_service_level(qp->dev); 2438 ocrdma_init_service_level(dev);
2289 cmd->params.tclass_sq_psn |= 2439 cmd->params.tclass_sq_psn |=
2290 (ah_attr->grh.traffic_class << OCRDMA_QP_PARAMS_TCLASS_SHIFT); 2440 (ah_attr->grh.traffic_class << OCRDMA_QP_PARAMS_TCLASS_SHIFT);
2291 cmd->params.rnt_rc_sl_fl |= 2441 cmd->params.rnt_rc_sl_fl |=
@@ -2296,7 +2446,7 @@ static int ocrdma_set_av_params(struct ocrdma_qp *qp,
2296 cmd->flags |= OCRDMA_QP_PARA_FLOW_LBL_VALID; 2446 cmd->flags |= OCRDMA_QP_PARA_FLOW_LBL_VALID;
2297 memcpy(&cmd->params.dgid[0], &ah_attr->grh.dgid.raw[0], 2447 memcpy(&cmd->params.dgid[0], &ah_attr->grh.dgid.raw[0],
2298 sizeof(cmd->params.dgid)); 2448 sizeof(cmd->params.dgid));
2299 status = ocrdma_query_gid(&qp->dev->ibdev, 1, 2449 status = ocrdma_query_gid(&dev->ibdev, 1,
2300 ah_attr->grh.sgid_index, &sgid); 2450 ah_attr->grh.sgid_index, &sgid);
2301 if (status) 2451 if (status)
2302 return status; 2452 return status;
@@ -2307,7 +2457,9 @@ static int ocrdma_set_av_params(struct ocrdma_qp *qp,
2307 2457
2308 qp->sgid_idx = ah_attr->grh.sgid_index; 2458 qp->sgid_idx = ah_attr->grh.sgid_index;
2309 memcpy(&cmd->params.sgid[0], &sgid.raw[0], sizeof(cmd->params.sgid)); 2459 memcpy(&cmd->params.sgid[0], &sgid.raw[0], sizeof(cmd->params.sgid));
2310 ocrdma_resolve_dmac(qp->dev, ah_attr, &mac_addr[0]); 2460 status = ocrdma_resolve_dmac(dev, ah_attr, &mac_addr[0]);
2461 if (status)
2462 return status;
2311 cmd->params.dmac_b0_to_b3 = mac_addr[0] | (mac_addr[1] << 8) | 2463 cmd->params.dmac_b0_to_b3 = mac_addr[0] | (mac_addr[1] << 8) |
2312 (mac_addr[2] << 16) | (mac_addr[3] << 24); 2464 (mac_addr[2] << 16) | (mac_addr[3] << 24);
2313 /* convert them to LE format. */ 2465 /* convert them to LE format. */
@@ -2320,7 +2472,7 @@ static int ocrdma_set_av_params(struct ocrdma_qp *qp,
2320 vlan_id << OCRDMA_QP_PARAMS_VLAN_SHIFT; 2472 vlan_id << OCRDMA_QP_PARAMS_VLAN_SHIFT;
2321 cmd->flags |= OCRDMA_QP_PARA_VLAN_EN_VALID; 2473 cmd->flags |= OCRDMA_QP_PARA_VLAN_EN_VALID;
2322 cmd->params.rnt_rc_sl_fl |= 2474 cmd->params.rnt_rc_sl_fl |=
2323 (qp->dev->sl & 0x07) << OCRDMA_QP_PARAMS_SL_SHIFT; 2475 (dev->sl & 0x07) << OCRDMA_QP_PARAMS_SL_SHIFT;
2324 } 2476 }
2325 return 0; 2477 return 0;
2326} 2478}
@@ -2330,6 +2482,7 @@ static int ocrdma_set_qp_params(struct ocrdma_qp *qp,
2330 struct ib_qp_attr *attrs, int attr_mask) 2482 struct ib_qp_attr *attrs, int attr_mask)
2331{ 2483{
2332 int status = 0; 2484 int status = 0;
2485 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2333 2486
2334 if (attr_mask & IB_QP_PKEY_INDEX) { 2487 if (attr_mask & IB_QP_PKEY_INDEX) {
2335 cmd->params.path_mtu_pkey_indx |= (attrs->pkey_index & 2488 cmd->params.path_mtu_pkey_indx |= (attrs->pkey_index &
@@ -2347,12 +2500,12 @@ static int ocrdma_set_qp_params(struct ocrdma_qp *qp,
2347 return status; 2500 return status;
2348 } else if (qp->qp_type == IB_QPT_GSI || qp->qp_type == IB_QPT_UD) { 2501 } else if (qp->qp_type == IB_QPT_GSI || qp->qp_type == IB_QPT_UD) {
2349 /* set the default mac address for UD, GSI QPs */ 2502 /* set the default mac address for UD, GSI QPs */
2350 cmd->params.dmac_b0_to_b3 = qp->dev->nic_info.mac_addr[0] | 2503 cmd->params.dmac_b0_to_b3 = dev->nic_info.mac_addr[0] |
2351 (qp->dev->nic_info.mac_addr[1] << 8) | 2504 (dev->nic_info.mac_addr[1] << 8) |
2352 (qp->dev->nic_info.mac_addr[2] << 16) | 2505 (dev->nic_info.mac_addr[2] << 16) |
2353 (qp->dev->nic_info.mac_addr[3] << 24); 2506 (dev->nic_info.mac_addr[3] << 24);
2354 cmd->params.vlan_dmac_b4_to_b5 = qp->dev->nic_info.mac_addr[4] | 2507 cmd->params.vlan_dmac_b4_to_b5 = dev->nic_info.mac_addr[4] |
2355 (qp->dev->nic_info.mac_addr[5] << 8); 2508 (dev->nic_info.mac_addr[5] << 8);
2356 } 2509 }
2357 if ((attr_mask & IB_QP_EN_SQD_ASYNC_NOTIFY) && 2510 if ((attr_mask & IB_QP_EN_SQD_ASYNC_NOTIFY) &&
2358 attrs->en_sqd_async_notify) { 2511 attrs->en_sqd_async_notify) {
@@ -2409,7 +2562,7 @@ static int ocrdma_set_qp_params(struct ocrdma_qp *qp,
2409 cmd->flags |= OCRDMA_QP_PARA_RQPSN_VALID; 2562 cmd->flags |= OCRDMA_QP_PARA_RQPSN_VALID;
2410 } 2563 }
2411 if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) { 2564 if (attr_mask & IB_QP_MAX_QP_RD_ATOMIC) {
2412 if (attrs->max_rd_atomic > qp->dev->attr.max_ord_per_qp) { 2565 if (attrs->max_rd_atomic > dev->attr.max_ord_per_qp) {
2413 status = -EINVAL; 2566 status = -EINVAL;
2414 goto pmtu_err; 2567 goto pmtu_err;
2415 } 2568 }
@@ -2417,7 +2570,7 @@ static int ocrdma_set_qp_params(struct ocrdma_qp *qp,
2417 cmd->flags |= OCRDMA_QP_PARA_MAX_ORD_VALID; 2570 cmd->flags |= OCRDMA_QP_PARA_MAX_ORD_VALID;
2418 } 2571 }
2419 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) { 2572 if (attr_mask & IB_QP_MAX_DEST_RD_ATOMIC) {
2420 if (attrs->max_dest_rd_atomic > qp->dev->attr.max_ird_per_qp) { 2573 if (attrs->max_dest_rd_atomic > dev->attr.max_ird_per_qp) {
2421 status = -EINVAL; 2574 status = -EINVAL;
2422 goto pmtu_err; 2575 goto pmtu_err;
2423 } 2576 }
@@ -2870,6 +3023,82 @@ done:
2870 return status; 3023 return status;
2871} 3024}
2872 3025
3026static int ocrdma_mbx_modify_eqd(struct ocrdma_dev *dev, struct ocrdma_eq *eq,
3027 int num)
3028{
3029 int i, status = -ENOMEM;
3030 struct ocrdma_modify_eqd_req *cmd;
3031
3032 cmd = ocrdma_init_emb_mqe(OCRDMA_CMD_MODIFY_EQ_DELAY, sizeof(*cmd));
3033 if (!cmd)
3034 return status;
3035
3036 ocrdma_init_mch(&cmd->cmd.req, OCRDMA_CMD_MODIFY_EQ_DELAY,
3037 OCRDMA_SUBSYS_COMMON, sizeof(*cmd));
3038
3039 cmd->cmd.num_eq = num;
3040 for (i = 0; i < num; i++) {
3041 cmd->cmd.set_eqd[i].eq_id = eq[i].q.id;
3042 cmd->cmd.set_eqd[i].phase = 0;
3043 cmd->cmd.set_eqd[i].delay_multiplier =
3044 (eq[i].aic_obj.prev_eqd * 65)/100;
3045 }
3046 status = ocrdma_mbx_cmd(dev, (struct ocrdma_mqe *)cmd);
3047 if (status)
3048 goto mbx_err;
3049mbx_err:
3050 kfree(cmd);
3051 return status;
3052}
3053
3054static int ocrdma_modify_eqd(struct ocrdma_dev *dev, struct ocrdma_eq *eq,
3055 int num)
3056{
3057 int num_eqs, i = 0;
3058 if (num > 8) {
3059 while (num) {
3060 num_eqs = min(num, 8);
3061 ocrdma_mbx_modify_eqd(dev, &eq[i], num_eqs);
3062 i += num_eqs;
3063 num -= num_eqs;
3064 }
3065 } else {
3066 ocrdma_mbx_modify_eqd(dev, eq, num);
3067 }
3068 return 0;
3069}
3070
3071void ocrdma_eqd_set_task(struct work_struct *work)
3072{
3073 struct ocrdma_dev *dev =
3074 container_of(work, struct ocrdma_dev, eqd_work.work);
3075 struct ocrdma_eq *eq = 0;
3076 int i, num = 0, status = -EINVAL;
3077 u64 eq_intr;
3078
3079 for (i = 0; i < dev->eq_cnt; i++) {
3080 eq = &dev->eq_tbl[i];
3081 if (eq->aic_obj.eq_intr_cnt > eq->aic_obj.prev_eq_intr_cnt) {
3082 eq_intr = eq->aic_obj.eq_intr_cnt -
3083 eq->aic_obj.prev_eq_intr_cnt;
3084 if ((eq_intr > EQ_INTR_PER_SEC_THRSH_HI) &&
3085 (eq->aic_obj.prev_eqd == EQ_AIC_MIN_EQD)) {
3086 eq->aic_obj.prev_eqd = EQ_AIC_MAX_EQD;
3087 num++;
3088 } else if ((eq_intr < EQ_INTR_PER_SEC_THRSH_LOW) &&
3089 (eq->aic_obj.prev_eqd == EQ_AIC_MAX_EQD)) {
3090 eq->aic_obj.prev_eqd = EQ_AIC_MIN_EQD;
3091 num++;
3092 }
3093 }
3094 eq->aic_obj.prev_eq_intr_cnt = eq->aic_obj.eq_intr_cnt;
3095 }
3096
3097 if (num)
3098 status = ocrdma_modify_eqd(dev, &dev->eq_tbl[0], num);
3099 schedule_delayed_work(&dev->eqd_work, msecs_to_jiffies(1000));
3100}
3101
2873int ocrdma_init_hw(struct ocrdma_dev *dev) 3102int ocrdma_init_hw(struct ocrdma_dev *dev)
2874{ 3103{
2875 int status; 3104 int status;
@@ -2915,6 +3144,7 @@ qpeq_err:
2915 3144
2916void ocrdma_cleanup_hw(struct ocrdma_dev *dev) 3145void ocrdma_cleanup_hw(struct ocrdma_dev *dev)
2917{ 3146{
3147 ocrdma_free_pd_pool(dev);
2918 ocrdma_mbx_delete_ah_tbl(dev); 3148 ocrdma_mbx_delete_ah_tbl(dev);
2919 3149
2920 /* cleanup the eqs */ 3150 /* cleanup the eqs */
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_hw.h b/drivers/infiniband/hw/ocrdma/ocrdma_hw.h
index 6eed8f191322..e905972fceb7 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_hw.h
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_hw.h
@@ -136,5 +136,7 @@ int ocrdma_get_irq(struct ocrdma_dev *dev, struct ocrdma_eq *eq);
136int ocrdma_mbx_rdma_stats(struct ocrdma_dev *, bool reset); 136int ocrdma_mbx_rdma_stats(struct ocrdma_dev *, bool reset);
137char *port_speed_string(struct ocrdma_dev *dev); 137char *port_speed_string(struct ocrdma_dev *dev);
138void ocrdma_init_service_level(struct ocrdma_dev *); 138void ocrdma_init_service_level(struct ocrdma_dev *);
139void ocrdma_alloc_pd_pool(struct ocrdma_dev *dev);
140void ocrdma_free_pd_range(struct ocrdma_dev *dev);
139 141
140#endif /* __OCRDMA_HW_H__ */ 142#endif /* __OCRDMA_HW_H__ */
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_main.c b/drivers/infiniband/hw/ocrdma/ocrdma_main.c
index b0b2257b8e04..7a2b59aca004 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_main.c
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_main.c
@@ -239,7 +239,7 @@ static int ocrdma_register_device(struct ocrdma_dev *dev)
239 239
240 dev->ibdev.node_type = RDMA_NODE_IB_CA; 240 dev->ibdev.node_type = RDMA_NODE_IB_CA;
241 dev->ibdev.phys_port_cnt = 1; 241 dev->ibdev.phys_port_cnt = 1;
242 dev->ibdev.num_comp_vectors = 1; 242 dev->ibdev.num_comp_vectors = dev->eq_cnt;
243 243
244 /* mandatory verbs. */ 244 /* mandatory verbs. */
245 dev->ibdev.query_device = ocrdma_query_device; 245 dev->ibdev.query_device = ocrdma_query_device;
@@ -329,6 +329,8 @@ static int ocrdma_alloc_resources(struct ocrdma_dev *dev)
329 if (dev->stag_arr == NULL) 329 if (dev->stag_arr == NULL)
330 goto alloc_err; 330 goto alloc_err;
331 331
332 ocrdma_alloc_pd_pool(dev);
333
332 spin_lock_init(&dev->av_tbl.lock); 334 spin_lock_init(&dev->av_tbl.lock);
333 spin_lock_init(&dev->flush_q_lock); 335 spin_lock_init(&dev->flush_q_lock);
334 return 0; 336 return 0;
@@ -491,6 +493,9 @@ static struct ocrdma_dev *ocrdma_add(struct be_dev_info *dev_info)
491 spin_unlock(&ocrdma_devlist_lock); 493 spin_unlock(&ocrdma_devlist_lock);
492 /* Init stats */ 494 /* Init stats */
493 ocrdma_add_port_stats(dev); 495 ocrdma_add_port_stats(dev);
496 /* Interrupt Moderation */
497 INIT_DELAYED_WORK(&dev->eqd_work, ocrdma_eqd_set_task);
498 schedule_delayed_work(&dev->eqd_work, msecs_to_jiffies(1000));
494 499
495 pr_info("%s %s: %s \"%s\" port %d\n", 500 pr_info("%s %s: %s \"%s\" port %d\n",
496 dev_name(&dev->nic_info.pdev->dev), hca_name(dev), 501 dev_name(&dev->nic_info.pdev->dev), hca_name(dev),
@@ -528,11 +533,12 @@ static void ocrdma_remove(struct ocrdma_dev *dev)
528 /* first unregister with stack to stop all the active traffic 533 /* first unregister with stack to stop all the active traffic
529 * of the registered clients. 534 * of the registered clients.
530 */ 535 */
531 ocrdma_rem_port_stats(dev); 536 cancel_delayed_work_sync(&dev->eqd_work);
532 ocrdma_remove_sysfiles(dev); 537 ocrdma_remove_sysfiles(dev);
533
534 ib_unregister_device(&dev->ibdev); 538 ib_unregister_device(&dev->ibdev);
535 539
540 ocrdma_rem_port_stats(dev);
541
536 spin_lock(&ocrdma_devlist_lock); 542 spin_lock(&ocrdma_devlist_lock);
537 list_del_rcu(&dev->entry); 543 list_del_rcu(&dev->entry);
538 spin_unlock(&ocrdma_devlist_lock); 544 spin_unlock(&ocrdma_devlist_lock);
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h
index 4e036480c1a8..243c87c8bd65 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_sli.h
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_sli.h
@@ -75,6 +75,8 @@ enum {
75 OCRDMA_CMD_DESTROY_RBQ = 26, 75 OCRDMA_CMD_DESTROY_RBQ = 26,
76 76
77 OCRDMA_CMD_GET_RDMA_STATS = 27, 77 OCRDMA_CMD_GET_RDMA_STATS = 27,
78 OCRDMA_CMD_ALLOC_PD_RANGE = 28,
79 OCRDMA_CMD_DEALLOC_PD_RANGE = 29,
78 80
79 OCRDMA_CMD_MAX 81 OCRDMA_CMD_MAX
80}; 82};
@@ -87,6 +89,7 @@ enum {
87 OCRDMA_CMD_CREATE_MQ = 21, 89 OCRDMA_CMD_CREATE_MQ = 21,
88 OCRDMA_CMD_GET_CTRL_ATTRIBUTES = 32, 90 OCRDMA_CMD_GET_CTRL_ATTRIBUTES = 32,
89 OCRDMA_CMD_GET_FW_VER = 35, 91 OCRDMA_CMD_GET_FW_VER = 35,
92 OCRDMA_CMD_MODIFY_EQ_DELAY = 41,
90 OCRDMA_CMD_DELETE_MQ = 53, 93 OCRDMA_CMD_DELETE_MQ = 53,
91 OCRDMA_CMD_DELETE_CQ = 54, 94 OCRDMA_CMD_DELETE_CQ = 54,
92 OCRDMA_CMD_DELETE_EQ = 55, 95 OCRDMA_CMD_DELETE_EQ = 55,
@@ -101,7 +104,7 @@ enum {
101 QTYPE_MCCQ = 3 104 QTYPE_MCCQ = 3
102}; 105};
103 106
104#define OCRDMA_MAX_SGID 8 107#define OCRDMA_MAX_SGID 16
105 108
106#define OCRDMA_MAX_QP 2048 109#define OCRDMA_MAX_QP 2048
107#define OCRDMA_MAX_CQ 2048 110#define OCRDMA_MAX_CQ 2048
@@ -314,6 +317,29 @@ struct ocrdma_create_eq_rsp {
314 317
315#define OCRDMA_EQ_MINOR_OTHER 0x1 318#define OCRDMA_EQ_MINOR_OTHER 0x1
316 319
320struct ocrmda_set_eqd {
321 u32 eq_id;
322 u32 phase;
323 u32 delay_multiplier;
324};
325
326struct ocrdma_modify_eqd_cmd {
327 struct ocrdma_mbx_hdr req;
328 u32 num_eq;
329 struct ocrmda_set_eqd set_eqd[8];
330} __packed;
331
332struct ocrdma_modify_eqd_req {
333 struct ocrdma_mqe_hdr hdr;
334 struct ocrdma_modify_eqd_cmd cmd;
335};
336
337
338struct ocrdma_modify_eq_delay_rsp {
339 struct ocrdma_mbx_rsp hdr;
340 u32 rsvd0;
341} __packed;
342
317enum { 343enum {
318 OCRDMA_MCQE_STATUS_SHIFT = 0, 344 OCRDMA_MCQE_STATUS_SHIFT = 0,
319 OCRDMA_MCQE_STATUS_MASK = 0xFFFF, 345 OCRDMA_MCQE_STATUS_MASK = 0xFFFF,
@@ -441,7 +467,9 @@ enum OCRDMA_ASYNC_EVENT_TYPE {
441 OCRDMA_DEVICE_FATAL_EVENT = 0x08, 467 OCRDMA_DEVICE_FATAL_EVENT = 0x08,
442 OCRDMA_SRQCAT_ERROR = 0x0E, 468 OCRDMA_SRQCAT_ERROR = 0x0E,
443 OCRDMA_SRQ_LIMIT_EVENT = 0x0F, 469 OCRDMA_SRQ_LIMIT_EVENT = 0x0F,
444 OCRDMA_QP_LAST_WQE_EVENT = 0x10 470 OCRDMA_QP_LAST_WQE_EVENT = 0x10,
471
472 OCRDMA_MAX_ASYNC_ERRORS
445}; 473};
446 474
447/* mailbox command request and responses */ 475/* mailbox command request and responses */
@@ -1297,6 +1325,37 @@ struct ocrdma_dealloc_pd_rsp {
1297 struct ocrdma_mbx_rsp rsp; 1325 struct ocrdma_mbx_rsp rsp;
1298}; 1326};
1299 1327
1328struct ocrdma_alloc_pd_range {
1329 struct ocrdma_mqe_hdr hdr;
1330 struct ocrdma_mbx_hdr req;
1331 u32 enable_dpp_rsvd;
1332 u32 pd_count;
1333};
1334
1335struct ocrdma_alloc_pd_range_rsp {
1336 struct ocrdma_mqe_hdr hdr;
1337 struct ocrdma_mbx_rsp rsp;
1338 u32 dpp_page_pdid;
1339 u32 pd_count;
1340};
1341
1342enum {
1343 OCRDMA_ALLOC_PD_RNG_RSP_START_PDID_MASK = 0xFFFF,
1344};
1345
1346struct ocrdma_dealloc_pd_range {
1347 struct ocrdma_mqe_hdr hdr;
1348 struct ocrdma_mbx_hdr req;
1349 u32 start_pd_id;
1350 u32 pd_count;
1351};
1352
1353struct ocrdma_dealloc_pd_range_rsp {
1354 struct ocrdma_mqe_hdr hdr;
1355 struct ocrdma_mbx_hdr req;
1356 u32 rsvd;
1357};
1358
1300enum { 1359enum {
1301 OCRDMA_ADDR_CHECK_ENABLE = 1, 1360 OCRDMA_ADDR_CHECK_ENABLE = 1,
1302 OCRDMA_ADDR_CHECK_DISABLE = 0 1361 OCRDMA_ADDR_CHECK_DISABLE = 0
@@ -1597,7 +1656,9 @@ enum OCRDMA_CQE_STATUS {
1597 OCRDMA_CQE_INV_EEC_STATE_ERR, 1656 OCRDMA_CQE_INV_EEC_STATE_ERR,
1598 OCRDMA_CQE_FATAL_ERR, 1657 OCRDMA_CQE_FATAL_ERR,
1599 OCRDMA_CQE_RESP_TIMEOUT_ERR, 1658 OCRDMA_CQE_RESP_TIMEOUT_ERR,
1600 OCRDMA_CQE_GENERAL_ERR 1659 OCRDMA_CQE_GENERAL_ERR,
1660
1661 OCRDMA_MAX_CQE_ERR
1601}; 1662};
1602 1663
1603enum { 1664enum {
@@ -1673,6 +1734,7 @@ enum {
1673 OCRDMA_FLAG_FENCE_R = 0x8, 1734 OCRDMA_FLAG_FENCE_R = 0x8,
1674 OCRDMA_FLAG_SOLICIT = 0x10, 1735 OCRDMA_FLAG_SOLICIT = 0x10,
1675 OCRDMA_FLAG_IMM = 0x20, 1736 OCRDMA_FLAG_IMM = 0x20,
1737 OCRDMA_FLAG_AH_VLAN_PR = 0x40,
1676 1738
1677 /* Stag flags */ 1739 /* Stag flags */
1678 OCRDMA_LKEY_FLAG_LOCAL_WR = 0x1, 1740 OCRDMA_LKEY_FLAG_LOCAL_WR = 0x1,
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_stats.c b/drivers/infiniband/hw/ocrdma/ocrdma_stats.c
index 41a9aec9998d..48d7ef51aa0c 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_stats.c
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_stats.c
@@ -26,6 +26,7 @@
26 *******************************************************************/ 26 *******************************************************************/
27 27
28#include <rdma/ib_addr.h> 28#include <rdma/ib_addr.h>
29#include <rdma/ib_pma.h>
29#include "ocrdma_stats.h" 30#include "ocrdma_stats.h"
30 31
31static struct dentry *ocrdma_dbgfs_dir; 32static struct dentry *ocrdma_dbgfs_dir;
@@ -249,6 +250,27 @@ static char *ocrdma_rx_stats(struct ocrdma_dev *dev)
249 return stats; 250 return stats;
250} 251}
251 252
253static u64 ocrdma_sysfs_rcv_pkts(struct ocrdma_dev *dev)
254{
255 struct ocrdma_rdma_stats_resp *rdma_stats =
256 (struct ocrdma_rdma_stats_resp *)dev->stats_mem.va;
257 struct ocrdma_rx_stats *rx_stats = &rdma_stats->rx_stats;
258
259 return convert_to_64bit(rx_stats->roce_frames_lo,
260 rx_stats->roce_frames_hi) + (u64)rx_stats->roce_frame_icrc_drops
261 + (u64)rx_stats->roce_frame_payload_len_drops;
262}
263
264static u64 ocrdma_sysfs_rcv_data(struct ocrdma_dev *dev)
265{
266 struct ocrdma_rdma_stats_resp *rdma_stats =
267 (struct ocrdma_rdma_stats_resp *)dev->stats_mem.va;
268 struct ocrdma_rx_stats *rx_stats = &rdma_stats->rx_stats;
269
270 return (convert_to_64bit(rx_stats->roce_frame_bytes_lo,
271 rx_stats->roce_frame_bytes_hi))/4;
272}
273
252static char *ocrdma_tx_stats(struct ocrdma_dev *dev) 274static char *ocrdma_tx_stats(struct ocrdma_dev *dev)
253{ 275{
254 char *stats = dev->stats_mem.debugfs_mem, *pcur; 276 char *stats = dev->stats_mem.debugfs_mem, *pcur;
@@ -292,6 +314,37 @@ static char *ocrdma_tx_stats(struct ocrdma_dev *dev)
292 return stats; 314 return stats;
293} 315}
294 316
317static u64 ocrdma_sysfs_xmit_pkts(struct ocrdma_dev *dev)
318{
319 struct ocrdma_rdma_stats_resp *rdma_stats =
320 (struct ocrdma_rdma_stats_resp *)dev->stats_mem.va;
321 struct ocrdma_tx_stats *tx_stats = &rdma_stats->tx_stats;
322
323 return (convert_to_64bit(tx_stats->send_pkts_lo,
324 tx_stats->send_pkts_hi) +
325 convert_to_64bit(tx_stats->write_pkts_lo, tx_stats->write_pkts_hi) +
326 convert_to_64bit(tx_stats->read_pkts_lo, tx_stats->read_pkts_hi) +
327 convert_to_64bit(tx_stats->read_rsp_pkts_lo,
328 tx_stats->read_rsp_pkts_hi) +
329 convert_to_64bit(tx_stats->ack_pkts_lo, tx_stats->ack_pkts_hi));
330}
331
332static u64 ocrdma_sysfs_xmit_data(struct ocrdma_dev *dev)
333{
334 struct ocrdma_rdma_stats_resp *rdma_stats =
335 (struct ocrdma_rdma_stats_resp *)dev->stats_mem.va;
336 struct ocrdma_tx_stats *tx_stats = &rdma_stats->tx_stats;
337
338 return (convert_to_64bit(tx_stats->send_bytes_lo,
339 tx_stats->send_bytes_hi) +
340 convert_to_64bit(tx_stats->write_bytes_lo,
341 tx_stats->write_bytes_hi) +
342 convert_to_64bit(tx_stats->read_req_bytes_lo,
343 tx_stats->read_req_bytes_hi) +
344 convert_to_64bit(tx_stats->read_rsp_bytes_lo,
345 tx_stats->read_rsp_bytes_hi))/4;
346}
347
295static char *ocrdma_wqe_stats(struct ocrdma_dev *dev) 348static char *ocrdma_wqe_stats(struct ocrdma_dev *dev)
296{ 349{
297 char *stats = dev->stats_mem.debugfs_mem, *pcur; 350 char *stats = dev->stats_mem.debugfs_mem, *pcur;
@@ -432,10 +485,118 @@ static char *ocrdma_rx_dbg_stats(struct ocrdma_dev *dev)
432 return dev->stats_mem.debugfs_mem; 485 return dev->stats_mem.debugfs_mem;
433} 486}
434 487
488static char *ocrdma_driver_dbg_stats(struct ocrdma_dev *dev)
489{
490 char *stats = dev->stats_mem.debugfs_mem, *pcur;
491
492
493 memset(stats, 0, (OCRDMA_MAX_DBGFS_MEM));
494
495 pcur = stats;
496 pcur += ocrdma_add_stat(stats, pcur, "async_cq_err",
497 (u64)(dev->async_err_stats
498 [OCRDMA_CQ_ERROR].counter));
499 pcur += ocrdma_add_stat(stats, pcur, "async_cq_overrun_err",
500 (u64)dev->async_err_stats
501 [OCRDMA_CQ_OVERRUN_ERROR].counter);
502 pcur += ocrdma_add_stat(stats, pcur, "async_cq_qpcat_err",
503 (u64)dev->async_err_stats
504 [OCRDMA_CQ_QPCAT_ERROR].counter);
505 pcur += ocrdma_add_stat(stats, pcur, "async_qp_access_err",
506 (u64)dev->async_err_stats
507 [OCRDMA_QP_ACCESS_ERROR].counter);
508 pcur += ocrdma_add_stat(stats, pcur, "async_qp_commm_est_evt",
509 (u64)dev->async_err_stats
510 [OCRDMA_QP_COMM_EST_EVENT].counter);
511 pcur += ocrdma_add_stat(stats, pcur, "async_sq_drained_evt",
512 (u64)dev->async_err_stats
513 [OCRDMA_SQ_DRAINED_EVENT].counter);
514 pcur += ocrdma_add_stat(stats, pcur, "async_dev_fatal_evt",
515 (u64)dev->async_err_stats
516 [OCRDMA_DEVICE_FATAL_EVENT].counter);
517 pcur += ocrdma_add_stat(stats, pcur, "async_srqcat_err",
518 (u64)dev->async_err_stats
519 [OCRDMA_SRQCAT_ERROR].counter);
520 pcur += ocrdma_add_stat(stats, pcur, "async_srq_limit_evt",
521 (u64)dev->async_err_stats
522 [OCRDMA_SRQ_LIMIT_EVENT].counter);
523 pcur += ocrdma_add_stat(stats, pcur, "async_qp_last_wqe_evt",
524 (u64)dev->async_err_stats
525 [OCRDMA_QP_LAST_WQE_EVENT].counter);
526
527 pcur += ocrdma_add_stat(stats, pcur, "cqe_loc_len_err",
528 (u64)dev->cqe_err_stats
529 [OCRDMA_CQE_LOC_LEN_ERR].counter);
530 pcur += ocrdma_add_stat(stats, pcur, "cqe_loc_qp_op_err",
531 (u64)dev->cqe_err_stats
532 [OCRDMA_CQE_LOC_QP_OP_ERR].counter);
533 pcur += ocrdma_add_stat(stats, pcur, "cqe_loc_eec_op_err",
534 (u64)dev->cqe_err_stats
535 [OCRDMA_CQE_LOC_EEC_OP_ERR].counter);
536 pcur += ocrdma_add_stat(stats, pcur, "cqe_loc_prot_err",
537 (u64)dev->cqe_err_stats
538 [OCRDMA_CQE_LOC_PROT_ERR].counter);
539 pcur += ocrdma_add_stat(stats, pcur, "cqe_wr_flush_err",
540 (u64)dev->cqe_err_stats
541 [OCRDMA_CQE_WR_FLUSH_ERR].counter);
542 pcur += ocrdma_add_stat(stats, pcur, "cqe_mw_bind_err",
543 (u64)dev->cqe_err_stats
544 [OCRDMA_CQE_MW_BIND_ERR].counter);
545 pcur += ocrdma_add_stat(stats, pcur, "cqe_bad_resp_err",
546 (u64)dev->cqe_err_stats
547 [OCRDMA_CQE_BAD_RESP_ERR].counter);
548 pcur += ocrdma_add_stat(stats, pcur, "cqe_loc_access_err",
549 (u64)dev->cqe_err_stats
550 [OCRDMA_CQE_LOC_ACCESS_ERR].counter);
551 pcur += ocrdma_add_stat(stats, pcur, "cqe_rem_inv_req_err",
552 (u64)dev->cqe_err_stats
553 [OCRDMA_CQE_REM_INV_REQ_ERR].counter);
554 pcur += ocrdma_add_stat(stats, pcur, "cqe_rem_access_err",
555 (u64)dev->cqe_err_stats
556 [OCRDMA_CQE_REM_ACCESS_ERR].counter);
557 pcur += ocrdma_add_stat(stats, pcur, "cqe_rem_op_err",
558 (u64)dev->cqe_err_stats
559 [OCRDMA_CQE_REM_OP_ERR].counter);
560 pcur += ocrdma_add_stat(stats, pcur, "cqe_retry_exc_err",
561 (u64)dev->cqe_err_stats
562 [OCRDMA_CQE_RETRY_EXC_ERR].counter);
563 pcur += ocrdma_add_stat(stats, pcur, "cqe_rnr_retry_exc_err",
564 (u64)dev->cqe_err_stats
565 [OCRDMA_CQE_RNR_RETRY_EXC_ERR].counter);
566 pcur += ocrdma_add_stat(stats, pcur, "cqe_loc_rdd_viol_err",
567 (u64)dev->cqe_err_stats
568 [OCRDMA_CQE_LOC_RDD_VIOL_ERR].counter);
569 pcur += ocrdma_add_stat(stats, pcur, "cqe_rem_inv_rd_req_err",
570 (u64)dev->cqe_err_stats
571 [OCRDMA_CQE_REM_INV_RD_REQ_ERR].counter);
572 pcur += ocrdma_add_stat(stats, pcur, "cqe_rem_abort_err",
573 (u64)dev->cqe_err_stats
574 [OCRDMA_CQE_REM_ABORT_ERR].counter);
575 pcur += ocrdma_add_stat(stats, pcur, "cqe_inv_eecn_err",
576 (u64)dev->cqe_err_stats
577 [OCRDMA_CQE_INV_EECN_ERR].counter);
578 pcur += ocrdma_add_stat(stats, pcur, "cqe_inv_eec_state_err",
579 (u64)dev->cqe_err_stats
580 [OCRDMA_CQE_INV_EEC_STATE_ERR].counter);
581 pcur += ocrdma_add_stat(stats, pcur, "cqe_fatal_err",
582 (u64)dev->cqe_err_stats
583 [OCRDMA_CQE_FATAL_ERR].counter);
584 pcur += ocrdma_add_stat(stats, pcur, "cqe_resp_timeout_err",
585 (u64)dev->cqe_err_stats
586 [OCRDMA_CQE_RESP_TIMEOUT_ERR].counter);
587 pcur += ocrdma_add_stat(stats, pcur, "cqe_general_err",
588 (u64)dev->cqe_err_stats
589 [OCRDMA_CQE_GENERAL_ERR].counter);
590 return stats;
591}
592
435static void ocrdma_update_stats(struct ocrdma_dev *dev) 593static void ocrdma_update_stats(struct ocrdma_dev *dev)
436{ 594{
437 ulong now = jiffies, secs; 595 ulong now = jiffies, secs;
438 int status = 0; 596 int status = 0;
597 struct ocrdma_rdma_stats_resp *rdma_stats =
598 (struct ocrdma_rdma_stats_resp *)dev->stats_mem.va;
599 struct ocrdma_rsrc_stats *rsrc_stats = &rdma_stats->act_rsrc_stats;
439 600
440 secs = jiffies_to_msecs(now - dev->last_stats_time) / 1000U; 601 secs = jiffies_to_msecs(now - dev->last_stats_time) / 1000U;
441 if (secs) { 602 if (secs) {
@@ -444,10 +605,74 @@ static void ocrdma_update_stats(struct ocrdma_dev *dev)
444 if (status) 605 if (status)
445 pr_err("%s: stats mbox failed with status = %d\n", 606 pr_err("%s: stats mbox failed with status = %d\n",
446 __func__, status); 607 __func__, status);
608 /* Update PD counters from PD resource manager */
609 if (dev->pd_mgr->pd_prealloc_valid) {
610 rsrc_stats->dpp_pds = dev->pd_mgr->pd_dpp_count;
611 rsrc_stats->non_dpp_pds = dev->pd_mgr->pd_norm_count;
612 /* Threshold stata*/
613 rsrc_stats = &rdma_stats->th_rsrc_stats;
614 rsrc_stats->dpp_pds = dev->pd_mgr->pd_dpp_thrsh;
615 rsrc_stats->non_dpp_pds = dev->pd_mgr->pd_norm_thrsh;
616 }
447 dev->last_stats_time = jiffies; 617 dev->last_stats_time = jiffies;
448 } 618 }
449} 619}
450 620
621static ssize_t ocrdma_dbgfs_ops_write(struct file *filp,
622 const char __user *buffer,
623 size_t count, loff_t *ppos)
624{
625 char tmp_str[32];
626 long reset;
627 int status = 0;
628 struct ocrdma_stats *pstats = filp->private_data;
629 struct ocrdma_dev *dev = pstats->dev;
630
631 if (count > 32)
632 goto err;
633
634 if (copy_from_user(tmp_str, buffer, count))
635 goto err;
636
637 tmp_str[count-1] = '\0';
638 if (kstrtol(tmp_str, 10, &reset))
639 goto err;
640
641 switch (pstats->type) {
642 case OCRDMA_RESET_STATS:
643 if (reset) {
644 status = ocrdma_mbx_rdma_stats(dev, true);
645 if (status) {
646 pr_err("Failed to reset stats = %d", status);
647 goto err;
648 }
649 }
650 break;
651 default:
652 goto err;
653 }
654
655 return count;
656err:
657 return -EFAULT;
658}
659
660int ocrdma_pma_counters(struct ocrdma_dev *dev,
661 struct ib_mad *out_mad)
662{
663 struct ib_pma_portcounters *pma_cnt;
664
665 memset(out_mad->data, 0, sizeof out_mad->data);
666 pma_cnt = (void *)(out_mad->data + 40);
667 ocrdma_update_stats(dev);
668
669 pma_cnt->port_xmit_data = cpu_to_be32(ocrdma_sysfs_xmit_data(dev));
670 pma_cnt->port_rcv_data = cpu_to_be32(ocrdma_sysfs_rcv_data(dev));
671 pma_cnt->port_xmit_packets = cpu_to_be32(ocrdma_sysfs_xmit_pkts(dev));
672 pma_cnt->port_rcv_packets = cpu_to_be32(ocrdma_sysfs_rcv_pkts(dev));
673 return 0;
674}
675
451static ssize_t ocrdma_dbgfs_ops_read(struct file *filp, char __user *buffer, 676static ssize_t ocrdma_dbgfs_ops_read(struct file *filp, char __user *buffer,
452 size_t usr_buf_len, loff_t *ppos) 677 size_t usr_buf_len, loff_t *ppos)
453{ 678{
@@ -492,6 +717,9 @@ static ssize_t ocrdma_dbgfs_ops_read(struct file *filp, char __user *buffer,
492 case OCRDMA_RX_DBG_STATS: 717 case OCRDMA_RX_DBG_STATS:
493 data = ocrdma_rx_dbg_stats(dev); 718 data = ocrdma_rx_dbg_stats(dev);
494 break; 719 break;
720 case OCRDMA_DRV_STATS:
721 data = ocrdma_driver_dbg_stats(dev);
722 break;
495 723
496 default: 724 default:
497 status = -EFAULT; 725 status = -EFAULT;
@@ -514,6 +742,7 @@ static const struct file_operations ocrdma_dbg_ops = {
514 .owner = THIS_MODULE, 742 .owner = THIS_MODULE,
515 .open = simple_open, 743 .open = simple_open,
516 .read = ocrdma_dbgfs_ops_read, 744 .read = ocrdma_dbgfs_ops_read,
745 .write = ocrdma_dbgfs_ops_write,
517}; 746};
518 747
519void ocrdma_add_port_stats(struct ocrdma_dev *dev) 748void ocrdma_add_port_stats(struct ocrdma_dev *dev)
@@ -582,6 +811,18 @@ void ocrdma_add_port_stats(struct ocrdma_dev *dev)
582 &dev->rx_dbg_stats, &ocrdma_dbg_ops)) 811 &dev->rx_dbg_stats, &ocrdma_dbg_ops))
583 goto err; 812 goto err;
584 813
814 dev->driver_stats.type = OCRDMA_DRV_STATS;
815 dev->driver_stats.dev = dev;
816 if (!debugfs_create_file("driver_dbg_stats", S_IRUSR, dev->dir,
817 &dev->driver_stats, &ocrdma_dbg_ops))
818 goto err;
819
820 dev->reset_stats.type = OCRDMA_RESET_STATS;
821 dev->reset_stats.dev = dev;
822 if (!debugfs_create_file("reset_stats", S_IRUSR, dev->dir,
823 &dev->reset_stats, &ocrdma_dbg_ops))
824 goto err;
825
585 /* Now create dma_mem for stats mbx command */ 826 /* Now create dma_mem for stats mbx command */
586 if (!ocrdma_alloc_stats_mem(dev)) 827 if (!ocrdma_alloc_stats_mem(dev))
587 goto err; 828 goto err;
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_stats.h b/drivers/infiniband/hw/ocrdma/ocrdma_stats.h
index 5f5e20c46d7c..091edd68a8a3 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_stats.h
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_stats.h
@@ -43,12 +43,16 @@ enum OCRDMA_STATS_TYPE {
43 OCRDMA_RXQP_ERRSTATS, 43 OCRDMA_RXQP_ERRSTATS,
44 OCRDMA_TXQP_ERRSTATS, 44 OCRDMA_TXQP_ERRSTATS,
45 OCRDMA_TX_DBG_STATS, 45 OCRDMA_TX_DBG_STATS,
46 OCRDMA_RX_DBG_STATS 46 OCRDMA_RX_DBG_STATS,
47 OCRDMA_DRV_STATS,
48 OCRDMA_RESET_STATS
47}; 49};
48 50
49void ocrdma_rem_debugfs(void); 51void ocrdma_rem_debugfs(void);
50void ocrdma_init_debugfs(void); 52void ocrdma_init_debugfs(void);
51void ocrdma_rem_port_stats(struct ocrdma_dev *dev); 53void ocrdma_rem_port_stats(struct ocrdma_dev *dev);
52void ocrdma_add_port_stats(struct ocrdma_dev *dev); 54void ocrdma_add_port_stats(struct ocrdma_dev *dev);
55int ocrdma_pma_counters(struct ocrdma_dev *dev,
56 struct ib_mad *out_mad);
53 57
54#endif /* __OCRDMA_STATS_H__ */ 58#endif /* __OCRDMA_STATS_H__ */
diff --git a/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c b/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c
index fb8d8c4dfbb9..877175563634 100644
--- a/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c
+++ b/drivers/infiniband/hw/ocrdma/ocrdma_verbs.c
@@ -53,7 +53,7 @@ int ocrdma_query_gid(struct ib_device *ibdev, u8 port,
53 53
54 dev = get_ocrdma_dev(ibdev); 54 dev = get_ocrdma_dev(ibdev);
55 memset(sgid, 0, sizeof(*sgid)); 55 memset(sgid, 0, sizeof(*sgid));
56 if (index > OCRDMA_MAX_SGID) 56 if (index >= OCRDMA_MAX_SGID)
57 return -EINVAL; 57 return -EINVAL;
58 58
59 memcpy(sgid, &dev->sgid_tbl[index], sizeof(*sgid)); 59 memcpy(sgid, &dev->sgid_tbl[index], sizeof(*sgid));
@@ -253,6 +253,107 @@ static bool ocrdma_search_mmap(struct ocrdma_ucontext *uctx, u64 phy_addr,
253 return found; 253 return found;
254} 254}
255 255
256
257static u16 _ocrdma_pd_mgr_get_bitmap(struct ocrdma_dev *dev, bool dpp_pool)
258{
259 u16 pd_bitmap_idx = 0;
260 const unsigned long *pd_bitmap;
261
262 if (dpp_pool) {
263 pd_bitmap = dev->pd_mgr->pd_dpp_bitmap;
264 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
265 dev->pd_mgr->max_dpp_pd);
266 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_dpp_bitmap);
267 dev->pd_mgr->pd_dpp_count++;
268 if (dev->pd_mgr->pd_dpp_count > dev->pd_mgr->pd_dpp_thrsh)
269 dev->pd_mgr->pd_dpp_thrsh = dev->pd_mgr->pd_dpp_count;
270 } else {
271 pd_bitmap = dev->pd_mgr->pd_norm_bitmap;
272 pd_bitmap_idx = find_first_zero_bit(pd_bitmap,
273 dev->pd_mgr->max_normal_pd);
274 __set_bit(pd_bitmap_idx, dev->pd_mgr->pd_norm_bitmap);
275 dev->pd_mgr->pd_norm_count++;
276 if (dev->pd_mgr->pd_norm_count > dev->pd_mgr->pd_norm_thrsh)
277 dev->pd_mgr->pd_norm_thrsh = dev->pd_mgr->pd_norm_count;
278 }
279 return pd_bitmap_idx;
280}
281
282static int _ocrdma_pd_mgr_put_bitmap(struct ocrdma_dev *dev, u16 pd_id,
283 bool dpp_pool)
284{
285 u16 pd_count;
286 u16 pd_bit_index;
287
288 pd_count = dpp_pool ? dev->pd_mgr->pd_dpp_count :
289 dev->pd_mgr->pd_norm_count;
290 if (pd_count == 0)
291 return -EINVAL;
292
293 if (dpp_pool) {
294 pd_bit_index = pd_id - dev->pd_mgr->pd_dpp_start;
295 if (pd_bit_index >= dev->pd_mgr->max_dpp_pd) {
296 return -EINVAL;
297 } else {
298 __clear_bit(pd_bit_index, dev->pd_mgr->pd_dpp_bitmap);
299 dev->pd_mgr->pd_dpp_count--;
300 }
301 } else {
302 pd_bit_index = pd_id - dev->pd_mgr->pd_norm_start;
303 if (pd_bit_index >= dev->pd_mgr->max_normal_pd) {
304 return -EINVAL;
305 } else {
306 __clear_bit(pd_bit_index, dev->pd_mgr->pd_norm_bitmap);
307 dev->pd_mgr->pd_norm_count--;
308 }
309 }
310
311 return 0;
312}
313
314static u8 ocrdma_put_pd_num(struct ocrdma_dev *dev, u16 pd_id,
315 bool dpp_pool)
316{
317 int status;
318
319 mutex_lock(&dev->dev_lock);
320 status = _ocrdma_pd_mgr_put_bitmap(dev, pd_id, dpp_pool);
321 mutex_unlock(&dev->dev_lock);
322 return status;
323}
324
325static int ocrdma_get_pd_num(struct ocrdma_dev *dev, struct ocrdma_pd *pd)
326{
327 u16 pd_idx = 0;
328 int status = 0;
329
330 mutex_lock(&dev->dev_lock);
331 if (pd->dpp_enabled) {
332 /* try allocating DPP PD, if not available then normal PD */
333 if (dev->pd_mgr->pd_dpp_count < dev->pd_mgr->max_dpp_pd) {
334 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, true);
335 pd->id = dev->pd_mgr->pd_dpp_start + pd_idx;
336 pd->dpp_page = dev->pd_mgr->dpp_page_index + pd_idx;
337 } else if (dev->pd_mgr->pd_norm_count <
338 dev->pd_mgr->max_normal_pd) {
339 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
340 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
341 pd->dpp_enabled = false;
342 } else {
343 status = -EINVAL;
344 }
345 } else {
346 if (dev->pd_mgr->pd_norm_count < dev->pd_mgr->max_normal_pd) {
347 pd_idx = _ocrdma_pd_mgr_get_bitmap(dev, false);
348 pd->id = dev->pd_mgr->pd_norm_start + pd_idx;
349 } else {
350 status = -EINVAL;
351 }
352 }
353 mutex_unlock(&dev->dev_lock);
354 return status;
355}
356
256static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev, 357static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev,
257 struct ocrdma_ucontext *uctx, 358 struct ocrdma_ucontext *uctx,
258 struct ib_udata *udata) 359 struct ib_udata *udata)
@@ -272,6 +373,11 @@ static struct ocrdma_pd *_ocrdma_alloc_pd(struct ocrdma_dev *dev,
272 dev->attr.wqe_size) : 0; 373 dev->attr.wqe_size) : 0;
273 } 374 }
274 375
376 if (dev->pd_mgr->pd_prealloc_valid) {
377 status = ocrdma_get_pd_num(dev, pd);
378 return (status == 0) ? pd : ERR_PTR(status);
379 }
380
275retry: 381retry:
276 status = ocrdma_mbx_alloc_pd(dev, pd); 382 status = ocrdma_mbx_alloc_pd(dev, pd);
277 if (status) { 383 if (status) {
@@ -299,7 +405,11 @@ static int _ocrdma_dealloc_pd(struct ocrdma_dev *dev,
299{ 405{
300 int status = 0; 406 int status = 0;
301 407
302 status = ocrdma_mbx_dealloc_pd(dev, pd); 408 if (dev->pd_mgr->pd_prealloc_valid)
409 status = ocrdma_put_pd_num(dev, pd->id, pd->dpp_enabled);
410 else
411 status = ocrdma_mbx_dealloc_pd(dev, pd);
412
303 kfree(pd); 413 kfree(pd);
304 return status; 414 return status;
305} 415}
@@ -325,7 +435,6 @@ err:
325 435
326static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx) 436static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
327{ 437{
328 int status = 0;
329 struct ocrdma_pd *pd = uctx->cntxt_pd; 438 struct ocrdma_pd *pd = uctx->cntxt_pd;
330 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device); 439 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
331 440
@@ -334,8 +443,8 @@ static int ocrdma_dealloc_ucontext_pd(struct ocrdma_ucontext *uctx)
334 __func__, dev->id, pd->id); 443 __func__, dev->id, pd->id);
335 } 444 }
336 uctx->cntxt_pd = NULL; 445 uctx->cntxt_pd = NULL;
337 status = _ocrdma_dealloc_pd(dev, pd); 446 (void)_ocrdma_dealloc_pd(dev, pd);
338 return status; 447 return 0;
339} 448}
340 449
341static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx) 450static struct ocrdma_pd *ocrdma_get_ucontext_pd(struct ocrdma_ucontext *uctx)
@@ -569,7 +678,7 @@ err:
569 if (is_uctx_pd) { 678 if (is_uctx_pd) {
570 ocrdma_release_ucontext_pd(uctx); 679 ocrdma_release_ucontext_pd(uctx);
571 } else { 680 } else {
572 status = ocrdma_mbx_dealloc_pd(dev, pd); 681 status = _ocrdma_dealloc_pd(dev, pd);
573 kfree(pd); 682 kfree(pd);
574 } 683 }
575exit: 684exit:
@@ -837,9 +946,8 @@ int ocrdma_dereg_mr(struct ib_mr *ib_mr)
837{ 946{
838 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr); 947 struct ocrdma_mr *mr = get_ocrdma_mr(ib_mr);
839 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device); 948 struct ocrdma_dev *dev = get_ocrdma_dev(ib_mr->device);
840 int status;
841 949
842 status = ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey); 950 (void) ocrdma_mbx_dealloc_lkey(dev, mr->hwmr.fr_mr, mr->hwmr.lkey);
843 951
844 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr); 952 ocrdma_free_mr_pbl_tbl(dev, &mr->hwmr);
845 953
@@ -850,11 +958,10 @@ int ocrdma_dereg_mr(struct ib_mr *ib_mr)
850 958
851 /* Don't stop cleanup, in case FW is unresponsive */ 959 /* Don't stop cleanup, in case FW is unresponsive */
852 if (dev->mqe_ctx.fw_error_state) { 960 if (dev->mqe_ctx.fw_error_state) {
853 status = 0;
854 pr_err("%s(%d) fw not responding.\n", 961 pr_err("%s(%d) fw not responding.\n",
855 __func__, dev->id); 962 __func__, dev->id);
856 } 963 }
857 return status; 964 return 0;
858} 965}
859 966
860static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq, 967static int ocrdma_copy_cq_uresp(struct ocrdma_dev *dev, struct ocrdma_cq *cq,
@@ -986,7 +1093,6 @@ static void ocrdma_flush_cq(struct ocrdma_cq *cq)
986 1093
987int ocrdma_destroy_cq(struct ib_cq *ibcq) 1094int ocrdma_destroy_cq(struct ib_cq *ibcq)
988{ 1095{
989 int status;
990 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq); 1096 struct ocrdma_cq *cq = get_ocrdma_cq(ibcq);
991 struct ocrdma_eq *eq = NULL; 1097 struct ocrdma_eq *eq = NULL;
992 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device); 1098 struct ocrdma_dev *dev = get_ocrdma_dev(ibcq->device);
@@ -1003,7 +1109,7 @@ int ocrdma_destroy_cq(struct ib_cq *ibcq)
1003 synchronize_irq(irq); 1109 synchronize_irq(irq);
1004 ocrdma_flush_cq(cq); 1110 ocrdma_flush_cq(cq);
1005 1111
1006 status = ocrdma_mbx_destroy_cq(dev, cq); 1112 (void)ocrdma_mbx_destroy_cq(dev, cq);
1007 if (cq->ucontext) { 1113 if (cq->ucontext) {
1008 pdid = cq->ucontext->cntxt_pd->id; 1114 pdid = cq->ucontext->cntxt_pd->id;
1009 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa, 1115 ocrdma_del_mmap(cq->ucontext, (u64) cq->pa,
@@ -1014,7 +1120,7 @@ int ocrdma_destroy_cq(struct ib_cq *ibcq)
1014 } 1120 }
1015 1121
1016 kfree(cq); 1122 kfree(cq);
1017 return status; 1123 return 0;
1018} 1124}
1019 1125
1020static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp) 1126static int ocrdma_add_qpn_map(struct ocrdma_dev *dev, struct ocrdma_qp *qp)
@@ -1113,8 +1219,8 @@ static int ocrdma_copy_qp_uresp(struct ocrdma_qp *qp,
1113 int status = 0; 1219 int status = 0;
1114 u64 usr_db; 1220 u64 usr_db;
1115 struct ocrdma_create_qp_uresp uresp; 1221 struct ocrdma_create_qp_uresp uresp;
1116 struct ocrdma_dev *dev = qp->dev;
1117 struct ocrdma_pd *pd = qp->pd; 1222 struct ocrdma_pd *pd = qp->pd;
1223 struct ocrdma_dev *dev = get_ocrdma_dev(pd->ibpd.device);
1118 1224
1119 memset(&uresp, 0, sizeof(uresp)); 1225 memset(&uresp, 0, sizeof(uresp));
1120 usr_db = dev->nic_info.unmapped_db + 1226 usr_db = dev->nic_info.unmapped_db +
@@ -1253,7 +1359,6 @@ struct ib_qp *ocrdma_create_qp(struct ib_pd *ibpd,
1253 status = -ENOMEM; 1359 status = -ENOMEM;
1254 goto gen_err; 1360 goto gen_err;
1255 } 1361 }
1256 qp->dev = dev;
1257 ocrdma_set_qp_init_params(qp, pd, attrs); 1362 ocrdma_set_qp_init_params(qp, pd, attrs);
1258 if (udata == NULL) 1363 if (udata == NULL)
1259 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 | 1364 qp->cap_flags |= (OCRDMA_QP_MW_BIND | OCRDMA_QP_LKEY0 |
@@ -1312,7 +1417,7 @@ int _ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1312 enum ib_qp_state old_qps; 1417 enum ib_qp_state old_qps;
1313 1418
1314 qp = get_ocrdma_qp(ibqp); 1419 qp = get_ocrdma_qp(ibqp);
1315 dev = qp->dev; 1420 dev = get_ocrdma_dev(ibqp->device);
1316 if (attr_mask & IB_QP_STATE) 1421 if (attr_mask & IB_QP_STATE)
1317 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps); 1422 status = ocrdma_qp_state_change(qp, attr->qp_state, &old_qps);
1318 /* if new and previous states are same hw doesn't need to 1423 /* if new and previous states are same hw doesn't need to
@@ -1335,7 +1440,7 @@ int ocrdma_modify_qp(struct ib_qp *ibqp, struct ib_qp_attr *attr,
1335 enum ib_qp_state old_qps, new_qps; 1440 enum ib_qp_state old_qps, new_qps;
1336 1441
1337 qp = get_ocrdma_qp(ibqp); 1442 qp = get_ocrdma_qp(ibqp);
1338 dev = qp->dev; 1443 dev = get_ocrdma_dev(ibqp->device);
1339 1444
1340 /* syncronize with multiple context trying to change, retrive qps */ 1445 /* syncronize with multiple context trying to change, retrive qps */
1341 mutex_lock(&dev->dev_lock); 1446 mutex_lock(&dev->dev_lock);
@@ -1402,7 +1507,7 @@ int ocrdma_query_qp(struct ib_qp *ibqp,
1402 u32 qp_state; 1507 u32 qp_state;
1403 struct ocrdma_qp_params params; 1508 struct ocrdma_qp_params params;
1404 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp); 1509 struct ocrdma_qp *qp = get_ocrdma_qp(ibqp);
1405 struct ocrdma_dev *dev = qp->dev; 1510 struct ocrdma_dev *dev = get_ocrdma_dev(ibqp->device);
1406 1511
1407 memset(&params, 0, sizeof(params)); 1512 memset(&params, 0, sizeof(params));
1408 mutex_lock(&dev->dev_lock); 1513 mutex_lock(&dev->dev_lock);
@@ -1412,8 +1517,6 @@ int ocrdma_query_qp(struct ib_qp *ibqp,
1412 goto mbx_err; 1517 goto mbx_err;
1413 if (qp->qp_type == IB_QPT_UD) 1518 if (qp->qp_type == IB_QPT_UD)
1414 qp_attr->qkey = params.qkey; 1519 qp_attr->qkey = params.qkey;
1415 qp_attr->qp_state = get_ibqp_state(IB_QPS_INIT);
1416 qp_attr->cur_qp_state = get_ibqp_state(IB_QPS_INIT);
1417 qp_attr->path_mtu = 1520 qp_attr->path_mtu =
1418 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx & 1521 ocrdma_mtu_int_to_enum(params.path_mtu_pkey_indx &
1419 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >> 1522 OCRDMA_QP_PARAMS_PATH_MTU_MASK) >>
@@ -1468,6 +1571,8 @@ int ocrdma_query_qp(struct ib_qp *ibqp,
1468 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr)); 1571 memset(&qp_attr->alt_ah_attr, 0, sizeof(qp_attr->alt_ah_attr));
1469 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >> 1572 qp_state = (params.max_sge_recv_flags & OCRDMA_QP_PARAMS_STATE_MASK) >>
1470 OCRDMA_QP_PARAMS_STATE_SHIFT; 1573 OCRDMA_QP_PARAMS_STATE_SHIFT;
1574 qp_attr->qp_state = get_ibqp_state(qp_state);
1575 qp_attr->cur_qp_state = qp_attr->qp_state;
1471 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0; 1576 qp_attr->sq_draining = (qp_state == OCRDMA_QPS_SQ_DRAINING) ? 1 : 0;
1472 qp_attr->max_dest_rd_atomic = 1577 qp_attr->max_dest_rd_atomic =
1473 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT; 1578 params.max_ord_ird >> OCRDMA_QP_PARAMS_MAX_ORD_SHIFT;
@@ -1475,19 +1580,18 @@ int ocrdma_query_qp(struct ib_qp *ibqp,
1475 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK; 1580 params.max_ord_ird & OCRDMA_QP_PARAMS_MAX_IRD_MASK;
1476 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags & 1581 qp_attr->en_sqd_async_notify = (params.max_sge_recv_flags &
1477 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0; 1582 OCRDMA_QP_PARAMS_FLAGS_SQD_ASYNC) ? 1 : 0;
1583 /* Sync driver QP state with FW */
1584 ocrdma_qp_state_change(qp, qp_attr->qp_state, NULL);
1478mbx_err: 1585mbx_err:
1479 return status; 1586 return status;
1480} 1587}
1481 1588
1482static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, int idx) 1589static void ocrdma_srq_toggle_bit(struct ocrdma_srq *srq, unsigned int idx)
1483{ 1590{
1484 int i = idx / 32; 1591 unsigned int i = idx / 32;
1485 unsigned int mask = (1 << (idx % 32)); 1592 u32 mask = (1U << (idx % 32));
1486 1593
1487 if (srq->idx_bit_fields[i] & mask) 1594 srq->idx_bit_fields[i] ^= mask;
1488 srq->idx_bit_fields[i] &= ~mask;
1489 else
1490 srq->idx_bit_fields[i] |= mask;
1491} 1595}
1492 1596
1493static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q) 1597static int ocrdma_hwq_free_cnt(struct ocrdma_qp_hwq_info *q)
@@ -1596,7 +1700,7 @@ void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
1596{ 1700{
1597 int found = false; 1701 int found = false;
1598 unsigned long flags; 1702 unsigned long flags;
1599 struct ocrdma_dev *dev = qp->dev; 1703 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
1600 /* sync with any active CQ poll */ 1704 /* sync with any active CQ poll */
1601 1705
1602 spin_lock_irqsave(&dev->flush_q_lock, flags); 1706 spin_lock_irqsave(&dev->flush_q_lock, flags);
@@ -1613,7 +1717,6 @@ void ocrdma_del_flush_qp(struct ocrdma_qp *qp)
1613 1717
1614int ocrdma_destroy_qp(struct ib_qp *ibqp) 1718int ocrdma_destroy_qp(struct ib_qp *ibqp)
1615{ 1719{
1616 int status;
1617 struct ocrdma_pd *pd; 1720 struct ocrdma_pd *pd;
1618 struct ocrdma_qp *qp; 1721 struct ocrdma_qp *qp;
1619 struct ocrdma_dev *dev; 1722 struct ocrdma_dev *dev;
@@ -1622,7 +1725,7 @@ int ocrdma_destroy_qp(struct ib_qp *ibqp)
1622 unsigned long flags; 1725 unsigned long flags;
1623 1726
1624 qp = get_ocrdma_qp(ibqp); 1727 qp = get_ocrdma_qp(ibqp);
1625 dev = qp->dev; 1728 dev = get_ocrdma_dev(ibqp->device);
1626 1729
1627 attrs.qp_state = IB_QPS_ERR; 1730 attrs.qp_state = IB_QPS_ERR;
1628 pd = qp->pd; 1731 pd = qp->pd;
@@ -1635,7 +1738,7 @@ int ocrdma_destroy_qp(struct ib_qp *ibqp)
1635 * discarded until the old CQEs are discarded. 1738 * discarded until the old CQEs are discarded.
1636 */ 1739 */
1637 mutex_lock(&dev->dev_lock); 1740 mutex_lock(&dev->dev_lock);
1638 status = ocrdma_mbx_destroy_qp(dev, qp); 1741 (void) ocrdma_mbx_destroy_qp(dev, qp);
1639 1742
1640 /* 1743 /*
1641 * acquire CQ lock while destroy is in progress, in order to 1744 * acquire CQ lock while destroy is in progress, in order to
@@ -1670,7 +1773,7 @@ int ocrdma_destroy_qp(struct ib_qp *ibqp)
1670 kfree(qp->wqe_wr_id_tbl); 1773 kfree(qp->wqe_wr_id_tbl);
1671 kfree(qp->rqe_wr_id_tbl); 1774 kfree(qp->rqe_wr_id_tbl);
1672 kfree(qp); 1775 kfree(qp);
1673 return status; 1776 return 0;
1674} 1777}
1675 1778
1676static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq, 1779static int ocrdma_copy_srq_uresp(struct ocrdma_dev *dev, struct ocrdma_srq *srq,
@@ -1831,6 +1934,8 @@ static void ocrdma_build_ud_hdr(struct ocrdma_qp *qp,
1831 else 1934 else
1832 ud_hdr->qkey = wr->wr.ud.remote_qkey; 1935 ud_hdr->qkey = wr->wr.ud.remote_qkey;
1833 ud_hdr->rsvd_ahid = ah->id; 1936 ud_hdr->rsvd_ahid = ah->id;
1937 if (ah->av->valid & OCRDMA_AV_VLAN_VALID)
1938 hdr->cw |= (OCRDMA_FLAG_AH_VLAN_PR << OCRDMA_WQE_FLAGS_SHIFT);
1834} 1939}
1835 1940
1836static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr, 1941static void ocrdma_build_sges(struct ocrdma_hdr_wqe *hdr,
@@ -2007,11 +2112,12 @@ static int ocrdma_build_fr(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2007 u64 fbo; 2112 u64 fbo;
2008 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1); 2113 struct ocrdma_ewqe_fr *fast_reg = (struct ocrdma_ewqe_fr *)(hdr + 1);
2009 struct ocrdma_mr *mr; 2114 struct ocrdma_mr *mr;
2115 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2010 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr); 2116 u32 wqe_size = sizeof(*fast_reg) + sizeof(*hdr);
2011 2117
2012 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES); 2118 wqe_size = roundup(wqe_size, OCRDMA_WQE_ALIGN_BYTES);
2013 2119
2014 if (wr->wr.fast_reg.page_list_len > qp->dev->attr.max_pages_per_frmr) 2120 if (wr->wr.fast_reg.page_list_len > dev->attr.max_pages_per_frmr)
2015 return -EINVAL; 2121 return -EINVAL;
2016 2122
2017 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT); 2123 hdr->cw |= (OCRDMA_FR_MR << OCRDMA_WQE_OPCODE_SHIFT);
@@ -2039,7 +2145,7 @@ static int ocrdma_build_fr(struct ocrdma_qp *qp, struct ocrdma_hdr_wqe *hdr,
2039 fast_reg->size_sge = 2145 fast_reg->size_sge =
2040 get_encoded_page_size(1 << wr->wr.fast_reg.page_shift); 2146 get_encoded_page_size(1 << wr->wr.fast_reg.page_shift);
2041 mr = (struct ocrdma_mr *) (unsigned long) 2147 mr = (struct ocrdma_mr *) (unsigned long)
2042 qp->dev->stag_arr[(hdr->lkey >> 8) & (OCRDMA_MAX_STAG - 1)]; 2148 dev->stag_arr[(hdr->lkey >> 8) & (OCRDMA_MAX_STAG - 1)];
2043 build_frmr_pbes(wr, mr->hwmr.pbl_table, &mr->hwmr); 2149 build_frmr_pbes(wr, mr->hwmr.pbl_table, &mr->hwmr);
2044 return 0; 2150 return 0;
2045} 2151}
@@ -2112,8 +2218,6 @@ int ocrdma_post_send(struct ib_qp *ibqp, struct ib_send_wr *wr,
2112 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT); 2218 hdr->cw |= (OCRDMA_WRITE << OCRDMA_WQE_OPCODE_SHIFT);
2113 status = ocrdma_build_write(qp, hdr, wr); 2219 status = ocrdma_build_write(qp, hdr, wr);
2114 break; 2220 break;
2115 case IB_WR_RDMA_READ_WITH_INV:
2116 hdr->cw |= (OCRDMA_FLAG_INV << OCRDMA_WQE_FLAGS_SHIFT);
2117 case IB_WR_RDMA_READ: 2221 case IB_WR_RDMA_READ:
2118 ocrdma_build_read(qp, hdr, wr); 2222 ocrdma_build_read(qp, hdr, wr);
2119 break; 2223 break;
@@ -2484,8 +2588,11 @@ static bool ocrdma_poll_err_scqe(struct ocrdma_qp *qp,
2484 bool *polled, bool *stop) 2588 bool *polled, bool *stop)
2485{ 2589{
2486 bool expand; 2590 bool expand;
2591 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2487 int status = (le32_to_cpu(cqe->flags_status_srcqpn) & 2592 int status = (le32_to_cpu(cqe->flags_status_srcqpn) &
2488 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT; 2593 OCRDMA_CQE_STATUS_MASK) >> OCRDMA_CQE_STATUS_SHIFT;
2594 if (status < OCRDMA_MAX_CQE_ERR)
2595 atomic_inc(&dev->cqe_err_stats[status]);
2489 2596
2490 /* when hw sq is empty, but rq is not empty, so we continue 2597 /* when hw sq is empty, but rq is not empty, so we continue
2491 * to keep the cqe in order to get the cq event again. 2598 * to keep the cqe in order to get the cq event again.
@@ -2604,6 +2711,10 @@ static bool ocrdma_poll_err_rcqe(struct ocrdma_qp *qp, struct ocrdma_cqe *cqe,
2604 int status) 2711 int status)
2605{ 2712{
2606 bool expand; 2713 bool expand;
2714 struct ocrdma_dev *dev = get_ocrdma_dev(qp->ibqp.device);
2715
2716 if (status < OCRDMA_MAX_CQE_ERR)
2717 atomic_inc(&dev->cqe_err_stats[status]);
2607 2718
2608 /* when hw_rq is empty, but wq is not empty, so continue 2719 /* when hw_rq is empty, but wq is not empty, so continue
2609 * to keep the cqe to get the cq event again. 2720 * to keep the cqe to get the cq event again.
diff --git a/drivers/infiniband/hw/qib/qib.h b/drivers/infiniband/hw/qib/qib.h
index c00ae093b6f8..ffd48bfc4923 100644
--- a/drivers/infiniband/hw/qib/qib.h
+++ b/drivers/infiniband/hw/qib/qib.h
@@ -1082,12 +1082,6 @@ struct qib_devdata {
1082 /* control high-level access to EEPROM */ 1082 /* control high-level access to EEPROM */
1083 struct mutex eep_lock; 1083 struct mutex eep_lock;
1084 uint64_t traffic_wds; 1084 uint64_t traffic_wds;
1085 /* active time is kept in seconds, but logged in hours */
1086 atomic_t active_time;
1087 /* Below are nominal shadow of EEPROM, new since last EEPROM update */
1088 uint8_t eep_st_errs[QIB_EEP_LOG_CNT];
1089 uint8_t eep_st_new_errs[QIB_EEP_LOG_CNT];
1090 uint16_t eep_hrs;
1091 /* 1085 /*
1092 * masks for which bits of errs, hwerrs that cause 1086 * masks for which bits of errs, hwerrs that cause
1093 * each of the counters to increment. 1087 * each of the counters to increment.
@@ -1309,8 +1303,7 @@ int qib_twsi_blk_rd(struct qib_devdata *dd, int dev, int addr, void *buffer,
1309int qib_twsi_blk_wr(struct qib_devdata *dd, int dev, int addr, 1303int qib_twsi_blk_wr(struct qib_devdata *dd, int dev, int addr,
1310 const void *buffer, int len); 1304 const void *buffer, int len);
1311void qib_get_eeprom_info(struct qib_devdata *); 1305void qib_get_eeprom_info(struct qib_devdata *);
1312int qib_update_eeprom_log(struct qib_devdata *dd); 1306#define qib_inc_eeprom_err(dd, eidx, incr)
1313void qib_inc_eeprom_err(struct qib_devdata *dd, u32 eidx, u32 incr);
1314void qib_dump_lookup_output_queue(struct qib_devdata *); 1307void qib_dump_lookup_output_queue(struct qib_devdata *);
1315void qib_force_pio_avail_update(struct qib_devdata *); 1308void qib_force_pio_avail_update(struct qib_devdata *);
1316void qib_clear_symerror_on_linkup(unsigned long opaque); 1309void qib_clear_symerror_on_linkup(unsigned long opaque);
@@ -1467,11 +1460,14 @@ const char *qib_get_unit_name(int unit);
1467 * Flush write combining store buffers (if present) and perform a write 1460 * Flush write combining store buffers (if present) and perform a write
1468 * barrier. 1461 * barrier.
1469 */ 1462 */
1463static inline void qib_flush_wc(void)
1464{
1470#if defined(CONFIG_X86_64) 1465#if defined(CONFIG_X86_64)
1471#define qib_flush_wc() asm volatile("sfence" : : : "memory") 1466 asm volatile("sfence" : : : "memory");
1472#else 1467#else
1473#define qib_flush_wc() wmb() /* no reorder around wc flush */ 1468 wmb(); /* no reorder around wc flush */
1474#endif 1469#endif
1470}
1475 1471
1476/* global module parameter variables */ 1472/* global module parameter variables */
1477extern unsigned qib_ibmtu; 1473extern unsigned qib_ibmtu;
diff --git a/drivers/infiniband/hw/qib/qib_common.h b/drivers/infiniband/hw/qib/qib_common.h
index 5670ace27c63..4fb78abd8ba1 100644
--- a/drivers/infiniband/hw/qib/qib_common.h
+++ b/drivers/infiniband/hw/qib/qib_common.h
@@ -257,7 +257,7 @@ struct qib_base_info {
257 257
258 /* shared memory page for send buffer disarm status */ 258 /* shared memory page for send buffer disarm status */
259 __u64 spi_sendbuf_status; 259 __u64 spi_sendbuf_status;
260} __attribute__ ((aligned(8))); 260} __aligned(8);
261 261
262/* 262/*
263 * This version number is given to the driver by the user code during 263 * This version number is given to the driver by the user code during
@@ -361,7 +361,7 @@ struct qib_user_info {
361 */ 361 */
362 __u64 spu_base_info; 362 __u64 spu_base_info;
363 363
364} __attribute__ ((aligned(8))); 364} __aligned(8);
365 365
366/* User commands. */ 366/* User commands. */
367 367
diff --git a/drivers/infiniband/hw/qib/qib_debugfs.c b/drivers/infiniband/hw/qib/qib_debugfs.c
index 6abd3ed3cd51..5e75b43c596b 100644
--- a/drivers/infiniband/hw/qib/qib_debugfs.c
+++ b/drivers/infiniband/hw/qib/qib_debugfs.c
@@ -255,7 +255,6 @@ void qib_dbg_ibdev_init(struct qib_ibdev *ibd)
255 DEBUGFS_FILE_CREATE(opcode_stats); 255 DEBUGFS_FILE_CREATE(opcode_stats);
256 DEBUGFS_FILE_CREATE(ctx_stats); 256 DEBUGFS_FILE_CREATE(ctx_stats);
257 DEBUGFS_FILE_CREATE(qp_stats); 257 DEBUGFS_FILE_CREATE(qp_stats);
258 return;
259} 258}
260 259
261void qib_dbg_ibdev_exit(struct qib_ibdev *ibd) 260void qib_dbg_ibdev_exit(struct qib_ibdev *ibd)
diff --git a/drivers/infiniband/hw/qib/qib_diag.c b/drivers/infiniband/hw/qib/qib_diag.c
index 5dfda4c5cc9c..8c34b23e5bf6 100644
--- a/drivers/infiniband/hw/qib/qib_diag.c
+++ b/drivers/infiniband/hw/qib/qib_diag.c
@@ -85,7 +85,7 @@ static struct qib_diag_client *get_client(struct qib_devdata *dd)
85 client_pool = dc->next; 85 client_pool = dc->next;
86 else 86 else
87 /* None in pool, alloc and init */ 87 /* None in pool, alloc and init */
88 dc = kmalloc(sizeof *dc, GFP_KERNEL); 88 dc = kmalloc(sizeof(*dc), GFP_KERNEL);
89 89
90 if (dc) { 90 if (dc) {
91 dc->next = NULL; 91 dc->next = NULL;
@@ -257,6 +257,7 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset,
257 if (dd->userbase) { 257 if (dd->userbase) {
258 /* If user regs mapped, they are after send, so set limit. */ 258 /* If user regs mapped, they are after send, so set limit. */
259 u32 ulim = (dd->cfgctxts * dd->ureg_align) + dd->uregbase; 259 u32 ulim = (dd->cfgctxts * dd->ureg_align) + dd->uregbase;
260
260 if (!dd->piovl15base) 261 if (!dd->piovl15base)
261 snd_lim = dd->uregbase; 262 snd_lim = dd->uregbase;
262 krb32 = (u32 __iomem *)dd->userbase; 263 krb32 = (u32 __iomem *)dd->userbase;
@@ -280,6 +281,7 @@ static u32 __iomem *qib_remap_ioaddr32(struct qib_devdata *dd, u32 offset,
280 snd_bottom = dd->pio2k_bufbase; 281 snd_bottom = dd->pio2k_bufbase;
281 if (snd_lim == 0) { 282 if (snd_lim == 0) {
282 u32 tot2k = dd->piobcnt2k * ALIGN(dd->piosize2k, dd->palign); 283 u32 tot2k = dd->piobcnt2k * ALIGN(dd->piosize2k, dd->palign);
284
283 snd_lim = snd_bottom + tot2k; 285 snd_lim = snd_bottom + tot2k;
284 } 286 }
285 /* If 4k buffers exist, account for them by bumping 287 /* If 4k buffers exist, account for them by bumping
@@ -398,6 +400,7 @@ static int qib_write_umem64(struct qib_devdata *dd, u32 regoffs,
398 /* not very efficient, but it works for now */ 400 /* not very efficient, but it works for now */
399 while (reg_addr < reg_end) { 401 while (reg_addr < reg_end) {
400 u64 data; 402 u64 data;
403
401 if (copy_from_user(&data, uaddr, sizeof(data))) { 404 if (copy_from_user(&data, uaddr, sizeof(data))) {
402 ret = -EFAULT; 405 ret = -EFAULT;
403 goto bail; 406 goto bail;
@@ -698,7 +701,7 @@ int qib_register_observer(struct qib_devdata *dd,
698 701
699 if (!dd || !op) 702 if (!dd || !op)
700 return -EINVAL; 703 return -EINVAL;
701 olp = vmalloc(sizeof *olp); 704 olp = vmalloc(sizeof(*olp));
702 if (!olp) { 705 if (!olp) {
703 pr_err("vmalloc for observer failed\n"); 706 pr_err("vmalloc for observer failed\n");
704 return -ENOMEM; 707 return -ENOMEM;
@@ -796,6 +799,7 @@ static ssize_t qib_diag_read(struct file *fp, char __user *data,
796 op = diag_get_observer(dd, *off); 799 op = diag_get_observer(dd, *off);
797 if (op) { 800 if (op) {
798 u32 offset = *off; 801 u32 offset = *off;
802
799 ret = op->hook(dd, op, offset, &data64, 0, use_32); 803 ret = op->hook(dd, op, offset, &data64, 0, use_32);
800 } 804 }
801 /* 805 /*
@@ -873,6 +877,7 @@ static ssize_t qib_diag_write(struct file *fp, const char __user *data,
873 if (count == 4 || count == 8) { 877 if (count == 4 || count == 8) {
874 u64 data64; 878 u64 data64;
875 u32 offset = *off; 879 u32 offset = *off;
880
876 ret = copy_from_user(&data64, data, count); 881 ret = copy_from_user(&data64, data, count);
877 if (ret) { 882 if (ret) {
878 ret = -EFAULT; 883 ret = -EFAULT;
diff --git a/drivers/infiniband/hw/qib/qib_driver.c b/drivers/infiniband/hw/qib/qib_driver.c
index 5bee08f16d74..f58fdc3d25a2 100644
--- a/drivers/infiniband/hw/qib/qib_driver.c
+++ b/drivers/infiniband/hw/qib/qib_driver.c
@@ -86,7 +86,7 @@ const char *qib_get_unit_name(int unit)
86{ 86{
87 static char iname[16]; 87 static char iname[16];
88 88
89 snprintf(iname, sizeof iname, "infinipath%u", unit); 89 snprintf(iname, sizeof(iname), "infinipath%u", unit);
90 return iname; 90 return iname;
91} 91}
92 92
@@ -349,6 +349,7 @@ static u32 qib_rcv_hdrerr(struct qib_ctxtdata *rcd, struct qib_pportdata *ppd,
349 qp_num = be32_to_cpu(ohdr->bth[1]) & QIB_QPN_MASK; 349 qp_num = be32_to_cpu(ohdr->bth[1]) & QIB_QPN_MASK;
350 if (qp_num != QIB_MULTICAST_QPN) { 350 if (qp_num != QIB_MULTICAST_QPN) {
351 int ruc_res; 351 int ruc_res;
352
352 qp = qib_lookup_qpn(ibp, qp_num); 353 qp = qib_lookup_qpn(ibp, qp_num);
353 if (!qp) 354 if (!qp)
354 goto drop; 355 goto drop;
@@ -461,6 +462,7 @@ u32 qib_kreceive(struct qib_ctxtdata *rcd, u32 *llic, u32 *npkts)
461 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset; 462 rhf_addr = (__le32 *) rcd->rcvhdrq + l + dd->rhf_offset;
462 if (dd->flags & QIB_NODMA_RTAIL) { 463 if (dd->flags & QIB_NODMA_RTAIL) {
463 u32 seq = qib_hdrget_seq(rhf_addr); 464 u32 seq = qib_hdrget_seq(rhf_addr);
465
464 if (seq != rcd->seq_cnt) 466 if (seq != rcd->seq_cnt)
465 goto bail; 467 goto bail;
466 hdrqtail = 0; 468 hdrqtail = 0;
@@ -651,6 +653,7 @@ bail:
651int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc) 653int qib_set_lid(struct qib_pportdata *ppd, u32 lid, u8 lmc)
652{ 654{
653 struct qib_devdata *dd = ppd->dd; 655 struct qib_devdata *dd = ppd->dd;
656
654 ppd->lid = lid; 657 ppd->lid = lid;
655 ppd->lmc = lmc; 658 ppd->lmc = lmc;
656 659
diff --git a/drivers/infiniband/hw/qib/qib_eeprom.c b/drivers/infiniband/hw/qib/qib_eeprom.c
index 4d5d71aaa2b4..311ee6c3dd5e 100644
--- a/drivers/infiniband/hw/qib/qib_eeprom.c
+++ b/drivers/infiniband/hw/qib/qib_eeprom.c
@@ -153,6 +153,7 @@ void qib_get_eeprom_info(struct qib_devdata *dd)
153 153
154 if (t && dd0->nguid > 1 && t <= dd0->nguid) { 154 if (t && dd0->nguid > 1 && t <= dd0->nguid) {
155 u8 oguid; 155 u8 oguid;
156
156 dd->base_guid = dd0->base_guid; 157 dd->base_guid = dd0->base_guid;
157 bguid = (u8 *) &dd->base_guid; 158 bguid = (u8 *) &dd->base_guid;
158 159
@@ -251,206 +252,25 @@ void qib_get_eeprom_info(struct qib_devdata *dd)
251 * This board has a Serial-prefix, which is stored 252 * This board has a Serial-prefix, which is stored
252 * elsewhere for backward-compatibility. 253 * elsewhere for backward-compatibility.
253 */ 254 */
254 memcpy(snp, ifp->if_sprefix, sizeof ifp->if_sprefix); 255 memcpy(snp, ifp->if_sprefix, sizeof(ifp->if_sprefix));
255 snp[sizeof ifp->if_sprefix] = '\0'; 256 snp[sizeof(ifp->if_sprefix)] = '\0';
256 len = strlen(snp); 257 len = strlen(snp);
257 snp += len; 258 snp += len;
258 len = (sizeof dd->serial) - len; 259 len = sizeof(dd->serial) - len;
259 if (len > sizeof ifp->if_serial) 260 if (len > sizeof(ifp->if_serial))
260 len = sizeof ifp->if_serial; 261 len = sizeof(ifp->if_serial);
261 memcpy(snp, ifp->if_serial, len); 262 memcpy(snp, ifp->if_serial, len);
262 } else 263 } else {
263 memcpy(dd->serial, ifp->if_serial, 264 memcpy(dd->serial, ifp->if_serial, sizeof(ifp->if_serial));
264 sizeof ifp->if_serial); 265 }
265 if (!strstr(ifp->if_comment, "Tested successfully")) 266 if (!strstr(ifp->if_comment, "Tested successfully"))
266 qib_dev_err(dd, 267 qib_dev_err(dd,
267 "Board SN %s did not pass functional test: %s\n", 268 "Board SN %s did not pass functional test: %s\n",
268 dd->serial, ifp->if_comment); 269 dd->serial, ifp->if_comment);
269 270
270 memcpy(&dd->eep_st_errs, &ifp->if_errcntp, QIB_EEP_LOG_CNT);
271 /*
272 * Power-on (actually "active") hours are kept as little-endian value
273 * in EEPROM, but as seconds in a (possibly as small as 24-bit)
274 * atomic_t while running.
275 */
276 atomic_set(&dd->active_time, 0);
277 dd->eep_hrs = ifp->if_powerhour[0] | (ifp->if_powerhour[1] << 8);
278
279done: 271done:
280 vfree(buf); 272 vfree(buf);
281 273
282bail:; 274bail:;
283} 275}
284 276
285/**
286 * qib_update_eeprom_log - copy active-time and error counters to eeprom
287 * @dd: the qlogic_ib device
288 *
289 * Although the time is kept as seconds in the qib_devdata struct, it is
290 * rounded to hours for re-write, as we have only 16 bits in EEPROM.
291 * First-cut code reads whole (expected) struct qib_flash, modifies,
292 * re-writes. Future direction: read/write only what we need, assuming
293 * that the EEPROM had to have been "good enough" for driver init, and
294 * if not, we aren't making it worse.
295 *
296 */
297int qib_update_eeprom_log(struct qib_devdata *dd)
298{
299 void *buf;
300 struct qib_flash *ifp;
301 int len, hi_water;
302 uint32_t new_time, new_hrs;
303 u8 csum;
304 int ret, idx;
305 unsigned long flags;
306
307 /* first, check if we actually need to do anything. */
308 ret = 0;
309 for (idx = 0; idx < QIB_EEP_LOG_CNT; ++idx) {
310 if (dd->eep_st_new_errs[idx]) {
311 ret = 1;
312 break;
313 }
314 }
315 new_time = atomic_read(&dd->active_time);
316
317 if (ret == 0 && new_time < 3600)
318 goto bail;
319
320 /*
321 * The quick-check above determined that there is something worthy
322 * of logging, so get current contents and do a more detailed idea.
323 * read full flash, not just currently used part, since it may have
324 * been written with a newer definition
325 */
326 len = sizeof(struct qib_flash);
327 buf = vmalloc(len);
328 ret = 1;
329 if (!buf) {
330 qib_dev_err(dd,
331 "Couldn't allocate memory to read %u bytes from eeprom for logging\n",
332 len);
333 goto bail;
334 }
335
336 /* Grab semaphore and read current EEPROM. If we get an
337 * error, let go, but if not, keep it until we finish write.
338 */
339 ret = mutex_lock_interruptible(&dd->eep_lock);
340 if (ret) {
341 qib_dev_err(dd, "Unable to acquire EEPROM for logging\n");
342 goto free_bail;
343 }
344 ret = qib_twsi_blk_rd(dd, dd->twsi_eeprom_dev, 0, buf, len);
345 if (ret) {
346 mutex_unlock(&dd->eep_lock);
347 qib_dev_err(dd, "Unable read EEPROM for logging\n");
348 goto free_bail;
349 }
350 ifp = (struct qib_flash *)buf;
351
352 csum = flash_csum(ifp, 0);
353 if (csum != ifp->if_csum) {
354 mutex_unlock(&dd->eep_lock);
355 qib_dev_err(dd, "EEPROM cks err (0x%02X, S/B 0x%02X)\n",
356 csum, ifp->if_csum);
357 ret = 1;
358 goto free_bail;
359 }
360 hi_water = 0;
361 spin_lock_irqsave(&dd->eep_st_lock, flags);
362 for (idx = 0; idx < QIB_EEP_LOG_CNT; ++idx) {
363 int new_val = dd->eep_st_new_errs[idx];
364 if (new_val) {
365 /*
366 * If we have seen any errors, add to EEPROM values
367 * We need to saturate at 0xFF (255) and we also
368 * would need to adjust the checksum if we were
369 * trying to minimize EEPROM traffic
370 * Note that we add to actual current count in EEPROM,
371 * in case it was altered while we were running.
372 */
373 new_val += ifp->if_errcntp[idx];
374 if (new_val > 0xFF)
375 new_val = 0xFF;
376 if (ifp->if_errcntp[idx] != new_val) {
377 ifp->if_errcntp[idx] = new_val;
378 hi_water = offsetof(struct qib_flash,
379 if_errcntp) + idx;
380 }
381 /*
382 * update our shadow (used to minimize EEPROM
383 * traffic), to match what we are about to write.
384 */
385 dd->eep_st_errs[idx] = new_val;
386 dd->eep_st_new_errs[idx] = 0;
387 }
388 }
389 /*
390 * Now update active-time. We would like to round to the nearest hour
391 * but unless atomic_t are sure to be proper signed ints we cannot,
392 * because we need to account for what we "transfer" to EEPROM and
393 * if we log an hour at 31 minutes, then we would need to set
394 * active_time to -29 to accurately count the _next_ hour.
395 */
396 if (new_time >= 3600) {
397 new_hrs = new_time / 3600;
398 atomic_sub((new_hrs * 3600), &dd->active_time);
399 new_hrs += dd->eep_hrs;
400 if (new_hrs > 0xFFFF)
401 new_hrs = 0xFFFF;
402 dd->eep_hrs = new_hrs;
403 if ((new_hrs & 0xFF) != ifp->if_powerhour[0]) {
404 ifp->if_powerhour[0] = new_hrs & 0xFF;
405 hi_water = offsetof(struct qib_flash, if_powerhour);
406 }
407 if ((new_hrs >> 8) != ifp->if_powerhour[1]) {
408 ifp->if_powerhour[1] = new_hrs >> 8;
409 hi_water = offsetof(struct qib_flash, if_powerhour) + 1;
410 }
411 }
412 /*
413 * There is a tiny possibility that we could somehow fail to write
414 * the EEPROM after updating our shadows, but problems from holding
415 * the spinlock too long are a much bigger issue.
416 */
417 spin_unlock_irqrestore(&dd->eep_st_lock, flags);
418 if (hi_water) {
419 /* we made some change to the data, uopdate cksum and write */
420 csum = flash_csum(ifp, 1);
421 ret = eeprom_write_with_enable(dd, 0, buf, hi_water + 1);
422 }
423 mutex_unlock(&dd->eep_lock);
424 if (ret)
425 qib_dev_err(dd, "Failed updating EEPROM\n");
426
427free_bail:
428 vfree(buf);
429bail:
430 return ret;
431}
432
433/**
434 * qib_inc_eeprom_err - increment one of the four error counters
435 * that are logged to EEPROM.
436 * @dd: the qlogic_ib device
437 * @eidx: 0..3, the counter to increment
438 * @incr: how much to add
439 *
440 * Each counter is 8-bits, and saturates at 255 (0xFF). They
441 * are copied to the EEPROM (aka flash) whenever qib_update_eeprom_log()
442 * is called, but it can only be called in a context that allows sleep.
443 * This function can be called even at interrupt level.
444 */
445void qib_inc_eeprom_err(struct qib_devdata *dd, u32 eidx, u32 incr)
446{
447 uint new_val;
448 unsigned long flags;
449
450 spin_lock_irqsave(&dd->eep_st_lock, flags);
451 new_val = dd->eep_st_new_errs[eidx] + incr;
452 if (new_val > 255)
453 new_val = 255;
454 dd->eep_st_new_errs[eidx] = new_val;
455 spin_unlock_irqrestore(&dd->eep_st_lock, flags);
456}
diff --git a/drivers/infiniband/hw/qib/qib_file_ops.c b/drivers/infiniband/hw/qib/qib_file_ops.c
index b15e34eeef68..41937c6f888a 100644
--- a/drivers/infiniband/hw/qib/qib_file_ops.c
+++ b/drivers/infiniband/hw/qib/qib_file_ops.c
@@ -351,9 +351,10 @@ static int qib_tid_update(struct qib_ctxtdata *rcd, struct file *fp,
351 * unless perhaps the user has mpin'ed the pages 351 * unless perhaps the user has mpin'ed the pages
352 * themselves. 352 * themselves.
353 */ 353 */
354 qib_devinfo(dd->pcidev, 354 qib_devinfo(
355 "Failed to lock addr %p, %u pages: " 355 dd->pcidev,
356 "errno %d\n", (void *) vaddr, cnt, -ret); 356 "Failed to lock addr %p, %u pages: errno %d\n",
357 (void *) vaddr, cnt, -ret);
357 goto done; 358 goto done;
358 } 359 }
359 for (i = 0; i < cnt; i++, vaddr += PAGE_SIZE) { 360 for (i = 0; i < cnt; i++, vaddr += PAGE_SIZE) {
@@ -437,7 +438,7 @@ cleanup:
437 goto cleanup; 438 goto cleanup;
438 } 439 }
439 if (copy_to_user((void __user *) (unsigned long) ti->tidmap, 440 if (copy_to_user((void __user *) (unsigned long) ti->tidmap,
440 tidmap, sizeof tidmap)) { 441 tidmap, sizeof(tidmap))) {
441 ret = -EFAULT; 442 ret = -EFAULT;
442 goto cleanup; 443 goto cleanup;
443 } 444 }
@@ -484,7 +485,7 @@ static int qib_tid_free(struct qib_ctxtdata *rcd, unsigned subctxt,
484 } 485 }
485 486
486 if (copy_from_user(tidmap, (void __user *)(unsigned long)ti->tidmap, 487 if (copy_from_user(tidmap, (void __user *)(unsigned long)ti->tidmap,
487 sizeof tidmap)) { 488 sizeof(tidmap))) {
488 ret = -EFAULT; 489 ret = -EFAULT;
489 goto done; 490 goto done;
490 } 491 }
@@ -951,8 +952,8 @@ static int mmap_kvaddr(struct vm_area_struct *vma, u64 pgaddr,
951 /* rcvegrbufs are read-only on the slave */ 952 /* rcvegrbufs are read-only on the slave */
952 if (vma->vm_flags & VM_WRITE) { 953 if (vma->vm_flags & VM_WRITE) {
953 qib_devinfo(dd->pcidev, 954 qib_devinfo(dd->pcidev,
954 "Can't map eager buffers as " 955 "Can't map eager buffers as writable (flags=%lx)\n",
955 "writable (flags=%lx)\n", vma->vm_flags); 956 vma->vm_flags);
956 ret = -EPERM; 957 ret = -EPERM;
957 goto bail; 958 goto bail;
958 } 959 }
@@ -1185,6 +1186,7 @@ static void assign_ctxt_affinity(struct file *fp, struct qib_devdata *dd)
1185 */ 1186 */
1186 if (weight >= qib_cpulist_count) { 1187 if (weight >= qib_cpulist_count) {
1187 int cpu; 1188 int cpu;
1189
1188 cpu = find_first_zero_bit(qib_cpulist, 1190 cpu = find_first_zero_bit(qib_cpulist,
1189 qib_cpulist_count); 1191 qib_cpulist_count);
1190 if (cpu == qib_cpulist_count) 1192 if (cpu == qib_cpulist_count)
@@ -1247,10 +1249,7 @@ static int init_subctxts(struct qib_devdata *dd,
1247 if (!qib_compatible_subctxts(uinfo->spu_userversion >> 16, 1249 if (!qib_compatible_subctxts(uinfo->spu_userversion >> 16,
1248 uinfo->spu_userversion & 0xffff)) { 1250 uinfo->spu_userversion & 0xffff)) {
1249 qib_devinfo(dd->pcidev, 1251 qib_devinfo(dd->pcidev,
1250 "Mismatched user version (%d.%d) and driver " 1252 "Mismatched user version (%d.%d) and driver version (%d.%d) while context sharing. Ensure that driver and library are from the same release.\n",
1251 "version (%d.%d) while context sharing. Ensure "
1252 "that driver and library are from the same "
1253 "release.\n",
1254 (int) (uinfo->spu_userversion >> 16), 1253 (int) (uinfo->spu_userversion >> 16),
1255 (int) (uinfo->spu_userversion & 0xffff), 1254 (int) (uinfo->spu_userversion & 0xffff),
1256 QIB_USER_SWMAJOR, QIB_USER_SWMINOR); 1255 QIB_USER_SWMAJOR, QIB_USER_SWMINOR);
@@ -1391,6 +1390,7 @@ static int choose_port_ctxt(struct file *fp, struct qib_devdata *dd, u32 port,
1391 } 1390 }
1392 if (!ppd) { 1391 if (!ppd) {
1393 u32 pidx = ctxt % dd->num_pports; 1392 u32 pidx = ctxt % dd->num_pports;
1393
1394 if (usable(dd->pport + pidx)) 1394 if (usable(dd->pport + pidx))
1395 ppd = dd->pport + pidx; 1395 ppd = dd->pport + pidx;
1396 else { 1396 else {
@@ -1438,10 +1438,12 @@ static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo,
1438 1438
1439 if (alg == QIB_PORT_ALG_ACROSS) { 1439 if (alg == QIB_PORT_ALG_ACROSS) {
1440 unsigned inuse = ~0U; 1440 unsigned inuse = ~0U;
1441
1441 /* find device (with ACTIVE ports) with fewest ctxts in use */ 1442 /* find device (with ACTIVE ports) with fewest ctxts in use */
1442 for (ndev = 0; ndev < devmax; ndev++) { 1443 for (ndev = 0; ndev < devmax; ndev++) {
1443 struct qib_devdata *dd = qib_lookup(ndev); 1444 struct qib_devdata *dd = qib_lookup(ndev);
1444 unsigned cused = 0, cfree = 0, pusable = 0; 1445 unsigned cused = 0, cfree = 0, pusable = 0;
1446
1445 if (!dd) 1447 if (!dd)
1446 continue; 1448 continue;
1447 if (port && port <= dd->num_pports && 1449 if (port && port <= dd->num_pports &&
@@ -1471,6 +1473,7 @@ static int get_a_ctxt(struct file *fp, const struct qib_user_info *uinfo,
1471 } else { 1473 } else {
1472 for (ndev = 0; ndev < devmax; ndev++) { 1474 for (ndev = 0; ndev < devmax; ndev++) {
1473 struct qib_devdata *dd = qib_lookup(ndev); 1475 struct qib_devdata *dd = qib_lookup(ndev);
1476
1474 if (dd) { 1477 if (dd) {
1475 ret = choose_port_ctxt(fp, dd, port, uinfo); 1478 ret = choose_port_ctxt(fp, dd, port, uinfo);
1476 if (!ret) 1479 if (!ret)
@@ -1556,6 +1559,7 @@ static int find_hca(unsigned int cpu, int *unit)
1556 } 1559 }
1557 for (ndev = 0; ndev < devmax; ndev++) { 1560 for (ndev = 0; ndev < devmax; ndev++) {
1558 struct qib_devdata *dd = qib_lookup(ndev); 1561 struct qib_devdata *dd = qib_lookup(ndev);
1562
1559 if (dd) { 1563 if (dd) {
1560 if (pcibus_to_node(dd->pcidev->bus) < 0) { 1564 if (pcibus_to_node(dd->pcidev->bus) < 0) {
1561 ret = -EINVAL; 1565 ret = -EINVAL;
diff --git a/drivers/infiniband/hw/qib/qib_fs.c b/drivers/infiniband/hw/qib/qib_fs.c
index 81854586c081..650897a8591e 100644
--- a/drivers/infiniband/hw/qib/qib_fs.c
+++ b/drivers/infiniband/hw/qib/qib_fs.c
@@ -106,7 +106,7 @@ static ssize_t driver_stats_read(struct file *file, char __user *buf,
106{ 106{
107 qib_stats.sps_ints = qib_sps_ints(); 107 qib_stats.sps_ints = qib_sps_ints();
108 return simple_read_from_buffer(buf, count, ppos, &qib_stats, 108 return simple_read_from_buffer(buf, count, ppos, &qib_stats,
109 sizeof qib_stats); 109 sizeof(qib_stats));
110} 110}
111 111
112/* 112/*
@@ -133,7 +133,7 @@ static ssize_t driver_names_read(struct file *file, char __user *buf,
133 size_t count, loff_t *ppos) 133 size_t count, loff_t *ppos)
134{ 134{
135 return simple_read_from_buffer(buf, count, ppos, qib_statnames, 135 return simple_read_from_buffer(buf, count, ppos, qib_statnames,
136 sizeof qib_statnames - 1); /* no null */ 136 sizeof(qib_statnames) - 1); /* no null */
137} 137}
138 138
139static const struct file_operations driver_ops[] = { 139static const struct file_operations driver_ops[] = {
@@ -379,7 +379,7 @@ static int add_cntr_files(struct super_block *sb, struct qib_devdata *dd)
379 int ret, i; 379 int ret, i;
380 380
381 /* create the per-unit directory */ 381 /* create the per-unit directory */
382 snprintf(unit, sizeof unit, "%u", dd->unit); 382 snprintf(unit, sizeof(unit), "%u", dd->unit);
383 ret = create_file(unit, S_IFDIR|S_IRUGO|S_IXUGO, sb->s_root, &dir, 383 ret = create_file(unit, S_IFDIR|S_IRUGO|S_IXUGO, sb->s_root, &dir,
384 &simple_dir_operations, dd); 384 &simple_dir_operations, dd);
385 if (ret) { 385 if (ret) {
@@ -455,7 +455,7 @@ static int remove_file(struct dentry *parent, char *name)
455 } 455 }
456 456
457 spin_lock(&tmp->d_lock); 457 spin_lock(&tmp->d_lock);
458 if (!(d_unhashed(tmp) && tmp->d_inode)) { 458 if (!d_unhashed(tmp) && tmp->d_inode) {
459 __d_drop(tmp); 459 __d_drop(tmp);
460 spin_unlock(&tmp->d_lock); 460 spin_unlock(&tmp->d_lock);
461 simple_unlink(parent->d_inode, tmp); 461 simple_unlink(parent->d_inode, tmp);
@@ -482,7 +482,7 @@ static int remove_device_files(struct super_block *sb,
482 482
483 root = dget(sb->s_root); 483 root = dget(sb->s_root);
484 mutex_lock(&root->d_inode->i_mutex); 484 mutex_lock(&root->d_inode->i_mutex);
485 snprintf(unit, sizeof unit, "%u", dd->unit); 485 snprintf(unit, sizeof(unit), "%u", dd->unit);
486 dir = lookup_one_len(unit, root, strlen(unit)); 486 dir = lookup_one_len(unit, root, strlen(unit));
487 487
488 if (IS_ERR(dir)) { 488 if (IS_ERR(dir)) {
@@ -560,6 +560,7 @@ static struct dentry *qibfs_mount(struct file_system_type *fs_type, int flags,
560 const char *dev_name, void *data) 560 const char *dev_name, void *data)
561{ 561{
562 struct dentry *ret; 562 struct dentry *ret;
563
563 ret = mount_single(fs_type, flags, data, qibfs_fill_super); 564 ret = mount_single(fs_type, flags, data, qibfs_fill_super);
564 if (!IS_ERR(ret)) 565 if (!IS_ERR(ret))
565 qib_super = ret->d_sb; 566 qib_super = ret->d_sb;
diff --git a/drivers/infiniband/hw/qib/qib_iba6120.c b/drivers/infiniband/hw/qib/qib_iba6120.c
index d68266ac7619..0d2ba59af30a 100644
--- a/drivers/infiniband/hw/qib/qib_iba6120.c
+++ b/drivers/infiniband/hw/qib/qib_iba6120.c
@@ -333,6 +333,7 @@ static inline void qib_write_ureg(const struct qib_devdata *dd,
333 enum qib_ureg regno, u64 value, int ctxt) 333 enum qib_ureg regno, u64 value, int ctxt)
334{ 334{
335 u64 __iomem *ubase; 335 u64 __iomem *ubase;
336
336 if (dd->userbase) 337 if (dd->userbase)
337 ubase = (u64 __iomem *) 338 ubase = (u64 __iomem *)
338 ((char __iomem *) dd->userbase + 339 ((char __iomem *) dd->userbase +
@@ -834,14 +835,14 @@ static void qib_handle_6120_hwerrors(struct qib_devdata *dd, char *msg,
834 bits = (u32) ((hwerrs >> 835 bits = (u32) ((hwerrs >>
835 QLOGIC_IB_HWE_PCIEMEMPARITYERR_SHIFT) & 836 QLOGIC_IB_HWE_PCIEMEMPARITYERR_SHIFT) &
836 QLOGIC_IB_HWE_PCIEMEMPARITYERR_MASK); 837 QLOGIC_IB_HWE_PCIEMEMPARITYERR_MASK);
837 snprintf(bitsmsg, sizeof dd->cspec->bitsmsgbuf, 838 snprintf(bitsmsg, sizeof(dd->cspec->bitsmsgbuf),
838 "[PCIe Mem Parity Errs %x] ", bits); 839 "[PCIe Mem Parity Errs %x] ", bits);
839 strlcat(msg, bitsmsg, msgl); 840 strlcat(msg, bitsmsg, msgl);
840 } 841 }
841 842
842 if (hwerrs & _QIB_PLL_FAIL) { 843 if (hwerrs & _QIB_PLL_FAIL) {
843 isfatal = 1; 844 isfatal = 1;
844 snprintf(bitsmsg, sizeof dd->cspec->bitsmsgbuf, 845 snprintf(bitsmsg, sizeof(dd->cspec->bitsmsgbuf),
845 "[PLL failed (%llx), InfiniPath hardware unusable]", 846 "[PLL failed (%llx), InfiniPath hardware unusable]",
846 (unsigned long long) hwerrs & _QIB_PLL_FAIL); 847 (unsigned long long) hwerrs & _QIB_PLL_FAIL);
847 strlcat(msg, bitsmsg, msgl); 848 strlcat(msg, bitsmsg, msgl);
@@ -1014,7 +1015,7 @@ static void handle_6120_errors(struct qib_devdata *dd, u64 errs)
1014 1015
1015 /* do these first, they are most important */ 1016 /* do these first, they are most important */
1016 if (errs & ERR_MASK(HardwareErr)) 1017 if (errs & ERR_MASK(HardwareErr))
1017 qib_handle_6120_hwerrors(dd, msg, sizeof dd->cspec->emsgbuf); 1018 qib_handle_6120_hwerrors(dd, msg, sizeof(dd->cspec->emsgbuf));
1018 else 1019 else
1019 for (log_idx = 0; log_idx < QIB_EEP_LOG_CNT; ++log_idx) 1020 for (log_idx = 0; log_idx < QIB_EEP_LOG_CNT; ++log_idx)
1020 if (errs & dd->eep_st_masks[log_idx].errs_to_log) 1021 if (errs & dd->eep_st_masks[log_idx].errs_to_log)
@@ -1062,7 +1063,7 @@ static void handle_6120_errors(struct qib_devdata *dd, u64 errs)
1062 */ 1063 */
1063 mask = ERR_MASK(IBStatusChanged) | ERR_MASK(RcvEgrFullErr) | 1064 mask = ERR_MASK(IBStatusChanged) | ERR_MASK(RcvEgrFullErr) |
1064 ERR_MASK(RcvHdrFullErr) | ERR_MASK(HardwareErr); 1065 ERR_MASK(RcvHdrFullErr) | ERR_MASK(HardwareErr);
1065 qib_decode_6120_err(dd, msg, sizeof dd->cspec->emsgbuf, errs & ~mask); 1066 qib_decode_6120_err(dd, msg, sizeof(dd->cspec->emsgbuf), errs & ~mask);
1066 1067
1067 if (errs & E_SUM_PKTERRS) 1068 if (errs & E_SUM_PKTERRS)
1068 qib_stats.sps_rcverrs++; 1069 qib_stats.sps_rcverrs++;
@@ -1670,6 +1671,7 @@ static irqreturn_t qib_6120intr(int irq, void *data)
1670 } 1671 }
1671 if (crcs) { 1672 if (crcs) {
1672 u32 cntr = dd->cspec->lli_counter; 1673 u32 cntr = dd->cspec->lli_counter;
1674
1673 cntr += crcs; 1675 cntr += crcs;
1674 if (cntr) { 1676 if (cntr) {
1675 if (cntr > dd->cspec->lli_thresh) { 1677 if (cntr > dd->cspec->lli_thresh) {
@@ -1722,6 +1724,7 @@ static void qib_setup_6120_interrupt(struct qib_devdata *dd)
1722 "irq is 0, BIOS error? Interrupts won't work\n"); 1724 "irq is 0, BIOS error? Interrupts won't work\n");
1723 else { 1725 else {
1724 int ret; 1726 int ret;
1727
1725 ret = request_irq(dd->cspec->irq, qib_6120intr, 0, 1728 ret = request_irq(dd->cspec->irq, qib_6120intr, 0,
1726 QIB_DRV_NAME, dd); 1729 QIB_DRV_NAME, dd);
1727 if (ret) 1730 if (ret)
@@ -2681,8 +2684,6 @@ static void qib_get_6120_faststats(unsigned long opaque)
2681 spin_lock_irqsave(&dd->eep_st_lock, flags); 2684 spin_lock_irqsave(&dd->eep_st_lock, flags);
2682 traffic_wds -= dd->traffic_wds; 2685 traffic_wds -= dd->traffic_wds;
2683 dd->traffic_wds += traffic_wds; 2686 dd->traffic_wds += traffic_wds;
2684 if (traffic_wds >= QIB_TRAFFIC_ACTIVE_THRESHOLD)
2685 atomic_add(5, &dd->active_time); /* S/B #define */
2686 spin_unlock_irqrestore(&dd->eep_st_lock, flags); 2687 spin_unlock_irqrestore(&dd->eep_st_lock, flags);
2687 2688
2688 qib_chk_6120_errormask(dd); 2689 qib_chk_6120_errormask(dd);
@@ -2929,6 +2930,7 @@ bail:
2929static int qib_6120_set_loopback(struct qib_pportdata *ppd, const char *what) 2930static int qib_6120_set_loopback(struct qib_pportdata *ppd, const char *what)
2930{ 2931{
2931 int ret = 0; 2932 int ret = 0;
2933
2932 if (!strncmp(what, "ibc", 3)) { 2934 if (!strncmp(what, "ibc", 3)) {
2933 ppd->dd->cspec->ibcctrl |= SYM_MASK(IBCCtrl, Loopback); 2935 ppd->dd->cspec->ibcctrl |= SYM_MASK(IBCCtrl, Loopback);
2934 qib_devinfo(ppd->dd->pcidev, "Enabling IB%u:%u IBC loopback\n", 2936 qib_devinfo(ppd->dd->pcidev, "Enabling IB%u:%u IBC loopback\n",
@@ -3170,6 +3172,7 @@ static void get_6120_chip_params(struct qib_devdata *dd)
3170static void set_6120_baseaddrs(struct qib_devdata *dd) 3172static void set_6120_baseaddrs(struct qib_devdata *dd)
3171{ 3173{
3172 u32 cregbase; 3174 u32 cregbase;
3175
3173 cregbase = qib_read_kreg32(dd, kr_counterregbase); 3176 cregbase = qib_read_kreg32(dd, kr_counterregbase);
3174 dd->cspec->cregbase = (u64 __iomem *) 3177 dd->cspec->cregbase = (u64 __iomem *)
3175 ((char __iomem *) dd->kregbase + cregbase); 3178 ((char __iomem *) dd->kregbase + cregbase);
diff --git a/drivers/infiniband/hw/qib/qib_iba7220.c b/drivers/infiniband/hw/qib/qib_iba7220.c
index 7dec89fdc124..22affda8af88 100644
--- a/drivers/infiniband/hw/qib/qib_iba7220.c
+++ b/drivers/infiniband/hw/qib/qib_iba7220.c
@@ -902,7 +902,8 @@ static void sdma_7220_errors(struct qib_pportdata *ppd, u64 errs)
902 errs &= QLOGIC_IB_E_SDMAERRS; 902 errs &= QLOGIC_IB_E_SDMAERRS;
903 903
904 msg = dd->cspec->sdmamsgbuf; 904 msg = dd->cspec->sdmamsgbuf;
905 qib_decode_7220_sdma_errs(ppd, errs, msg, sizeof dd->cspec->sdmamsgbuf); 905 qib_decode_7220_sdma_errs(ppd, errs, msg,
906 sizeof(dd->cspec->sdmamsgbuf));
906 spin_lock_irqsave(&ppd->sdma_lock, flags); 907 spin_lock_irqsave(&ppd->sdma_lock, flags);
907 908
908 if (errs & ERR_MASK(SendBufMisuseErr)) { 909 if (errs & ERR_MASK(SendBufMisuseErr)) {
@@ -1043,6 +1044,7 @@ done:
1043static void reenable_7220_chase(unsigned long opaque) 1044static void reenable_7220_chase(unsigned long opaque)
1044{ 1045{
1045 struct qib_pportdata *ppd = (struct qib_pportdata *)opaque; 1046 struct qib_pportdata *ppd = (struct qib_pportdata *)opaque;
1047
1046 ppd->cpspec->chase_timer.expires = 0; 1048 ppd->cpspec->chase_timer.expires = 0;
1047 qib_set_ib_7220_lstate(ppd, QLOGIC_IB_IBCC_LINKCMD_DOWN, 1049 qib_set_ib_7220_lstate(ppd, QLOGIC_IB_IBCC_LINKCMD_DOWN,
1048 QLOGIC_IB_IBCC_LINKINITCMD_POLL); 1050 QLOGIC_IB_IBCC_LINKINITCMD_POLL);
@@ -1101,7 +1103,7 @@ static void handle_7220_errors(struct qib_devdata *dd, u64 errs)
1101 1103
1102 /* do these first, they are most important */ 1104 /* do these first, they are most important */
1103 if (errs & ERR_MASK(HardwareErr)) 1105 if (errs & ERR_MASK(HardwareErr))
1104 qib_7220_handle_hwerrors(dd, msg, sizeof dd->cspec->emsgbuf); 1106 qib_7220_handle_hwerrors(dd, msg, sizeof(dd->cspec->emsgbuf));
1105 else 1107 else
1106 for (log_idx = 0; log_idx < QIB_EEP_LOG_CNT; ++log_idx) 1108 for (log_idx = 0; log_idx < QIB_EEP_LOG_CNT; ++log_idx)
1107 if (errs & dd->eep_st_masks[log_idx].errs_to_log) 1109 if (errs & dd->eep_st_masks[log_idx].errs_to_log)
@@ -1155,7 +1157,7 @@ static void handle_7220_errors(struct qib_devdata *dd, u64 errs)
1155 ERR_MASK(RcvEgrFullErr) | ERR_MASK(RcvHdrFullErr) | 1157 ERR_MASK(RcvEgrFullErr) | ERR_MASK(RcvHdrFullErr) |
1156 ERR_MASK(HardwareErr) | ERR_MASK(SDmaDisabledErr); 1158 ERR_MASK(HardwareErr) | ERR_MASK(SDmaDisabledErr);
1157 1159
1158 qib_decode_7220_err(dd, msg, sizeof dd->cspec->emsgbuf, errs & ~mask); 1160 qib_decode_7220_err(dd, msg, sizeof(dd->cspec->emsgbuf), errs & ~mask);
1159 1161
1160 if (errs & E_SUM_PKTERRS) 1162 if (errs & E_SUM_PKTERRS)
1161 qib_stats.sps_rcverrs++; 1163 qib_stats.sps_rcverrs++;
@@ -1380,7 +1382,7 @@ static void qib_7220_handle_hwerrors(struct qib_devdata *dd, char *msg,
1380 bits = (u32) ((hwerrs >> 1382 bits = (u32) ((hwerrs >>
1381 QLOGIC_IB_HWE_PCIEMEMPARITYERR_SHIFT) & 1383 QLOGIC_IB_HWE_PCIEMEMPARITYERR_SHIFT) &
1382 QLOGIC_IB_HWE_PCIEMEMPARITYERR_MASK); 1384 QLOGIC_IB_HWE_PCIEMEMPARITYERR_MASK);
1383 snprintf(bitsmsg, sizeof dd->cspec->bitsmsgbuf, 1385 snprintf(bitsmsg, sizeof(dd->cspec->bitsmsgbuf),
1384 "[PCIe Mem Parity Errs %x] ", bits); 1386 "[PCIe Mem Parity Errs %x] ", bits);
1385 strlcat(msg, bitsmsg, msgl); 1387 strlcat(msg, bitsmsg, msgl);
1386 } 1388 }
@@ -1390,7 +1392,7 @@ static void qib_7220_handle_hwerrors(struct qib_devdata *dd, char *msg,
1390 1392
1391 if (hwerrs & _QIB_PLL_FAIL) { 1393 if (hwerrs & _QIB_PLL_FAIL) {
1392 isfatal = 1; 1394 isfatal = 1;
1393 snprintf(bitsmsg, sizeof dd->cspec->bitsmsgbuf, 1395 snprintf(bitsmsg, sizeof(dd->cspec->bitsmsgbuf),
1394 "[PLL failed (%llx), InfiniPath hardware unusable]", 1396 "[PLL failed (%llx), InfiniPath hardware unusable]",
1395 (unsigned long long) hwerrs & _QIB_PLL_FAIL); 1397 (unsigned long long) hwerrs & _QIB_PLL_FAIL);
1396 strlcat(msg, bitsmsg, msgl); 1398 strlcat(msg, bitsmsg, msgl);
@@ -3297,8 +3299,6 @@ static void qib_get_7220_faststats(unsigned long opaque)
3297 spin_lock_irqsave(&dd->eep_st_lock, flags); 3299 spin_lock_irqsave(&dd->eep_st_lock, flags);
3298 traffic_wds -= dd->traffic_wds; 3300 traffic_wds -= dd->traffic_wds;
3299 dd->traffic_wds += traffic_wds; 3301 dd->traffic_wds += traffic_wds;
3300 if (traffic_wds >= QIB_TRAFFIC_ACTIVE_THRESHOLD)
3301 atomic_add(5, &dd->active_time); /* S/B #define */
3302 spin_unlock_irqrestore(&dd->eep_st_lock, flags); 3302 spin_unlock_irqrestore(&dd->eep_st_lock, flags);
3303done: 3303done:
3304 mod_timer(&dd->stats_timer, jiffies + HZ * ACTIVITY_TIMER); 3304 mod_timer(&dd->stats_timer, jiffies + HZ * ACTIVITY_TIMER);
diff --git a/drivers/infiniband/hw/qib/qib_iba7322.c b/drivers/infiniband/hw/qib/qib_iba7322.c
index a7eb32517a04..ef97b71c8f7d 100644
--- a/drivers/infiniband/hw/qib/qib_iba7322.c
+++ b/drivers/infiniband/hw/qib/qib_iba7322.c
@@ -117,7 +117,7 @@ MODULE_PARM_DESC(chase, "Enable state chase handling");
117 117
118static ushort qib_long_atten = 10; /* 10 dB ~= 5m length */ 118static ushort qib_long_atten = 10; /* 10 dB ~= 5m length */
119module_param_named(long_attenuation, qib_long_atten, ushort, S_IRUGO); 119module_param_named(long_attenuation, qib_long_atten, ushort, S_IRUGO);
120MODULE_PARM_DESC(long_attenuation, \ 120MODULE_PARM_DESC(long_attenuation,
121 "attenuation cutoff (dB) for long copper cable setup"); 121 "attenuation cutoff (dB) for long copper cable setup");
122 122
123static ushort qib_singleport; 123static ushort qib_singleport;
@@ -153,11 +153,12 @@ static struct kparam_string kp_txselect = {
153static int setup_txselect(const char *, struct kernel_param *); 153static int setup_txselect(const char *, struct kernel_param *);
154module_param_call(txselect, setup_txselect, param_get_string, 154module_param_call(txselect, setup_txselect, param_get_string,
155 &kp_txselect, S_IWUSR | S_IRUGO); 155 &kp_txselect, S_IWUSR | S_IRUGO);
156MODULE_PARM_DESC(txselect, \ 156MODULE_PARM_DESC(txselect,
157 "Tx serdes indices (for no QSFP or invalid QSFP data)"); 157 "Tx serdes indices (for no QSFP or invalid QSFP data)");
158 158
159#define BOARD_QME7342 5 159#define BOARD_QME7342 5
160#define BOARD_QMH7342 6 160#define BOARD_QMH7342 6
161#define BOARD_QMH7360 9
161#define IS_QMH(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \ 162#define IS_QMH(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \
162 BOARD_QMH7342) 163 BOARD_QMH7342)
163#define IS_QME(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \ 164#define IS_QME(dd) (SYM_FIELD((dd)->revision, Revision, BoardID) == \
@@ -817,6 +818,7 @@ static inline void qib_write_ureg(const struct qib_devdata *dd,
817 enum qib_ureg regno, u64 value, int ctxt) 818 enum qib_ureg regno, u64 value, int ctxt)
818{ 819{
819 u64 __iomem *ubase; 820 u64 __iomem *ubase;
821
820 if (dd->userbase) 822 if (dd->userbase)
821 ubase = (u64 __iomem *) 823 ubase = (u64 __iomem *)
822 ((char __iomem *) dd->userbase + 824 ((char __iomem *) dd->userbase +
@@ -1677,7 +1679,7 @@ static noinline void handle_7322_errors(struct qib_devdata *dd)
1677 /* do these first, they are most important */ 1679 /* do these first, they are most important */
1678 if (errs & QIB_E_HARDWARE) { 1680 if (errs & QIB_E_HARDWARE) {
1679 *msg = '\0'; 1681 *msg = '\0';
1680 qib_7322_handle_hwerrors(dd, msg, sizeof dd->cspec->emsgbuf); 1682 qib_7322_handle_hwerrors(dd, msg, sizeof(dd->cspec->emsgbuf));
1681 } else 1683 } else
1682 for (log_idx = 0; log_idx < QIB_EEP_LOG_CNT; ++log_idx) 1684 for (log_idx = 0; log_idx < QIB_EEP_LOG_CNT; ++log_idx)
1683 if (errs & dd->eep_st_masks[log_idx].errs_to_log) 1685 if (errs & dd->eep_st_masks[log_idx].errs_to_log)
@@ -1702,7 +1704,7 @@ static noinline void handle_7322_errors(struct qib_devdata *dd)
1702 mask = QIB_E_HARDWARE; 1704 mask = QIB_E_HARDWARE;
1703 *msg = '\0'; 1705 *msg = '\0';
1704 1706
1705 err_decode(msg, sizeof dd->cspec->emsgbuf, errs & ~mask, 1707 err_decode(msg, sizeof(dd->cspec->emsgbuf), errs & ~mask,
1706 qib_7322error_msgs); 1708 qib_7322error_msgs);
1707 1709
1708 /* 1710 /*
@@ -1889,10 +1891,10 @@ static noinline void handle_7322_p_errors(struct qib_pportdata *ppd)
1889 *msg = '\0'; 1891 *msg = '\0';
1890 1892
1891 if (errs & ~QIB_E_P_BITSEXTANT) { 1893 if (errs & ~QIB_E_P_BITSEXTANT) {
1892 err_decode(msg, sizeof ppd->cpspec->epmsgbuf, 1894 err_decode(msg, sizeof(ppd->cpspec->epmsgbuf),
1893 errs & ~QIB_E_P_BITSEXTANT, qib_7322p_error_msgs); 1895 errs & ~QIB_E_P_BITSEXTANT, qib_7322p_error_msgs);
1894 if (!*msg) 1896 if (!*msg)
1895 snprintf(msg, sizeof ppd->cpspec->epmsgbuf, 1897 snprintf(msg, sizeof(ppd->cpspec->epmsgbuf),
1896 "no others"); 1898 "no others");
1897 qib_dev_porterr(dd, ppd->port, 1899 qib_dev_porterr(dd, ppd->port,
1898 "error interrupt with unknown errors 0x%016Lx set (and %s)\n", 1900 "error interrupt with unknown errors 0x%016Lx set (and %s)\n",
@@ -1906,7 +1908,7 @@ static noinline void handle_7322_p_errors(struct qib_pportdata *ppd)
1906 /* determine cause, then write to clear */ 1908 /* determine cause, then write to clear */
1907 symptom = qib_read_kreg_port(ppd, krp_sendhdrsymptom); 1909 symptom = qib_read_kreg_port(ppd, krp_sendhdrsymptom);
1908 qib_write_kreg_port(ppd, krp_sendhdrsymptom, 0); 1910 qib_write_kreg_port(ppd, krp_sendhdrsymptom, 0);
1909 err_decode(msg, sizeof ppd->cpspec->epmsgbuf, symptom, 1911 err_decode(msg, sizeof(ppd->cpspec->epmsgbuf), symptom,
1910 hdrchk_msgs); 1912 hdrchk_msgs);
1911 *msg = '\0'; 1913 *msg = '\0';
1912 /* senderrbuf cleared in SPKTERRS below */ 1914 /* senderrbuf cleared in SPKTERRS below */
@@ -1922,7 +1924,7 @@ static noinline void handle_7322_p_errors(struct qib_pportdata *ppd)
1922 * isn't valid. We don't want to confuse people, so 1924 * isn't valid. We don't want to confuse people, so
1923 * we just don't print them, except at debug 1925 * we just don't print them, except at debug
1924 */ 1926 */
1925 err_decode(msg, sizeof ppd->cpspec->epmsgbuf, 1927 err_decode(msg, sizeof(ppd->cpspec->epmsgbuf),
1926 (errs & QIB_E_P_LINK_PKTERRS), 1928 (errs & QIB_E_P_LINK_PKTERRS),
1927 qib_7322p_error_msgs); 1929 qib_7322p_error_msgs);
1928 *msg = '\0'; 1930 *msg = '\0';
@@ -1938,7 +1940,7 @@ static noinline void handle_7322_p_errors(struct qib_pportdata *ppd)
1938 * valid. We don't want to confuse people, so we just 1940 * valid. We don't want to confuse people, so we just
1939 * don't print them, except at debug 1941 * don't print them, except at debug
1940 */ 1942 */
1941 err_decode(msg, sizeof ppd->cpspec->epmsgbuf, errs, 1943 err_decode(msg, sizeof(ppd->cpspec->epmsgbuf), errs,
1942 qib_7322p_error_msgs); 1944 qib_7322p_error_msgs);
1943 ignore_this_time = errs & QIB_E_P_LINK_PKTERRS; 1945 ignore_this_time = errs & QIB_E_P_LINK_PKTERRS;
1944 *msg = '\0'; 1946 *msg = '\0';
@@ -2031,6 +2033,7 @@ static void qib_7322_set_intr_state(struct qib_devdata *dd, u32 enable)
2031 if (dd->cspec->num_msix_entries) { 2033 if (dd->cspec->num_msix_entries) {
2032 /* and same for MSIx */ 2034 /* and same for MSIx */
2033 u64 val = qib_read_kreg64(dd, kr_intgranted); 2035 u64 val = qib_read_kreg64(dd, kr_intgranted);
2036
2034 if (val) 2037 if (val)
2035 qib_write_kreg(dd, kr_intgranted, val); 2038 qib_write_kreg(dd, kr_intgranted, val);
2036 } 2039 }
@@ -2176,6 +2179,7 @@ static void qib_7322_handle_hwerrors(struct qib_devdata *dd, char *msg,
2176 int err; 2179 int err;
2177 unsigned long flags; 2180 unsigned long flags;
2178 struct qib_pportdata *ppd = dd->pport; 2181 struct qib_pportdata *ppd = dd->pport;
2182
2179 for (; pidx < dd->num_pports; ++pidx, ppd++) { 2183 for (; pidx < dd->num_pports; ++pidx, ppd++) {
2180 err = 0; 2184 err = 0;
2181 if (pidx == 0 && (hwerrs & 2185 if (pidx == 0 && (hwerrs &
@@ -2801,9 +2805,11 @@ static void qib_irq_notifier_notify(struct irq_affinity_notify *notify,
2801 2805
2802 if (n->rcv) { 2806 if (n->rcv) {
2803 struct qib_ctxtdata *rcd = (struct qib_ctxtdata *)n->arg; 2807 struct qib_ctxtdata *rcd = (struct qib_ctxtdata *)n->arg;
2808
2804 qib_update_rhdrq_dca(rcd, cpu); 2809 qib_update_rhdrq_dca(rcd, cpu);
2805 } else { 2810 } else {
2806 struct qib_pportdata *ppd = (struct qib_pportdata *)n->arg; 2811 struct qib_pportdata *ppd = (struct qib_pportdata *)n->arg;
2812
2807 qib_update_sdma_dca(ppd, cpu); 2813 qib_update_sdma_dca(ppd, cpu);
2808 } 2814 }
2809} 2815}
@@ -2816,9 +2822,11 @@ static void qib_irq_notifier_release(struct kref *ref)
2816 2822
2817 if (n->rcv) { 2823 if (n->rcv) {
2818 struct qib_ctxtdata *rcd = (struct qib_ctxtdata *)n->arg; 2824 struct qib_ctxtdata *rcd = (struct qib_ctxtdata *)n->arg;
2825
2819 dd = rcd->dd; 2826 dd = rcd->dd;
2820 } else { 2827 } else {
2821 struct qib_pportdata *ppd = (struct qib_pportdata *)n->arg; 2828 struct qib_pportdata *ppd = (struct qib_pportdata *)n->arg;
2829
2822 dd = ppd->dd; 2830 dd = ppd->dd;
2823 } 2831 }
2824 qib_devinfo(dd->pcidev, 2832 qib_devinfo(dd->pcidev,
@@ -2994,6 +3002,7 @@ static noinline void unknown_7322_gpio_intr(struct qib_devdata *dd)
2994 struct qib_pportdata *ppd; 3002 struct qib_pportdata *ppd;
2995 struct qib_qsfp_data *qd; 3003 struct qib_qsfp_data *qd;
2996 u32 mask; 3004 u32 mask;
3005
2997 if (!dd->pport[pidx].link_speed_supported) 3006 if (!dd->pport[pidx].link_speed_supported)
2998 continue; 3007 continue;
2999 mask = QSFP_GPIO_MOD_PRS_N; 3008 mask = QSFP_GPIO_MOD_PRS_N;
@@ -3001,6 +3010,7 @@ static noinline void unknown_7322_gpio_intr(struct qib_devdata *dd)
3001 mask <<= (QSFP_GPIO_PORT2_SHIFT * ppd->hw_pidx); 3010 mask <<= (QSFP_GPIO_PORT2_SHIFT * ppd->hw_pidx);
3002 if (gpiostatus & dd->cspec->gpio_mask & mask) { 3011 if (gpiostatus & dd->cspec->gpio_mask & mask) {
3003 u64 pins; 3012 u64 pins;
3013
3004 qd = &ppd->cpspec->qsfp_data; 3014 qd = &ppd->cpspec->qsfp_data;
3005 gpiostatus &= ~mask; 3015 gpiostatus &= ~mask;
3006 pins = qib_read_kreg64(dd, kr_extstatus); 3016 pins = qib_read_kreg64(dd, kr_extstatus);
@@ -3442,7 +3452,7 @@ try_intx:
3442 } 3452 }
3443 3453
3444 /* Try to get MSIx interrupts */ 3454 /* Try to get MSIx interrupts */
3445 memset(redirect, 0, sizeof redirect); 3455 memset(redirect, 0, sizeof(redirect));
3446 mask = ~0ULL; 3456 mask = ~0ULL;
3447 msixnum = 0; 3457 msixnum = 0;
3448 local_mask = cpumask_of_pcibus(dd->pcidev->bus); 3458 local_mask = cpumask_of_pcibus(dd->pcidev->bus);
@@ -3617,6 +3627,10 @@ static unsigned qib_7322_boardname(struct qib_devdata *dd)
3617 n = "InfiniPath_QME7362"; 3627 n = "InfiniPath_QME7362";
3618 dd->flags |= QIB_HAS_QSFP; 3628 dd->flags |= QIB_HAS_QSFP;
3619 break; 3629 break;
3630 case BOARD_QMH7360:
3631 n = "Intel IB QDR 1P FLR-QSFP Adptr";
3632 dd->flags |= QIB_HAS_QSFP;
3633 break;
3620 case 15: 3634 case 15:
3621 n = "InfiniPath_QLE7342_TEST"; 3635 n = "InfiniPath_QLE7342_TEST";
3622 dd->flags |= QIB_HAS_QSFP; 3636 dd->flags |= QIB_HAS_QSFP;
@@ -3694,6 +3708,7 @@ static int qib_do_7322_reset(struct qib_devdata *dd)
3694 */ 3708 */
3695 for (i = 0; i < msix_entries; i++) { 3709 for (i = 0; i < msix_entries; i++) {
3696 u64 vecaddr, vecdata; 3710 u64 vecaddr, vecdata;
3711
3697 vecaddr = qib_read_kreg64(dd, 2 * i + 3712 vecaddr = qib_read_kreg64(dd, 2 * i +
3698 (QIB_7322_MsixTable_OFFS / sizeof(u64))); 3713 (QIB_7322_MsixTable_OFFS / sizeof(u64)));
3699 vecdata = qib_read_kreg64(dd, 1 + 2 * i + 3714 vecdata = qib_read_kreg64(dd, 1 + 2 * i +
@@ -5178,8 +5193,6 @@ static void qib_get_7322_faststats(unsigned long opaque)
5178 spin_lock_irqsave(&ppd->dd->eep_st_lock, flags); 5193 spin_lock_irqsave(&ppd->dd->eep_st_lock, flags);
5179 traffic_wds -= ppd->dd->traffic_wds; 5194 traffic_wds -= ppd->dd->traffic_wds;
5180 ppd->dd->traffic_wds += traffic_wds; 5195 ppd->dd->traffic_wds += traffic_wds;
5181 if (traffic_wds >= QIB_TRAFFIC_ACTIVE_THRESHOLD)
5182 atomic_add(ACTIVITY_TIMER, &ppd->dd->active_time);
5183 spin_unlock_irqrestore(&ppd->dd->eep_st_lock, flags); 5196 spin_unlock_irqrestore(&ppd->dd->eep_st_lock, flags);
5184 if (ppd->cpspec->qdr_dfe_on && (ppd->link_speed_active & 5197 if (ppd->cpspec->qdr_dfe_on && (ppd->link_speed_active &
5185 QIB_IB_QDR) && 5198 QIB_IB_QDR) &&
@@ -5357,6 +5370,7 @@ static void qib_autoneg_7322_send(struct qib_pportdata *ppd, int which)
5357static void set_7322_ibspeed_fast(struct qib_pportdata *ppd, u32 speed) 5370static void set_7322_ibspeed_fast(struct qib_pportdata *ppd, u32 speed)
5358{ 5371{
5359 u64 newctrlb; 5372 u64 newctrlb;
5373
5360 newctrlb = ppd->cpspec->ibcctrl_b & ~(IBA7322_IBC_SPEED_MASK | 5374 newctrlb = ppd->cpspec->ibcctrl_b & ~(IBA7322_IBC_SPEED_MASK |
5361 IBA7322_IBC_IBTA_1_2_MASK | 5375 IBA7322_IBC_IBTA_1_2_MASK |
5362 IBA7322_IBC_MAX_SPEED_MASK); 5376 IBA7322_IBC_MAX_SPEED_MASK);
@@ -5843,6 +5857,7 @@ static void get_7322_chip_params(struct qib_devdata *dd)
5843static void qib_7322_set_baseaddrs(struct qib_devdata *dd) 5857static void qib_7322_set_baseaddrs(struct qib_devdata *dd)
5844{ 5858{
5845 u32 cregbase; 5859 u32 cregbase;
5860
5846 cregbase = qib_read_kreg32(dd, kr_counterregbase); 5861 cregbase = qib_read_kreg32(dd, kr_counterregbase);
5847 5862
5848 dd->cspec->cregbase = (u64 __iomem *)(cregbase + 5863 dd->cspec->cregbase = (u64 __iomem *)(cregbase +
@@ -6183,6 +6198,7 @@ static int setup_txselect(const char *str, struct kernel_param *kp)
6183 struct qib_devdata *dd; 6198 struct qib_devdata *dd;
6184 unsigned long val; 6199 unsigned long val;
6185 char *n; 6200 char *n;
6201
6186 if (strlen(str) >= MAX_ATTEN_LEN) { 6202 if (strlen(str) >= MAX_ATTEN_LEN) {
6187 pr_info("txselect_values string too long\n"); 6203 pr_info("txselect_values string too long\n");
6188 return -ENOSPC; 6204 return -ENOSPC;
@@ -6393,6 +6409,7 @@ static void write_7322_initregs(struct qib_devdata *dd)
6393 val = TIDFLOW_ERRBITS; /* these are W1C */ 6409 val = TIDFLOW_ERRBITS; /* these are W1C */
6394 for (i = 0; i < dd->cfgctxts; i++) { 6410 for (i = 0; i < dd->cfgctxts; i++) {
6395 int flow; 6411 int flow;
6412
6396 for (flow = 0; flow < NUM_TIDFLOWS_CTXT; flow++) 6413 for (flow = 0; flow < NUM_TIDFLOWS_CTXT; flow++)
6397 qib_write_ureg(dd, ur_rcvflowtable+flow, val, i); 6414 qib_write_ureg(dd, ur_rcvflowtable+flow, val, i);
6398 } 6415 }
@@ -6503,6 +6520,7 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
6503 6520
6504 for (pidx = 0; pidx < NUM_IB_PORTS; ++pidx) { 6521 for (pidx = 0; pidx < NUM_IB_PORTS; ++pidx) {
6505 struct qib_chippport_specific *cp = ppd->cpspec; 6522 struct qib_chippport_specific *cp = ppd->cpspec;
6523
6506 ppd->link_speed_supported = features & PORT_SPD_CAP; 6524 ppd->link_speed_supported = features & PORT_SPD_CAP;
6507 features >>= PORT_SPD_CAP_SHIFT; 6525 features >>= PORT_SPD_CAP_SHIFT;
6508 if (!ppd->link_speed_supported) { 6526 if (!ppd->link_speed_supported) {
@@ -6581,8 +6599,7 @@ static int qib_init_7322_variables(struct qib_devdata *dd)
6581 ppd->vls_supported = IB_VL_VL0_7; 6599 ppd->vls_supported = IB_VL_VL0_7;
6582 else { 6600 else {
6583 qib_devinfo(dd->pcidev, 6601 qib_devinfo(dd->pcidev,
6584 "Invalid num_vls %u for MTU %d " 6602 "Invalid num_vls %u for MTU %d , using 4 VLs\n",
6585 ", using 4 VLs\n",
6586 qib_num_cfg_vls, mtu); 6603 qib_num_cfg_vls, mtu);
6587 ppd->vls_supported = IB_VL_VL0_3; 6604 ppd->vls_supported = IB_VL_VL0_3;
6588 qib_num_cfg_vls = 4; 6605 qib_num_cfg_vls = 4;
@@ -7890,6 +7907,7 @@ static void serdes_7322_los_enable(struct qib_pportdata *ppd, int enable)
7890static int serdes_7322_init(struct qib_pportdata *ppd) 7907static int serdes_7322_init(struct qib_pportdata *ppd)
7891{ 7908{
7892 int ret = 0; 7909 int ret = 0;
7910
7893 if (ppd->dd->cspec->r1) 7911 if (ppd->dd->cspec->r1)
7894 ret = serdes_7322_init_old(ppd); 7912 ret = serdes_7322_init_old(ppd);
7895 else 7913 else
@@ -8305,8 +8323,8 @@ static void force_h1(struct qib_pportdata *ppd)
8305 8323
8306static int qib_r_grab(struct qib_devdata *dd) 8324static int qib_r_grab(struct qib_devdata *dd)
8307{ 8325{
8308 u64 val; 8326 u64 val = SJA_EN;
8309 val = SJA_EN; 8327
8310 qib_write_kreg(dd, kr_r_access, val); 8328 qib_write_kreg(dd, kr_r_access, val);
8311 qib_read_kreg32(dd, kr_scratch); 8329 qib_read_kreg32(dd, kr_scratch);
8312 return 0; 8330 return 0;
@@ -8319,6 +8337,7 @@ static int qib_r_wait_for_rdy(struct qib_devdata *dd)
8319{ 8337{
8320 u64 val; 8338 u64 val;
8321 int timeout; 8339 int timeout;
8340
8322 for (timeout = 0; timeout < 100 ; ++timeout) { 8341 for (timeout = 0; timeout < 100 ; ++timeout) {
8323 val = qib_read_kreg32(dd, kr_r_access); 8342 val = qib_read_kreg32(dd, kr_r_access);
8324 if (val & R_RDY) 8343 if (val & R_RDY)
@@ -8346,6 +8365,7 @@ static int qib_r_shift(struct qib_devdata *dd, int bisten,
8346 } 8365 }
8347 if (inp) { 8366 if (inp) {
8348 int tdi = inp[pos >> 3] >> (pos & 7); 8367 int tdi = inp[pos >> 3] >> (pos & 7);
8368
8349 val |= ((tdi & 1) << R_TDI_LSB); 8369 val |= ((tdi & 1) << R_TDI_LSB);
8350 } 8370 }
8351 qib_write_kreg(dd, kr_r_access, val); 8371 qib_write_kreg(dd, kr_r_access, val);
diff --git a/drivers/infiniband/hw/qib/qib_init.c b/drivers/infiniband/hw/qib/qib_init.c
index 729da39c49ed..2ee36953e234 100644
--- a/drivers/infiniband/hw/qib/qib_init.c
+++ b/drivers/infiniband/hw/qib/qib_init.c
@@ -140,7 +140,7 @@ int qib_create_ctxts(struct qib_devdata *dd)
140 * Allocate full ctxtcnt array, rather than just cfgctxts, because 140 * Allocate full ctxtcnt array, rather than just cfgctxts, because
141 * cleanup iterates across all possible ctxts. 141 * cleanup iterates across all possible ctxts.
142 */ 142 */
143 dd->rcd = kzalloc(sizeof(*dd->rcd) * dd->ctxtcnt, GFP_KERNEL); 143 dd->rcd = kcalloc(dd->ctxtcnt, sizeof(*dd->rcd), GFP_KERNEL);
144 if (!dd->rcd) { 144 if (!dd->rcd) {
145 qib_dev_err(dd, 145 qib_dev_err(dd,
146 "Unable to allocate ctxtdata array, failing\n"); 146 "Unable to allocate ctxtdata array, failing\n");
@@ -234,6 +234,7 @@ int qib_init_pportdata(struct qib_pportdata *ppd, struct qib_devdata *dd,
234 u8 hw_pidx, u8 port) 234 u8 hw_pidx, u8 port)
235{ 235{
236 int size; 236 int size;
237
237 ppd->dd = dd; 238 ppd->dd = dd;
238 ppd->hw_pidx = hw_pidx; 239 ppd->hw_pidx = hw_pidx;
239 ppd->port = port; /* IB port number, not index */ 240 ppd->port = port; /* IB port number, not index */
@@ -613,6 +614,7 @@ static int qib_create_workqueues(struct qib_devdata *dd)
613 ppd = dd->pport + pidx; 614 ppd = dd->pport + pidx;
614 if (!ppd->qib_wq) { 615 if (!ppd->qib_wq) {
615 char wq_name[8]; /* 3 + 2 + 1 + 1 + 1 */ 616 char wq_name[8]; /* 3 + 2 + 1 + 1 + 1 */
617
616 snprintf(wq_name, sizeof(wq_name), "qib%d_%d", 618 snprintf(wq_name, sizeof(wq_name), "qib%d_%d",
617 dd->unit, pidx); 619 dd->unit, pidx);
618 ppd->qib_wq = 620 ppd->qib_wq =
@@ -714,6 +716,7 @@ int qib_init(struct qib_devdata *dd, int reinit)
714 716
715 for (pidx = 0; pidx < dd->num_pports; ++pidx) { 717 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
716 int mtu; 718 int mtu;
719
717 if (lastfail) 720 if (lastfail)
718 ret = lastfail; 721 ret = lastfail;
719 ppd = dd->pport + pidx; 722 ppd = dd->pport + pidx;
@@ -931,7 +934,6 @@ static void qib_shutdown_device(struct qib_devdata *dd)
931 qib_free_pportdata(ppd); 934 qib_free_pportdata(ppd);
932 } 935 }
933 936
934 qib_update_eeprom_log(dd);
935} 937}
936 938
937/** 939/**
@@ -1026,8 +1028,7 @@ static void qib_verify_pioperf(struct qib_devdata *dd)
1026 addr = vmalloc(cnt); 1028 addr = vmalloc(cnt);
1027 if (!addr) { 1029 if (!addr) {
1028 qib_devinfo(dd->pcidev, 1030 qib_devinfo(dd->pcidev,
1029 "Couldn't get memory for checking PIO perf," 1031 "Couldn't get memory for checking PIO perf, skipping\n");
1030 " skipping\n");
1031 goto done; 1032 goto done;
1032 } 1033 }
1033 1034
@@ -1163,6 +1164,7 @@ struct qib_devdata *qib_alloc_devdata(struct pci_dev *pdev, size_t extra)
1163 1164
1164 if (!qib_cpulist_count) { 1165 if (!qib_cpulist_count) {
1165 u32 count = num_online_cpus(); 1166 u32 count = num_online_cpus();
1167
1166 qib_cpulist = kzalloc(BITS_TO_LONGS(count) * 1168 qib_cpulist = kzalloc(BITS_TO_LONGS(count) *
1167 sizeof(long), GFP_KERNEL); 1169 sizeof(long), GFP_KERNEL);
1168 if (qib_cpulist) 1170 if (qib_cpulist)
@@ -1179,7 +1181,7 @@ bail:
1179 if (!list_empty(&dd->list)) 1181 if (!list_empty(&dd->list))
1180 list_del_init(&dd->list); 1182 list_del_init(&dd->list);
1181 ib_dealloc_device(&dd->verbs_dev.ibdev); 1183 ib_dealloc_device(&dd->verbs_dev.ibdev);
1182 return ERR_PTR(ret);; 1184 return ERR_PTR(ret);
1183} 1185}
1184 1186
1185/* 1187/*
diff --git a/drivers/infiniband/hw/qib/qib_intr.c b/drivers/infiniband/hw/qib/qib_intr.c
index f4918f2165ec..086616d071b9 100644
--- a/drivers/infiniband/hw/qib/qib_intr.c
+++ b/drivers/infiniband/hw/qib/qib_intr.c
@@ -168,7 +168,6 @@ skip_ibchange:
168 ppd->lastibcstat = ibcs; 168 ppd->lastibcstat = ibcs;
169 if (ev) 169 if (ev)
170 signal_ib_event(ppd, ev); 170 signal_ib_event(ppd, ev);
171 return;
172} 171}
173 172
174void qib_clear_symerror_on_linkup(unsigned long opaque) 173void qib_clear_symerror_on_linkup(unsigned long opaque)
diff --git a/drivers/infiniband/hw/qib/qib_keys.c b/drivers/infiniband/hw/qib/qib_keys.c
index 3b9afccaaade..ad843c786e72 100644
--- a/drivers/infiniband/hw/qib/qib_keys.c
+++ b/drivers/infiniband/hw/qib/qib_keys.c
@@ -122,10 +122,10 @@ void qib_free_lkey(struct qib_mregion *mr)
122 if (!mr->lkey_published) 122 if (!mr->lkey_published)
123 goto out; 123 goto out;
124 if (lkey == 0) 124 if (lkey == 0)
125 rcu_assign_pointer(dev->dma_mr, NULL); 125 RCU_INIT_POINTER(dev->dma_mr, NULL);
126 else { 126 else {
127 r = lkey >> (32 - ib_qib_lkey_table_size); 127 r = lkey >> (32 - ib_qib_lkey_table_size);
128 rcu_assign_pointer(rkt->table[r], NULL); 128 RCU_INIT_POINTER(rkt->table[r], NULL);
129 } 129 }
130 qib_put_mr(mr); 130 qib_put_mr(mr);
131 mr->lkey_published = 0; 131 mr->lkey_published = 0;
diff --git a/drivers/infiniband/hw/qib/qib_mad.c b/drivers/infiniband/hw/qib/qib_mad.c
index 636be117b578..395f4046dba2 100644
--- a/drivers/infiniband/hw/qib/qib_mad.c
+++ b/drivers/infiniband/hw/qib/qib_mad.c
@@ -152,14 +152,14 @@ void qib_bad_pqkey(struct qib_ibport *ibp, __be16 trap_num, u32 key, u32 sl,
152 data.trap_num = trap_num; 152 data.trap_num = trap_num;
153 data.issuer_lid = cpu_to_be16(ppd_from_ibp(ibp)->lid); 153 data.issuer_lid = cpu_to_be16(ppd_from_ibp(ibp)->lid);
154 data.toggle_count = 0; 154 data.toggle_count = 0;
155 memset(&data.details, 0, sizeof data.details); 155 memset(&data.details, 0, sizeof(data.details));
156 data.details.ntc_257_258.lid1 = lid1; 156 data.details.ntc_257_258.lid1 = lid1;
157 data.details.ntc_257_258.lid2 = lid2; 157 data.details.ntc_257_258.lid2 = lid2;
158 data.details.ntc_257_258.key = cpu_to_be32(key); 158 data.details.ntc_257_258.key = cpu_to_be32(key);
159 data.details.ntc_257_258.sl_qp1 = cpu_to_be32((sl << 28) | qp1); 159 data.details.ntc_257_258.sl_qp1 = cpu_to_be32((sl << 28) | qp1);
160 data.details.ntc_257_258.qp2 = cpu_to_be32(qp2); 160 data.details.ntc_257_258.qp2 = cpu_to_be32(qp2);
161 161
162 qib_send_trap(ibp, &data, sizeof data); 162 qib_send_trap(ibp, &data, sizeof(data));
163} 163}
164 164
165/* 165/*
@@ -176,7 +176,7 @@ static void qib_bad_mkey(struct qib_ibport *ibp, struct ib_smp *smp)
176 data.trap_num = IB_NOTICE_TRAP_BAD_MKEY; 176 data.trap_num = IB_NOTICE_TRAP_BAD_MKEY;
177 data.issuer_lid = cpu_to_be16(ppd_from_ibp(ibp)->lid); 177 data.issuer_lid = cpu_to_be16(ppd_from_ibp(ibp)->lid);
178 data.toggle_count = 0; 178 data.toggle_count = 0;
179 memset(&data.details, 0, sizeof data.details); 179 memset(&data.details, 0, sizeof(data.details));
180 data.details.ntc_256.lid = data.issuer_lid; 180 data.details.ntc_256.lid = data.issuer_lid;
181 data.details.ntc_256.method = smp->method; 181 data.details.ntc_256.method = smp->method;
182 data.details.ntc_256.attr_id = smp->attr_id; 182 data.details.ntc_256.attr_id = smp->attr_id;
@@ -198,7 +198,7 @@ static void qib_bad_mkey(struct qib_ibport *ibp, struct ib_smp *smp)
198 hop_cnt); 198 hop_cnt);
199 } 199 }
200 200
201 qib_send_trap(ibp, &data, sizeof data); 201 qib_send_trap(ibp, &data, sizeof(data));
202} 202}
203 203
204/* 204/*
@@ -214,11 +214,11 @@ void qib_cap_mask_chg(struct qib_ibport *ibp)
214 data.trap_num = IB_NOTICE_TRAP_CAP_MASK_CHG; 214 data.trap_num = IB_NOTICE_TRAP_CAP_MASK_CHG;
215 data.issuer_lid = cpu_to_be16(ppd_from_ibp(ibp)->lid); 215 data.issuer_lid = cpu_to_be16(ppd_from_ibp(ibp)->lid);
216 data.toggle_count = 0; 216 data.toggle_count = 0;
217 memset(&data.details, 0, sizeof data.details); 217 memset(&data.details, 0, sizeof(data.details));
218 data.details.ntc_144.lid = data.issuer_lid; 218 data.details.ntc_144.lid = data.issuer_lid;
219 data.details.ntc_144.new_cap_mask = cpu_to_be32(ibp->port_cap_flags); 219 data.details.ntc_144.new_cap_mask = cpu_to_be32(ibp->port_cap_flags);
220 220
221 qib_send_trap(ibp, &data, sizeof data); 221 qib_send_trap(ibp, &data, sizeof(data));
222} 222}
223 223
224/* 224/*
@@ -234,11 +234,11 @@ void qib_sys_guid_chg(struct qib_ibport *ibp)
234 data.trap_num = IB_NOTICE_TRAP_SYS_GUID_CHG; 234 data.trap_num = IB_NOTICE_TRAP_SYS_GUID_CHG;
235 data.issuer_lid = cpu_to_be16(ppd_from_ibp(ibp)->lid); 235 data.issuer_lid = cpu_to_be16(ppd_from_ibp(ibp)->lid);
236 data.toggle_count = 0; 236 data.toggle_count = 0;
237 memset(&data.details, 0, sizeof data.details); 237 memset(&data.details, 0, sizeof(data.details));
238 data.details.ntc_145.lid = data.issuer_lid; 238 data.details.ntc_145.lid = data.issuer_lid;
239 data.details.ntc_145.new_sys_guid = ib_qib_sys_image_guid; 239 data.details.ntc_145.new_sys_guid = ib_qib_sys_image_guid;
240 240
241 qib_send_trap(ibp, &data, sizeof data); 241 qib_send_trap(ibp, &data, sizeof(data));
242} 242}
243 243
244/* 244/*
@@ -254,12 +254,12 @@ void qib_node_desc_chg(struct qib_ibport *ibp)
254 data.trap_num = IB_NOTICE_TRAP_CAP_MASK_CHG; 254 data.trap_num = IB_NOTICE_TRAP_CAP_MASK_CHG;
255 data.issuer_lid = cpu_to_be16(ppd_from_ibp(ibp)->lid); 255 data.issuer_lid = cpu_to_be16(ppd_from_ibp(ibp)->lid);
256 data.toggle_count = 0; 256 data.toggle_count = 0;
257 memset(&data.details, 0, sizeof data.details); 257 memset(&data.details, 0, sizeof(data.details));
258 data.details.ntc_144.lid = data.issuer_lid; 258 data.details.ntc_144.lid = data.issuer_lid;
259 data.details.ntc_144.local_changes = 1; 259 data.details.ntc_144.local_changes = 1;
260 data.details.ntc_144.change_flags = IB_NOTICE_TRAP_NODE_DESC_CHG; 260 data.details.ntc_144.change_flags = IB_NOTICE_TRAP_NODE_DESC_CHG;
261 261
262 qib_send_trap(ibp, &data, sizeof data); 262 qib_send_trap(ibp, &data, sizeof(data));
263} 263}
264 264
265static int subn_get_nodedescription(struct ib_smp *smp, 265static int subn_get_nodedescription(struct ib_smp *smp,
diff --git a/drivers/infiniband/hw/qib/qib_mmap.c b/drivers/infiniband/hw/qib/qib_mmap.c
index 8b73a11d571c..146cf29a2e1d 100644
--- a/drivers/infiniband/hw/qib/qib_mmap.c
+++ b/drivers/infiniband/hw/qib/qib_mmap.c
@@ -134,7 +134,7 @@ struct qib_mmap_info *qib_create_mmap_info(struct qib_ibdev *dev,
134 void *obj) { 134 void *obj) {
135 struct qib_mmap_info *ip; 135 struct qib_mmap_info *ip;
136 136
137 ip = kmalloc(sizeof *ip, GFP_KERNEL); 137 ip = kmalloc(sizeof(*ip), GFP_KERNEL);
138 if (!ip) 138 if (!ip)
139 goto bail; 139 goto bail;
140 140
diff --git a/drivers/infiniband/hw/qib/qib_mr.c b/drivers/infiniband/hw/qib/qib_mr.c
index a77fb4fb14e4..c4473db46699 100644
--- a/drivers/infiniband/hw/qib/qib_mr.c
+++ b/drivers/infiniband/hw/qib/qib_mr.c
@@ -55,7 +55,7 @@ static int init_qib_mregion(struct qib_mregion *mr, struct ib_pd *pd,
55 55
56 m = (count + QIB_SEGSZ - 1) / QIB_SEGSZ; 56 m = (count + QIB_SEGSZ - 1) / QIB_SEGSZ;
57 for (; i < m; i++) { 57 for (; i < m; i++) {
58 mr->map[i] = kzalloc(sizeof *mr->map[0], GFP_KERNEL); 58 mr->map[i] = kzalloc(sizeof(*mr->map[0]), GFP_KERNEL);
59 if (!mr->map[i]) 59 if (!mr->map[i])
60 goto bail; 60 goto bail;
61 } 61 }
@@ -104,7 +104,7 @@ struct ib_mr *qib_get_dma_mr(struct ib_pd *pd, int acc)
104 goto bail; 104 goto bail;
105 } 105 }
106 106
107 mr = kzalloc(sizeof *mr, GFP_KERNEL); 107 mr = kzalloc(sizeof(*mr), GFP_KERNEL);
108 if (!mr) { 108 if (!mr) {
109 ret = ERR_PTR(-ENOMEM); 109 ret = ERR_PTR(-ENOMEM);
110 goto bail; 110 goto bail;
@@ -143,7 +143,7 @@ static struct qib_mr *alloc_mr(int count, struct ib_pd *pd)
143 143
144 /* Allocate struct plus pointers to first level page tables. */ 144 /* Allocate struct plus pointers to first level page tables. */
145 m = (count + QIB_SEGSZ - 1) / QIB_SEGSZ; 145 m = (count + QIB_SEGSZ - 1) / QIB_SEGSZ;
146 mr = kzalloc(sizeof *mr + m * sizeof mr->mr.map[0], GFP_KERNEL); 146 mr = kzalloc(sizeof(*mr) + m * sizeof(mr->mr.map[0]), GFP_KERNEL);
147 if (!mr) 147 if (!mr)
148 goto bail; 148 goto bail;
149 149
@@ -347,7 +347,7 @@ qib_alloc_fast_reg_page_list(struct ib_device *ibdev, int page_list_len)
347 if (size > PAGE_SIZE) 347 if (size > PAGE_SIZE)
348 return ERR_PTR(-EINVAL); 348 return ERR_PTR(-EINVAL);
349 349
350 pl = kzalloc(sizeof *pl, GFP_KERNEL); 350 pl = kzalloc(sizeof(*pl), GFP_KERNEL);
351 if (!pl) 351 if (!pl)
352 return ERR_PTR(-ENOMEM); 352 return ERR_PTR(-ENOMEM);
353 353
@@ -386,7 +386,7 @@ struct ib_fmr *qib_alloc_fmr(struct ib_pd *pd, int mr_access_flags,
386 386
387 /* Allocate struct plus pointers to first level page tables. */ 387 /* Allocate struct plus pointers to first level page tables. */
388 m = (fmr_attr->max_pages + QIB_SEGSZ - 1) / QIB_SEGSZ; 388 m = (fmr_attr->max_pages + QIB_SEGSZ - 1) / QIB_SEGSZ;
389 fmr = kzalloc(sizeof *fmr + m * sizeof fmr->mr.map[0], GFP_KERNEL); 389 fmr = kzalloc(sizeof(*fmr) + m * sizeof(fmr->mr.map[0]), GFP_KERNEL);
390 if (!fmr) 390 if (!fmr)
391 goto bail; 391 goto bail;
392 392
diff --git a/drivers/infiniband/hw/qib/qib_pcie.c b/drivers/infiniband/hw/qib/qib_pcie.c
index 61a0046efb76..4758a3801ae8 100644
--- a/drivers/infiniband/hw/qib/qib_pcie.c
+++ b/drivers/infiniband/hw/qib/qib_pcie.c
@@ -210,7 +210,7 @@ static void qib_msix_setup(struct qib_devdata *dd, int pos, u32 *msixcnt,
210 /* We can't pass qib_msix_entry array to qib_msix_setup 210 /* We can't pass qib_msix_entry array to qib_msix_setup
211 * so use a dummy msix_entry array and copy the allocated 211 * so use a dummy msix_entry array and copy the allocated
212 * irq back to the qib_msix_entry array. */ 212 * irq back to the qib_msix_entry array. */
213 msix_entry = kmalloc(nvec * sizeof(*msix_entry), GFP_KERNEL); 213 msix_entry = kcalloc(nvec, sizeof(*msix_entry), GFP_KERNEL);
214 if (!msix_entry) 214 if (!msix_entry)
215 goto do_intx; 215 goto do_intx;
216 216
@@ -234,8 +234,10 @@ free_msix_entry:
234 kfree(msix_entry); 234 kfree(msix_entry);
235 235
236do_intx: 236do_intx:
237 qib_dev_err(dd, "pci_enable_msix_range %d vectors failed: %d, " 237 qib_dev_err(
238 "falling back to INTx\n", nvec, ret); 238 dd,
239 "pci_enable_msix_range %d vectors failed: %d, falling back to INTx\n",
240 nvec, ret);
239 *msixcnt = 0; 241 *msixcnt = 0;
240 qib_enable_intx(dd->pcidev); 242 qib_enable_intx(dd->pcidev);
241} 243}
@@ -459,6 +461,7 @@ void qib_pcie_getcmd(struct qib_devdata *dd, u16 *cmd, u8 *iline, u8 *cline)
459void qib_pcie_reenable(struct qib_devdata *dd, u16 cmd, u8 iline, u8 cline) 461void qib_pcie_reenable(struct qib_devdata *dd, u16 cmd, u8 iline, u8 cline)
460{ 462{
461 int r; 463 int r;
464
462 r = pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0, 465 r = pci_write_config_dword(dd->pcidev, PCI_BASE_ADDRESS_0,
463 dd->pcibar0); 466 dd->pcibar0);
464 if (r) 467 if (r)
@@ -696,6 +699,7 @@ static void
696qib_pci_resume(struct pci_dev *pdev) 699qib_pci_resume(struct pci_dev *pdev)
697{ 700{
698 struct qib_devdata *dd = pci_get_drvdata(pdev); 701 struct qib_devdata *dd = pci_get_drvdata(pdev);
702
699 qib_devinfo(pdev, "QIB resume function called\n"); 703 qib_devinfo(pdev, "QIB resume function called\n");
700 pci_cleanup_aer_uncorrect_error_status(pdev); 704 pci_cleanup_aer_uncorrect_error_status(pdev);
701 /* 705 /*
diff --git a/drivers/infiniband/hw/qib/qib_qp.c b/drivers/infiniband/hw/qib/qib_qp.c
index 6ddc0264aad2..4fa88ba2963e 100644
--- a/drivers/infiniband/hw/qib/qib_qp.c
+++ b/drivers/infiniband/hw/qib/qib_qp.c
@@ -255,10 +255,10 @@ static void remove_qp(struct qib_ibdev *dev, struct qib_qp *qp)
255 255
256 if (rcu_dereference_protected(ibp->qp0, 256 if (rcu_dereference_protected(ibp->qp0,
257 lockdep_is_held(&dev->qpt_lock)) == qp) { 257 lockdep_is_held(&dev->qpt_lock)) == qp) {
258 rcu_assign_pointer(ibp->qp0, NULL); 258 RCU_INIT_POINTER(ibp->qp0, NULL);
259 } else if (rcu_dereference_protected(ibp->qp1, 259 } else if (rcu_dereference_protected(ibp->qp1,
260 lockdep_is_held(&dev->qpt_lock)) == qp) { 260 lockdep_is_held(&dev->qpt_lock)) == qp) {
261 rcu_assign_pointer(ibp->qp1, NULL); 261 RCU_INIT_POINTER(ibp->qp1, NULL);
262 } else { 262 } else {
263 struct qib_qp *q; 263 struct qib_qp *q;
264 struct qib_qp __rcu **qpp; 264 struct qib_qp __rcu **qpp;
@@ -269,7 +269,7 @@ static void remove_qp(struct qib_ibdev *dev, struct qib_qp *qp)
269 lockdep_is_held(&dev->qpt_lock))) != NULL; 269 lockdep_is_held(&dev->qpt_lock))) != NULL;
270 qpp = &q->next) 270 qpp = &q->next)
271 if (q == qp) { 271 if (q == qp) {
272 rcu_assign_pointer(*qpp, 272 RCU_INIT_POINTER(*qpp,
273 rcu_dereference_protected(qp->next, 273 rcu_dereference_protected(qp->next,
274 lockdep_is_held(&dev->qpt_lock))); 274 lockdep_is_held(&dev->qpt_lock)));
275 removed = 1; 275 removed = 1;
@@ -315,7 +315,7 @@ unsigned qib_free_all_qps(struct qib_devdata *dd)
315 for (n = 0; n < dev->qp_table_size; n++) { 315 for (n = 0; n < dev->qp_table_size; n++) {
316 qp = rcu_dereference_protected(dev->qp_table[n], 316 qp = rcu_dereference_protected(dev->qp_table[n],
317 lockdep_is_held(&dev->qpt_lock)); 317 lockdep_is_held(&dev->qpt_lock));
318 rcu_assign_pointer(dev->qp_table[n], NULL); 318 RCU_INIT_POINTER(dev->qp_table[n], NULL);
319 319
320 for (; qp; qp = rcu_dereference_protected(qp->next, 320 for (; qp; qp = rcu_dereference_protected(qp->next,
321 lockdep_is_held(&dev->qpt_lock))) 321 lockdep_is_held(&dev->qpt_lock)))
diff --git a/drivers/infiniband/hw/qib/qib_qsfp.c b/drivers/infiniband/hw/qib/qib_qsfp.c
index fa71b1e666c5..5e27f76805e2 100644
--- a/drivers/infiniband/hw/qib/qib_qsfp.c
+++ b/drivers/infiniband/hw/qib/qib_qsfp.c
@@ -81,7 +81,7 @@ static int qsfp_read(struct qib_pportdata *ppd, int addr, void *bp, int len)
81 * Module could take up to 2 Msec to respond to MOD_SEL, and there 81 * Module could take up to 2 Msec to respond to MOD_SEL, and there
82 * is no way to tell if it is ready, so we must wait. 82 * is no way to tell if it is ready, so we must wait.
83 */ 83 */
84 msleep(2); 84 msleep(20);
85 85
86 /* Make sure TWSI bus is in sane state. */ 86 /* Make sure TWSI bus is in sane state. */
87 ret = qib_twsi_reset(dd); 87 ret = qib_twsi_reset(dd);
@@ -99,6 +99,7 @@ static int qsfp_read(struct qib_pportdata *ppd, int addr, void *bp, int len)
99 while (cnt < len) { 99 while (cnt < len) {
100 unsigned in_page; 100 unsigned in_page;
101 int wlen = len - cnt; 101 int wlen = len - cnt;
102
102 in_page = addr % QSFP_PAGESIZE; 103 in_page = addr % QSFP_PAGESIZE;
103 if ((in_page + wlen) > QSFP_PAGESIZE) 104 if ((in_page + wlen) > QSFP_PAGESIZE)
104 wlen = QSFP_PAGESIZE - in_page; 105 wlen = QSFP_PAGESIZE - in_page;
@@ -139,7 +140,7 @@ deselect:
139 else if (pass) 140 else if (pass)
140 qib_dev_porterr(dd, ppd->port, "QSFP retries: %d\n", pass); 141 qib_dev_porterr(dd, ppd->port, "QSFP retries: %d\n", pass);
141 142
142 msleep(2); 143 msleep(20);
143 144
144bail: 145bail:
145 mutex_unlock(&dd->eep_lock); 146 mutex_unlock(&dd->eep_lock);
@@ -189,7 +190,7 @@ static int qib_qsfp_write(struct qib_pportdata *ppd, int addr, void *bp,
189 * Module could take up to 2 Msec to respond to MOD_SEL, 190 * Module could take up to 2 Msec to respond to MOD_SEL,
190 * and there is no way to tell if it is ready, so we must wait. 191 * and there is no way to tell if it is ready, so we must wait.
191 */ 192 */
192 msleep(2); 193 msleep(20);
193 194
194 /* Make sure TWSI bus is in sane state. */ 195 /* Make sure TWSI bus is in sane state. */
195 ret = qib_twsi_reset(dd); 196 ret = qib_twsi_reset(dd);
@@ -206,6 +207,7 @@ static int qib_qsfp_write(struct qib_pportdata *ppd, int addr, void *bp,
206 while (cnt < len) { 207 while (cnt < len) {
207 unsigned in_page; 208 unsigned in_page;
208 int wlen = len - cnt; 209 int wlen = len - cnt;
210
209 in_page = addr % QSFP_PAGESIZE; 211 in_page = addr % QSFP_PAGESIZE;
210 if ((in_page + wlen) > QSFP_PAGESIZE) 212 if ((in_page + wlen) > QSFP_PAGESIZE)
211 wlen = QSFP_PAGESIZE - in_page; 213 wlen = QSFP_PAGESIZE - in_page;
@@ -234,7 +236,7 @@ deselect:
234 * going away, and there is no way to tell if it is ready. 236 * going away, and there is no way to tell if it is ready.
235 * so we must wait. 237 * so we must wait.
236 */ 238 */
237 msleep(2); 239 msleep(20);
238 240
239bail: 241bail:
240 mutex_unlock(&dd->eep_lock); 242 mutex_unlock(&dd->eep_lock);
@@ -296,6 +298,7 @@ int qib_refresh_qsfp_cache(struct qib_pportdata *ppd, struct qib_qsfp_cache *cp)
296 * set the page to zero, Even if it already appears to be zero. 298 * set the page to zero, Even if it already appears to be zero.
297 */ 299 */
298 u8 poke = 0; 300 u8 poke = 0;
301
299 ret = qib_qsfp_write(ppd, 127, &poke, 1); 302 ret = qib_qsfp_write(ppd, 127, &poke, 1);
300 udelay(50); 303 udelay(50);
301 if (ret != 1) { 304 if (ret != 1) {
@@ -480,7 +483,6 @@ void qib_qsfp_init(struct qib_qsfp_data *qd,
480 udelay(20); /* Generous RST dwell */ 483 udelay(20); /* Generous RST dwell */
481 484
482 dd->f_gpio_mod(dd, mask, mask, mask); 485 dd->f_gpio_mod(dd, mask, mask, mask);
483 return;
484} 486}
485 487
486void qib_qsfp_deinit(struct qib_qsfp_data *qd) 488void qib_qsfp_deinit(struct qib_qsfp_data *qd)
@@ -540,6 +542,7 @@ int qib_qsfp_dump(struct qib_pportdata *ppd, char *buf, int len)
540 542
541 while (bidx < QSFP_DEFAULT_HDR_CNT) { 543 while (bidx < QSFP_DEFAULT_HDR_CNT) {
542 int iidx; 544 int iidx;
545
543 ret = qsfp_read(ppd, bidx, bin_buff, QSFP_DUMP_CHUNK); 546 ret = qsfp_read(ppd, bidx, bin_buff, QSFP_DUMP_CHUNK);
544 if (ret < 0) 547 if (ret < 0)
545 goto bail; 548 goto bail;
diff --git a/drivers/infiniband/hw/qib/qib_rc.c b/drivers/infiniband/hw/qib/qib_rc.c
index 2f2501890c4e..4544d6f88ad7 100644
--- a/drivers/infiniband/hw/qib/qib_rc.c
+++ b/drivers/infiniband/hw/qib/qib_rc.c
@@ -1017,7 +1017,7 @@ void qib_rc_send_complete(struct qib_qp *qp, struct qib_ib_header *hdr)
1017 /* Post a send completion queue entry if requested. */ 1017 /* Post a send completion queue entry if requested. */
1018 if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) || 1018 if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) ||
1019 (wqe->wr.send_flags & IB_SEND_SIGNALED)) { 1019 (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
1020 memset(&wc, 0, sizeof wc); 1020 memset(&wc, 0, sizeof(wc));
1021 wc.wr_id = wqe->wr.wr_id; 1021 wc.wr_id = wqe->wr.wr_id;
1022 wc.status = IB_WC_SUCCESS; 1022 wc.status = IB_WC_SUCCESS;
1023 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode]; 1023 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode];
@@ -1073,7 +1073,7 @@ static struct qib_swqe *do_rc_completion(struct qib_qp *qp,
1073 /* Post a send completion queue entry if requested. */ 1073 /* Post a send completion queue entry if requested. */
1074 if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) || 1074 if (!(qp->s_flags & QIB_S_SIGNAL_REQ_WR) ||
1075 (wqe->wr.send_flags & IB_SEND_SIGNALED)) { 1075 (wqe->wr.send_flags & IB_SEND_SIGNALED)) {
1076 memset(&wc, 0, sizeof wc); 1076 memset(&wc, 0, sizeof(wc));
1077 wc.wr_id = wqe->wr.wr_id; 1077 wc.wr_id = wqe->wr.wr_id;
1078 wc.status = IB_WC_SUCCESS; 1078 wc.status = IB_WC_SUCCESS;
1079 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode]; 1079 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode];
diff --git a/drivers/infiniband/hw/qib/qib_ruc.c b/drivers/infiniband/hw/qib/qib_ruc.c
index 4c07a8b34ffe..f42bd0f47577 100644
--- a/drivers/infiniband/hw/qib/qib_ruc.c
+++ b/drivers/infiniband/hw/qib/qib_ruc.c
@@ -247,8 +247,8 @@ static __be64 get_sguid(struct qib_ibport *ibp, unsigned index)
247 struct qib_pportdata *ppd = ppd_from_ibp(ibp); 247 struct qib_pportdata *ppd = ppd_from_ibp(ibp);
248 248
249 return ppd->guid; 249 return ppd->guid;
250 } else 250 }
251 return ibp->guids[index - 1]; 251 return ibp->guids[index - 1];
252} 252}
253 253
254static int gid_ok(union ib_gid *gid, __be64 gid_prefix, __be64 id) 254static int gid_ok(union ib_gid *gid, __be64 gid_prefix, __be64 id)
@@ -420,7 +420,7 @@ again:
420 goto serr; 420 goto serr;
421 } 421 }
422 422
423 memset(&wc, 0, sizeof wc); 423 memset(&wc, 0, sizeof(wc));
424 send_status = IB_WC_SUCCESS; 424 send_status = IB_WC_SUCCESS;
425 425
426 release = 1; 426 release = 1;
@@ -792,7 +792,7 @@ void qib_send_complete(struct qib_qp *qp, struct qib_swqe *wqe,
792 status != IB_WC_SUCCESS) { 792 status != IB_WC_SUCCESS) {
793 struct ib_wc wc; 793 struct ib_wc wc;
794 794
795 memset(&wc, 0, sizeof wc); 795 memset(&wc, 0, sizeof(wc));
796 wc.wr_id = wqe->wr.wr_id; 796 wc.wr_id = wqe->wr.wr_id;
797 wc.status = status; 797 wc.status = status;
798 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode]; 798 wc.opcode = ib_qib_wc_opcode[wqe->wr.opcode];
diff --git a/drivers/infiniband/hw/qib/qib_sd7220.c b/drivers/infiniband/hw/qib/qib_sd7220.c
index 911205d3d5a0..c72775f27212 100644
--- a/drivers/infiniband/hw/qib/qib_sd7220.c
+++ b/drivers/infiniband/hw/qib/qib_sd7220.c
@@ -259,6 +259,7 @@ static int qib_ibsd_reset(struct qib_devdata *dd, int assert_rst)
259 * it again during startup. 259 * it again during startup.
260 */ 260 */
261 u64 val; 261 u64 val;
262
262 rst_val &= ~(1ULL); 263 rst_val &= ~(1ULL);
263 qib_write_kreg(dd, kr_hwerrmask, 264 qib_write_kreg(dd, kr_hwerrmask,
264 dd->cspec->hwerrmask & 265 dd->cspec->hwerrmask &
@@ -590,6 +591,7 @@ static int epb_access(struct qib_devdata *dd, int sdnum, int claim)
590 * Both should be clear 591 * Both should be clear
591 */ 592 */
592 u64 newval = 0; 593 u64 newval = 0;
594
593 qib_write_kreg(dd, acc, newval); 595 qib_write_kreg(dd, acc, newval);
594 /* First read after write is not trustworthy */ 596 /* First read after write is not trustworthy */
595 pollval = qib_read_kreg32(dd, acc); 597 pollval = qib_read_kreg32(dd, acc);
@@ -601,6 +603,7 @@ static int epb_access(struct qib_devdata *dd, int sdnum, int claim)
601 /* Need to claim */ 603 /* Need to claim */
602 u64 pollval; 604 u64 pollval;
603 u64 newval = EPB_ACC_REQ | oct_sel; 605 u64 newval = EPB_ACC_REQ | oct_sel;
606
604 qib_write_kreg(dd, acc, newval); 607 qib_write_kreg(dd, acc, newval);
605 /* First read after write is not trustworthy */ 608 /* First read after write is not trustworthy */
606 pollval = qib_read_kreg32(dd, acc); 609 pollval = qib_read_kreg32(dd, acc);
@@ -812,6 +815,7 @@ static int qib_sd7220_ram_xfer(struct qib_devdata *dd, int sdnum, u32 loc,
812 if (!sofar) { 815 if (!sofar) {
813 /* Only set address at start of chunk */ 816 /* Only set address at start of chunk */
814 int addrbyte = (addr + sofar) >> 8; 817 int addrbyte = (addr + sofar) >> 8;
818
815 transval = csbit | EPB_MADDRH | addrbyte; 819 transval = csbit | EPB_MADDRH | addrbyte;
816 tries = epb_trans(dd, trans, transval, 820 tries = epb_trans(dd, trans, transval,
817 &transval); 821 &transval);
@@ -922,7 +926,7 @@ qib_sd7220_ib_vfy(struct qib_devdata *dd, const struct firmware *fw)
922 * IRQ not set up at this point in init, so we poll. 926 * IRQ not set up at this point in init, so we poll.
923 */ 927 */
924#define IB_SERDES_TRIM_DONE (1ULL << 11) 928#define IB_SERDES_TRIM_DONE (1ULL << 11)
925#define TRIM_TMO (30) 929#define TRIM_TMO (15)
926 930
927static int qib_sd_trimdone_poll(struct qib_devdata *dd) 931static int qib_sd_trimdone_poll(struct qib_devdata *dd)
928{ 932{
@@ -940,7 +944,7 @@ static int qib_sd_trimdone_poll(struct qib_devdata *dd)
940 ret = 1; 944 ret = 1;
941 break; 945 break;
942 } 946 }
943 msleep(10); 947 msleep(20);
944 } 948 }
945 if (trim_tmo >= TRIM_TMO) { 949 if (trim_tmo >= TRIM_TMO) {
946 qib_dev_err(dd, "No TRIMDONE in %d tries\n", trim_tmo); 950 qib_dev_err(dd, "No TRIMDONE in %d tries\n", trim_tmo);
@@ -1071,6 +1075,7 @@ static int qib_sd_setvals(struct qib_devdata *dd)
1071 dds_reg_map >>= 4; 1075 dds_reg_map >>= 4;
1072 for (midx = 0; midx < DDS_ROWS; ++midx) { 1076 for (midx = 0; midx < DDS_ROWS; ++midx) {
1073 u64 __iomem *daddr = taddr + ((midx << 4) + idx); 1077 u64 __iomem *daddr = taddr + ((midx << 4) + idx);
1078
1074 data = dds_init_vals[midx].reg_vals[idx]; 1079 data = dds_init_vals[midx].reg_vals[idx];
1075 writeq(data, daddr); 1080 writeq(data, daddr);
1076 mmiowb(); 1081 mmiowb();
diff --git a/drivers/infiniband/hw/qib/qib_sysfs.c b/drivers/infiniband/hw/qib/qib_sysfs.c
index 3c8e4e3caca6..81f56cdff2bc 100644
--- a/drivers/infiniband/hw/qib/qib_sysfs.c
+++ b/drivers/infiniband/hw/qib/qib_sysfs.c
@@ -586,8 +586,8 @@ static ssize_t show_serial(struct device *device,
586 container_of(device, struct qib_ibdev, ibdev.dev); 586 container_of(device, struct qib_ibdev, ibdev.dev);
587 struct qib_devdata *dd = dd_from_dev(dev); 587 struct qib_devdata *dd = dd_from_dev(dev);
588 588
589 buf[sizeof dd->serial] = '\0'; 589 buf[sizeof(dd->serial)] = '\0';
590 memcpy(buf, dd->serial, sizeof dd->serial); 590 memcpy(buf, dd->serial, sizeof(dd->serial));
591 strcat(buf, "\n"); 591 strcat(buf, "\n");
592 return strlen(buf); 592 return strlen(buf);
593} 593}
@@ -611,28 +611,6 @@ bail:
611 return ret < 0 ? ret : count; 611 return ret < 0 ? ret : count;
612} 612}
613 613
614static ssize_t show_logged_errs(struct device *device,
615 struct device_attribute *attr, char *buf)
616{
617 struct qib_ibdev *dev =
618 container_of(device, struct qib_ibdev, ibdev.dev);
619 struct qib_devdata *dd = dd_from_dev(dev);
620 int idx, count;
621
622 /* force consistency with actual EEPROM */
623 if (qib_update_eeprom_log(dd) != 0)
624 return -ENXIO;
625
626 count = 0;
627 for (idx = 0; idx < QIB_EEP_LOG_CNT; ++idx) {
628 count += scnprintf(buf + count, PAGE_SIZE - count, "%d%c",
629 dd->eep_st_errs[idx],
630 idx == (QIB_EEP_LOG_CNT - 1) ? '\n' : ' ');
631 }
632
633 return count;
634}
635
636/* 614/*
637 * Dump tempsense regs. in decimal, to ease shell-scripts. 615 * Dump tempsense regs. in decimal, to ease shell-scripts.
638 */ 616 */
@@ -679,7 +657,6 @@ static DEVICE_ATTR(nctxts, S_IRUGO, show_nctxts, NULL);
679static DEVICE_ATTR(nfreectxts, S_IRUGO, show_nfreectxts, NULL); 657static DEVICE_ATTR(nfreectxts, S_IRUGO, show_nfreectxts, NULL);
680static DEVICE_ATTR(serial, S_IRUGO, show_serial, NULL); 658static DEVICE_ATTR(serial, S_IRUGO, show_serial, NULL);
681static DEVICE_ATTR(boardversion, S_IRUGO, show_boardversion, NULL); 659static DEVICE_ATTR(boardversion, S_IRUGO, show_boardversion, NULL);
682static DEVICE_ATTR(logged_errors, S_IRUGO, show_logged_errs, NULL);
683static DEVICE_ATTR(tempsense, S_IRUGO, show_tempsense, NULL); 660static DEVICE_ATTR(tempsense, S_IRUGO, show_tempsense, NULL);
684static DEVICE_ATTR(localbus_info, S_IRUGO, show_localbus_info, NULL); 661static DEVICE_ATTR(localbus_info, S_IRUGO, show_localbus_info, NULL);
685static DEVICE_ATTR(chip_reset, S_IWUSR, NULL, store_chip_reset); 662static DEVICE_ATTR(chip_reset, S_IWUSR, NULL, store_chip_reset);
@@ -693,7 +670,6 @@ static struct device_attribute *qib_attributes[] = {
693 &dev_attr_nfreectxts, 670 &dev_attr_nfreectxts,
694 &dev_attr_serial, 671 &dev_attr_serial,
695 &dev_attr_boardversion, 672 &dev_attr_boardversion,
696 &dev_attr_logged_errors,
697 &dev_attr_tempsense, 673 &dev_attr_tempsense,
698 &dev_attr_localbus_info, 674 &dev_attr_localbus_info,
699 &dev_attr_chip_reset, 675 &dev_attr_chip_reset,
diff --git a/drivers/infiniband/hw/qib/qib_twsi.c b/drivers/infiniband/hw/qib/qib_twsi.c
index 647f7beb1b0a..f5698664419b 100644
--- a/drivers/infiniband/hw/qib/qib_twsi.c
+++ b/drivers/infiniband/hw/qib/qib_twsi.c
@@ -105,6 +105,7 @@ static void scl_out(struct qib_devdata *dd, u8 bit)
105 udelay(2); 105 udelay(2);
106 else { 106 else {
107 int rise_usec; 107 int rise_usec;
108
108 for (rise_usec = SCL_WAIT_USEC; rise_usec > 0; rise_usec -= 2) { 109 for (rise_usec = SCL_WAIT_USEC; rise_usec > 0; rise_usec -= 2) {
109 if (mask & dd->f_gpio_mod(dd, 0, 0, 0)) 110 if (mask & dd->f_gpio_mod(dd, 0, 0, 0))
110 break; 111 break;
@@ -326,6 +327,7 @@ int qib_twsi_reset(struct qib_devdata *dd)
326static int qib_twsi_wr(struct qib_devdata *dd, int data, int flags) 327static int qib_twsi_wr(struct qib_devdata *dd, int data, int flags)
327{ 328{
328 int ret = 1; 329 int ret = 1;
330
329 if (flags & QIB_TWSI_START) 331 if (flags & QIB_TWSI_START)
330 start_seq(dd); 332 start_seq(dd);
331 333
@@ -435,8 +437,7 @@ int qib_twsi_blk_wr(struct qib_devdata *dd, int dev, int addr,
435 int sub_len; 437 int sub_len;
436 const u8 *bp = buffer; 438 const u8 *bp = buffer;
437 int max_wait_time, i; 439 int max_wait_time, i;
438 int ret; 440 int ret = 1;
439 ret = 1;
440 441
441 while (len > 0) { 442 while (len > 0) {
442 if (dev == QIB_TWSI_NO_DEV) { 443 if (dev == QIB_TWSI_NO_DEV) {
diff --git a/drivers/infiniband/hw/qib/qib_tx.c b/drivers/infiniband/hw/qib/qib_tx.c
index 31d3561400a4..eface3b3dacf 100644
--- a/drivers/infiniband/hw/qib/qib_tx.c
+++ b/drivers/infiniband/hw/qib/qib_tx.c
@@ -180,6 +180,7 @@ void qib_disarm_piobufs_set(struct qib_devdata *dd, unsigned long *mask,
180 180
181 for (i = 0; i < cnt; i++) { 181 for (i = 0; i < cnt; i++) {
182 int which; 182 int which;
183
183 if (!test_bit(i, mask)) 184 if (!test_bit(i, mask))
184 continue; 185 continue;
185 /* 186 /*
diff --git a/drivers/infiniband/hw/qib/qib_ud.c b/drivers/infiniband/hw/qib/qib_ud.c
index aaf7039f8ed2..26243b722b5e 100644
--- a/drivers/infiniband/hw/qib/qib_ud.c
+++ b/drivers/infiniband/hw/qib/qib_ud.c
@@ -127,7 +127,7 @@ static void qib_ud_loopback(struct qib_qp *sqp, struct qib_swqe *swqe)
127 * present on the wire. 127 * present on the wire.
128 */ 128 */
129 length = swqe->length; 129 length = swqe->length;
130 memset(&wc, 0, sizeof wc); 130 memset(&wc, 0, sizeof(wc));
131 wc.byte_len = length + sizeof(struct ib_grh); 131 wc.byte_len = length + sizeof(struct ib_grh);
132 132
133 if (swqe->wr.opcode == IB_WR_SEND_WITH_IMM) { 133 if (swqe->wr.opcode == IB_WR_SEND_WITH_IMM) {
diff --git a/drivers/infiniband/hw/qib/qib_user_sdma.c b/drivers/infiniband/hw/qib/qib_user_sdma.c
index d2806cae234c..3e0677c51276 100644
--- a/drivers/infiniband/hw/qib/qib_user_sdma.c
+++ b/drivers/infiniband/hw/qib/qib_user_sdma.c
@@ -50,7 +50,7 @@
50/* expected size of headers (for dma_pool) */ 50/* expected size of headers (for dma_pool) */
51#define QIB_USER_SDMA_EXP_HEADER_LENGTH 64 51#define QIB_USER_SDMA_EXP_HEADER_LENGTH 64
52/* attempt to drain the queue for 5secs */ 52/* attempt to drain the queue for 5secs */
53#define QIB_USER_SDMA_DRAIN_TIMEOUT 500 53#define QIB_USER_SDMA_DRAIN_TIMEOUT 250
54 54
55/* 55/*
56 * track how many times a process open this driver. 56 * track how many times a process open this driver.
@@ -226,6 +226,7 @@ qib_user_sdma_queue_create(struct device *dev, int unit, int ctxt, int sctxt)
226 sdma_rb_node->refcount++; 226 sdma_rb_node->refcount++;
227 } else { 227 } else {
228 int ret; 228 int ret;
229
229 sdma_rb_node = kmalloc(sizeof( 230 sdma_rb_node = kmalloc(sizeof(
230 struct qib_user_sdma_rb_node), GFP_KERNEL); 231 struct qib_user_sdma_rb_node), GFP_KERNEL);
231 if (!sdma_rb_node) 232 if (!sdma_rb_node)
@@ -936,6 +937,7 @@ static int qib_user_sdma_queue_pkts(const struct qib_devdata *dd,
936 937
937 if (tiddma) { 938 if (tiddma) {
938 char *tidsm = (char *)pkt + pktsize; 939 char *tidsm = (char *)pkt + pktsize;
940
939 cfur = copy_from_user(tidsm, 941 cfur = copy_from_user(tidsm,
940 iov[idx].iov_base, tidsmsize); 942 iov[idx].iov_base, tidsmsize);
941 if (cfur) { 943 if (cfur) {
@@ -1142,7 +1144,7 @@ void qib_user_sdma_queue_drain(struct qib_pportdata *ppd,
1142 qib_user_sdma_hwqueue_clean(ppd); 1144 qib_user_sdma_hwqueue_clean(ppd);
1143 qib_user_sdma_queue_clean(ppd, pq); 1145 qib_user_sdma_queue_clean(ppd, pq);
1144 mutex_unlock(&pq->lock); 1146 mutex_unlock(&pq->lock);
1145 msleep(10); 1147 msleep(20);
1146 } 1148 }
1147 1149
1148 if (pq->num_pending || pq->num_sending) { 1150 if (pq->num_pending || pq->num_sending) {
@@ -1316,8 +1318,6 @@ retry:
1316 1318
1317 if (nfree && !list_empty(pktlist)) 1319 if (nfree && !list_empty(pktlist))
1318 goto retry; 1320 goto retry;
1319
1320 return;
1321} 1321}
1322 1322
1323/* pq->lock must be held, get packets on the wire... */ 1323/* pq->lock must be held, get packets on the wire... */
diff --git a/drivers/infiniband/hw/qib/qib_verbs.c b/drivers/infiniband/hw/qib/qib_verbs.c
index 9bcfbd842980..4a3599890ea5 100644
--- a/drivers/infiniband/hw/qib/qib_verbs.c
+++ b/drivers/infiniband/hw/qib/qib_verbs.c
@@ -1342,6 +1342,7 @@ static int qib_verbs_send_pio(struct qib_qp *qp, struct qib_ib_header *ibhdr,
1342done: 1342done:
1343 if (dd->flags & QIB_USE_SPCL_TRIG) { 1343 if (dd->flags & QIB_USE_SPCL_TRIG) {
1344 u32 spcl_off = (pbufn >= dd->piobcnt2k) ? 2047 : 1023; 1344 u32 spcl_off = (pbufn >= dd->piobcnt2k) ? 2047 : 1023;
1345
1345 qib_flush_wc(); 1346 qib_flush_wc();
1346 __raw_writel(0xaebecede, piobuf_orig + spcl_off); 1347 __raw_writel(0xaebecede, piobuf_orig + spcl_off);
1347 } 1348 }
@@ -1744,7 +1745,7 @@ static struct ib_pd *qib_alloc_pd(struct ib_device *ibdev,
1744 * we allow allocations of more than we report for this value. 1745 * we allow allocations of more than we report for this value.
1745 */ 1746 */
1746 1747
1747 pd = kmalloc(sizeof *pd, GFP_KERNEL); 1748 pd = kmalloc(sizeof(*pd), GFP_KERNEL);
1748 if (!pd) { 1749 if (!pd) {
1749 ret = ERR_PTR(-ENOMEM); 1750 ret = ERR_PTR(-ENOMEM);
1750 goto bail; 1751 goto bail;
@@ -1829,7 +1830,7 @@ static struct ib_ah *qib_create_ah(struct ib_pd *pd,
1829 goto bail; 1830 goto bail;
1830 } 1831 }
1831 1832
1832 ah = kmalloc(sizeof *ah, GFP_ATOMIC); 1833 ah = kmalloc(sizeof(*ah), GFP_ATOMIC);
1833 if (!ah) { 1834 if (!ah) {
1834 ret = ERR_PTR(-ENOMEM); 1835 ret = ERR_PTR(-ENOMEM);
1835 goto bail; 1836 goto bail;
@@ -1862,7 +1863,7 @@ struct ib_ah *qib_create_qp0_ah(struct qib_ibport *ibp, u16 dlid)
1862 struct ib_ah *ah = ERR_PTR(-EINVAL); 1863 struct ib_ah *ah = ERR_PTR(-EINVAL);
1863 struct qib_qp *qp0; 1864 struct qib_qp *qp0;
1864 1865
1865 memset(&attr, 0, sizeof attr); 1866 memset(&attr, 0, sizeof(attr));
1866 attr.dlid = dlid; 1867 attr.dlid = dlid;
1867 attr.port_num = ppd_from_ibp(ibp)->port; 1868 attr.port_num = ppd_from_ibp(ibp)->port;
1868 rcu_read_lock(); 1869 rcu_read_lock();
@@ -1977,7 +1978,7 @@ static struct ib_ucontext *qib_alloc_ucontext(struct ib_device *ibdev,
1977 struct qib_ucontext *context; 1978 struct qib_ucontext *context;
1978 struct ib_ucontext *ret; 1979 struct ib_ucontext *ret;
1979 1980
1980 context = kmalloc(sizeof *context, GFP_KERNEL); 1981 context = kmalloc(sizeof(*context), GFP_KERNEL);
1981 if (!context) { 1982 if (!context) {
1982 ret = ERR_PTR(-ENOMEM); 1983 ret = ERR_PTR(-ENOMEM);
1983 goto bail; 1984 goto bail;
@@ -2054,7 +2055,9 @@ int qib_register_ib_device(struct qib_devdata *dd)
2054 2055
2055 dev->qp_table_size = ib_qib_qp_table_size; 2056 dev->qp_table_size = ib_qib_qp_table_size;
2056 get_random_bytes(&dev->qp_rnd, sizeof(dev->qp_rnd)); 2057 get_random_bytes(&dev->qp_rnd, sizeof(dev->qp_rnd));
2057 dev->qp_table = kmalloc(dev->qp_table_size * sizeof *dev->qp_table, 2058 dev->qp_table = kmalloc_array(
2059 dev->qp_table_size,
2060 sizeof(*dev->qp_table),
2058 GFP_KERNEL); 2061 GFP_KERNEL);
2059 if (!dev->qp_table) { 2062 if (!dev->qp_table) {
2060 ret = -ENOMEM; 2063 ret = -ENOMEM;
@@ -2122,7 +2125,7 @@ int qib_register_ib_device(struct qib_devdata *dd)
2122 for (i = 0; i < ppd->sdma_descq_cnt; i++) { 2125 for (i = 0; i < ppd->sdma_descq_cnt; i++) {
2123 struct qib_verbs_txreq *tx; 2126 struct qib_verbs_txreq *tx;
2124 2127
2125 tx = kzalloc(sizeof *tx, GFP_KERNEL); 2128 tx = kzalloc(sizeof(*tx), GFP_KERNEL);
2126 if (!tx) { 2129 if (!tx) {
2127 ret = -ENOMEM; 2130 ret = -ENOMEM;
2128 goto err_tx; 2131 goto err_tx;
diff --git a/drivers/infiniband/hw/qib/qib_verbs_mcast.c b/drivers/infiniband/hw/qib/qib_verbs_mcast.c
index dabb697b1c2a..f8ea069a3eaf 100644
--- a/drivers/infiniband/hw/qib/qib_verbs_mcast.c
+++ b/drivers/infiniband/hw/qib/qib_verbs_mcast.c
@@ -43,7 +43,7 @@ static struct qib_mcast_qp *qib_mcast_qp_alloc(struct qib_qp *qp)
43{ 43{
44 struct qib_mcast_qp *mqp; 44 struct qib_mcast_qp *mqp;
45 45
46 mqp = kmalloc(sizeof *mqp, GFP_KERNEL); 46 mqp = kmalloc(sizeof(*mqp), GFP_KERNEL);
47 if (!mqp) 47 if (!mqp)
48 goto bail; 48 goto bail;
49 49
@@ -75,7 +75,7 @@ static struct qib_mcast *qib_mcast_alloc(union ib_gid *mgid)
75{ 75{
76 struct qib_mcast *mcast; 76 struct qib_mcast *mcast;
77 77
78 mcast = kmalloc(sizeof *mcast, GFP_KERNEL); 78 mcast = kmalloc(sizeof(*mcast), GFP_KERNEL);
79 if (!mcast) 79 if (!mcast)
80 goto bail; 80 goto bail;
81 81
diff --git a/drivers/infiniband/hw/qib/qib_wc_x86_64.c b/drivers/infiniband/hw/qib/qib_wc_x86_64.c
index 1d7281c5a02e..81b225f2300a 100644
--- a/drivers/infiniband/hw/qib/qib_wc_x86_64.c
+++ b/drivers/infiniband/hw/qib/qib_wc_x86_64.c
@@ -72,6 +72,7 @@ int qib_enable_wc(struct qib_devdata *dd)
72 if (dd->piobcnt2k && dd->piobcnt4k) { 72 if (dd->piobcnt2k && dd->piobcnt4k) {
73 /* 2 sizes for chip */ 73 /* 2 sizes for chip */
74 unsigned long pio2kbase, pio4kbase; 74 unsigned long pio2kbase, pio4kbase;
75
75 pio2kbase = dd->piobufbase & 0xffffffffUL; 76 pio2kbase = dd->piobufbase & 0xffffffffUL;
76 pio4kbase = (dd->piobufbase >> 32) & 0xffffffffUL; 77 pio4kbase = (dd->piobufbase >> 32) & 0xffffffffUL;
77 if (pio2kbase < pio4kbase) { 78 if (pio2kbase < pio4kbase) {
@@ -91,7 +92,7 @@ int qib_enable_wc(struct qib_devdata *dd)
91 } 92 }
92 93
93 for (bits = 0; !(piolen & (1ULL << bits)); bits++) 94 for (bits = 0; !(piolen & (1ULL << bits)); bits++)
94 /* do nothing */ ; 95 ; /* do nothing */
95 96
96 if (piolen != (1ULL << bits)) { 97 if (piolen != (1ULL << bits)) {
97 piolen >>= bits; 98 piolen >>= bits;
@@ -100,8 +101,8 @@ int qib_enable_wc(struct qib_devdata *dd)
100 piolen = 1ULL << (bits + 1); 101 piolen = 1ULL << (bits + 1);
101 } 102 }
102 if (pioaddr & (piolen - 1)) { 103 if (pioaddr & (piolen - 1)) {
103 u64 atmp; 104 u64 atmp = pioaddr & ~(piolen - 1);
104 atmp = pioaddr & ~(piolen - 1); 105
105 if (atmp < addr || (atmp + piolen) > (addr + len)) { 106 if (atmp < addr || (atmp + piolen) > (addr + len)) {
106 qib_dev_err(dd, 107 qib_dev_err(dd,
107 "No way to align address/size (%llx/%llx), no WC mtrr\n", 108 "No way to align address/size (%llx/%llx), no WC mtrr\n",
diff --git a/drivers/infiniband/ulp/iser/iscsi_iser.h b/drivers/infiniband/ulp/iser/iscsi_iser.h
index 5ce26817e7e1..b47aea1094b2 100644
--- a/drivers/infiniband/ulp/iser/iscsi_iser.h
+++ b/drivers/infiniband/ulp/iser/iscsi_iser.h
@@ -654,7 +654,9 @@ int iser_dma_map_task_data(struct iscsi_iser_task *iser_task,
654 enum dma_data_direction dma_dir); 654 enum dma_data_direction dma_dir);
655 655
656void iser_dma_unmap_task_data(struct iscsi_iser_task *iser_task, 656void iser_dma_unmap_task_data(struct iscsi_iser_task *iser_task,
657 struct iser_data_buf *data); 657 struct iser_data_buf *data,
658 enum dma_data_direction dir);
659
658int iser_initialize_task_headers(struct iscsi_task *task, 660int iser_initialize_task_headers(struct iscsi_task *task,
659 struct iser_tx_desc *tx_desc); 661 struct iser_tx_desc *tx_desc);
660int iser_alloc_rx_descriptors(struct iser_conn *iser_conn, 662int iser_alloc_rx_descriptors(struct iser_conn *iser_conn,
diff --git a/drivers/infiniband/ulp/iser/iser_initiator.c b/drivers/infiniband/ulp/iser/iser_initiator.c
index 3821633f1065..20e859a6f1a6 100644
--- a/drivers/infiniband/ulp/iser/iser_initiator.c
+++ b/drivers/infiniband/ulp/iser/iser_initiator.c
@@ -320,9 +320,6 @@ void iser_free_rx_descriptors(struct iser_conn *iser_conn)
320 struct ib_conn *ib_conn = &iser_conn->ib_conn; 320 struct ib_conn *ib_conn = &iser_conn->ib_conn;
321 struct iser_device *device = ib_conn->device; 321 struct iser_device *device = ib_conn->device;
322 322
323 if (!iser_conn->rx_descs)
324 goto free_login_buf;
325
326 if (device->iser_free_rdma_reg_res) 323 if (device->iser_free_rdma_reg_res)
327 device->iser_free_rdma_reg_res(ib_conn); 324 device->iser_free_rdma_reg_res(ib_conn);
328 325
@@ -334,7 +331,6 @@ void iser_free_rx_descriptors(struct iser_conn *iser_conn)
334 /* make sure we never redo any unmapping */ 331 /* make sure we never redo any unmapping */
335 iser_conn->rx_descs = NULL; 332 iser_conn->rx_descs = NULL;
336 333
337free_login_buf:
338 iser_free_login_buf(iser_conn); 334 iser_free_login_buf(iser_conn);
339} 335}
340 336
@@ -714,19 +710,23 @@ void iser_task_rdma_finalize(struct iscsi_iser_task *iser_task)
714 device->iser_unreg_rdma_mem(iser_task, ISER_DIR_IN); 710 device->iser_unreg_rdma_mem(iser_task, ISER_DIR_IN);
715 if (is_rdma_data_aligned) 711 if (is_rdma_data_aligned)
716 iser_dma_unmap_task_data(iser_task, 712 iser_dma_unmap_task_data(iser_task,
717 &iser_task->data[ISER_DIR_IN]); 713 &iser_task->data[ISER_DIR_IN],
714 DMA_FROM_DEVICE);
718 if (prot_count && is_rdma_prot_aligned) 715 if (prot_count && is_rdma_prot_aligned)
719 iser_dma_unmap_task_data(iser_task, 716 iser_dma_unmap_task_data(iser_task,
720 &iser_task->prot[ISER_DIR_IN]); 717 &iser_task->prot[ISER_DIR_IN],
718 DMA_FROM_DEVICE);
721 } 719 }
722 720
723 if (iser_task->dir[ISER_DIR_OUT]) { 721 if (iser_task->dir[ISER_DIR_OUT]) {
724 device->iser_unreg_rdma_mem(iser_task, ISER_DIR_OUT); 722 device->iser_unreg_rdma_mem(iser_task, ISER_DIR_OUT);
725 if (is_rdma_data_aligned) 723 if (is_rdma_data_aligned)
726 iser_dma_unmap_task_data(iser_task, 724 iser_dma_unmap_task_data(iser_task,
727 &iser_task->data[ISER_DIR_OUT]); 725 &iser_task->data[ISER_DIR_OUT],
726 DMA_TO_DEVICE);
728 if (prot_count && is_rdma_prot_aligned) 727 if (prot_count && is_rdma_prot_aligned)
729 iser_dma_unmap_task_data(iser_task, 728 iser_dma_unmap_task_data(iser_task,
730 &iser_task->prot[ISER_DIR_OUT]); 729 &iser_task->prot[ISER_DIR_OUT],
730 DMA_TO_DEVICE);
731 } 731 }
732} 732}
diff --git a/drivers/infiniband/ulp/iser/iser_memory.c b/drivers/infiniband/ulp/iser/iser_memory.c
index abce9339333f..341040bf0984 100644
--- a/drivers/infiniband/ulp/iser/iser_memory.c
+++ b/drivers/infiniband/ulp/iser/iser_memory.c
@@ -332,12 +332,13 @@ int iser_dma_map_task_data(struct iscsi_iser_task *iser_task,
332} 332}
333 333
334void iser_dma_unmap_task_data(struct iscsi_iser_task *iser_task, 334void iser_dma_unmap_task_data(struct iscsi_iser_task *iser_task,
335 struct iser_data_buf *data) 335 struct iser_data_buf *data,
336 enum dma_data_direction dir)
336{ 337{
337 struct ib_device *dev; 338 struct ib_device *dev;
338 339
339 dev = iser_task->iser_conn->ib_conn.device->ib_device; 340 dev = iser_task->iser_conn->ib_conn.device->ib_device;
340 ib_dma_unmap_sg(dev, data->buf, data->size, DMA_FROM_DEVICE); 341 ib_dma_unmap_sg(dev, data->buf, data->size, dir);
341} 342}
342 343
343static int fall_to_bounce_buf(struct iscsi_iser_task *iser_task, 344static int fall_to_bounce_buf(struct iscsi_iser_task *iser_task,
@@ -357,7 +358,9 @@ static int fall_to_bounce_buf(struct iscsi_iser_task *iser_task,
357 iser_data_buf_dump(mem, ibdev); 358 iser_data_buf_dump(mem, ibdev);
358 359
359 /* unmap the command data before accessing it */ 360 /* unmap the command data before accessing it */
360 iser_dma_unmap_task_data(iser_task, mem); 361 iser_dma_unmap_task_data(iser_task, mem,
362 (cmd_dir == ISER_DIR_OUT) ?
363 DMA_TO_DEVICE : DMA_FROM_DEVICE);
361 364
362 /* allocate copy buf, if we are writing, copy the */ 365 /* allocate copy buf, if we are writing, copy the */
363 /* unaligned scatterlist, dma map the copy */ 366 /* unaligned scatterlist, dma map the copy */
diff --git a/drivers/infiniband/ulp/iser/iser_verbs.c b/drivers/infiniband/ulp/iser/iser_verbs.c
index 695a2704bd43..4065abe28829 100644
--- a/drivers/infiniband/ulp/iser/iser_verbs.c
+++ b/drivers/infiniband/ulp/iser/iser_verbs.c
@@ -600,16 +600,16 @@ void iser_release_work(struct work_struct *work)
600/** 600/**
601 * iser_free_ib_conn_res - release IB related resources 601 * iser_free_ib_conn_res - release IB related resources
602 * @iser_conn: iser connection struct 602 * @iser_conn: iser connection struct
603 * @destroy_device: indicator if we need to try to release 603 * @destroy: indicator if we need to try to release the
604 * the iser device (only iscsi shutdown and DEVICE_REMOVAL 604 * iser device and memory regoins pool (only iscsi
605 * will use this. 605 * shutdown and DEVICE_REMOVAL will use this).
606 * 606 *
607 * This routine is called with the iser state mutex held 607 * This routine is called with the iser state mutex held
608 * so the cm_id removal is out of here. It is Safe to 608 * so the cm_id removal is out of here. It is Safe to
609 * be invoked multiple times. 609 * be invoked multiple times.
610 */ 610 */
611static void iser_free_ib_conn_res(struct iser_conn *iser_conn, 611static void iser_free_ib_conn_res(struct iser_conn *iser_conn,
612 bool destroy_device) 612 bool destroy)
613{ 613{
614 struct ib_conn *ib_conn = &iser_conn->ib_conn; 614 struct ib_conn *ib_conn = &iser_conn->ib_conn;
615 struct iser_device *device = ib_conn->device; 615 struct iser_device *device = ib_conn->device;
@@ -617,17 +617,20 @@ static void iser_free_ib_conn_res(struct iser_conn *iser_conn,
617 iser_info("freeing conn %p cma_id %p qp %p\n", 617 iser_info("freeing conn %p cma_id %p qp %p\n",
618 iser_conn, ib_conn->cma_id, ib_conn->qp); 618 iser_conn, ib_conn->cma_id, ib_conn->qp);
619 619
620 iser_free_rx_descriptors(iser_conn);
621
622 if (ib_conn->qp != NULL) { 620 if (ib_conn->qp != NULL) {
623 ib_conn->comp->active_qps--; 621 ib_conn->comp->active_qps--;
624 rdma_destroy_qp(ib_conn->cma_id); 622 rdma_destroy_qp(ib_conn->cma_id);
625 ib_conn->qp = NULL; 623 ib_conn->qp = NULL;
626 } 624 }
627 625
628 if (destroy_device && device != NULL) { 626 if (destroy) {
629 iser_device_try_release(device); 627 if (iser_conn->rx_descs)
630 ib_conn->device = NULL; 628 iser_free_rx_descriptors(iser_conn);
629
630 if (device != NULL) {
631 iser_device_try_release(device);
632 ib_conn->device = NULL;
633 }
631 } 634 }
632} 635}
633 636
@@ -643,9 +646,11 @@ void iser_conn_release(struct iser_conn *iser_conn)
643 mutex_unlock(&ig.connlist_mutex); 646 mutex_unlock(&ig.connlist_mutex);
644 647
645 mutex_lock(&iser_conn->state_mutex); 648 mutex_lock(&iser_conn->state_mutex);
649 /* In case we endup here without ep_disconnect being invoked. */
646 if (iser_conn->state != ISER_CONN_DOWN) { 650 if (iser_conn->state != ISER_CONN_DOWN) {
647 iser_warn("iser conn %p state %d, expected state down.\n", 651 iser_warn("iser conn %p state %d, expected state down.\n",
648 iser_conn, iser_conn->state); 652 iser_conn, iser_conn->state);
653 iscsi_destroy_endpoint(iser_conn->ep);
649 iser_conn->state = ISER_CONN_DOWN; 654 iser_conn->state = ISER_CONN_DOWN;
650 } 655 }
651 /* 656 /*
@@ -840,7 +845,7 @@ static void iser_disconnected_handler(struct rdma_cm_id *cma_id)
840} 845}
841 846
842static void iser_cleanup_handler(struct rdma_cm_id *cma_id, 847static void iser_cleanup_handler(struct rdma_cm_id *cma_id,
843 bool destroy_device) 848 bool destroy)
844{ 849{
845 struct iser_conn *iser_conn = (struct iser_conn *)cma_id->context; 850 struct iser_conn *iser_conn = (struct iser_conn *)cma_id->context;
846 851
@@ -850,7 +855,7 @@ static void iser_cleanup_handler(struct rdma_cm_id *cma_id,
850 * and flush errors. 855 * and flush errors.
851 */ 856 */
852 iser_disconnected_handler(cma_id); 857 iser_disconnected_handler(cma_id);
853 iser_free_ib_conn_res(iser_conn, destroy_device); 858 iser_free_ib_conn_res(iser_conn, destroy);
854 complete(&iser_conn->ib_completion); 859 complete(&iser_conn->ib_completion);
855}; 860};
856 861
diff --git a/drivers/infiniband/ulp/isert/ib_isert.c b/drivers/infiniband/ulp/isert/ib_isert.c
index dafb3c531f96..075b19cc78e8 100644
--- a/drivers/infiniband/ulp/isert/ib_isert.c
+++ b/drivers/infiniband/ulp/isert/ib_isert.c
@@ -38,7 +38,7 @@
38#define ISER_MAX_CQ_LEN (ISER_MAX_RX_CQ_LEN + ISER_MAX_TX_CQ_LEN + \ 38#define ISER_MAX_CQ_LEN (ISER_MAX_RX_CQ_LEN + ISER_MAX_TX_CQ_LEN + \
39 ISERT_MAX_CONN) 39 ISERT_MAX_CONN)
40 40
41int isert_debug_level = 0; 41static int isert_debug_level;
42module_param_named(debug_level, isert_debug_level, int, 0644); 42module_param_named(debug_level, isert_debug_level, int, 0644);
43MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0 (default:0)"); 43MODULE_PARM_DESC(debug_level, "Enable debug tracing if > 0 (default:0)");
44 44
@@ -949,7 +949,7 @@ isert_post_recv(struct isert_conn *isert_conn, u32 count)
949 isert_err("ib_post_recv() failed with ret: %d\n", ret); 949 isert_err("ib_post_recv() failed with ret: %d\n", ret);
950 isert_conn->post_recv_buf_count -= count; 950 isert_conn->post_recv_buf_count -= count;
951 } else { 951 } else {
952 isert_dbg("isert_post_recv(): Posted %d RX buffers\n", count); 952 isert_dbg("Posted %d RX buffers\n", count);
953 isert_conn->conn_rx_desc_head = rx_head; 953 isert_conn->conn_rx_desc_head = rx_head;
954 } 954 }
955 return ret; 955 return ret;
@@ -1351,17 +1351,19 @@ isert_handle_text_cmd(struct isert_conn *isert_conn, struct isert_cmd *isert_cmd
1351 struct iscsi_conn *conn = isert_conn->conn; 1351 struct iscsi_conn *conn = isert_conn->conn;
1352 u32 payload_length = ntoh24(hdr->dlength); 1352 u32 payload_length = ntoh24(hdr->dlength);
1353 int rc; 1353 int rc;
1354 unsigned char *text_in; 1354 unsigned char *text_in = NULL;
1355 1355
1356 rc = iscsit_setup_text_cmd(conn, cmd, hdr); 1356 rc = iscsit_setup_text_cmd(conn, cmd, hdr);
1357 if (rc < 0) 1357 if (rc < 0)
1358 return rc; 1358 return rc;
1359 1359
1360 text_in = kzalloc(payload_length, GFP_KERNEL); 1360 if (payload_length) {
1361 if (!text_in) { 1361 text_in = kzalloc(payload_length, GFP_KERNEL);
1362 isert_err("Unable to allocate text_in of payload_length: %u\n", 1362 if (!text_in) {
1363 payload_length); 1363 isert_err("Unable to allocate text_in of payload_length: %u\n",
1364 return -ENOMEM; 1364 payload_length);
1365 return -ENOMEM;
1366 }
1365 } 1367 }
1366 cmd->text_in_ptr = text_in; 1368 cmd->text_in_ptr = text_in;
1367 1369
@@ -1434,9 +1436,15 @@ isert_rx_opcode(struct isert_conn *isert_conn, struct iser_rx_desc *rx_desc,
1434 ret = iscsit_handle_logout_cmd(conn, cmd, (unsigned char *)hdr); 1436 ret = iscsit_handle_logout_cmd(conn, cmd, (unsigned char *)hdr);
1435 break; 1437 break;
1436 case ISCSI_OP_TEXT: 1438 case ISCSI_OP_TEXT:
1437 cmd = isert_allocate_cmd(conn); 1439 if (be32_to_cpu(hdr->ttt) != 0xFFFFFFFF) {
1438 if (!cmd) 1440 cmd = iscsit_find_cmd_from_itt(conn, hdr->itt);
1439 break; 1441 if (!cmd)
1442 break;
1443 } else {
1444 cmd = isert_allocate_cmd(conn);
1445 if (!cmd)
1446 break;
1447 }
1440 1448
1441 isert_cmd = iscsit_priv_cmd(cmd); 1449 isert_cmd = iscsit_priv_cmd(cmd);
1442 ret = isert_handle_text_cmd(isert_conn, isert_cmd, cmd, 1450 ret = isert_handle_text_cmd(isert_conn, isert_cmd, cmd,
@@ -1658,6 +1666,7 @@ isert_put_cmd(struct isert_cmd *isert_cmd, bool comp_err)
1658 struct isert_conn *isert_conn = isert_cmd->conn; 1666 struct isert_conn *isert_conn = isert_cmd->conn;
1659 struct iscsi_conn *conn = isert_conn->conn; 1667 struct iscsi_conn *conn = isert_conn->conn;
1660 struct isert_device *device = isert_conn->conn_device; 1668 struct isert_device *device = isert_conn->conn_device;
1669 struct iscsi_text_rsp *hdr;
1661 1670
1662 isert_dbg("Cmd %p\n", isert_cmd); 1671 isert_dbg("Cmd %p\n", isert_cmd);
1663 1672
@@ -1698,6 +1707,11 @@ isert_put_cmd(struct isert_cmd *isert_cmd, bool comp_err)
1698 case ISCSI_OP_REJECT: 1707 case ISCSI_OP_REJECT:
1699 case ISCSI_OP_NOOP_OUT: 1708 case ISCSI_OP_NOOP_OUT:
1700 case ISCSI_OP_TEXT: 1709 case ISCSI_OP_TEXT:
1710 hdr = (struct iscsi_text_rsp *)&isert_cmd->tx_desc.iscsi_header;
1711 /* If the continue bit is on, keep the command alive */
1712 if (hdr->flags & ISCSI_FLAG_TEXT_CONTINUE)
1713 break;
1714
1701 spin_lock_bh(&conn->cmd_lock); 1715 spin_lock_bh(&conn->cmd_lock);
1702 if (!list_empty(&cmd->i_conn_node)) 1716 if (!list_empty(&cmd->i_conn_node))
1703 list_del_init(&cmd->i_conn_node); 1717 list_del_init(&cmd->i_conn_node);
@@ -1709,8 +1723,7 @@ isert_put_cmd(struct isert_cmd *isert_cmd, bool comp_err)
1709 * associated cmd->se_cmd needs to be released. 1723 * associated cmd->se_cmd needs to be released.
1710 */ 1724 */
1711 if (cmd->se_cmd.se_tfo != NULL) { 1725 if (cmd->se_cmd.se_tfo != NULL) {
1712 isert_dbg("Calling transport_generic_free_cmd from" 1726 isert_dbg("Calling transport_generic_free_cmd for 0x%02x\n",
1713 " isert_put_cmd for 0x%02x\n",
1714 cmd->iscsi_opcode); 1727 cmd->iscsi_opcode);
1715 transport_generic_free_cmd(&cmd->se_cmd, 0); 1728 transport_generic_free_cmd(&cmd->se_cmd, 0);
1716 break; 1729 break;
@@ -2275,7 +2288,7 @@ isert_put_text_rsp(struct iscsi_cmd *cmd, struct iscsi_conn *conn)
2275 } 2288 }
2276 isert_init_send_wr(isert_conn, isert_cmd, send_wr); 2289 isert_init_send_wr(isert_conn, isert_cmd, send_wr);
2277 2290
2278 isert_dbg("conn %p Text Reject\n", isert_conn); 2291 isert_dbg("conn %p Text Response\n", isert_conn);
2279 2292
2280 return isert_post_response(isert_conn, isert_cmd); 2293 return isert_post_response(isert_conn, isert_cmd);
2281} 2294}
@@ -3136,7 +3149,7 @@ accept_wait:
3136 spin_lock_bh(&np->np_thread_lock); 3149 spin_lock_bh(&np->np_thread_lock);
3137 if (np->np_thread_state >= ISCSI_NP_THREAD_RESET) { 3150 if (np->np_thread_state >= ISCSI_NP_THREAD_RESET) {
3138 spin_unlock_bh(&np->np_thread_lock); 3151 spin_unlock_bh(&np->np_thread_lock);
3139 isert_dbg("np_thread_state %d for isert_accept_np\n", 3152 isert_dbg("np_thread_state %d\n",
3140 np->np_thread_state); 3153 np->np_thread_state);
3141 /** 3154 /**
3142 * No point in stalling here when np_thread 3155 * No point in stalling here when np_thread
@@ -3320,7 +3333,8 @@ static int __init isert_init(void)
3320{ 3333{
3321 int ret; 3334 int ret;
3322 3335
3323 isert_comp_wq = alloc_workqueue("isert_comp_wq", 0, 0); 3336 isert_comp_wq = alloc_workqueue("isert_comp_wq",
3337 WQ_UNBOUND | WQ_HIGHPRI, 0);
3324 if (!isert_comp_wq) { 3338 if (!isert_comp_wq) {
3325 isert_err("Unable to allocate isert_comp_wq\n"); 3339 isert_err("Unable to allocate isert_comp_wq\n");
3326 ret = -ENOMEM; 3340 ret = -ENOMEM;
diff --git a/drivers/infiniband/ulp/srpt/ib_srpt.c b/drivers/infiniband/ulp/srpt/ib_srpt.c
index eb694ddad79f..6e0a477681e9 100644
--- a/drivers/infiniband/ulp/srpt/ib_srpt.c
+++ b/drivers/infiniband/ulp/srpt/ib_srpt.c
@@ -3518,7 +3518,7 @@ static void srpt_close_session(struct se_session *se_sess)
3518 DECLARE_COMPLETION_ONSTACK(release_done); 3518 DECLARE_COMPLETION_ONSTACK(release_done);
3519 struct srpt_rdma_ch *ch; 3519 struct srpt_rdma_ch *ch;
3520 struct srpt_device *sdev; 3520 struct srpt_device *sdev;
3521 int res; 3521 unsigned long res;
3522 3522
3523 ch = se_sess->fabric_sess_ptr; 3523 ch = se_sess->fabric_sess_ptr;
3524 WARN_ON(ch->sess != se_sess); 3524 WARN_ON(ch->sess != se_sess);
@@ -3533,7 +3533,7 @@ static void srpt_close_session(struct se_session *se_sess)
3533 spin_unlock_irq(&sdev->spinlock); 3533 spin_unlock_irq(&sdev->spinlock);
3534 3534
3535 res = wait_for_completion_timeout(&release_done, 60 * HZ); 3535 res = wait_for_completion_timeout(&release_done, 60 * HZ);
3536 WARN_ON(res <= 0); 3536 WARN_ON(res == 0);
3537} 3537}
3538 3538
3539/** 3539/**
diff --git a/drivers/input/joystick/adi.c b/drivers/input/joystick/adi.c
index b78425765d3e..d09cefa37931 100644
--- a/drivers/input/joystick/adi.c
+++ b/drivers/input/joystick/adi.c
@@ -535,8 +535,7 @@ static int adi_connect(struct gameport *gameport, struct gameport_driver *drv)
535 } 535 }
536 } 536 }
537 fail2: for (i = 0; i < 2; i++) 537 fail2: for (i = 0; i < 2; i++)
538 if (port->adi[i].dev) 538 input_free_device(port->adi[i].dev);
539 input_free_device(port->adi[i].dev);
540 gameport_close(gameport); 539 gameport_close(gameport);
541 fail1: gameport_set_drvdata(gameport, NULL); 540 fail1: gameport_set_drvdata(gameport, NULL);
542 kfree(port); 541 kfree(port);
diff --git a/drivers/input/keyboard/pxa27x_keypad.c b/drivers/input/keyboard/pxa27x_keypad.c
index a89488aa1aa4..fcef5d1365e2 100644
--- a/drivers/input/keyboard/pxa27x_keypad.c
+++ b/drivers/input/keyboard/pxa27x_keypad.c
@@ -345,13 +345,11 @@ static int pxa27x_keypad_build_keycode(struct pxa27x_keypad *keypad)
345{ 345{
346 const struct pxa27x_keypad_platform_data *pdata = keypad->pdata; 346 const struct pxa27x_keypad_platform_data *pdata = keypad->pdata;
347 struct input_dev *input_dev = keypad->input_dev; 347 struct input_dev *input_dev = keypad->input_dev;
348 const struct matrix_keymap_data *keymap_data =
349 pdata ? pdata->matrix_keymap_data : NULL;
350 unsigned short keycode; 348 unsigned short keycode;
351 int i; 349 int i;
352 int error; 350 int error;
353 351
354 error = matrix_keypad_build_keymap(keymap_data, NULL, 352 error = matrix_keypad_build_keymap(pdata->matrix_keymap_data, NULL,
355 pdata->matrix_key_rows, 353 pdata->matrix_key_rows,
356 pdata->matrix_key_cols, 354 pdata->matrix_key_cols,
357 keypad->keycodes, input_dev); 355 keypad->keycodes, input_dev);
diff --git a/drivers/input/keyboard/tc3589x-keypad.c b/drivers/input/keyboard/tc3589x-keypad.c
index 8ff612d160b0..563932500ff1 100644
--- a/drivers/input/keyboard/tc3589x-keypad.c
+++ b/drivers/input/keyboard/tc3589x-keypad.c
@@ -411,9 +411,9 @@ static int tc3589x_keypad_probe(struct platform_device *pdev)
411 411
412 input_set_drvdata(input, keypad); 412 input_set_drvdata(input, keypad);
413 413
414 error = request_threaded_irq(irq, NULL, 414 error = request_threaded_irq(irq, NULL, tc3589x_keypad_irq,
415 tc3589x_keypad_irq, plat->irqtype, 415 plat->irqtype | IRQF_ONESHOT,
416 "tc3589x-keypad", keypad); 416 "tc3589x-keypad", keypad);
417 if (error < 0) { 417 if (error < 0) {
418 dev_err(&pdev->dev, 418 dev_err(&pdev->dev,
419 "Could not allocate irq %d,error %d\n", 419 "Could not allocate irq %d,error %d\n",
diff --git a/drivers/input/misc/bfin_rotary.c b/drivers/input/misc/bfin_rotary.c
index 3f4351579372..a0fc18fdfc0c 100644
--- a/drivers/input/misc/bfin_rotary.c
+++ b/drivers/input/misc/bfin_rotary.c
@@ -7,29 +7,37 @@
7 7
8#include <linux/module.h> 8#include <linux/module.h>
9#include <linux/interrupt.h> 9#include <linux/interrupt.h>
10#include <linux/io.h>
10#include <linux/irq.h> 11#include <linux/irq.h>
11#include <linux/pm.h> 12#include <linux/pm.h>
12#include <linux/platform_device.h> 13#include <linux/platform_device.h>
13#include <linux/input.h> 14#include <linux/input.h>
14#include <linux/slab.h> 15#include <linux/slab.h>
16#include <linux/platform_data/bfin_rotary.h>
15 17
16#include <asm/portmux.h> 18#include <asm/portmux.h>
17#include <asm/bfin_rotary.h>
18 19
19static const u16 per_cnt[] = { 20#define CNT_CONFIG_OFF 0 /* CNT Config Offset */
20 P_CNT_CUD, 21#define CNT_IMASK_OFF 4 /* CNT Interrupt Mask Offset */
21 P_CNT_CDG, 22#define CNT_STATUS_OFF 8 /* CNT Status Offset */
22 P_CNT_CZM, 23#define CNT_COMMAND_OFF 12 /* CNT Command Offset */
23 0 24#define CNT_DEBOUNCE_OFF 16 /* CNT Debounce Offset */
24}; 25#define CNT_COUNTER_OFF 20 /* CNT Counter Offset */
26#define CNT_MAX_OFF 24 /* CNT Maximum Count Offset */
27#define CNT_MIN_OFF 28 /* CNT Minimum Count Offset */
25 28
26struct bfin_rot { 29struct bfin_rot {
27 struct input_dev *input; 30 struct input_dev *input;
31 void __iomem *base;
28 int irq; 32 int irq;
29 unsigned int up_key; 33 unsigned int up_key;
30 unsigned int down_key; 34 unsigned int down_key;
31 unsigned int button_key; 35 unsigned int button_key;
32 unsigned int rel_code; 36 unsigned int rel_code;
37
38 unsigned short mode;
39 unsigned short debounce;
40
33 unsigned short cnt_config; 41 unsigned short cnt_config;
34 unsigned short cnt_imask; 42 unsigned short cnt_imask;
35 unsigned short cnt_debounce; 43 unsigned short cnt_debounce;
@@ -59,18 +67,17 @@ static void report_rotary_event(struct bfin_rot *rotary, int delta)
59 67
60static irqreturn_t bfin_rotary_isr(int irq, void *dev_id) 68static irqreturn_t bfin_rotary_isr(int irq, void *dev_id)
61{ 69{
62 struct platform_device *pdev = dev_id; 70 struct bfin_rot *rotary = dev_id;
63 struct bfin_rot *rotary = platform_get_drvdata(pdev);
64 int delta; 71 int delta;
65 72
66 switch (bfin_read_CNT_STATUS()) { 73 switch (readw(rotary->base + CNT_STATUS_OFF)) {
67 74
68 case ICII: 75 case ICII:
69 break; 76 break;
70 77
71 case UCII: 78 case UCII:
72 case DCII: 79 case DCII:
73 delta = bfin_read_CNT_COUNTER(); 80 delta = readl(rotary->base + CNT_COUNTER_OFF);
74 if (delta) 81 if (delta)
75 report_rotary_event(rotary, delta); 82 report_rotary_event(rotary, delta);
76 break; 83 break;
@@ -83,16 +90,52 @@ static irqreturn_t bfin_rotary_isr(int irq, void *dev_id)
83 break; 90 break;
84 } 91 }
85 92
86 bfin_write_CNT_COMMAND(W1LCNT_ZERO); /* Clear COUNTER */ 93 writew(W1LCNT_ZERO, rotary->base + CNT_COMMAND_OFF); /* Clear COUNTER */
87 bfin_write_CNT_STATUS(-1); /* Clear STATUS */ 94 writew(-1, rotary->base + CNT_STATUS_OFF); /* Clear STATUS */
88 95
89 return IRQ_HANDLED; 96 return IRQ_HANDLED;
90} 97}
91 98
99static int bfin_rotary_open(struct input_dev *input)
100{
101 struct bfin_rot *rotary = input_get_drvdata(input);
102 unsigned short val;
103
104 if (rotary->mode & ROT_DEBE)
105 writew(rotary->debounce & DPRESCALE,
106 rotary->base + CNT_DEBOUNCE_OFF);
107
108 writew(rotary->mode & ~CNTE, rotary->base + CNT_CONFIG_OFF);
109
110 val = UCIE | DCIE;
111 if (rotary->button_key)
112 val |= CZMIE;
113 writew(val, rotary->base + CNT_IMASK_OFF);
114
115 writew(rotary->mode | CNTE, rotary->base + CNT_CONFIG_OFF);
116
117 return 0;
118}
119
120static void bfin_rotary_close(struct input_dev *input)
121{
122 struct bfin_rot *rotary = input_get_drvdata(input);
123
124 writew(0, rotary->base + CNT_CONFIG_OFF);
125 writew(0, rotary->base + CNT_IMASK_OFF);
126}
127
128static void bfin_rotary_free_action(void *data)
129{
130 peripheral_free_list(data);
131}
132
92static int bfin_rotary_probe(struct platform_device *pdev) 133static int bfin_rotary_probe(struct platform_device *pdev)
93{ 134{
94 struct bfin_rotary_platform_data *pdata = dev_get_platdata(&pdev->dev); 135 struct device *dev = &pdev->dev;
136 const struct bfin_rotary_platform_data *pdata = dev_get_platdata(dev);
95 struct bfin_rot *rotary; 137 struct bfin_rot *rotary;
138 struct resource *res;
96 struct input_dev *input; 139 struct input_dev *input;
97 int error; 140 int error;
98 141
@@ -102,18 +145,37 @@ static int bfin_rotary_probe(struct platform_device *pdev)
102 return -EINVAL; 145 return -EINVAL;
103 } 146 }
104 147
105 error = peripheral_request_list(per_cnt, dev_name(&pdev->dev)); 148 if (pdata->pin_list) {
106 if (error) { 149 error = peripheral_request_list(pdata->pin_list,
107 dev_err(&pdev->dev, "requesting peripherals failed\n"); 150 dev_name(&pdev->dev));
108 return error; 151 if (error) {
152 dev_err(dev, "requesting peripherals failed: %d\n",
153 error);
154 return error;
155 }
156
157 error = devm_add_action(dev, bfin_rotary_free_action,
158 pdata->pin_list);
159 if (error) {
160 dev_err(dev, "setting cleanup action failed: %d\n",
161 error);
162 peripheral_free_list(pdata->pin_list);
163 return error;
164 }
109 } 165 }
110 166
111 rotary = kzalloc(sizeof(struct bfin_rot), GFP_KERNEL); 167 rotary = devm_kzalloc(dev, sizeof(struct bfin_rot), GFP_KERNEL);
112 input = input_allocate_device(); 168 if (!rotary)
113 if (!rotary || !input) { 169 return -ENOMEM;
114 error = -ENOMEM; 170
115 goto out1; 171 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
116 } 172 rotary->base = devm_ioremap_resource(dev, res);
173 if (IS_ERR(rotary->base))
174 return PTR_ERR(rotary->base);
175
176 input = devm_input_allocate_device(dev);
177 if (!input)
178 return -ENOMEM;
117 179
118 rotary->input = input; 180 rotary->input = input;
119 181
@@ -122,9 +184,8 @@ static int bfin_rotary_probe(struct platform_device *pdev)
122 rotary->button_key = pdata->rotary_button_key; 184 rotary->button_key = pdata->rotary_button_key;
123 rotary->rel_code = pdata->rotary_rel_code; 185 rotary->rel_code = pdata->rotary_rel_code;
124 186
125 error = rotary->irq = platform_get_irq(pdev, 0); 187 rotary->mode = pdata->mode;
126 if (error < 0) 188 rotary->debounce = pdata->debounce;
127 goto out1;
128 189
129 input->name = pdev->name; 190 input->name = pdev->name;
130 input->phys = "bfin-rotary/input0"; 191 input->phys = "bfin-rotary/input0";
@@ -137,6 +198,9 @@ static int bfin_rotary_probe(struct platform_device *pdev)
137 input->id.product = 0x0001; 198 input->id.product = 0x0001;
138 input->id.version = 0x0100; 199 input->id.version = 0x0100;
139 200
201 input->open = bfin_rotary_open;
202 input->close = bfin_rotary_close;
203
140 if (rotary->up_key) { 204 if (rotary->up_key) {
141 __set_bit(EV_KEY, input->evbit); 205 __set_bit(EV_KEY, input->evbit);
142 __set_bit(rotary->up_key, input->keybit); 206 __set_bit(rotary->up_key, input->keybit);
@@ -151,75 +215,43 @@ static int bfin_rotary_probe(struct platform_device *pdev)
151 __set_bit(rotary->button_key, input->keybit); 215 __set_bit(rotary->button_key, input->keybit);
152 } 216 }
153 217
154 error = request_irq(rotary->irq, bfin_rotary_isr, 218 /* Quiesce the device before requesting irq */
155 0, dev_name(&pdev->dev), pdev); 219 bfin_rotary_close(input);
220
221 rotary->irq = platform_get_irq(pdev, 0);
222 if (rotary->irq < 0) {
223 dev_err(dev, "No rotary IRQ specified\n");
224 return -ENOENT;
225 }
226
227 error = devm_request_irq(dev, rotary->irq, bfin_rotary_isr,
228 0, dev_name(dev), rotary);
156 if (error) { 229 if (error) {
157 dev_err(&pdev->dev, 230 dev_err(dev, "unable to claim irq %d; error %d\n",
158 "unable to claim irq %d; error %d\n",
159 rotary->irq, error); 231 rotary->irq, error);
160 goto out1; 232 return error;
161 } 233 }
162 234
163 error = input_register_device(input); 235 error = input_register_device(input);
164 if (error) { 236 if (error) {
165 dev_err(&pdev->dev, 237 dev_err(dev, "unable to register input device (%d)\n", error);
166 "unable to register input device (%d)\n", error); 238 return error;
167 goto out2;
168 } 239 }
169 240
170 if (pdata->rotary_button_key)
171 bfin_write_CNT_IMASK(CZMIE);
172
173 if (pdata->mode & ROT_DEBE)
174 bfin_write_CNT_DEBOUNCE(pdata->debounce & DPRESCALE);
175
176 if (pdata->mode)
177 bfin_write_CNT_CONFIG(bfin_read_CNT_CONFIG() |
178 (pdata->mode & ~CNTE));
179
180 bfin_write_CNT_IMASK(bfin_read_CNT_IMASK() | UCIE | DCIE);
181 bfin_write_CNT_CONFIG(bfin_read_CNT_CONFIG() | CNTE);
182
183 platform_set_drvdata(pdev, rotary); 241 platform_set_drvdata(pdev, rotary);
184 device_init_wakeup(&pdev->dev, 1); 242 device_init_wakeup(&pdev->dev, 1);
185 243
186 return 0; 244 return 0;
187
188out2:
189 free_irq(rotary->irq, pdev);
190out1:
191 input_free_device(input);
192 kfree(rotary);
193 peripheral_free_list(per_cnt);
194
195 return error;
196} 245}
197 246
198static int bfin_rotary_remove(struct platform_device *pdev) 247static int __maybe_unused bfin_rotary_suspend(struct device *dev)
199{
200 struct bfin_rot *rotary = platform_get_drvdata(pdev);
201
202 bfin_write_CNT_CONFIG(0);
203 bfin_write_CNT_IMASK(0);
204
205 free_irq(rotary->irq, pdev);
206 input_unregister_device(rotary->input);
207 peripheral_free_list(per_cnt);
208
209 kfree(rotary);
210
211 return 0;
212}
213
214#ifdef CONFIG_PM
215static int bfin_rotary_suspend(struct device *dev)
216{ 248{
217 struct platform_device *pdev = to_platform_device(dev); 249 struct platform_device *pdev = to_platform_device(dev);
218 struct bfin_rot *rotary = platform_get_drvdata(pdev); 250 struct bfin_rot *rotary = platform_get_drvdata(pdev);
219 251
220 rotary->cnt_config = bfin_read_CNT_CONFIG(); 252 rotary->cnt_config = readw(rotary->base + CNT_CONFIG_OFF);
221 rotary->cnt_imask = bfin_read_CNT_IMASK(); 253 rotary->cnt_imask = readw(rotary->base + CNT_IMASK_OFF);
222 rotary->cnt_debounce = bfin_read_CNT_DEBOUNCE(); 254 rotary->cnt_debounce = readw(rotary->base + CNT_DEBOUNCE_OFF);
223 255
224 if (device_may_wakeup(&pdev->dev)) 256 if (device_may_wakeup(&pdev->dev))
225 enable_irq_wake(rotary->irq); 257 enable_irq_wake(rotary->irq);
@@ -227,38 +259,32 @@ static int bfin_rotary_suspend(struct device *dev)
227 return 0; 259 return 0;
228} 260}
229 261
230static int bfin_rotary_resume(struct device *dev) 262static int __maybe_unused bfin_rotary_resume(struct device *dev)
231{ 263{
232 struct platform_device *pdev = to_platform_device(dev); 264 struct platform_device *pdev = to_platform_device(dev);
233 struct bfin_rot *rotary = platform_get_drvdata(pdev); 265 struct bfin_rot *rotary = platform_get_drvdata(pdev);
234 266
235 bfin_write_CNT_DEBOUNCE(rotary->cnt_debounce); 267 writew(rotary->cnt_debounce, rotary->base + CNT_DEBOUNCE_OFF);
236 bfin_write_CNT_IMASK(rotary->cnt_imask); 268 writew(rotary->cnt_imask, rotary->base + CNT_IMASK_OFF);
237 bfin_write_CNT_CONFIG(rotary->cnt_config & ~CNTE); 269 writew(rotary->cnt_config & ~CNTE, rotary->base + CNT_CONFIG_OFF);
238 270
239 if (device_may_wakeup(&pdev->dev)) 271 if (device_may_wakeup(&pdev->dev))
240 disable_irq_wake(rotary->irq); 272 disable_irq_wake(rotary->irq);
241 273
242 if (rotary->cnt_config & CNTE) 274 if (rotary->cnt_config & CNTE)
243 bfin_write_CNT_CONFIG(rotary->cnt_config); 275 writew(rotary->cnt_config, rotary->base + CNT_CONFIG_OFF);
244 276
245 return 0; 277 return 0;
246} 278}
247 279
248static const struct dev_pm_ops bfin_rotary_pm_ops = { 280static SIMPLE_DEV_PM_OPS(bfin_rotary_pm_ops,
249 .suspend = bfin_rotary_suspend, 281 bfin_rotary_suspend, bfin_rotary_resume);
250 .resume = bfin_rotary_resume,
251};
252#endif
253 282
254static struct platform_driver bfin_rotary_device_driver = { 283static struct platform_driver bfin_rotary_device_driver = {
255 .probe = bfin_rotary_probe, 284 .probe = bfin_rotary_probe,
256 .remove = bfin_rotary_remove,
257 .driver = { 285 .driver = {
258 .name = "bfin-rotary", 286 .name = "bfin-rotary",
259#ifdef CONFIG_PM
260 .pm = &bfin_rotary_pm_ops, 287 .pm = &bfin_rotary_pm_ops,
261#endif
262 }, 288 },
263}; 289};
264module_platform_driver(bfin_rotary_device_driver); 290module_platform_driver(bfin_rotary_device_driver);
diff --git a/drivers/input/misc/mma8450.c b/drivers/input/misc/mma8450.c
index 59d4dcddf6de..98228773a111 100644
--- a/drivers/input/misc/mma8450.c
+++ b/drivers/input/misc/mma8450.c
@@ -187,6 +187,7 @@ static int mma8450_probe(struct i2c_client *c,
187 idev->private = m; 187 idev->private = m;
188 idev->input->name = MMA8450_DRV_NAME; 188 idev->input->name = MMA8450_DRV_NAME;
189 idev->input->id.bustype = BUS_I2C; 189 idev->input->id.bustype = BUS_I2C;
190 idev->input->dev.parent = &c->dev;
190 idev->poll = mma8450_poll; 191 idev->poll = mma8450_poll;
191 idev->poll_interval = POLL_INTERVAL; 192 idev->poll_interval = POLL_INTERVAL;
192 idev->poll_interval_max = POLL_INTERVAL_MAX; 193 idev->poll_interval_max = POLL_INTERVAL_MAX;
diff --git a/drivers/input/misc/soc_button_array.c b/drivers/input/misc/soc_button_array.c
index 79cc0f79896f..e8e010a85484 100644
--- a/drivers/input/misc/soc_button_array.c
+++ b/drivers/input/misc/soc_button_array.c
@@ -195,7 +195,7 @@ static int soc_button_probe(struct platform_device *pdev)
195 195
196static struct soc_button_info soc_button_PNP0C40[] = { 196static struct soc_button_info soc_button_PNP0C40[] = {
197 { "power", 0, EV_KEY, KEY_POWER, false, true }, 197 { "power", 0, EV_KEY, KEY_POWER, false, true },
198 { "home", 1, EV_KEY, KEY_HOME, false, true }, 198 { "home", 1, EV_KEY, KEY_LEFTMETA, false, true },
199 { "volume_up", 2, EV_KEY, KEY_VOLUMEUP, true, false }, 199 { "volume_up", 2, EV_KEY, KEY_VOLUMEUP, true, false },
200 { "volume_down", 3, EV_KEY, KEY_VOLUMEDOWN, true, false }, 200 { "volume_down", 3, EV_KEY, KEY_VOLUMEDOWN, true, false },
201 { "rotation_lock", 4, EV_SW, SW_ROTATE_LOCK, false, false }, 201 { "rotation_lock", 4, EV_SW, SW_ROTATE_LOCK, false, false },
diff --git a/drivers/input/mouse/alps.c b/drivers/input/mouse/alps.c
index f205b8be2ce4..1bd15ebc01f2 100644
--- a/drivers/input/mouse/alps.c
+++ b/drivers/input/mouse/alps.c
@@ -99,36 +99,58 @@ static const struct alps_nibble_commands alps_v6_nibble_commands[] = {
99#define ALPS_FOUR_BUTTONS 0x40 /* 4 direction button present */ 99#define ALPS_FOUR_BUTTONS 0x40 /* 4 direction button present */
100#define ALPS_PS2_INTERLEAVED 0x80 /* 3-byte PS/2 packet interleaved with 100#define ALPS_PS2_INTERLEAVED 0x80 /* 3-byte PS/2 packet interleaved with
101 6-byte ALPS packet */ 101 6-byte ALPS packet */
102#define ALPS_IS_RUSHMORE 0x100 /* device is a rushmore */
103#define ALPS_BUTTONPAD 0x200 /* device is a clickpad */ 102#define ALPS_BUTTONPAD 0x200 /* device is a clickpad */
104 103
105static const struct alps_model_info alps_model_data[] = { 104static const struct alps_model_info alps_model_data[] = {
106 { { 0x32, 0x02, 0x14 }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* Toshiba Salellite Pro M10 */ 105 { { 0x32, 0x02, 0x14 }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT } }, /* Toshiba Salellite Pro M10 */
107 { { 0x33, 0x02, 0x0a }, 0x00, ALPS_PROTO_V1, 0x88, 0xf8, 0 }, /* UMAX-530T */ 106 { { 0x33, 0x02, 0x0a }, 0x00, { ALPS_PROTO_V1, 0x88, 0xf8, 0 } }, /* UMAX-530T */
108 { { 0x53, 0x02, 0x0a }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, 0 }, 107 { { 0x53, 0x02, 0x0a }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, 0 } },
109 { { 0x53, 0x02, 0x14 }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, 0 }, 108 { { 0x53, 0x02, 0x14 }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, 0 } },
110 { { 0x60, 0x03, 0xc8 }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, 0 }, /* HP ze1115 */ 109 { { 0x60, 0x03, 0xc8 }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, 0 } }, /* HP ze1115 */
111 { { 0x63, 0x02, 0x0a }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, 0 }, 110 { { 0x63, 0x02, 0x0a }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, 0 } },
112 { { 0x63, 0x02, 0x14 }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, 0 }, 111 { { 0x63, 0x02, 0x14 }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, 0 } },
113 { { 0x63, 0x02, 0x28 }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_FW_BK_2 }, /* Fujitsu Siemens S6010 */ 112 { { 0x63, 0x02, 0x28 }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_FW_BK_2 } }, /* Fujitsu Siemens S6010 */
114 { { 0x63, 0x02, 0x3c }, 0x00, ALPS_PROTO_V2, 0x8f, 0x8f, ALPS_WHEEL }, /* Toshiba Satellite S2400-103 */ 113 { { 0x63, 0x02, 0x3c }, 0x00, { ALPS_PROTO_V2, 0x8f, 0x8f, ALPS_WHEEL } }, /* Toshiba Satellite S2400-103 */
115 { { 0x63, 0x02, 0x50 }, 0x00, ALPS_PROTO_V2, 0xef, 0xef, ALPS_FW_BK_1 }, /* NEC Versa L320 */ 114 { { 0x63, 0x02, 0x50 }, 0x00, { ALPS_PROTO_V2, 0xef, 0xef, ALPS_FW_BK_1 } }, /* NEC Versa L320 */
116 { { 0x63, 0x02, 0x64 }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, 0 }, 115 { { 0x63, 0x02, 0x64 }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, 0 } },
117 { { 0x63, 0x03, 0xc8 }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude D800 */ 116 { { 0x63, 0x03, 0xc8 }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT } }, /* Dell Latitude D800 */
118 { { 0x73, 0x00, 0x0a }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_DUALPOINT }, /* ThinkPad R61 8918-5QG */ 117 { { 0x73, 0x00, 0x0a }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_DUALPOINT } }, /* ThinkPad R61 8918-5QG */
119 { { 0x73, 0x02, 0x0a }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, 0 }, 118 { { 0x73, 0x02, 0x0a }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, 0 } },
120 { { 0x73, 0x02, 0x14 }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_FW_BK_2 }, /* Ahtec Laptop */ 119 { { 0x73, 0x02, 0x14 }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_FW_BK_2 } }, /* Ahtec Laptop */
121 { { 0x20, 0x02, 0x0e }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, /* XXX */ 120
122 { { 0x22, 0x02, 0x0a }, 0x00, ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT }, 121 /*
123 { { 0x22, 0x02, 0x14 }, 0x00, ALPS_PROTO_V2, 0xff, 0xff, ALPS_PASS | ALPS_DUALPOINT }, /* Dell Latitude D600 */ 122 * XXX This entry is suspicious. First byte has zero lower nibble,
123 * which is what a normal mouse would report. Also, the value 0x0e
124 * isn't valid per PS/2 spec.
125 */
126 { { 0x20, 0x02, 0x0e }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT } },
127
128 { { 0x22, 0x02, 0x0a }, 0x00, { ALPS_PROTO_V2, 0xf8, 0xf8, ALPS_PASS | ALPS_DUALPOINT } },
129 { { 0x22, 0x02, 0x14 }, 0x00, { ALPS_PROTO_V2, 0xff, 0xff, ALPS_PASS | ALPS_DUALPOINT } }, /* Dell Latitude D600 */
124 /* Dell Latitude E5500, E6400, E6500, Precision M4400 */ 130 /* Dell Latitude E5500, E6400, E6500, Precision M4400 */
125 { { 0x62, 0x02, 0x14 }, 0x00, ALPS_PROTO_V2, 0xcf, 0xcf, 131 { { 0x62, 0x02, 0x14 }, 0x00, { ALPS_PROTO_V2, 0xcf, 0xcf,
126 ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED }, 132 ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED } },
127 { { 0x73, 0x00, 0x14 }, 0x00, ALPS_PROTO_V6, 0xff, 0xff, ALPS_DUALPOINT }, /* Dell XT2 */ 133 { { 0x73, 0x00, 0x14 }, 0x00, { ALPS_PROTO_V6, 0xff, 0xff, ALPS_DUALPOINT } }, /* Dell XT2 */
128 { { 0x73, 0x02, 0x50 }, 0x00, ALPS_PROTO_V2, 0xcf, 0xcf, ALPS_FOUR_BUTTONS }, /* Dell Vostro 1400 */ 134 { { 0x73, 0x02, 0x50 }, 0x00, { ALPS_PROTO_V2, 0xcf, 0xcf, ALPS_FOUR_BUTTONS } }, /* Dell Vostro 1400 */
129 { { 0x52, 0x01, 0x14 }, 0x00, ALPS_PROTO_V2, 0xff, 0xff, 135 { { 0x52, 0x01, 0x14 }, 0x00, { ALPS_PROTO_V2, 0xff, 0xff,
130 ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED }, /* Toshiba Tecra A11-11L */ 136 ALPS_PASS | ALPS_DUALPOINT | ALPS_PS2_INTERLEAVED } }, /* Toshiba Tecra A11-11L */
131 { { 0x73, 0x02, 0x64 }, 0x8a, ALPS_PROTO_V4, 0x8f, 0x8f, 0 }, 137 { { 0x73, 0x02, 0x64 }, 0x8a, { ALPS_PROTO_V4, 0x8f, 0x8f, 0 } },
138};
139
140static const struct alps_protocol_info alps_v3_protocol_data = {
141 ALPS_PROTO_V3, 0x8f, 0x8f, ALPS_DUALPOINT
142};
143
144static const struct alps_protocol_info alps_v3_rushmore_data = {
145 ALPS_PROTO_V3_RUSHMORE, 0x8f, 0x8f, ALPS_DUALPOINT
146};
147
148static const struct alps_protocol_info alps_v5_protocol_data = {
149 ALPS_PROTO_V5, 0xc8, 0xd8, 0
150};
151
152static const struct alps_protocol_info alps_v7_protocol_data = {
153 ALPS_PROTO_V7, 0x48, 0x48, ALPS_DUALPOINT
132}; 154};
133 155
134static void alps_set_abs_params_st(struct alps_data *priv, 156static void alps_set_abs_params_st(struct alps_data *priv,
@@ -136,12 +158,6 @@ static void alps_set_abs_params_st(struct alps_data *priv,
136static void alps_set_abs_params_mt(struct alps_data *priv, 158static void alps_set_abs_params_mt(struct alps_data *priv,
137 struct input_dev *dev1); 159 struct input_dev *dev1);
138 160
139/*
140 * XXX - this entry is suspicious. First byte has zero lower nibble,
141 * which is what a normal mouse would report. Also, the value 0x0e
142 * isn't valid per PS/2 spec.
143 */
144
145/* Packet formats are described in Documentation/input/alps.txt */ 161/* Packet formats are described in Documentation/input/alps.txt */
146 162
147static bool alps_is_valid_first_byte(struct alps_data *priv, 163static bool alps_is_valid_first_byte(struct alps_data *priv,
@@ -150,8 +166,7 @@ static bool alps_is_valid_first_byte(struct alps_data *priv,
150 return (data & priv->mask0) == priv->byte0; 166 return (data & priv->mask0) == priv->byte0;
151} 167}
152 168
153static void alps_report_buttons(struct psmouse *psmouse, 169static void alps_report_buttons(struct input_dev *dev1, struct input_dev *dev2,
154 struct input_dev *dev1, struct input_dev *dev2,
155 int left, int right, int middle) 170 int left, int right, int middle)
156{ 171{
157 struct input_dev *dev; 172 struct input_dev *dev;
@@ -161,20 +176,21 @@ static void alps_report_buttons(struct psmouse *psmouse,
161 * other device (dev2) then this event should be also 176 * other device (dev2) then this event should be also
162 * sent through that device. 177 * sent through that device.
163 */ 178 */
164 dev = test_bit(BTN_LEFT, dev2->key) ? dev2 : dev1; 179 dev = (dev2 && test_bit(BTN_LEFT, dev2->key)) ? dev2 : dev1;
165 input_report_key(dev, BTN_LEFT, left); 180 input_report_key(dev, BTN_LEFT, left);
166 181
167 dev = test_bit(BTN_RIGHT, dev2->key) ? dev2 : dev1; 182 dev = (dev2 && test_bit(BTN_RIGHT, dev2->key)) ? dev2 : dev1;
168 input_report_key(dev, BTN_RIGHT, right); 183 input_report_key(dev, BTN_RIGHT, right);
169 184
170 dev = test_bit(BTN_MIDDLE, dev2->key) ? dev2 : dev1; 185 dev = (dev2 && test_bit(BTN_MIDDLE, dev2->key)) ? dev2 : dev1;
171 input_report_key(dev, BTN_MIDDLE, middle); 186 input_report_key(dev, BTN_MIDDLE, middle);
172 187
173 /* 188 /*
174 * Sync the _other_ device now, we'll do the first 189 * Sync the _other_ device now, we'll do the first
175 * device later once we report the rest of the events. 190 * device later once we report the rest of the events.
176 */ 191 */
177 input_sync(dev2); 192 if (dev2)
193 input_sync(dev2);
178} 194}
179 195
180static void alps_process_packet_v1_v2(struct psmouse *psmouse) 196static void alps_process_packet_v1_v2(struct psmouse *psmouse)
@@ -221,13 +237,13 @@ static void alps_process_packet_v1_v2(struct psmouse *psmouse)
221 input_report_rel(dev2, REL_X, (x > 383 ? (x - 768) : x)); 237 input_report_rel(dev2, REL_X, (x > 383 ? (x - 768) : x));
222 input_report_rel(dev2, REL_Y, -(y > 255 ? (y - 512) : y)); 238 input_report_rel(dev2, REL_Y, -(y > 255 ? (y - 512) : y));
223 239
224 alps_report_buttons(psmouse, dev2, dev, left, right, middle); 240 alps_report_buttons(dev2, dev, left, right, middle);
225 241
226 input_sync(dev2); 242 input_sync(dev2);
227 return; 243 return;
228 } 244 }
229 245
230 alps_report_buttons(psmouse, dev, dev2, left, right, middle); 246 alps_report_buttons(dev, dev2, left, right, middle);
231 247
232 /* Convert hardware tap to a reasonable Z value */ 248 /* Convert hardware tap to a reasonable Z value */
233 if (ges && !fin) 249 if (ges && !fin)
@@ -412,7 +428,7 @@ static int alps_process_bitmap(struct alps_data *priv,
412 (2 * (priv->y_bits - 1)); 428 (2 * (priv->y_bits - 1));
413 429
414 /* y-bitmap order is reversed, except on rushmore */ 430 /* y-bitmap order is reversed, except on rushmore */
415 if (!(priv->flags & ALPS_IS_RUSHMORE)) { 431 if (priv->proto_version != ALPS_PROTO_V3_RUSHMORE) {
416 fields->mt[0].y = priv->y_max - fields->mt[0].y; 432 fields->mt[0].y = priv->y_max - fields->mt[0].y;
417 fields->mt[1].y = priv->y_max - fields->mt[1].y; 433 fields->mt[1].y = priv->y_max - fields->mt[1].y;
418 } 434 }
@@ -648,7 +664,8 @@ static void alps_process_touchpad_packet_v3_v5(struct psmouse *psmouse)
648 */ 664 */
649 if (f->is_mp) { 665 if (f->is_mp) {
650 fingers = f->fingers; 666 fingers = f->fingers;
651 if (priv->proto_version == ALPS_PROTO_V3) { 667 if (priv->proto_version == ALPS_PROTO_V3 ||
668 priv->proto_version == ALPS_PROTO_V3_RUSHMORE) {
652 if (alps_process_bitmap(priv, f) == 0) 669 if (alps_process_bitmap(priv, f) == 0)
653 fingers = 0; /* Use st data */ 670 fingers = 0; /* Use st data */
654 671
@@ -892,34 +909,6 @@ static void alps_get_finger_coordinate_v7(struct input_mt_pos *mt,
892 unsigned char *pkt, 909 unsigned char *pkt,
893 unsigned char pkt_id) 910 unsigned char pkt_id)
894{ 911{
895 /*
896 * packet-fmt b7 b6 b5 b4 b3 b2 b1 b0
897 * Byte0 TWO & MULTI L 1 R M 1 Y0-2 Y0-1 Y0-0
898 * Byte0 NEW L 1 X1-5 1 1 Y0-2 Y0-1 Y0-0
899 * Byte1 Y0-10 Y0-9 Y0-8 Y0-7 Y0-6 Y0-5 Y0-4 Y0-3
900 * Byte2 X0-11 1 X0-10 X0-9 X0-8 X0-7 X0-6 X0-5
901 * Byte3 X1-11 1 X0-4 X0-3 1 X0-2 X0-1 X0-0
902 * Byte4 TWO X1-10 TWO X1-9 X1-8 X1-7 X1-6 X1-5 X1-4
903 * Byte4 MULTI X1-10 TWO X1-9 X1-8 X1-7 X1-6 Y1-5 1
904 * Byte4 NEW X1-10 TWO X1-9 X1-8 X1-7 X1-6 0 0
905 * Byte5 TWO & NEW Y1-10 0 Y1-9 Y1-8 Y1-7 Y1-6 Y1-5 Y1-4
906 * Byte5 MULTI Y1-10 0 Y1-9 Y1-8 Y1-7 Y1-6 F-1 F-0
907 * L: Left button
908 * R / M: Non-clickpads: Right / Middle button
909 * Clickpads: When > 2 fingers are down, and some fingers
910 * are in the button area, then the 2 coordinates reported
911 * are for fingers outside the button area and these report
912 * extra fingers being present in the right / left button
913 * area. Note these fingers are not added to the F field!
914 * so if a TWO packet is received and R = 1 then there are
915 * 3 fingers down, etc.
916 * TWO: 1: Two touches present, byte 0/4/5 are in TWO fmt
917 * 0: If byte 4 bit 0 is 1, then byte 0/4/5 are in MULTI fmt
918 * otherwise byte 0 bit 4 must be set and byte 0/4/5 are
919 * in NEW fmt
920 * F: Number of fingers - 3, 0 means 3 fingers, 1 means 4 ...
921 */
922
923 mt[0].x = ((pkt[2] & 0x80) << 4); 912 mt[0].x = ((pkt[2] & 0x80) << 4);
924 mt[0].x |= ((pkt[2] & 0x3F) << 5); 913 mt[0].x |= ((pkt[2] & 0x3F) << 5);
925 mt[0].x |= ((pkt[3] & 0x30) >> 1); 914 mt[0].x |= ((pkt[3] & 0x30) >> 1);
@@ -1044,17 +1033,6 @@ static void alps_process_trackstick_packet_v7(struct psmouse *psmouse)
1044 return; 1033 return;
1045 } 1034 }
1046 1035
1047 /*
1048 * b7 b6 b5 b4 b3 b2 b1 b0
1049 * Byte0 0 1 0 0 1 0 0 0
1050 * Byte1 1 1 * * 1 M R L
1051 * Byte2 X7 1 X5 X4 X3 X2 X1 X0
1052 * Byte3 Z6 1 Y6 X6 1 Y2 Y1 Y0
1053 * Byte4 Y7 0 Y5 Y4 Y3 1 1 0
1054 * Byte5 T&P 0 Z5 Z4 Z3 Z2 Z1 Z0
1055 * M / R / L: Middle / Right / Left button
1056 */
1057
1058 x = ((packet[2] & 0xbf)) | ((packet[3] & 0x10) << 2); 1036 x = ((packet[2] & 0xbf)) | ((packet[3] & 0x10) << 2);
1059 y = (packet[3] & 0x07) | (packet[4] & 0xb8) | 1037 y = (packet[3] & 0x07) | (packet[4] & 0xb8) |
1060 ((packet[3] & 0x20) << 1); 1038 ((packet[3] & 0x20) << 1);
@@ -1107,23 +1085,89 @@ static void alps_process_packet_v7(struct psmouse *psmouse)
1107 alps_process_touchpad_packet_v7(psmouse); 1085 alps_process_touchpad_packet_v7(psmouse);
1108} 1086}
1109 1087
1110static void alps_report_bare_ps2_packet(struct psmouse *psmouse, 1088static DEFINE_MUTEX(alps_mutex);
1089
1090static void alps_register_bare_ps2_mouse(struct work_struct *work)
1091{
1092 struct alps_data *priv =
1093 container_of(work, struct alps_data, dev3_register_work.work);
1094 struct psmouse *psmouse = priv->psmouse;
1095 struct input_dev *dev3;
1096 int error = 0;
1097
1098 mutex_lock(&alps_mutex);
1099
1100 if (priv->dev3)
1101 goto out;
1102
1103 dev3 = input_allocate_device();
1104 if (!dev3) {
1105 psmouse_err(psmouse, "failed to allocate secondary device\n");
1106 error = -ENOMEM;
1107 goto out;
1108 }
1109
1110 snprintf(priv->phys3, sizeof(priv->phys3), "%s/%s",
1111 psmouse->ps2dev.serio->phys,
1112 (priv->dev2 ? "input2" : "input1"));
1113 dev3->phys = priv->phys3;
1114
1115 /*
1116 * format of input device name is: "protocol vendor name"
1117 * see function psmouse_switch_protocol() in psmouse-base.c
1118 */
1119 dev3->name = "PS/2 ALPS Mouse";
1120
1121 dev3->id.bustype = BUS_I8042;
1122 dev3->id.vendor = 0x0002;
1123 dev3->id.product = PSMOUSE_PS2;
1124 dev3->id.version = 0x0000;
1125 dev3->dev.parent = &psmouse->ps2dev.serio->dev;
1126
1127 input_set_capability(dev3, EV_REL, REL_X);
1128 input_set_capability(dev3, EV_REL, REL_Y);
1129 input_set_capability(dev3, EV_KEY, BTN_LEFT);
1130 input_set_capability(dev3, EV_KEY, BTN_RIGHT);
1131 input_set_capability(dev3, EV_KEY, BTN_MIDDLE);
1132
1133 __set_bit(INPUT_PROP_POINTER, dev3->propbit);
1134
1135 error = input_register_device(dev3);
1136 if (error) {
1137 psmouse_err(psmouse,
1138 "failed to register secondary device: %d\n",
1139 error);
1140 input_free_device(dev3);
1141 goto out;
1142 }
1143
1144 priv->dev3 = dev3;
1145
1146out:
1147 /*
1148 * Save the error code so that we can detect that we
1149 * already tried to create the device.
1150 */
1151 if (error)
1152 priv->dev3 = ERR_PTR(error);
1153
1154 mutex_unlock(&alps_mutex);
1155}
1156
1157static void alps_report_bare_ps2_packet(struct input_dev *dev,
1111 unsigned char packet[], 1158 unsigned char packet[],
1112 bool report_buttons) 1159 bool report_buttons)
1113{ 1160{
1114 struct alps_data *priv = psmouse->private;
1115 struct input_dev *dev2 = priv->dev2;
1116
1117 if (report_buttons) 1161 if (report_buttons)
1118 alps_report_buttons(psmouse, dev2, psmouse->dev, 1162 alps_report_buttons(dev, NULL,
1119 packet[0] & 1, packet[0] & 2, packet[0] & 4); 1163 packet[0] & 1, packet[0] & 2, packet[0] & 4);
1120 1164
1121 input_report_rel(dev2, REL_X, 1165 input_report_rel(dev, REL_X,
1122 packet[1] ? packet[1] - ((packet[0] << 4) & 0x100) : 0); 1166 packet[1] ? packet[1] - ((packet[0] << 4) & 0x100) : 0);
1123 input_report_rel(dev2, REL_Y, 1167 input_report_rel(dev, REL_Y,
1124 packet[2] ? ((packet[0] << 3) & 0x100) - packet[2] : 0); 1168 packet[2] ? ((packet[0] << 3) & 0x100) - packet[2] : 0);
1125 1169
1126 input_sync(dev2); 1170 input_sync(dev);
1127} 1171}
1128 1172
1129static psmouse_ret_t alps_handle_interleaved_ps2(struct psmouse *psmouse) 1173static psmouse_ret_t alps_handle_interleaved_ps2(struct psmouse *psmouse)
@@ -1188,8 +1232,8 @@ static psmouse_ret_t alps_handle_interleaved_ps2(struct psmouse *psmouse)
1188 * de-synchronization. 1232 * de-synchronization.
1189 */ 1233 */
1190 1234
1191 alps_report_bare_ps2_packet(psmouse, &psmouse->packet[3], 1235 alps_report_bare_ps2_packet(priv->dev2,
1192 false); 1236 &psmouse->packet[3], false);
1193 1237
1194 /* 1238 /*
1195 * Continue with the standard ALPS protocol handling, 1239 * Continue with the standard ALPS protocol handling,
@@ -1245,9 +1289,18 @@ static psmouse_ret_t alps_process_byte(struct psmouse *psmouse)
1245 * properly we only do this if the device is fully synchronized. 1289 * properly we only do this if the device is fully synchronized.
1246 */ 1290 */
1247 if (!psmouse->out_of_sync_cnt && (psmouse->packet[0] & 0xc8) == 0x08) { 1291 if (!psmouse->out_of_sync_cnt && (psmouse->packet[0] & 0xc8) == 0x08) {
1292
1293 /* Register dev3 mouse if we received PS/2 packet first time */
1294 if (unlikely(!priv->dev3))
1295 psmouse_queue_work(psmouse,
1296 &priv->dev3_register_work, 0);
1297
1248 if (psmouse->pktcnt == 3) { 1298 if (psmouse->pktcnt == 3) {
1249 alps_report_bare_ps2_packet(psmouse, psmouse->packet, 1299 /* Once dev3 mouse device is registered report data */
1250 true); 1300 if (likely(!IS_ERR_OR_NULL(priv->dev3)))
1301 alps_report_bare_ps2_packet(priv->dev3,
1302 psmouse->packet,
1303 true);
1251 return PSMOUSE_FULL_PACKET; 1304 return PSMOUSE_FULL_PACKET;
1252 } 1305 }
1253 return PSMOUSE_GOOD_DATA; 1306 return PSMOUSE_GOOD_DATA;
@@ -1275,7 +1328,7 @@ static psmouse_ret_t alps_process_byte(struct psmouse *psmouse)
1275 psmouse->pktcnt - 1, 1328 psmouse->pktcnt - 1,
1276 psmouse->packet[psmouse->pktcnt - 1]); 1329 psmouse->packet[psmouse->pktcnt - 1]);
1277 1330
1278 if (priv->proto_version == ALPS_PROTO_V3 && 1331 if (priv->proto_version == ALPS_PROTO_V3_RUSHMORE &&
1279 psmouse->pktcnt == psmouse->pktsize) { 1332 psmouse->pktcnt == psmouse->pktsize) {
1280 /* 1333 /*
1281 * Some Dell boxes, such as Latitude E6440 or E7440 1334 * Some Dell boxes, such as Latitude E6440 or E7440
@@ -1780,7 +1833,7 @@ static int alps_setup_trackstick_v3(struct psmouse *psmouse, int reg_base)
1780 * all. 1833 * all.
1781 */ 1834 */
1782 if (alps_rpt_cmd(psmouse, 0, PSMOUSE_CMD_SETSCALE21, param)) { 1835 if (alps_rpt_cmd(psmouse, 0, PSMOUSE_CMD_SETSCALE21, param)) {
1783 psmouse_warn(psmouse, "trackstick E7 report failed\n"); 1836 psmouse_warn(psmouse, "Failed to initialize trackstick (E7 report failed)\n");
1784 ret = -ENODEV; 1837 ret = -ENODEV;
1785 } else { 1838 } else {
1786 psmouse_dbg(psmouse, "trackstick E7 report: %3ph\n", param); 1839 psmouse_dbg(psmouse, "trackstick E7 report: %3ph\n", param);
@@ -1945,8 +1998,6 @@ static int alps_hw_init_rushmore_v3(struct psmouse *psmouse)
1945 ALPS_REG_BASE_RUSHMORE); 1998 ALPS_REG_BASE_RUSHMORE);
1946 if (reg_val == -EIO) 1999 if (reg_val == -EIO)
1947 goto error; 2000 goto error;
1948 if (reg_val == -ENODEV)
1949 priv->flags &= ~ALPS_DUALPOINT;
1950 } 2001 }
1951 2002
1952 if (alps_enter_command_mode(psmouse) || 2003 if (alps_enter_command_mode(psmouse) ||
@@ -2162,11 +2213,18 @@ error:
2162 return ret; 2213 return ret;
2163} 2214}
2164 2215
2165static void alps_set_defaults(struct alps_data *priv) 2216static int alps_set_protocol(struct psmouse *psmouse,
2217 struct alps_data *priv,
2218 const struct alps_protocol_info *protocol)
2166{ 2219{
2167 priv->byte0 = 0x8f; 2220 psmouse->private = priv;
2168 priv->mask0 = 0x8f; 2221
2169 priv->flags = ALPS_DUALPOINT; 2222 setup_timer(&priv->timer, alps_flush_packet, (unsigned long)psmouse);
2223
2224 priv->proto_version = protocol->version;
2225 priv->byte0 = protocol->byte0;
2226 priv->mask0 = protocol->mask0;
2227 priv->flags = protocol->flags;
2170 2228
2171 priv->x_max = 2000; 2229 priv->x_max = 2000;
2172 priv->y_max = 1400; 2230 priv->y_max = 1400;
@@ -2182,6 +2240,7 @@ static void alps_set_defaults(struct alps_data *priv)
2182 priv->x_max = 1023; 2240 priv->x_max = 1023;
2183 priv->y_max = 767; 2241 priv->y_max = 767;
2184 break; 2242 break;
2243
2185 case ALPS_PROTO_V3: 2244 case ALPS_PROTO_V3:
2186 priv->hw_init = alps_hw_init_v3; 2245 priv->hw_init = alps_hw_init_v3;
2187 priv->process_packet = alps_process_packet_v3; 2246 priv->process_packet = alps_process_packet_v3;
@@ -2190,6 +2249,23 @@ static void alps_set_defaults(struct alps_data *priv)
2190 priv->nibble_commands = alps_v3_nibble_commands; 2249 priv->nibble_commands = alps_v3_nibble_commands;
2191 priv->addr_command = PSMOUSE_CMD_RESET_WRAP; 2250 priv->addr_command = PSMOUSE_CMD_RESET_WRAP;
2192 break; 2251 break;
2252
2253 case ALPS_PROTO_V3_RUSHMORE:
2254 priv->hw_init = alps_hw_init_rushmore_v3;
2255 priv->process_packet = alps_process_packet_v3;
2256 priv->set_abs_params = alps_set_abs_params_mt;
2257 priv->decode_fields = alps_decode_rushmore;
2258 priv->nibble_commands = alps_v3_nibble_commands;
2259 priv->addr_command = PSMOUSE_CMD_RESET_WRAP;
2260 priv->x_bits = 16;
2261 priv->y_bits = 12;
2262
2263 if (alps_probe_trackstick_v3(psmouse,
2264 ALPS_REG_BASE_RUSHMORE) < 0)
2265 priv->flags &= ~ALPS_DUALPOINT;
2266
2267 break;
2268
2193 case ALPS_PROTO_V4: 2269 case ALPS_PROTO_V4:
2194 priv->hw_init = alps_hw_init_v4; 2270 priv->hw_init = alps_hw_init_v4;
2195 priv->process_packet = alps_process_packet_v4; 2271 priv->process_packet = alps_process_packet_v4;
@@ -2197,6 +2273,7 @@ static void alps_set_defaults(struct alps_data *priv)
2197 priv->nibble_commands = alps_v4_nibble_commands; 2273 priv->nibble_commands = alps_v4_nibble_commands;
2198 priv->addr_command = PSMOUSE_CMD_DISABLE; 2274 priv->addr_command = PSMOUSE_CMD_DISABLE;
2199 break; 2275 break;
2276
2200 case ALPS_PROTO_V5: 2277 case ALPS_PROTO_V5:
2201 priv->hw_init = alps_hw_init_dolphin_v1; 2278 priv->hw_init = alps_hw_init_dolphin_v1;
2202 priv->process_packet = alps_process_touchpad_packet_v3_v5; 2279 priv->process_packet = alps_process_touchpad_packet_v3_v5;
@@ -2204,14 +2281,12 @@ static void alps_set_defaults(struct alps_data *priv)
2204 priv->set_abs_params = alps_set_abs_params_mt; 2281 priv->set_abs_params = alps_set_abs_params_mt;
2205 priv->nibble_commands = alps_v3_nibble_commands; 2282 priv->nibble_commands = alps_v3_nibble_commands;
2206 priv->addr_command = PSMOUSE_CMD_RESET_WRAP; 2283 priv->addr_command = PSMOUSE_CMD_RESET_WRAP;
2207 priv->byte0 = 0xc8;
2208 priv->mask0 = 0xd8;
2209 priv->flags = 0;
2210 priv->x_max = 1360; 2284 priv->x_max = 1360;
2211 priv->y_max = 660; 2285 priv->y_max = 660;
2212 priv->x_bits = 23; 2286 priv->x_bits = 23;
2213 priv->y_bits = 12; 2287 priv->y_bits = 12;
2214 break; 2288 break;
2289
2215 case ALPS_PROTO_V6: 2290 case ALPS_PROTO_V6:
2216 priv->hw_init = alps_hw_init_v6; 2291 priv->hw_init = alps_hw_init_v6;
2217 priv->process_packet = alps_process_packet_v6; 2292 priv->process_packet = alps_process_packet_v6;
@@ -2220,6 +2295,7 @@ static void alps_set_defaults(struct alps_data *priv)
2220 priv->x_max = 2047; 2295 priv->x_max = 2047;
2221 priv->y_max = 1535; 2296 priv->y_max = 1535;
2222 break; 2297 break;
2298
2223 case ALPS_PROTO_V7: 2299 case ALPS_PROTO_V7:
2224 priv->hw_init = alps_hw_init_v7; 2300 priv->hw_init = alps_hw_init_v7;
2225 priv->process_packet = alps_process_packet_v7; 2301 priv->process_packet = alps_process_packet_v7;
@@ -2227,19 +2303,21 @@ static void alps_set_defaults(struct alps_data *priv)
2227 priv->set_abs_params = alps_set_abs_params_mt; 2303 priv->set_abs_params = alps_set_abs_params_mt;
2228 priv->nibble_commands = alps_v3_nibble_commands; 2304 priv->nibble_commands = alps_v3_nibble_commands;
2229 priv->addr_command = PSMOUSE_CMD_RESET_WRAP; 2305 priv->addr_command = PSMOUSE_CMD_RESET_WRAP;
2230 priv->x_max = 0xfff; 2306
2231 priv->y_max = 0x7ff; 2307 if (alps_dolphin_get_device_area(psmouse, priv))
2232 priv->byte0 = 0x48; 2308 return -EIO;
2233 priv->mask0 = 0x48;
2234 2309
2235 if (priv->fw_ver[1] != 0xba) 2310 if (priv->fw_ver[1] != 0xba)
2236 priv->flags |= ALPS_BUTTONPAD; 2311 priv->flags |= ALPS_BUTTONPAD;
2312
2237 break; 2313 break;
2238 } 2314 }
2315
2316 return 0;
2239} 2317}
2240 2318
2241static int alps_match_table(struct psmouse *psmouse, struct alps_data *priv, 2319static const struct alps_protocol_info *alps_match_table(unsigned char *e7,
2242 unsigned char *e7, unsigned char *ec) 2320 unsigned char *ec)
2243{ 2321{
2244 const struct alps_model_info *model; 2322 const struct alps_model_info *model;
2245 int i; 2323 int i;
@@ -2251,23 +2329,18 @@ static int alps_match_table(struct psmouse *psmouse, struct alps_data *priv,
2251 (!model->command_mode_resp || 2329 (!model->command_mode_resp ||
2252 model->command_mode_resp == ec[2])) { 2330 model->command_mode_resp == ec[2])) {
2253 2331
2254 priv->proto_version = model->proto_version; 2332 return &model->protocol_info;
2255 alps_set_defaults(priv);
2256
2257 priv->flags = model->flags;
2258 priv->byte0 = model->byte0;
2259 priv->mask0 = model->mask0;
2260
2261 return 0;
2262 } 2333 }
2263 } 2334 }
2264 2335
2265 return -EINVAL; 2336 return NULL;
2266} 2337}
2267 2338
2268static int alps_identify(struct psmouse *psmouse, struct alps_data *priv) 2339static int alps_identify(struct psmouse *psmouse, struct alps_data *priv)
2269{ 2340{
2341 const struct alps_protocol_info *protocol;
2270 unsigned char e6[4], e7[4], ec[4]; 2342 unsigned char e6[4], e7[4], ec[4];
2343 int error;
2271 2344
2272 /* 2345 /*
2273 * First try "E6 report". 2346 * First try "E6 report".
@@ -2293,54 +2366,35 @@ static int alps_identify(struct psmouse *psmouse, struct alps_data *priv)
2293 alps_exit_command_mode(psmouse)) 2366 alps_exit_command_mode(psmouse))
2294 return -EIO; 2367 return -EIO;
2295 2368
2296 /* Save the Firmware version */ 2369 protocol = alps_match_table(e7, ec);
2297 memcpy(priv->fw_ver, ec, 3); 2370 if (!protocol) {
2298 2371 if (e7[0] == 0x73 && e7[1] == 0x03 && e7[2] == 0x50 &&
2299 if (alps_match_table(psmouse, priv, e7, ec) == 0) { 2372 ec[0] == 0x73 && (ec[1] == 0x01 || ec[1] == 0x02)) {
2300 return 0; 2373 protocol = &alps_v5_protocol_data;
2301 } else if (e7[0] == 0x73 && e7[1] == 0x03 && e7[2] == 0x50 && 2374 } else if (ec[0] == 0x88 &&
2302 ec[0] == 0x73 && (ec[1] == 0x01 || ec[1] == 0x02)) { 2375 ((ec[1] & 0xf0) == 0xb0 || (ec[1] & 0xf0) == 0xc0)) {
2303 priv->proto_version = ALPS_PROTO_V5; 2376 protocol = &alps_v7_protocol_data;
2304 alps_set_defaults(priv); 2377 } else if (ec[0] == 0x88 && ec[1] == 0x08) {
2305 if (alps_dolphin_get_device_area(psmouse, priv)) 2378 protocol = &alps_v3_rushmore_data;
2306 return -EIO; 2379 } else if (ec[0] == 0x88 && ec[1] == 0x07 &&
2307 else 2380 ec[2] >= 0x90 && ec[2] <= 0x9d) {
2308 return 0; 2381 protocol = &alps_v3_protocol_data;
2309 } else if (ec[0] == 0x88 && 2382 } else {
2310 ((ec[1] & 0xf0) == 0xb0 || (ec[1] & 0xf0) == 0xc0)) { 2383 psmouse_dbg(psmouse,
2311 priv->proto_version = ALPS_PROTO_V7; 2384 "Likely not an ALPS touchpad: E7=%3ph, EC=%3ph\n", e7, ec);
2312 alps_set_defaults(priv); 2385 return -EINVAL;
2313 2386 }
2314 return 0;
2315 } else if (ec[0] == 0x88 && ec[1] == 0x08) {
2316 priv->proto_version = ALPS_PROTO_V3;
2317 alps_set_defaults(priv);
2318
2319 priv->hw_init = alps_hw_init_rushmore_v3;
2320 priv->decode_fields = alps_decode_rushmore;
2321 priv->x_bits = 16;
2322 priv->y_bits = 12;
2323 priv->flags |= ALPS_IS_RUSHMORE;
2324
2325 /* hack to make addr_command, nibble_command available */
2326 psmouse->private = priv;
2327
2328 if (alps_probe_trackstick_v3(psmouse, ALPS_REG_BASE_RUSHMORE))
2329 priv->flags &= ~ALPS_DUALPOINT;
2330
2331 return 0;
2332 } else if (ec[0] == 0x88 && ec[1] == 0x07 &&
2333 ec[2] >= 0x90 && ec[2] <= 0x9d) {
2334 priv->proto_version = ALPS_PROTO_V3;
2335 alps_set_defaults(priv);
2336
2337 return 0;
2338 } 2387 }
2339 2388
2340 psmouse_dbg(psmouse, 2389 if (priv) {
2341 "Likely not an ALPS touchpad: E7=%3ph, EC=%3ph\n", e7, ec); 2390 /* Save the Firmware version */
2391 memcpy(priv->fw_ver, ec, 3);
2392 error = alps_set_protocol(psmouse, priv, protocol);
2393 if (error)
2394 return error;
2395 }
2342 2396
2343 return -EINVAL; 2397 return 0;
2344} 2398}
2345 2399
2346static int alps_reconnect(struct psmouse *psmouse) 2400static int alps_reconnect(struct psmouse *psmouse)
@@ -2361,7 +2415,10 @@ static void alps_disconnect(struct psmouse *psmouse)
2361 2415
2362 psmouse_reset(psmouse); 2416 psmouse_reset(psmouse);
2363 del_timer_sync(&priv->timer); 2417 del_timer_sync(&priv->timer);
2364 input_unregister_device(priv->dev2); 2418 if (priv->dev2)
2419 input_unregister_device(priv->dev2);
2420 if (!IS_ERR_OR_NULL(priv->dev3))
2421 input_unregister_device(priv->dev3);
2365 kfree(priv); 2422 kfree(priv);
2366} 2423}
2367 2424
@@ -2394,25 +2451,12 @@ static void alps_set_abs_params_mt(struct alps_data *priv,
2394 2451
2395int alps_init(struct psmouse *psmouse) 2452int alps_init(struct psmouse *psmouse)
2396{ 2453{
2397 struct alps_data *priv; 2454 struct alps_data *priv = psmouse->private;
2398 struct input_dev *dev1 = psmouse->dev, *dev2; 2455 struct input_dev *dev1 = psmouse->dev;
2399 2456 int error;
2400 priv = kzalloc(sizeof(struct alps_data), GFP_KERNEL);
2401 dev2 = input_allocate_device();
2402 if (!priv || !dev2)
2403 goto init_fail;
2404
2405 priv->dev2 = dev2;
2406 setup_timer(&priv->timer, alps_flush_packet, (unsigned long)psmouse);
2407
2408 psmouse->private = priv;
2409
2410 psmouse_reset(psmouse);
2411
2412 if (alps_identify(psmouse, priv) < 0)
2413 goto init_fail;
2414 2457
2415 if (priv->hw_init(psmouse)) 2458 error = priv->hw_init(psmouse);
2459 if (error)
2416 goto init_fail; 2460 goto init_fail;
2417 2461
2418 /* 2462 /*
@@ -2462,36 +2506,57 @@ int alps_init(struct psmouse *psmouse)
2462 } 2506 }
2463 2507
2464 if (priv->flags & ALPS_DUALPOINT) { 2508 if (priv->flags & ALPS_DUALPOINT) {
2509 struct input_dev *dev2;
2510
2511 dev2 = input_allocate_device();
2512 if (!dev2) {
2513 psmouse_err(psmouse,
2514 "failed to allocate trackstick device\n");
2515 error = -ENOMEM;
2516 goto init_fail;
2517 }
2518
2519 snprintf(priv->phys2, sizeof(priv->phys2), "%s/input1",
2520 psmouse->ps2dev.serio->phys);
2521 dev2->phys = priv->phys2;
2522
2465 /* 2523 /*
2466 * format of input device name is: "protocol vendor name" 2524 * format of input device name is: "protocol vendor name"
2467 * see function psmouse_switch_protocol() in psmouse-base.c 2525 * see function psmouse_switch_protocol() in psmouse-base.c
2468 */ 2526 */
2469 dev2->name = "AlpsPS/2 ALPS DualPoint Stick"; 2527 dev2->name = "AlpsPS/2 ALPS DualPoint Stick";
2528
2529 dev2->id.bustype = BUS_I8042;
2530 dev2->id.vendor = 0x0002;
2470 dev2->id.product = PSMOUSE_ALPS; 2531 dev2->id.product = PSMOUSE_ALPS;
2471 dev2->id.version = priv->proto_version; 2532 dev2->id.version = priv->proto_version;
2472 } else { 2533 dev2->dev.parent = &psmouse->ps2dev.serio->dev;
2473 dev2->name = "PS/2 ALPS Mouse";
2474 dev2->id.product = PSMOUSE_PS2;
2475 dev2->id.version = 0x0000;
2476 }
2477
2478 snprintf(priv->phys, sizeof(priv->phys), "%s/input1", psmouse->ps2dev.serio->phys);
2479 dev2->phys = priv->phys;
2480 dev2->id.bustype = BUS_I8042;
2481 dev2->id.vendor = 0x0002;
2482 dev2->dev.parent = &psmouse->ps2dev.serio->dev;
2483 2534
2484 dev2->evbit[0] = BIT_MASK(EV_KEY) | BIT_MASK(EV_REL); 2535 input_set_capability(dev2, EV_REL, REL_X);
2485 dev2->relbit[BIT_WORD(REL_X)] = BIT_MASK(REL_X) | BIT_MASK(REL_Y); 2536 input_set_capability(dev2, EV_REL, REL_Y);
2486 dev2->keybit[BIT_WORD(BTN_LEFT)] = 2537 input_set_capability(dev2, EV_KEY, BTN_LEFT);
2487 BIT_MASK(BTN_LEFT) | BIT_MASK(BTN_MIDDLE) | BIT_MASK(BTN_RIGHT); 2538 input_set_capability(dev2, EV_KEY, BTN_RIGHT);
2539 input_set_capability(dev2, EV_KEY, BTN_MIDDLE);
2488 2540
2489 __set_bit(INPUT_PROP_POINTER, dev2->propbit); 2541 __set_bit(INPUT_PROP_POINTER, dev2->propbit);
2490 if (priv->flags & ALPS_DUALPOINT)
2491 __set_bit(INPUT_PROP_POINTING_STICK, dev2->propbit); 2542 __set_bit(INPUT_PROP_POINTING_STICK, dev2->propbit);
2492 2543
2493 if (input_register_device(priv->dev2)) 2544 error = input_register_device(dev2);
2494 goto init_fail; 2545 if (error) {
2546 psmouse_err(psmouse,
2547 "failed to register trackstick device: %d\n",
2548 error);
2549 input_free_device(dev2);
2550 goto init_fail;
2551 }
2552
2553 priv->dev2 = dev2;
2554 }
2555
2556 priv->psmouse = psmouse;
2557
2558 INIT_DELAYED_WORK(&priv->dev3_register_work,
2559 alps_register_bare_ps2_mouse);
2495 2560
2496 psmouse->protocol_handler = alps_process_byte; 2561 psmouse->protocol_handler = alps_process_byte;
2497 psmouse->poll = alps_poll; 2562 psmouse->poll = alps_poll;
@@ -2509,25 +2574,58 @@ int alps_init(struct psmouse *psmouse)
2509 2574
2510init_fail: 2575init_fail:
2511 psmouse_reset(psmouse); 2576 psmouse_reset(psmouse);
2512 input_free_device(dev2); 2577 /*
2513 kfree(priv); 2578 * Even though we did not allocate psmouse->private we do free
2579 * it here.
2580 */
2581 kfree(psmouse->private);
2514 psmouse->private = NULL; 2582 psmouse->private = NULL;
2515 return -1; 2583 return error;
2516} 2584}
2517 2585
2518int alps_detect(struct psmouse *psmouse, bool set_properties) 2586int alps_detect(struct psmouse *psmouse, bool set_properties)
2519{ 2587{
2520 struct alps_data dummy; 2588 struct alps_data *priv;
2589 int error;
2521 2590
2522 if (alps_identify(psmouse, &dummy) < 0) 2591 error = alps_identify(psmouse, NULL);
2523 return -1; 2592 if (error)
2593 return error;
2594
2595 /*
2596 * Reset the device to make sure it is fully operational:
2597 * on some laptops, like certain Dell Latitudes, we may
2598 * fail to properly detect presence of trackstick if device
2599 * has not been reset.
2600 */
2601 psmouse_reset(psmouse);
2602
2603 priv = kzalloc(sizeof(struct alps_data), GFP_KERNEL);
2604 if (!priv)
2605 return -ENOMEM;
2606
2607 error = alps_identify(psmouse, priv);
2608 if (error) {
2609 kfree(priv);
2610 return error;
2611 }
2524 2612
2525 if (set_properties) { 2613 if (set_properties) {
2526 psmouse->vendor = "ALPS"; 2614 psmouse->vendor = "ALPS";
2527 psmouse->name = dummy.flags & ALPS_DUALPOINT ? 2615 psmouse->name = priv->flags & ALPS_DUALPOINT ?
2528 "DualPoint TouchPad" : "GlidePoint"; 2616 "DualPoint TouchPad" : "GlidePoint";
2529 psmouse->model = dummy.proto_version << 8; 2617 psmouse->model = priv->proto_version;
2618 } else {
2619 /*
2620 * Destroy alps_data structure we allocated earlier since
2621 * this was just a "trial run". Otherwise we'll keep it
2622 * to be used by alps_init() which has to be called if
2623 * we succeed and set_properties is true.
2624 */
2625 kfree(priv);
2626 psmouse->private = NULL;
2530 } 2627 }
2628
2531 return 0; 2629 return 0;
2532} 2630}
2533 2631
diff --git a/drivers/input/mouse/alps.h b/drivers/input/mouse/alps.h
index 66240b47819a..02513c0502fc 100644
--- a/drivers/input/mouse/alps.h
+++ b/drivers/input/mouse/alps.h
@@ -14,13 +14,14 @@
14 14
15#include <linux/input/mt.h> 15#include <linux/input/mt.h>
16 16
17#define ALPS_PROTO_V1 1 17#define ALPS_PROTO_V1 0x100
18#define ALPS_PROTO_V2 2 18#define ALPS_PROTO_V2 0x200
19#define ALPS_PROTO_V3 3 19#define ALPS_PROTO_V3 0x300
20#define ALPS_PROTO_V4 4 20#define ALPS_PROTO_V3_RUSHMORE 0x310
21#define ALPS_PROTO_V5 5 21#define ALPS_PROTO_V4 0x400
22#define ALPS_PROTO_V6 6 22#define ALPS_PROTO_V5 0x500
23#define ALPS_PROTO_V7 7 /* t3btl t4s */ 23#define ALPS_PROTO_V6 0x600
24#define ALPS_PROTO_V7 0x700 /* t3btl t4s */
24 25
25#define MAX_TOUCHES 2 26#define MAX_TOUCHES 2
26 27
@@ -46,29 +47,37 @@ enum V7_PACKET_ID {
46}; 47};
47 48
48/** 49/**
50 * struct alps_protocol_info - information about protocol used by a device
51 * @version: Indicates V1/V2/V3/...
52 * @byte0: Helps figure out whether a position report packet matches the
53 * known format for this model. The first byte of the report, ANDed with
54 * mask0, should match byte0.
55 * @mask0: The mask used to check the first byte of the report.
56 * @flags: Additional device capabilities (passthrough port, trackstick, etc.).
57 */
58struct alps_protocol_info {
59 u16 version;
60 u8 byte0, mask0;
61 unsigned int flags;
62};
63
64/**
49 * struct alps_model_info - touchpad ID table 65 * struct alps_model_info - touchpad ID table
50 * @signature: E7 response string to match. 66 * @signature: E7 response string to match.
51 * @command_mode_resp: For V3/V4 touchpads, the final byte of the EC response 67 * @command_mode_resp: For V3/V4 touchpads, the final byte of the EC response
52 * (aka command mode response) identifies the firmware minor version. This 68 * (aka command mode response) identifies the firmware minor version. This
53 * can be used to distinguish different hardware models which are not 69 * can be used to distinguish different hardware models which are not
54 * uniquely identifiable through their E7 responses. 70 * uniquely identifiable through their E7 responses.
55 * @proto_version: Indicates V1/V2/V3/... 71 * @protocol_info: information about protcol used by the device.
56 * @byte0: Helps figure out whether a position report packet matches the
57 * known format for this model. The first byte of the report, ANDed with
58 * mask0, should match byte0.
59 * @mask0: The mask used to check the first byte of the report.
60 * @flags: Additional device capabilities (passthrough port, trackstick, etc.).
61 * 72 *
62 * Many (but not all) ALPS touchpads can be identified by looking at the 73 * Many (but not all) ALPS touchpads can be identified by looking at the
63 * values returned in the "E7 report" and/or the "EC report." This table 74 * values returned in the "E7 report" and/or the "EC report." This table
64 * lists a number of such touchpads. 75 * lists a number of such touchpads.
65 */ 76 */
66struct alps_model_info { 77struct alps_model_info {
67 unsigned char signature[3]; 78 u8 signature[3];
68 unsigned char command_mode_resp; 79 u8 command_mode_resp;
69 unsigned char proto_version; 80 struct alps_protocol_info protocol_info;
70 unsigned char byte0, mask0;
71 int flags;
72}; 81};
73 82
74/** 83/**
@@ -132,8 +141,12 @@ struct alps_fields {
132 141
133/** 142/**
134 * struct alps_data - private data structure for the ALPS driver 143 * struct alps_data - private data structure for the ALPS driver
135 * @dev2: "Relative" device used to report trackstick or mouse activity. 144 * @psmouse: Pointer to parent psmouse device
136 * @phys: Physical path for the relative device. 145 * @dev2: Trackstick device (can be NULL).
146 * @dev3: Generic PS/2 mouse (can be NULL, delayed registering).
147 * @phys2: Physical path for the trackstick device.
148 * @phys3: Physical path for the generic PS/2 mouse.
149 * @dev3_register_work: Delayed work for registering PS/2 mouse.
137 * @nibble_commands: Command mapping used for touchpad register accesses. 150 * @nibble_commands: Command mapping used for touchpad register accesses.
138 * @addr_command: Command used to tell the touchpad that a register address 151 * @addr_command: Command used to tell the touchpad that a register address
139 * follows. 152 * follows.
@@ -160,15 +173,19 @@ struct alps_fields {
160 * @timer: Timer for flushing out the final report packet in the stream. 173 * @timer: Timer for flushing out the final report packet in the stream.
161 */ 174 */
162struct alps_data { 175struct alps_data {
176 struct psmouse *psmouse;
163 struct input_dev *dev2; 177 struct input_dev *dev2;
164 char phys[32]; 178 struct input_dev *dev3;
179 char phys2[32];
180 char phys3[32];
181 struct delayed_work dev3_register_work;
165 182
166 /* these are autodetected when the device is identified */ 183 /* these are autodetected when the device is identified */
167 const struct alps_nibble_commands *nibble_commands; 184 const struct alps_nibble_commands *nibble_commands;
168 int addr_command; 185 int addr_command;
169 unsigned char proto_version; 186 u16 proto_version;
170 unsigned char byte0, mask0; 187 u8 byte0, mask0;
171 unsigned char fw_ver[3]; 188 u8 fw_ver[3];
172 int flags; 189 int flags;
173 int x_max; 190 int x_max;
174 int y_max; 191 int y_max;
diff --git a/drivers/input/mouse/cyapa_gen3.c b/drivers/input/mouse/cyapa_gen3.c
index 77e9d70a986b..1e2291c378fe 100644
--- a/drivers/input/mouse/cyapa_gen3.c
+++ b/drivers/input/mouse/cyapa_gen3.c
@@ -20,7 +20,7 @@
20#include <linux/input/mt.h> 20#include <linux/input/mt.h>
21#include <linux/module.h> 21#include <linux/module.h>
22#include <linux/slab.h> 22#include <linux/slab.h>
23#include <linux/unaligned/access_ok.h> 23#include <asm/unaligned.h>
24#include "cyapa.h" 24#include "cyapa.h"
25 25
26 26
diff --git a/drivers/input/mouse/cyapa_gen5.c b/drivers/input/mouse/cyapa_gen5.c
index ddf5393a1180..5b611dd71e79 100644
--- a/drivers/input/mouse/cyapa_gen5.c
+++ b/drivers/input/mouse/cyapa_gen5.c
@@ -17,7 +17,7 @@
17#include <linux/mutex.h> 17#include <linux/mutex.h>
18#include <linux/completion.h> 18#include <linux/completion.h>
19#include <linux/slab.h> 19#include <linux/slab.h>
20#include <linux/unaligned/access_ok.h> 20#include <asm/unaligned.h>
21#include <linux/crc-itu-t.h> 21#include <linux/crc-itu-t.h>
22#include "cyapa.h" 22#include "cyapa.h"
23 23
@@ -1926,7 +1926,7 @@ static int cyapa_gen5_read_idac_data(struct cyapa *cyapa,
1926 electrodes_tx = cyapa->electrodes_x; 1926 electrodes_tx = cyapa->electrodes_x;
1927 max_element_cnt = ((cyapa->aligned_electrodes_rx + 7) & 1927 max_element_cnt = ((cyapa->aligned_electrodes_rx + 7) &
1928 ~7u) * electrodes_tx; 1928 ~7u) * electrodes_tx;
1929 } else if (idac_data_type == GEN5_RETRIEVE_SELF_CAP_PWC_DATA) { 1929 } else {
1930 offset = 2; 1930 offset = 2;
1931 max_element_cnt = cyapa->electrodes_x + 1931 max_element_cnt = cyapa->electrodes_x +
1932 cyapa->electrodes_y; 1932 cyapa->electrodes_y;
diff --git a/drivers/input/mouse/cypress_ps2.c b/drivers/input/mouse/cypress_ps2.c
index 9118a1861a45..28dcfc822bf6 100644
--- a/drivers/input/mouse/cypress_ps2.c
+++ b/drivers/input/mouse/cypress_ps2.c
@@ -710,8 +710,3 @@ err_exit:
710 710
711 return -1; 711 return -1;
712} 712}
713
714bool cypress_supported(void)
715{
716 return true;
717}
diff --git a/drivers/input/mouse/cypress_ps2.h b/drivers/input/mouse/cypress_ps2.h
index 4720f21d2d70..81f68aaed7c8 100644
--- a/drivers/input/mouse/cypress_ps2.h
+++ b/drivers/input/mouse/cypress_ps2.h
@@ -172,7 +172,6 @@ struct cytp_data {
172#ifdef CONFIG_MOUSE_PS2_CYPRESS 172#ifdef CONFIG_MOUSE_PS2_CYPRESS
173int cypress_detect(struct psmouse *psmouse, bool set_properties); 173int cypress_detect(struct psmouse *psmouse, bool set_properties);
174int cypress_init(struct psmouse *psmouse); 174int cypress_init(struct psmouse *psmouse);
175bool cypress_supported(void);
176#else 175#else
177inline int cypress_detect(struct psmouse *psmouse, bool set_properties) 176inline int cypress_detect(struct psmouse *psmouse, bool set_properties)
178{ 177{
@@ -182,10 +181,6 @@ inline int cypress_init(struct psmouse *psmouse)
182{ 181{
183 return -ENOSYS; 182 return -ENOSYS;
184} 183}
185inline bool cypress_supported(void)
186{
187 return 0;
188}
189#endif /* CONFIG_MOUSE_PS2_CYPRESS */ 184#endif /* CONFIG_MOUSE_PS2_CYPRESS */
190 185
191#endif /* _CYPRESS_PS2_H */ 186#endif /* _CYPRESS_PS2_H */
diff --git a/drivers/input/mouse/focaltech.c b/drivers/input/mouse/focaltech.c
index fca38ba63bbe..23d259416f2f 100644
--- a/drivers/input/mouse/focaltech.c
+++ b/drivers/input/mouse/focaltech.c
@@ -67,9 +67,6 @@ static void focaltech_reset(struct psmouse *psmouse)
67 67
68#define FOC_MAX_FINGERS 5 68#define FOC_MAX_FINGERS 5
69 69
70#define FOC_MAX_X 2431
71#define FOC_MAX_Y 1663
72
73/* 70/*
74 * Current state of a single finger on the touchpad. 71 * Current state of a single finger on the touchpad.
75 */ 72 */
@@ -129,9 +126,17 @@ static void focaltech_report_state(struct psmouse *psmouse)
129 input_mt_slot(dev, i); 126 input_mt_slot(dev, i);
130 input_mt_report_slot_state(dev, MT_TOOL_FINGER, active); 127 input_mt_report_slot_state(dev, MT_TOOL_FINGER, active);
131 if (active) { 128 if (active) {
132 input_report_abs(dev, ABS_MT_POSITION_X, finger->x); 129 unsigned int clamped_x, clamped_y;
130 /*
131 * The touchpad might report invalid data, so we clamp
132 * the resulting values so that we do not confuse
133 * userspace.
134 */
135 clamped_x = clamp(finger->x, 0U, priv->x_max);
136 clamped_y = clamp(finger->y, 0U, priv->y_max);
137 input_report_abs(dev, ABS_MT_POSITION_X, clamped_x);
133 input_report_abs(dev, ABS_MT_POSITION_Y, 138 input_report_abs(dev, ABS_MT_POSITION_Y,
134 FOC_MAX_Y - finger->y); 139 priv->y_max - clamped_y);
135 } 140 }
136 } 141 }
137 input_mt_report_pointer_emulation(dev, true); 142 input_mt_report_pointer_emulation(dev, true);
@@ -180,16 +185,6 @@ static void focaltech_process_abs_packet(struct psmouse *psmouse,
180 185
181 state->pressed = (packet[0] >> 4) & 1; 186 state->pressed = (packet[0] >> 4) & 1;
182 187
183 /*
184 * packet[5] contains some kind of tool size in the most
185 * significant nibble. 0xff is a special value (latching) that
186 * signals a large contact area.
187 */
188 if (packet[5] == 0xff) {
189 state->fingers[finger].valid = false;
190 return;
191 }
192
193 state->fingers[finger].x = ((packet[1] & 0xf) << 8) | packet[2]; 188 state->fingers[finger].x = ((packet[1] & 0xf) << 8) | packet[2];
194 state->fingers[finger].y = (packet[3] << 8) | packet[4]; 189 state->fingers[finger].y = (packet[3] << 8) | packet[4];
195 state->fingers[finger].valid = true; 190 state->fingers[finger].valid = true;
@@ -381,6 +376,23 @@ static int focaltech_read_size(struct psmouse *psmouse)
381 376
382 return 0; 377 return 0;
383} 378}
379
380void focaltech_set_resolution(struct psmouse *psmouse, unsigned int resolution)
381{
382 /* not supported yet */
383}
384
385static void focaltech_set_rate(struct psmouse *psmouse, unsigned int rate)
386{
387 /* not supported yet */
388}
389
390static void focaltech_set_scale(struct psmouse *psmouse,
391 enum psmouse_scale scale)
392{
393 /* not supported yet */
394}
395
384int focaltech_init(struct psmouse *psmouse) 396int focaltech_init(struct psmouse *psmouse)
385{ 397{
386 struct focaltech_data *priv; 398 struct focaltech_data *priv;
@@ -415,6 +427,14 @@ int focaltech_init(struct psmouse *psmouse)
415 psmouse->cleanup = focaltech_reset; 427 psmouse->cleanup = focaltech_reset;
416 /* resync is not supported yet */ 428 /* resync is not supported yet */
417 psmouse->resync_time = 0; 429 psmouse->resync_time = 0;
430 /*
431 * rate/resolution/scale changes are not supported yet, and
432 * the generic implementations of these functions seem to
433 * confuse some touchpads
434 */
435 psmouse->set_resolution = focaltech_set_resolution;
436 psmouse->set_rate = focaltech_set_rate;
437 psmouse->set_scale = focaltech_set_scale;
418 438
419 return 0; 439 return 0;
420 440
@@ -424,11 +444,6 @@ fail:
424 return error; 444 return error;
425} 445}
426 446
427bool focaltech_supported(void)
428{
429 return true;
430}
431
432#else /* CONFIG_MOUSE_PS2_FOCALTECH */ 447#else /* CONFIG_MOUSE_PS2_FOCALTECH */
433 448
434int focaltech_init(struct psmouse *psmouse) 449int focaltech_init(struct psmouse *psmouse)
@@ -438,9 +453,4 @@ int focaltech_init(struct psmouse *psmouse)
438 return 0; 453 return 0;
439} 454}
440 455
441bool focaltech_supported(void)
442{
443 return false;
444}
445
446#endif /* CONFIG_MOUSE_PS2_FOCALTECH */ 456#endif /* CONFIG_MOUSE_PS2_FOCALTECH */
diff --git a/drivers/input/mouse/focaltech.h b/drivers/input/mouse/focaltech.h
index 71870a9b548a..ca61ebff373e 100644
--- a/drivers/input/mouse/focaltech.h
+++ b/drivers/input/mouse/focaltech.h
@@ -19,6 +19,5 @@
19 19
20int focaltech_detect(struct psmouse *psmouse, bool set_properties); 20int focaltech_detect(struct psmouse *psmouse, bool set_properties);
21int focaltech_init(struct psmouse *psmouse); 21int focaltech_init(struct psmouse *psmouse);
22bool focaltech_supported(void);
23 22
24#endif 23#endif
diff --git a/drivers/input/mouse/psmouse-base.c b/drivers/input/mouse/psmouse-base.c
index 68469feda470..8bc61237bc1b 100644
--- a/drivers/input/mouse/psmouse-base.c
+++ b/drivers/input/mouse/psmouse-base.c
@@ -454,6 +454,17 @@ static void psmouse_set_rate(struct psmouse *psmouse, unsigned int rate)
454} 454}
455 455
456/* 456/*
457 * Here we set the mouse scaling.
458 */
459
460static void psmouse_set_scale(struct psmouse *psmouse, enum psmouse_scale scale)
461{
462 ps2_command(&psmouse->ps2dev, NULL,
463 scale == PSMOUSE_SCALE21 ? PSMOUSE_CMD_SETSCALE21 :
464 PSMOUSE_CMD_SETSCALE11);
465}
466
467/*
457 * psmouse_poll() - default poll handler. Everyone except for ALPS uses it. 468 * psmouse_poll() - default poll handler. Everyone except for ALPS uses it.
458 */ 469 */
459 470
@@ -689,6 +700,7 @@ static void psmouse_apply_defaults(struct psmouse *psmouse)
689 700
690 psmouse->set_rate = psmouse_set_rate; 701 psmouse->set_rate = psmouse_set_rate;
691 psmouse->set_resolution = psmouse_set_resolution; 702 psmouse->set_resolution = psmouse_set_resolution;
703 psmouse->set_scale = psmouse_set_scale;
692 psmouse->poll = psmouse_poll; 704 psmouse->poll = psmouse_poll;
693 psmouse->protocol_handler = psmouse_process_byte; 705 psmouse->protocol_handler = psmouse_process_byte;
694 psmouse->pktsize = 3; 706 psmouse->pktsize = 3;
@@ -727,7 +739,7 @@ static int psmouse_extensions(struct psmouse *psmouse,
727 if (psmouse_do_detect(focaltech_detect, psmouse, set_properties) == 0) { 739 if (psmouse_do_detect(focaltech_detect, psmouse, set_properties) == 0) {
728 if (max_proto > PSMOUSE_IMEX) { 740 if (max_proto > PSMOUSE_IMEX) {
729 if (!set_properties || focaltech_init(psmouse) == 0) { 741 if (!set_properties || focaltech_init(psmouse) == 0) {
730 if (focaltech_supported()) 742 if (IS_ENABLED(CONFIG_MOUSE_PS2_FOCALTECH))
731 return PSMOUSE_FOCALTECH; 743 return PSMOUSE_FOCALTECH;
732 /* 744 /*
733 * Note that we need to also restrict 745 * Note that we need to also restrict
@@ -776,7 +788,7 @@ static int psmouse_extensions(struct psmouse *psmouse,
776 * Try activating protocol, but check if support is enabled first, since 788 * Try activating protocol, but check if support is enabled first, since
777 * we try detecting Synaptics even when protocol is disabled. 789 * we try detecting Synaptics even when protocol is disabled.
778 */ 790 */
779 if (synaptics_supported() && 791 if (IS_ENABLED(CONFIG_MOUSE_PS2_SYNAPTICS) &&
780 (!set_properties || synaptics_init(psmouse) == 0)) { 792 (!set_properties || synaptics_init(psmouse) == 0)) {
781 return PSMOUSE_SYNAPTICS; 793 return PSMOUSE_SYNAPTICS;
782 } 794 }
@@ -801,7 +813,7 @@ static int psmouse_extensions(struct psmouse *psmouse,
801 */ 813 */
802 if (max_proto > PSMOUSE_IMEX && 814 if (max_proto > PSMOUSE_IMEX &&
803 cypress_detect(psmouse, set_properties) == 0) { 815 cypress_detect(psmouse, set_properties) == 0) {
804 if (cypress_supported()) { 816 if (IS_ENABLED(CONFIG_MOUSE_PS2_CYPRESS)) {
805 if (cypress_init(psmouse) == 0) 817 if (cypress_init(psmouse) == 0)
806 return PSMOUSE_CYPRESS; 818 return PSMOUSE_CYPRESS;
807 819
@@ -1160,7 +1172,7 @@ static void psmouse_initialize(struct psmouse *psmouse)
1160 if (psmouse_max_proto != PSMOUSE_PS2) { 1172 if (psmouse_max_proto != PSMOUSE_PS2) {
1161 psmouse->set_rate(psmouse, psmouse->rate); 1173 psmouse->set_rate(psmouse, psmouse->rate);
1162 psmouse->set_resolution(psmouse, psmouse->resolution); 1174 psmouse->set_resolution(psmouse, psmouse->resolution);
1163 ps2_command(&psmouse->ps2dev, NULL, PSMOUSE_CMD_SETSCALE11); 1175 psmouse->set_scale(psmouse, PSMOUSE_SCALE11);
1164 } 1176 }
1165} 1177}
1166 1178
diff --git a/drivers/input/mouse/psmouse.h b/drivers/input/mouse/psmouse.h
index c2ff137ecbdb..d02e1bdc9ae4 100644
--- a/drivers/input/mouse/psmouse.h
+++ b/drivers/input/mouse/psmouse.h
@@ -36,6 +36,11 @@ typedef enum {
36 PSMOUSE_FULL_PACKET 36 PSMOUSE_FULL_PACKET
37} psmouse_ret_t; 37} psmouse_ret_t;
38 38
39enum psmouse_scale {
40 PSMOUSE_SCALE11,
41 PSMOUSE_SCALE21
42};
43
39struct psmouse { 44struct psmouse {
40 void *private; 45 void *private;
41 struct input_dev *dev; 46 struct input_dev *dev;
@@ -67,6 +72,7 @@ struct psmouse {
67 psmouse_ret_t (*protocol_handler)(struct psmouse *psmouse); 72 psmouse_ret_t (*protocol_handler)(struct psmouse *psmouse);
68 void (*set_rate)(struct psmouse *psmouse, unsigned int rate); 73 void (*set_rate)(struct psmouse *psmouse, unsigned int rate);
69 void (*set_resolution)(struct psmouse *psmouse, unsigned int resolution); 74 void (*set_resolution)(struct psmouse *psmouse, unsigned int resolution);
75 void (*set_scale)(struct psmouse *psmouse, enum psmouse_scale scale);
70 76
71 int (*reconnect)(struct psmouse *psmouse); 77 int (*reconnect)(struct psmouse *psmouse);
72 void (*disconnect)(struct psmouse *psmouse); 78 void (*disconnect)(struct psmouse *psmouse);
diff --git a/drivers/input/mouse/synaptics.c b/drivers/input/mouse/synaptics.c
index 7e705ee90b86..dda605836546 100644
--- a/drivers/input/mouse/synaptics.c
+++ b/drivers/input/mouse/synaptics.c
@@ -67,9 +67,6 @@
67#define X_MAX_POSITIVE 8176 67#define X_MAX_POSITIVE 8176
68#define Y_MAX_POSITIVE 8176 68#define Y_MAX_POSITIVE 8176
69 69
70/* maximum ABS_MT_POSITION displacement (in mm) */
71#define DMAX 10
72
73/***************************************************************************** 70/*****************************************************************************
74 * Stuff we need even when we do not want native Synaptics support 71 * Stuff we need even when we do not want native Synaptics support
75 ****************************************************************************/ 72 ****************************************************************************/
@@ -123,32 +120,41 @@ void synaptics_reset(struct psmouse *psmouse)
123 120
124static bool cr48_profile_sensor; 121static bool cr48_profile_sensor;
125 122
123#define ANY_BOARD_ID 0
126struct min_max_quirk { 124struct min_max_quirk {
127 const char * const *pnp_ids; 125 const char * const *pnp_ids;
126 struct {
127 unsigned long int min, max;
128 } board_id;
128 int x_min, x_max, y_min, y_max; 129 int x_min, x_max, y_min, y_max;
129}; 130};
130 131
131static const struct min_max_quirk min_max_pnpid_table[] = { 132static const struct min_max_quirk min_max_pnpid_table[] = {
132 { 133 {
133 (const char * const []){"LEN0033", NULL}, 134 (const char * const []){"LEN0033", NULL},
135 {ANY_BOARD_ID, ANY_BOARD_ID},
134 1024, 5052, 2258, 4832 136 1024, 5052, 2258, 4832
135 }, 137 },
136 { 138 {
137 (const char * const []){"LEN0035", "LEN0042", NULL}, 139 (const char * const []){"LEN0042", NULL},
140 {ANY_BOARD_ID, ANY_BOARD_ID},
138 1232, 5710, 1156, 4696 141 1232, 5710, 1156, 4696
139 }, 142 },
140 { 143 {
141 (const char * const []){"LEN0034", "LEN0036", "LEN0037", 144 (const char * const []){"LEN0034", "LEN0036", "LEN0037",
142 "LEN0039", "LEN2002", "LEN2004", 145 "LEN0039", "LEN2002", "LEN2004",
143 NULL}, 146 NULL},
147 {ANY_BOARD_ID, 2961},
144 1024, 5112, 2024, 4832 148 1024, 5112, 2024, 4832
145 }, 149 },
146 { 150 {
147 (const char * const []){"LEN2001", NULL}, 151 (const char * const []){"LEN2001", NULL},
152 {ANY_BOARD_ID, ANY_BOARD_ID},
148 1024, 5022, 2508, 4832 153 1024, 5022, 2508, 4832
149 }, 154 },
150 { 155 {
151 (const char * const []){"LEN2006", NULL}, 156 (const char * const []){"LEN2006", NULL},
157 {ANY_BOARD_ID, ANY_BOARD_ID},
152 1264, 5675, 1171, 4688 158 1264, 5675, 1171, 4688
153 }, 159 },
154 { } 160 { }
@@ -175,9 +181,7 @@ static const char * const topbuttonpad_pnp_ids[] = {
175 "LEN0041", 181 "LEN0041",
176 "LEN0042", /* Yoga */ 182 "LEN0042", /* Yoga */
177 "LEN0045", 183 "LEN0045",
178 "LEN0046",
179 "LEN0047", 184 "LEN0047",
180 "LEN0048",
181 "LEN0049", 185 "LEN0049",
182 "LEN2000", 186 "LEN2000",
183 "LEN2001", /* Edge E431 */ 187 "LEN2001", /* Edge E431 */
@@ -235,18 +239,39 @@ static int synaptics_model_id(struct psmouse *psmouse)
235 return 0; 239 return 0;
236} 240}
237 241
242static int synaptics_more_extended_queries(struct psmouse *psmouse)
243{
244 struct synaptics_data *priv = psmouse->private;
245 unsigned char buf[3];
246
247 if (synaptics_send_cmd(psmouse, SYN_QUE_MEXT_CAPAB_10, buf))
248 return -1;
249
250 priv->ext_cap_10 = (buf[0]<<16) | (buf[1]<<8) | buf[2];
251
252 return 0;
253}
254
238/* 255/*
239 * Read the board id from the touchpad 256 * Read the board id and the "More Extended Queries" from the touchpad
240 * The board id is encoded in the "QUERY MODES" response 257 * The board id is encoded in the "QUERY MODES" response
241 */ 258 */
242static int synaptics_board_id(struct psmouse *psmouse) 259static int synaptics_query_modes(struct psmouse *psmouse)
243{ 260{
244 struct synaptics_data *priv = psmouse->private; 261 struct synaptics_data *priv = psmouse->private;
245 unsigned char bid[3]; 262 unsigned char bid[3];
246 263
264 /* firmwares prior 7.5 have no board_id encoded */
265 if (SYN_ID_FULL(priv->identity) < 0x705)
266 return 0;
267
247 if (synaptics_send_cmd(psmouse, SYN_QUE_MODES, bid)) 268 if (synaptics_send_cmd(psmouse, SYN_QUE_MODES, bid))
248 return -1; 269 return -1;
249 priv->board_id = ((bid[0] & 0xfc) << 6) | bid[1]; 270 priv->board_id = ((bid[0] & 0xfc) << 6) | bid[1];
271
272 if (SYN_MEXT_CAP_BIT(bid[0]))
273 return synaptics_more_extended_queries(psmouse);
274
250 return 0; 275 return 0;
251} 276}
252 277
@@ -346,7 +371,6 @@ static int synaptics_resolution(struct psmouse *psmouse)
346{ 371{
347 struct synaptics_data *priv = psmouse->private; 372 struct synaptics_data *priv = psmouse->private;
348 unsigned char resp[3]; 373 unsigned char resp[3];
349 int i;
350 374
351 if (SYN_ID_MAJOR(priv->identity) < 4) 375 if (SYN_ID_MAJOR(priv->identity) < 4)
352 return 0; 376 return 0;
@@ -358,17 +382,6 @@ static int synaptics_resolution(struct psmouse *psmouse)
358 } 382 }
359 } 383 }
360 384
361 for (i = 0; min_max_pnpid_table[i].pnp_ids; i++) {
362 if (psmouse_matches_pnp_id(psmouse,
363 min_max_pnpid_table[i].pnp_ids)) {
364 priv->x_min = min_max_pnpid_table[i].x_min;
365 priv->x_max = min_max_pnpid_table[i].x_max;
366 priv->y_min = min_max_pnpid_table[i].y_min;
367 priv->y_max = min_max_pnpid_table[i].y_max;
368 return 0;
369 }
370 }
371
372 if (SYN_EXT_CAP_REQUESTS(priv->capabilities) >= 5 && 385 if (SYN_EXT_CAP_REQUESTS(priv->capabilities) >= 5 &&
373 SYN_CAP_MAX_DIMENSIONS(priv->ext_cap_0c)) { 386 SYN_CAP_MAX_DIMENSIONS(priv->ext_cap_0c)) {
374 if (synaptics_send_cmd(psmouse, SYN_QUE_EXT_MAX_COORDS, resp)) { 387 if (synaptics_send_cmd(psmouse, SYN_QUE_EXT_MAX_COORDS, resp)) {
@@ -377,23 +390,69 @@ static int synaptics_resolution(struct psmouse *psmouse)
377 } else { 390 } else {
378 priv->x_max = (resp[0] << 5) | ((resp[1] & 0x0f) << 1); 391 priv->x_max = (resp[0] << 5) | ((resp[1] & 0x0f) << 1);
379 priv->y_max = (resp[2] << 5) | ((resp[1] & 0xf0) >> 3); 392 priv->y_max = (resp[2] << 5) | ((resp[1] & 0xf0) >> 3);
393 psmouse_info(psmouse,
394 "queried max coordinates: x [..%d], y [..%d]\n",
395 priv->x_max, priv->y_max);
380 } 396 }
381 } 397 }
382 398
383 if (SYN_EXT_CAP_REQUESTS(priv->capabilities) >= 7 && 399 if (SYN_CAP_MIN_DIMENSIONS(priv->ext_cap_0c) &&
384 SYN_CAP_MIN_DIMENSIONS(priv->ext_cap_0c)) { 400 (SYN_EXT_CAP_REQUESTS(priv->capabilities) >= 7 ||
401 /*
402 * Firmware v8.1 does not report proper number of extended
403 * capabilities, but has been proven to report correct min
404 * coordinates.
405 */
406 SYN_ID_FULL(priv->identity) == 0x801)) {
385 if (synaptics_send_cmd(psmouse, SYN_QUE_EXT_MIN_COORDS, resp)) { 407 if (synaptics_send_cmd(psmouse, SYN_QUE_EXT_MIN_COORDS, resp)) {
386 psmouse_warn(psmouse, 408 psmouse_warn(psmouse,
387 "device claims to have min coordinates query, but I'm not able to read it.\n"); 409 "device claims to have min coordinates query, but I'm not able to read it.\n");
388 } else { 410 } else {
389 priv->x_min = (resp[0] << 5) | ((resp[1] & 0x0f) << 1); 411 priv->x_min = (resp[0] << 5) | ((resp[1] & 0x0f) << 1);
390 priv->y_min = (resp[2] << 5) | ((resp[1] & 0xf0) >> 3); 412 priv->y_min = (resp[2] << 5) | ((resp[1] & 0xf0) >> 3);
413 psmouse_info(psmouse,
414 "queried min coordinates: x [%d..], y [%d..]\n",
415 priv->x_min, priv->y_min);
391 } 416 }
392 } 417 }
393 418
394 return 0; 419 return 0;
395} 420}
396 421
422/*
423 * Apply quirk(s) if the hardware matches
424 */
425
426static void synaptics_apply_quirks(struct psmouse *psmouse)
427{
428 struct synaptics_data *priv = psmouse->private;
429 int i;
430
431 for (i = 0; min_max_pnpid_table[i].pnp_ids; i++) {
432 if (!psmouse_matches_pnp_id(psmouse,
433 min_max_pnpid_table[i].pnp_ids))
434 continue;
435
436 if (min_max_pnpid_table[i].board_id.min != ANY_BOARD_ID &&
437 priv->board_id < min_max_pnpid_table[i].board_id.min)
438 continue;
439
440 if (min_max_pnpid_table[i].board_id.max != ANY_BOARD_ID &&
441 priv->board_id > min_max_pnpid_table[i].board_id.max)
442 continue;
443
444 priv->x_min = min_max_pnpid_table[i].x_min;
445 priv->x_max = min_max_pnpid_table[i].x_max;
446 priv->y_min = min_max_pnpid_table[i].y_min;
447 priv->y_max = min_max_pnpid_table[i].y_max;
448 psmouse_info(psmouse,
449 "quirked min/max coordinates: x [%d..%d], y [%d..%d]\n",
450 priv->x_min, priv->x_max,
451 priv->y_min, priv->y_max);
452 break;
453 }
454}
455
397static int synaptics_query_hardware(struct psmouse *psmouse) 456static int synaptics_query_hardware(struct psmouse *psmouse)
398{ 457{
399 if (synaptics_identify(psmouse)) 458 if (synaptics_identify(psmouse))
@@ -402,13 +461,15 @@ static int synaptics_query_hardware(struct psmouse *psmouse)
402 return -1; 461 return -1;
403 if (synaptics_firmware_id(psmouse)) 462 if (synaptics_firmware_id(psmouse))
404 return -1; 463 return -1;
405 if (synaptics_board_id(psmouse)) 464 if (synaptics_query_modes(psmouse))
406 return -1; 465 return -1;
407 if (synaptics_capability(psmouse)) 466 if (synaptics_capability(psmouse))
408 return -1; 467 return -1;
409 if (synaptics_resolution(psmouse)) 468 if (synaptics_resolution(psmouse))
410 return -1; 469 return -1;
411 470
471 synaptics_apply_quirks(psmouse);
472
412 return 0; 473 return 0;
413} 474}
414 475
@@ -516,18 +577,22 @@ static int synaptics_is_pt_packet(unsigned char *buf)
516 return (buf[0] & 0xFC) == 0x84 && (buf[3] & 0xCC) == 0xC4; 577 return (buf[0] & 0xFC) == 0x84 && (buf[3] & 0xCC) == 0xC4;
517} 578}
518 579
519static void synaptics_pass_pt_packet(struct serio *ptport, unsigned char *packet) 580static void synaptics_pass_pt_packet(struct psmouse *psmouse,
581 struct serio *ptport,
582 unsigned char *packet)
520{ 583{
584 struct synaptics_data *priv = psmouse->private;
521 struct psmouse *child = serio_get_drvdata(ptport); 585 struct psmouse *child = serio_get_drvdata(ptport);
522 586
523 if (child && child->state == PSMOUSE_ACTIVATED) { 587 if (child && child->state == PSMOUSE_ACTIVATED) {
524 serio_interrupt(ptport, packet[1], 0); 588 serio_interrupt(ptport, packet[1] | priv->pt_buttons, 0);
525 serio_interrupt(ptport, packet[4], 0); 589 serio_interrupt(ptport, packet[4], 0);
526 serio_interrupt(ptport, packet[5], 0); 590 serio_interrupt(ptport, packet[5], 0);
527 if (child->pktsize == 4) 591 if (child->pktsize == 4)
528 serio_interrupt(ptport, packet[2], 0); 592 serio_interrupt(ptport, packet[2], 0);
529 } else 593 } else {
530 serio_interrupt(ptport, packet[1], 0); 594 serio_interrupt(ptport, packet[1], 0);
595 }
531} 596}
532 597
533static void synaptics_pt_activate(struct psmouse *psmouse) 598static void synaptics_pt_activate(struct psmouse *psmouse)
@@ -605,6 +670,18 @@ static void synaptics_parse_agm(const unsigned char buf[],
605 } 670 }
606} 671}
607 672
673static void synaptics_parse_ext_buttons(const unsigned char buf[],
674 struct synaptics_data *priv,
675 struct synaptics_hw_state *hw)
676{
677 unsigned int ext_bits =
678 (SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap) + 1) >> 1;
679 unsigned int ext_mask = GENMASK(ext_bits - 1, 0);
680
681 hw->ext_buttons = buf[4] & ext_mask;
682 hw->ext_buttons |= (buf[5] & ext_mask) << ext_bits;
683}
684
608static bool is_forcepad; 685static bool is_forcepad;
609 686
610static int synaptics_parse_hw_state(const unsigned char buf[], 687static int synaptics_parse_hw_state(const unsigned char buf[],
@@ -691,28 +768,9 @@ static int synaptics_parse_hw_state(const unsigned char buf[],
691 hw->down = ((buf[0] ^ buf[3]) & 0x02) ? 1 : 0; 768 hw->down = ((buf[0] ^ buf[3]) & 0x02) ? 1 : 0;
692 } 769 }
693 770
694 if (SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap) && 771 if (SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap) > 0 &&
695 ((buf[0] ^ buf[3]) & 0x02)) { 772 ((buf[0] ^ buf[3]) & 0x02)) {
696 switch (SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap) & ~0x01) { 773 synaptics_parse_ext_buttons(buf, priv, hw);
697 default:
698 /*
699 * if nExtBtn is greater than 8 it should be
700 * considered invalid and treated as 0
701 */
702 break;
703 case 8:
704 hw->ext_buttons |= ((buf[5] & 0x08)) ? 0x80 : 0;
705 hw->ext_buttons |= ((buf[4] & 0x08)) ? 0x40 : 0;
706 case 6:
707 hw->ext_buttons |= ((buf[5] & 0x04)) ? 0x20 : 0;
708 hw->ext_buttons |= ((buf[4] & 0x04)) ? 0x10 : 0;
709 case 4:
710 hw->ext_buttons |= ((buf[5] & 0x02)) ? 0x08 : 0;
711 hw->ext_buttons |= ((buf[4] & 0x02)) ? 0x04 : 0;
712 case 2:
713 hw->ext_buttons |= ((buf[5] & 0x01)) ? 0x02 : 0;
714 hw->ext_buttons |= ((buf[4] & 0x01)) ? 0x01 : 0;
715 }
716 } 774 }
717 } else { 775 } else {
718 hw->x = (((buf[1] & 0x1f) << 8) | buf[2]); 776 hw->x = (((buf[1] & 0x1f) << 8) | buf[2]);
@@ -774,12 +832,54 @@ static void synaptics_report_semi_mt_data(struct input_dev *dev,
774 } 832 }
775} 833}
776 834
835static void synaptics_report_ext_buttons(struct psmouse *psmouse,
836 const struct synaptics_hw_state *hw)
837{
838 struct input_dev *dev = psmouse->dev;
839 struct synaptics_data *priv = psmouse->private;
840 int ext_bits = (SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap) + 1) >> 1;
841 char buf[6] = { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00};
842 int i;
843
844 if (!SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap))
845 return;
846
847 /* Bug in FW 8.1, buttons are reported only when ExtBit is 1 */
848 if (SYN_ID_FULL(priv->identity) == 0x801 &&
849 !((psmouse->packet[0] ^ psmouse->packet[3]) & 0x02))
850 return;
851
852 if (!SYN_CAP_EXT_BUTTONS_STICK(priv->ext_cap_10)) {
853 for (i = 0; i < ext_bits; i++) {
854 input_report_key(dev, BTN_0 + 2 * i,
855 hw->ext_buttons & (1 << i));
856 input_report_key(dev, BTN_1 + 2 * i,
857 hw->ext_buttons & (1 << (i + ext_bits)));
858 }
859 return;
860 }
861
862 /*
863 * This generation of touchpads has the trackstick buttons
864 * physically wired to the touchpad. Re-route them through
865 * the pass-through interface.
866 */
867 if (!priv->pt_port)
868 return;
869
870 /* The trackstick expects at most 3 buttons */
871 priv->pt_buttons = SYN_CAP_EXT_BUTTON_STICK_L(hw->ext_buttons) |
872 SYN_CAP_EXT_BUTTON_STICK_R(hw->ext_buttons) << 1 |
873 SYN_CAP_EXT_BUTTON_STICK_M(hw->ext_buttons) << 2;
874
875 synaptics_pass_pt_packet(psmouse, priv->pt_port, buf);
876}
877
777static void synaptics_report_buttons(struct psmouse *psmouse, 878static void synaptics_report_buttons(struct psmouse *psmouse,
778 const struct synaptics_hw_state *hw) 879 const struct synaptics_hw_state *hw)
779{ 880{
780 struct input_dev *dev = psmouse->dev; 881 struct input_dev *dev = psmouse->dev;
781 struct synaptics_data *priv = psmouse->private; 882 struct synaptics_data *priv = psmouse->private;
782 int i;
783 883
784 input_report_key(dev, BTN_LEFT, hw->left); 884 input_report_key(dev, BTN_LEFT, hw->left);
785 input_report_key(dev, BTN_RIGHT, hw->right); 885 input_report_key(dev, BTN_RIGHT, hw->right);
@@ -792,8 +892,7 @@ static void synaptics_report_buttons(struct psmouse *psmouse,
792 input_report_key(dev, BTN_BACK, hw->down); 892 input_report_key(dev, BTN_BACK, hw->down);
793 } 893 }
794 894
795 for (i = 0; i < SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap); i++) 895 synaptics_report_ext_buttons(psmouse, hw);
796 input_report_key(dev, BTN_0 + i, hw->ext_buttons & (1 << i));
797} 896}
798 897
799static void synaptics_report_mt_data(struct psmouse *psmouse, 898static void synaptics_report_mt_data(struct psmouse *psmouse,
@@ -813,7 +912,7 @@ static void synaptics_report_mt_data(struct psmouse *psmouse,
813 pos[i].y = synaptics_invert_y(hw[i]->y); 912 pos[i].y = synaptics_invert_y(hw[i]->y);
814 } 913 }
815 914
816 input_mt_assign_slots(dev, slot, pos, nsemi, DMAX * priv->x_res); 915 input_mt_assign_slots(dev, slot, pos, nsemi, 0);
817 916
818 for (i = 0; i < nsemi; i++) { 917 for (i = 0; i < nsemi; i++) {
819 input_mt_slot(dev, slot[i]); 918 input_mt_slot(dev, slot[i]);
@@ -1014,7 +1113,8 @@ static psmouse_ret_t synaptics_process_byte(struct psmouse *psmouse)
1014 if (SYN_CAP_PASS_THROUGH(priv->capabilities) && 1113 if (SYN_CAP_PASS_THROUGH(priv->capabilities) &&
1015 synaptics_is_pt_packet(psmouse->packet)) { 1114 synaptics_is_pt_packet(psmouse->packet)) {
1016 if (priv->pt_port) 1115 if (priv->pt_port)
1017 synaptics_pass_pt_packet(priv->pt_port, psmouse->packet); 1116 synaptics_pass_pt_packet(psmouse, priv->pt_port,
1117 psmouse->packet);
1018 } else 1118 } else
1019 synaptics_process_packet(psmouse); 1119 synaptics_process_packet(psmouse);
1020 1120
@@ -1116,8 +1216,9 @@ static void set_input_params(struct psmouse *psmouse,
1116 __set_bit(BTN_BACK, dev->keybit); 1216 __set_bit(BTN_BACK, dev->keybit);
1117 } 1217 }
1118 1218
1119 for (i = 0; i < SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap); i++) 1219 if (!SYN_CAP_EXT_BUTTONS_STICK(priv->ext_cap_10))
1120 __set_bit(BTN_0 + i, dev->keybit); 1220 for (i = 0; i < SYN_CAP_MULTI_BUTTON_NO(priv->ext_cap); i++)
1221 __set_bit(BTN_0 + i, dev->keybit);
1121 1222
1122 __clear_bit(EV_REL, dev->evbit); 1223 __clear_bit(EV_REL, dev->evbit);
1123 __clear_bit(REL_X, dev->relbit); 1224 __clear_bit(REL_X, dev->relbit);
@@ -1125,7 +1226,8 @@ static void set_input_params(struct psmouse *psmouse,
1125 1226
1126 if (SYN_CAP_CLICKPAD(priv->ext_cap_0c)) { 1227 if (SYN_CAP_CLICKPAD(priv->ext_cap_0c)) {
1127 __set_bit(INPUT_PROP_BUTTONPAD, dev->propbit); 1228 __set_bit(INPUT_PROP_BUTTONPAD, dev->propbit);
1128 if (psmouse_matches_pnp_id(psmouse, topbuttonpad_pnp_ids)) 1229 if (psmouse_matches_pnp_id(psmouse, topbuttonpad_pnp_ids) &&
1230 !SYN_CAP_EXT_BUTTONS_STICK(priv->ext_cap_10))
1129 __set_bit(INPUT_PROP_TOPBUTTONPAD, dev->propbit); 1231 __set_bit(INPUT_PROP_TOPBUTTONPAD, dev->propbit);
1130 /* Clickpads report only left button */ 1232 /* Clickpads report only left button */
1131 __clear_bit(BTN_RIGHT, dev->keybit); 1233 __clear_bit(BTN_RIGHT, dev->keybit);
@@ -1454,11 +1556,6 @@ int synaptics_init_relative(struct psmouse *psmouse)
1454 return __synaptics_init(psmouse, false); 1556 return __synaptics_init(psmouse, false);
1455} 1557}
1456 1558
1457bool synaptics_supported(void)
1458{
1459 return true;
1460}
1461
1462#else /* CONFIG_MOUSE_PS2_SYNAPTICS */ 1559#else /* CONFIG_MOUSE_PS2_SYNAPTICS */
1463 1560
1464void __init synaptics_module_init(void) 1561void __init synaptics_module_init(void)
@@ -1470,9 +1567,4 @@ int synaptics_init(struct psmouse *psmouse)
1470 return -ENOSYS; 1567 return -ENOSYS;
1471} 1568}
1472 1569
1473bool synaptics_supported(void)
1474{
1475 return false;
1476}
1477
1478#endif /* CONFIG_MOUSE_PS2_SYNAPTICS */ 1570#endif /* CONFIG_MOUSE_PS2_SYNAPTICS */
diff --git a/drivers/input/mouse/synaptics.h b/drivers/input/mouse/synaptics.h
index 6faf9bb7c117..ee4bd0d12b26 100644
--- a/drivers/input/mouse/synaptics.h
+++ b/drivers/input/mouse/synaptics.h
@@ -22,6 +22,7 @@
22#define SYN_QUE_EXT_CAPAB_0C 0x0c 22#define SYN_QUE_EXT_CAPAB_0C 0x0c
23#define SYN_QUE_EXT_MAX_COORDS 0x0d 23#define SYN_QUE_EXT_MAX_COORDS 0x0d
24#define SYN_QUE_EXT_MIN_COORDS 0x0f 24#define SYN_QUE_EXT_MIN_COORDS 0x0f
25#define SYN_QUE_MEXT_CAPAB_10 0x10
25 26
26/* synatics modes */ 27/* synatics modes */
27#define SYN_BIT_ABSOLUTE_MODE (1 << 7) 28#define SYN_BIT_ABSOLUTE_MODE (1 << 7)
@@ -53,6 +54,7 @@
53#define SYN_EXT_CAP_REQUESTS(c) (((c) & 0x700000) >> 20) 54#define SYN_EXT_CAP_REQUESTS(c) (((c) & 0x700000) >> 20)
54#define SYN_CAP_MULTI_BUTTON_NO(ec) (((ec) & 0x00f000) >> 12) 55#define SYN_CAP_MULTI_BUTTON_NO(ec) (((ec) & 0x00f000) >> 12)
55#define SYN_CAP_PRODUCT_ID(ec) (((ec) & 0xff0000) >> 16) 56#define SYN_CAP_PRODUCT_ID(ec) (((ec) & 0xff0000) >> 16)
57#define SYN_MEXT_CAP_BIT(m) ((m) & (1 << 1))
56 58
57/* 59/*
58 * The following describes response for the 0x0c query. 60 * The following describes response for the 0x0c query.
@@ -89,6 +91,30 @@
89#define SYN_CAP_REDUCED_FILTERING(ex0c) ((ex0c) & 0x000400) 91#define SYN_CAP_REDUCED_FILTERING(ex0c) ((ex0c) & 0x000400)
90#define SYN_CAP_IMAGE_SENSOR(ex0c) ((ex0c) & 0x000800) 92#define SYN_CAP_IMAGE_SENSOR(ex0c) ((ex0c) & 0x000800)
91 93
94/*
95 * The following descibes response for the 0x10 query.
96 *
97 * byte mask name meaning
98 * ---- ---- ------- ------------
99 * 1 0x01 ext buttons are stick buttons exported in the extended
100 * capability are actually meant to be used
101 * by the tracktick (pass-through).
102 * 1 0x02 SecurePad the touchpad is a SecurePad, so it
103 * contains a built-in fingerprint reader.
104 * 1 0xe0 more ext count how many more extented queries are
105 * available after this one.
106 * 2 0xff SecurePad width the width of the SecurePad fingerprint
107 * reader.
108 * 3 0xff SecurePad height the height of the SecurePad fingerprint
109 * reader.
110 */
111#define SYN_CAP_EXT_BUTTONS_STICK(ex10) ((ex10) & 0x010000)
112#define SYN_CAP_SECUREPAD(ex10) ((ex10) & 0x020000)
113
114#define SYN_CAP_EXT_BUTTON_STICK_L(eb) (!!((eb) & 0x01))
115#define SYN_CAP_EXT_BUTTON_STICK_M(eb) (!!((eb) & 0x02))
116#define SYN_CAP_EXT_BUTTON_STICK_R(eb) (!!((eb) & 0x04))
117
92/* synaptics modes query bits */ 118/* synaptics modes query bits */
93#define SYN_MODE_ABSOLUTE(m) ((m) & (1 << 7)) 119#define SYN_MODE_ABSOLUTE(m) ((m) & (1 << 7))
94#define SYN_MODE_RATE(m) ((m) & (1 << 6)) 120#define SYN_MODE_RATE(m) ((m) & (1 << 6))
@@ -143,6 +169,7 @@ struct synaptics_data {
143 unsigned long int capabilities; /* Capabilities */ 169 unsigned long int capabilities; /* Capabilities */
144 unsigned long int ext_cap; /* Extended Capabilities */ 170 unsigned long int ext_cap; /* Extended Capabilities */
145 unsigned long int ext_cap_0c; /* Ext Caps from 0x0c query */ 171 unsigned long int ext_cap_0c; /* Ext Caps from 0x0c query */
172 unsigned long int ext_cap_10; /* Ext Caps from 0x10 query */
146 unsigned long int identity; /* Identification */ 173 unsigned long int identity; /* Identification */
147 unsigned int x_res, y_res; /* X/Y resolution in units/mm */ 174 unsigned int x_res, y_res; /* X/Y resolution in units/mm */
148 unsigned int x_max, y_max; /* Max coordinates (from FW) */ 175 unsigned int x_max, y_max; /* Max coordinates (from FW) */
@@ -156,6 +183,7 @@ struct synaptics_data {
156 bool disable_gesture; /* disable gestures */ 183 bool disable_gesture; /* disable gestures */
157 184
158 struct serio *pt_port; /* Pass-through serio port */ 185 struct serio *pt_port; /* Pass-through serio port */
186 unsigned char pt_buttons; /* Pass-through buttons */
159 187
160 /* 188 /*
161 * Last received Advanced Gesture Mode (AGM) packet. An AGM packet 189 * Last received Advanced Gesture Mode (AGM) packet. An AGM packet
@@ -175,6 +203,5 @@ int synaptics_detect(struct psmouse *psmouse, bool set_properties);
175int synaptics_init(struct psmouse *psmouse); 203int synaptics_init(struct psmouse *psmouse);
176int synaptics_init_relative(struct psmouse *psmouse); 204int synaptics_init_relative(struct psmouse *psmouse);
177void synaptics_reset(struct psmouse *psmouse); 205void synaptics_reset(struct psmouse *psmouse);
178bool synaptics_supported(void);
179 206
180#endif /* _SYNAPTICS_H */ 207#endif /* _SYNAPTICS_H */
diff --git a/drivers/input/touchscreen/Kconfig b/drivers/input/touchscreen/Kconfig
index 58917525126e..6261fd6d7c3c 100644
--- a/drivers/input/touchscreen/Kconfig
+++ b/drivers/input/touchscreen/Kconfig
@@ -943,6 +943,7 @@ config TOUCHSCREEN_SUN4I
943 tristate "Allwinner sun4i resistive touchscreen controller support" 943 tristate "Allwinner sun4i resistive touchscreen controller support"
944 depends on ARCH_SUNXI || COMPILE_TEST 944 depends on ARCH_SUNXI || COMPILE_TEST
945 depends on HWMON 945 depends on HWMON
946 depends on THERMAL || !THERMAL_OF
946 help 947 help
947 This selects support for the resistive touchscreen controller 948 This selects support for the resistive touchscreen controller
948 found on Allwinner sunxi SoCs. 949 found on Allwinner sunxi SoCs.
diff --git a/drivers/iommu/Kconfig b/drivers/iommu/Kconfig
index baa0d9786f50..1ae4e547b419 100644
--- a/drivers/iommu/Kconfig
+++ b/drivers/iommu/Kconfig
@@ -23,6 +23,7 @@ config IOMMU_IO_PGTABLE
23config IOMMU_IO_PGTABLE_LPAE 23config IOMMU_IO_PGTABLE_LPAE
24 bool "ARMv7/v8 Long Descriptor Format" 24 bool "ARMv7/v8 Long Descriptor Format"
25 select IOMMU_IO_PGTABLE 25 select IOMMU_IO_PGTABLE
26 depends on ARM || ARM64 || COMPILE_TEST
26 help 27 help
27 Enable support for the ARM long descriptor pagetable format. 28 Enable support for the ARM long descriptor pagetable format.
28 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page 29 This allocator supports 4K/2M/1G, 16K/32M and 64K/512M page
@@ -63,6 +64,7 @@ config MSM_IOMMU
63 bool "MSM IOMMU Support" 64 bool "MSM IOMMU Support"
64 depends on ARM 65 depends on ARM
65 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST 66 depends on ARCH_MSM8X60 || ARCH_MSM8960 || COMPILE_TEST
67 depends on BROKEN
66 select IOMMU_API 68 select IOMMU_API
67 help 69 help
68 Support for the IOMMUs found on certain Qualcomm SOCs. 70 Support for the IOMMUs found on certain Qualcomm SOCs.
diff --git a/drivers/iommu/exynos-iommu.c b/drivers/iommu/exynos-iommu.c
index 7ce52737c7a1..dc14fec4ede1 100644
--- a/drivers/iommu/exynos-iommu.c
+++ b/drivers/iommu/exynos-iommu.c
@@ -1186,8 +1186,15 @@ static const struct iommu_ops exynos_iommu_ops = {
1186 1186
1187static int __init exynos_iommu_init(void) 1187static int __init exynos_iommu_init(void)
1188{ 1188{
1189 struct device_node *np;
1189 int ret; 1190 int ret;
1190 1191
1192 np = of_find_matching_node(NULL, sysmmu_of_match);
1193 if (!np)
1194 return 0;
1195
1196 of_node_put(np);
1197
1191 lv2table_kmem_cache = kmem_cache_create("exynos-iommu-lv2table", 1198 lv2table_kmem_cache = kmem_cache_create("exynos-iommu-lv2table",
1192 LV2TABLE_SIZE, LV2TABLE_SIZE, 0, NULL); 1199 LV2TABLE_SIZE, LV2TABLE_SIZE, 0, NULL);
1193 if (!lv2table_kmem_cache) { 1200 if (!lv2table_kmem_cache) {
diff --git a/drivers/iommu/io-pgtable-arm.c b/drivers/iommu/io-pgtable-arm.c
index 5a500edf00cc..b610a8dee238 100644
--- a/drivers/iommu/io-pgtable-arm.c
+++ b/drivers/iommu/io-pgtable-arm.c
@@ -56,7 +56,8 @@
56 ((((d)->levels - ((l) - ARM_LPAE_START_LVL(d) + 1)) \ 56 ((((d)->levels - ((l) - ARM_LPAE_START_LVL(d) + 1)) \
57 * (d)->bits_per_level) + (d)->pg_shift) 57 * (d)->bits_per_level) + (d)->pg_shift)
58 58
59#define ARM_LPAE_PAGES_PER_PGD(d) ((d)->pgd_size >> (d)->pg_shift) 59#define ARM_LPAE_PAGES_PER_PGD(d) \
60 DIV_ROUND_UP((d)->pgd_size, 1UL << (d)->pg_shift)
60 61
61/* 62/*
62 * Calculate the index at level l used to map virtual address a using the 63 * Calculate the index at level l used to map virtual address a using the
@@ -66,7 +67,7 @@
66 ((l) == ARM_LPAE_START_LVL(d) ? ilog2(ARM_LPAE_PAGES_PER_PGD(d)) : 0) 67 ((l) == ARM_LPAE_START_LVL(d) ? ilog2(ARM_LPAE_PAGES_PER_PGD(d)) : 0)
67 68
68#define ARM_LPAE_LVL_IDX(a,l,d) \ 69#define ARM_LPAE_LVL_IDX(a,l,d) \
69 (((a) >> ARM_LPAE_LVL_SHIFT(l,d)) & \ 70 (((u64)(a) >> ARM_LPAE_LVL_SHIFT(l,d)) & \
70 ((1 << ((d)->bits_per_level + ARM_LPAE_PGD_IDX(l,d))) - 1)) 71 ((1 << ((d)->bits_per_level + ARM_LPAE_PGD_IDX(l,d))) - 1))
71 72
72/* Calculate the block/page mapping size at level l for pagetable in d. */ 73/* Calculate the block/page mapping size at level l for pagetable in d. */
diff --git a/drivers/iommu/omap-iommu.c b/drivers/iommu/omap-iommu.c
index f59f857b702e..a4ba851825c2 100644
--- a/drivers/iommu/omap-iommu.c
+++ b/drivers/iommu/omap-iommu.c
@@ -1376,6 +1376,13 @@ static int __init omap_iommu_init(void)
1376 struct kmem_cache *p; 1376 struct kmem_cache *p;
1377 const unsigned long flags = SLAB_HWCACHE_ALIGN; 1377 const unsigned long flags = SLAB_HWCACHE_ALIGN;
1378 size_t align = 1 << 10; /* L2 pagetable alignement */ 1378 size_t align = 1 << 10; /* L2 pagetable alignement */
1379 struct device_node *np;
1380
1381 np = of_find_matching_node(NULL, omap_iommu_of_match);
1382 if (!np)
1383 return 0;
1384
1385 of_node_put(np);
1379 1386
1380 p = kmem_cache_create("iopte_cache", IOPTE_TABLE_SIZE, align, flags, 1387 p = kmem_cache_create("iopte_cache", IOPTE_TABLE_SIZE, align, flags,
1381 iopte_cachep_ctor); 1388 iopte_cachep_ctor);
diff --git a/drivers/iommu/rockchip-iommu.c b/drivers/iommu/rockchip-iommu.c
index 6a8b1ec4a48a..9f74fddcd304 100644
--- a/drivers/iommu/rockchip-iommu.c
+++ b/drivers/iommu/rockchip-iommu.c
@@ -1015,8 +1015,15 @@ static struct platform_driver rk_iommu_driver = {
1015 1015
1016static int __init rk_iommu_init(void) 1016static int __init rk_iommu_init(void)
1017{ 1017{
1018 struct device_node *np;
1018 int ret; 1019 int ret;
1019 1020
1021 np = of_find_matching_node(NULL, rk_iommu_dt_ids);
1022 if (!np)
1023 return 0;
1024
1025 of_node_put(np);
1026
1020 ret = bus_set_iommu(&platform_bus_type, &rk_iommu_ops); 1027 ret = bus_set_iommu(&platform_bus_type, &rk_iommu_ops);
1021 if (ret) 1028 if (ret)
1022 return ret; 1029 return ret;
diff --git a/drivers/irqchip/irq-armada-370-xp.c b/drivers/irqchip/irq-armada-370-xp.c
index 463c235acbdc..4387dae14e45 100644
--- a/drivers/irqchip/irq-armada-370-xp.c
+++ b/drivers/irqchip/irq-armada-370-xp.c
@@ -69,6 +69,7 @@ static void __iomem *per_cpu_int_base;
69static void __iomem *main_int_base; 69static void __iomem *main_int_base;
70static struct irq_domain *armada_370_xp_mpic_domain; 70static struct irq_domain *armada_370_xp_mpic_domain;
71static u32 doorbell_mask_reg; 71static u32 doorbell_mask_reg;
72static int parent_irq;
72#ifdef CONFIG_PCI_MSI 73#ifdef CONFIG_PCI_MSI
73static struct irq_domain *armada_370_xp_msi_domain; 74static struct irq_domain *armada_370_xp_msi_domain;
74static DECLARE_BITMAP(msi_used, PCI_MSI_DOORBELL_NR); 75static DECLARE_BITMAP(msi_used, PCI_MSI_DOORBELL_NR);
@@ -356,6 +357,7 @@ static int armada_xp_mpic_secondary_init(struct notifier_block *nfb,
356{ 357{
357 if (action == CPU_STARTING || action == CPU_STARTING_FROZEN) 358 if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
358 armada_xp_mpic_smp_cpu_init(); 359 armada_xp_mpic_smp_cpu_init();
360
359 return NOTIFY_OK; 361 return NOTIFY_OK;
360} 362}
361 363
@@ -364,6 +366,20 @@ static struct notifier_block armada_370_xp_mpic_cpu_notifier = {
364 .priority = 100, 366 .priority = 100,
365}; 367};
366 368
369static int mpic_cascaded_secondary_init(struct notifier_block *nfb,
370 unsigned long action, void *hcpu)
371{
372 if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
373 enable_percpu_irq(parent_irq, IRQ_TYPE_NONE);
374
375 return NOTIFY_OK;
376}
377
378static struct notifier_block mpic_cascaded_cpu_notifier = {
379 .notifier_call = mpic_cascaded_secondary_init,
380 .priority = 100,
381};
382
367#endif /* CONFIG_SMP */ 383#endif /* CONFIG_SMP */
368 384
369static struct irq_domain_ops armada_370_xp_mpic_irq_ops = { 385static struct irq_domain_ops armada_370_xp_mpic_irq_ops = {
@@ -539,7 +555,7 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
539 struct device_node *parent) 555 struct device_node *parent)
540{ 556{
541 struct resource main_int_res, per_cpu_int_res; 557 struct resource main_int_res, per_cpu_int_res;
542 int parent_irq, nr_irqs, i; 558 int nr_irqs, i;
543 u32 control; 559 u32 control;
544 560
545 BUG_ON(of_address_to_resource(node, 0, &main_int_res)); 561 BUG_ON(of_address_to_resource(node, 0, &main_int_res));
@@ -587,6 +603,9 @@ static int __init armada_370_xp_mpic_of_init(struct device_node *node,
587 register_cpu_notifier(&armada_370_xp_mpic_cpu_notifier); 603 register_cpu_notifier(&armada_370_xp_mpic_cpu_notifier);
588#endif 604#endif
589 } else { 605 } else {
606#ifdef CONFIG_SMP
607 register_cpu_notifier(&mpic_cascaded_cpu_notifier);
608#endif
590 irq_set_chained_handler(parent_irq, 609 irq_set_chained_handler(parent_irq,
591 armada_370_xp_mpic_handle_cascade_irq); 610 armada_370_xp_mpic_handle_cascade_irq);
592 } 611 }
diff --git a/drivers/irqchip/irq-gic-v3-its.c b/drivers/irqchip/irq-gic-v3-its.c
index d8996bdf0f61..596b0a9eee99 100644
--- a/drivers/irqchip/irq-gic-v3-its.c
+++ b/drivers/irqchip/irq-gic-v3-its.c
@@ -416,13 +416,14 @@ static void its_send_single_command(struct its_node *its,
416{ 416{
417 struct its_cmd_block *cmd, *sync_cmd, *next_cmd; 417 struct its_cmd_block *cmd, *sync_cmd, *next_cmd;
418 struct its_collection *sync_col; 418 struct its_collection *sync_col;
419 unsigned long flags;
419 420
420 raw_spin_lock(&its->lock); 421 raw_spin_lock_irqsave(&its->lock, flags);
421 422
422 cmd = its_allocate_entry(its); 423 cmd = its_allocate_entry(its);
423 if (!cmd) { /* We're soooooo screewed... */ 424 if (!cmd) { /* We're soooooo screewed... */
424 pr_err_ratelimited("ITS can't allocate, dropping command\n"); 425 pr_err_ratelimited("ITS can't allocate, dropping command\n");
425 raw_spin_unlock(&its->lock); 426 raw_spin_unlock_irqrestore(&its->lock, flags);
426 return; 427 return;
427 } 428 }
428 sync_col = builder(cmd, desc); 429 sync_col = builder(cmd, desc);
@@ -442,7 +443,7 @@ static void its_send_single_command(struct its_node *its,
442 443
443post: 444post:
444 next_cmd = its_post_commands(its); 445 next_cmd = its_post_commands(its);
445 raw_spin_unlock(&its->lock); 446 raw_spin_unlock_irqrestore(&its->lock, flags);
446 447
447 its_wait_for_range_completion(its, cmd, next_cmd); 448 its_wait_for_range_completion(its, cmd, next_cmd);
448} 449}
@@ -799,21 +800,43 @@ static int its_alloc_tables(struct its_node *its)
799{ 800{
800 int err; 801 int err;
801 int i; 802 int i;
802 int psz = PAGE_SIZE; 803 int psz = SZ_64K;
803 u64 shr = GITS_BASER_InnerShareable; 804 u64 shr = GITS_BASER_InnerShareable;
804 805
805 for (i = 0; i < GITS_BASER_NR_REGS; i++) { 806 for (i = 0; i < GITS_BASER_NR_REGS; i++) {
806 u64 val = readq_relaxed(its->base + GITS_BASER + i * 8); 807 u64 val = readq_relaxed(its->base + GITS_BASER + i * 8);
807 u64 type = GITS_BASER_TYPE(val); 808 u64 type = GITS_BASER_TYPE(val);
808 u64 entry_size = GITS_BASER_ENTRY_SIZE(val); 809 u64 entry_size = GITS_BASER_ENTRY_SIZE(val);
810 int order = get_order(psz);
811 int alloc_size;
809 u64 tmp; 812 u64 tmp;
810 void *base; 813 void *base;
811 814
812 if (type == GITS_BASER_TYPE_NONE) 815 if (type == GITS_BASER_TYPE_NONE)
813 continue; 816 continue;
814 817
815 /* We're lazy and only allocate a single page for now */ 818 /*
816 base = (void *)get_zeroed_page(GFP_KERNEL); 819 * Allocate as many entries as required to fit the
820 * range of device IDs that the ITS can grok... The ID
821 * space being incredibly sparse, this results in a
822 * massive waste of memory.
823 *
824 * For other tables, only allocate a single page.
825 */
826 if (type == GITS_BASER_TYPE_DEVICE) {
827 u64 typer = readq_relaxed(its->base + GITS_TYPER);
828 u32 ids = GITS_TYPER_DEVBITS(typer);
829
830 order = get_order((1UL << ids) * entry_size);
831 if (order >= MAX_ORDER) {
832 order = MAX_ORDER - 1;
833 pr_warn("%s: Device Table too large, reduce its page order to %u\n",
834 its->msi_chip.of_node->full_name, order);
835 }
836 }
837
838 alloc_size = (1 << order) * PAGE_SIZE;
839 base = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO, order);
817 if (!base) { 840 if (!base) {
818 err = -ENOMEM; 841 err = -ENOMEM;
819 goto out_free; 842 goto out_free;
@@ -841,7 +864,7 @@ retry_baser:
841 break; 864 break;
842 } 865 }
843 866
844 val |= (PAGE_SIZE / psz) - 1; 867 val |= (alloc_size / psz) - 1;
845 868
846 writeq_relaxed(val, its->base + GITS_BASER + i * 8); 869 writeq_relaxed(val, its->base + GITS_BASER + i * 8);
847 tmp = readq_relaxed(its->base + GITS_BASER + i * 8); 870 tmp = readq_relaxed(its->base + GITS_BASER + i * 8);
@@ -882,7 +905,7 @@ retry_baser:
882 } 905 }
883 906
884 pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n", 907 pr_info("ITS: allocated %d %s @%lx (psz %dK, shr %d)\n",
885 (int)(PAGE_SIZE / entry_size), 908 (int)(alloc_size / entry_size),
886 its_base_type_string[type], 909 its_base_type_string[type],
887 (unsigned long)virt_to_phys(base), 910 (unsigned long)virt_to_phys(base),
888 psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT); 911 psz / SZ_1K, (int)shr >> GITS_BASER_SHAREABILITY_SHIFT);
@@ -1020,8 +1043,9 @@ static void its_cpu_init_collection(void)
1020static struct its_device *its_find_device(struct its_node *its, u32 dev_id) 1043static struct its_device *its_find_device(struct its_node *its, u32 dev_id)
1021{ 1044{
1022 struct its_device *its_dev = NULL, *tmp; 1045 struct its_device *its_dev = NULL, *tmp;
1046 unsigned long flags;
1023 1047
1024 raw_spin_lock(&its->lock); 1048 raw_spin_lock_irqsave(&its->lock, flags);
1025 1049
1026 list_for_each_entry(tmp, &its->its_device_list, entry) { 1050 list_for_each_entry(tmp, &its->its_device_list, entry) {
1027 if (tmp->device_id == dev_id) { 1051 if (tmp->device_id == dev_id) {
@@ -1030,7 +1054,7 @@ static struct its_device *its_find_device(struct its_node *its, u32 dev_id)
1030 } 1054 }
1031 } 1055 }
1032 1056
1033 raw_spin_unlock(&its->lock); 1057 raw_spin_unlock_irqrestore(&its->lock, flags);
1034 1058
1035 return its_dev; 1059 return its_dev;
1036} 1060}
@@ -1040,6 +1064,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
1040{ 1064{
1041 struct its_device *dev; 1065 struct its_device *dev;
1042 unsigned long *lpi_map; 1066 unsigned long *lpi_map;
1067 unsigned long flags;
1043 void *itt; 1068 void *itt;
1044 int lpi_base; 1069 int lpi_base;
1045 int nr_lpis; 1070 int nr_lpis;
@@ -1056,7 +1081,7 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
1056 nr_ites = max(2UL, roundup_pow_of_two(nvecs)); 1081 nr_ites = max(2UL, roundup_pow_of_two(nvecs));
1057 sz = nr_ites * its->ite_size; 1082 sz = nr_ites * its->ite_size;
1058 sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1; 1083 sz = max(sz, ITS_ITT_ALIGN) + ITS_ITT_ALIGN - 1;
1059 itt = kmalloc(sz, GFP_KERNEL); 1084 itt = kzalloc(sz, GFP_KERNEL);
1060 lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis); 1085 lpi_map = its_lpi_alloc_chunks(nvecs, &lpi_base, &nr_lpis);
1061 1086
1062 if (!dev || !itt || !lpi_map) { 1087 if (!dev || !itt || !lpi_map) {
@@ -1075,9 +1100,9 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
1075 dev->device_id = dev_id; 1100 dev->device_id = dev_id;
1076 INIT_LIST_HEAD(&dev->entry); 1101 INIT_LIST_HEAD(&dev->entry);
1077 1102
1078 raw_spin_lock(&its->lock); 1103 raw_spin_lock_irqsave(&its->lock, flags);
1079 list_add(&dev->entry, &its->its_device_list); 1104 list_add(&dev->entry, &its->its_device_list);
1080 raw_spin_unlock(&its->lock); 1105 raw_spin_unlock_irqrestore(&its->lock, flags);
1081 1106
1082 /* Bind the device to the first possible CPU */ 1107 /* Bind the device to the first possible CPU */
1083 cpu = cpumask_first(cpu_online_mask); 1108 cpu = cpumask_first(cpu_online_mask);
@@ -1091,9 +1116,11 @@ static struct its_device *its_create_device(struct its_node *its, u32 dev_id,
1091 1116
1092static void its_free_device(struct its_device *its_dev) 1117static void its_free_device(struct its_device *its_dev)
1093{ 1118{
1094 raw_spin_lock(&its_dev->its->lock); 1119 unsigned long flags;
1120
1121 raw_spin_lock_irqsave(&its_dev->its->lock, flags);
1095 list_del(&its_dev->entry); 1122 list_del(&its_dev->entry);
1096 raw_spin_unlock(&its_dev->its->lock); 1123 raw_spin_unlock_irqrestore(&its_dev->its->lock, flags);
1097 kfree(its_dev->itt); 1124 kfree(its_dev->itt);
1098 kfree(its_dev); 1125 kfree(its_dev);
1099} 1126}
@@ -1112,31 +1139,69 @@ static int its_alloc_device_irq(struct its_device *dev, irq_hw_number_t *hwirq)
1112 return 0; 1139 return 0;
1113} 1140}
1114 1141
1142struct its_pci_alias {
1143 struct pci_dev *pdev;
1144 u32 dev_id;
1145 u32 count;
1146};
1147
1148static int its_pci_msi_vec_count(struct pci_dev *pdev)
1149{
1150 int msi, msix;
1151
1152 msi = max(pci_msi_vec_count(pdev), 0);
1153 msix = max(pci_msix_vec_count(pdev), 0);
1154
1155 return max(msi, msix);
1156}
1157
1158static int its_get_pci_alias(struct pci_dev *pdev, u16 alias, void *data)
1159{
1160 struct its_pci_alias *dev_alias = data;
1161
1162 dev_alias->dev_id = alias;
1163 if (pdev != dev_alias->pdev)
1164 dev_alias->count += its_pci_msi_vec_count(dev_alias->pdev);
1165
1166 return 0;
1167}
1168
1115static int its_msi_prepare(struct irq_domain *domain, struct device *dev, 1169static int its_msi_prepare(struct irq_domain *domain, struct device *dev,
1116 int nvec, msi_alloc_info_t *info) 1170 int nvec, msi_alloc_info_t *info)
1117{ 1171{
1118 struct pci_dev *pdev; 1172 struct pci_dev *pdev;
1119 struct its_node *its; 1173 struct its_node *its;
1120 u32 dev_id;
1121 struct its_device *its_dev; 1174 struct its_device *its_dev;
1175 struct its_pci_alias dev_alias;
1122 1176
1123 if (!dev_is_pci(dev)) 1177 if (!dev_is_pci(dev))
1124 return -EINVAL; 1178 return -EINVAL;
1125 1179
1126 pdev = to_pci_dev(dev); 1180 pdev = to_pci_dev(dev);
1127 dev_id = PCI_DEVID(pdev->bus->number, pdev->devfn); 1181 dev_alias.pdev = pdev;
1182 dev_alias.count = nvec;
1183
1184 pci_for_each_dma_alias(pdev, its_get_pci_alias, &dev_alias);
1128 its = domain->parent->host_data; 1185 its = domain->parent->host_data;
1129 1186
1130 its_dev = its_find_device(its, dev_id); 1187 its_dev = its_find_device(its, dev_alias.dev_id);
1131 if (WARN_ON(its_dev)) 1188 if (its_dev) {
1132 return -EINVAL; 1189 /*
1190 * We already have seen this ID, probably through
1191 * another alias (PCI bridge of some sort). No need to
1192 * create the device.
1193 */
1194 dev_dbg(dev, "Reusing ITT for devID %x\n", dev_alias.dev_id);
1195 goto out;
1196 }
1133 1197
1134 its_dev = its_create_device(its, dev_id, nvec); 1198 its_dev = its_create_device(its, dev_alias.dev_id, dev_alias.count);
1135 if (!its_dev) 1199 if (!its_dev)
1136 return -ENOMEM; 1200 return -ENOMEM;
1137 1201
1138 dev_dbg(&pdev->dev, "ITT %d entries, %d bits\n", nvec, ilog2(nvec)); 1202 dev_dbg(&pdev->dev, "ITT %d entries, %d bits\n",
1139 1203 dev_alias.count, ilog2(dev_alias.count));
1204out:
1140 info->scratchpad[0].ptr = its_dev; 1205 info->scratchpad[0].ptr = its_dev;
1141 info->scratchpad[1].ptr = dev; 1206 info->scratchpad[1].ptr = dev;
1142 return 0; 1207 return 0;
@@ -1255,6 +1320,34 @@ static const struct irq_domain_ops its_domain_ops = {
1255 .deactivate = its_irq_domain_deactivate, 1320 .deactivate = its_irq_domain_deactivate,
1256}; 1321};
1257 1322
1323static int its_force_quiescent(void __iomem *base)
1324{
1325 u32 count = 1000000; /* 1s */
1326 u32 val;
1327
1328 val = readl_relaxed(base + GITS_CTLR);
1329 if (val & GITS_CTLR_QUIESCENT)
1330 return 0;
1331
1332 /* Disable the generation of all interrupts to this ITS */
1333 val &= ~GITS_CTLR_ENABLE;
1334 writel_relaxed(val, base + GITS_CTLR);
1335
1336 /* Poll GITS_CTLR and wait until ITS becomes quiescent */
1337 while (1) {
1338 val = readl_relaxed(base + GITS_CTLR);
1339 if (val & GITS_CTLR_QUIESCENT)
1340 return 0;
1341
1342 count--;
1343 if (!count)
1344 return -EBUSY;
1345
1346 cpu_relax();
1347 udelay(1);
1348 }
1349}
1350
1258static int its_probe(struct device_node *node, struct irq_domain *parent) 1351static int its_probe(struct device_node *node, struct irq_domain *parent)
1259{ 1352{
1260 struct resource res; 1353 struct resource res;
@@ -1283,6 +1376,13 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
1283 goto out_unmap; 1376 goto out_unmap;
1284 } 1377 }
1285 1378
1379 err = its_force_quiescent(its_base);
1380 if (err) {
1381 pr_warn("%s: failed to quiesce, giving up\n",
1382 node->full_name);
1383 goto out_unmap;
1384 }
1385
1286 pr_info("ITS: %s\n", node->full_name); 1386 pr_info("ITS: %s\n", node->full_name);
1287 1387
1288 its = kzalloc(sizeof(*its), GFP_KERNEL); 1388 its = kzalloc(sizeof(*its), GFP_KERNEL);
@@ -1323,7 +1423,7 @@ static int its_probe(struct device_node *node, struct irq_domain *parent)
1323 writeq_relaxed(baser, its->base + GITS_CBASER); 1423 writeq_relaxed(baser, its->base + GITS_CBASER);
1324 tmp = readq_relaxed(its->base + GITS_CBASER); 1424 tmp = readq_relaxed(its->base + GITS_CBASER);
1325 writeq_relaxed(0, its->base + GITS_CWRITER); 1425 writeq_relaxed(0, its->base + GITS_CWRITER);
1326 writel_relaxed(1, its->base + GITS_CTLR); 1426 writel_relaxed(GITS_CTLR_ENABLE, its->base + GITS_CTLR);
1327 1427
1328 if ((tmp ^ baser) & GITS_BASER_SHAREABILITY_MASK) { 1428 if ((tmp ^ baser) & GITS_BASER_SHAREABILITY_MASK) {
1329 pr_info("ITS: using cache flushing for cmd queue\n"); 1429 pr_info("ITS: using cache flushing for cmd queue\n");
@@ -1382,12 +1482,11 @@ static bool gic_rdists_supports_plpis(void)
1382 1482
1383int its_cpu_init(void) 1483int its_cpu_init(void)
1384{ 1484{
1385 if (!gic_rdists_supports_plpis()) {
1386 pr_info("CPU%d: LPIs not supported\n", smp_processor_id());
1387 return -ENXIO;
1388 }
1389
1390 if (!list_empty(&its_nodes)) { 1485 if (!list_empty(&its_nodes)) {
1486 if (!gic_rdists_supports_plpis()) {
1487 pr_info("CPU%d: LPIs not supported\n", smp_processor_id());
1488 return -ENXIO;
1489 }
1391 its_cpu_init_lpis(); 1490 its_cpu_init_lpis();
1392 its_cpu_init_collection(); 1491 its_cpu_init_collection();
1393 } 1492 }
diff --git a/drivers/irqchip/irq-gic-v3.c b/drivers/irqchip/irq-gic-v3.c
index 1c6dea2fbc34..fd8850def1b8 100644
--- a/drivers/irqchip/irq-gic-v3.c
+++ b/drivers/irqchip/irq-gic-v3.c
@@ -466,7 +466,7 @@ static u16 gic_compute_target_list(int *base_cpu, const struct cpumask *mask,
466 tlist |= 1 << (mpidr & 0xf); 466 tlist |= 1 << (mpidr & 0xf);
467 467
468 cpu = cpumask_next(cpu, mask); 468 cpu = cpumask_next(cpu, mask);
469 if (cpu == nr_cpu_ids) 469 if (cpu >= nr_cpu_ids)
470 goto out; 470 goto out;
471 471
472 mpidr = cpu_logical_map(cpu); 472 mpidr = cpu_logical_map(cpu);
diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
index 4634cf7d0ec3..471e1cdc1933 100644
--- a/drivers/irqchip/irq-gic.c
+++ b/drivers/irqchip/irq-gic.c
@@ -154,23 +154,25 @@ static inline unsigned int gic_irq(struct irq_data *d)
154static void gic_mask_irq(struct irq_data *d) 154static void gic_mask_irq(struct irq_data *d)
155{ 155{
156 u32 mask = 1 << (gic_irq(d) % 32); 156 u32 mask = 1 << (gic_irq(d) % 32);
157 unsigned long flags;
157 158
158 raw_spin_lock(&irq_controller_lock); 159 raw_spin_lock_irqsave(&irq_controller_lock, flags);
159 writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4); 160 writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_CLEAR + (gic_irq(d) / 32) * 4);
160 if (gic_arch_extn.irq_mask) 161 if (gic_arch_extn.irq_mask)
161 gic_arch_extn.irq_mask(d); 162 gic_arch_extn.irq_mask(d);
162 raw_spin_unlock(&irq_controller_lock); 163 raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
163} 164}
164 165
165static void gic_unmask_irq(struct irq_data *d) 166static void gic_unmask_irq(struct irq_data *d)
166{ 167{
167 u32 mask = 1 << (gic_irq(d) % 32); 168 u32 mask = 1 << (gic_irq(d) % 32);
169 unsigned long flags;
168 170
169 raw_spin_lock(&irq_controller_lock); 171 raw_spin_lock_irqsave(&irq_controller_lock, flags);
170 if (gic_arch_extn.irq_unmask) 172 if (gic_arch_extn.irq_unmask)
171 gic_arch_extn.irq_unmask(d); 173 gic_arch_extn.irq_unmask(d);
172 writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4); 174 writel_relaxed(mask, gic_dist_base(d) + GIC_DIST_ENABLE_SET + (gic_irq(d) / 32) * 4);
173 raw_spin_unlock(&irq_controller_lock); 175 raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
174} 176}
175 177
176static void gic_eoi_irq(struct irq_data *d) 178static void gic_eoi_irq(struct irq_data *d)
@@ -188,6 +190,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
188{ 190{
189 void __iomem *base = gic_dist_base(d); 191 void __iomem *base = gic_dist_base(d);
190 unsigned int gicirq = gic_irq(d); 192 unsigned int gicirq = gic_irq(d);
193 unsigned long flags;
191 int ret; 194 int ret;
192 195
193 /* Interrupt configuration for SGIs can't be changed */ 196 /* Interrupt configuration for SGIs can't be changed */
@@ -199,14 +202,14 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
199 type != IRQ_TYPE_EDGE_RISING) 202 type != IRQ_TYPE_EDGE_RISING)
200 return -EINVAL; 203 return -EINVAL;
201 204
202 raw_spin_lock(&irq_controller_lock); 205 raw_spin_lock_irqsave(&irq_controller_lock, flags);
203 206
204 if (gic_arch_extn.irq_set_type) 207 if (gic_arch_extn.irq_set_type)
205 gic_arch_extn.irq_set_type(d, type); 208 gic_arch_extn.irq_set_type(d, type);
206 209
207 ret = gic_configure_irq(gicirq, type, base, NULL); 210 ret = gic_configure_irq(gicirq, type, base, NULL);
208 211
209 raw_spin_unlock(&irq_controller_lock); 212 raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
210 213
211 return ret; 214 return ret;
212} 215}
@@ -227,6 +230,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
227 void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3); 230 void __iomem *reg = gic_dist_base(d) + GIC_DIST_TARGET + (gic_irq(d) & ~3);
228 unsigned int cpu, shift = (gic_irq(d) % 4) * 8; 231 unsigned int cpu, shift = (gic_irq(d) % 4) * 8;
229 u32 val, mask, bit; 232 u32 val, mask, bit;
233 unsigned long flags;
230 234
231 if (!force) 235 if (!force)
232 cpu = cpumask_any_and(mask_val, cpu_online_mask); 236 cpu = cpumask_any_and(mask_val, cpu_online_mask);
@@ -236,12 +240,12 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *mask_val,
236 if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids) 240 if (cpu >= NR_GIC_CPU_IF || cpu >= nr_cpu_ids)
237 return -EINVAL; 241 return -EINVAL;
238 242
239 raw_spin_lock(&irq_controller_lock); 243 raw_spin_lock_irqsave(&irq_controller_lock, flags);
240 mask = 0xff << shift; 244 mask = 0xff << shift;
241 bit = gic_cpu_map[cpu] << shift; 245 bit = gic_cpu_map[cpu] << shift;
242 val = readl_relaxed(reg) & ~mask; 246 val = readl_relaxed(reg) & ~mask;
243 writel_relaxed(val | bit, reg); 247 writel_relaxed(val | bit, reg);
244 raw_spin_unlock(&irq_controller_lock); 248 raw_spin_unlock_irqrestore(&irq_controller_lock, flags);
245 249
246 return IRQ_SET_MASK_OK; 250 return IRQ_SET_MASK_OK;
247} 251}
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index 1daa7ca04577..9acdc080e7ec 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -192,14 +192,6 @@ static bool gic_local_irq_is_routable(int intr)
192 } 192 }
193} 193}
194 194
195unsigned int gic_get_timer_pending(void)
196{
197 unsigned int vpe_pending;
198
199 vpe_pending = gic_read(GIC_REG(VPE_LOCAL, GIC_VPE_PEND));
200 return vpe_pending & GIC_VPE_PEND_TIMER_MSK;
201}
202
203static void gic_bind_eic_interrupt(int irq, int set) 195static void gic_bind_eic_interrupt(int irq, int set)
204{ 196{
205 /* Convert irq vector # to hw int # */ 197 /* Convert irq vector # to hw int # */
diff --git a/drivers/isdn/hardware/mISDN/hfcpci.c b/drivers/isdn/hardware/mISDN/hfcpci.c
index 3c92780bda09..ff48da61c94c 100644
--- a/drivers/isdn/hardware/mISDN/hfcpci.c
+++ b/drivers/isdn/hardware/mISDN/hfcpci.c
@@ -1755,7 +1755,7 @@ init_card(struct hfc_pci *hc)
1755 enable_hwirq(hc); 1755 enable_hwirq(hc);
1756 spin_unlock_irqrestore(&hc->lock, flags); 1756 spin_unlock_irqrestore(&hc->lock, flags);
1757 /* Timeout 80ms */ 1757 /* Timeout 80ms */
1758 current->state = TASK_UNINTERRUPTIBLE; 1758 set_current_state(TASK_UNINTERRUPTIBLE);
1759 schedule_timeout((80 * HZ) / 1000); 1759 schedule_timeout((80 * HZ) / 1000);
1760 printk(KERN_INFO "HFC PCI: IRQ %d count %d\n", 1760 printk(KERN_INFO "HFC PCI: IRQ %d count %d\n",
1761 hc->irq, hc->irqcnt); 1761 hc->irq, hc->irqcnt);
diff --git a/drivers/isdn/icn/icn.c b/drivers/isdn/icn/icn.c
index 6a7447c304ac..358a574d9e8b 100644
--- a/drivers/isdn/icn/icn.c
+++ b/drivers/isdn/icn/icn.c
@@ -1609,7 +1609,7 @@ icn_setup(char *line)
1609 if (ints[0] > 1) 1609 if (ints[0] > 1)
1610 membase = (unsigned long)ints[2]; 1610 membase = (unsigned long)ints[2];
1611 if (str && *str) { 1611 if (str && *str) {
1612 strcpy(sid, str); 1612 strlcpy(sid, str, sizeof(sid));
1613 icn_id = sid; 1613 icn_id = sid;
1614 if ((p = strchr(sid, ','))) { 1614 if ((p = strchr(sid, ','))) {
1615 *p++ = 0; 1615 *p++ = 0;
diff --git a/drivers/md/dm-crypt.c b/drivers/md/dm-crypt.c
index 08981be7baa1..713a96237a80 100644
--- a/drivers/md/dm-crypt.c
+++ b/drivers/md/dm-crypt.c
@@ -18,9 +18,11 @@
18#include <linux/slab.h> 18#include <linux/slab.h>
19#include <linux/crypto.h> 19#include <linux/crypto.h>
20#include <linux/workqueue.h> 20#include <linux/workqueue.h>
21#include <linux/kthread.h>
21#include <linux/backing-dev.h> 22#include <linux/backing-dev.h>
22#include <linux/atomic.h> 23#include <linux/atomic.h>
23#include <linux/scatterlist.h> 24#include <linux/scatterlist.h>
25#include <linux/rbtree.h>
24#include <asm/page.h> 26#include <asm/page.h>
25#include <asm/unaligned.h> 27#include <asm/unaligned.h>
26#include <crypto/hash.h> 28#include <crypto/hash.h>
@@ -58,7 +60,8 @@ struct dm_crypt_io {
58 atomic_t io_pending; 60 atomic_t io_pending;
59 int error; 61 int error;
60 sector_t sector; 62 sector_t sector;
61 struct dm_crypt_io *base_io; 63
64 struct rb_node rb_node;
62} CRYPTO_MINALIGN_ATTR; 65} CRYPTO_MINALIGN_ATTR;
63 66
64struct dm_crypt_request { 67struct dm_crypt_request {
@@ -108,7 +111,8 @@ struct iv_tcw_private {
108 * Crypt: maps a linear range of a block device 111 * Crypt: maps a linear range of a block device
109 * and encrypts / decrypts at the same time. 112 * and encrypts / decrypts at the same time.
110 */ 113 */
111enum flags { DM_CRYPT_SUSPENDED, DM_CRYPT_KEY_VALID }; 114enum flags { DM_CRYPT_SUSPENDED, DM_CRYPT_KEY_VALID,
115 DM_CRYPT_SAME_CPU, DM_CRYPT_NO_OFFLOAD };
112 116
113/* 117/*
114 * The fields in here must be read only after initialization. 118 * The fields in here must be read only after initialization.
@@ -121,14 +125,18 @@ struct crypt_config {
121 * pool for per bio private data, crypto requests and 125 * pool for per bio private data, crypto requests and
122 * encryption requeusts/buffer pages 126 * encryption requeusts/buffer pages
123 */ 127 */
124 mempool_t *io_pool;
125 mempool_t *req_pool; 128 mempool_t *req_pool;
126 mempool_t *page_pool; 129 mempool_t *page_pool;
127 struct bio_set *bs; 130 struct bio_set *bs;
131 struct mutex bio_alloc_lock;
128 132
129 struct workqueue_struct *io_queue; 133 struct workqueue_struct *io_queue;
130 struct workqueue_struct *crypt_queue; 134 struct workqueue_struct *crypt_queue;
131 135
136 struct task_struct *write_thread;
137 wait_queue_head_t write_thread_wait;
138 struct rb_root write_tree;
139
132 char *cipher; 140 char *cipher;
133 char *cipher_string; 141 char *cipher_string;
134 142
@@ -172,9 +180,6 @@ struct crypt_config {
172}; 180};
173 181
174#define MIN_IOS 16 182#define MIN_IOS 16
175#define MIN_POOL_PAGES 32
176
177static struct kmem_cache *_crypt_io_pool;
178 183
179static void clone_init(struct dm_crypt_io *, struct bio *); 184static void clone_init(struct dm_crypt_io *, struct bio *);
180static void kcryptd_queue_crypt(struct dm_crypt_io *io); 185static void kcryptd_queue_crypt(struct dm_crypt_io *io);
@@ -946,57 +951,70 @@ static int crypt_convert(struct crypt_config *cc,
946 return 0; 951 return 0;
947} 952}
948 953
954static void crypt_free_buffer_pages(struct crypt_config *cc, struct bio *clone);
955
949/* 956/*
950 * Generate a new unfragmented bio with the given size 957 * Generate a new unfragmented bio with the given size
951 * This should never violate the device limitations 958 * This should never violate the device limitations
952 * May return a smaller bio when running out of pages, indicated by 959 *
953 * *out_of_pages set to 1. 960 * This function may be called concurrently. If we allocate from the mempool
961 * concurrently, there is a possibility of deadlock. For example, if we have
962 * mempool of 256 pages, two processes, each wanting 256, pages allocate from
963 * the mempool concurrently, it may deadlock in a situation where both processes
964 * have allocated 128 pages and the mempool is exhausted.
965 *
966 * In order to avoid this scenario we allocate the pages under a mutex.
967 *
968 * In order to not degrade performance with excessive locking, we try
969 * non-blocking allocations without a mutex first but on failure we fallback
970 * to blocking allocations with a mutex.
954 */ 971 */
955static struct bio *crypt_alloc_buffer(struct dm_crypt_io *io, unsigned size, 972static struct bio *crypt_alloc_buffer(struct dm_crypt_io *io, unsigned size)
956 unsigned *out_of_pages)
957{ 973{
958 struct crypt_config *cc = io->cc; 974 struct crypt_config *cc = io->cc;
959 struct bio *clone; 975 struct bio *clone;
960 unsigned int nr_iovecs = (size + PAGE_SIZE - 1) >> PAGE_SHIFT; 976 unsigned int nr_iovecs = (size + PAGE_SIZE - 1) >> PAGE_SHIFT;
961 gfp_t gfp_mask = GFP_NOIO | __GFP_HIGHMEM; 977 gfp_t gfp_mask = GFP_NOWAIT | __GFP_HIGHMEM;
962 unsigned i, len; 978 unsigned i, len, remaining_size;
963 struct page *page; 979 struct page *page;
980 struct bio_vec *bvec;
981
982retry:
983 if (unlikely(gfp_mask & __GFP_WAIT))
984 mutex_lock(&cc->bio_alloc_lock);
964 985
965 clone = bio_alloc_bioset(GFP_NOIO, nr_iovecs, cc->bs); 986 clone = bio_alloc_bioset(GFP_NOIO, nr_iovecs, cc->bs);
966 if (!clone) 987 if (!clone)
967 return NULL; 988 goto return_clone;
968 989
969 clone_init(io, clone); 990 clone_init(io, clone);
970 *out_of_pages = 0; 991
992 remaining_size = size;
971 993
972 for (i = 0; i < nr_iovecs; i++) { 994 for (i = 0; i < nr_iovecs; i++) {
973 page = mempool_alloc(cc->page_pool, gfp_mask); 995 page = mempool_alloc(cc->page_pool, gfp_mask);
974 if (!page) { 996 if (!page) {
975 *out_of_pages = 1; 997 crypt_free_buffer_pages(cc, clone);
976 break; 998 bio_put(clone);
999 gfp_mask |= __GFP_WAIT;
1000 goto retry;
977 } 1001 }
978 1002
979 /* 1003 len = (remaining_size > PAGE_SIZE) ? PAGE_SIZE : remaining_size;
980 * If additional pages cannot be allocated without waiting,
981 * return a partially-allocated bio. The caller will then try
982 * to allocate more bios while submitting this partial bio.
983 */
984 gfp_mask = (gfp_mask | __GFP_NOWARN) & ~__GFP_WAIT;
985 1004
986 len = (size > PAGE_SIZE) ? PAGE_SIZE : size; 1005 bvec = &clone->bi_io_vec[clone->bi_vcnt++];
1006 bvec->bv_page = page;
1007 bvec->bv_len = len;
1008 bvec->bv_offset = 0;
987 1009
988 if (!bio_add_page(clone, page, len, 0)) { 1010 clone->bi_iter.bi_size += len;
989 mempool_free(page, cc->page_pool);
990 break;
991 }
992 1011
993 size -= len; 1012 remaining_size -= len;
994 } 1013 }
995 1014
996 if (!clone->bi_iter.bi_size) { 1015return_clone:
997 bio_put(clone); 1016 if (unlikely(gfp_mask & __GFP_WAIT))
998 return NULL; 1017 mutex_unlock(&cc->bio_alloc_lock);
999 }
1000 1018
1001 return clone; 1019 return clone;
1002} 1020}
@@ -1020,7 +1038,6 @@ static void crypt_io_init(struct dm_crypt_io *io, struct crypt_config *cc,
1020 io->base_bio = bio; 1038 io->base_bio = bio;
1021 io->sector = sector; 1039 io->sector = sector;
1022 io->error = 0; 1040 io->error = 0;
1023 io->base_io = NULL;
1024 io->ctx.req = NULL; 1041 io->ctx.req = NULL;
1025 atomic_set(&io->io_pending, 0); 1042 atomic_set(&io->io_pending, 0);
1026} 1043}
@@ -1033,13 +1050,11 @@ static void crypt_inc_pending(struct dm_crypt_io *io)
1033/* 1050/*
1034 * One of the bios was finished. Check for completion of 1051 * One of the bios was finished. Check for completion of
1035 * the whole request and correctly clean up the buffer. 1052 * the whole request and correctly clean up the buffer.
1036 * If base_io is set, wait for the last fragment to complete.
1037 */ 1053 */
1038static void crypt_dec_pending(struct dm_crypt_io *io) 1054static void crypt_dec_pending(struct dm_crypt_io *io)
1039{ 1055{
1040 struct crypt_config *cc = io->cc; 1056 struct crypt_config *cc = io->cc;
1041 struct bio *base_bio = io->base_bio; 1057 struct bio *base_bio = io->base_bio;
1042 struct dm_crypt_io *base_io = io->base_io;
1043 int error = io->error; 1058 int error = io->error;
1044 1059
1045 if (!atomic_dec_and_test(&io->io_pending)) 1060 if (!atomic_dec_and_test(&io->io_pending))
@@ -1047,16 +1062,8 @@ static void crypt_dec_pending(struct dm_crypt_io *io)
1047 1062
1048 if (io->ctx.req) 1063 if (io->ctx.req)
1049 crypt_free_req(cc, io->ctx.req, base_bio); 1064 crypt_free_req(cc, io->ctx.req, base_bio);
1050 if (io != dm_per_bio_data(base_bio, cc->per_bio_data_size)) 1065
1051 mempool_free(io, cc->io_pool); 1066 bio_endio(base_bio, error);
1052
1053 if (likely(!base_io))
1054 bio_endio(base_bio, error);
1055 else {
1056 if (error && !base_io->error)
1057 base_io->error = error;
1058 crypt_dec_pending(base_io);
1059 }
1060} 1067}
1061 1068
1062/* 1069/*
@@ -1138,37 +1145,97 @@ static int kcryptd_io_read(struct dm_crypt_io *io, gfp_t gfp)
1138 return 0; 1145 return 0;
1139} 1146}
1140 1147
1148static void kcryptd_io_read_work(struct work_struct *work)
1149{
1150 struct dm_crypt_io *io = container_of(work, struct dm_crypt_io, work);
1151
1152 crypt_inc_pending(io);
1153 if (kcryptd_io_read(io, GFP_NOIO))
1154 io->error = -ENOMEM;
1155 crypt_dec_pending(io);
1156}
1157
1158static void kcryptd_queue_read(struct dm_crypt_io *io)
1159{
1160 struct crypt_config *cc = io->cc;
1161
1162 INIT_WORK(&io->work, kcryptd_io_read_work);
1163 queue_work(cc->io_queue, &io->work);
1164}
1165
1141static void kcryptd_io_write(struct dm_crypt_io *io) 1166static void kcryptd_io_write(struct dm_crypt_io *io)
1142{ 1167{
1143 struct bio *clone = io->ctx.bio_out; 1168 struct bio *clone = io->ctx.bio_out;
1169
1144 generic_make_request(clone); 1170 generic_make_request(clone);
1145} 1171}
1146 1172
1147static void kcryptd_io(struct work_struct *work) 1173#define crypt_io_from_node(node) rb_entry((node), struct dm_crypt_io, rb_node)
1174
1175static int dmcrypt_write(void *data)
1148{ 1176{
1149 struct dm_crypt_io *io = container_of(work, struct dm_crypt_io, work); 1177 struct crypt_config *cc = data;
1178 struct dm_crypt_io *io;
1150 1179
1151 if (bio_data_dir(io->base_bio) == READ) { 1180 while (1) {
1152 crypt_inc_pending(io); 1181 struct rb_root write_tree;
1153 if (kcryptd_io_read(io, GFP_NOIO)) 1182 struct blk_plug plug;
1154 io->error = -ENOMEM;
1155 crypt_dec_pending(io);
1156 } else
1157 kcryptd_io_write(io);
1158}
1159 1183
1160static void kcryptd_queue_io(struct dm_crypt_io *io) 1184 DECLARE_WAITQUEUE(wait, current);
1161{
1162 struct crypt_config *cc = io->cc;
1163 1185
1164 INIT_WORK(&io->work, kcryptd_io); 1186 spin_lock_irq(&cc->write_thread_wait.lock);
1165 queue_work(cc->io_queue, &io->work); 1187continue_locked:
1188
1189 if (!RB_EMPTY_ROOT(&cc->write_tree))
1190 goto pop_from_list;
1191
1192 __set_current_state(TASK_INTERRUPTIBLE);
1193 __add_wait_queue(&cc->write_thread_wait, &wait);
1194
1195 spin_unlock_irq(&cc->write_thread_wait.lock);
1196
1197 if (unlikely(kthread_should_stop())) {
1198 set_task_state(current, TASK_RUNNING);
1199 remove_wait_queue(&cc->write_thread_wait, &wait);
1200 break;
1201 }
1202
1203 schedule();
1204
1205 set_task_state(current, TASK_RUNNING);
1206 spin_lock_irq(&cc->write_thread_wait.lock);
1207 __remove_wait_queue(&cc->write_thread_wait, &wait);
1208 goto continue_locked;
1209
1210pop_from_list:
1211 write_tree = cc->write_tree;
1212 cc->write_tree = RB_ROOT;
1213 spin_unlock_irq(&cc->write_thread_wait.lock);
1214
1215 BUG_ON(rb_parent(write_tree.rb_node));
1216
1217 /*
1218 * Note: we cannot walk the tree here with rb_next because
1219 * the structures may be freed when kcryptd_io_write is called.
1220 */
1221 blk_start_plug(&plug);
1222 do {
1223 io = crypt_io_from_node(rb_first(&write_tree));
1224 rb_erase(&io->rb_node, &write_tree);
1225 kcryptd_io_write(io);
1226 } while (!RB_EMPTY_ROOT(&write_tree));
1227 blk_finish_plug(&plug);
1228 }
1229 return 0;
1166} 1230}
1167 1231
1168static void kcryptd_crypt_write_io_submit(struct dm_crypt_io *io, int async) 1232static void kcryptd_crypt_write_io_submit(struct dm_crypt_io *io, int async)
1169{ 1233{
1170 struct bio *clone = io->ctx.bio_out; 1234 struct bio *clone = io->ctx.bio_out;
1171 struct crypt_config *cc = io->cc; 1235 struct crypt_config *cc = io->cc;
1236 unsigned long flags;
1237 sector_t sector;
1238 struct rb_node **rbp, *parent;
1172 1239
1173 if (unlikely(io->error < 0)) { 1240 if (unlikely(io->error < 0)) {
1174 crypt_free_buffer_pages(cc, clone); 1241 crypt_free_buffer_pages(cc, clone);
@@ -1182,20 +1249,34 @@ static void kcryptd_crypt_write_io_submit(struct dm_crypt_io *io, int async)
1182 1249
1183 clone->bi_iter.bi_sector = cc->start + io->sector; 1250 clone->bi_iter.bi_sector = cc->start + io->sector;
1184 1251
1185 if (async) 1252 if (likely(!async) && test_bit(DM_CRYPT_NO_OFFLOAD, &cc->flags)) {
1186 kcryptd_queue_io(io);
1187 else
1188 generic_make_request(clone); 1253 generic_make_request(clone);
1254 return;
1255 }
1256
1257 spin_lock_irqsave(&cc->write_thread_wait.lock, flags);
1258 rbp = &cc->write_tree.rb_node;
1259 parent = NULL;
1260 sector = io->sector;
1261 while (*rbp) {
1262 parent = *rbp;
1263 if (sector < crypt_io_from_node(parent)->sector)
1264 rbp = &(*rbp)->rb_left;
1265 else
1266 rbp = &(*rbp)->rb_right;
1267 }
1268 rb_link_node(&io->rb_node, parent, rbp);
1269 rb_insert_color(&io->rb_node, &cc->write_tree);
1270
1271 wake_up_locked(&cc->write_thread_wait);
1272 spin_unlock_irqrestore(&cc->write_thread_wait.lock, flags);
1189} 1273}
1190 1274
1191static void kcryptd_crypt_write_convert(struct dm_crypt_io *io) 1275static void kcryptd_crypt_write_convert(struct dm_crypt_io *io)
1192{ 1276{
1193 struct crypt_config *cc = io->cc; 1277 struct crypt_config *cc = io->cc;
1194 struct bio *clone; 1278 struct bio *clone;
1195 struct dm_crypt_io *new_io;
1196 int crypt_finished; 1279 int crypt_finished;
1197 unsigned out_of_pages = 0;
1198 unsigned remaining = io->base_bio->bi_iter.bi_size;
1199 sector_t sector = io->sector; 1280 sector_t sector = io->sector;
1200 int r; 1281 int r;
1201 1282
@@ -1205,80 +1286,30 @@ static void kcryptd_crypt_write_convert(struct dm_crypt_io *io)
1205 crypt_inc_pending(io); 1286 crypt_inc_pending(io);
1206 crypt_convert_init(cc, &io->ctx, NULL, io->base_bio, sector); 1287 crypt_convert_init(cc, &io->ctx, NULL, io->base_bio, sector);
1207 1288
1208 /* 1289 clone = crypt_alloc_buffer(io, io->base_bio->bi_iter.bi_size);
1209 * The allocated buffers can be smaller than the whole bio, 1290 if (unlikely(!clone)) {
1210 * so repeat the whole process until all the data can be handled. 1291 io->error = -EIO;
1211 */ 1292 goto dec;
1212 while (remaining) { 1293 }
1213 clone = crypt_alloc_buffer(io, remaining, &out_of_pages);
1214 if (unlikely(!clone)) {
1215 io->error = -ENOMEM;
1216 break;
1217 }
1218
1219 io->ctx.bio_out = clone;
1220 io->ctx.iter_out = clone->bi_iter;
1221
1222 remaining -= clone->bi_iter.bi_size;
1223 sector += bio_sectors(clone);
1224
1225 crypt_inc_pending(io);
1226
1227 r = crypt_convert(cc, &io->ctx);
1228 if (r < 0)
1229 io->error = -EIO;
1230
1231 crypt_finished = atomic_dec_and_test(&io->ctx.cc_pending);
1232
1233 /* Encryption was already finished, submit io now */
1234 if (crypt_finished) {
1235 kcryptd_crypt_write_io_submit(io, 0);
1236
1237 /*
1238 * If there was an error, do not try next fragments.
1239 * For async, error is processed in async handler.
1240 */
1241 if (unlikely(r < 0))
1242 break;
1243 1294
1244 io->sector = sector; 1295 io->ctx.bio_out = clone;
1245 } 1296 io->ctx.iter_out = clone->bi_iter;
1246 1297
1247 /* 1298 sector += bio_sectors(clone);
1248 * Out of memory -> run queues
1249 * But don't wait if split was due to the io size restriction
1250 */
1251 if (unlikely(out_of_pages))
1252 congestion_wait(BLK_RW_ASYNC, HZ/100);
1253 1299
1254 /* 1300 crypt_inc_pending(io);
1255 * With async crypto it is unsafe to share the crypto context 1301 r = crypt_convert(cc, &io->ctx);
1256 * between fragments, so switch to a new dm_crypt_io structure. 1302 if (r)
1257 */ 1303 io->error = -EIO;
1258 if (unlikely(!crypt_finished && remaining)) { 1304 crypt_finished = atomic_dec_and_test(&io->ctx.cc_pending);
1259 new_io = mempool_alloc(cc->io_pool, GFP_NOIO);
1260 crypt_io_init(new_io, io->cc, io->base_bio, sector);
1261 crypt_inc_pending(new_io);
1262 crypt_convert_init(cc, &new_io->ctx, NULL,
1263 io->base_bio, sector);
1264 new_io->ctx.iter_in = io->ctx.iter_in;
1265
1266 /*
1267 * Fragments after the first use the base_io
1268 * pending count.
1269 */
1270 if (!io->base_io)
1271 new_io->base_io = io;
1272 else {
1273 new_io->base_io = io->base_io;
1274 crypt_inc_pending(io->base_io);
1275 crypt_dec_pending(io);
1276 }
1277 1305
1278 io = new_io; 1306 /* Encryption was already finished, submit io now */
1279 } 1307 if (crypt_finished) {
1308 kcryptd_crypt_write_io_submit(io, 0);
1309 io->sector = sector;
1280 } 1310 }
1281 1311
1312dec:
1282 crypt_dec_pending(io); 1313 crypt_dec_pending(io);
1283} 1314}
1284 1315
@@ -1481,6 +1512,9 @@ static void crypt_dtr(struct dm_target *ti)
1481 if (!cc) 1512 if (!cc)
1482 return; 1513 return;
1483 1514
1515 if (cc->write_thread)
1516 kthread_stop(cc->write_thread);
1517
1484 if (cc->io_queue) 1518 if (cc->io_queue)
1485 destroy_workqueue(cc->io_queue); 1519 destroy_workqueue(cc->io_queue);
1486 if (cc->crypt_queue) 1520 if (cc->crypt_queue)
@@ -1495,8 +1529,6 @@ static void crypt_dtr(struct dm_target *ti)
1495 mempool_destroy(cc->page_pool); 1529 mempool_destroy(cc->page_pool);
1496 if (cc->req_pool) 1530 if (cc->req_pool)
1497 mempool_destroy(cc->req_pool); 1531 mempool_destroy(cc->req_pool);
1498 if (cc->io_pool)
1499 mempool_destroy(cc->io_pool);
1500 1532
1501 if (cc->iv_gen_ops && cc->iv_gen_ops->dtr) 1533 if (cc->iv_gen_ops && cc->iv_gen_ops->dtr)
1502 cc->iv_gen_ops->dtr(cc); 1534 cc->iv_gen_ops->dtr(cc);
@@ -1688,7 +1720,7 @@ static int crypt_ctr(struct dm_target *ti, unsigned int argc, char **argv)
1688 char dummy; 1720 char dummy;
1689 1721
1690 static struct dm_arg _args[] = { 1722 static struct dm_arg _args[] = {
1691 {0, 1, "Invalid number of feature args"}, 1723 {0, 3, "Invalid number of feature args"},
1692 }; 1724 };
1693 1725
1694 if (argc < 5) { 1726 if (argc < 5) {
@@ -1710,13 +1742,6 @@ static int crypt_ctr(struct dm_target *ti, unsigned int argc, char **argv)
1710 if (ret < 0) 1742 if (ret < 0)
1711 goto bad; 1743 goto bad;
1712 1744
1713 ret = -ENOMEM;
1714 cc->io_pool = mempool_create_slab_pool(MIN_IOS, _crypt_io_pool);
1715 if (!cc->io_pool) {
1716 ti->error = "Cannot allocate crypt io mempool";
1717 goto bad;
1718 }
1719
1720 cc->dmreq_start = sizeof(struct ablkcipher_request); 1745 cc->dmreq_start = sizeof(struct ablkcipher_request);
1721 cc->dmreq_start += crypto_ablkcipher_reqsize(any_tfm(cc)); 1746 cc->dmreq_start += crypto_ablkcipher_reqsize(any_tfm(cc));
1722 cc->dmreq_start = ALIGN(cc->dmreq_start, __alignof__(struct dm_crypt_request)); 1747 cc->dmreq_start = ALIGN(cc->dmreq_start, __alignof__(struct dm_crypt_request));
@@ -1734,6 +1759,7 @@ static int crypt_ctr(struct dm_target *ti, unsigned int argc, char **argv)
1734 iv_size_padding = crypto_ablkcipher_alignmask(any_tfm(cc)); 1759 iv_size_padding = crypto_ablkcipher_alignmask(any_tfm(cc));
1735 } 1760 }
1736 1761
1762 ret = -ENOMEM;
1737 cc->req_pool = mempool_create_kmalloc_pool(MIN_IOS, cc->dmreq_start + 1763 cc->req_pool = mempool_create_kmalloc_pool(MIN_IOS, cc->dmreq_start +
1738 sizeof(struct dm_crypt_request) + iv_size_padding + cc->iv_size); 1764 sizeof(struct dm_crypt_request) + iv_size_padding + cc->iv_size);
1739 if (!cc->req_pool) { 1765 if (!cc->req_pool) {
@@ -1746,7 +1772,7 @@ static int crypt_ctr(struct dm_target *ti, unsigned int argc, char **argv)
1746 sizeof(struct dm_crypt_request) + iv_size_padding + cc->iv_size, 1772 sizeof(struct dm_crypt_request) + iv_size_padding + cc->iv_size,
1747 ARCH_KMALLOC_MINALIGN); 1773 ARCH_KMALLOC_MINALIGN);
1748 1774
1749 cc->page_pool = mempool_create_page_pool(MIN_POOL_PAGES, 0); 1775 cc->page_pool = mempool_create_page_pool(BIO_MAX_PAGES, 0);
1750 if (!cc->page_pool) { 1776 if (!cc->page_pool) {
1751 ti->error = "Cannot allocate page mempool"; 1777 ti->error = "Cannot allocate page mempool";
1752 goto bad; 1778 goto bad;
@@ -1758,6 +1784,8 @@ static int crypt_ctr(struct dm_target *ti, unsigned int argc, char **argv)
1758 goto bad; 1784 goto bad;
1759 } 1785 }
1760 1786
1787 mutex_init(&cc->bio_alloc_lock);
1788
1761 ret = -EINVAL; 1789 ret = -EINVAL;
1762 if (sscanf(argv[2], "%llu%c", &tmpll, &dummy) != 1) { 1790 if (sscanf(argv[2], "%llu%c", &tmpll, &dummy) != 1) {
1763 ti->error = "Invalid iv_offset sector"; 1791 ti->error = "Invalid iv_offset sector";
@@ -1788,15 +1816,26 @@ static int crypt_ctr(struct dm_target *ti, unsigned int argc, char **argv)
1788 if (ret) 1816 if (ret)
1789 goto bad; 1817 goto bad;
1790 1818
1791 opt_string = dm_shift_arg(&as); 1819 while (opt_params--) {
1820 opt_string = dm_shift_arg(&as);
1821 if (!opt_string) {
1822 ti->error = "Not enough feature arguments";
1823 goto bad;
1824 }
1792 1825
1793 if (opt_params == 1 && opt_string && 1826 if (!strcasecmp(opt_string, "allow_discards"))
1794 !strcasecmp(opt_string, "allow_discards")) 1827 ti->num_discard_bios = 1;
1795 ti->num_discard_bios = 1; 1828
1796 else if (opt_params) { 1829 else if (!strcasecmp(opt_string, "same_cpu_crypt"))
1797 ret = -EINVAL; 1830 set_bit(DM_CRYPT_SAME_CPU, &cc->flags);
1798 ti->error = "Invalid feature arguments"; 1831
1799 goto bad; 1832 else if (!strcasecmp(opt_string, "submit_from_crypt_cpus"))
1833 set_bit(DM_CRYPT_NO_OFFLOAD, &cc->flags);
1834
1835 else {
1836 ti->error = "Invalid feature arguments";
1837 goto bad;
1838 }
1800 } 1839 }
1801 } 1840 }
1802 1841
@@ -1807,13 +1846,28 @@ static int crypt_ctr(struct dm_target *ti, unsigned int argc, char **argv)
1807 goto bad; 1846 goto bad;
1808 } 1847 }
1809 1848
1810 cc->crypt_queue = alloc_workqueue("kcryptd", 1849 if (test_bit(DM_CRYPT_SAME_CPU, &cc->flags))
1811 WQ_CPU_INTENSIVE | WQ_MEM_RECLAIM, 1); 1850 cc->crypt_queue = alloc_workqueue("kcryptd", WQ_CPU_INTENSIVE | WQ_MEM_RECLAIM, 1);
1851 else
1852 cc->crypt_queue = alloc_workqueue("kcryptd", WQ_CPU_INTENSIVE | WQ_MEM_RECLAIM | WQ_UNBOUND,
1853 num_online_cpus());
1812 if (!cc->crypt_queue) { 1854 if (!cc->crypt_queue) {
1813 ti->error = "Couldn't create kcryptd queue"; 1855 ti->error = "Couldn't create kcryptd queue";
1814 goto bad; 1856 goto bad;
1815 } 1857 }
1816 1858
1859 init_waitqueue_head(&cc->write_thread_wait);
1860 cc->write_tree = RB_ROOT;
1861
1862 cc->write_thread = kthread_create(dmcrypt_write, cc, "dmcrypt_write");
1863 if (IS_ERR(cc->write_thread)) {
1864 ret = PTR_ERR(cc->write_thread);
1865 cc->write_thread = NULL;
1866 ti->error = "Couldn't spawn write thread";
1867 goto bad;
1868 }
1869 wake_up_process(cc->write_thread);
1870
1817 ti->num_flush_bios = 1; 1871 ti->num_flush_bios = 1;
1818 ti->discard_zeroes_data_unsupported = true; 1872 ti->discard_zeroes_data_unsupported = true;
1819 1873
@@ -1848,7 +1902,7 @@ static int crypt_map(struct dm_target *ti, struct bio *bio)
1848 1902
1849 if (bio_data_dir(io->base_bio) == READ) { 1903 if (bio_data_dir(io->base_bio) == READ) {
1850 if (kcryptd_io_read(io, GFP_NOWAIT)) 1904 if (kcryptd_io_read(io, GFP_NOWAIT))
1851 kcryptd_queue_io(io); 1905 kcryptd_queue_read(io);
1852 } else 1906 } else
1853 kcryptd_queue_crypt(io); 1907 kcryptd_queue_crypt(io);
1854 1908
@@ -1860,6 +1914,7 @@ static void crypt_status(struct dm_target *ti, status_type_t type,
1860{ 1914{
1861 struct crypt_config *cc = ti->private; 1915 struct crypt_config *cc = ti->private;
1862 unsigned i, sz = 0; 1916 unsigned i, sz = 0;
1917 int num_feature_args = 0;
1863 1918
1864 switch (type) { 1919 switch (type) {
1865 case STATUSTYPE_INFO: 1920 case STATUSTYPE_INFO:
@@ -1878,8 +1933,18 @@ static void crypt_status(struct dm_target *ti, status_type_t type,
1878 DMEMIT(" %llu %s %llu", (unsigned long long)cc->iv_offset, 1933 DMEMIT(" %llu %s %llu", (unsigned long long)cc->iv_offset,
1879 cc->dev->name, (unsigned long long)cc->start); 1934 cc->dev->name, (unsigned long long)cc->start);
1880 1935
1881 if (ti->num_discard_bios) 1936 num_feature_args += !!ti->num_discard_bios;
1882 DMEMIT(" 1 allow_discards"); 1937 num_feature_args += test_bit(DM_CRYPT_SAME_CPU, &cc->flags);
1938 num_feature_args += test_bit(DM_CRYPT_NO_OFFLOAD, &cc->flags);
1939 if (num_feature_args) {
1940 DMEMIT(" %d", num_feature_args);
1941 if (ti->num_discard_bios)
1942 DMEMIT(" allow_discards");
1943 if (test_bit(DM_CRYPT_SAME_CPU, &cc->flags))
1944 DMEMIT(" same_cpu_crypt");
1945 if (test_bit(DM_CRYPT_NO_OFFLOAD, &cc->flags))
1946 DMEMIT(" submit_from_crypt_cpus");
1947 }
1883 1948
1884 break; 1949 break;
1885 } 1950 }
@@ -1976,7 +2041,7 @@ static int crypt_iterate_devices(struct dm_target *ti,
1976 2041
1977static struct target_type crypt_target = { 2042static struct target_type crypt_target = {
1978 .name = "crypt", 2043 .name = "crypt",
1979 .version = {1, 13, 0}, 2044 .version = {1, 14, 0},
1980 .module = THIS_MODULE, 2045 .module = THIS_MODULE,
1981 .ctr = crypt_ctr, 2046 .ctr = crypt_ctr,
1982 .dtr = crypt_dtr, 2047 .dtr = crypt_dtr,
@@ -1994,15 +2059,9 @@ static int __init dm_crypt_init(void)
1994{ 2059{
1995 int r; 2060 int r;
1996 2061
1997 _crypt_io_pool = KMEM_CACHE(dm_crypt_io, 0);
1998 if (!_crypt_io_pool)
1999 return -ENOMEM;
2000
2001 r = dm_register_target(&crypt_target); 2062 r = dm_register_target(&crypt_target);
2002 if (r < 0) { 2063 if (r < 0)
2003 DMERR("register failed %d", r); 2064 DMERR("register failed %d", r);
2004 kmem_cache_destroy(_crypt_io_pool);
2005 }
2006 2065
2007 return r; 2066 return r;
2008} 2067}
@@ -2010,7 +2069,6 @@ static int __init dm_crypt_init(void)
2010static void __exit dm_crypt_exit(void) 2069static void __exit dm_crypt_exit(void)
2011{ 2070{
2012 dm_unregister_target(&crypt_target); 2071 dm_unregister_target(&crypt_target);
2013 kmem_cache_destroy(_crypt_io_pool);
2014} 2072}
2015 2073
2016module_init(dm_crypt_init); 2074module_init(dm_crypt_init);
diff --git a/drivers/md/dm-io.c b/drivers/md/dm-io.c
index c09359db3a90..74adcd2c967e 100644
--- a/drivers/md/dm-io.c
+++ b/drivers/md/dm-io.c
@@ -289,6 +289,19 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
289 struct request_queue *q = bdev_get_queue(where->bdev); 289 struct request_queue *q = bdev_get_queue(where->bdev);
290 unsigned short logical_block_size = queue_logical_block_size(q); 290 unsigned short logical_block_size = queue_logical_block_size(q);
291 sector_t num_sectors; 291 sector_t num_sectors;
292 unsigned int uninitialized_var(special_cmd_max_sectors);
293
294 /*
295 * Reject unsupported discard and write same requests.
296 */
297 if (rw & REQ_DISCARD)
298 special_cmd_max_sectors = q->limits.max_discard_sectors;
299 else if (rw & REQ_WRITE_SAME)
300 special_cmd_max_sectors = q->limits.max_write_same_sectors;
301 if ((rw & (REQ_DISCARD | REQ_WRITE_SAME)) && special_cmd_max_sectors == 0) {
302 dec_count(io, region, -EOPNOTSUPP);
303 return;
304 }
292 305
293 /* 306 /*
294 * where->count may be zero if rw holds a flush and we need to 307 * where->count may be zero if rw holds a flush and we need to
@@ -311,7 +324,7 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
311 store_io_and_region_in_bio(bio, io, region); 324 store_io_and_region_in_bio(bio, io, region);
312 325
313 if (rw & REQ_DISCARD) { 326 if (rw & REQ_DISCARD) {
314 num_sectors = min_t(sector_t, q->limits.max_discard_sectors, remaining); 327 num_sectors = min_t(sector_t, special_cmd_max_sectors, remaining);
315 bio->bi_iter.bi_size = num_sectors << SECTOR_SHIFT; 328 bio->bi_iter.bi_size = num_sectors << SECTOR_SHIFT;
316 remaining -= num_sectors; 329 remaining -= num_sectors;
317 } else if (rw & REQ_WRITE_SAME) { 330 } else if (rw & REQ_WRITE_SAME) {
@@ -320,7 +333,7 @@ static void do_region(int rw, unsigned region, struct dm_io_region *where,
320 */ 333 */
321 dp->get_page(dp, &page, &len, &offset); 334 dp->get_page(dp, &page, &len, &offset);
322 bio_add_page(bio, page, logical_block_size, offset); 335 bio_add_page(bio, page, logical_block_size, offset);
323 num_sectors = min_t(sector_t, q->limits.max_write_same_sectors, remaining); 336 num_sectors = min_t(sector_t, special_cmd_max_sectors, remaining);
324 bio->bi_iter.bi_size = num_sectors << SECTOR_SHIFT; 337 bio->bi_iter.bi_size = num_sectors << SECTOR_SHIFT;
325 338
326 offset = 0; 339 offset = 0;
diff --git a/drivers/md/dm-raid1.c b/drivers/md/dm-raid1.c
index 7dfdb5c746d6..089d62751f7f 100644
--- a/drivers/md/dm-raid1.c
+++ b/drivers/md/dm-raid1.c
@@ -604,6 +604,15 @@ static void write_callback(unsigned long error, void *context)
604 return; 604 return;
605 } 605 }
606 606
607 /*
608 * If the bio is discard, return an error, but do not
609 * degrade the array.
610 */
611 if (bio->bi_rw & REQ_DISCARD) {
612 bio_endio(bio, -EOPNOTSUPP);
613 return;
614 }
615
607 for (i = 0; i < ms->nr_mirrors; i++) 616 for (i = 0; i < ms->nr_mirrors; i++)
608 if (test_bit(i, &error)) 617 if (test_bit(i, &error))
609 fail_mirror(ms->mirror + i, DM_RAID1_WRITE_ERROR); 618 fail_mirror(ms->mirror + i, DM_RAID1_WRITE_ERROR);
diff --git a/drivers/md/dm-snap.c b/drivers/md/dm-snap.c
index 864b03f47727..f83a0f3fc365 100644
--- a/drivers/md/dm-snap.c
+++ b/drivers/md/dm-snap.c
@@ -20,6 +20,8 @@
20#include <linux/log2.h> 20#include <linux/log2.h>
21#include <linux/dm-kcopyd.h> 21#include <linux/dm-kcopyd.h>
22 22
23#include "dm.h"
24
23#include "dm-exception-store.h" 25#include "dm-exception-store.h"
24 26
25#define DM_MSG_PREFIX "snapshots" 27#define DM_MSG_PREFIX "snapshots"
@@ -291,12 +293,23 @@ struct origin {
291}; 293};
292 294
293/* 295/*
296 * This structure is allocated for each origin target
297 */
298struct dm_origin {
299 struct dm_dev *dev;
300 struct dm_target *ti;
301 unsigned split_boundary;
302 struct list_head hash_list;
303};
304
305/*
294 * Size of the hash table for origin volumes. If we make this 306 * Size of the hash table for origin volumes. If we make this
295 * the size of the minors list then it should be nearly perfect 307 * the size of the minors list then it should be nearly perfect
296 */ 308 */
297#define ORIGIN_HASH_SIZE 256 309#define ORIGIN_HASH_SIZE 256
298#define ORIGIN_MASK 0xFF 310#define ORIGIN_MASK 0xFF
299static struct list_head *_origins; 311static struct list_head *_origins;
312static struct list_head *_dm_origins;
300static struct rw_semaphore _origins_lock; 313static struct rw_semaphore _origins_lock;
301 314
302static DECLARE_WAIT_QUEUE_HEAD(_pending_exceptions_done); 315static DECLARE_WAIT_QUEUE_HEAD(_pending_exceptions_done);
@@ -310,12 +323,22 @@ static int init_origin_hash(void)
310 _origins = kmalloc(ORIGIN_HASH_SIZE * sizeof(struct list_head), 323 _origins = kmalloc(ORIGIN_HASH_SIZE * sizeof(struct list_head),
311 GFP_KERNEL); 324 GFP_KERNEL);
312 if (!_origins) { 325 if (!_origins) {
313 DMERR("unable to allocate memory"); 326 DMERR("unable to allocate memory for _origins");
314 return -ENOMEM; 327 return -ENOMEM;
315 } 328 }
316
317 for (i = 0; i < ORIGIN_HASH_SIZE; i++) 329 for (i = 0; i < ORIGIN_HASH_SIZE; i++)
318 INIT_LIST_HEAD(_origins + i); 330 INIT_LIST_HEAD(_origins + i);
331
332 _dm_origins = kmalloc(ORIGIN_HASH_SIZE * sizeof(struct list_head),
333 GFP_KERNEL);
334 if (!_dm_origins) {
335 DMERR("unable to allocate memory for _dm_origins");
336 kfree(_origins);
337 return -ENOMEM;
338 }
339 for (i = 0; i < ORIGIN_HASH_SIZE; i++)
340 INIT_LIST_HEAD(_dm_origins + i);
341
319 init_rwsem(&_origins_lock); 342 init_rwsem(&_origins_lock);
320 343
321 return 0; 344 return 0;
@@ -324,6 +347,7 @@ static int init_origin_hash(void)
324static void exit_origin_hash(void) 347static void exit_origin_hash(void)
325{ 348{
326 kfree(_origins); 349 kfree(_origins);
350 kfree(_dm_origins);
327} 351}
328 352
329static unsigned origin_hash(struct block_device *bdev) 353static unsigned origin_hash(struct block_device *bdev)
@@ -350,6 +374,30 @@ static void __insert_origin(struct origin *o)
350 list_add_tail(&o->hash_list, sl); 374 list_add_tail(&o->hash_list, sl);
351} 375}
352 376
377static struct dm_origin *__lookup_dm_origin(struct block_device *origin)
378{
379 struct list_head *ol;
380 struct dm_origin *o;
381
382 ol = &_dm_origins[origin_hash(origin)];
383 list_for_each_entry (o, ol, hash_list)
384 if (bdev_equal(o->dev->bdev, origin))
385 return o;
386
387 return NULL;
388}
389
390static void __insert_dm_origin(struct dm_origin *o)
391{
392 struct list_head *sl = &_dm_origins[origin_hash(o->dev->bdev)];
393 list_add_tail(&o->hash_list, sl);
394}
395
396static void __remove_dm_origin(struct dm_origin *o)
397{
398 list_del(&o->hash_list);
399}
400
353/* 401/*
354 * _origins_lock must be held when calling this function. 402 * _origins_lock must be held when calling this function.
355 * Returns number of snapshots registered using the supplied cow device, plus: 403 * Returns number of snapshots registered using the supplied cow device, plus:
@@ -1432,8 +1480,6 @@ out:
1432 full_bio->bi_private = pe->full_bio_private; 1480 full_bio->bi_private = pe->full_bio_private;
1433 atomic_inc(&full_bio->bi_remaining); 1481 atomic_inc(&full_bio->bi_remaining);
1434 } 1482 }
1435 free_pending_exception(pe);
1436
1437 increment_pending_exceptions_done_count(); 1483 increment_pending_exceptions_done_count();
1438 1484
1439 up_write(&s->lock); 1485 up_write(&s->lock);
@@ -1450,6 +1496,8 @@ out:
1450 } 1496 }
1451 1497
1452 retry_origin_bios(s, origin_bios); 1498 retry_origin_bios(s, origin_bios);
1499
1500 free_pending_exception(pe);
1453} 1501}
1454 1502
1455static void commit_callback(void *context, int success) 1503static void commit_callback(void *context, int success)
@@ -1840,9 +1888,40 @@ static int snapshot_preresume(struct dm_target *ti)
1840static void snapshot_resume(struct dm_target *ti) 1888static void snapshot_resume(struct dm_target *ti)
1841{ 1889{
1842 struct dm_snapshot *s = ti->private; 1890 struct dm_snapshot *s = ti->private;
1843 struct dm_snapshot *snap_src = NULL, *snap_dest = NULL; 1891 struct dm_snapshot *snap_src = NULL, *snap_dest = NULL, *snap_merging = NULL;
1892 struct dm_origin *o;
1893 struct mapped_device *origin_md = NULL;
1894 bool must_restart_merging = false;
1895
1896 down_read(&_origins_lock);
1897
1898 o = __lookup_dm_origin(s->origin->bdev);
1899 if (o)
1900 origin_md = dm_table_get_md(o->ti->table);
1901 if (!origin_md) {
1902 (void) __find_snapshots_sharing_cow(s, NULL, NULL, &snap_merging);
1903 if (snap_merging)
1904 origin_md = dm_table_get_md(snap_merging->ti->table);
1905 }
1906 if (origin_md == dm_table_get_md(ti->table))
1907 origin_md = NULL;
1908 if (origin_md) {
1909 if (dm_hold(origin_md))
1910 origin_md = NULL;
1911 }
1912
1913 up_read(&_origins_lock);
1914
1915 if (origin_md) {
1916 dm_internal_suspend_fast(origin_md);
1917 if (snap_merging && test_bit(RUNNING_MERGE, &snap_merging->state_bits)) {
1918 must_restart_merging = true;
1919 stop_merge(snap_merging);
1920 }
1921 }
1844 1922
1845 down_read(&_origins_lock); 1923 down_read(&_origins_lock);
1924
1846 (void) __find_snapshots_sharing_cow(s, &snap_src, &snap_dest, NULL); 1925 (void) __find_snapshots_sharing_cow(s, &snap_src, &snap_dest, NULL);
1847 if (snap_src && snap_dest) { 1926 if (snap_src && snap_dest) {
1848 down_write(&snap_src->lock); 1927 down_write(&snap_src->lock);
@@ -1851,8 +1930,16 @@ static void snapshot_resume(struct dm_target *ti)
1851 up_write(&snap_dest->lock); 1930 up_write(&snap_dest->lock);
1852 up_write(&snap_src->lock); 1931 up_write(&snap_src->lock);
1853 } 1932 }
1933
1854 up_read(&_origins_lock); 1934 up_read(&_origins_lock);
1855 1935
1936 if (origin_md) {
1937 if (must_restart_merging)
1938 start_merge(snap_merging);
1939 dm_internal_resume_fast(origin_md);
1940 dm_put(origin_md);
1941 }
1942
1856 /* Now we have correct chunk size, reregister */ 1943 /* Now we have correct chunk size, reregister */
1857 reregister_snapshot(s); 1944 reregister_snapshot(s);
1858 1945
@@ -2133,11 +2220,6 @@ static int origin_write_extent(struct dm_snapshot *merging_snap,
2133 * Origin: maps a linear range of a device, with hooks for snapshotting. 2220 * Origin: maps a linear range of a device, with hooks for snapshotting.
2134 */ 2221 */
2135 2222
2136struct dm_origin {
2137 struct dm_dev *dev;
2138 unsigned split_boundary;
2139};
2140
2141/* 2223/*
2142 * Construct an origin mapping: <dev_path> 2224 * Construct an origin mapping: <dev_path>
2143 * The context for an origin is merely a 'struct dm_dev *' 2225 * The context for an origin is merely a 'struct dm_dev *'
@@ -2166,6 +2248,7 @@ static int origin_ctr(struct dm_target *ti, unsigned int argc, char **argv)
2166 goto bad_open; 2248 goto bad_open;
2167 } 2249 }
2168 2250
2251 o->ti = ti;
2169 ti->private = o; 2252 ti->private = o;
2170 ti->num_flush_bios = 1; 2253 ti->num_flush_bios = 1;
2171 2254
@@ -2180,6 +2263,7 @@ bad_alloc:
2180static void origin_dtr(struct dm_target *ti) 2263static void origin_dtr(struct dm_target *ti)
2181{ 2264{
2182 struct dm_origin *o = ti->private; 2265 struct dm_origin *o = ti->private;
2266
2183 dm_put_device(ti, o->dev); 2267 dm_put_device(ti, o->dev);
2184 kfree(o); 2268 kfree(o);
2185} 2269}
@@ -2216,6 +2300,19 @@ static void origin_resume(struct dm_target *ti)
2216 struct dm_origin *o = ti->private; 2300 struct dm_origin *o = ti->private;
2217 2301
2218 o->split_boundary = get_origin_minimum_chunksize(o->dev->bdev); 2302 o->split_boundary = get_origin_minimum_chunksize(o->dev->bdev);
2303
2304 down_write(&_origins_lock);
2305 __insert_dm_origin(o);
2306 up_write(&_origins_lock);
2307}
2308
2309static void origin_postsuspend(struct dm_target *ti)
2310{
2311 struct dm_origin *o = ti->private;
2312
2313 down_write(&_origins_lock);
2314 __remove_dm_origin(o);
2315 up_write(&_origins_lock);
2219} 2316}
2220 2317
2221static void origin_status(struct dm_target *ti, status_type_t type, 2318static void origin_status(struct dm_target *ti, status_type_t type,
@@ -2258,12 +2355,13 @@ static int origin_iterate_devices(struct dm_target *ti,
2258 2355
2259static struct target_type origin_target = { 2356static struct target_type origin_target = {
2260 .name = "snapshot-origin", 2357 .name = "snapshot-origin",
2261 .version = {1, 8, 1}, 2358 .version = {1, 9, 0},
2262 .module = THIS_MODULE, 2359 .module = THIS_MODULE,
2263 .ctr = origin_ctr, 2360 .ctr = origin_ctr,
2264 .dtr = origin_dtr, 2361 .dtr = origin_dtr,
2265 .map = origin_map, 2362 .map = origin_map,
2266 .resume = origin_resume, 2363 .resume = origin_resume,
2364 .postsuspend = origin_postsuspend,
2267 .status = origin_status, 2365 .status = origin_status,
2268 .merge = origin_merge, 2366 .merge = origin_merge,
2269 .iterate_devices = origin_iterate_devices, 2367 .iterate_devices = origin_iterate_devices,
@@ -2271,7 +2369,7 @@ static struct target_type origin_target = {
2271 2369
2272static struct target_type snapshot_target = { 2370static struct target_type snapshot_target = {
2273 .name = "snapshot", 2371 .name = "snapshot",
2274 .version = {1, 12, 0}, 2372 .version = {1, 13, 0},
2275 .module = THIS_MODULE, 2373 .module = THIS_MODULE,
2276 .ctr = snapshot_ctr, 2374 .ctr = snapshot_ctr,
2277 .dtr = snapshot_dtr, 2375 .dtr = snapshot_dtr,
@@ -2285,7 +2383,7 @@ static struct target_type snapshot_target = {
2285 2383
2286static struct target_type merge_target = { 2384static struct target_type merge_target = {
2287 .name = dm_snapshot_merge_target_name, 2385 .name = dm_snapshot_merge_target_name,
2288 .version = {1, 2, 0}, 2386 .version = {1, 3, 0},
2289 .module = THIS_MODULE, 2387 .module = THIS_MODULE,
2290 .ctr = snapshot_ctr, 2388 .ctr = snapshot_ctr,
2291 .dtr = snapshot_dtr, 2389 .dtr = snapshot_dtr,
diff --git a/drivers/md/dm-thin.c b/drivers/md/dm-thin.c
index 654773cb1eee..921aafd12aee 100644
--- a/drivers/md/dm-thin.c
+++ b/drivers/md/dm-thin.c
@@ -2358,17 +2358,6 @@ static int thin_bio_map(struct dm_target *ti, struct bio *bio)
2358 return DM_MAPIO_REMAPPED; 2358 return DM_MAPIO_REMAPPED;
2359 2359
2360 case -ENODATA: 2360 case -ENODATA:
2361 if (get_pool_mode(tc->pool) == PM_READ_ONLY) {
2362 /*
2363 * This block isn't provisioned, and we have no way
2364 * of doing so.
2365 */
2366 handle_unserviceable_bio(tc->pool, bio);
2367 cell_defer_no_holder(tc, virt_cell);
2368 return DM_MAPIO_SUBMITTED;
2369 }
2370 /* fall through */
2371
2372 case -EWOULDBLOCK: 2361 case -EWOULDBLOCK:
2373 thin_defer_cell(tc, virt_cell); 2362 thin_defer_cell(tc, virt_cell);
2374 return DM_MAPIO_SUBMITTED; 2363 return DM_MAPIO_SUBMITTED;
diff --git a/drivers/md/dm.c b/drivers/md/dm.c
index ec1444f49de1..9b641b38b857 100644
--- a/drivers/md/dm.c
+++ b/drivers/md/dm.c
@@ -2571,7 +2571,7 @@ int dm_setup_md_queue(struct mapped_device *md)
2571 return 0; 2571 return 0;
2572} 2572}
2573 2573
2574static struct mapped_device *dm_find_md(dev_t dev) 2574struct mapped_device *dm_get_md(dev_t dev)
2575{ 2575{
2576 struct mapped_device *md; 2576 struct mapped_device *md;
2577 unsigned minor = MINOR(dev); 2577 unsigned minor = MINOR(dev);
@@ -2582,12 +2582,15 @@ static struct mapped_device *dm_find_md(dev_t dev)
2582 spin_lock(&_minor_lock); 2582 spin_lock(&_minor_lock);
2583 2583
2584 md = idr_find(&_minor_idr, minor); 2584 md = idr_find(&_minor_idr, minor);
2585 if (md && (md == MINOR_ALLOCED || 2585 if (md) {
2586 (MINOR(disk_devt(dm_disk(md))) != minor) || 2586 if ((md == MINOR_ALLOCED ||
2587 dm_deleting_md(md) || 2587 (MINOR(disk_devt(dm_disk(md))) != minor) ||
2588 test_bit(DMF_FREEING, &md->flags))) { 2588 dm_deleting_md(md) ||
2589 md = NULL; 2589 test_bit(DMF_FREEING, &md->flags))) {
2590 goto out; 2590 md = NULL;
2591 goto out;
2592 }
2593 dm_get(md);
2591 } 2594 }
2592 2595
2593out: 2596out:
@@ -2595,16 +2598,6 @@ out:
2595 2598
2596 return md; 2599 return md;
2597} 2600}
2598
2599struct mapped_device *dm_get_md(dev_t dev)
2600{
2601 struct mapped_device *md = dm_find_md(dev);
2602
2603 if (md)
2604 dm_get(md);
2605
2606 return md;
2607}
2608EXPORT_SYMBOL_GPL(dm_get_md); 2601EXPORT_SYMBOL_GPL(dm_get_md);
2609 2602
2610void *dm_get_mdptr(struct mapped_device *md) 2603void *dm_get_mdptr(struct mapped_device *md)
@@ -2623,6 +2616,19 @@ void dm_get(struct mapped_device *md)
2623 BUG_ON(test_bit(DMF_FREEING, &md->flags)); 2616 BUG_ON(test_bit(DMF_FREEING, &md->flags));
2624} 2617}
2625 2618
2619int dm_hold(struct mapped_device *md)
2620{
2621 spin_lock(&_minor_lock);
2622 if (test_bit(DMF_FREEING, &md->flags)) {
2623 spin_unlock(&_minor_lock);
2624 return -EBUSY;
2625 }
2626 dm_get(md);
2627 spin_unlock(&_minor_lock);
2628 return 0;
2629}
2630EXPORT_SYMBOL_GPL(dm_hold);
2631
2626const char *dm_device_name(struct mapped_device *md) 2632const char *dm_device_name(struct mapped_device *md)
2627{ 2633{
2628 return md->name; 2634 return md->name;
@@ -2645,10 +2651,16 @@ static void __dm_destroy(struct mapped_device *md, bool wait)
2645 if (dm_request_based(md)) 2651 if (dm_request_based(md))
2646 flush_kthread_worker(&md->kworker); 2652 flush_kthread_worker(&md->kworker);
2647 2653
2654 /*
2655 * Take suspend_lock so that presuspend and postsuspend methods
2656 * do not race with internal suspend.
2657 */
2658 mutex_lock(&md->suspend_lock);
2648 if (!dm_suspended_md(md)) { 2659 if (!dm_suspended_md(md)) {
2649 dm_table_presuspend_targets(map); 2660 dm_table_presuspend_targets(map);
2650 dm_table_postsuspend_targets(map); 2661 dm_table_postsuspend_targets(map);
2651 } 2662 }
2663 mutex_unlock(&md->suspend_lock);
2652 2664
2653 /* dm_put_live_table must be before msleep, otherwise deadlock is possible */ 2665 /* dm_put_live_table must be before msleep, otherwise deadlock is possible */
2654 dm_put_live_table(md, srcu_idx); 2666 dm_put_live_table(md, srcu_idx);
@@ -3122,6 +3134,7 @@ void dm_internal_suspend_fast(struct mapped_device *md)
3122 flush_workqueue(md->wq); 3134 flush_workqueue(md->wq);
3123 dm_wait_for_completion(md, TASK_UNINTERRUPTIBLE); 3135 dm_wait_for_completion(md, TASK_UNINTERRUPTIBLE);
3124} 3136}
3137EXPORT_SYMBOL_GPL(dm_internal_suspend_fast);
3125 3138
3126void dm_internal_resume_fast(struct mapped_device *md) 3139void dm_internal_resume_fast(struct mapped_device *md)
3127{ 3140{
@@ -3133,6 +3146,7 @@ void dm_internal_resume_fast(struct mapped_device *md)
3133done: 3146done:
3134 mutex_unlock(&md->suspend_lock); 3147 mutex_unlock(&md->suspend_lock);
3135} 3148}
3149EXPORT_SYMBOL_GPL(dm_internal_resume_fast);
3136 3150
3137/*----------------------------------------------------------------- 3151/*-----------------------------------------------------------------
3138 * Event notification. 3152 * Event notification.
diff --git a/drivers/md/md.c b/drivers/md/md.c
index c8d2bac4e28b..717daad71fb1 100644
--- a/drivers/md/md.c
+++ b/drivers/md/md.c
@@ -2555,7 +2555,7 @@ state_store(struct md_rdev *rdev, const char *buf, size_t len)
2555 return err ? err : len; 2555 return err ? err : len;
2556} 2556}
2557static struct rdev_sysfs_entry rdev_state = 2557static struct rdev_sysfs_entry rdev_state =
2558__ATTR(state, S_IRUGO|S_IWUSR, state_show, state_store); 2558__ATTR_PREALLOC(state, S_IRUGO|S_IWUSR, state_show, state_store);
2559 2559
2560static ssize_t 2560static ssize_t
2561errors_show(struct md_rdev *rdev, char *page) 2561errors_show(struct md_rdev *rdev, char *page)
@@ -3638,7 +3638,8 @@ resync_start_store(struct mddev *mddev, const char *buf, size_t len)
3638 return err ?: len; 3638 return err ?: len;
3639} 3639}
3640static struct md_sysfs_entry md_resync_start = 3640static struct md_sysfs_entry md_resync_start =
3641__ATTR(resync_start, S_IRUGO|S_IWUSR, resync_start_show, resync_start_store); 3641__ATTR_PREALLOC(resync_start, S_IRUGO|S_IWUSR,
3642 resync_start_show, resync_start_store);
3642 3643
3643/* 3644/*
3644 * The array state can be: 3645 * The array state can be:
@@ -3851,7 +3852,7 @@ array_state_store(struct mddev *mddev, const char *buf, size_t len)
3851 return err ?: len; 3852 return err ?: len;
3852} 3853}
3853static struct md_sysfs_entry md_array_state = 3854static struct md_sysfs_entry md_array_state =
3854__ATTR(array_state, S_IRUGO|S_IWUSR, array_state_show, array_state_store); 3855__ATTR_PREALLOC(array_state, S_IRUGO|S_IWUSR, array_state_show, array_state_store);
3855 3856
3856static ssize_t 3857static ssize_t
3857max_corrected_read_errors_show(struct mddev *mddev, char *page) { 3858max_corrected_read_errors_show(struct mddev *mddev, char *page) {
@@ -4101,7 +4102,7 @@ out_unlock:
4101} 4102}
4102 4103
4103static struct md_sysfs_entry md_metadata = 4104static struct md_sysfs_entry md_metadata =
4104__ATTR(metadata_version, S_IRUGO|S_IWUSR, metadata_show, metadata_store); 4105__ATTR_PREALLOC(metadata_version, S_IRUGO|S_IWUSR, metadata_show, metadata_store);
4105 4106
4106static ssize_t 4107static ssize_t
4107action_show(struct mddev *mddev, char *page) 4108action_show(struct mddev *mddev, char *page)
@@ -4189,7 +4190,7 @@ action_store(struct mddev *mddev, const char *page, size_t len)
4189} 4190}
4190 4191
4191static struct md_sysfs_entry md_scan_mode = 4192static struct md_sysfs_entry md_scan_mode =
4192__ATTR(sync_action, S_IRUGO|S_IWUSR, action_show, action_store); 4193__ATTR_PREALLOC(sync_action, S_IRUGO|S_IWUSR, action_show, action_store);
4193 4194
4194static ssize_t 4195static ssize_t
4195last_sync_action_show(struct mddev *mddev, char *page) 4196last_sync_action_show(struct mddev *mddev, char *page)
@@ -4335,7 +4336,8 @@ sync_completed_show(struct mddev *mddev, char *page)
4335 return sprintf(page, "%llu / %llu\n", resync, max_sectors); 4336 return sprintf(page, "%llu / %llu\n", resync, max_sectors);
4336} 4337}
4337 4338
4338static struct md_sysfs_entry md_sync_completed = __ATTR_RO(sync_completed); 4339static struct md_sysfs_entry md_sync_completed =
4340 __ATTR_PREALLOC(sync_completed, S_IRUGO, sync_completed_show, NULL);
4339 4341
4340static ssize_t 4342static ssize_t
4341min_sync_show(struct mddev *mddev, char *page) 4343min_sync_show(struct mddev *mddev, char *page)
@@ -5078,7 +5080,8 @@ int md_run(struct mddev *mddev)
5078 } 5080 }
5079 if (err) { 5081 if (err) {
5080 mddev_detach(mddev); 5082 mddev_detach(mddev);
5081 pers->free(mddev, mddev->private); 5083 if (mddev->private)
5084 pers->free(mddev, mddev->private);
5082 module_put(pers->owner); 5085 module_put(pers->owner);
5083 bitmap_destroy(mddev); 5086 bitmap_destroy(mddev);
5084 return err; 5087 return err;
diff --git a/drivers/md/persistent-data/dm-space-map-disk.c b/drivers/md/persistent-data/dm-space-map-disk.c
index cfbf9617e465..ebb280a14325 100644
--- a/drivers/md/persistent-data/dm-space-map-disk.c
+++ b/drivers/md/persistent-data/dm-space-map-disk.c
@@ -78,7 +78,9 @@ static int sm_disk_count_is_more_than_one(struct dm_space_map *sm, dm_block_t b,
78 if (r) 78 if (r)
79 return r; 79 return r;
80 80
81 return count > 1; 81 *result = count > 1;
82
83 return 0;
82} 84}
83 85
84static int sm_disk_set_count(struct dm_space_map *sm, dm_block_t b, 86static int sm_disk_set_count(struct dm_space_map *sm, dm_block_t b,
diff --git a/drivers/md/raid0.c b/drivers/md/raid0.c
index a13f738a7b39..3ed9f42ddca6 100644
--- a/drivers/md/raid0.c
+++ b/drivers/md/raid0.c
@@ -467,8 +467,6 @@ static int raid0_run(struct mddev *mddev)
467 dump_zones(mddev); 467 dump_zones(mddev);
468 468
469 ret = md_integrity_register(mddev); 469 ret = md_integrity_register(mddev);
470 if (ret)
471 raid0_free(mddev, conf);
472 470
473 return ret; 471 return ret;
474} 472}
diff --git a/drivers/md/raid1.c b/drivers/md/raid1.c
index 4153da5d4011..d34e238afa54 100644
--- a/drivers/md/raid1.c
+++ b/drivers/md/raid1.c
@@ -560,7 +560,7 @@ static int read_balance(struct r1conf *conf, struct r1bio *r1_bio, int *max_sect
560 if (test_bit(WriteMostly, &rdev->flags)) { 560 if (test_bit(WriteMostly, &rdev->flags)) {
561 /* Don't balance among write-mostly, just 561 /* Don't balance among write-mostly, just
562 * use the first as a last resort */ 562 * use the first as a last resort */
563 if (best_disk < 0) { 563 if (best_dist_disk < 0) {
564 if (is_badblock(rdev, this_sector, sectors, 564 if (is_badblock(rdev, this_sector, sectors,
565 &first_bad, &bad_sectors)) { 565 &first_bad, &bad_sectors)) {
566 if (first_bad < this_sector) 566 if (first_bad < this_sector)
@@ -569,7 +569,8 @@ static int read_balance(struct r1conf *conf, struct r1bio *r1_bio, int *max_sect
569 best_good_sectors = first_bad - this_sector; 569 best_good_sectors = first_bad - this_sector;
570 } else 570 } else
571 best_good_sectors = sectors; 571 best_good_sectors = sectors;
572 best_disk = disk; 572 best_dist_disk = disk;
573 best_pending_disk = disk;
573 } 574 }
574 continue; 575 continue;
575 } 576 }
diff --git a/drivers/md/raid5.c b/drivers/md/raid5.c
index e75d48c0421a..cd2f96b2c572 100644
--- a/drivers/md/raid5.c
+++ b/drivers/md/raid5.c
@@ -5121,12 +5121,17 @@ static inline sector_t sync_request(struct mddev *mddev, sector_t sector_nr, int
5121 schedule_timeout_uninterruptible(1); 5121 schedule_timeout_uninterruptible(1);
5122 } 5122 }
5123 /* Need to check if array will still be degraded after recovery/resync 5123 /* Need to check if array will still be degraded after recovery/resync
5124 * We don't need to check the 'failed' flag as when that gets set, 5124 * Note in case of > 1 drive failures it's possible we're rebuilding
5125 * recovery aborts. 5125 * one drive while leaving another faulty drive in array.
5126 */ 5126 */
5127 for (i = 0; i < conf->raid_disks; i++) 5127 rcu_read_lock();
5128 if (conf->disks[i].rdev == NULL) 5128 for (i = 0; i < conf->raid_disks; i++) {
5129 struct md_rdev *rdev = ACCESS_ONCE(conf->disks[i].rdev);
5130
5131 if (rdev == NULL || test_bit(Faulty, &rdev->flags))
5129 still_degraded = 1; 5132 still_degraded = 1;
5133 }
5134 rcu_read_unlock();
5130 5135
5131 bitmap_start_sync(mddev->bitmap, sector_nr, &sync_blocks, still_degraded); 5136 bitmap_start_sync(mddev->bitmap, sector_nr, &sync_blocks, still_degraded);
5132 5137
diff --git a/drivers/misc/mei/init.c b/drivers/misc/mei/init.c
index 9306219d5675..6ad049a08e4d 100644
--- a/drivers/misc/mei/init.c
+++ b/drivers/misc/mei/init.c
@@ -341,6 +341,8 @@ void mei_stop(struct mei_device *dev)
341 341
342 dev->dev_state = MEI_DEV_POWER_DOWN; 342 dev->dev_state = MEI_DEV_POWER_DOWN;
343 mei_reset(dev); 343 mei_reset(dev);
344 /* move device to disabled state unconditionally */
345 dev->dev_state = MEI_DEV_DISABLED;
344 346
345 mutex_unlock(&dev->device_lock); 347 mutex_unlock(&dev->device_lock);
346 348
diff --git a/drivers/mmc/core/pwrseq_simple.c b/drivers/mmc/core/pwrseq_simple.c
index e9f1d8d84613..c53f14a7ce54 100644
--- a/drivers/mmc/core/pwrseq_simple.c
+++ b/drivers/mmc/core/pwrseq_simple.c
@@ -124,7 +124,7 @@ int mmc_pwrseq_simple_alloc(struct mmc_host *host, struct device *dev)
124 PTR_ERR(pwrseq->reset_gpios[i]) != -ENOSYS) { 124 PTR_ERR(pwrseq->reset_gpios[i]) != -ENOSYS) {
125 ret = PTR_ERR(pwrseq->reset_gpios[i]); 125 ret = PTR_ERR(pwrseq->reset_gpios[i]);
126 126
127 while (--i) 127 while (i--)
128 gpiod_put(pwrseq->reset_gpios[i]); 128 gpiod_put(pwrseq->reset_gpios[i]);
129 129
130 goto clk_put; 130 goto clk_put;
diff --git a/drivers/mmc/host/sunxi-mmc.c b/drivers/mmc/host/sunxi-mmc.c
index 6af0a28ba37d..e8a4218b5726 100644
--- a/drivers/mmc/host/sunxi-mmc.c
+++ b/drivers/mmc/host/sunxi-mmc.c
@@ -21,8 +21,6 @@
21#include <linux/err.h> 21#include <linux/err.h>
22 22
23#include <linux/clk.h> 23#include <linux/clk.h>
24#include <linux/clk/sunxi.h>
25
26#include <linux/gpio.h> 24#include <linux/gpio.h>
27#include <linux/platform_device.h> 25#include <linux/platform_device.h>
28#include <linux/spinlock.h> 26#include <linux/spinlock.h>
@@ -229,6 +227,8 @@ struct sunxi_mmc_host {
229 /* clock management */ 227 /* clock management */
230 struct clk *clk_ahb; 228 struct clk *clk_ahb;
231 struct clk *clk_mmc; 229 struct clk *clk_mmc;
230 struct clk *clk_sample;
231 struct clk *clk_output;
232 232
233 /* irq */ 233 /* irq */
234 spinlock_t lock; 234 spinlock_t lock;
@@ -653,26 +653,31 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
653 653
654 /* determine delays */ 654 /* determine delays */
655 if (rate <= 400000) { 655 if (rate <= 400000) {
656 oclk_dly = 0; 656 oclk_dly = 180;
657 sclk_dly = 7; 657 sclk_dly = 42;
658 } else if (rate <= 25000000) { 658 } else if (rate <= 25000000) {
659 oclk_dly = 0; 659 oclk_dly = 180;
660 sclk_dly = 5; 660 sclk_dly = 75;
661 } else if (rate <= 50000000) { 661 } else if (rate <= 50000000) {
662 if (ios->timing == MMC_TIMING_UHS_DDR50) { 662 if (ios->timing == MMC_TIMING_UHS_DDR50) {
663 oclk_dly = 2; 663 oclk_dly = 60;
664 sclk_dly = 4; 664 sclk_dly = 120;
665 } else { 665 } else {
666 oclk_dly = 3; 666 oclk_dly = 90;
667 sclk_dly = 5; 667 sclk_dly = 150;
668 } 668 }
669 } else if (rate <= 100000000) {
670 oclk_dly = 6;
671 sclk_dly = 24;
672 } else if (rate <= 200000000) {
673 oclk_dly = 3;
674 sclk_dly = 12;
669 } else { 675 } else {
670 /* rate > 50000000 */ 676 return -EINVAL;
671 oclk_dly = 2;
672 sclk_dly = 4;
673 } 677 }
674 678
675 clk_sunxi_mmc_phase_control(host->clk_mmc, sclk_dly, oclk_dly); 679 clk_set_phase(host->clk_sample, sclk_dly);
680 clk_set_phase(host->clk_output, oclk_dly);
676 681
677 return sunxi_mmc_oclk_onoff(host, 1); 682 return sunxi_mmc_oclk_onoff(host, 1);
678} 683}
@@ -913,6 +918,18 @@ static int sunxi_mmc_resource_request(struct sunxi_mmc_host *host,
913 return PTR_ERR(host->clk_mmc); 918 return PTR_ERR(host->clk_mmc);
914 } 919 }
915 920
921 host->clk_output = devm_clk_get(&pdev->dev, "output");
922 if (IS_ERR(host->clk_output)) {
923 dev_err(&pdev->dev, "Could not get output clock\n");
924 return PTR_ERR(host->clk_output);
925 }
926
927 host->clk_sample = devm_clk_get(&pdev->dev, "sample");
928 if (IS_ERR(host->clk_sample)) {
929 dev_err(&pdev->dev, "Could not get sample clock\n");
930 return PTR_ERR(host->clk_sample);
931 }
932
916 host->reset = devm_reset_control_get(&pdev->dev, "ahb"); 933 host->reset = devm_reset_control_get(&pdev->dev, "ahb");
917 934
918 ret = clk_prepare_enable(host->clk_ahb); 935 ret = clk_prepare_enable(host->clk_ahb);
@@ -927,11 +944,23 @@ static int sunxi_mmc_resource_request(struct sunxi_mmc_host *host,
927 goto error_disable_clk_ahb; 944 goto error_disable_clk_ahb;
928 } 945 }
929 946
947 ret = clk_prepare_enable(host->clk_output);
948 if (ret) {
949 dev_err(&pdev->dev, "Enable output clk err %d\n", ret);
950 goto error_disable_clk_mmc;
951 }
952
953 ret = clk_prepare_enable(host->clk_sample);
954 if (ret) {
955 dev_err(&pdev->dev, "Enable sample clk err %d\n", ret);
956 goto error_disable_clk_output;
957 }
958
930 if (!IS_ERR(host->reset)) { 959 if (!IS_ERR(host->reset)) {
931 ret = reset_control_deassert(host->reset); 960 ret = reset_control_deassert(host->reset);
932 if (ret) { 961 if (ret) {
933 dev_err(&pdev->dev, "reset err %d\n", ret); 962 dev_err(&pdev->dev, "reset err %d\n", ret);
934 goto error_disable_clk_mmc; 963 goto error_disable_clk_sample;
935 } 964 }
936 } 965 }
937 966
@@ -950,6 +979,10 @@ static int sunxi_mmc_resource_request(struct sunxi_mmc_host *host,
950error_assert_reset: 979error_assert_reset:
951 if (!IS_ERR(host->reset)) 980 if (!IS_ERR(host->reset))
952 reset_control_assert(host->reset); 981 reset_control_assert(host->reset);
982error_disable_clk_sample:
983 clk_disable_unprepare(host->clk_sample);
984error_disable_clk_output:
985 clk_disable_unprepare(host->clk_output);
953error_disable_clk_mmc: 986error_disable_clk_mmc:
954 clk_disable_unprepare(host->clk_mmc); 987 clk_disable_unprepare(host->clk_mmc);
955error_disable_clk_ahb: 988error_disable_clk_ahb:
diff --git a/drivers/mtd/nand/Kconfig b/drivers/mtd/nand/Kconfig
index 5b76a173cd95..5897d8d8fa5a 100644
--- a/drivers/mtd/nand/Kconfig
+++ b/drivers/mtd/nand/Kconfig
@@ -526,6 +526,7 @@ config MTD_NAND_SUNXI
526 526
527config MTD_NAND_HISI504 527config MTD_NAND_HISI504
528 tristate "Support for NAND controller on Hisilicon SoC Hip04" 528 tristate "Support for NAND controller on Hisilicon SoC Hip04"
529 depends on HAS_DMA
529 help 530 help
530 Enables support for NAND controller on Hisilicon SoC Hip04. 531 Enables support for NAND controller on Hisilicon SoC Hip04.
531 532
diff --git a/drivers/mtd/nand/pxa3xx_nand.c b/drivers/mtd/nand/pxa3xx_nand.c
index 96b0b1d27df1..10b1f7a4fe50 100644
--- a/drivers/mtd/nand/pxa3xx_nand.c
+++ b/drivers/mtd/nand/pxa3xx_nand.c
@@ -480,6 +480,42 @@ static void disable_int(struct pxa3xx_nand_info *info, uint32_t int_mask)
480 nand_writel(info, NDCR, ndcr | int_mask); 480 nand_writel(info, NDCR, ndcr | int_mask);
481} 481}
482 482
483static void drain_fifo(struct pxa3xx_nand_info *info, void *data, int len)
484{
485 if (info->ecc_bch) {
486 int timeout;
487
488 /*
489 * According to the datasheet, when reading from NDDB
490 * with BCH enabled, after each 32 bytes reads, we
491 * have to make sure that the NDSR.RDDREQ bit is set.
492 *
493 * Drain the FIFO 8 32 bits reads at a time, and skip
494 * the polling on the last read.
495 */
496 while (len > 8) {
497 __raw_readsl(info->mmio_base + NDDB, data, 8);
498
499 for (timeout = 0;
500 !(nand_readl(info, NDSR) & NDSR_RDDREQ);
501 timeout++) {
502 if (timeout >= 5) {
503 dev_err(&info->pdev->dev,
504 "Timeout on RDDREQ while draining the FIFO\n");
505 return;
506 }
507
508 mdelay(1);
509 }
510
511 data += 32;
512 len -= 8;
513 }
514 }
515
516 __raw_readsl(info->mmio_base + NDDB, data, len);
517}
518
483static void handle_data_pio(struct pxa3xx_nand_info *info) 519static void handle_data_pio(struct pxa3xx_nand_info *info)
484{ 520{
485 unsigned int do_bytes = min(info->data_size, info->chunk_size); 521 unsigned int do_bytes = min(info->data_size, info->chunk_size);
@@ -496,14 +532,14 @@ static void handle_data_pio(struct pxa3xx_nand_info *info)
496 DIV_ROUND_UP(info->oob_size, 4)); 532 DIV_ROUND_UP(info->oob_size, 4));
497 break; 533 break;
498 case STATE_PIO_READING: 534 case STATE_PIO_READING:
499 __raw_readsl(info->mmio_base + NDDB, 535 drain_fifo(info,
500 info->data_buff + info->data_buff_pos, 536 info->data_buff + info->data_buff_pos,
501 DIV_ROUND_UP(do_bytes, 4)); 537 DIV_ROUND_UP(do_bytes, 4));
502 538
503 if (info->oob_size > 0) 539 if (info->oob_size > 0)
504 __raw_readsl(info->mmio_base + NDDB, 540 drain_fifo(info,
505 info->oob_buff + info->oob_buff_pos, 541 info->oob_buff + info->oob_buff_pos,
506 DIV_ROUND_UP(info->oob_size, 4)); 542 DIV_ROUND_UP(info->oob_size, 4));
507 break; 543 break;
508 default: 544 default:
509 dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__, 545 dev_err(&info->pdev->dev, "%s: invalid state %d\n", __func__,
@@ -1572,6 +1608,8 @@ static int alloc_nand_resource(struct platform_device *pdev)
1572 int ret, irq, cs; 1608 int ret, irq, cs;
1573 1609
1574 pdata = dev_get_platdata(&pdev->dev); 1610 pdata = dev_get_platdata(&pdev->dev);
1611 if (pdata->num_cs <= 0)
1612 return -ENODEV;
1575 info = devm_kzalloc(&pdev->dev, sizeof(*info) + (sizeof(*mtd) + 1613 info = devm_kzalloc(&pdev->dev, sizeof(*info) + (sizeof(*mtd) +
1576 sizeof(*host)) * pdata->num_cs, GFP_KERNEL); 1614 sizeof(*host)) * pdata->num_cs, GFP_KERNEL);
1577 if (!info) 1615 if (!info)
diff --git a/drivers/net/Kconfig b/drivers/net/Kconfig
index 84673ebcf428..df51d6025a90 100644
--- a/drivers/net/Kconfig
+++ b/drivers/net/Kconfig
@@ -157,7 +157,7 @@ config IPVLAN
157 making it transparent to the connected L2 switch. 157 making it transparent to the connected L2 switch.
158 158
159 Ipvlan devices can be added using the "ip" command from the 159 Ipvlan devices can be added using the "ip" command from the
160 iproute2 package starting with the iproute2-X.Y.ZZ release: 160 iproute2 package starting with the iproute2-3.19 release:
161 161
162 "ip link add link <main-dev> [ NAME ] type ipvlan" 162 "ip link add link <main-dev> [ NAME ] type ipvlan"
163 163
diff --git a/drivers/net/appletalk/Kconfig b/drivers/net/appletalk/Kconfig
index 4ce6ca5f3d36..dc6b78e5342f 100644
--- a/drivers/net/appletalk/Kconfig
+++ b/drivers/net/appletalk/Kconfig
@@ -40,7 +40,7 @@ config DEV_APPLETALK
40 40
41config LTPC 41config LTPC
42 tristate "Apple/Farallon LocalTalk PC support" 42 tristate "Apple/Farallon LocalTalk PC support"
43 depends on DEV_APPLETALK && (ISA || EISA) && ISA_DMA_API 43 depends on DEV_APPLETALK && (ISA || EISA) && ISA_DMA_API && VIRT_TO_BUS
44 help 44 help
45 This allows you to use the AppleTalk PC card to connect to LocalTalk 45 This allows you to use the AppleTalk PC card to connect to LocalTalk
46 networks. The card is also known as the Farallon PhoneNet PC card. 46 networks. The card is also known as the Farallon PhoneNet PC card.
diff --git a/drivers/net/can/Kconfig b/drivers/net/can/Kconfig
index 98d73aab52fe..58808f651452 100644
--- a/drivers/net/can/Kconfig
+++ b/drivers/net/can/Kconfig
@@ -131,7 +131,7 @@ config CAN_RCAR
131 131
132config CAN_XILINXCAN 132config CAN_XILINXCAN
133 tristate "Xilinx CAN" 133 tristate "Xilinx CAN"
134 depends on ARCH_ZYNQ || MICROBLAZE || COMPILE_TEST 134 depends on ARCH_ZYNQ || ARM64 || MICROBLAZE || COMPILE_TEST
135 depends on COMMON_CLK && HAS_IOMEM 135 depends on COMMON_CLK && HAS_IOMEM
136 ---help--- 136 ---help---
137 Xilinx CAN driver. This driver supports both soft AXI CAN IP and 137 Xilinx CAN driver. This driver supports both soft AXI CAN IP and
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c
index 3c82e02e3dae..b0f69248cb71 100644
--- a/drivers/net/can/dev.c
+++ b/drivers/net/can/dev.c
@@ -579,6 +579,10 @@ struct sk_buff *alloc_can_skb(struct net_device *dev, struct can_frame **cf)
579 skb->pkt_type = PACKET_BROADCAST; 579 skb->pkt_type = PACKET_BROADCAST;
580 skb->ip_summed = CHECKSUM_UNNECESSARY; 580 skb->ip_summed = CHECKSUM_UNNECESSARY;
581 581
582 skb_reset_mac_header(skb);
583 skb_reset_network_header(skb);
584 skb_reset_transport_header(skb);
585
582 can_skb_reserve(skb); 586 can_skb_reserve(skb);
583 can_skb_prv(skb)->ifindex = dev->ifindex; 587 can_skb_prv(skb)->ifindex = dev->ifindex;
584 588
@@ -603,6 +607,10 @@ struct sk_buff *alloc_canfd_skb(struct net_device *dev,
603 skb->pkt_type = PACKET_BROADCAST; 607 skb->pkt_type = PACKET_BROADCAST;
604 skb->ip_summed = CHECKSUM_UNNECESSARY; 608 skb->ip_summed = CHECKSUM_UNNECESSARY;
605 609
610 skb_reset_mac_header(skb);
611 skb_reset_network_header(skb);
612 skb_reset_transport_header(skb);
613
606 can_skb_reserve(skb); 614 can_skb_reserve(skb);
607 can_skb_prv(skb)->ifindex = dev->ifindex; 615 can_skb_prv(skb)->ifindex = dev->ifindex;
608 616
diff --git a/drivers/net/can/usb/kvaser_usb.c b/drivers/net/can/usb/kvaser_usb.c
index 2928f7003041..e97a08ce0b90 100644
--- a/drivers/net/can/usb/kvaser_usb.c
+++ b/drivers/net/can/usb/kvaser_usb.c
@@ -14,6 +14,8 @@
14 * Copyright (C) 2015 Valeo S.A. 14 * Copyright (C) 2015 Valeo S.A.
15 */ 15 */
16 16
17#include <linux/spinlock.h>
18#include <linux/kernel.h>
17#include <linux/completion.h> 19#include <linux/completion.h>
18#include <linux/module.h> 20#include <linux/module.h>
19#include <linux/netdevice.h> 21#include <linux/netdevice.h>
@@ -466,10 +468,11 @@ struct kvaser_usb {
466struct kvaser_usb_net_priv { 468struct kvaser_usb_net_priv {
467 struct can_priv can; 469 struct can_priv can;
468 470
469 atomic_t active_tx_urbs; 471 spinlock_t tx_contexts_lock;
470 struct usb_anchor tx_submitted; 472 int active_tx_contexts;
471 struct kvaser_usb_tx_urb_context tx_contexts[MAX_TX_URBS]; 473 struct kvaser_usb_tx_urb_context tx_contexts[MAX_TX_URBS];
472 474
475 struct usb_anchor tx_submitted;
473 struct completion start_comp, stop_comp; 476 struct completion start_comp, stop_comp;
474 477
475 struct kvaser_usb *dev; 478 struct kvaser_usb *dev;
@@ -584,8 +587,15 @@ static int kvaser_usb_wait_msg(const struct kvaser_usb *dev, u8 id,
584 while (pos <= actual_len - MSG_HEADER_LEN) { 587 while (pos <= actual_len - MSG_HEADER_LEN) {
585 tmp = buf + pos; 588 tmp = buf + pos;
586 589
587 if (!tmp->len) 590 /* Handle messages crossing the USB endpoint max packet
588 break; 591 * size boundary. Check kvaser_usb_read_bulk_callback()
592 * for further details.
593 */
594 if (tmp->len == 0) {
595 pos = round_up(pos,
596 dev->bulk_in->wMaxPacketSize);
597 continue;
598 }
589 599
590 if (pos + tmp->len > actual_len) { 600 if (pos + tmp->len > actual_len) {
591 dev_err(dev->udev->dev.parent, 601 dev_err(dev->udev->dev.parent,
@@ -686,6 +696,7 @@ static void kvaser_usb_tx_acknowledge(const struct kvaser_usb *dev,
686 struct kvaser_usb_net_priv *priv; 696 struct kvaser_usb_net_priv *priv;
687 struct sk_buff *skb; 697 struct sk_buff *skb;
688 struct can_frame *cf; 698 struct can_frame *cf;
699 unsigned long flags;
689 u8 channel, tid; 700 u8 channel, tid;
690 701
691 channel = msg->u.tx_acknowledge_header.channel; 702 channel = msg->u.tx_acknowledge_header.channel;
@@ -729,12 +740,15 @@ static void kvaser_usb_tx_acknowledge(const struct kvaser_usb *dev,
729 740
730 stats->tx_packets++; 741 stats->tx_packets++;
731 stats->tx_bytes += context->dlc; 742 stats->tx_bytes += context->dlc;
732 can_get_echo_skb(priv->netdev, context->echo_index);
733 743
734 context->echo_index = MAX_TX_URBS; 744 spin_lock_irqsave(&priv->tx_contexts_lock, flags);
735 atomic_dec(&priv->active_tx_urbs);
736 745
746 can_get_echo_skb(priv->netdev, context->echo_index);
747 context->echo_index = MAX_TX_URBS;
748 --priv->active_tx_contexts;
737 netif_wake_queue(priv->netdev); 749 netif_wake_queue(priv->netdev);
750
751 spin_unlock_irqrestore(&priv->tx_contexts_lock, flags);
738} 752}
739 753
740static void kvaser_usb_simple_msg_callback(struct urb *urb) 754static void kvaser_usb_simple_msg_callback(struct urb *urb)
@@ -787,7 +801,6 @@ static int kvaser_usb_simple_msg_async(struct kvaser_usb_net_priv *priv,
787 netdev_err(netdev, "Error transmitting URB\n"); 801 netdev_err(netdev, "Error transmitting URB\n");
788 usb_unanchor_urb(urb); 802 usb_unanchor_urb(urb);
789 usb_free_urb(urb); 803 usb_free_urb(urb);
790 kfree(buf);
791 return err; 804 return err;
792 } 805 }
793 806
@@ -796,17 +809,6 @@ static int kvaser_usb_simple_msg_async(struct kvaser_usb_net_priv *priv,
796 return 0; 809 return 0;
797} 810}
798 811
799static void kvaser_usb_unlink_tx_urbs(struct kvaser_usb_net_priv *priv)
800{
801 int i;
802
803 usb_kill_anchored_urbs(&priv->tx_submitted);
804 atomic_set(&priv->active_tx_urbs, 0);
805
806 for (i = 0; i < MAX_TX_URBS; i++)
807 priv->tx_contexts[i].echo_index = MAX_TX_URBS;
808}
809
810static void kvaser_usb_rx_error_update_can_state(struct kvaser_usb_net_priv *priv, 812static void kvaser_usb_rx_error_update_can_state(struct kvaser_usb_net_priv *priv,
811 const struct kvaser_usb_error_summary *es, 813 const struct kvaser_usb_error_summary *es,
812 struct can_frame *cf) 814 struct can_frame *cf)
@@ -1317,8 +1319,19 @@ static void kvaser_usb_read_bulk_callback(struct urb *urb)
1317 while (pos <= urb->actual_length - MSG_HEADER_LEN) { 1319 while (pos <= urb->actual_length - MSG_HEADER_LEN) {
1318 msg = urb->transfer_buffer + pos; 1320 msg = urb->transfer_buffer + pos;
1319 1321
1320 if (!msg->len) 1322 /* The Kvaser firmware can only read and write messages that
1321 break; 1323 * does not cross the USB's endpoint wMaxPacketSize boundary.
1324 * If a follow-up command crosses such boundary, firmware puts
1325 * a placeholder zero-length command in its place then aligns
1326 * the real command to the next max packet size.
1327 *
1328 * Handle such cases or we're going to miss a significant
1329 * number of events in case of a heavy rx load on the bus.
1330 */
1331 if (msg->len == 0) {
1332 pos = round_up(pos, dev->bulk_in->wMaxPacketSize);
1333 continue;
1334 }
1322 1335
1323 if (pos + msg->len > urb->actual_length) { 1336 if (pos + msg->len > urb->actual_length) {
1324 dev_err(dev->udev->dev.parent, "Format error\n"); 1337 dev_err(dev->udev->dev.parent, "Format error\n");
@@ -1326,7 +1339,6 @@ static void kvaser_usb_read_bulk_callback(struct urb *urb)
1326 } 1339 }
1327 1340
1328 kvaser_usb_handle_message(dev, msg); 1341 kvaser_usb_handle_message(dev, msg);
1329
1330 pos += msg->len; 1342 pos += msg->len;
1331 } 1343 }
1332 1344
@@ -1498,6 +1510,24 @@ error:
1498 return err; 1510 return err;
1499} 1511}
1500 1512
1513static void kvaser_usb_reset_tx_urb_contexts(struct kvaser_usb_net_priv *priv)
1514{
1515 int i;
1516
1517 priv->active_tx_contexts = 0;
1518 for (i = 0; i < MAX_TX_URBS; i++)
1519 priv->tx_contexts[i].echo_index = MAX_TX_URBS;
1520}
1521
1522/* This method might sleep. Do not call it in the atomic context
1523 * of URB completions.
1524 */
1525static void kvaser_usb_unlink_tx_urbs(struct kvaser_usb_net_priv *priv)
1526{
1527 usb_kill_anchored_urbs(&priv->tx_submitted);
1528 kvaser_usb_reset_tx_urb_contexts(priv);
1529}
1530
1501static void kvaser_usb_unlink_all_urbs(struct kvaser_usb *dev) 1531static void kvaser_usb_unlink_all_urbs(struct kvaser_usb *dev)
1502{ 1532{
1503 int i; 1533 int i;
@@ -1615,9 +1645,9 @@ static netdev_tx_t kvaser_usb_start_xmit(struct sk_buff *skb,
1615 struct urb *urb; 1645 struct urb *urb;
1616 void *buf; 1646 void *buf;
1617 struct kvaser_msg *msg; 1647 struct kvaser_msg *msg;
1618 int i, err; 1648 int i, err, ret = NETDEV_TX_OK;
1619 int ret = NETDEV_TX_OK;
1620 u8 *msg_tx_can_flags = NULL; /* GCC */ 1649 u8 *msg_tx_can_flags = NULL; /* GCC */
1650 unsigned long flags;
1621 1651
1622 if (can_dropped_invalid_skb(netdev, skb)) 1652 if (can_dropped_invalid_skb(netdev, skb))
1623 return NETDEV_TX_OK; 1653 return NETDEV_TX_OK;
@@ -1634,7 +1664,7 @@ static netdev_tx_t kvaser_usb_start_xmit(struct sk_buff *skb,
1634 if (!buf) { 1664 if (!buf) {
1635 stats->tx_dropped++; 1665 stats->tx_dropped++;
1636 dev_kfree_skb(skb); 1666 dev_kfree_skb(skb);
1637 goto nobufmem; 1667 goto freeurb;
1638 } 1668 }
1639 1669
1640 msg = buf; 1670 msg = buf;
@@ -1671,22 +1701,32 @@ static netdev_tx_t kvaser_usb_start_xmit(struct sk_buff *skb,
1671 if (cf->can_id & CAN_RTR_FLAG) 1701 if (cf->can_id & CAN_RTR_FLAG)
1672 *msg_tx_can_flags |= MSG_FLAG_REMOTE_FRAME; 1702 *msg_tx_can_flags |= MSG_FLAG_REMOTE_FRAME;
1673 1703
1704 spin_lock_irqsave(&priv->tx_contexts_lock, flags);
1674 for (i = 0; i < ARRAY_SIZE(priv->tx_contexts); i++) { 1705 for (i = 0; i < ARRAY_SIZE(priv->tx_contexts); i++) {
1675 if (priv->tx_contexts[i].echo_index == MAX_TX_URBS) { 1706 if (priv->tx_contexts[i].echo_index == MAX_TX_URBS) {
1676 context = &priv->tx_contexts[i]; 1707 context = &priv->tx_contexts[i];
1708
1709 context->echo_index = i;
1710 can_put_echo_skb(skb, netdev, context->echo_index);
1711 ++priv->active_tx_contexts;
1712 if (priv->active_tx_contexts >= MAX_TX_URBS)
1713 netif_stop_queue(netdev);
1714
1677 break; 1715 break;
1678 } 1716 }
1679 } 1717 }
1718 spin_unlock_irqrestore(&priv->tx_contexts_lock, flags);
1680 1719
1681 /* This should never happen; it implies a flow control bug */ 1720 /* This should never happen; it implies a flow control bug */
1682 if (!context) { 1721 if (!context) {
1683 netdev_warn(netdev, "cannot find free context\n"); 1722 netdev_warn(netdev, "cannot find free context\n");
1723
1724 kfree(buf);
1684 ret = NETDEV_TX_BUSY; 1725 ret = NETDEV_TX_BUSY;
1685 goto releasebuf; 1726 goto freeurb;
1686 } 1727 }
1687 1728
1688 context->priv = priv; 1729 context->priv = priv;
1689 context->echo_index = i;
1690 context->dlc = cf->can_dlc; 1730 context->dlc = cf->can_dlc;
1691 1731
1692 msg->u.tx_can.tid = context->echo_index; 1732 msg->u.tx_can.tid = context->echo_index;
@@ -1698,18 +1738,17 @@ static netdev_tx_t kvaser_usb_start_xmit(struct sk_buff *skb,
1698 kvaser_usb_write_bulk_callback, context); 1738 kvaser_usb_write_bulk_callback, context);
1699 usb_anchor_urb(urb, &priv->tx_submitted); 1739 usb_anchor_urb(urb, &priv->tx_submitted);
1700 1740
1701 can_put_echo_skb(skb, netdev, context->echo_index);
1702
1703 atomic_inc(&priv->active_tx_urbs);
1704
1705 if (atomic_read(&priv->active_tx_urbs) >= MAX_TX_URBS)
1706 netif_stop_queue(netdev);
1707
1708 err = usb_submit_urb(urb, GFP_ATOMIC); 1741 err = usb_submit_urb(urb, GFP_ATOMIC);
1709 if (unlikely(err)) { 1742 if (unlikely(err)) {
1743 spin_lock_irqsave(&priv->tx_contexts_lock, flags);
1744
1710 can_free_echo_skb(netdev, context->echo_index); 1745 can_free_echo_skb(netdev, context->echo_index);
1746 context->echo_index = MAX_TX_URBS;
1747 --priv->active_tx_contexts;
1748 netif_wake_queue(netdev);
1749
1750 spin_unlock_irqrestore(&priv->tx_contexts_lock, flags);
1711 1751
1712 atomic_dec(&priv->active_tx_urbs);
1713 usb_unanchor_urb(urb); 1752 usb_unanchor_urb(urb);
1714 1753
1715 stats->tx_dropped++; 1754 stats->tx_dropped++;
@@ -1719,16 +1758,12 @@ static netdev_tx_t kvaser_usb_start_xmit(struct sk_buff *skb,
1719 else 1758 else
1720 netdev_warn(netdev, "Failed tx_urb %d\n", err); 1759 netdev_warn(netdev, "Failed tx_urb %d\n", err);
1721 1760
1722 goto releasebuf; 1761 goto freeurb;
1723 } 1762 }
1724 1763
1725 usb_free_urb(urb); 1764 ret = NETDEV_TX_OK;
1726
1727 return NETDEV_TX_OK;
1728 1765
1729releasebuf: 1766freeurb:
1730 kfree(buf);
1731nobufmem:
1732 usb_free_urb(urb); 1767 usb_free_urb(urb);
1733 return ret; 1768 return ret;
1734} 1769}
@@ -1840,7 +1875,7 @@ static int kvaser_usb_init_one(struct usb_interface *intf,
1840 struct kvaser_usb *dev = usb_get_intfdata(intf); 1875 struct kvaser_usb *dev = usb_get_intfdata(intf);
1841 struct net_device *netdev; 1876 struct net_device *netdev;
1842 struct kvaser_usb_net_priv *priv; 1877 struct kvaser_usb_net_priv *priv;
1843 int i, err; 1878 int err;
1844 1879
1845 err = kvaser_usb_send_simple_msg(dev, CMD_RESET_CHIP, channel); 1880 err = kvaser_usb_send_simple_msg(dev, CMD_RESET_CHIP, channel);
1846 if (err) 1881 if (err)
@@ -1854,19 +1889,17 @@ static int kvaser_usb_init_one(struct usb_interface *intf,
1854 1889
1855 priv = netdev_priv(netdev); 1890 priv = netdev_priv(netdev);
1856 1891
1892 init_usb_anchor(&priv->tx_submitted);
1857 init_completion(&priv->start_comp); 1893 init_completion(&priv->start_comp);
1858 init_completion(&priv->stop_comp); 1894 init_completion(&priv->stop_comp);
1859 1895
1860 init_usb_anchor(&priv->tx_submitted);
1861 atomic_set(&priv->active_tx_urbs, 0);
1862
1863 for (i = 0; i < ARRAY_SIZE(priv->tx_contexts); i++)
1864 priv->tx_contexts[i].echo_index = MAX_TX_URBS;
1865
1866 priv->dev = dev; 1896 priv->dev = dev;
1867 priv->netdev = netdev; 1897 priv->netdev = netdev;
1868 priv->channel = channel; 1898 priv->channel = channel;
1869 1899
1900 spin_lock_init(&priv->tx_contexts_lock);
1901 kvaser_usb_reset_tx_urb_contexts(priv);
1902
1870 priv->can.state = CAN_STATE_STOPPED; 1903 priv->can.state = CAN_STATE_STOPPED;
1871 priv->can.clock.freq = CAN_USB_CLOCK; 1904 priv->can.clock.freq = CAN_USB_CLOCK;
1872 priv->can.bittiming_const = &kvaser_usb_bittiming_const; 1905 priv->can.bittiming_const = &kvaser_usb_bittiming_const;
diff --git a/drivers/net/can/usb/peak_usb/pcan_usb_fd.c b/drivers/net/can/usb/peak_usb/pcan_usb_fd.c
index 962c3f027383..0bac0f14edc3 100644
--- a/drivers/net/can/usb/peak_usb/pcan_usb_fd.c
+++ b/drivers/net/can/usb/peak_usb/pcan_usb_fd.c
@@ -879,6 +879,10 @@ static int pcan_usb_fd_init(struct peak_usb_device *dev)
879 879
880 pdev->usb_if = ppdev->usb_if; 880 pdev->usb_if = ppdev->usb_if;
881 pdev->cmd_buffer_addr = ppdev->cmd_buffer_addr; 881 pdev->cmd_buffer_addr = ppdev->cmd_buffer_addr;
882
883 /* do a copy of the ctrlmode[_supported] too */
884 dev->can.ctrlmode = ppdev->dev.can.ctrlmode;
885 dev->can.ctrlmode_supported = ppdev->dev.can.ctrlmode_supported;
882 } 886 }
883 887
884 pdev->usb_if->dev[dev->ctrl_idx] = dev; 888 pdev->usb_if->dev[dev->ctrl_idx] = dev;
diff --git a/drivers/net/dsa/bcm_sf2.h b/drivers/net/dsa/bcm_sf2.h
index ee9f650d5026..7b7053d3c5fa 100644
--- a/drivers/net/dsa/bcm_sf2.h
+++ b/drivers/net/dsa/bcm_sf2.h
@@ -105,8 +105,8 @@ static inline u64 name##_readq(struct bcm_sf2_priv *priv, u32 off) \
105{ \ 105{ \
106 u32 indir, dir; \ 106 u32 indir, dir; \
107 spin_lock(&priv->indir_lock); \ 107 spin_lock(&priv->indir_lock); \
108 indir = reg_readl(priv, REG_DIR_DATA_READ); \
109 dir = __raw_readl(priv->name + off); \ 108 dir = __raw_readl(priv->name + off); \
109 indir = reg_readl(priv, REG_DIR_DATA_READ); \
110 spin_unlock(&priv->indir_lock); \ 110 spin_unlock(&priv->indir_lock); \
111 return (u64)indir << 32 | dir; \ 111 return (u64)indir << 32 | dir; \
112} \ 112} \
diff --git a/drivers/net/ethernet/8390/axnet_cs.c b/drivers/net/ethernet/8390/axnet_cs.c
index 7769c05543f1..ec6eac1f8c95 100644
--- a/drivers/net/ethernet/8390/axnet_cs.c
+++ b/drivers/net/ethernet/8390/axnet_cs.c
@@ -484,11 +484,8 @@ static int axnet_open(struct net_device *dev)
484 link->open++; 484 link->open++;
485 485
486 info->link_status = 0x00; 486 info->link_status = 0x00;
487 init_timer(&info->watchdog); 487 setup_timer(&info->watchdog, ei_watchdog, (u_long)dev);
488 info->watchdog.function = ei_watchdog; 488 mod_timer(&info->watchdog, jiffies + HZ);
489 info->watchdog.data = (u_long)dev;
490 info->watchdog.expires = jiffies + HZ;
491 add_timer(&info->watchdog);
492 489
493 return ax_open(dev); 490 return ax_open(dev);
494} /* axnet_open */ 491} /* axnet_open */
diff --git a/drivers/net/ethernet/8390/pcnet_cs.c b/drivers/net/ethernet/8390/pcnet_cs.c
index 9fb7b9d4fd6c..2777289a26c0 100644
--- a/drivers/net/ethernet/8390/pcnet_cs.c
+++ b/drivers/net/ethernet/8390/pcnet_cs.c
@@ -918,11 +918,8 @@ static int pcnet_open(struct net_device *dev)
918 918
919 info->phy_id = info->eth_phy; 919 info->phy_id = info->eth_phy;
920 info->link_status = 0x00; 920 info->link_status = 0x00;
921 init_timer(&info->watchdog); 921 setup_timer(&info->watchdog, ei_watchdog, (u_long)dev);
922 info->watchdog.function = ei_watchdog; 922 mod_timer(&info->watchdog, jiffies + HZ);
923 info->watchdog.data = (u_long)dev;
924 info->watchdog.expires = jiffies + HZ;
925 add_timer(&info->watchdog);
926 923
927 return ei_open(dev); 924 return ei_open(dev);
928} /* pcnet_open */ 925} /* pcnet_open */
diff --git a/drivers/net/ethernet/altera/altera_tse_main.c b/drivers/net/ethernet/altera/altera_tse_main.c
index 760c72c6e2ac..6725dc00750b 100644
--- a/drivers/net/ethernet/altera/altera_tse_main.c
+++ b/drivers/net/ethernet/altera/altera_tse_main.c
@@ -376,7 +376,8 @@ static int tse_rx(struct altera_tse_private *priv, int limit)
376 u16 pktlength; 376 u16 pktlength;
377 u16 pktstatus; 377 u16 pktstatus;
378 378
379 while ((rxstatus = priv->dmaops->get_rx_status(priv)) != 0) { 379 while (((rxstatus = priv->dmaops->get_rx_status(priv)) != 0) &&
380 (count < limit)) {
380 pktstatus = rxstatus >> 16; 381 pktstatus = rxstatus >> 16;
381 pktlength = rxstatus & 0xffff; 382 pktlength = rxstatus & 0xffff;
382 383
@@ -491,28 +492,27 @@ static int tse_poll(struct napi_struct *napi, int budget)
491 struct altera_tse_private *priv = 492 struct altera_tse_private *priv =
492 container_of(napi, struct altera_tse_private, napi); 493 container_of(napi, struct altera_tse_private, napi);
493 int rxcomplete = 0; 494 int rxcomplete = 0;
494 int txcomplete = 0;
495 unsigned long int flags; 495 unsigned long int flags;
496 496
497 txcomplete = tse_tx_complete(priv); 497 tse_tx_complete(priv);
498 498
499 rxcomplete = tse_rx(priv, budget); 499 rxcomplete = tse_rx(priv, budget);
500 500
501 if (rxcomplete >= budget || txcomplete > 0) 501 if (rxcomplete < budget) {
502 return rxcomplete;
503 502
504 napi_gro_flush(napi, false); 503 napi_gro_flush(napi, false);
505 __napi_complete(napi); 504 __napi_complete(napi);
506 505
507 netdev_dbg(priv->dev, 506 netdev_dbg(priv->dev,
508 "NAPI Complete, did %d packets with budget %d\n", 507 "NAPI Complete, did %d packets with budget %d\n",
509 txcomplete+rxcomplete, budget); 508 rxcomplete, budget);
510 509
511 spin_lock_irqsave(&priv->rxdma_irq_lock, flags); 510 spin_lock_irqsave(&priv->rxdma_irq_lock, flags);
512 priv->dmaops->enable_rxirq(priv); 511 priv->dmaops->enable_rxirq(priv);
513 priv->dmaops->enable_txirq(priv); 512 priv->dmaops->enable_txirq(priv);
514 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags); 513 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
515 return rxcomplete + txcomplete; 514 }
515 return rxcomplete;
516} 516}
517 517
518/* DMA TX & RX FIFO interrupt routing 518/* DMA TX & RX FIFO interrupt routing
@@ -521,7 +521,6 @@ static irqreturn_t altera_isr(int irq, void *dev_id)
521{ 521{
522 struct net_device *dev = dev_id; 522 struct net_device *dev = dev_id;
523 struct altera_tse_private *priv; 523 struct altera_tse_private *priv;
524 unsigned long int flags;
525 524
526 if (unlikely(!dev)) { 525 if (unlikely(!dev)) {
527 pr_err("%s: invalid dev pointer\n", __func__); 526 pr_err("%s: invalid dev pointer\n", __func__);
@@ -529,20 +528,20 @@ static irqreturn_t altera_isr(int irq, void *dev_id)
529 } 528 }
530 priv = netdev_priv(dev); 529 priv = netdev_priv(dev);
531 530
532 /* turn off desc irqs and enable napi rx */ 531 spin_lock(&priv->rxdma_irq_lock);
533 spin_lock_irqsave(&priv->rxdma_irq_lock, flags); 532 /* reset IRQs */
533 priv->dmaops->clear_rxirq(priv);
534 priv->dmaops->clear_txirq(priv);
535 spin_unlock(&priv->rxdma_irq_lock);
534 536
535 if (likely(napi_schedule_prep(&priv->napi))) { 537 if (likely(napi_schedule_prep(&priv->napi))) {
538 spin_lock(&priv->rxdma_irq_lock);
536 priv->dmaops->disable_rxirq(priv); 539 priv->dmaops->disable_rxirq(priv);
537 priv->dmaops->disable_txirq(priv); 540 priv->dmaops->disable_txirq(priv);
541 spin_unlock(&priv->rxdma_irq_lock);
538 __napi_schedule(&priv->napi); 542 __napi_schedule(&priv->napi);
539 } 543 }
540 544
541 /* reset IRQs */
542 priv->dmaops->clear_rxirq(priv);
543 priv->dmaops->clear_txirq(priv);
544
545 spin_unlock_irqrestore(&priv->rxdma_irq_lock, flags);
546 545
547 return IRQ_HANDLED; 546 return IRQ_HANDLED;
548} 547}
@@ -1399,7 +1398,7 @@ static int altera_tse_probe(struct platform_device *pdev)
1399 } 1398 }
1400 1399
1401 if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth", 1400 if (of_property_read_u32(pdev->dev.of_node, "tx-fifo-depth",
1402 &priv->rx_fifo_depth)) { 1401 &priv->tx_fifo_depth)) {
1403 dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n"); 1402 dev_err(&pdev->dev, "cannot obtain tx-fifo-depth\n");
1404 ret = -ENXIO; 1403 ret = -ENXIO;
1405 goto err_free_netdev; 1404 goto err_free_netdev;
diff --git a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c
index b93d4404d975..885b02b5be07 100644
--- a/drivers/net/ethernet/amd/xgbe/xgbe-drv.c
+++ b/drivers/net/ethernet/amd/xgbe/xgbe-drv.c
@@ -609,6 +609,68 @@ static void xgbe_napi_disable(struct xgbe_prv_data *pdata, unsigned int del)
609 } 609 }
610} 610}
611 611
612static int xgbe_request_irqs(struct xgbe_prv_data *pdata)
613{
614 struct xgbe_channel *channel;
615 struct net_device *netdev = pdata->netdev;
616 unsigned int i;
617 int ret;
618
619 ret = devm_request_irq(pdata->dev, pdata->dev_irq, xgbe_isr, 0,
620 netdev->name, pdata);
621 if (ret) {
622 netdev_alert(netdev, "error requesting irq %d\n",
623 pdata->dev_irq);
624 return ret;
625 }
626
627 if (!pdata->per_channel_irq)
628 return 0;
629
630 channel = pdata->channel;
631 for (i = 0; i < pdata->channel_count; i++, channel++) {
632 snprintf(channel->dma_irq_name,
633 sizeof(channel->dma_irq_name) - 1,
634 "%s-TxRx-%u", netdev_name(netdev),
635 channel->queue_index);
636
637 ret = devm_request_irq(pdata->dev, channel->dma_irq,
638 xgbe_dma_isr, 0,
639 channel->dma_irq_name, channel);
640 if (ret) {
641 netdev_alert(netdev, "error requesting irq %d\n",
642 channel->dma_irq);
643 goto err_irq;
644 }
645 }
646
647 return 0;
648
649err_irq:
650 /* Using an unsigned int, 'i' will go to UINT_MAX and exit */
651 for (i--, channel--; i < pdata->channel_count; i--, channel--)
652 devm_free_irq(pdata->dev, channel->dma_irq, channel);
653
654 devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
655
656 return ret;
657}
658
659static void xgbe_free_irqs(struct xgbe_prv_data *pdata)
660{
661 struct xgbe_channel *channel;
662 unsigned int i;
663
664 devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
665
666 if (!pdata->per_channel_irq)
667 return;
668
669 channel = pdata->channel;
670 for (i = 0; i < pdata->channel_count; i++, channel++)
671 devm_free_irq(pdata->dev, channel->dma_irq, channel);
672}
673
612void xgbe_init_tx_coalesce(struct xgbe_prv_data *pdata) 674void xgbe_init_tx_coalesce(struct xgbe_prv_data *pdata)
613{ 675{
614 struct xgbe_hw_if *hw_if = &pdata->hw_if; 676 struct xgbe_hw_if *hw_if = &pdata->hw_if;
@@ -810,20 +872,20 @@ int xgbe_powerdown(struct net_device *netdev, unsigned int caller)
810 return -EINVAL; 872 return -EINVAL;
811 } 873 }
812 874
813 phy_stop(pdata->phydev);
814
815 spin_lock_irqsave(&pdata->lock, flags); 875 spin_lock_irqsave(&pdata->lock, flags);
816 876
817 if (caller == XGMAC_DRIVER_CONTEXT) 877 if (caller == XGMAC_DRIVER_CONTEXT)
818 netif_device_detach(netdev); 878 netif_device_detach(netdev);
819 879
820 netif_tx_stop_all_queues(netdev); 880 netif_tx_stop_all_queues(netdev);
821 xgbe_napi_disable(pdata, 0);
822 881
823 /* Powerdown Tx/Rx */
824 hw_if->powerdown_tx(pdata); 882 hw_if->powerdown_tx(pdata);
825 hw_if->powerdown_rx(pdata); 883 hw_if->powerdown_rx(pdata);
826 884
885 xgbe_napi_disable(pdata, 0);
886
887 phy_stop(pdata->phydev);
888
827 pdata->power_down = 1; 889 pdata->power_down = 1;
828 890
829 spin_unlock_irqrestore(&pdata->lock, flags); 891 spin_unlock_irqrestore(&pdata->lock, flags);
@@ -854,14 +916,14 @@ int xgbe_powerup(struct net_device *netdev, unsigned int caller)
854 916
855 phy_start(pdata->phydev); 917 phy_start(pdata->phydev);
856 918
857 /* Enable Tx/Rx */ 919 xgbe_napi_enable(pdata, 0);
920
858 hw_if->powerup_tx(pdata); 921 hw_if->powerup_tx(pdata);
859 hw_if->powerup_rx(pdata); 922 hw_if->powerup_rx(pdata);
860 923
861 if (caller == XGMAC_DRIVER_CONTEXT) 924 if (caller == XGMAC_DRIVER_CONTEXT)
862 netif_device_attach(netdev); 925 netif_device_attach(netdev);
863 926
864 xgbe_napi_enable(pdata, 0);
865 netif_tx_start_all_queues(netdev); 927 netif_tx_start_all_queues(netdev);
866 928
867 spin_unlock_irqrestore(&pdata->lock, flags); 929 spin_unlock_irqrestore(&pdata->lock, flags);
@@ -875,6 +937,7 @@ static int xgbe_start(struct xgbe_prv_data *pdata)
875{ 937{
876 struct xgbe_hw_if *hw_if = &pdata->hw_if; 938 struct xgbe_hw_if *hw_if = &pdata->hw_if;
877 struct net_device *netdev = pdata->netdev; 939 struct net_device *netdev = pdata->netdev;
940 int ret;
878 941
879 DBGPR("-->xgbe_start\n"); 942 DBGPR("-->xgbe_start\n");
880 943
@@ -884,17 +947,31 @@ static int xgbe_start(struct xgbe_prv_data *pdata)
884 947
885 phy_start(pdata->phydev); 948 phy_start(pdata->phydev);
886 949
950 xgbe_napi_enable(pdata, 1);
951
952 ret = xgbe_request_irqs(pdata);
953 if (ret)
954 goto err_napi;
955
887 hw_if->enable_tx(pdata); 956 hw_if->enable_tx(pdata);
888 hw_if->enable_rx(pdata); 957 hw_if->enable_rx(pdata);
889 958
890 xgbe_init_tx_timers(pdata); 959 xgbe_init_tx_timers(pdata);
891 960
892 xgbe_napi_enable(pdata, 1);
893 netif_tx_start_all_queues(netdev); 961 netif_tx_start_all_queues(netdev);
894 962
895 DBGPR("<--xgbe_start\n"); 963 DBGPR("<--xgbe_start\n");
896 964
897 return 0; 965 return 0;
966
967err_napi:
968 xgbe_napi_disable(pdata, 1);
969
970 phy_stop(pdata->phydev);
971
972 hw_if->exit(pdata);
973
974 return ret;
898} 975}
899 976
900static void xgbe_stop(struct xgbe_prv_data *pdata) 977static void xgbe_stop(struct xgbe_prv_data *pdata)
@@ -907,16 +984,21 @@ static void xgbe_stop(struct xgbe_prv_data *pdata)
907 984
908 DBGPR("-->xgbe_stop\n"); 985 DBGPR("-->xgbe_stop\n");
909 986
910 phy_stop(pdata->phydev);
911
912 netif_tx_stop_all_queues(netdev); 987 netif_tx_stop_all_queues(netdev);
913 xgbe_napi_disable(pdata, 1);
914 988
915 xgbe_stop_tx_timers(pdata); 989 xgbe_stop_tx_timers(pdata);
916 990
917 hw_if->disable_tx(pdata); 991 hw_if->disable_tx(pdata);
918 hw_if->disable_rx(pdata); 992 hw_if->disable_rx(pdata);
919 993
994 xgbe_free_irqs(pdata);
995
996 xgbe_napi_disable(pdata, 1);
997
998 phy_stop(pdata->phydev);
999
1000 hw_if->exit(pdata);
1001
920 channel = pdata->channel; 1002 channel = pdata->channel;
921 for (i = 0; i < pdata->channel_count; i++, channel++) { 1003 for (i = 0; i < pdata->channel_count; i++, channel++) {
922 if (!channel->tx_ring) 1004 if (!channel->tx_ring)
@@ -931,10 +1013,6 @@ static void xgbe_stop(struct xgbe_prv_data *pdata)
931 1013
932static void xgbe_restart_dev(struct xgbe_prv_data *pdata) 1014static void xgbe_restart_dev(struct xgbe_prv_data *pdata)
933{ 1015{
934 struct xgbe_channel *channel;
935 struct xgbe_hw_if *hw_if = &pdata->hw_if;
936 unsigned int i;
937
938 DBGPR("-->xgbe_restart_dev\n"); 1016 DBGPR("-->xgbe_restart_dev\n");
939 1017
940 /* If not running, "restart" will happen on open */ 1018 /* If not running, "restart" will happen on open */
@@ -942,19 +1020,10 @@ static void xgbe_restart_dev(struct xgbe_prv_data *pdata)
942 return; 1020 return;
943 1021
944 xgbe_stop(pdata); 1022 xgbe_stop(pdata);
945 synchronize_irq(pdata->dev_irq);
946 if (pdata->per_channel_irq) {
947 channel = pdata->channel;
948 for (i = 0; i < pdata->channel_count; i++, channel++)
949 synchronize_irq(channel->dma_irq);
950 }
951 1023
952 xgbe_free_tx_data(pdata); 1024 xgbe_free_tx_data(pdata);
953 xgbe_free_rx_data(pdata); 1025 xgbe_free_rx_data(pdata);
954 1026
955 /* Issue software reset to device */
956 hw_if->exit(pdata);
957
958 xgbe_start(pdata); 1027 xgbe_start(pdata);
959 1028
960 DBGPR("<--xgbe_restart_dev\n"); 1029 DBGPR("<--xgbe_restart_dev\n");
@@ -1283,10 +1352,7 @@ static void xgbe_packet_info(struct xgbe_prv_data *pdata,
1283static int xgbe_open(struct net_device *netdev) 1352static int xgbe_open(struct net_device *netdev)
1284{ 1353{
1285 struct xgbe_prv_data *pdata = netdev_priv(netdev); 1354 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1286 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1287 struct xgbe_desc_if *desc_if = &pdata->desc_if; 1355 struct xgbe_desc_if *desc_if = &pdata->desc_if;
1288 struct xgbe_channel *channel = NULL;
1289 unsigned int i = 0;
1290 int ret; 1356 int ret;
1291 1357
1292 DBGPR("-->xgbe_open\n"); 1358 DBGPR("-->xgbe_open\n");
@@ -1329,55 +1395,14 @@ static int xgbe_open(struct net_device *netdev)
1329 INIT_WORK(&pdata->restart_work, xgbe_restart); 1395 INIT_WORK(&pdata->restart_work, xgbe_restart);
1330 INIT_WORK(&pdata->tx_tstamp_work, xgbe_tx_tstamp); 1396 INIT_WORK(&pdata->tx_tstamp_work, xgbe_tx_tstamp);
1331 1397
1332 /* Request interrupts */
1333 ret = devm_request_irq(pdata->dev, pdata->dev_irq, xgbe_isr, 0,
1334 netdev->name, pdata);
1335 if (ret) {
1336 netdev_alert(netdev, "error requesting irq %d\n",
1337 pdata->dev_irq);
1338 goto err_rings;
1339 }
1340
1341 if (pdata->per_channel_irq) {
1342 channel = pdata->channel;
1343 for (i = 0; i < pdata->channel_count; i++, channel++) {
1344 snprintf(channel->dma_irq_name,
1345 sizeof(channel->dma_irq_name) - 1,
1346 "%s-TxRx-%u", netdev_name(netdev),
1347 channel->queue_index);
1348
1349 ret = devm_request_irq(pdata->dev, channel->dma_irq,
1350 xgbe_dma_isr, 0,
1351 channel->dma_irq_name, channel);
1352 if (ret) {
1353 netdev_alert(netdev,
1354 "error requesting irq %d\n",
1355 channel->dma_irq);
1356 goto err_irq;
1357 }
1358 }
1359 }
1360
1361 ret = xgbe_start(pdata); 1398 ret = xgbe_start(pdata);
1362 if (ret) 1399 if (ret)
1363 goto err_start; 1400 goto err_rings;
1364 1401
1365 DBGPR("<--xgbe_open\n"); 1402 DBGPR("<--xgbe_open\n");
1366 1403
1367 return 0; 1404 return 0;
1368 1405
1369err_start:
1370 hw_if->exit(pdata);
1371
1372err_irq:
1373 if (pdata->per_channel_irq) {
1374 /* Using an unsigned int, 'i' will go to UINT_MAX and exit */
1375 for (i--, channel--; i < pdata->channel_count; i--, channel--)
1376 devm_free_irq(pdata->dev, channel->dma_irq, channel);
1377 }
1378
1379 devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
1380
1381err_rings: 1406err_rings:
1382 desc_if->free_ring_resources(pdata); 1407 desc_if->free_ring_resources(pdata);
1383 1408
@@ -1399,30 +1424,16 @@ err_phy_init:
1399static int xgbe_close(struct net_device *netdev) 1424static int xgbe_close(struct net_device *netdev)
1400{ 1425{
1401 struct xgbe_prv_data *pdata = netdev_priv(netdev); 1426 struct xgbe_prv_data *pdata = netdev_priv(netdev);
1402 struct xgbe_hw_if *hw_if = &pdata->hw_if;
1403 struct xgbe_desc_if *desc_if = &pdata->desc_if; 1427 struct xgbe_desc_if *desc_if = &pdata->desc_if;
1404 struct xgbe_channel *channel;
1405 unsigned int i;
1406 1428
1407 DBGPR("-->xgbe_close\n"); 1429 DBGPR("-->xgbe_close\n");
1408 1430
1409 /* Stop the device */ 1431 /* Stop the device */
1410 xgbe_stop(pdata); 1432 xgbe_stop(pdata);
1411 1433
1412 /* Issue software reset to device */
1413 hw_if->exit(pdata);
1414
1415 /* Free the ring descriptors and buffers */ 1434 /* Free the ring descriptors and buffers */
1416 desc_if->free_ring_resources(pdata); 1435 desc_if->free_ring_resources(pdata);
1417 1436
1418 /* Release the interrupts */
1419 devm_free_irq(pdata->dev, pdata->dev_irq, pdata);
1420 if (pdata->per_channel_irq) {
1421 channel = pdata->channel;
1422 for (i = 0; i < pdata->channel_count; i++, channel++)
1423 devm_free_irq(pdata->dev, channel->dma_irq, channel);
1424 }
1425
1426 /* Free the channel and ring structures */ 1437 /* Free the channel and ring structures */
1427 xgbe_free_channels(pdata); 1438 xgbe_free_channels(pdata);
1428 1439
diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c b/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
index 869d97fcf781..b927021c6c40 100644
--- a/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
+++ b/drivers/net/ethernet/apm/xgene/xgene_enet_hw.c
@@ -593,7 +593,7 @@ static int xgene_enet_reset(struct xgene_enet_pdata *pdata)
593 if (!xgene_ring_mgr_init(pdata)) 593 if (!xgene_ring_mgr_init(pdata))
594 return -ENODEV; 594 return -ENODEV;
595 595
596 if (!efi_enabled(EFI_BOOT)) { 596 if (pdata->clk) {
597 clk_prepare_enable(pdata->clk); 597 clk_prepare_enable(pdata->clk);
598 clk_disable_unprepare(pdata->clk); 598 clk_disable_unprepare(pdata->clk);
599 clk_prepare_enable(pdata->clk); 599 clk_prepare_enable(pdata->clk);
diff --git a/drivers/net/ethernet/apm/xgene/xgene_enet_main.c b/drivers/net/ethernet/apm/xgene/xgene_enet_main.c
index 4de62b210c85..635a83be7e5e 100644
--- a/drivers/net/ethernet/apm/xgene/xgene_enet_main.c
+++ b/drivers/net/ethernet/apm/xgene/xgene_enet_main.c
@@ -1025,6 +1025,8 @@ static int xgene_enet_remove(struct platform_device *pdev)
1025#ifdef CONFIG_ACPI 1025#ifdef CONFIG_ACPI
1026static const struct acpi_device_id xgene_enet_acpi_match[] = { 1026static const struct acpi_device_id xgene_enet_acpi_match[] = {
1027 { "APMC0D05", }, 1027 { "APMC0D05", },
1028 { "APMC0D30", },
1029 { "APMC0D31", },
1028 { } 1030 { }
1029}; 1031};
1030MODULE_DEVICE_TABLE(acpi, xgene_enet_acpi_match); 1032MODULE_DEVICE_TABLE(acpi, xgene_enet_acpi_match);
@@ -1033,6 +1035,8 @@ MODULE_DEVICE_TABLE(acpi, xgene_enet_acpi_match);
1033#ifdef CONFIG_OF 1035#ifdef CONFIG_OF
1034static struct of_device_id xgene_enet_of_match[] = { 1036static struct of_device_id xgene_enet_of_match[] = {
1035 {.compatible = "apm,xgene-enet",}, 1037 {.compatible = "apm,xgene-enet",},
1038 {.compatible = "apm,xgene1-sgenet",},
1039 {.compatible = "apm,xgene1-xgenet",},
1036 {}, 1040 {},
1037}; 1041};
1038 1042
diff --git a/drivers/net/ethernet/broadcom/bcm63xx_enet.c b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
index 21206d33b638..a7f2cc3e485e 100644
--- a/drivers/net/ethernet/broadcom/bcm63xx_enet.c
+++ b/drivers/net/ethernet/broadcom/bcm63xx_enet.c
@@ -486,7 +486,7 @@ static int bcm_enet_poll(struct napi_struct *napi, int budget)
486{ 486{
487 struct bcm_enet_priv *priv; 487 struct bcm_enet_priv *priv;
488 struct net_device *dev; 488 struct net_device *dev;
489 int tx_work_done, rx_work_done; 489 int rx_work_done;
490 490
491 priv = container_of(napi, struct bcm_enet_priv, napi); 491 priv = container_of(napi, struct bcm_enet_priv, napi);
492 dev = priv->net_dev; 492 dev = priv->net_dev;
@@ -498,14 +498,14 @@ static int bcm_enet_poll(struct napi_struct *napi, int budget)
498 ENETDMAC_IR, priv->tx_chan); 498 ENETDMAC_IR, priv->tx_chan);
499 499
500 /* reclaim sent skb */ 500 /* reclaim sent skb */
501 tx_work_done = bcm_enet_tx_reclaim(dev, 0); 501 bcm_enet_tx_reclaim(dev, 0);
502 502
503 spin_lock(&priv->rx_lock); 503 spin_lock(&priv->rx_lock);
504 rx_work_done = bcm_enet_receive_queue(dev, budget); 504 rx_work_done = bcm_enet_receive_queue(dev, budget);
505 spin_unlock(&priv->rx_lock); 505 spin_unlock(&priv->rx_lock);
506 506
507 if (rx_work_done >= budget || tx_work_done > 0) { 507 if (rx_work_done >= budget) {
508 /* rx/tx queue is not yet empty/clean */ 508 /* rx queue is not yet empty/clean */
509 return rx_work_done; 509 return rx_work_done;
510 } 510 }
511 511
diff --git a/drivers/net/ethernet/broadcom/bcmsysport.c b/drivers/net/ethernet/broadcom/bcmsysport.c
index 5b308a4a4d0e..783543ad1fcf 100644
--- a/drivers/net/ethernet/broadcom/bcmsysport.c
+++ b/drivers/net/ethernet/broadcom/bcmsysport.c
@@ -274,9 +274,9 @@ static const struct bcm_sysport_stats bcm_sysport_gstrings_stats[] = {
274 /* RBUF misc statistics */ 274 /* RBUF misc statistics */
275 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR), 275 STAT_RBUF("rbuf_ovflow_cnt", mib.rbuf_ovflow_cnt, RBUF_OVFL_DISC_CNTR),
276 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR), 276 STAT_RBUF("rbuf_err_cnt", mib.rbuf_err_cnt, RBUF_ERR_PKT_CNTR),
277 STAT_MIB_RX("alloc_rx_buff_failed", mib.alloc_rx_buff_failed), 277 STAT_MIB_SOFT("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
278 STAT_MIB_RX("rx_dma_failed", mib.rx_dma_failed), 278 STAT_MIB_SOFT("rx_dma_failed", mib.rx_dma_failed),
279 STAT_MIB_TX("tx_dma_failed", mib.tx_dma_failed), 279 STAT_MIB_SOFT("tx_dma_failed", mib.tx_dma_failed),
280}; 280};
281 281
282#define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats) 282#define BCM_SYSPORT_STATS_LEN ARRAY_SIZE(bcm_sysport_gstrings_stats)
@@ -345,6 +345,7 @@ static void bcm_sysport_update_mib_counters(struct bcm_sysport_priv *priv)
345 s = &bcm_sysport_gstrings_stats[i]; 345 s = &bcm_sysport_gstrings_stats[i];
346 switch (s->type) { 346 switch (s->type) {
347 case BCM_SYSPORT_STAT_NETDEV: 347 case BCM_SYSPORT_STAT_NETDEV:
348 case BCM_SYSPORT_STAT_SOFT:
348 continue; 349 continue;
349 case BCM_SYSPORT_STAT_MIB_RX: 350 case BCM_SYSPORT_STAT_MIB_RX:
350 case BCM_SYSPORT_STAT_MIB_TX: 351 case BCM_SYSPORT_STAT_MIB_TX:
diff --git a/drivers/net/ethernet/broadcom/bcmsysport.h b/drivers/net/ethernet/broadcom/bcmsysport.h
index fc19417d82a5..7e3d87a88c76 100644
--- a/drivers/net/ethernet/broadcom/bcmsysport.h
+++ b/drivers/net/ethernet/broadcom/bcmsysport.h
@@ -570,6 +570,7 @@ enum bcm_sysport_stat_type {
570 BCM_SYSPORT_STAT_RUNT, 570 BCM_SYSPORT_STAT_RUNT,
571 BCM_SYSPORT_STAT_RXCHK, 571 BCM_SYSPORT_STAT_RXCHK,
572 BCM_SYSPORT_STAT_RBUF, 572 BCM_SYSPORT_STAT_RBUF,
573 BCM_SYSPORT_STAT_SOFT,
573}; 574};
574 575
575/* Macros to help define ethtool statistics */ 576/* Macros to help define ethtool statistics */
@@ -590,6 +591,7 @@ enum bcm_sysport_stat_type {
590#define STAT_MIB_RX(str, m) STAT_MIB(str, m, BCM_SYSPORT_STAT_MIB_RX) 591#define STAT_MIB_RX(str, m) STAT_MIB(str, m, BCM_SYSPORT_STAT_MIB_RX)
591#define STAT_MIB_TX(str, m) STAT_MIB(str, m, BCM_SYSPORT_STAT_MIB_TX) 592#define STAT_MIB_TX(str, m) STAT_MIB(str, m, BCM_SYSPORT_STAT_MIB_TX)
592#define STAT_RUNT(str, m) STAT_MIB(str, m, BCM_SYSPORT_STAT_RUNT) 593#define STAT_RUNT(str, m) STAT_MIB(str, m, BCM_SYSPORT_STAT_RUNT)
594#define STAT_MIB_SOFT(str, m) STAT_MIB(str, m, BCM_SYSPORT_STAT_SOFT)
593 595
594#define STAT_RXCHK(str, m, ofs) { \ 596#define STAT_RXCHK(str, m, ofs) { \
595 .stat_string = str, \ 597 .stat_string = str, \
diff --git a/drivers/net/ethernet/broadcom/bgmac.c b/drivers/net/ethernet/broadcom/bgmac.c
index 676ffe093180..0469f72c6e7e 100644
--- a/drivers/net/ethernet/broadcom/bgmac.c
+++ b/drivers/net/ethernet/broadcom/bgmac.c
@@ -302,9 +302,6 @@ static int bgmac_dma_rx_skb_for_slot(struct bgmac *bgmac,
302 slot->skb = skb; 302 slot->skb = skb;
303 slot->dma_addr = dma_addr; 303 slot->dma_addr = dma_addr;
304 304
305 if (slot->dma_addr & 0xC0000000)
306 bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
307
308 return 0; 305 return 0;
309} 306}
310 307
@@ -505,8 +502,6 @@ static int bgmac_dma_alloc(struct bgmac *bgmac)
505 ring->mmio_base); 502 ring->mmio_base);
506 goto err_dma_free; 503 goto err_dma_free;
507 } 504 }
508 if (ring->dma_base & 0xC0000000)
509 bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
510 505
511 ring->unaligned = bgmac_dma_unaligned(bgmac, ring, 506 ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
512 BGMAC_DMA_RING_TX); 507 BGMAC_DMA_RING_TX);
@@ -536,8 +531,6 @@ static int bgmac_dma_alloc(struct bgmac *bgmac)
536 err = -ENOMEM; 531 err = -ENOMEM;
537 goto err_dma_free; 532 goto err_dma_free;
538 } 533 }
539 if (ring->dma_base & 0xC0000000)
540 bgmac_warn(bgmac, "DMA address using 0xC0000000 bit(s), it may need translation trick\n");
541 534
542 ring->unaligned = bgmac_dma_unaligned(bgmac, ring, 535 ring->unaligned = bgmac_dma_unaligned(bgmac, ring,
543 BGMAC_DMA_RING_RX); 536 BGMAC_DMA_RING_RX);
diff --git a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
index 7155e1d2c208..996e215fc324 100644
--- a/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
+++ b/drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
@@ -12722,6 +12722,9 @@ static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev,
12722 pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS, 12722 pci_write_config_dword(bp->pdev, PCICFG_GRC_ADDRESS,
12723 PCICFG_VENDOR_ID_OFFSET); 12723 PCICFG_VENDOR_ID_OFFSET);
12724 12724
12725 /* Set PCIe reset type to fundamental for EEH recovery */
12726 pdev->needs_freset = 1;
12727
12725 /* AER (Advanced Error reporting) configuration */ 12728 /* AER (Advanced Error reporting) configuration */
12726 rc = pci_enable_pcie_error_reporting(pdev); 12729 rc = pci_enable_pcie_error_reporting(pdev);
12727 if (!rc) 12730 if (!rc)
@@ -12766,7 +12769,7 @@ static int bnx2x_init_dev(struct bnx2x *bp, struct pci_dev *pdev,
12766 NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6 | 12769 NETIF_F_TSO | NETIF_F_TSO_ECN | NETIF_F_TSO6 |
12767 NETIF_F_RXCSUM | NETIF_F_LRO | NETIF_F_GRO | 12770 NETIF_F_RXCSUM | NETIF_F_LRO | NETIF_F_GRO |
12768 NETIF_F_RXHASH | NETIF_F_HW_VLAN_CTAG_TX; 12771 NETIF_F_RXHASH | NETIF_F_HW_VLAN_CTAG_TX;
12769 if (!CHIP_IS_E1x(bp)) { 12772 if (!chip_is_e1x) {
12770 dev->hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL | 12773 dev->hw_features |= NETIF_F_GSO_GRE | NETIF_F_GSO_UDP_TUNNEL |
12771 NETIF_F_GSO_IPIP | NETIF_F_GSO_SIT; 12774 NETIF_F_GSO_IPIP | NETIF_F_GSO_SIT;
12772 dev->hw_enc_features = 12775 dev->hw_enc_features =
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.c b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
index ff83c46bc389..6befde61c203 100644
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.c
@@ -487,6 +487,7 @@ enum bcmgenet_stat_type {
487 BCMGENET_STAT_MIB_TX, 487 BCMGENET_STAT_MIB_TX,
488 BCMGENET_STAT_RUNT, 488 BCMGENET_STAT_RUNT,
489 BCMGENET_STAT_MISC, 489 BCMGENET_STAT_MISC,
490 BCMGENET_STAT_SOFT,
490}; 491};
491 492
492struct bcmgenet_stats { 493struct bcmgenet_stats {
@@ -515,6 +516,7 @@ struct bcmgenet_stats {
515#define STAT_GENET_MIB_RX(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_MIB_RX) 516#define STAT_GENET_MIB_RX(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_MIB_RX)
516#define STAT_GENET_MIB_TX(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_MIB_TX) 517#define STAT_GENET_MIB_TX(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_MIB_TX)
517#define STAT_GENET_RUNT(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_RUNT) 518#define STAT_GENET_RUNT(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_RUNT)
519#define STAT_GENET_SOFT_MIB(str, m) STAT_GENET_MIB(str, m, BCMGENET_STAT_SOFT)
518 520
519#define STAT_GENET_MISC(str, m, offset) { \ 521#define STAT_GENET_MISC(str, m, offset) { \
520 .stat_string = str, \ 522 .stat_string = str, \
@@ -614,9 +616,9 @@ static const struct bcmgenet_stats bcmgenet_gstrings_stats[] = {
614 UMAC_RBUF_OVFL_CNT), 616 UMAC_RBUF_OVFL_CNT),
615 STAT_GENET_MISC("rbuf_err_cnt", mib.rbuf_err_cnt, UMAC_RBUF_ERR_CNT), 617 STAT_GENET_MISC("rbuf_err_cnt", mib.rbuf_err_cnt, UMAC_RBUF_ERR_CNT),
616 STAT_GENET_MISC("mdf_err_cnt", mib.mdf_err_cnt, UMAC_MDF_ERR_CNT), 618 STAT_GENET_MISC("mdf_err_cnt", mib.mdf_err_cnt, UMAC_MDF_ERR_CNT),
617 STAT_GENET_MIB_RX("alloc_rx_buff_failed", mib.alloc_rx_buff_failed), 619 STAT_GENET_SOFT_MIB("alloc_rx_buff_failed", mib.alloc_rx_buff_failed),
618 STAT_GENET_MIB_RX("rx_dma_failed", mib.rx_dma_failed), 620 STAT_GENET_SOFT_MIB("rx_dma_failed", mib.rx_dma_failed),
619 STAT_GENET_MIB_TX("tx_dma_failed", mib.tx_dma_failed), 621 STAT_GENET_SOFT_MIB("tx_dma_failed", mib.tx_dma_failed),
620}; 622};
621 623
622#define BCMGENET_STATS_LEN ARRAY_SIZE(bcmgenet_gstrings_stats) 624#define BCMGENET_STATS_LEN ARRAY_SIZE(bcmgenet_gstrings_stats)
@@ -668,6 +670,7 @@ static void bcmgenet_update_mib_counters(struct bcmgenet_priv *priv)
668 s = &bcmgenet_gstrings_stats[i]; 670 s = &bcmgenet_gstrings_stats[i];
669 switch (s->type) { 671 switch (s->type) {
670 case BCMGENET_STAT_NETDEV: 672 case BCMGENET_STAT_NETDEV:
673 case BCMGENET_STAT_SOFT:
671 continue; 674 continue;
672 case BCMGENET_STAT_MIB_RX: 675 case BCMGENET_STAT_MIB_RX:
673 case BCMGENET_STAT_MIB_TX: 676 case BCMGENET_STAT_MIB_TX:
@@ -971,13 +974,14 @@ static inline void bcmgenet_tx_ring_int_disable(struct bcmgenet_priv *priv,
971} 974}
972 975
973/* Unlocked version of the reclaim routine */ 976/* Unlocked version of the reclaim routine */
974static void __bcmgenet_tx_reclaim(struct net_device *dev, 977static unsigned int __bcmgenet_tx_reclaim(struct net_device *dev,
975 struct bcmgenet_tx_ring *ring) 978 struct bcmgenet_tx_ring *ring)
976{ 979{
977 struct bcmgenet_priv *priv = netdev_priv(dev); 980 struct bcmgenet_priv *priv = netdev_priv(dev);
978 int last_tx_cn, last_c_index, num_tx_bds; 981 int last_tx_cn, last_c_index, num_tx_bds;
979 struct enet_cb *tx_cb_ptr; 982 struct enet_cb *tx_cb_ptr;
980 struct netdev_queue *txq; 983 struct netdev_queue *txq;
984 unsigned int pkts_compl = 0;
981 unsigned int bds_compl; 985 unsigned int bds_compl;
982 unsigned int c_index; 986 unsigned int c_index;
983 987
@@ -1005,6 +1009,7 @@ static void __bcmgenet_tx_reclaim(struct net_device *dev,
1005 tx_cb_ptr = ring->cbs + last_c_index; 1009 tx_cb_ptr = ring->cbs + last_c_index;
1006 bds_compl = 0; 1010 bds_compl = 0;
1007 if (tx_cb_ptr->skb) { 1011 if (tx_cb_ptr->skb) {
1012 pkts_compl++;
1008 bds_compl = skb_shinfo(tx_cb_ptr->skb)->nr_frags + 1; 1013 bds_compl = skb_shinfo(tx_cb_ptr->skb)->nr_frags + 1;
1009 dev->stats.tx_bytes += tx_cb_ptr->skb->len; 1014 dev->stats.tx_bytes += tx_cb_ptr->skb->len;
1010 dma_unmap_single(&dev->dev, 1015 dma_unmap_single(&dev->dev,
@@ -1028,23 +1033,45 @@ static void __bcmgenet_tx_reclaim(struct net_device *dev,
1028 last_c_index &= (num_tx_bds - 1); 1033 last_c_index &= (num_tx_bds - 1);
1029 } 1034 }
1030 1035
1031 if (ring->free_bds > (MAX_SKB_FRAGS + 1)) 1036 if (ring->free_bds > (MAX_SKB_FRAGS + 1)) {
1032 ring->int_disable(priv, ring); 1037 if (netif_tx_queue_stopped(txq))
1033 1038 netif_tx_wake_queue(txq);
1034 if (netif_tx_queue_stopped(txq)) 1039 }
1035 netif_tx_wake_queue(txq);
1036 1040
1037 ring->c_index = c_index; 1041 ring->c_index = c_index;
1042
1043 return pkts_compl;
1038} 1044}
1039 1045
1040static void bcmgenet_tx_reclaim(struct net_device *dev, 1046static unsigned int bcmgenet_tx_reclaim(struct net_device *dev,
1041 struct bcmgenet_tx_ring *ring) 1047 struct bcmgenet_tx_ring *ring)
1042{ 1048{
1049 unsigned int released;
1043 unsigned long flags; 1050 unsigned long flags;
1044 1051
1045 spin_lock_irqsave(&ring->lock, flags); 1052 spin_lock_irqsave(&ring->lock, flags);
1046 __bcmgenet_tx_reclaim(dev, ring); 1053 released = __bcmgenet_tx_reclaim(dev, ring);
1047 spin_unlock_irqrestore(&ring->lock, flags); 1054 spin_unlock_irqrestore(&ring->lock, flags);
1055
1056 return released;
1057}
1058
1059static int bcmgenet_tx_poll(struct napi_struct *napi, int budget)
1060{
1061 struct bcmgenet_tx_ring *ring =
1062 container_of(napi, struct bcmgenet_tx_ring, napi);
1063 unsigned int work_done = 0;
1064
1065 work_done = bcmgenet_tx_reclaim(ring->priv->dev, ring);
1066
1067 if (work_done == 0) {
1068 napi_complete(napi);
1069 ring->int_enable(ring->priv, ring);
1070
1071 return 0;
1072 }
1073
1074 return budget;
1048} 1075}
1049 1076
1050static void bcmgenet_tx_reclaim_all(struct net_device *dev) 1077static void bcmgenet_tx_reclaim_all(struct net_device *dev)
@@ -1302,10 +1329,8 @@ static netdev_tx_t bcmgenet_xmit(struct sk_buff *skb, struct net_device *dev)
1302 bcmgenet_tdma_ring_writel(priv, ring->index, 1329 bcmgenet_tdma_ring_writel(priv, ring->index,
1303 ring->prod_index, TDMA_PROD_INDEX); 1330 ring->prod_index, TDMA_PROD_INDEX);
1304 1331
1305 if (ring->free_bds <= (MAX_SKB_FRAGS + 1)) { 1332 if (ring->free_bds <= (MAX_SKB_FRAGS + 1))
1306 netif_tx_stop_queue(txq); 1333 netif_tx_stop_queue(txq);
1307 ring->int_enable(priv, ring);
1308 }
1309 1334
1310out: 1335out:
1311 spin_unlock_irqrestore(&ring->lock, flags); 1336 spin_unlock_irqrestore(&ring->lock, flags);
@@ -1621,6 +1646,7 @@ static int init_umac(struct bcmgenet_priv *priv)
1621 struct device *kdev = &priv->pdev->dev; 1646 struct device *kdev = &priv->pdev->dev;
1622 int ret; 1647 int ret;
1623 u32 reg, cpu_mask_clear; 1648 u32 reg, cpu_mask_clear;
1649 int index;
1624 1650
1625 dev_dbg(&priv->pdev->dev, "bcmgenet: init_umac\n"); 1651 dev_dbg(&priv->pdev->dev, "bcmgenet: init_umac\n");
1626 1652
@@ -1647,7 +1673,7 @@ static int init_umac(struct bcmgenet_priv *priv)
1647 1673
1648 bcmgenet_intr_disable(priv); 1674 bcmgenet_intr_disable(priv);
1649 1675
1650 cpu_mask_clear = UMAC_IRQ_RXDMA_BDONE; 1676 cpu_mask_clear = UMAC_IRQ_RXDMA_BDONE | UMAC_IRQ_TXDMA_BDONE;
1651 1677
1652 dev_dbg(kdev, "%s:Enabling RXDMA_BDONE interrupt\n", __func__); 1678 dev_dbg(kdev, "%s:Enabling RXDMA_BDONE interrupt\n", __func__);
1653 1679
@@ -1674,6 +1700,10 @@ static int init_umac(struct bcmgenet_priv *priv)
1674 1700
1675 bcmgenet_intrl2_0_writel(priv, cpu_mask_clear, INTRL2_CPU_MASK_CLEAR); 1701 bcmgenet_intrl2_0_writel(priv, cpu_mask_clear, INTRL2_CPU_MASK_CLEAR);
1676 1702
1703 for (index = 0; index < priv->hw_params->tx_queues; index++)
1704 bcmgenet_intrl2_1_writel(priv, (1 << index),
1705 INTRL2_CPU_MASK_CLEAR);
1706
1677 /* Enable rx/tx engine.*/ 1707 /* Enable rx/tx engine.*/
1678 dev_dbg(kdev, "done init umac\n"); 1708 dev_dbg(kdev, "done init umac\n");
1679 1709
@@ -1693,6 +1723,8 @@ static void bcmgenet_init_tx_ring(struct bcmgenet_priv *priv,
1693 unsigned int first_bd; 1723 unsigned int first_bd;
1694 1724
1695 spin_lock_init(&ring->lock); 1725 spin_lock_init(&ring->lock);
1726 ring->priv = priv;
1727 netif_napi_add(priv->dev, &ring->napi, bcmgenet_tx_poll, 64);
1696 ring->index = index; 1728 ring->index = index;
1697 if (index == DESC_INDEX) { 1729 if (index == DESC_INDEX) {
1698 ring->queue = 0; 1730 ring->queue = 0;
@@ -1738,6 +1770,17 @@ static void bcmgenet_init_tx_ring(struct bcmgenet_priv *priv,
1738 TDMA_WRITE_PTR); 1770 TDMA_WRITE_PTR);
1739 bcmgenet_tdma_ring_writel(priv, index, end_ptr * words_per_bd - 1, 1771 bcmgenet_tdma_ring_writel(priv, index, end_ptr * words_per_bd - 1,
1740 DMA_END_ADDR); 1772 DMA_END_ADDR);
1773
1774 napi_enable(&ring->napi);
1775}
1776
1777static void bcmgenet_fini_tx_ring(struct bcmgenet_priv *priv,
1778 unsigned int index)
1779{
1780 struct bcmgenet_tx_ring *ring = &priv->tx_rings[index];
1781
1782 napi_disable(&ring->napi);
1783 netif_napi_del(&ring->napi);
1741} 1784}
1742 1785
1743/* Initialize a RDMA ring */ 1786/* Initialize a RDMA ring */
@@ -1907,7 +1950,7 @@ static int bcmgenet_dma_teardown(struct bcmgenet_priv *priv)
1907 return ret; 1950 return ret;
1908} 1951}
1909 1952
1910static void bcmgenet_fini_dma(struct bcmgenet_priv *priv) 1953static void __bcmgenet_fini_dma(struct bcmgenet_priv *priv)
1911{ 1954{
1912 int i; 1955 int i;
1913 1956
@@ -1926,6 +1969,18 @@ static void bcmgenet_fini_dma(struct bcmgenet_priv *priv)
1926 kfree(priv->tx_cbs); 1969 kfree(priv->tx_cbs);
1927} 1970}
1928 1971
1972static void bcmgenet_fini_dma(struct bcmgenet_priv *priv)
1973{
1974 int i;
1975
1976 bcmgenet_fini_tx_ring(priv, DESC_INDEX);
1977
1978 for (i = 0; i < priv->hw_params->tx_queues; i++)
1979 bcmgenet_fini_tx_ring(priv, i);
1980
1981 __bcmgenet_fini_dma(priv);
1982}
1983
1929/* init_edma: Initialize DMA control register */ 1984/* init_edma: Initialize DMA control register */
1930static int bcmgenet_init_dma(struct bcmgenet_priv *priv) 1985static int bcmgenet_init_dma(struct bcmgenet_priv *priv)
1931{ 1986{
@@ -1952,7 +2007,7 @@ static int bcmgenet_init_dma(struct bcmgenet_priv *priv)
1952 priv->tx_cbs = kcalloc(priv->num_tx_bds, sizeof(struct enet_cb), 2007 priv->tx_cbs = kcalloc(priv->num_tx_bds, sizeof(struct enet_cb),
1953 GFP_KERNEL); 2008 GFP_KERNEL);
1954 if (!priv->tx_cbs) { 2009 if (!priv->tx_cbs) {
1955 bcmgenet_fini_dma(priv); 2010 __bcmgenet_fini_dma(priv);
1956 return -ENOMEM; 2011 return -ENOMEM;
1957 } 2012 }
1958 2013
@@ -1975,9 +2030,6 @@ static int bcmgenet_poll(struct napi_struct *napi, int budget)
1975 struct bcmgenet_priv, napi); 2030 struct bcmgenet_priv, napi);
1976 unsigned int work_done; 2031 unsigned int work_done;
1977 2032
1978 /* tx reclaim */
1979 bcmgenet_tx_reclaim(priv->dev, &priv->tx_rings[DESC_INDEX]);
1980
1981 work_done = bcmgenet_desc_rx(priv, budget); 2033 work_done = bcmgenet_desc_rx(priv, budget);
1982 2034
1983 /* Advancing our consumer index*/ 2035 /* Advancing our consumer index*/
@@ -2022,28 +2074,34 @@ static void bcmgenet_irq_task(struct work_struct *work)
2022static irqreturn_t bcmgenet_isr1(int irq, void *dev_id) 2074static irqreturn_t bcmgenet_isr1(int irq, void *dev_id)
2023{ 2075{
2024 struct bcmgenet_priv *priv = dev_id; 2076 struct bcmgenet_priv *priv = dev_id;
2077 struct bcmgenet_tx_ring *ring;
2025 unsigned int index; 2078 unsigned int index;
2026 2079
2027 /* Save irq status for bottom-half processing. */ 2080 /* Save irq status for bottom-half processing. */
2028 priv->irq1_stat = 2081 priv->irq1_stat =
2029 bcmgenet_intrl2_1_readl(priv, INTRL2_CPU_STAT) & 2082 bcmgenet_intrl2_1_readl(priv, INTRL2_CPU_STAT) &
2030 ~priv->int1_mask; 2083 ~bcmgenet_intrl2_1_readl(priv, INTRL2_CPU_MASK_STATUS);
2031 /* clear interrupts */ 2084 /* clear interrupts */
2032 bcmgenet_intrl2_1_writel(priv, priv->irq1_stat, INTRL2_CPU_CLEAR); 2085 bcmgenet_intrl2_1_writel(priv, priv->irq1_stat, INTRL2_CPU_CLEAR);
2033 2086
2034 netif_dbg(priv, intr, priv->dev, 2087 netif_dbg(priv, intr, priv->dev,
2035 "%s: IRQ=0x%x\n", __func__, priv->irq1_stat); 2088 "%s: IRQ=0x%x\n", __func__, priv->irq1_stat);
2089
2036 /* Check the MBDONE interrupts. 2090 /* Check the MBDONE interrupts.
2037 * packet is done, reclaim descriptors 2091 * packet is done, reclaim descriptors
2038 */ 2092 */
2039 if (priv->irq1_stat & 0x0000ffff) { 2093 for (index = 0; index < priv->hw_params->tx_queues; index++) {
2040 index = 0; 2094 if (!(priv->irq1_stat & BIT(index)))
2041 for (index = 0; index < 16; index++) { 2095 continue;
2042 if (priv->irq1_stat & (1 << index)) 2096
2043 bcmgenet_tx_reclaim(priv->dev, 2097 ring = &priv->tx_rings[index];
2044 &priv->tx_rings[index]); 2098
2099 if (likely(napi_schedule_prep(&ring->napi))) {
2100 ring->int_disable(priv, ring);
2101 __napi_schedule(&ring->napi);
2045 } 2102 }
2046 } 2103 }
2104
2047 return IRQ_HANDLED; 2105 return IRQ_HANDLED;
2048} 2106}
2049 2107
@@ -2075,8 +2133,12 @@ static irqreturn_t bcmgenet_isr0(int irq, void *dev_id)
2075 } 2133 }
2076 if (priv->irq0_stat & 2134 if (priv->irq0_stat &
2077 (UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE)) { 2135 (UMAC_IRQ_TXDMA_BDONE | UMAC_IRQ_TXDMA_PDONE)) {
2078 /* Tx reclaim */ 2136 struct bcmgenet_tx_ring *ring = &priv->tx_rings[DESC_INDEX];
2079 bcmgenet_tx_reclaim(priv->dev, &priv->tx_rings[DESC_INDEX]); 2137
2138 if (likely(napi_schedule_prep(&ring->napi))) {
2139 ring->int_disable(priv, ring);
2140 __napi_schedule(&ring->napi);
2141 }
2080 } 2142 }
2081 if (priv->irq0_stat & (UMAC_IRQ_PHY_DET_R | 2143 if (priv->irq0_stat & (UMAC_IRQ_PHY_DET_R |
2082 UMAC_IRQ_PHY_DET_F | 2144 UMAC_IRQ_PHY_DET_F |
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet.h b/drivers/net/ethernet/broadcom/genet/bcmgenet.h
index b36ddec0cc0a..0d370d168aee 100644
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet.h
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet.h
@@ -520,6 +520,7 @@ struct bcmgenet_hw_params {
520 520
521struct bcmgenet_tx_ring { 521struct bcmgenet_tx_ring {
522 spinlock_t lock; /* ring lock */ 522 spinlock_t lock; /* ring lock */
523 struct napi_struct napi; /* NAPI per tx queue */
523 unsigned int index; /* ring index */ 524 unsigned int index; /* ring index */
524 unsigned int queue; /* queue index */ 525 unsigned int queue; /* queue index */
525 struct enet_cb *cbs; /* tx ring buffer control block*/ 526 struct enet_cb *cbs; /* tx ring buffer control block*/
@@ -534,6 +535,7 @@ struct bcmgenet_tx_ring {
534 struct bcmgenet_tx_ring *); 535 struct bcmgenet_tx_ring *);
535 void (*int_disable)(struct bcmgenet_priv *priv, 536 void (*int_disable)(struct bcmgenet_priv *priv,
536 struct bcmgenet_tx_ring *); 537 struct bcmgenet_tx_ring *);
538 struct bcmgenet_priv *priv;
537}; 539};
538 540
539/* device context */ 541/* device context */
diff --git a/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c b/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c
index 149a0d70c108..b97122926d3a 100644
--- a/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c
+++ b/drivers/net/ethernet/broadcom/genet/bcmgenet_wol.c
@@ -73,15 +73,17 @@ int bcmgenet_set_wol(struct net_device *dev, struct ethtool_wolinfo *wol)
73 if (wol->wolopts & ~(WAKE_MAGIC | WAKE_MAGICSECURE)) 73 if (wol->wolopts & ~(WAKE_MAGIC | WAKE_MAGICSECURE))
74 return -EINVAL; 74 return -EINVAL;
75 75
76 reg = bcmgenet_umac_readl(priv, UMAC_MPD_CTRL);
76 if (wol->wolopts & WAKE_MAGICSECURE) { 77 if (wol->wolopts & WAKE_MAGICSECURE) {
77 bcmgenet_umac_writel(priv, get_unaligned_be16(&wol->sopass[0]), 78 bcmgenet_umac_writel(priv, get_unaligned_be16(&wol->sopass[0]),
78 UMAC_MPD_PW_MS); 79 UMAC_MPD_PW_MS);
79 bcmgenet_umac_writel(priv, get_unaligned_be32(&wol->sopass[2]), 80 bcmgenet_umac_writel(priv, get_unaligned_be32(&wol->sopass[2]),
80 UMAC_MPD_PW_LS); 81 UMAC_MPD_PW_LS);
81 reg = bcmgenet_umac_readl(priv, UMAC_MPD_CTRL);
82 reg |= MPD_PW_EN; 82 reg |= MPD_PW_EN;
83 bcmgenet_umac_writel(priv, reg, UMAC_MPD_CTRL); 83 } else {
84 reg &= ~MPD_PW_EN;
84 } 85 }
86 bcmgenet_umac_writel(priv, reg, UMAC_MPD_CTRL);
85 87
86 /* Flag the device and relevant IRQ as wakeup capable */ 88 /* Flag the device and relevant IRQ as wakeup capable */
87 if (wol->wolopts) { 89 if (wol->wolopts) {
diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c
index ad76b8e35a00..81d41539fcba 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -2113,17 +2113,17 @@ static const struct net_device_ops macb_netdev_ops = {
2113}; 2113};
2114 2114
2115#if defined(CONFIG_OF) 2115#if defined(CONFIG_OF)
2116static struct macb_config pc302gem_config = { 2116static const struct macb_config pc302gem_config = {
2117 .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE, 2117 .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE,
2118 .dma_burst_length = 16, 2118 .dma_burst_length = 16,
2119}; 2119};
2120 2120
2121static struct macb_config sama5d3_config = { 2121static const struct macb_config sama5d3_config = {
2122 .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE, 2122 .caps = MACB_CAPS_SG_DISABLED | MACB_CAPS_GIGABIT_MODE_AVAILABLE,
2123 .dma_burst_length = 16, 2123 .dma_burst_length = 16,
2124}; 2124};
2125 2125
2126static struct macb_config sama5d4_config = { 2126static const struct macb_config sama5d4_config = {
2127 .caps = 0, 2127 .caps = 0,
2128 .dma_burst_length = 4, 2128 .dma_burst_length = 4,
2129}; 2129};
@@ -2154,7 +2154,7 @@ static void macb_configure_caps(struct macb *bp)
2154 if (bp->pdev->dev.of_node) { 2154 if (bp->pdev->dev.of_node) {
2155 match = of_match_node(macb_dt_ids, bp->pdev->dev.of_node); 2155 match = of_match_node(macb_dt_ids, bp->pdev->dev.of_node);
2156 if (match && match->data) { 2156 if (match && match->data) {
2157 config = (const struct macb_config *)match->data; 2157 config = match->data;
2158 2158
2159 bp->caps = config->caps; 2159 bp->caps = config->caps;
2160 /* 2160 /*
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h
index 31dc080f2437..ff85619a9732 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -351,7 +351,7 @@
351 351
352/* Bitfields in MID */ 352/* Bitfields in MID */
353#define MACB_IDNUM_OFFSET 16 353#define MACB_IDNUM_OFFSET 16
354#define MACB_IDNUM_SIZE 16 354#define MACB_IDNUM_SIZE 12
355#define MACB_REV_OFFSET 0 355#define MACB_REV_OFFSET 0
356#define MACB_REV_SIZE 16 356#define MACB_REV_SIZE 16
357 357
diff --git a/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c b/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c
index 9062a8434246..c308429dd9c7 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.c
@@ -35,10 +35,10 @@ static inline unsigned int ipv6_clip_hash(struct clip_tbl *d, const u32 *key)
35} 35}
36 36
37static unsigned int clip_addr_hash(struct clip_tbl *ctbl, const u32 *addr, 37static unsigned int clip_addr_hash(struct clip_tbl *ctbl, const u32 *addr,
38 int addr_len) 38 u8 v6)
39{ 39{
40 return addr_len == 4 ? ipv4_clip_hash(ctbl, addr) : 40 return v6 ? ipv6_clip_hash(ctbl, addr) :
41 ipv6_clip_hash(ctbl, addr); 41 ipv4_clip_hash(ctbl, addr);
42} 42}
43 43
44static int clip6_get_mbox(const struct net_device *dev, 44static int clip6_get_mbox(const struct net_device *dev,
@@ -78,23 +78,22 @@ int cxgb4_clip_get(const struct net_device *dev, const u32 *lip, u8 v6)
78 struct clip_entry *ce, *cte; 78 struct clip_entry *ce, *cte;
79 u32 *addr = (u32 *)lip; 79 u32 *addr = (u32 *)lip;
80 int hash; 80 int hash;
81 int addr_len; 81 int ret = -1;
82 int ret = 0;
83 82
84 if (!ctbl) 83 if (!ctbl)
85 return 0; 84 return 0;
86 85
87 if (v6) 86 hash = clip_addr_hash(ctbl, addr, v6);
88 addr_len = 16;
89 else
90 addr_len = 4;
91
92 hash = clip_addr_hash(ctbl, addr, addr_len);
93 87
94 read_lock_bh(&ctbl->lock); 88 read_lock_bh(&ctbl->lock);
95 list_for_each_entry(cte, &ctbl->hash_list[hash], list) { 89 list_for_each_entry(cte, &ctbl->hash_list[hash], list) {
96 if (addr_len == cte->addr_len && 90 if (cte->addr6.sin6_family == AF_INET6 && v6)
97 memcmp(lip, cte->addr, cte->addr_len) == 0) { 91 ret = memcmp(lip, cte->addr6.sin6_addr.s6_addr,
92 sizeof(struct in6_addr));
93 else if (cte->addr.sin_family == AF_INET && !v6)
94 ret = memcmp(lip, (char *)(&cte->addr.sin_addr),
95 sizeof(struct in_addr));
96 if (!ret) {
98 ce = cte; 97 ce = cte;
99 read_unlock_bh(&ctbl->lock); 98 read_unlock_bh(&ctbl->lock);
100 goto found; 99 goto found;
@@ -111,15 +110,20 @@ int cxgb4_clip_get(const struct net_device *dev, const u32 *lip, u8 v6)
111 spin_lock_init(&ce->lock); 110 spin_lock_init(&ce->lock);
112 atomic_set(&ce->refcnt, 0); 111 atomic_set(&ce->refcnt, 0);
113 atomic_dec(&ctbl->nfree); 112 atomic_dec(&ctbl->nfree);
114 ce->addr_len = addr_len;
115 memcpy(ce->addr, lip, addr_len);
116 list_add_tail(&ce->list, &ctbl->hash_list[hash]); 113 list_add_tail(&ce->list, &ctbl->hash_list[hash]);
117 if (v6) { 114 if (v6) {
115 ce->addr6.sin6_family = AF_INET6;
116 memcpy(ce->addr6.sin6_addr.s6_addr,
117 lip, sizeof(struct in6_addr));
118 ret = clip6_get_mbox(dev, (const struct in6_addr *)lip); 118 ret = clip6_get_mbox(dev, (const struct in6_addr *)lip);
119 if (ret) { 119 if (ret) {
120 write_unlock_bh(&ctbl->lock); 120 write_unlock_bh(&ctbl->lock);
121 return ret; 121 return ret;
122 } 122 }
123 } else {
124 ce->addr.sin_family = AF_INET;
125 memcpy((char *)(&ce->addr.sin_addr), lip,
126 sizeof(struct in_addr));
123 } 127 }
124 } else { 128 } else {
125 write_unlock_bh(&ctbl->lock); 129 write_unlock_bh(&ctbl->lock);
@@ -140,19 +144,19 @@ void cxgb4_clip_release(const struct net_device *dev, const u32 *lip, u8 v6)
140 struct clip_entry *ce, *cte; 144 struct clip_entry *ce, *cte;
141 u32 *addr = (u32 *)lip; 145 u32 *addr = (u32 *)lip;
142 int hash; 146 int hash;
143 int addr_len; 147 int ret = -1;
144
145 if (v6)
146 addr_len = 16;
147 else
148 addr_len = 4;
149 148
150 hash = clip_addr_hash(ctbl, addr, addr_len); 149 hash = clip_addr_hash(ctbl, addr, v6);
151 150
152 read_lock_bh(&ctbl->lock); 151 read_lock_bh(&ctbl->lock);
153 list_for_each_entry(cte, &ctbl->hash_list[hash], list) { 152 list_for_each_entry(cte, &ctbl->hash_list[hash], list) {
154 if (addr_len == cte->addr_len && 153 if (cte->addr6.sin6_family == AF_INET6 && v6)
155 memcmp(lip, cte->addr, cte->addr_len) == 0) { 154 ret = memcmp(lip, cte->addr6.sin6_addr.s6_addr,
155 sizeof(struct in6_addr));
156 else if (cte->addr.sin_family == AF_INET && !v6)
157 ret = memcmp(lip, (char *)(&cte->addr.sin_addr),
158 sizeof(struct in_addr));
159 if (!ret) {
156 ce = cte; 160 ce = cte;
157 read_unlock_bh(&ctbl->lock); 161 read_unlock_bh(&ctbl->lock);
158 goto found; 162 goto found;
@@ -249,10 +253,7 @@ int clip_tbl_show(struct seq_file *seq, void *v)
249 for (i = 0 ; i < ctbl->clipt_size; ++i) { 253 for (i = 0 ; i < ctbl->clipt_size; ++i) {
250 list_for_each_entry(ce, &ctbl->hash_list[i], list) { 254 list_for_each_entry(ce, &ctbl->hash_list[i], list) {
251 ip[0] = '\0'; 255 ip[0] = '\0';
252 if (ce->addr_len == 16) 256 sprintf(ip, "%pISc", &ce->addr);
253 sprintf(ip, "%pI6c", ce->addr);
254 else
255 sprintf(ip, "%pI4c", ce->addr);
256 seq_printf(seq, "%-25s %u\n", ip, 257 seq_printf(seq, "%-25s %u\n", ip,
257 atomic_read(&ce->refcnt)); 258 atomic_read(&ce->refcnt));
258 } 259 }
diff --git a/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h b/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h
index 2eaba0161cf8..35eb43c6bcbb 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/clip_tbl.h
@@ -14,8 +14,10 @@ struct clip_entry {
14 spinlock_t lock; /* Hold while modifying clip reference */ 14 spinlock_t lock; /* Hold while modifying clip reference */
15 atomic_t refcnt; 15 atomic_t refcnt;
16 struct list_head list; 16 struct list_head list;
17 u32 addr[4]; 17 union {
18 int addr_len; 18 struct sockaddr_in addr;
19 struct sockaddr_in6 addr6;
20 };
19}; 21};
20 22
21struct clip_tbl { 23struct clip_tbl {
diff --git a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
index d6cda17efe6e..97842d03675b 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
+++ b/drivers/net/ethernet/chelsio/cxgb4/cxgb4.h
@@ -1103,7 +1103,7 @@ int t4_restart_aneg(struct adapter *adap, unsigned int mbox, unsigned int port);
1103#define T4_MEMORY_WRITE 0 1103#define T4_MEMORY_WRITE 0
1104#define T4_MEMORY_READ 1 1104#define T4_MEMORY_READ 1
1105int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, u32 len, 1105int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, u32 len,
1106 __be32 *buf, int dir); 1106 void *buf, int dir);
1107static inline int t4_memory_write(struct adapter *adap, int mtype, u32 addr, 1107static inline int t4_memory_write(struct adapter *adap, int mtype, u32 addr,
1108 u32 len, __be32 *buf) 1108 u32 len, __be32 *buf)
1109{ 1109{
diff --git a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
index 4d643b65265e..1abdfa123c6c 100644
--- a/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
+++ b/drivers/net/ethernet/chelsio/cxgb4/t4_hw.c
@@ -449,7 +449,7 @@ int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc)
449 * @mtype: memory type: MEM_EDC0, MEM_EDC1 or MEM_MC 449 * @mtype: memory type: MEM_EDC0, MEM_EDC1 or MEM_MC
450 * @addr: address within indicated memory type 450 * @addr: address within indicated memory type
451 * @len: amount of memory to transfer 451 * @len: amount of memory to transfer
452 * @buf: host memory buffer 452 * @hbuf: host memory buffer
453 * @dir: direction of transfer T4_MEMORY_READ (1) or T4_MEMORY_WRITE (0) 453 * @dir: direction of transfer T4_MEMORY_READ (1) or T4_MEMORY_WRITE (0)
454 * 454 *
455 * Reads/writes an [almost] arbitrary memory region in the firmware: the 455 * Reads/writes an [almost] arbitrary memory region in the firmware: the
@@ -460,15 +460,17 @@ int t4_edc_read(struct adapter *adap, int idx, u32 addr, __be32 *data, u64 *ecc)
460 * caller's responsibility to perform appropriate byte order conversions. 460 * caller's responsibility to perform appropriate byte order conversions.
461 */ 461 */
462int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr, 462int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr,
463 u32 len, __be32 *buf, int dir) 463 u32 len, void *hbuf, int dir)
464{ 464{
465 u32 pos, offset, resid, memoffset; 465 u32 pos, offset, resid, memoffset;
466 u32 edc_size, mc_size, win_pf, mem_reg, mem_aperture, mem_base; 466 u32 edc_size, mc_size, win_pf, mem_reg, mem_aperture, mem_base;
467 u32 *buf;
467 468
468 /* Argument sanity checks ... 469 /* Argument sanity checks ...
469 */ 470 */
470 if (addr & 0x3) 471 if (addr & 0x3 || (uintptr_t)hbuf & 0x3)
471 return -EINVAL; 472 return -EINVAL;
473 buf = (u32 *)hbuf;
472 474
473 /* It's convenient to be able to handle lengths which aren't a 475 /* It's convenient to be able to handle lengths which aren't a
474 * multiple of 32-bits because we often end up transferring files to 476 * multiple of 32-bits because we often end up transferring files to
@@ -532,14 +534,45 @@ int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr,
532 534
533 /* Transfer data to/from the adapter as long as there's an integral 535 /* Transfer data to/from the adapter as long as there's an integral
534 * number of 32-bit transfers to complete. 536 * number of 32-bit transfers to complete.
537 *
538 * A note on Endianness issues:
539 *
540 * The "register" reads and writes below from/to the PCI-E Memory
541 * Window invoke the standard adapter Big-Endian to PCI-E Link
542 * Little-Endian "swizzel." As a result, if we have the following
543 * data in adapter memory:
544 *
545 * Memory: ... | b0 | b1 | b2 | b3 | ...
546 * Address: i+0 i+1 i+2 i+3
547 *
548 * Then a read of the adapter memory via the PCI-E Memory Window
549 * will yield:
550 *
551 * x = readl(i)
552 * 31 0
553 * [ b3 | b2 | b1 | b0 ]
554 *
555 * If this value is stored into local memory on a Little-Endian system
556 * it will show up correctly in local memory as:
557 *
558 * ( ..., b0, b1, b2, b3, ... )
559 *
560 * But on a Big-Endian system, the store will show up in memory
561 * incorrectly swizzled as:
562 *
563 * ( ..., b3, b2, b1, b0, ... )
564 *
565 * So we need to account for this in the reads and writes to the
566 * PCI-E Memory Window below by undoing the register read/write
567 * swizzels.
535 */ 568 */
536 while (len > 0) { 569 while (len > 0) {
537 if (dir == T4_MEMORY_READ) 570 if (dir == T4_MEMORY_READ)
538 *buf++ = (__force __be32) t4_read_reg(adap, 571 *buf++ = le32_to_cpu((__force __le32)t4_read_reg(adap,
539 mem_base + offset); 572 mem_base + offset));
540 else 573 else
541 t4_write_reg(adap, mem_base + offset, 574 t4_write_reg(adap, mem_base + offset,
542 (__force u32) *buf++); 575 (__force u32)cpu_to_le32(*buf++));
543 offset += sizeof(__be32); 576 offset += sizeof(__be32);
544 len -= sizeof(__be32); 577 len -= sizeof(__be32);
545 578
@@ -568,15 +601,16 @@ int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr,
568 */ 601 */
569 if (resid) { 602 if (resid) {
570 union { 603 union {
571 __be32 word; 604 u32 word;
572 char byte[4]; 605 char byte[4];
573 } last; 606 } last;
574 unsigned char *bp; 607 unsigned char *bp;
575 int i; 608 int i;
576 609
577 if (dir == T4_MEMORY_READ) { 610 if (dir == T4_MEMORY_READ) {
578 last.word = (__force __be32) t4_read_reg(adap, 611 last.word = le32_to_cpu(
579 mem_base + offset); 612 (__force __le32)t4_read_reg(adap,
613 mem_base + offset));
580 for (bp = (unsigned char *)buf, i = resid; i < 4; i++) 614 for (bp = (unsigned char *)buf, i = resid; i < 4; i++)
581 bp[i] = last.byte[i]; 615 bp[i] = last.byte[i];
582 } else { 616 } else {
@@ -584,7 +618,7 @@ int t4_memory_rw(struct adapter *adap, int win, int mtype, u32 addr,
584 for (i = resid; i < 4; i++) 618 for (i = resid; i < 4; i++)
585 last.byte[i] = 0; 619 last.byte[i] = 0;
586 t4_write_reg(adap, mem_base + offset, 620 t4_write_reg(adap, mem_base + offset,
587 (__force u32) last.word); 621 (__force u32)cpu_to_le32(last.word));
588 } 622 }
589 } 623 }
590 624
@@ -1086,7 +1120,7 @@ int t4_prep_fw(struct adapter *adap, struct fw_info *fw_info,
1086 } 1120 }
1087 1121
1088 /* Installed successfully, update the cached header too. */ 1122 /* Installed successfully, update the cached header too. */
1089 memcpy(card_fw, fs_fw, sizeof(*card_fw)); 1123 *card_fw = *fs_fw;
1090 card_fw_usable = 1; 1124 card_fw_usable = 1;
1091 *reset = 0; /* already reset as part of load_fw */ 1125 *reset = 0; /* already reset as part of load_fw */
1092 } 1126 }
diff --git a/drivers/net/ethernet/cisco/enic/enic_main.c b/drivers/net/ethernet/cisco/enic/enic_main.c
index 9cbe038a388e..a5179bfcdc2c 100644
--- a/drivers/net/ethernet/cisco/enic/enic_main.c
+++ b/drivers/net/ethernet/cisco/enic/enic_main.c
@@ -272,8 +272,8 @@ static irqreturn_t enic_isr_legacy(int irq, void *data)
272 } 272 }
273 273
274 if (ENIC_TEST_INTR(pba, notify_intr)) { 274 if (ENIC_TEST_INTR(pba, notify_intr)) {
275 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
276 enic_notify_check(enic); 275 enic_notify_check(enic);
276 vnic_intr_return_all_credits(&enic->intr[notify_intr]);
277 } 277 }
278 278
279 if (ENIC_TEST_INTR(pba, err_intr)) { 279 if (ENIC_TEST_INTR(pba, err_intr)) {
@@ -346,8 +346,8 @@ static irqreturn_t enic_isr_msix_notify(int irq, void *data)
346 struct enic *enic = data; 346 struct enic *enic = data;
347 unsigned int intr = enic_msix_notify_intr(enic); 347 unsigned int intr = enic_msix_notify_intr(enic);
348 348
349 vnic_intr_return_all_credits(&enic->intr[intr]);
350 enic_notify_check(enic); 349 enic_notify_check(enic);
350 vnic_intr_return_all_credits(&enic->intr[intr]);
351 351
352 return IRQ_HANDLED; 352 return IRQ_HANDLED;
353} 353}
diff --git a/drivers/net/ethernet/dec/tulip/tulip_core.c b/drivers/net/ethernet/dec/tulip/tulip_core.c
index 3b42556f7f8d..ed41559bae77 100644
--- a/drivers/net/ethernet/dec/tulip/tulip_core.c
+++ b/drivers/net/ethernet/dec/tulip/tulip_core.c
@@ -589,7 +589,7 @@ static void tulip_tx_timeout(struct net_device *dev)
589 (unsigned int)tp->rx_ring[i].buffer1, 589 (unsigned int)tp->rx_ring[i].buffer1,
590 (unsigned int)tp->rx_ring[i].buffer2, 590 (unsigned int)tp->rx_ring[i].buffer2,
591 buf[0], buf[1], buf[2]); 591 buf[0], buf[1], buf[2]);
592 for (j = 0; buf[j] != 0xee && j < 1600; j++) 592 for (j = 0; ((j < 1600) && buf[j] != 0xee); j++)
593 if (j < 100) 593 if (j < 100)
594 pr_cont(" %02x", buf[j]); 594 pr_cont(" %02x", buf[j]);
595 pr_cont(" j=%d\n", j); 595 pr_cont(" j=%d\n", j);
diff --git a/drivers/net/ethernet/freescale/fec_main.c b/drivers/net/ethernet/freescale/fec_main.c
index 9bb6220663b2..78e1ce09b1ab 100644
--- a/drivers/net/ethernet/freescale/fec_main.c
+++ b/drivers/net/ethernet/freescale/fec_main.c
@@ -1189,13 +1189,12 @@ static void
1189fec_enet_tx_queue(struct net_device *ndev, u16 queue_id) 1189fec_enet_tx_queue(struct net_device *ndev, u16 queue_id)
1190{ 1190{
1191 struct fec_enet_private *fep; 1191 struct fec_enet_private *fep;
1192 struct bufdesc *bdp, *bdp_t; 1192 struct bufdesc *bdp;
1193 unsigned short status; 1193 unsigned short status;
1194 struct sk_buff *skb; 1194 struct sk_buff *skb;
1195 struct fec_enet_priv_tx_q *txq; 1195 struct fec_enet_priv_tx_q *txq;
1196 struct netdev_queue *nq; 1196 struct netdev_queue *nq;
1197 int index = 0; 1197 int index = 0;
1198 int i, bdnum;
1199 int entries_free; 1198 int entries_free;
1200 1199
1201 fep = netdev_priv(ndev); 1200 fep = netdev_priv(ndev);
@@ -1216,29 +1215,18 @@ fec_enet_tx_queue(struct net_device *ndev, u16 queue_id)
1216 if (bdp == txq->cur_tx) 1215 if (bdp == txq->cur_tx)
1217 break; 1216 break;
1218 1217
1219 bdp_t = bdp; 1218 index = fec_enet_get_bd_index(txq->tx_bd_base, bdp, fep);
1220 bdnum = 1;
1221 index = fec_enet_get_bd_index(txq->tx_bd_base, bdp_t, fep);
1222 skb = txq->tx_skbuff[index];
1223 while (!skb) {
1224 bdp_t = fec_enet_get_nextdesc(bdp_t, fep, queue_id);
1225 index = fec_enet_get_bd_index(txq->tx_bd_base, bdp_t, fep);
1226 skb = txq->tx_skbuff[index];
1227 bdnum++;
1228 }
1229 if (skb_shinfo(skb)->nr_frags &&
1230 (status = bdp_t->cbd_sc) & BD_ENET_TX_READY)
1231 break;
1232 1219
1233 for (i = 0; i < bdnum; i++) { 1220 skb = txq->tx_skbuff[index];
1234 if (!IS_TSO_HEADER(txq, bdp->cbd_bufaddr))
1235 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
1236 bdp->cbd_datlen, DMA_TO_DEVICE);
1237 bdp->cbd_bufaddr = 0;
1238 if (i < bdnum - 1)
1239 bdp = fec_enet_get_nextdesc(bdp, fep, queue_id);
1240 }
1241 txq->tx_skbuff[index] = NULL; 1221 txq->tx_skbuff[index] = NULL;
1222 if (!IS_TSO_HEADER(txq, bdp->cbd_bufaddr))
1223 dma_unmap_single(&fep->pdev->dev, bdp->cbd_bufaddr,
1224 bdp->cbd_datlen, DMA_TO_DEVICE);
1225 bdp->cbd_bufaddr = 0;
1226 if (!skb) {
1227 bdp = fec_enet_get_nextdesc(bdp, fep, queue_id);
1228 continue;
1229 }
1242 1230
1243 /* Check for errors. */ 1231 /* Check for errors. */
1244 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC | 1232 if (status & (BD_ENET_TX_HB | BD_ENET_TX_LC |
@@ -1479,8 +1467,7 @@ fec_enet_rx_queue(struct net_device *ndev, int budget, u16 queue_id)
1479 1467
1480 vlan_packet_rcvd = true; 1468 vlan_packet_rcvd = true;
1481 1469
1482 skb_copy_to_linear_data_offset(skb, VLAN_HLEN, 1470 memmove(skb->data + VLAN_HLEN, data, ETH_ALEN * 2);
1483 data, (2 * ETH_ALEN));
1484 skb_pull(skb, VLAN_HLEN); 1471 skb_pull(skb, VLAN_HLEN);
1485 } 1472 }
1486 1473
@@ -1597,7 +1584,7 @@ fec_enet_interrupt(int irq, void *dev_id)
1597 writel(int_events, fep->hwp + FEC_IEVENT); 1584 writel(int_events, fep->hwp + FEC_IEVENT);
1598 fec_enet_collect_events(fep, int_events); 1585 fec_enet_collect_events(fep, int_events);
1599 1586
1600 if (fep->work_tx || fep->work_rx) { 1587 if ((fep->work_tx || fep->work_rx) && fep->link) {
1601 ret = IRQ_HANDLED; 1588 ret = IRQ_HANDLED;
1602 1589
1603 if (napi_schedule_prep(&fep->napi)) { 1590 if (napi_schedule_prep(&fep->napi)) {
@@ -3383,7 +3370,6 @@ fec_drv_remove(struct platform_device *pdev)
3383 regulator_disable(fep->reg_phy); 3370 regulator_disable(fep->reg_phy);
3384 if (fep->ptp_clock) 3371 if (fep->ptp_clock)
3385 ptp_clock_unregister(fep->ptp_clock); 3372 ptp_clock_unregister(fep->ptp_clock);
3386 fec_enet_clk_enable(ndev, false);
3387 of_node_put(fep->phy_node); 3373 of_node_put(fep->phy_node);
3388 free_netdev(ndev); 3374 free_netdev(ndev);
3389 3375
diff --git a/drivers/net/ethernet/freescale/gianfar.c b/drivers/net/ethernet/freescale/gianfar.c
index 43df78882e48..7bf3682cdf47 100644
--- a/drivers/net/ethernet/freescale/gianfar.c
+++ b/drivers/net/ethernet/freescale/gianfar.c
@@ -747,6 +747,18 @@ static int gfar_parse_group(struct device_node *np,
747 return 0; 747 return 0;
748} 748}
749 749
750static int gfar_of_group_count(struct device_node *np)
751{
752 struct device_node *child;
753 int num = 0;
754
755 for_each_available_child_of_node(np, child)
756 if (!of_node_cmp(child->name, "queue-group"))
757 num++;
758
759 return num;
760}
761
750static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev) 762static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev)
751{ 763{
752 const char *model; 764 const char *model;
@@ -784,7 +796,7 @@ static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev)
784 num_rx_qs = 1; 796 num_rx_qs = 1;
785 } else { /* MQ_MG_MODE */ 797 } else { /* MQ_MG_MODE */
786 /* get the actual number of supported groups */ 798 /* get the actual number of supported groups */
787 unsigned int num_grps = of_get_available_child_count(np); 799 unsigned int num_grps = gfar_of_group_count(np);
788 800
789 if (num_grps == 0 || num_grps > MAXGROUPS) { 801 if (num_grps == 0 || num_grps > MAXGROUPS) {
790 dev_err(&ofdev->dev, "Invalid # of int groups(%d)\n", 802 dev_err(&ofdev->dev, "Invalid # of int groups(%d)\n",
@@ -851,7 +863,10 @@ static int gfar_of_init(struct platform_device *ofdev, struct net_device **pdev)
851 863
852 /* Parse and initialize group specific information */ 864 /* Parse and initialize group specific information */
853 if (priv->mode == MQ_MG_MODE) { 865 if (priv->mode == MQ_MG_MODE) {
854 for_each_child_of_node(np, child) { 866 for_each_available_child_of_node(np, child) {
867 if (of_node_cmp(child->name, "queue-group"))
868 continue;
869
855 err = gfar_parse_group(child, priv, model); 870 err = gfar_parse_group(child, priv, model);
856 if (err) 871 if (err)
857 goto err_grp_init; 872 goto err_grp_init;
@@ -3162,8 +3177,8 @@ static void adjust_link(struct net_device *dev)
3162 struct phy_device *phydev = priv->phydev; 3177 struct phy_device *phydev = priv->phydev;
3163 3178
3164 if (unlikely(phydev->link != priv->oldlink || 3179 if (unlikely(phydev->link != priv->oldlink ||
3165 phydev->duplex != priv->oldduplex || 3180 (phydev->link && (phydev->duplex != priv->oldduplex ||
3166 phydev->speed != priv->oldspeed)) 3181 phydev->speed != priv->oldspeed))))
3167 gfar_update_link_state(priv); 3182 gfar_update_link_state(priv);
3168} 3183}
3169 3184
diff --git a/drivers/net/ethernet/ibm/ehea/ehea_main.c b/drivers/net/ethernet/ibm/ehea/ehea_main.c
index e8a1adb7a962..c05e50759621 100644
--- a/drivers/net/ethernet/ibm/ehea/ehea_main.c
+++ b/drivers/net/ethernet/ibm/ehea/ehea_main.c
@@ -3262,6 +3262,139 @@ static void ehea_remove_device_sysfs(struct platform_device *dev)
3262 device_remove_file(&dev->dev, &dev_attr_remove_port); 3262 device_remove_file(&dev->dev, &dev_attr_remove_port);
3263} 3263}
3264 3264
3265static int ehea_reboot_notifier(struct notifier_block *nb,
3266 unsigned long action, void *unused)
3267{
3268 if (action == SYS_RESTART) {
3269 pr_info("Reboot: freeing all eHEA resources\n");
3270 ibmebus_unregister_driver(&ehea_driver);
3271 }
3272 return NOTIFY_DONE;
3273}
3274
3275static struct notifier_block ehea_reboot_nb = {
3276 .notifier_call = ehea_reboot_notifier,
3277};
3278
3279static int ehea_mem_notifier(struct notifier_block *nb,
3280 unsigned long action, void *data)
3281{
3282 int ret = NOTIFY_BAD;
3283 struct memory_notify *arg = data;
3284
3285 mutex_lock(&dlpar_mem_lock);
3286
3287 switch (action) {
3288 case MEM_CANCEL_OFFLINE:
3289 pr_info("memory offlining canceled");
3290 /* Fall through: re-add canceled memory block */
3291
3292 case MEM_ONLINE:
3293 pr_info("memory is going online");
3294 set_bit(__EHEA_STOP_XFER, &ehea_driver_flags);
3295 if (ehea_add_sect_bmap(arg->start_pfn, arg->nr_pages))
3296 goto out_unlock;
3297 ehea_rereg_mrs();
3298 break;
3299
3300 case MEM_GOING_OFFLINE:
3301 pr_info("memory is going offline");
3302 set_bit(__EHEA_STOP_XFER, &ehea_driver_flags);
3303 if (ehea_rem_sect_bmap(arg->start_pfn, arg->nr_pages))
3304 goto out_unlock;
3305 ehea_rereg_mrs();
3306 break;
3307
3308 default:
3309 break;
3310 }
3311
3312 ehea_update_firmware_handles();
3313 ret = NOTIFY_OK;
3314
3315out_unlock:
3316 mutex_unlock(&dlpar_mem_lock);
3317 return ret;
3318}
3319
3320static struct notifier_block ehea_mem_nb = {
3321 .notifier_call = ehea_mem_notifier,
3322};
3323
3324static void ehea_crash_handler(void)
3325{
3326 int i;
3327
3328 if (ehea_fw_handles.arr)
3329 for (i = 0; i < ehea_fw_handles.num_entries; i++)
3330 ehea_h_free_resource(ehea_fw_handles.arr[i].adh,
3331 ehea_fw_handles.arr[i].fwh,
3332 FORCE_FREE);
3333
3334 if (ehea_bcmc_regs.arr)
3335 for (i = 0; i < ehea_bcmc_regs.num_entries; i++)
3336 ehea_h_reg_dereg_bcmc(ehea_bcmc_regs.arr[i].adh,
3337 ehea_bcmc_regs.arr[i].port_id,
3338 ehea_bcmc_regs.arr[i].reg_type,
3339 ehea_bcmc_regs.arr[i].macaddr,
3340 0, H_DEREG_BCMC);
3341}
3342
3343static atomic_t ehea_memory_hooks_registered;
3344
3345/* Register memory hooks on probe of first adapter */
3346static int ehea_register_memory_hooks(void)
3347{
3348 int ret = 0;
3349
3350 if (atomic_inc_and_test(&ehea_memory_hooks_registered))
3351 return 0;
3352
3353 ret = ehea_create_busmap();
3354 if (ret) {
3355 pr_info("ehea_create_busmap failed\n");
3356 goto out;
3357 }
3358
3359 ret = register_reboot_notifier(&ehea_reboot_nb);
3360 if (ret) {
3361 pr_info("register_reboot_notifier failed\n");
3362 goto out;
3363 }
3364
3365 ret = register_memory_notifier(&ehea_mem_nb);
3366 if (ret) {
3367 pr_info("register_memory_notifier failed\n");
3368 goto out2;
3369 }
3370
3371 ret = crash_shutdown_register(ehea_crash_handler);
3372 if (ret) {
3373 pr_info("crash_shutdown_register failed\n");
3374 goto out3;
3375 }
3376
3377 return 0;
3378
3379out3:
3380 unregister_memory_notifier(&ehea_mem_nb);
3381out2:
3382 unregister_reboot_notifier(&ehea_reboot_nb);
3383out:
3384 return ret;
3385}
3386
3387static void ehea_unregister_memory_hooks(void)
3388{
3389 if (atomic_read(&ehea_memory_hooks_registered))
3390 return;
3391
3392 unregister_reboot_notifier(&ehea_reboot_nb);
3393 if (crash_shutdown_unregister(ehea_crash_handler))
3394 pr_info("failed unregistering crash handler\n");
3395 unregister_memory_notifier(&ehea_mem_nb);
3396}
3397
3265static int ehea_probe_adapter(struct platform_device *dev) 3398static int ehea_probe_adapter(struct platform_device *dev)
3266{ 3399{
3267 struct ehea_adapter *adapter; 3400 struct ehea_adapter *adapter;
@@ -3269,6 +3402,10 @@ static int ehea_probe_adapter(struct platform_device *dev)
3269 int ret; 3402 int ret;
3270 int i; 3403 int i;
3271 3404
3405 ret = ehea_register_memory_hooks();
3406 if (ret)
3407 return ret;
3408
3272 if (!dev || !dev->dev.of_node) { 3409 if (!dev || !dev->dev.of_node) {
3273 pr_err("Invalid ibmebus device probed\n"); 3410 pr_err("Invalid ibmebus device probed\n");
3274 return -EINVAL; 3411 return -EINVAL;
@@ -3392,81 +3529,6 @@ static int ehea_remove(struct platform_device *dev)
3392 return 0; 3529 return 0;
3393} 3530}
3394 3531
3395static void ehea_crash_handler(void)
3396{
3397 int i;
3398
3399 if (ehea_fw_handles.arr)
3400 for (i = 0; i < ehea_fw_handles.num_entries; i++)
3401 ehea_h_free_resource(ehea_fw_handles.arr[i].adh,
3402 ehea_fw_handles.arr[i].fwh,
3403 FORCE_FREE);
3404
3405 if (ehea_bcmc_regs.arr)
3406 for (i = 0; i < ehea_bcmc_regs.num_entries; i++)
3407 ehea_h_reg_dereg_bcmc(ehea_bcmc_regs.arr[i].adh,
3408 ehea_bcmc_regs.arr[i].port_id,
3409 ehea_bcmc_regs.arr[i].reg_type,
3410 ehea_bcmc_regs.arr[i].macaddr,
3411 0, H_DEREG_BCMC);
3412}
3413
3414static int ehea_mem_notifier(struct notifier_block *nb,
3415 unsigned long action, void *data)
3416{
3417 int ret = NOTIFY_BAD;
3418 struct memory_notify *arg = data;
3419
3420 mutex_lock(&dlpar_mem_lock);
3421
3422 switch (action) {
3423 case MEM_CANCEL_OFFLINE:
3424 pr_info("memory offlining canceled");
3425 /* Readd canceled memory block */
3426 case MEM_ONLINE:
3427 pr_info("memory is going online");
3428 set_bit(__EHEA_STOP_XFER, &ehea_driver_flags);
3429 if (ehea_add_sect_bmap(arg->start_pfn, arg->nr_pages))
3430 goto out_unlock;
3431 ehea_rereg_mrs();
3432 break;
3433 case MEM_GOING_OFFLINE:
3434 pr_info("memory is going offline");
3435 set_bit(__EHEA_STOP_XFER, &ehea_driver_flags);
3436 if (ehea_rem_sect_bmap(arg->start_pfn, arg->nr_pages))
3437 goto out_unlock;
3438 ehea_rereg_mrs();
3439 break;
3440 default:
3441 break;
3442 }
3443
3444 ehea_update_firmware_handles();
3445 ret = NOTIFY_OK;
3446
3447out_unlock:
3448 mutex_unlock(&dlpar_mem_lock);
3449 return ret;
3450}
3451
3452static struct notifier_block ehea_mem_nb = {
3453 .notifier_call = ehea_mem_notifier,
3454};
3455
3456static int ehea_reboot_notifier(struct notifier_block *nb,
3457 unsigned long action, void *unused)
3458{
3459 if (action == SYS_RESTART) {
3460 pr_info("Reboot: freeing all eHEA resources\n");
3461 ibmebus_unregister_driver(&ehea_driver);
3462 }
3463 return NOTIFY_DONE;
3464}
3465
3466static struct notifier_block ehea_reboot_nb = {
3467 .notifier_call = ehea_reboot_notifier,
3468};
3469
3470static int check_module_parm(void) 3532static int check_module_parm(void)
3471{ 3533{
3472 int ret = 0; 3534 int ret = 0;
@@ -3520,26 +3582,10 @@ static int __init ehea_module_init(void)
3520 if (ret) 3582 if (ret)
3521 goto out; 3583 goto out;
3522 3584
3523 ret = ehea_create_busmap();
3524 if (ret)
3525 goto out;
3526
3527 ret = register_reboot_notifier(&ehea_reboot_nb);
3528 if (ret)
3529 pr_info("failed registering reboot notifier\n");
3530
3531 ret = register_memory_notifier(&ehea_mem_nb);
3532 if (ret)
3533 pr_info("failed registering memory remove notifier\n");
3534
3535 ret = crash_shutdown_register(ehea_crash_handler);
3536 if (ret)
3537 pr_info("failed registering crash handler\n");
3538
3539 ret = ibmebus_register_driver(&ehea_driver); 3585 ret = ibmebus_register_driver(&ehea_driver);
3540 if (ret) { 3586 if (ret) {
3541 pr_err("failed registering eHEA device driver on ebus\n"); 3587 pr_err("failed registering eHEA device driver on ebus\n");
3542 goto out2; 3588 goto out;
3543 } 3589 }
3544 3590
3545 ret = driver_create_file(&ehea_driver.driver, 3591 ret = driver_create_file(&ehea_driver.driver,
@@ -3547,32 +3593,22 @@ static int __init ehea_module_init(void)
3547 if (ret) { 3593 if (ret) {
3548 pr_err("failed to register capabilities attribute, ret=%d\n", 3594 pr_err("failed to register capabilities attribute, ret=%d\n",
3549 ret); 3595 ret);
3550 goto out3; 3596 goto out2;
3551 } 3597 }
3552 3598
3553 return ret; 3599 return ret;
3554 3600
3555out3:
3556 ibmebus_unregister_driver(&ehea_driver);
3557out2: 3601out2:
3558 unregister_memory_notifier(&ehea_mem_nb); 3602 ibmebus_unregister_driver(&ehea_driver);
3559 unregister_reboot_notifier(&ehea_reboot_nb);
3560 crash_shutdown_unregister(ehea_crash_handler);
3561out: 3603out:
3562 return ret; 3604 return ret;
3563} 3605}
3564 3606
3565static void __exit ehea_module_exit(void) 3607static void __exit ehea_module_exit(void)
3566{ 3608{
3567 int ret;
3568
3569 driver_remove_file(&ehea_driver.driver, &driver_attr_capabilities); 3609 driver_remove_file(&ehea_driver.driver, &driver_attr_capabilities);
3570 ibmebus_unregister_driver(&ehea_driver); 3610 ibmebus_unregister_driver(&ehea_driver);
3571 unregister_reboot_notifier(&ehea_reboot_nb); 3611 ehea_unregister_memory_hooks();
3572 ret = crash_shutdown_unregister(ehea_crash_handler);
3573 if (ret)
3574 pr_info("failed unregistering crash handler\n");
3575 unregister_memory_notifier(&ehea_mem_nb);
3576 kfree(ehea_fw_handles.arr); 3612 kfree(ehea_fw_handles.arr);
3577 kfree(ehea_bcmc_regs.arr); 3613 kfree(ehea_bcmc_regs.arr);
3578 ehea_destroy_busmap(); 3614 ehea_destroy_busmap();
diff --git a/drivers/net/ethernet/ibm/ibmveth.c b/drivers/net/ethernet/ibm/ibmveth.c
index 21978cc019e7..cd7675ac5bf9 100644
--- a/drivers/net/ethernet/ibm/ibmveth.c
+++ b/drivers/net/ethernet/ibm/ibmveth.c
@@ -1136,6 +1136,8 @@ restart_poll:
1136 ibmveth_replenish_task(adapter); 1136 ibmveth_replenish_task(adapter);
1137 1137
1138 if (frames_processed < budget) { 1138 if (frames_processed < budget) {
1139 napi_complete(napi);
1140
1139 /* We think we are done - reenable interrupts, 1141 /* We think we are done - reenable interrupts,
1140 * then check once more to make sure we are done. 1142 * then check once more to make sure we are done.
1141 */ 1143 */
@@ -1144,8 +1146,6 @@ restart_poll:
1144 1146
1145 BUG_ON(lpar_rc != H_SUCCESS); 1147 BUG_ON(lpar_rc != H_SUCCESS);
1146 1148
1147 napi_complete(napi);
1148
1149 if (ibmveth_rxq_pending_buffer(adapter) && 1149 if (ibmveth_rxq_pending_buffer(adapter) &&
1150 napi_reschedule(napi)) { 1150 napi_reschedule(napi)) {
1151 lpar_rc = h_vio_signal(adapter->vdev->unit_address, 1151 lpar_rc = h_vio_signal(adapter->vdev->unit_address,
@@ -1327,6 +1327,28 @@ static unsigned long ibmveth_get_desired_dma(struct vio_dev *vdev)
1327 return ret; 1327 return ret;
1328} 1328}
1329 1329
1330static int ibmveth_set_mac_addr(struct net_device *dev, void *p)
1331{
1332 struct ibmveth_adapter *adapter = netdev_priv(dev);
1333 struct sockaddr *addr = p;
1334 u64 mac_address;
1335 int rc;
1336
1337 if (!is_valid_ether_addr(addr->sa_data))
1338 return -EADDRNOTAVAIL;
1339
1340 mac_address = ibmveth_encode_mac_addr(addr->sa_data);
1341 rc = h_change_logical_lan_mac(adapter->vdev->unit_address, mac_address);
1342 if (rc) {
1343 netdev_err(adapter->netdev, "h_change_logical_lan_mac failed with rc=%d\n", rc);
1344 return rc;
1345 }
1346
1347 ether_addr_copy(dev->dev_addr, addr->sa_data);
1348
1349 return 0;
1350}
1351
1330static const struct net_device_ops ibmveth_netdev_ops = { 1352static const struct net_device_ops ibmveth_netdev_ops = {
1331 .ndo_open = ibmveth_open, 1353 .ndo_open = ibmveth_open,
1332 .ndo_stop = ibmveth_close, 1354 .ndo_stop = ibmveth_close,
@@ -1337,7 +1359,7 @@ static const struct net_device_ops ibmveth_netdev_ops = {
1337 .ndo_fix_features = ibmveth_fix_features, 1359 .ndo_fix_features = ibmveth_fix_features,
1338 .ndo_set_features = ibmveth_set_features, 1360 .ndo_set_features = ibmveth_set_features,
1339 .ndo_validate_addr = eth_validate_addr, 1361 .ndo_validate_addr = eth_validate_addr,
1340 .ndo_set_mac_address = eth_mac_addr, 1362 .ndo_set_mac_address = ibmveth_set_mac_addr,
1341#ifdef CONFIG_NET_POLL_CONTROLLER 1363#ifdef CONFIG_NET_POLL_CONTROLLER
1342 .ndo_poll_controller = ibmveth_poll_controller, 1364 .ndo_poll_controller = ibmveth_poll_controller,
1343#endif 1365#endif
diff --git a/drivers/net/ethernet/intel/i40e/i40e_common.c b/drivers/net/ethernet/intel/i40e/i40e_common.c
index 11a9ffebf8d8..6aea65dae5ed 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_common.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_common.c
@@ -868,8 +868,9 @@ i40e_status i40e_pf_reset(struct i40e_hw *hw)
868 * The grst delay value is in 100ms units, and we'll wait a 868 * The grst delay value is in 100ms units, and we'll wait a
869 * couple counts longer to be sure we don't just miss the end. 869 * couple counts longer to be sure we don't just miss the end.
870 */ 870 */
871 grst_del = rd32(hw, I40E_GLGEN_RSTCTL) & I40E_GLGEN_RSTCTL_GRSTDEL_MASK 871 grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) &
872 >> I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT; 872 I40E_GLGEN_RSTCTL_GRSTDEL_MASK) >>
873 I40E_GLGEN_RSTCTL_GRSTDEL_SHIFT;
873 for (cnt = 0; cnt < grst_del + 2; cnt++) { 874 for (cnt = 0; cnt < grst_del + 2; cnt++) {
874 reg = rd32(hw, I40E_GLGEN_RSTAT); 875 reg = rd32(hw, I40E_GLGEN_RSTAT);
875 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK)) 876 if (!(reg & I40E_GLGEN_RSTAT_DEVSTATE_MASK))
@@ -2846,7 +2847,7 @@ i40e_status i40e_aq_add_udp_tunnel(struct i40e_hw *hw,
2846 2847
2847 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details); 2848 status = i40e_asq_send_command(hw, &desc, NULL, 0, cmd_details);
2848 2849
2849 if (!status) 2850 if (!status && filter_index)
2850 *filter_index = resp->index; 2851 *filter_index = resp->index;
2851 2852
2852 return status; 2853 return status;
diff --git a/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c b/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c
index 183dcb63ce98..a11c70ca5a28 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_dcb_nl.c
@@ -40,7 +40,7 @@ static void i40e_get_pfc_delay(struct i40e_hw *hw, u16 *delay)
40 u32 val; 40 u32 val;
41 41
42 val = rd32(hw, I40E_PRTDCB_GENC); 42 val = rd32(hw, I40E_PRTDCB_GENC);
43 *delay = (u16)(val & I40E_PRTDCB_GENC_PFCLDA_MASK >> 43 *delay = (u16)((val & I40E_PRTDCB_GENC_PFCLDA_MASK) >>
44 I40E_PRTDCB_GENC_PFCLDA_SHIFT); 44 I40E_PRTDCB_GENC_PFCLDA_SHIFT);
45} 45}
46 46
diff --git a/drivers/net/ethernet/intel/i40e/i40e_debugfs.c b/drivers/net/ethernet/intel/i40e/i40e_debugfs.c
index 61236f983971..c17ee77100d3 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_debugfs.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_debugfs.c
@@ -989,8 +989,10 @@ static ssize_t i40e_dbg_command_write(struct file *filp,
989 if (!cmd_buf) 989 if (!cmd_buf)
990 return count; 990 return count;
991 bytes_not_copied = copy_from_user(cmd_buf, buffer, count); 991 bytes_not_copied = copy_from_user(cmd_buf, buffer, count);
992 if (bytes_not_copied < 0) 992 if (bytes_not_copied < 0) {
993 kfree(cmd_buf);
993 return bytes_not_copied; 994 return bytes_not_copied;
995 }
994 if (bytes_not_copied > 0) 996 if (bytes_not_copied > 0)
995 count -= bytes_not_copied; 997 count -= bytes_not_copied;
996 cmd_buf[count] = '\0'; 998 cmd_buf[count] = '\0';
diff --git a/drivers/net/ethernet/intel/i40e/i40e_main.c b/drivers/net/ethernet/intel/i40e/i40e_main.c
index cbe281be1c9f..dadda3c5d658 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_main.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_main.c
@@ -1512,7 +1512,12 @@ static void i40e_vsi_setup_queue_map(struct i40e_vsi *vsi,
1512 vsi->tc_config.numtc = numtc; 1512 vsi->tc_config.numtc = numtc;
1513 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1; 1513 vsi->tc_config.enabled_tc = enabled_tc ? enabled_tc : 1;
1514 /* Number of queues per enabled TC */ 1514 /* Number of queues per enabled TC */
1515 num_tc_qps = vsi->alloc_queue_pairs/numtc; 1515 /* In MFP case we can have a much lower count of MSIx
1516 * vectors available and so we need to lower the used
1517 * q count.
1518 */
1519 qcount = min_t(int, vsi->alloc_queue_pairs, pf->num_lan_msix);
1520 num_tc_qps = qcount / numtc;
1516 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC); 1521 num_tc_qps = min_t(int, num_tc_qps, I40E_MAX_QUEUES_PER_TC);
1517 1522
1518 /* Setup queue offset/count for all TCs for given VSI */ 1523 /* Setup queue offset/count for all TCs for given VSI */
@@ -2684,8 +2689,15 @@ static void i40e_vsi_config_dcb_rings(struct i40e_vsi *vsi)
2684 u16 qoffset, qcount; 2689 u16 qoffset, qcount;
2685 int i, n; 2690 int i, n;
2686 2691
2687 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) 2692 if (!(vsi->back->flags & I40E_FLAG_DCB_ENABLED)) {
2688 return; 2693 /* Reset the TC information */
2694 for (i = 0; i < vsi->num_queue_pairs; i++) {
2695 rx_ring = vsi->rx_rings[i];
2696 tx_ring = vsi->tx_rings[i];
2697 rx_ring->dcb_tc = 0;
2698 tx_ring->dcb_tc = 0;
2699 }
2700 }
2689 2701
2690 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) { 2702 for (n = 0; n < I40E_MAX_TRAFFIC_CLASS; n++) {
2691 if (!(vsi->tc_config.enabled_tc & (1 << n))) 2703 if (!(vsi->tc_config.enabled_tc & (1 << n)))
@@ -3830,6 +3842,12 @@ static void i40e_clear_interrupt_scheme(struct i40e_pf *pf)
3830{ 3842{
3831 int i; 3843 int i;
3832 3844
3845 i40e_stop_misc_vector(pf);
3846 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
3847 synchronize_irq(pf->msix_entries[0].vector);
3848 free_irq(pf->msix_entries[0].vector, pf);
3849 }
3850
3833 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1); 3851 i40e_put_lump(pf->irq_pile, 0, I40E_PILE_VALID_BIT-1);
3834 for (i = 0; i < pf->num_alloc_vsi; i++) 3852 for (i = 0; i < pf->num_alloc_vsi; i++)
3835 if (pf->vsi[i]) 3853 if (pf->vsi[i])
@@ -5254,8 +5272,14 @@ static int i40e_handle_lldp_event(struct i40e_pf *pf,
5254 5272
5255 /* Wait for the PF's Tx queues to be disabled */ 5273 /* Wait for the PF's Tx queues to be disabled */
5256 ret = i40e_pf_wait_txq_disabled(pf); 5274 ret = i40e_pf_wait_txq_disabled(pf);
5257 if (!ret) 5275 if (ret) {
5276 /* Schedule PF reset to recover */
5277 set_bit(__I40E_PF_RESET_REQUESTED, &pf->state);
5278 i40e_service_event_schedule(pf);
5279 } else {
5258 i40e_pf_unquiesce_all_vsi(pf); 5280 i40e_pf_unquiesce_all_vsi(pf);
5281 }
5282
5259exit: 5283exit:
5260 return ret; 5284 return ret;
5261} 5285}
@@ -5587,7 +5611,8 @@ static void i40e_check_hang_subtask(struct i40e_pf *pf)
5587 int i, v; 5611 int i, v;
5588 5612
5589 /* If we're down or resetting, just bail */ 5613 /* If we're down or resetting, just bail */
5590 if (test_bit(__I40E_CONFIG_BUSY, &pf->state)) 5614 if (test_bit(__I40E_DOWN, &pf->state) ||
5615 test_bit(__I40E_CONFIG_BUSY, &pf->state))
5591 return; 5616 return;
5592 5617
5593 /* for each VSI/netdev 5618 /* for each VSI/netdev
@@ -9533,6 +9558,7 @@ static void i40e_remove(struct pci_dev *pdev)
9533 set_bit(__I40E_DOWN, &pf->state); 9558 set_bit(__I40E_DOWN, &pf->state);
9534 del_timer_sync(&pf->service_timer); 9559 del_timer_sync(&pf->service_timer);
9535 cancel_work_sync(&pf->service_task); 9560 cancel_work_sync(&pf->service_task);
9561 i40e_fdir_teardown(pf);
9536 9562
9537 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) { 9563 if (pf->flags & I40E_FLAG_SRIOV_ENABLED) {
9538 i40e_free_vfs(pf); 9564 i40e_free_vfs(pf);
@@ -9559,12 +9585,6 @@ static void i40e_remove(struct pci_dev *pdev)
9559 if (pf->vsi[pf->lan_vsi]) 9585 if (pf->vsi[pf->lan_vsi])
9560 i40e_vsi_release(pf->vsi[pf->lan_vsi]); 9586 i40e_vsi_release(pf->vsi[pf->lan_vsi]);
9561 9587
9562 i40e_stop_misc_vector(pf);
9563 if (pf->flags & I40E_FLAG_MSIX_ENABLED) {
9564 synchronize_irq(pf->msix_entries[0].vector);
9565 free_irq(pf->msix_entries[0].vector, pf);
9566 }
9567
9568 /* shutdown and destroy the HMC */ 9588 /* shutdown and destroy the HMC */
9569 if (pf->hw.hmc.hmc_obj) { 9589 if (pf->hw.hmc.hmc_obj) {
9570 ret_code = i40e_shutdown_lan_hmc(&pf->hw); 9590 ret_code = i40e_shutdown_lan_hmc(&pf->hw);
@@ -9718,6 +9738,8 @@ static void i40e_shutdown(struct pci_dev *pdev)
9718 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0)); 9738 wr32(hw, I40E_PFPM_APM, (pf->wol_en ? I40E_PFPM_APM_APME_MASK : 0));
9719 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0)); 9739 wr32(hw, I40E_PFPM_WUFC, (pf->wol_en ? I40E_PFPM_WUFC_MAG_MASK : 0));
9720 9740
9741 i40e_clear_interrupt_scheme(pf);
9742
9721 if (system_state == SYSTEM_POWER_OFF) { 9743 if (system_state == SYSTEM_POWER_OFF) {
9722 pci_wake_from_d3(pdev, pf->wol_en); 9744 pci_wake_from_d3(pdev, pf->wol_en);
9723 pci_set_power_state(pdev, PCI_D3hot); 9745 pci_set_power_state(pdev, PCI_D3hot);
diff --git a/drivers/net/ethernet/intel/i40e/i40e_nvm.c b/drivers/net/ethernet/intel/i40e/i40e_nvm.c
index 3e70f2e45a47..5defe0d63514 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_nvm.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_nvm.c
@@ -679,9 +679,11 @@ static i40e_status i40e_nvmupd_state_writing(struct i40e_hw *hw,
679{ 679{
680 i40e_status status; 680 i40e_status status;
681 enum i40e_nvmupd_cmd upd_cmd; 681 enum i40e_nvmupd_cmd upd_cmd;
682 bool retry_attempt = false;
682 683
683 upd_cmd = i40e_nvmupd_validate_command(hw, cmd, errno); 684 upd_cmd = i40e_nvmupd_validate_command(hw, cmd, errno);
684 685
686retry:
685 switch (upd_cmd) { 687 switch (upd_cmd) {
686 case I40E_NVMUPD_WRITE_CON: 688 case I40E_NVMUPD_WRITE_CON:
687 status = i40e_nvmupd_nvm_write(hw, cmd, bytes, errno); 689 status = i40e_nvmupd_nvm_write(hw, cmd, bytes, errno);
@@ -725,6 +727,39 @@ static i40e_status i40e_nvmupd_state_writing(struct i40e_hw *hw,
725 *errno = -ESRCH; 727 *errno = -ESRCH;
726 break; 728 break;
727 } 729 }
730
731 /* In some circumstances, a multi-write transaction takes longer
732 * than the default 3 minute timeout on the write semaphore. If
733 * the write failed with an EBUSY status, this is likely the problem,
734 * so here we try to reacquire the semaphore then retry the write.
735 * We only do one retry, then give up.
736 */
737 if (status && (hw->aq.asq_last_status == I40E_AQ_RC_EBUSY) &&
738 !retry_attempt) {
739 i40e_status old_status = status;
740 u32 old_asq_status = hw->aq.asq_last_status;
741 u32 gtime;
742
743 gtime = rd32(hw, I40E_GLVFGEN_TIMER);
744 if (gtime >= hw->nvm.hw_semaphore_timeout) {
745 i40e_debug(hw, I40E_DEBUG_ALL,
746 "NVMUPD: write semaphore expired (%d >= %lld), retrying\n",
747 gtime, hw->nvm.hw_semaphore_timeout);
748 i40e_release_nvm(hw);
749 status = i40e_acquire_nvm(hw, I40E_RESOURCE_WRITE);
750 if (status) {
751 i40e_debug(hw, I40E_DEBUG_ALL,
752 "NVMUPD: write semaphore reacquire failed aq_err = %d\n",
753 hw->aq.asq_last_status);
754 status = old_status;
755 hw->aq.asq_last_status = old_asq_status;
756 } else {
757 retry_attempt = true;
758 goto retry;
759 }
760 }
761 }
762
728 return status; 763 return status;
729} 764}
730 765
diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.c b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
index 2206d2d36f0f..bbf1b1247ac4 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.c
+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.c
@@ -586,6 +586,20 @@ void i40e_free_tx_resources(struct i40e_ring *tx_ring)
586} 586}
587 587
588/** 588/**
589 * i40e_get_head - Retrieve head from head writeback
590 * @tx_ring: tx ring to fetch head of
591 *
592 * Returns value of Tx ring head based on value stored
593 * in head write-back location
594 **/
595static inline u32 i40e_get_head(struct i40e_ring *tx_ring)
596{
597 void *head = (struct i40e_tx_desc *)tx_ring->desc + tx_ring->count;
598
599 return le32_to_cpu(*(volatile __le32 *)head);
600}
601
602/**
589 * i40e_get_tx_pending - how many tx descriptors not processed 603 * i40e_get_tx_pending - how many tx descriptors not processed
590 * @tx_ring: the ring of descriptors 604 * @tx_ring: the ring of descriptors
591 * 605 *
@@ -594,10 +608,16 @@ void i40e_free_tx_resources(struct i40e_ring *tx_ring)
594 **/ 608 **/
595static u32 i40e_get_tx_pending(struct i40e_ring *ring) 609static u32 i40e_get_tx_pending(struct i40e_ring *ring)
596{ 610{
597 u32 ntu = ((ring->next_to_clean <= ring->next_to_use) 611 u32 head, tail;
598 ? ring->next_to_use 612
599 : ring->next_to_use + ring->count); 613 head = i40e_get_head(ring);
600 return ntu - ring->next_to_clean; 614 tail = readl(ring->tail);
615
616 if (head != tail)
617 return (head < tail) ?
618 tail - head : (tail + ring->count - head);
619
620 return 0;
601} 621}
602 622
603/** 623/**
@@ -606,6 +626,8 @@ static u32 i40e_get_tx_pending(struct i40e_ring *ring)
606 **/ 626 **/
607static bool i40e_check_tx_hang(struct i40e_ring *tx_ring) 627static bool i40e_check_tx_hang(struct i40e_ring *tx_ring)
608{ 628{
629 u32 tx_done = tx_ring->stats.packets;
630 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
609 u32 tx_pending = i40e_get_tx_pending(tx_ring); 631 u32 tx_pending = i40e_get_tx_pending(tx_ring);
610 struct i40e_pf *pf = tx_ring->vsi->back; 632 struct i40e_pf *pf = tx_ring->vsi->back;
611 bool ret = false; 633 bool ret = false;
@@ -623,41 +645,25 @@ static bool i40e_check_tx_hang(struct i40e_ring *tx_ring)
623 * run the check_tx_hang logic with a transmit completion 645 * run the check_tx_hang logic with a transmit completion
624 * pending but without time to complete it yet. 646 * pending but without time to complete it yet.
625 */ 647 */
626 if ((tx_ring->tx_stats.tx_done_old == tx_ring->stats.packets) && 648 if ((tx_done_old == tx_done) && tx_pending) {
627 (tx_pending >= I40E_MIN_DESC_PENDING)) {
628 /* make sure it is true for two checks in a row */ 649 /* make sure it is true for two checks in a row */
629 ret = test_and_set_bit(__I40E_HANG_CHECK_ARMED, 650 ret = test_and_set_bit(__I40E_HANG_CHECK_ARMED,
630 &tx_ring->state); 651 &tx_ring->state);
631 } else if ((tx_ring->tx_stats.tx_done_old == tx_ring->stats.packets) && 652 } else if (tx_done_old == tx_done &&
632 (tx_pending < I40E_MIN_DESC_PENDING) && 653 (tx_pending < I40E_MIN_DESC_PENDING) && (tx_pending > 0)) {
633 (tx_pending > 0)) {
634 if (I40E_DEBUG_FLOW & pf->hw.debug_mask) 654 if (I40E_DEBUG_FLOW & pf->hw.debug_mask)
635 dev_info(tx_ring->dev, "HW needs some more descs to do a cacheline flush. tx_pending %d, queue %d", 655 dev_info(tx_ring->dev, "HW needs some more descs to do a cacheline flush. tx_pending %d, queue %d",
636 tx_pending, tx_ring->queue_index); 656 tx_pending, tx_ring->queue_index);
637 pf->tx_sluggish_count++; 657 pf->tx_sluggish_count++;
638 } else { 658 } else {
639 /* update completed stats and disarm the hang check */ 659 /* update completed stats and disarm the hang check */
640 tx_ring->tx_stats.tx_done_old = tx_ring->stats.packets; 660 tx_ring->tx_stats.tx_done_old = tx_done;
641 clear_bit(__I40E_HANG_CHECK_ARMED, &tx_ring->state); 661 clear_bit(__I40E_HANG_CHECK_ARMED, &tx_ring->state);
642 } 662 }
643 663
644 return ret; 664 return ret;
645} 665}
646 666
647/**
648 * i40e_get_head - Retrieve head from head writeback
649 * @tx_ring: tx ring to fetch head of
650 *
651 * Returns value of Tx ring head based on value stored
652 * in head write-back location
653 **/
654static inline u32 i40e_get_head(struct i40e_ring *tx_ring)
655{
656 void *head = (struct i40e_tx_desc *)tx_ring->desc + tx_ring->count;
657
658 return le32_to_cpu(*(volatile __le32 *)head);
659}
660
661#define WB_STRIDE 0x3 667#define WB_STRIDE 0x3
662 668
663/** 669/**
@@ -2140,6 +2146,67 @@ static int i40e_maybe_stop_tx(struct i40e_ring *tx_ring, int size)
2140} 2146}
2141 2147
2142/** 2148/**
2149 * i40e_chk_linearize - Check if there are more than 8 fragments per packet
2150 * @skb: send buffer
2151 * @tx_flags: collected send information
2152 * @hdr_len: size of the packet header
2153 *
2154 * Note: Our HW can't scatter-gather more than 8 fragments to build
2155 * a packet on the wire and so we need to figure out the cases where we
2156 * need to linearize the skb.
2157 **/
2158static bool i40e_chk_linearize(struct sk_buff *skb, u32 tx_flags,
2159 const u8 hdr_len)
2160{
2161 struct skb_frag_struct *frag;
2162 bool linearize = false;
2163 unsigned int size = 0;
2164 u16 num_frags;
2165 u16 gso_segs;
2166
2167 num_frags = skb_shinfo(skb)->nr_frags;
2168 gso_segs = skb_shinfo(skb)->gso_segs;
2169
2170 if (tx_flags & (I40E_TX_FLAGS_TSO | I40E_TX_FLAGS_FSO)) {
2171 u16 j = 1;
2172
2173 if (num_frags < (I40E_MAX_BUFFER_TXD))
2174 goto linearize_chk_done;
2175 /* try the simple math, if we have too many frags per segment */
2176 if (DIV_ROUND_UP((num_frags + gso_segs), gso_segs) >
2177 I40E_MAX_BUFFER_TXD) {
2178 linearize = true;
2179 goto linearize_chk_done;
2180 }
2181 frag = &skb_shinfo(skb)->frags[0];
2182 size = hdr_len;
2183 /* we might still have more fragments per segment */
2184 do {
2185 size += skb_frag_size(frag);
2186 frag++; j++;
2187 if (j == I40E_MAX_BUFFER_TXD) {
2188 if (size < skb_shinfo(skb)->gso_size) {
2189 linearize = true;
2190 break;
2191 }
2192 j = 1;
2193 size -= skb_shinfo(skb)->gso_size;
2194 if (size)
2195 j++;
2196 size += hdr_len;
2197 }
2198 num_frags--;
2199 } while (num_frags);
2200 } else {
2201 if (num_frags >= I40E_MAX_BUFFER_TXD)
2202 linearize = true;
2203 }
2204
2205linearize_chk_done:
2206 return linearize;
2207}
2208
2209/**
2143 * i40e_tx_map - Build the Tx descriptor 2210 * i40e_tx_map - Build the Tx descriptor
2144 * @tx_ring: ring to send buffer on 2211 * @tx_ring: ring to send buffer on
2145 * @skb: send buffer 2212 * @skb: send buffer
@@ -2396,6 +2463,10 @@ static netdev_tx_t i40e_xmit_frame_ring(struct sk_buff *skb,
2396 if (tsyn) 2463 if (tsyn)
2397 tx_flags |= I40E_TX_FLAGS_TSYN; 2464 tx_flags |= I40E_TX_FLAGS_TSYN;
2398 2465
2466 if (i40e_chk_linearize(skb, tx_flags, hdr_len))
2467 if (skb_linearize(skb))
2468 goto out_drop;
2469
2399 skb_tx_timestamp(skb); 2470 skb_tx_timestamp(skb);
2400 2471
2401 /* always enable CRC insertion offload */ 2472 /* always enable CRC insertion offload */
diff --git a/drivers/net/ethernet/intel/i40e/i40e_txrx.h b/drivers/net/ethernet/intel/i40e/i40e_txrx.h
index 18b00231d2f1..dff0baeb1ecc 100644
--- a/drivers/net/ethernet/intel/i40e/i40e_txrx.h
+++ b/drivers/net/ethernet/intel/i40e/i40e_txrx.h
@@ -112,6 +112,7 @@ enum i40e_dyn_idx_t {
112 112
113#define i40e_rx_desc i40e_32byte_rx_desc 113#define i40e_rx_desc i40e_32byte_rx_desc
114 114
115#define I40E_MAX_BUFFER_TXD 8
115#define I40E_MIN_TX_LEN 17 116#define I40E_MIN_TX_LEN 17
116#define I40E_MAX_DATA_PER_TXD 8192 117#define I40E_MAX_DATA_PER_TXD 8192
117 118
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
index 29004382f462..708891571dae 100644
--- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
+++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.c
@@ -126,6 +126,20 @@ void i40evf_free_tx_resources(struct i40e_ring *tx_ring)
126} 126}
127 127
128/** 128/**
129 * i40e_get_head - Retrieve head from head writeback
130 * @tx_ring: tx ring to fetch head of
131 *
132 * Returns value of Tx ring head based on value stored
133 * in head write-back location
134 **/
135static inline u32 i40e_get_head(struct i40e_ring *tx_ring)
136{
137 void *head = (struct i40e_tx_desc *)tx_ring->desc + tx_ring->count;
138
139 return le32_to_cpu(*(volatile __le32 *)head);
140}
141
142/**
129 * i40e_get_tx_pending - how many tx descriptors not processed 143 * i40e_get_tx_pending - how many tx descriptors not processed
130 * @tx_ring: the ring of descriptors 144 * @tx_ring: the ring of descriptors
131 * 145 *
@@ -134,10 +148,16 @@ void i40evf_free_tx_resources(struct i40e_ring *tx_ring)
134 **/ 148 **/
135static u32 i40e_get_tx_pending(struct i40e_ring *ring) 149static u32 i40e_get_tx_pending(struct i40e_ring *ring)
136{ 150{
137 u32 ntu = ((ring->next_to_clean <= ring->next_to_use) 151 u32 head, tail;
138 ? ring->next_to_use 152
139 : ring->next_to_use + ring->count); 153 head = i40e_get_head(ring);
140 return ntu - ring->next_to_clean; 154 tail = readl(ring->tail);
155
156 if (head != tail)
157 return (head < tail) ?
158 tail - head : (tail + ring->count - head);
159
160 return 0;
141} 161}
142 162
143/** 163/**
@@ -146,6 +166,8 @@ static u32 i40e_get_tx_pending(struct i40e_ring *ring)
146 **/ 166 **/
147static bool i40e_check_tx_hang(struct i40e_ring *tx_ring) 167static bool i40e_check_tx_hang(struct i40e_ring *tx_ring)
148{ 168{
169 u32 tx_done = tx_ring->stats.packets;
170 u32 tx_done_old = tx_ring->tx_stats.tx_done_old;
149 u32 tx_pending = i40e_get_tx_pending(tx_ring); 171 u32 tx_pending = i40e_get_tx_pending(tx_ring);
150 bool ret = false; 172 bool ret = false;
151 173
@@ -162,36 +184,20 @@ static bool i40e_check_tx_hang(struct i40e_ring *tx_ring)
162 * run the check_tx_hang logic with a transmit completion 184 * run the check_tx_hang logic with a transmit completion
163 * pending but without time to complete it yet. 185 * pending but without time to complete it yet.
164 */ 186 */
165 if ((tx_ring->tx_stats.tx_done_old == tx_ring->stats.packets) && 187 if ((tx_done_old == tx_done) && tx_pending) {
166 (tx_pending >= I40E_MIN_DESC_PENDING)) {
167 /* make sure it is true for two checks in a row */ 188 /* make sure it is true for two checks in a row */
168 ret = test_and_set_bit(__I40E_HANG_CHECK_ARMED, 189 ret = test_and_set_bit(__I40E_HANG_CHECK_ARMED,
169 &tx_ring->state); 190 &tx_ring->state);
170 } else if (!(tx_ring->tx_stats.tx_done_old == tx_ring->stats.packets) || 191 } else if (tx_done_old == tx_done &&
171 !(tx_pending < I40E_MIN_DESC_PENDING) || 192 (tx_pending < I40E_MIN_DESC_PENDING) && (tx_pending > 0)) {
172 !(tx_pending > 0)) {
173 /* update completed stats and disarm the hang check */ 193 /* update completed stats and disarm the hang check */
174 tx_ring->tx_stats.tx_done_old = tx_ring->stats.packets; 194 tx_ring->tx_stats.tx_done_old = tx_done;
175 clear_bit(__I40E_HANG_CHECK_ARMED, &tx_ring->state); 195 clear_bit(__I40E_HANG_CHECK_ARMED, &tx_ring->state);
176 } 196 }
177 197
178 return ret; 198 return ret;
179} 199}
180 200
181/**
182 * i40e_get_head - Retrieve head from head writeback
183 * @tx_ring: tx ring to fetch head of
184 *
185 * Returns value of Tx ring head based on value stored
186 * in head write-back location
187 **/
188static inline u32 i40e_get_head(struct i40e_ring *tx_ring)
189{
190 void *head = (struct i40e_tx_desc *)tx_ring->desc + tx_ring->count;
191
192 return le32_to_cpu(*(volatile __le32 *)head);
193}
194
195#define WB_STRIDE 0x3 201#define WB_STRIDE 0x3
196 202
197/** 203/**
@@ -1206,17 +1212,16 @@ static int i40e_tso(struct i40e_ring *tx_ring, struct sk_buff *skb,
1206 if (err < 0) 1212 if (err < 0)
1207 return err; 1213 return err;
1208 1214
1209 if (protocol == htons(ETH_P_IP)) { 1215 iph = skb->encapsulation ? inner_ip_hdr(skb) : ip_hdr(skb);
1210 iph = skb->encapsulation ? inner_ip_hdr(skb) : ip_hdr(skb); 1216 ipv6h = skb->encapsulation ? inner_ipv6_hdr(skb) : ipv6_hdr(skb);
1217
1218 if (iph->version == 4) {
1211 tcph = skb->encapsulation ? inner_tcp_hdr(skb) : tcp_hdr(skb); 1219 tcph = skb->encapsulation ? inner_tcp_hdr(skb) : tcp_hdr(skb);
1212 iph->tot_len = 0; 1220 iph->tot_len = 0;
1213 iph->check = 0; 1221 iph->check = 0;
1214 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr, 1222 tcph->check = ~csum_tcpudp_magic(iph->saddr, iph->daddr,
1215 0, IPPROTO_TCP, 0); 1223 0, IPPROTO_TCP, 0);
1216 } else if (skb_is_gso_v6(skb)) { 1224 } else if (ipv6h->version == 6) {
1217
1218 ipv6h = skb->encapsulation ? inner_ipv6_hdr(skb)
1219 : ipv6_hdr(skb);
1220 tcph = skb->encapsulation ? inner_tcp_hdr(skb) : tcp_hdr(skb); 1225 tcph = skb->encapsulation ? inner_tcp_hdr(skb) : tcp_hdr(skb);
1221 ipv6h->payload_len = 0; 1226 ipv6h->payload_len = 0;
1222 tcph->check = ~csum_ipv6_magic(&ipv6h->saddr, &ipv6h->daddr, 1227 tcph->check = ~csum_ipv6_magic(&ipv6h->saddr, &ipv6h->daddr,
@@ -1274,13 +1279,9 @@ static void i40e_tx_enable_csum(struct sk_buff *skb, u32 tx_flags,
1274 I40E_TX_CTX_EXT_IP_IPV4_NO_CSUM; 1279 I40E_TX_CTX_EXT_IP_IPV4_NO_CSUM;
1275 } 1280 }
1276 } else if (tx_flags & I40E_TX_FLAGS_IPV6) { 1281 } else if (tx_flags & I40E_TX_FLAGS_IPV6) {
1277 if (tx_flags & I40E_TX_FLAGS_TSO) { 1282 *cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV6;
1278 *cd_tunneling |= I40E_TX_CTX_EXT_IP_IPV6; 1283 if (tx_flags & I40E_TX_FLAGS_TSO)
1279 ip_hdr(skb)->check = 0; 1284 ip_hdr(skb)->check = 0;
1280 } else {
1281 *cd_tunneling |=
1282 I40E_TX_CTX_EXT_IP_IPV4_NO_CSUM;
1283 }
1284 } 1285 }
1285 1286
1286 /* Now set the ctx descriptor fields */ 1287 /* Now set the ctx descriptor fields */
@@ -1290,6 +1291,11 @@ static void i40e_tx_enable_csum(struct sk_buff *skb, u32 tx_flags,
1290 ((skb_inner_network_offset(skb) - 1291 ((skb_inner_network_offset(skb) -
1291 skb_transport_offset(skb)) >> 1) << 1292 skb_transport_offset(skb)) >> 1) <<
1292 I40E_TXD_CTX_QW0_NATLEN_SHIFT; 1293 I40E_TXD_CTX_QW0_NATLEN_SHIFT;
1294 if (this_ip_hdr->version == 6) {
1295 tx_flags &= ~I40E_TX_FLAGS_IPV4;
1296 tx_flags |= I40E_TX_FLAGS_IPV6;
1297 }
1298
1293 1299
1294 } else { 1300 } else {
1295 network_hdr_len = skb_network_header_len(skb); 1301 network_hdr_len = skb_network_header_len(skb);
@@ -1380,6 +1386,67 @@ static void i40e_create_tx_ctx(struct i40e_ring *tx_ring,
1380 context_desc->type_cmd_tso_mss = cpu_to_le64(cd_type_cmd_tso_mss); 1386 context_desc->type_cmd_tso_mss = cpu_to_le64(cd_type_cmd_tso_mss);
1381} 1387}
1382 1388
1389 /**
1390 * i40e_chk_linearize - Check if there are more than 8 fragments per packet
1391 * @skb: send buffer
1392 * @tx_flags: collected send information
1393 * @hdr_len: size of the packet header
1394 *
1395 * Note: Our HW can't scatter-gather more than 8 fragments to build
1396 * a packet on the wire and so we need to figure out the cases where we
1397 * need to linearize the skb.
1398 **/
1399static bool i40e_chk_linearize(struct sk_buff *skb, u32 tx_flags,
1400 const u8 hdr_len)
1401{
1402 struct skb_frag_struct *frag;
1403 bool linearize = false;
1404 unsigned int size = 0;
1405 u16 num_frags;
1406 u16 gso_segs;
1407
1408 num_frags = skb_shinfo(skb)->nr_frags;
1409 gso_segs = skb_shinfo(skb)->gso_segs;
1410
1411 if (tx_flags & (I40E_TX_FLAGS_TSO | I40E_TX_FLAGS_FSO)) {
1412 u16 j = 1;
1413
1414 if (num_frags < (I40E_MAX_BUFFER_TXD))
1415 goto linearize_chk_done;
1416 /* try the simple math, if we have too many frags per segment */
1417 if (DIV_ROUND_UP((num_frags + gso_segs), gso_segs) >
1418 I40E_MAX_BUFFER_TXD) {
1419 linearize = true;
1420 goto linearize_chk_done;
1421 }
1422 frag = &skb_shinfo(skb)->frags[0];
1423 size = hdr_len;
1424 /* we might still have more fragments per segment */
1425 do {
1426 size += skb_frag_size(frag);
1427 frag++; j++;
1428 if (j == I40E_MAX_BUFFER_TXD) {
1429 if (size < skb_shinfo(skb)->gso_size) {
1430 linearize = true;
1431 break;
1432 }
1433 j = 1;
1434 size -= skb_shinfo(skb)->gso_size;
1435 if (size)
1436 j++;
1437 size += hdr_len;
1438 }
1439 num_frags--;
1440 } while (num_frags);
1441 } else {
1442 if (num_frags >= I40E_MAX_BUFFER_TXD)
1443 linearize = true;
1444 }
1445
1446linearize_chk_done:
1447 return linearize;
1448}
1449
1383/** 1450/**
1384 * i40e_tx_map - Build the Tx descriptor 1451 * i40e_tx_map - Build the Tx descriptor
1385 * @tx_ring: ring to send buffer on 1452 * @tx_ring: ring to send buffer on
@@ -1654,6 +1721,10 @@ static netdev_tx_t i40e_xmit_frame_ring(struct sk_buff *skb,
1654 else if (tso) 1721 else if (tso)
1655 tx_flags |= I40E_TX_FLAGS_TSO; 1722 tx_flags |= I40E_TX_FLAGS_TSO;
1656 1723
1724 if (i40e_chk_linearize(skb, tx_flags, hdr_len))
1725 if (skb_linearize(skb))
1726 goto out_drop;
1727
1657 skb_tx_timestamp(skb); 1728 skb_tx_timestamp(skb);
1658 1729
1659 /* always enable CRC insertion offload */ 1730 /* always enable CRC insertion offload */
diff --git a/drivers/net/ethernet/intel/i40evf/i40e_txrx.h b/drivers/net/ethernet/intel/i40evf/i40e_txrx.h
index 4e15903b2b6d..c950a038237c 100644
--- a/drivers/net/ethernet/intel/i40evf/i40e_txrx.h
+++ b/drivers/net/ethernet/intel/i40evf/i40e_txrx.h
@@ -112,6 +112,7 @@ enum i40e_dyn_idx_t {
112 112
113#define i40e_rx_desc i40e_32byte_rx_desc 113#define i40e_rx_desc i40e_32byte_rx_desc
114 114
115#define I40E_MAX_BUFFER_TXD 8
115#define I40E_MIN_TX_LEN 17 116#define I40E_MIN_TX_LEN 17
116#define I40E_MAX_DATA_PER_TXD 8192 117#define I40E_MAX_DATA_PER_TXD 8192
117 118
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
index 2a210c4efb89..ebce5bb24df9 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_netdev.c
@@ -1698,8 +1698,6 @@ int mlx4_en_start_port(struct net_device *dev)
1698 /* Schedule multicast task to populate multicast list */ 1698 /* Schedule multicast task to populate multicast list */
1699 queue_work(mdev->workqueue, &priv->rx_mode_task); 1699 queue_work(mdev->workqueue, &priv->rx_mode_task);
1700 1700
1701 mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
1702
1703#ifdef CONFIG_MLX4_EN_VXLAN 1701#ifdef CONFIG_MLX4_EN_VXLAN
1704 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) 1702 if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
1705 vxlan_get_rx_port(dev); 1703 vxlan_get_rx_port(dev);
@@ -2853,6 +2851,8 @@ int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
2853 queue_delayed_work(mdev->workqueue, &priv->service_task, 2851 queue_delayed_work(mdev->workqueue, &priv->service_task,
2854 SERVICE_TASK_DELAY); 2852 SERVICE_TASK_DELAY);
2855 2853
2854 mlx4_set_stats_bitmap(mdev->dev, &priv->stats_bitmap);
2855
2856 return 0; 2856 return 0;
2857 2857
2858out: 2858out:
diff --git a/drivers/net/ethernet/mellanox/mlx4/en_selftest.c b/drivers/net/ethernet/mellanox/mlx4/en_selftest.c
index 2d8ee66138e8..a61009f4b2df 100644
--- a/drivers/net/ethernet/mellanox/mlx4/en_selftest.c
+++ b/drivers/net/ethernet/mellanox/mlx4/en_selftest.c
@@ -81,12 +81,14 @@ static int mlx4_en_test_loopback(struct mlx4_en_priv *priv)
81{ 81{
82 u32 loopback_ok = 0; 82 u32 loopback_ok = 0;
83 int i; 83 int i;
84 84 bool gro_enabled;
85 85
86 priv->loopback_ok = 0; 86 priv->loopback_ok = 0;
87 priv->validate_loopback = 1; 87 priv->validate_loopback = 1;
88 gro_enabled = priv->dev->features & NETIF_F_GRO;
88 89
89 mlx4_en_update_loopback_state(priv->dev, priv->dev->features); 90 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
91 priv->dev->features &= ~NETIF_F_GRO;
90 92
91 /* xmit */ 93 /* xmit */
92 if (mlx4_en_test_loopback_xmit(priv)) { 94 if (mlx4_en_test_loopback_xmit(priv)) {
@@ -108,6 +110,10 @@ static int mlx4_en_test_loopback(struct mlx4_en_priv *priv)
108mlx4_en_test_loopback_exit: 110mlx4_en_test_loopback_exit:
109 111
110 priv->validate_loopback = 0; 112 priv->validate_loopback = 0;
113
114 if (gro_enabled)
115 priv->dev->features |= NETIF_F_GRO;
116
111 mlx4_en_update_loopback_state(priv->dev, priv->dev->features); 117 mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
112 return !loopback_ok; 118 return !loopback_ok;
113} 119}
diff --git a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
index 2a8268e6be15..ebbe244e80dd 100644
--- a/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
+++ b/drivers/net/ethernet/mellanox/mlx4/mlx4_en.h
@@ -453,7 +453,7 @@ struct mlx4_en_port_stats {
453 unsigned long rx_chksum_none; 453 unsigned long rx_chksum_none;
454 unsigned long rx_chksum_complete; 454 unsigned long rx_chksum_complete;
455 unsigned long tx_chksum_offload; 455 unsigned long tx_chksum_offload;
456#define NUM_PORT_STATS 9 456#define NUM_PORT_STATS 10
457}; 457};
458 458
459struct mlx4_en_perf_stats { 459struct mlx4_en_perf_stats {
diff --git a/drivers/net/ethernet/mellanox/mlx4/qp.c b/drivers/net/ethernet/mellanox/mlx4/qp.c
index 2bb8553bd905..eda29dbbfcd2 100644
--- a/drivers/net/ethernet/mellanox/mlx4/qp.c
+++ b/drivers/net/ethernet/mellanox/mlx4/qp.c
@@ -412,7 +412,6 @@ err_icm:
412 412
413EXPORT_SYMBOL_GPL(mlx4_qp_alloc); 413EXPORT_SYMBOL_GPL(mlx4_qp_alloc);
414 414
415#define MLX4_UPDATE_QP_SUPPORTED_ATTRS MLX4_UPDATE_QP_SMAC
416int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn, 415int mlx4_update_qp(struct mlx4_dev *dev, u32 qpn,
417 enum mlx4_update_qp_attr attr, 416 enum mlx4_update_qp_attr attr,
418 struct mlx4_update_qp_params *params) 417 struct mlx4_update_qp_params *params)
diff --git a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
index 486e3d26cd4a..d97ca88c55b5 100644
--- a/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
+++ b/drivers/net/ethernet/mellanox/mlx4/resource_tracker.c
@@ -713,7 +713,7 @@ static int update_vport_qp_param(struct mlx4_dev *dev,
713 struct mlx4_vport_oper_state *vp_oper; 713 struct mlx4_vport_oper_state *vp_oper;
714 struct mlx4_priv *priv; 714 struct mlx4_priv *priv;
715 u32 qp_type; 715 u32 qp_type;
716 int port; 716 int port, err = 0;
717 717
718 port = (qpc->pri_path.sched_queue & 0x40) ? 2 : 1; 718 port = (qpc->pri_path.sched_queue & 0x40) ? 2 : 1;
719 priv = mlx4_priv(dev); 719 priv = mlx4_priv(dev);
@@ -738,7 +738,9 @@ static int update_vport_qp_param(struct mlx4_dev *dev,
738 } else { 738 } else {
739 struct mlx4_update_qp_params params = {.flags = 0}; 739 struct mlx4_update_qp_params params = {.flags = 0};
740 740
741 mlx4_update_qp(dev, qpn, MLX4_UPDATE_QP_VSD, &params); 741 err = mlx4_update_qp(dev, qpn, MLX4_UPDATE_QP_VSD, &params);
742 if (err)
743 goto out;
742 } 744 }
743 } 745 }
744 746
@@ -773,7 +775,8 @@ static int update_vport_qp_param(struct mlx4_dev *dev,
773 qpc->pri_path.feup |= MLX4_FSM_FORCE_ETH_SRC_MAC; 775 qpc->pri_path.feup |= MLX4_FSM_FORCE_ETH_SRC_MAC;
774 qpc->pri_path.grh_mylmc = (0x80 & qpc->pri_path.grh_mylmc) + vp_oper->mac_idx; 776 qpc->pri_path.grh_mylmc = (0x80 & qpc->pri_path.grh_mylmc) + vp_oper->mac_idx;
775 } 777 }
776 return 0; 778out:
779 return err;
777} 780}
778 781
779static int mpt_mask(struct mlx4_dev *dev) 782static int mpt_mask(struct mlx4_dev *dev)
diff --git a/drivers/net/ethernet/pasemi/pasemi_mac.c b/drivers/net/ethernet/pasemi/pasemi_mac.c
index 44e8d7d25547..57a6e6cd74fc 100644
--- a/drivers/net/ethernet/pasemi/pasemi_mac.c
+++ b/drivers/net/ethernet/pasemi/pasemi_mac.c
@@ -1239,11 +1239,9 @@ static int pasemi_mac_open(struct net_device *dev)
1239 if (mac->phydev) 1239 if (mac->phydev)
1240 phy_start(mac->phydev); 1240 phy_start(mac->phydev);
1241 1241
1242 init_timer(&mac->tx->clean_timer); 1242 setup_timer(&mac->tx->clean_timer, pasemi_mac_tx_timer,
1243 mac->tx->clean_timer.function = pasemi_mac_tx_timer; 1243 (unsigned long)mac->tx);
1244 mac->tx->clean_timer.data = (unsigned long)mac->tx; 1244 mod_timer(&mac->tx->clean_timer, jiffies + HZ);
1245 mac->tx->clean_timer.expires = jiffies+HZ;
1246 add_timer(&mac->tx->clean_timer);
1247 1245
1248 return 0; 1246 return 0;
1249 1247
diff --git a/drivers/net/ethernet/qlogic/netxen/netxen_nic.h b/drivers/net/ethernet/qlogic/netxen/netxen_nic.h
index 6e426ae94692..0a5e204a0179 100644
--- a/drivers/net/ethernet/qlogic/netxen/netxen_nic.h
+++ b/drivers/net/ethernet/qlogic/netxen/netxen_nic.h
@@ -354,7 +354,7 @@ struct cmd_desc_type0 {
354 354
355} __attribute__ ((aligned(64))); 355} __attribute__ ((aligned(64)));
356 356
357/* Note: sizeof(rcv_desc) should always be a mutliple of 2 */ 357/* Note: sizeof(rcv_desc) should always be a multiple of 2 */
358struct rcv_desc { 358struct rcv_desc {
359 __le16 reference_handle; 359 __le16 reference_handle;
360 __le16 reserved; 360 __le16 reserved;
@@ -499,7 +499,7 @@ struct uni_data_desc{
499#define NETXEN_IMAGE_START 0x43000 /* compressed image */ 499#define NETXEN_IMAGE_START 0x43000 /* compressed image */
500#define NETXEN_SECONDARY_START 0x200000 /* backup images */ 500#define NETXEN_SECONDARY_START 0x200000 /* backup images */
501#define NETXEN_PXE_START 0x3E0000 /* PXE boot rom */ 501#define NETXEN_PXE_START 0x3E0000 /* PXE boot rom */
502#define NETXEN_USER_START 0x3E8000 /* Firmare info */ 502#define NETXEN_USER_START 0x3E8000 /* Firmware info */
503#define NETXEN_FIXED_START 0x3F0000 /* backup of crbinit */ 503#define NETXEN_FIXED_START 0x3F0000 /* backup of crbinit */
504#define NETXEN_USER_START_OLD NETXEN_PXE_START /* very old flash */ 504#define NETXEN_USER_START_OLD NETXEN_PXE_START /* very old flash */
505 505
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
index fa4317611fd6..f221126a5c4e 100644
--- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
+++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h
@@ -314,7 +314,7 @@ struct qlcnic_fdt {
314#define QLCNIC_BRDCFG_START 0x4000 /* board config */ 314#define QLCNIC_BRDCFG_START 0x4000 /* board config */
315#define QLCNIC_BOOTLD_START 0x10000 /* bootld */ 315#define QLCNIC_BOOTLD_START 0x10000 /* bootld */
316#define QLCNIC_IMAGE_START 0x43000 /* compressed image */ 316#define QLCNIC_IMAGE_START 0x43000 /* compressed image */
317#define QLCNIC_USER_START 0x3E8000 /* Firmare info */ 317#define QLCNIC_USER_START 0x3E8000 /* Firmware info */
318 318
319#define QLCNIC_FW_VERSION_OFFSET (QLCNIC_USER_START+0x408) 319#define QLCNIC_FW_VERSION_OFFSET (QLCNIC_USER_START+0x408)
320#define QLCNIC_FW_SIZE_OFFSET (QLCNIC_USER_START+0x40c) 320#define QLCNIC_FW_SIZE_OFFSET (QLCNIC_USER_START+0x40c)
diff --git a/drivers/net/ethernet/realtek/r8169.c b/drivers/net/ethernet/realtek/r8169.c
index ad0020af2193..c70ab40d8698 100644
--- a/drivers/net/ethernet/realtek/r8169.c
+++ b/drivers/net/ethernet/realtek/r8169.c
@@ -2561,7 +2561,7 @@ static int rtl_check_firmware(struct rtl8169_private *tp, struct rtl_fw *rtl_fw)
2561 int rc = -EINVAL; 2561 int rc = -EINVAL;
2562 2562
2563 if (!rtl_fw_format_ok(tp, rtl_fw)) { 2563 if (!rtl_fw_format_ok(tp, rtl_fw)) {
2564 netif_err(tp, ifup, dev, "invalid firwmare\n"); 2564 netif_err(tp, ifup, dev, "invalid firmware\n");
2565 goto out; 2565 goto out;
2566 } 2566 }
2567 2567
@@ -5067,8 +5067,6 @@ static void rtl_hw_reset(struct rtl8169_private *tp)
5067 RTL_W8(ChipCmd, CmdReset); 5067 RTL_W8(ChipCmd, CmdReset);
5068 5068
5069 rtl_udelay_loop_wait_low(tp, &rtl_chipcmd_cond, 100, 100); 5069 rtl_udelay_loop_wait_low(tp, &rtl_chipcmd_cond, 100, 100);
5070
5071 netdev_reset_queue(tp->dev);
5072} 5070}
5073 5071
5074static void rtl_request_uncached_firmware(struct rtl8169_private *tp) 5072static void rtl_request_uncached_firmware(struct rtl8169_private *tp)
@@ -7049,7 +7047,6 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
7049 u32 status, len; 7047 u32 status, len;
7050 u32 opts[2]; 7048 u32 opts[2];
7051 int frags; 7049 int frags;
7052 bool stop_queue;
7053 7050
7054 if (unlikely(!TX_FRAGS_READY_FOR(tp, skb_shinfo(skb)->nr_frags))) { 7051 if (unlikely(!TX_FRAGS_READY_FOR(tp, skb_shinfo(skb)->nr_frags))) {
7055 netif_err(tp, drv, dev, "BUG! Tx Ring full when queue awake!\n"); 7052 netif_err(tp, drv, dev, "BUG! Tx Ring full when queue awake!\n");
@@ -7090,8 +7087,6 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
7090 7087
7091 txd->opts2 = cpu_to_le32(opts[1]); 7088 txd->opts2 = cpu_to_le32(opts[1]);
7092 7089
7093 netdev_sent_queue(dev, skb->len);
7094
7095 skb_tx_timestamp(skb); 7090 skb_tx_timestamp(skb);
7096 7091
7097 /* Force memory writes to complete before releasing descriptor */ 7092 /* Force memory writes to complete before releasing descriptor */
@@ -7106,16 +7101,11 @@ static netdev_tx_t rtl8169_start_xmit(struct sk_buff *skb,
7106 7101
7107 tp->cur_tx += frags + 1; 7102 tp->cur_tx += frags + 1;
7108 7103
7109 stop_queue = !TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS); 7104 RTL_W8(TxPoll, NPQ);
7110 7105
7111 if (!skb->xmit_more || stop_queue || 7106 mmiowb();
7112 netif_xmit_stopped(netdev_get_tx_queue(dev, 0))) {
7113 RTL_W8(TxPoll, NPQ);
7114
7115 mmiowb();
7116 }
7117 7107
7118 if (stop_queue) { 7108 if (!TX_FRAGS_READY_FOR(tp, MAX_SKB_FRAGS)) {
7119 /* Avoid wrongly optimistic queue wake-up: rtl_tx thread must 7109 /* Avoid wrongly optimistic queue wake-up: rtl_tx thread must
7120 * not miss a ring update when it notices a stopped queue. 7110 * not miss a ring update when it notices a stopped queue.
7121 */ 7111 */
@@ -7198,7 +7188,6 @@ static void rtl8169_pcierr_interrupt(struct net_device *dev)
7198static void rtl_tx(struct net_device *dev, struct rtl8169_private *tp) 7188static void rtl_tx(struct net_device *dev, struct rtl8169_private *tp)
7199{ 7189{
7200 unsigned int dirty_tx, tx_left; 7190 unsigned int dirty_tx, tx_left;
7201 unsigned int bytes_compl = 0, pkts_compl = 0;
7202 7191
7203 dirty_tx = tp->dirty_tx; 7192 dirty_tx = tp->dirty_tx;
7204 smp_rmb(); 7193 smp_rmb();
@@ -7222,8 +7211,10 @@ static void rtl_tx(struct net_device *dev, struct rtl8169_private *tp)
7222 rtl8169_unmap_tx_skb(&tp->pci_dev->dev, tx_skb, 7211 rtl8169_unmap_tx_skb(&tp->pci_dev->dev, tx_skb,
7223 tp->TxDescArray + entry); 7212 tp->TxDescArray + entry);
7224 if (status & LastFrag) { 7213 if (status & LastFrag) {
7225 pkts_compl++; 7214 u64_stats_update_begin(&tp->tx_stats.syncp);
7226 bytes_compl += tx_skb->skb->len; 7215 tp->tx_stats.packets++;
7216 tp->tx_stats.bytes += tx_skb->skb->len;
7217 u64_stats_update_end(&tp->tx_stats.syncp);
7227 dev_kfree_skb_any(tx_skb->skb); 7218 dev_kfree_skb_any(tx_skb->skb);
7228 tx_skb->skb = NULL; 7219 tx_skb->skb = NULL;
7229 } 7220 }
@@ -7232,13 +7223,6 @@ static void rtl_tx(struct net_device *dev, struct rtl8169_private *tp)
7232 } 7223 }
7233 7224
7234 if (tp->dirty_tx != dirty_tx) { 7225 if (tp->dirty_tx != dirty_tx) {
7235 netdev_completed_queue(tp->dev, pkts_compl, bytes_compl);
7236
7237 u64_stats_update_begin(&tp->tx_stats.syncp);
7238 tp->tx_stats.packets += pkts_compl;
7239 tp->tx_stats.bytes += bytes_compl;
7240 u64_stats_update_end(&tp->tx_stats.syncp);
7241
7242 tp->dirty_tx = dirty_tx; 7226 tp->dirty_tx = dirty_tx;
7243 /* Sync with rtl8169_start_xmit: 7227 /* Sync with rtl8169_start_xmit:
7244 * - publish dirty_tx ring index (write barrier) 7228 * - publish dirty_tx ring index (write barrier)
diff --git a/drivers/net/ethernet/renesas/sh_eth.c b/drivers/net/ethernet/renesas/sh_eth.c
index 4da8bd263997..736d5d1624a1 100644
--- a/drivers/net/ethernet/renesas/sh_eth.c
+++ b/drivers/net/ethernet/renesas/sh_eth.c
@@ -508,7 +508,6 @@ static struct sh_eth_cpu_data r8a779x_data = {
508 .tpauser = 1, 508 .tpauser = 1,
509 .hw_swap = 1, 509 .hw_swap = 1,
510 .rmiimode = 1, 510 .rmiimode = 1,
511 .shift_rd0 = 1,
512}; 511};
513 512
514static void sh_eth_set_rate_sh7724(struct net_device *ndev) 513static void sh_eth_set_rate_sh7724(struct net_device *ndev)
@@ -1392,6 +1391,9 @@ static void sh_eth_dev_exit(struct net_device *ndev)
1392 msleep(2); /* max frame time at 10 Mbps < 1250 us */ 1391 msleep(2); /* max frame time at 10 Mbps < 1250 us */
1393 sh_eth_get_stats(ndev); 1392 sh_eth_get_stats(ndev);
1394 sh_eth_reset(ndev); 1393 sh_eth_reset(ndev);
1394
1395 /* Set MAC address again */
1396 update_mac_address(ndev);
1395} 1397}
1396 1398
1397/* free Tx skb function */ 1399/* free Tx skb function */
@@ -1407,6 +1409,8 @@ static int sh_eth_txfree(struct net_device *ndev)
1407 txdesc = &mdp->tx_ring[entry]; 1409 txdesc = &mdp->tx_ring[entry];
1408 if (txdesc->status & cpu_to_edmac(mdp, TD_TACT)) 1410 if (txdesc->status & cpu_to_edmac(mdp, TD_TACT))
1409 break; 1411 break;
1412 /* TACT bit must be checked before all the following reads */
1413 rmb();
1410 /* Free the original skb. */ 1414 /* Free the original skb. */
1411 if (mdp->tx_skbuff[entry]) { 1415 if (mdp->tx_skbuff[entry]) {
1412 dma_unmap_single(&ndev->dev, txdesc->addr, 1416 dma_unmap_single(&ndev->dev, txdesc->addr,
@@ -1444,6 +1448,8 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
1444 limit = boguscnt; 1448 limit = boguscnt;
1445 rxdesc = &mdp->rx_ring[entry]; 1449 rxdesc = &mdp->rx_ring[entry];
1446 while (!(rxdesc->status & cpu_to_edmac(mdp, RD_RACT))) { 1450 while (!(rxdesc->status & cpu_to_edmac(mdp, RD_RACT))) {
1451 /* RACT bit must be checked before all the following reads */
1452 rmb();
1447 desc_status = edmac_to_cpu(mdp, rxdesc->status); 1453 desc_status = edmac_to_cpu(mdp, rxdesc->status);
1448 pkt_len = rxdesc->frame_length; 1454 pkt_len = rxdesc->frame_length;
1449 1455
@@ -1455,8 +1461,8 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
1455 1461
1456 /* In case of almost all GETHER/ETHERs, the Receive Frame State 1462 /* In case of almost all GETHER/ETHERs, the Receive Frame State
1457 * (RFS) bits in the Receive Descriptor 0 are from bit 9 to 1463 * (RFS) bits in the Receive Descriptor 0 are from bit 9 to
1458 * bit 0. However, in case of the R8A7740, R8A779x, and 1464 * bit 0. However, in case of the R8A7740 and R7S72100
1459 * R7S72100 the RFS bits are from bit 25 to bit 16. So, the 1465 * the RFS bits are from bit 25 to bit 16. So, the
1460 * driver needs right shifting by 16. 1466 * driver needs right shifting by 16.
1461 */ 1467 */
1462 if (mdp->cd->shift_rd0) 1468 if (mdp->cd->shift_rd0)
@@ -1523,6 +1529,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
1523 skb_checksum_none_assert(skb); 1529 skb_checksum_none_assert(skb);
1524 rxdesc->addr = dma_addr; 1530 rxdesc->addr = dma_addr;
1525 } 1531 }
1532 wmb(); /* RACT bit must be set after all the above writes */
1526 if (entry >= mdp->num_rx_ring - 1) 1533 if (entry >= mdp->num_rx_ring - 1)
1527 rxdesc->status |= 1534 rxdesc->status |=
1528 cpu_to_edmac(mdp, RD_RACT | RD_RFP | RD_RDEL); 1535 cpu_to_edmac(mdp, RD_RACT | RD_RFP | RD_RDEL);
@@ -1535,7 +1542,7 @@ static int sh_eth_rx(struct net_device *ndev, u32 intr_status, int *quota)
1535 /* If we don't need to check status, don't. -KDU */ 1542 /* If we don't need to check status, don't. -KDU */
1536 if (!(sh_eth_read(ndev, EDRRR) & EDRRR_R)) { 1543 if (!(sh_eth_read(ndev, EDRRR) & EDRRR_R)) {
1537 /* fix the values for the next receiving if RDE is set */ 1544 /* fix the values for the next receiving if RDE is set */
1538 if (intr_status & EESR_RDE) { 1545 if (intr_status & EESR_RDE && mdp->reg_offset[RDFAR] != 0) {
1539 u32 count = (sh_eth_read(ndev, RDFAR) - 1546 u32 count = (sh_eth_read(ndev, RDFAR) -
1540 sh_eth_read(ndev, RDLAR)) >> 4; 1547 sh_eth_read(ndev, RDLAR)) >> 4;
1541 1548
@@ -2174,7 +2181,7 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev)
2174 } 2181 }
2175 spin_unlock_irqrestore(&mdp->lock, flags); 2182 spin_unlock_irqrestore(&mdp->lock, flags);
2176 2183
2177 if (skb_padto(skb, ETH_ZLEN)) 2184 if (skb_put_padto(skb, ETH_ZLEN))
2178 return NETDEV_TX_OK; 2185 return NETDEV_TX_OK;
2179 2186
2180 entry = mdp->cur_tx % mdp->num_tx_ring; 2187 entry = mdp->cur_tx % mdp->num_tx_ring;
@@ -2192,6 +2199,7 @@ static int sh_eth_start_xmit(struct sk_buff *skb, struct net_device *ndev)
2192 } 2199 }
2193 txdesc->buffer_length = skb->len; 2200 txdesc->buffer_length = skb->len;
2194 2201
2202 wmb(); /* TACT bit must be set after all the above writes */
2195 if (entry >= mdp->num_tx_ring - 1) 2203 if (entry >= mdp->num_tx_ring - 1)
2196 txdesc->status |= cpu_to_edmac(mdp, TD_TACT | TD_TDLE); 2204 txdesc->status |= cpu_to_edmac(mdp, TD_TACT | TD_TDLE);
2197 else 2205 else
diff --git a/drivers/net/ethernet/rocker/rocker.c b/drivers/net/ethernet/rocker/rocker.c
index 34389b6aa67c..9fb6948e14c6 100644
--- a/drivers/net/ethernet/rocker/rocker.c
+++ b/drivers/net/ethernet/rocker/rocker.c
@@ -1257,9 +1257,9 @@ static void rocker_port_set_enable(struct rocker_port *rocker_port, bool enable)
1257 u64 val = rocker_read64(rocker_port->rocker, PORT_PHYS_ENABLE); 1257 u64 val = rocker_read64(rocker_port->rocker, PORT_PHYS_ENABLE);
1258 1258
1259 if (enable) 1259 if (enable)
1260 val |= 1 << rocker_port->lport; 1260 val |= 1ULL << rocker_port->lport;
1261 else 1261 else
1262 val &= ~(1 << rocker_port->lport); 1262 val &= ~(1ULL << rocker_port->lport);
1263 rocker_write64(rocker_port->rocker, PORT_PHYS_ENABLE, val); 1263 rocker_write64(rocker_port->rocker, PORT_PHYS_ENABLE, val);
1264} 1264}
1265 1265
@@ -4201,6 +4201,8 @@ static int rocker_probe_ports(struct rocker *rocker)
4201 4201
4202 alloc_size = sizeof(struct rocker_port *) * rocker->port_count; 4202 alloc_size = sizeof(struct rocker_port *) * rocker->port_count;
4203 rocker->ports = kmalloc(alloc_size, GFP_KERNEL); 4203 rocker->ports = kmalloc(alloc_size, GFP_KERNEL);
4204 if (!rocker->ports)
4205 return -ENOMEM;
4204 for (i = 0; i < rocker->port_count; i++) { 4206 for (i = 0; i < rocker->port_count; i++) {
4205 err = rocker_probe_port(rocker, i); 4207 err = rocker_probe_port(rocker, i);
4206 if (err) 4208 if (err)
diff --git a/drivers/net/ethernet/smsc/smc91c92_cs.c b/drivers/net/ethernet/smsc/smc91c92_cs.c
index 6b33127ab352..3449893aea8d 100644
--- a/drivers/net/ethernet/smsc/smc91c92_cs.c
+++ b/drivers/net/ethernet/smsc/smc91c92_cs.c
@@ -1070,11 +1070,8 @@ static int smc_open(struct net_device *dev)
1070 smc->packets_waiting = 0; 1070 smc->packets_waiting = 0;
1071 1071
1072 smc_reset(dev); 1072 smc_reset(dev);
1073 init_timer(&smc->media); 1073 setup_timer(&smc->media, media_check, (u_long)dev);
1074 smc->media.function = media_check; 1074 mod_timer(&smc->media, jiffies + HZ);
1075 smc->media.data = (u_long) dev;
1076 smc->media.expires = jiffies + HZ;
1077 add_timer(&smc->media);
1078 1075
1079 return 0; 1076 return 0;
1080} /* smc_open */ 1077} /* smc_open */
diff --git a/drivers/net/ethernet/smsc/smc91x.c b/drivers/net/ethernet/smsc/smc91x.c
index 88a55f95fe09..8678e39aba08 100644
--- a/drivers/net/ethernet/smsc/smc91x.c
+++ b/drivers/net/ethernet/smsc/smc91x.c
@@ -91,6 +91,11 @@ static const char version[] =
91 91
92#include "smc91x.h" 92#include "smc91x.h"
93 93
94#if defined(CONFIG_ASSABET_NEPONSET)
95#include <mach/assabet.h>
96#include <mach/neponset.h>
97#endif
98
94#ifndef SMC_NOWAIT 99#ifndef SMC_NOWAIT
95# define SMC_NOWAIT 0 100# define SMC_NOWAIT 0
96#endif 101#endif
@@ -2243,10 +2248,9 @@ static int smc_drv_probe(struct platform_device *pdev)
2243 const struct of_device_id *match = NULL; 2248 const struct of_device_id *match = NULL;
2244 struct smc_local *lp; 2249 struct smc_local *lp;
2245 struct net_device *ndev; 2250 struct net_device *ndev;
2246 struct resource *res; 2251 struct resource *res, *ires;
2247 unsigned int __iomem *addr; 2252 unsigned int __iomem *addr;
2248 unsigned long irq_flags = SMC_IRQ_FLAGS; 2253 unsigned long irq_flags = SMC_IRQ_FLAGS;
2249 unsigned long irq_resflags;
2250 int ret; 2254 int ret;
2251 2255
2252 ndev = alloc_etherdev(sizeof(struct smc_local)); 2256 ndev = alloc_etherdev(sizeof(struct smc_local));
@@ -2338,25 +2342,23 @@ static int smc_drv_probe(struct platform_device *pdev)
2338 goto out_free_netdev; 2342 goto out_free_netdev;
2339 } 2343 }
2340 2344
2341 ndev->irq = platform_get_irq(pdev, 0); 2345 ires = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
2342 if (ndev->irq <= 0) { 2346 if (!ires) {
2343 ret = -ENODEV; 2347 ret = -ENODEV;
2344 goto out_release_io; 2348 goto out_release_io;
2345 } 2349 }
2346 /* 2350
2347 * If this platform does not specify any special irqflags, or if 2351 ndev->irq = ires->start;
2348 * the resource supplies a trigger, override the irqflags with 2352
2349 * the trigger flags from the resource. 2353 if (irq_flags == -1 || ires->flags & IRQF_TRIGGER_MASK)
2350 */ 2354 irq_flags = ires->flags & IRQF_TRIGGER_MASK;
2351 irq_resflags = irqd_get_trigger_type(irq_get_irq_data(ndev->irq));
2352 if (irq_flags == -1 || irq_resflags & IRQF_TRIGGER_MASK)
2353 irq_flags = irq_resflags & IRQF_TRIGGER_MASK;
2354 2355
2355 ret = smc_request_attrib(pdev, ndev); 2356 ret = smc_request_attrib(pdev, ndev);
2356 if (ret) 2357 if (ret)
2357 goto out_release_io; 2358 goto out_release_io;
2358#if defined(CONFIG_SA1100_ASSABET) 2359#if defined(CONFIG_ASSABET_NEPONSET)
2359 neponset_ncr_set(NCR_ENET_OSC_EN); 2360 if (machine_is_assabet() && machine_has_neponset())
2361 neponset_ncr_set(NCR_ENET_OSC_EN);
2360#endif 2362#endif
2361 platform_set_drvdata(pdev, ndev); 2363 platform_set_drvdata(pdev, ndev);
2362 ret = smc_enable_device(pdev); 2364 ret = smc_enable_device(pdev);
diff --git a/drivers/net/ethernet/smsc/smc91x.h b/drivers/net/ethernet/smsc/smc91x.h
index be67baf5f677..3a18501d1068 100644
--- a/drivers/net/ethernet/smsc/smc91x.h
+++ b/drivers/net/ethernet/smsc/smc91x.h
@@ -39,14 +39,7 @@
39 * Define your architecture specific bus configuration parameters here. 39 * Define your architecture specific bus configuration parameters here.
40 */ 40 */
41 41
42#if defined(CONFIG_ARCH_LUBBOCK) ||\ 42#if defined(CONFIG_ARM)
43 defined(CONFIG_MACH_MAINSTONE) ||\
44 defined(CONFIG_MACH_ZYLONITE) ||\
45 defined(CONFIG_MACH_LITTLETON) ||\
46 defined(CONFIG_MACH_ZYLONITE2) ||\
47 defined(CONFIG_ARCH_VIPER) ||\
48 defined(CONFIG_MACH_STARGATE2) ||\
49 defined(CONFIG_ARCH_VERSATILE)
50 43
51#include <asm/mach-types.h> 44#include <asm/mach-types.h>
52 45
@@ -74,95 +67,8 @@
74/* We actually can't write halfwords properly if not word aligned */ 67/* We actually can't write halfwords properly if not word aligned */
75static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg) 68static inline void SMC_outw(u16 val, void __iomem *ioaddr, int reg)
76{ 69{
77 if ((machine_is_mainstone() || machine_is_stargate2()) && reg & 2) { 70 if ((machine_is_mainstone() || machine_is_stargate2() ||
78 unsigned int v = val << 16; 71 machine_is_pxa_idp()) && reg & 2) {
79 v |= readl(ioaddr + (reg & ~2)) & 0xffff;
80 writel(v, ioaddr + (reg & ~2));
81 } else {
82 writew(val, ioaddr + reg);
83 }
84}
85
86#elif defined(CONFIG_SA1100_PLEB)
87/* We can only do 16-bit reads and writes in the static memory space. */
88#define SMC_CAN_USE_8BIT 1
89#define SMC_CAN_USE_16BIT 1
90#define SMC_CAN_USE_32BIT 0
91#define SMC_IO_SHIFT 0
92#define SMC_NOWAIT 1
93
94#define SMC_inb(a, r) readb((a) + (r))
95#define SMC_insb(a, r, p, l) readsb((a) + (r), p, (l))
96#define SMC_inw(a, r) readw((a) + (r))
97#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
98#define SMC_outb(v, a, r) writeb(v, (a) + (r))
99#define SMC_outsb(a, r, p, l) writesb((a) + (r), p, (l))
100#define SMC_outw(v, a, r) writew(v, (a) + (r))
101#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
102
103#define SMC_IRQ_FLAGS (-1)
104
105#elif defined(CONFIG_SA1100_ASSABET)
106
107#include <mach/neponset.h>
108
109/* We can only do 8-bit reads and writes in the static memory space. */
110#define SMC_CAN_USE_8BIT 1
111#define SMC_CAN_USE_16BIT 0
112#define SMC_CAN_USE_32BIT 0
113#define SMC_NOWAIT 1
114
115/* The first two address lines aren't connected... */
116#define SMC_IO_SHIFT 2
117
118#define SMC_inb(a, r) readb((a) + (r))
119#define SMC_outb(v, a, r) writeb(v, (a) + (r))
120#define SMC_insb(a, r, p, l) readsb((a) + (r), p, (l))
121#define SMC_outsb(a, r, p, l) writesb((a) + (r), p, (l))
122#define SMC_IRQ_FLAGS (-1) /* from resource */
123
124#elif defined(CONFIG_MACH_LOGICPD_PXA270) || \
125 defined(CONFIG_MACH_NOMADIK_8815NHK)
126
127#define SMC_CAN_USE_8BIT 0
128#define SMC_CAN_USE_16BIT 1
129#define SMC_CAN_USE_32BIT 0
130#define SMC_IO_SHIFT 0
131#define SMC_NOWAIT 1
132
133#define SMC_inw(a, r) readw((a) + (r))
134#define SMC_outw(v, a, r) writew(v, (a) + (r))
135#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
136#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
137
138#elif defined(CONFIG_ARCH_INNOKOM) || \
139 defined(CONFIG_ARCH_PXA_IDP) || \
140 defined(CONFIG_ARCH_RAMSES) || \
141 defined(CONFIG_ARCH_PCM027)
142
143#define SMC_CAN_USE_8BIT 1
144#define SMC_CAN_USE_16BIT 1
145#define SMC_CAN_USE_32BIT 1
146#define SMC_IO_SHIFT 0
147#define SMC_NOWAIT 1
148#define SMC_USE_PXA_DMA 1
149
150#define SMC_inb(a, r) readb((a) + (r))
151#define SMC_inw(a, r) readw((a) + (r))
152#define SMC_inl(a, r) readl((a) + (r))
153#define SMC_outb(v, a, r) writeb(v, (a) + (r))
154#define SMC_outl(v, a, r) writel(v, (a) + (r))
155#define SMC_insl(a, r, p, l) readsl((a) + (r), p, l)
156#define SMC_outsl(a, r, p, l) writesl((a) + (r), p, l)
157#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
158#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
159#define SMC_IRQ_FLAGS (-1) /* from resource */
160
161/* We actually can't write halfwords properly if not word aligned */
162static inline void
163SMC_outw(u16 val, void __iomem *ioaddr, int reg)
164{
165 if (reg & 2) {
166 unsigned int v = val << 16; 72 unsigned int v = val << 16;
167 v |= readl(ioaddr + (reg & ~2)) & 0xffff; 73 v |= readl(ioaddr + (reg & ~2)) & 0xffff;
168 writel(v, ioaddr + (reg & ~2)); 74 writel(v, ioaddr + (reg & ~2));
@@ -237,20 +143,6 @@ SMC_outw(u16 val, void __iomem *ioaddr, int reg)
237#define RPC_LSA_DEFAULT RPC_LED_100_10 143#define RPC_LSA_DEFAULT RPC_LED_100_10
238#define RPC_LSB_DEFAULT RPC_LED_TX_RX 144#define RPC_LSB_DEFAULT RPC_LED_TX_RX
239 145
240#elif defined(CONFIG_ARCH_MSM)
241
242#define SMC_CAN_USE_8BIT 0
243#define SMC_CAN_USE_16BIT 1
244#define SMC_CAN_USE_32BIT 0
245#define SMC_NOWAIT 1
246
247#define SMC_inw(a, r) readw((a) + (r))
248#define SMC_outw(v, a, r) writew(v, (a) + (r))
249#define SMC_insw(a, r, p, l) readsw((a) + (r), p, l)
250#define SMC_outsw(a, r, p, l) writesw((a) + (r), p, l)
251
252#define SMC_IRQ_FLAGS IRQF_TRIGGER_HIGH
253
254#elif defined(CONFIG_COLDFIRE) 146#elif defined(CONFIG_COLDFIRE)
255 147
256#define SMC_CAN_USE_8BIT 0 148#define SMC_CAN_USE_8BIT 0
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
index 55e89b3838f1..a0ea84fe6519 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_main.c
@@ -310,11 +310,11 @@ bool stmmac_eee_init(struct stmmac_priv *priv)
310 spin_lock_irqsave(&priv->lock, flags); 310 spin_lock_irqsave(&priv->lock, flags);
311 if (!priv->eee_active) { 311 if (!priv->eee_active) {
312 priv->eee_active = 1; 312 priv->eee_active = 1;
313 init_timer(&priv->eee_ctrl_timer); 313 setup_timer(&priv->eee_ctrl_timer,
314 priv->eee_ctrl_timer.function = stmmac_eee_ctrl_timer; 314 stmmac_eee_ctrl_timer,
315 priv->eee_ctrl_timer.data = (unsigned long)priv; 315 (unsigned long)priv);
316 priv->eee_ctrl_timer.expires = STMMAC_LPI_T(eee_timer); 316 mod_timer(&priv->eee_ctrl_timer,
317 add_timer(&priv->eee_ctrl_timer); 317 STMMAC_LPI_T(eee_timer));
318 318
319 priv->hw->mac->set_eee_timer(priv->hw, 319 priv->hw->mac->set_eee_timer(priv->hw,
320 STMMAC_DEFAULT_LIT_LS, 320 STMMAC_DEFAULT_LIT_LS,
diff --git a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
index fb846ebba1d9..f9b42f11950f 100644
--- a/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
+++ b/drivers/net/ethernet/stmicro/stmmac/stmmac_platform.c
@@ -272,6 +272,37 @@ static int stmmac_pltfr_probe(struct platform_device *pdev)
272 struct stmmac_priv *priv = NULL; 272 struct stmmac_priv *priv = NULL;
273 struct plat_stmmacenet_data *plat_dat = NULL; 273 struct plat_stmmacenet_data *plat_dat = NULL;
274 const char *mac = NULL; 274 const char *mac = NULL;
275 int irq, wol_irq, lpi_irq;
276
277 /* Get IRQ information early to have an ability to ask for deferred
278 * probe if needed before we went too far with resource allocation.
279 */
280 irq = platform_get_irq_byname(pdev, "macirq");
281 if (irq < 0) {
282 if (irq != -EPROBE_DEFER) {
283 dev_err(dev,
284 "MAC IRQ configuration information not found\n");
285 }
286 return irq;
287 }
288
289 /* On some platforms e.g. SPEAr the wake up irq differs from the mac irq
290 * The external wake up irq can be passed through the platform code
291 * named as "eth_wake_irq"
292 *
293 * In case the wake up interrupt is not passed from the platform
294 * so the driver will continue to use the mac irq (ndev->irq)
295 */
296 wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
297 if (wol_irq < 0) {
298 if (wol_irq == -EPROBE_DEFER)
299 return -EPROBE_DEFER;
300 wol_irq = irq;
301 }
302
303 lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
304 if (lpi_irq == -EPROBE_DEFER)
305 return -EPROBE_DEFER;
275 306
276 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 307 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
277 addr = devm_ioremap_resource(dev, res); 308 addr = devm_ioremap_resource(dev, res);
@@ -323,39 +354,15 @@ static int stmmac_pltfr_probe(struct platform_device *pdev)
323 return PTR_ERR(priv); 354 return PTR_ERR(priv);
324 } 355 }
325 356
357 /* Copy IRQ values to priv structure which is now avaialble */
358 priv->dev->irq = irq;
359 priv->wol_irq = wol_irq;
360 priv->lpi_irq = lpi_irq;
361
326 /* Get MAC address if available (DT) */ 362 /* Get MAC address if available (DT) */
327 if (mac) 363 if (mac)
328 memcpy(priv->dev->dev_addr, mac, ETH_ALEN); 364 memcpy(priv->dev->dev_addr, mac, ETH_ALEN);
329 365
330 /* Get the MAC information */
331 priv->dev->irq = platform_get_irq_byname(pdev, "macirq");
332 if (priv->dev->irq < 0) {
333 if (priv->dev->irq != -EPROBE_DEFER) {
334 netdev_err(priv->dev,
335 "MAC IRQ configuration information not found\n");
336 }
337 return priv->dev->irq;
338 }
339
340 /*
341 * On some platforms e.g. SPEAr the wake up irq differs from the mac irq
342 * The external wake up irq can be passed through the platform code
343 * named as "eth_wake_irq"
344 *
345 * In case the wake up interrupt is not passed from the platform
346 * so the driver will continue to use the mac irq (ndev->irq)
347 */
348 priv->wol_irq = platform_get_irq_byname(pdev, "eth_wake_irq");
349 if (priv->wol_irq < 0) {
350 if (priv->wol_irq == -EPROBE_DEFER)
351 return -EPROBE_DEFER;
352 priv->wol_irq = priv->dev->irq;
353 }
354
355 priv->lpi_irq = platform_get_irq_byname(pdev, "eth_lpi");
356 if (priv->lpi_irq == -EPROBE_DEFER)
357 return -EPROBE_DEFER;
358
359 platform_set_drvdata(pdev, priv->dev); 366 platform_set_drvdata(pdev, priv->dev);
360 367
361 pr_debug("STMMAC platform driver registration completed"); 368 pr_debug("STMMAC platform driver registration completed");
diff --git a/drivers/net/ethernet/sun/niu.c b/drivers/net/ethernet/sun/niu.c
index 4b51f903fb73..0c5842aeb807 100644
--- a/drivers/net/ethernet/sun/niu.c
+++ b/drivers/net/ethernet/sun/niu.c
@@ -6989,10 +6989,10 @@ static int niu_class_to_ethflow(u64 class, int *flow_type)
6989 *flow_type = IP_USER_FLOW; 6989 *flow_type = IP_USER_FLOW;
6990 break; 6990 break;
6991 default: 6991 default:
6992 return 0; 6992 return -EINVAL;
6993 } 6993 }
6994 6994
6995 return 1; 6995 return 0;
6996} 6996}
6997 6997
6998static int niu_ethflow_to_class(int flow_type, u64 *class) 6998static int niu_ethflow_to_class(int flow_type, u64 *class)
@@ -7198,11 +7198,9 @@ static int niu_get_ethtool_tcam_entry(struct niu *np,
7198 class = (tp->key[0] & TCAM_V4KEY0_CLASS_CODE) >> 7198 class = (tp->key[0] & TCAM_V4KEY0_CLASS_CODE) >>
7199 TCAM_V4KEY0_CLASS_CODE_SHIFT; 7199 TCAM_V4KEY0_CLASS_CODE_SHIFT;
7200 ret = niu_class_to_ethflow(class, &fsp->flow_type); 7200 ret = niu_class_to_ethflow(class, &fsp->flow_type);
7201
7202 if (ret < 0) { 7201 if (ret < 0) {
7203 netdev_info(np->dev, "niu%d: niu_class_to_ethflow failed\n", 7202 netdev_info(np->dev, "niu%d: niu_class_to_ethflow failed\n",
7204 parent->index); 7203 parent->index);
7205 ret = -EINVAL;
7206 goto out; 7204 goto out;
7207 } 7205 }
7208 7206
diff --git a/drivers/net/ethernet/ti/cpsw.c b/drivers/net/ethernet/ti/cpsw.c
index 7d8dd0d2182e..a1bbaf6352ba 100644
--- a/drivers/net/ethernet/ti/cpsw.c
+++ b/drivers/net/ethernet/ti/cpsw.c
@@ -1103,7 +1103,7 @@ static inline void cpsw_add_dual_emac_def_ale_entries(
1103 cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast, 1103 cpsw_ale_add_mcast(priv->ale, priv->ndev->broadcast,
1104 port_mask, ALE_VLAN, slave->port_vlan, 0); 1104 port_mask, ALE_VLAN, slave->port_vlan, 0);
1105 cpsw_ale_add_ucast(priv->ale, priv->mac_addr, 1105 cpsw_ale_add_ucast(priv->ale, priv->mac_addr,
1106 priv->host_port, ALE_VLAN, slave->port_vlan); 1106 priv->host_port, ALE_VLAN | ALE_SECURE, slave->port_vlan);
1107} 1107}
1108 1108
1109static void soft_reset_slave(struct cpsw_slave *slave) 1109static void soft_reset_slave(struct cpsw_slave *slave)
@@ -2466,6 +2466,7 @@ static int cpsw_remove(struct platform_device *pdev)
2466 return 0; 2466 return 0;
2467} 2467}
2468 2468
2469#ifdef CONFIG_PM_SLEEP
2469static int cpsw_suspend(struct device *dev) 2470static int cpsw_suspend(struct device *dev)
2470{ 2471{
2471 struct platform_device *pdev = to_platform_device(dev); 2472 struct platform_device *pdev = to_platform_device(dev);
@@ -2518,11 +2519,9 @@ static int cpsw_resume(struct device *dev)
2518 } 2519 }
2519 return 0; 2520 return 0;
2520} 2521}
2522#endif
2521 2523
2522static const struct dev_pm_ops cpsw_pm_ops = { 2524static SIMPLE_DEV_PM_OPS(cpsw_pm_ops, cpsw_suspend, cpsw_resume);
2523 .suspend = cpsw_suspend,
2524 .resume = cpsw_resume,
2525};
2526 2525
2527static const struct of_device_id cpsw_of_mtable[] = { 2526static const struct of_device_id cpsw_of_mtable[] = {
2528 { .compatible = "ti,cpsw", }, 2527 { .compatible = "ti,cpsw", },
diff --git a/drivers/net/ethernet/ti/davinci_mdio.c b/drivers/net/ethernet/ti/davinci_mdio.c
index 98655b44b97e..c00084d689f3 100644
--- a/drivers/net/ethernet/ti/davinci_mdio.c
+++ b/drivers/net/ethernet/ti/davinci_mdio.c
@@ -423,6 +423,7 @@ static int davinci_mdio_remove(struct platform_device *pdev)
423 return 0; 423 return 0;
424} 424}
425 425
426#ifdef CONFIG_PM_SLEEP
426static int davinci_mdio_suspend(struct device *dev) 427static int davinci_mdio_suspend(struct device *dev)
427{ 428{
428 struct davinci_mdio_data *data = dev_get_drvdata(dev); 429 struct davinci_mdio_data *data = dev_get_drvdata(dev);
@@ -464,10 +465,10 @@ static int davinci_mdio_resume(struct device *dev)
464 465
465 return 0; 466 return 0;
466} 467}
468#endif
467 469
468static const struct dev_pm_ops davinci_mdio_pm_ops = { 470static const struct dev_pm_ops davinci_mdio_pm_ops = {
469 .suspend_late = davinci_mdio_suspend, 471 SET_LATE_SYSTEM_SLEEP_PM_OPS(davinci_mdio_suspend, davinci_mdio_resume)
470 .resume_early = davinci_mdio_resume,
471}; 472};
472 473
473#if IS_ENABLED(CONFIG_OF) 474#if IS_ENABLED(CONFIG_OF)
diff --git a/drivers/net/ethernet/wiznet/w5100.c b/drivers/net/ethernet/wiznet/w5100.c
index a495931a66a1..0e0fbb5842b3 100644
--- a/drivers/net/ethernet/wiznet/w5100.c
+++ b/drivers/net/ethernet/wiznet/w5100.c
@@ -498,9 +498,9 @@ static int w5100_napi_poll(struct napi_struct *napi, int budget)
498 } 498 }
499 499
500 if (rx_count < budget) { 500 if (rx_count < budget) {
501 napi_complete(napi);
501 w5100_write(priv, W5100_IMR, IR_S0); 502 w5100_write(priv, W5100_IMR, IR_S0);
502 mmiowb(); 503 mmiowb();
503 napi_complete(napi);
504 } 504 }
505 505
506 return rx_count; 506 return rx_count;
diff --git a/drivers/net/ethernet/wiznet/w5300.c b/drivers/net/ethernet/wiznet/w5300.c
index 09322d9db578..4b310002258d 100644
--- a/drivers/net/ethernet/wiznet/w5300.c
+++ b/drivers/net/ethernet/wiznet/w5300.c
@@ -418,9 +418,9 @@ static int w5300_napi_poll(struct napi_struct *napi, int budget)
418 } 418 }
419 419
420 if (rx_count < budget) { 420 if (rx_count < budget) {
421 napi_complete(napi);
421 w5300_write(priv, W5300_IMR, IR_S0); 422 w5300_write(priv, W5300_IMR, IR_S0);
422 mmiowb(); 423 mmiowb();
423 napi_complete(napi);
424 } 424 }
425 425
426 return rx_count; 426 return rx_count;
diff --git a/drivers/net/ethernet/xscale/ixp4xx_eth.c b/drivers/net/ethernet/xscale/ixp4xx_eth.c
index f7e0f0f7c2e2..9e16a2819d48 100644
--- a/drivers/net/ethernet/xscale/ixp4xx_eth.c
+++ b/drivers/net/ethernet/xscale/ixp4xx_eth.c
@@ -938,7 +938,7 @@ static void eth_set_mcast_list(struct net_device *dev)
938 int i; 938 int i;
939 static const u8 allmulti[] = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00 }; 939 static const u8 allmulti[] = { 0x01, 0x00, 0x00, 0x00, 0x00, 0x00 };
940 940
941 if (dev->flags & IFF_ALLMULTI) { 941 if ((dev->flags & IFF_ALLMULTI) && !(dev->flags & IFF_PROMISC)) {
942 for (i = 0; i < ETH_ALEN; i++) { 942 for (i = 0; i < ETH_ALEN; i++) {
943 __raw_writel(allmulti[i], &port->regs->mcast_addr[i]); 943 __raw_writel(allmulti[i], &port->regs->mcast_addr[i]);
944 __raw_writel(allmulti[i], &port->regs->mcast_mask[i]); 944 __raw_writel(allmulti[i], &port->regs->mcast_mask[i]);
diff --git a/drivers/net/macvtap.c b/drivers/net/macvtap.c
index e40fdfccc9c1..27ecc5c4fa26 100644
--- a/drivers/net/macvtap.c
+++ b/drivers/net/macvtap.c
@@ -654,11 +654,14 @@ static void macvtap_skb_to_vnet_hdr(struct macvtap_queue *q,
654 } /* else everything is zero */ 654 } /* else everything is zero */
655} 655}
656 656
657/* Neighbour code has some assumptions on HH_DATA_MOD alignment */
658#define MACVTAP_RESERVE HH_DATA_OFF(ETH_HLEN)
659
657/* Get packet from user space buffer */ 660/* Get packet from user space buffer */
658static ssize_t macvtap_get_user(struct macvtap_queue *q, struct msghdr *m, 661static ssize_t macvtap_get_user(struct macvtap_queue *q, struct msghdr *m,
659 struct iov_iter *from, int noblock) 662 struct iov_iter *from, int noblock)
660{ 663{
661 int good_linear = SKB_MAX_HEAD(NET_IP_ALIGN); 664 int good_linear = SKB_MAX_HEAD(MACVTAP_RESERVE);
662 struct sk_buff *skb; 665 struct sk_buff *skb;
663 struct macvlan_dev *vlan; 666 struct macvlan_dev *vlan;
664 unsigned long total_len = iov_iter_count(from); 667 unsigned long total_len = iov_iter_count(from);
@@ -722,7 +725,7 @@ static ssize_t macvtap_get_user(struct macvtap_queue *q, struct msghdr *m,
722 linear = macvtap16_to_cpu(q, vnet_hdr.hdr_len); 725 linear = macvtap16_to_cpu(q, vnet_hdr.hdr_len);
723 } 726 }
724 727
725 skb = macvtap_alloc_skb(&q->sk, NET_IP_ALIGN, copylen, 728 skb = macvtap_alloc_skb(&q->sk, MACVTAP_RESERVE, copylen,
726 linear, noblock, &err); 729 linear, noblock, &err);
727 if (!skb) 730 if (!skb)
728 goto err; 731 goto err;
diff --git a/drivers/net/phy/amd-xgbe-phy.c b/drivers/net/phy/amd-xgbe-phy.c
index 9e3af54c9010..32efbd48f326 100644
--- a/drivers/net/phy/amd-xgbe-phy.c
+++ b/drivers/net/phy/amd-xgbe-phy.c
@@ -92,6 +92,8 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver");
92#define XGBE_PHY_CDR_RATE_PROPERTY "amd,serdes-cdr-rate" 92#define XGBE_PHY_CDR_RATE_PROPERTY "amd,serdes-cdr-rate"
93#define XGBE_PHY_PQ_SKEW_PROPERTY "amd,serdes-pq-skew" 93#define XGBE_PHY_PQ_SKEW_PROPERTY "amd,serdes-pq-skew"
94#define XGBE_PHY_TX_AMP_PROPERTY "amd,serdes-tx-amp" 94#define XGBE_PHY_TX_AMP_PROPERTY "amd,serdes-tx-amp"
95#define XGBE_PHY_DFE_CFG_PROPERTY "amd,serdes-dfe-tap-config"
96#define XGBE_PHY_DFE_ENA_PROPERTY "amd,serdes-dfe-tap-enable"
95 97
96#define XGBE_PHY_SPEEDS 3 98#define XGBE_PHY_SPEEDS 3
97#define XGBE_PHY_SPEED_1000 0 99#define XGBE_PHY_SPEED_1000 0
@@ -177,10 +179,12 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver");
177#define SPEED_10000_BLWC 0 179#define SPEED_10000_BLWC 0
178#define SPEED_10000_CDR 0x7 180#define SPEED_10000_CDR 0x7
179#define SPEED_10000_PLL 0x1 181#define SPEED_10000_PLL 0x1
180#define SPEED_10000_PQ 0x1e 182#define SPEED_10000_PQ 0x12
181#define SPEED_10000_RATE 0x0 183#define SPEED_10000_RATE 0x0
182#define SPEED_10000_TXAMP 0xa 184#define SPEED_10000_TXAMP 0xa
183#define SPEED_10000_WORD 0x7 185#define SPEED_10000_WORD 0x7
186#define SPEED_10000_DFE_TAP_CONFIG 0x1
187#define SPEED_10000_DFE_TAP_ENABLE 0x7f
184 188
185#define SPEED_2500_BLWC 1 189#define SPEED_2500_BLWC 1
186#define SPEED_2500_CDR 0x2 190#define SPEED_2500_CDR 0x2
@@ -189,6 +193,8 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver");
189#define SPEED_2500_RATE 0x1 193#define SPEED_2500_RATE 0x1
190#define SPEED_2500_TXAMP 0xf 194#define SPEED_2500_TXAMP 0xf
191#define SPEED_2500_WORD 0x1 195#define SPEED_2500_WORD 0x1
196#define SPEED_2500_DFE_TAP_CONFIG 0x3
197#define SPEED_2500_DFE_TAP_ENABLE 0x0
192 198
193#define SPEED_1000_BLWC 1 199#define SPEED_1000_BLWC 1
194#define SPEED_1000_CDR 0x2 200#define SPEED_1000_CDR 0x2
@@ -197,16 +203,25 @@ MODULE_DESCRIPTION("AMD 10GbE (amd-xgbe) PHY driver");
197#define SPEED_1000_RATE 0x3 203#define SPEED_1000_RATE 0x3
198#define SPEED_1000_TXAMP 0xf 204#define SPEED_1000_TXAMP 0xf
199#define SPEED_1000_WORD 0x1 205#define SPEED_1000_WORD 0x1
206#define SPEED_1000_DFE_TAP_CONFIG 0x3
207#define SPEED_1000_DFE_TAP_ENABLE 0x0
200 208
201/* SerDes RxTx register offsets */ 209/* SerDes RxTx register offsets */
210#define RXTX_REG6 0x0018
202#define RXTX_REG20 0x0050 211#define RXTX_REG20 0x0050
212#define RXTX_REG22 0x0058
203#define RXTX_REG114 0x01c8 213#define RXTX_REG114 0x01c8
214#define RXTX_REG129 0x0204
204 215
205/* SerDes RxTx register entry bit positions and sizes */ 216/* SerDes RxTx register entry bit positions and sizes */
217#define RXTX_REG6_RESETB_RXD_INDEX 8
218#define RXTX_REG6_RESETB_RXD_WIDTH 1
206#define RXTX_REG20_BLWC_ENA_INDEX 2 219#define RXTX_REG20_BLWC_ENA_INDEX 2
207#define RXTX_REG20_BLWC_ENA_WIDTH 1 220#define RXTX_REG20_BLWC_ENA_WIDTH 1
208#define RXTX_REG114_PQ_REG_INDEX 9 221#define RXTX_REG114_PQ_REG_INDEX 9
209#define RXTX_REG114_PQ_REG_WIDTH 7 222#define RXTX_REG114_PQ_REG_WIDTH 7
223#define RXTX_REG129_RXDFE_CONFIG_INDEX 14
224#define RXTX_REG129_RXDFE_CONFIG_WIDTH 2
210 225
211/* Bit setting and getting macros 226/* Bit setting and getting macros
212 * The get macro will extract the current bit field value from within 227 * The get macro will extract the current bit field value from within
@@ -333,6 +348,18 @@ static const u32 amd_xgbe_phy_serdes_tx_amp[] = {
333 SPEED_10000_TXAMP, 348 SPEED_10000_TXAMP,
334}; 349};
335 350
351static const u32 amd_xgbe_phy_serdes_dfe_tap_cfg[] = {
352 SPEED_1000_DFE_TAP_CONFIG,
353 SPEED_2500_DFE_TAP_CONFIG,
354 SPEED_10000_DFE_TAP_CONFIG,
355};
356
357static const u32 amd_xgbe_phy_serdes_dfe_tap_ena[] = {
358 SPEED_1000_DFE_TAP_ENABLE,
359 SPEED_2500_DFE_TAP_ENABLE,
360 SPEED_10000_DFE_TAP_ENABLE,
361};
362
336enum amd_xgbe_phy_an { 363enum amd_xgbe_phy_an {
337 AMD_XGBE_AN_READY = 0, 364 AMD_XGBE_AN_READY = 0,
338 AMD_XGBE_AN_PAGE_RECEIVED, 365 AMD_XGBE_AN_PAGE_RECEIVED,
@@ -393,6 +420,8 @@ struct amd_xgbe_phy_priv {
393 u32 serdes_cdr_rate[XGBE_PHY_SPEEDS]; 420 u32 serdes_cdr_rate[XGBE_PHY_SPEEDS];
394 u32 serdes_pq_skew[XGBE_PHY_SPEEDS]; 421 u32 serdes_pq_skew[XGBE_PHY_SPEEDS];
395 u32 serdes_tx_amp[XGBE_PHY_SPEEDS]; 422 u32 serdes_tx_amp[XGBE_PHY_SPEEDS];
423 u32 serdes_dfe_tap_cfg[XGBE_PHY_SPEEDS];
424 u32 serdes_dfe_tap_ena[XGBE_PHY_SPEEDS];
396 425
397 /* Auto-negotiation state machine support */ 426 /* Auto-negotiation state machine support */
398 struct mutex an_mutex; 427 struct mutex an_mutex;
@@ -481,11 +510,16 @@ static void amd_xgbe_phy_serdes_complete_ratechange(struct phy_device *phydev)
481 status = XSIR0_IOREAD(priv, SIR0_STATUS); 510 status = XSIR0_IOREAD(priv, SIR0_STATUS);
482 if (XSIR_GET_BITS(status, SIR0_STATUS, RX_READY) && 511 if (XSIR_GET_BITS(status, SIR0_STATUS, RX_READY) &&
483 XSIR_GET_BITS(status, SIR0_STATUS, TX_READY)) 512 XSIR_GET_BITS(status, SIR0_STATUS, TX_READY))
484 return; 513 goto rx_reset;
485 } 514 }
486 515
487 netdev_dbg(phydev->attached_dev, "SerDes rx/tx not ready (%#hx)\n", 516 netdev_dbg(phydev->attached_dev, "SerDes rx/tx not ready (%#hx)\n",
488 status); 517 status);
518
519rx_reset:
520 /* Perform Rx reset for the DFE changes */
521 XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RESETB_RXD, 0);
522 XRXTX_IOWRITE_BITS(priv, RXTX_REG6, RESETB_RXD, 1);
489} 523}
490 524
491static int amd_xgbe_phy_xgmii_mode(struct phy_device *phydev) 525static int amd_xgbe_phy_xgmii_mode(struct phy_device *phydev)
@@ -534,6 +568,10 @@ static int amd_xgbe_phy_xgmii_mode(struct phy_device *phydev)
534 priv->serdes_blwc[XGBE_PHY_SPEED_10000]); 568 priv->serdes_blwc[XGBE_PHY_SPEED_10000]);
535 XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG, 569 XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG,
536 priv->serdes_pq_skew[XGBE_PHY_SPEED_10000]); 570 priv->serdes_pq_skew[XGBE_PHY_SPEED_10000]);
571 XRXTX_IOWRITE_BITS(priv, RXTX_REG129, RXDFE_CONFIG,
572 priv->serdes_dfe_tap_cfg[XGBE_PHY_SPEED_10000]);
573 XRXTX_IOWRITE(priv, RXTX_REG22,
574 priv->serdes_dfe_tap_ena[XGBE_PHY_SPEED_10000]);
537 575
538 amd_xgbe_phy_serdes_complete_ratechange(phydev); 576 amd_xgbe_phy_serdes_complete_ratechange(phydev);
539 577
@@ -586,6 +624,10 @@ static int amd_xgbe_phy_gmii_2500_mode(struct phy_device *phydev)
586 priv->serdes_blwc[XGBE_PHY_SPEED_2500]); 624 priv->serdes_blwc[XGBE_PHY_SPEED_2500]);
587 XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG, 625 XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG,
588 priv->serdes_pq_skew[XGBE_PHY_SPEED_2500]); 626 priv->serdes_pq_skew[XGBE_PHY_SPEED_2500]);
627 XRXTX_IOWRITE_BITS(priv, RXTX_REG129, RXDFE_CONFIG,
628 priv->serdes_dfe_tap_cfg[XGBE_PHY_SPEED_2500]);
629 XRXTX_IOWRITE(priv, RXTX_REG22,
630 priv->serdes_dfe_tap_ena[XGBE_PHY_SPEED_2500]);
589 631
590 amd_xgbe_phy_serdes_complete_ratechange(phydev); 632 amd_xgbe_phy_serdes_complete_ratechange(phydev);
591 633
@@ -638,6 +680,10 @@ static int amd_xgbe_phy_gmii_mode(struct phy_device *phydev)
638 priv->serdes_blwc[XGBE_PHY_SPEED_1000]); 680 priv->serdes_blwc[XGBE_PHY_SPEED_1000]);
639 XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG, 681 XRXTX_IOWRITE_BITS(priv, RXTX_REG114, PQ_REG,
640 priv->serdes_pq_skew[XGBE_PHY_SPEED_1000]); 682 priv->serdes_pq_skew[XGBE_PHY_SPEED_1000]);
683 XRXTX_IOWRITE_BITS(priv, RXTX_REG129, RXDFE_CONFIG,
684 priv->serdes_dfe_tap_cfg[XGBE_PHY_SPEED_1000]);
685 XRXTX_IOWRITE(priv, RXTX_REG22,
686 priv->serdes_dfe_tap_ena[XGBE_PHY_SPEED_1000]);
641 687
642 amd_xgbe_phy_serdes_complete_ratechange(phydev); 688 amd_xgbe_phy_serdes_complete_ratechange(phydev);
643 689
@@ -1668,6 +1714,38 @@ static int amd_xgbe_phy_probe(struct phy_device *phydev)
1668 sizeof(priv->serdes_tx_amp)); 1714 sizeof(priv->serdes_tx_amp));
1669 } 1715 }
1670 1716
1717 if (device_property_present(phy_dev, XGBE_PHY_DFE_CFG_PROPERTY)) {
1718 ret = device_property_read_u32_array(phy_dev,
1719 XGBE_PHY_DFE_CFG_PROPERTY,
1720 priv->serdes_dfe_tap_cfg,
1721 XGBE_PHY_SPEEDS);
1722 if (ret) {
1723 dev_err(dev, "invalid %s property\n",
1724 XGBE_PHY_DFE_CFG_PROPERTY);
1725 goto err_sir1;
1726 }
1727 } else {
1728 memcpy(priv->serdes_dfe_tap_cfg,
1729 amd_xgbe_phy_serdes_dfe_tap_cfg,
1730 sizeof(priv->serdes_dfe_tap_cfg));
1731 }
1732
1733 if (device_property_present(phy_dev, XGBE_PHY_DFE_ENA_PROPERTY)) {
1734 ret = device_property_read_u32_array(phy_dev,
1735 XGBE_PHY_DFE_ENA_PROPERTY,
1736 priv->serdes_dfe_tap_ena,
1737 XGBE_PHY_SPEEDS);
1738 if (ret) {
1739 dev_err(dev, "invalid %s property\n",
1740 XGBE_PHY_DFE_ENA_PROPERTY);
1741 goto err_sir1;
1742 }
1743 } else {
1744 memcpy(priv->serdes_dfe_tap_ena,
1745 amd_xgbe_phy_serdes_dfe_tap_ena,
1746 sizeof(priv->serdes_dfe_tap_ena));
1747 }
1748
1671 phydev->priv = priv; 1749 phydev->priv = priv;
1672 1750
1673 if (!priv->adev || acpi_disabled) 1751 if (!priv->adev || acpi_disabled)
diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c
index cdcac6aa4260..52cd8db2c57d 100644
--- a/drivers/net/phy/phy.c
+++ b/drivers/net/phy/phy.c
@@ -236,6 +236,25 @@ static inline unsigned int phy_find_valid(unsigned int idx, u32 features)
236} 236}
237 237
238/** 238/**
239 * phy_check_valid - check if there is a valid PHY setting which matches
240 * speed, duplex, and feature mask
241 * @speed: speed to match
242 * @duplex: duplex to match
243 * @features: A mask of the valid settings
244 *
245 * Description: Returns true if there is a valid setting, false otherwise.
246 */
247static inline bool phy_check_valid(int speed, int duplex, u32 features)
248{
249 unsigned int idx;
250
251 idx = phy_find_valid(phy_find_setting(speed, duplex), features);
252
253 return settings[idx].speed == speed && settings[idx].duplex == duplex &&
254 (settings[idx].setting & features);
255}
256
257/**
239 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex 258 * phy_sanitize_settings - make sure the PHY is set to supported speed and duplex
240 * @phydev: the target phy_device struct 259 * @phydev: the target phy_device struct
241 * 260 *
@@ -1045,7 +1064,6 @@ int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1045 int eee_lp, eee_cap, eee_adv; 1064 int eee_lp, eee_cap, eee_adv;
1046 u32 lp, cap, adv; 1065 u32 lp, cap, adv;
1047 int status; 1066 int status;
1048 unsigned int idx;
1049 1067
1050 /* Read phy status to properly get the right settings */ 1068 /* Read phy status to properly get the right settings */
1051 status = phy_read_status(phydev); 1069 status = phy_read_status(phydev);
@@ -1077,8 +1095,7 @@ int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable)
1077 1095
1078 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv); 1096 adv = mmd_eee_adv_to_ethtool_adv_t(eee_adv);
1079 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp); 1097 lp = mmd_eee_adv_to_ethtool_adv_t(eee_lp);
1080 idx = phy_find_setting(phydev->speed, phydev->duplex); 1098 if (!phy_check_valid(phydev->speed, phydev->duplex, lp & adv))
1081 if (!(lp & adv & settings[idx].setting))
1082 goto eee_exit_err; 1099 goto eee_exit_err;
1083 1100
1084 if (clk_stop_enable) { 1101 if (clk_stop_enable) {
diff --git a/drivers/net/team/team.c b/drivers/net/team/team.c
index 0e62274e884a..7d394846afc2 100644
--- a/drivers/net/team/team.c
+++ b/drivers/net/team/team.c
@@ -43,9 +43,7 @@
43 43
44static struct team_port *team_port_get_rcu(const struct net_device *dev) 44static struct team_port *team_port_get_rcu(const struct net_device *dev)
45{ 45{
46 struct team_port *port = rcu_dereference(dev->rx_handler_data); 46 return rcu_dereference(dev->rx_handler_data);
47
48 return team_port_exists(dev) ? port : NULL;
49} 47}
50 48
51static struct team_port *team_port_get_rtnl(const struct net_device *dev) 49static struct team_port *team_port_get_rtnl(const struct net_device *dev)
@@ -1732,11 +1730,11 @@ static int team_set_mac_address(struct net_device *dev, void *p)
1732 if (dev->type == ARPHRD_ETHER && !is_valid_ether_addr(addr->sa_data)) 1730 if (dev->type == ARPHRD_ETHER && !is_valid_ether_addr(addr->sa_data))
1733 return -EADDRNOTAVAIL; 1731 return -EADDRNOTAVAIL;
1734 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len); 1732 memcpy(dev->dev_addr, addr->sa_data, dev->addr_len);
1735 rcu_read_lock(); 1733 mutex_lock(&team->lock);
1736 list_for_each_entry_rcu(port, &team->port_list, list) 1734 list_for_each_entry(port, &team->port_list, list)
1737 if (team->ops.port_change_dev_addr) 1735 if (team->ops.port_change_dev_addr)
1738 team->ops.port_change_dev_addr(team, port); 1736 team->ops.port_change_dev_addr(team, port);
1739 rcu_read_unlock(); 1737 mutex_unlock(&team->lock);
1740 return 0; 1738 return 0;
1741} 1739}
1742 1740
diff --git a/drivers/net/usb/Kconfig b/drivers/net/usb/Kconfig
index 3bd9678315ad..7ba8d0885f12 100644
--- a/drivers/net/usb/Kconfig
+++ b/drivers/net/usb/Kconfig
@@ -161,6 +161,7 @@ config USB_NET_AX8817X
161 * Linksys USB200M 161 * Linksys USB200M
162 * Netgear FA120 162 * Netgear FA120
163 * Sitecom LN-029 163 * Sitecom LN-029
164 * Sitecom LN-028
164 * Intellinet USB 2.0 Ethernet 165 * Intellinet USB 2.0 Ethernet
165 * ST Lab USB 2.0 Ethernet 166 * ST Lab USB 2.0 Ethernet
166 * TrendNet TU2-ET100 167 * TrendNet TU2-ET100
diff --git a/drivers/net/usb/asix_devices.c b/drivers/net/usb/asix_devices.c
index bf49792062a2..1173a24feda3 100644
--- a/drivers/net/usb/asix_devices.c
+++ b/drivers/net/usb/asix_devices.c
@@ -979,6 +979,10 @@ static const struct usb_device_id products [] = {
979 USB_DEVICE (0x0df6, 0x0056), 979 USB_DEVICE (0x0df6, 0x0056),
980 .driver_info = (unsigned long) &ax88178_info, 980 .driver_info = (unsigned long) &ax88178_info,
981}, { 981}, {
982 // Sitecom LN-028 "USB 2.0 10/100/1000 Ethernet adapter"
983 USB_DEVICE (0x0df6, 0x061c),
984 .driver_info = (unsigned long) &ax88178_info,
985}, {
982 // corega FEther USB2-TX 986 // corega FEther USB2-TX
983 USB_DEVICE (0x07aa, 0x0017), 987 USB_DEVICE (0x07aa, 0x0017),
984 .driver_info = (unsigned long) &ax8817x_info, 988 .driver_info = (unsigned long) &ax8817x_info,
diff --git a/drivers/net/usb/cx82310_eth.c b/drivers/net/usb/cx82310_eth.c
index 3eed708a6182..fe48f4c51373 100644
--- a/drivers/net/usb/cx82310_eth.c
+++ b/drivers/net/usb/cx82310_eth.c
@@ -300,9 +300,18 @@ static const struct driver_info cx82310_info = {
300 .tx_fixup = cx82310_tx_fixup, 300 .tx_fixup = cx82310_tx_fixup,
301}; 301};
302 302
303#define USB_DEVICE_CLASS(vend, prod, cl, sc, pr) \
304 .match_flags = USB_DEVICE_ID_MATCH_DEVICE | \
305 USB_DEVICE_ID_MATCH_DEV_INFO, \
306 .idVendor = (vend), \
307 .idProduct = (prod), \
308 .bDeviceClass = (cl), \
309 .bDeviceSubClass = (sc), \
310 .bDeviceProtocol = (pr)
311
303static const struct usb_device_id products[] = { 312static const struct usb_device_id products[] = {
304 { 313 {
305 USB_DEVICE_AND_INTERFACE_INFO(0x0572, 0xcb01, 0xff, 0, 0), 314 USB_DEVICE_CLASS(0x0572, 0xcb01, 0xff, 0, 0),
306 .driver_info = (unsigned long) &cx82310_info 315 .driver_info = (unsigned long) &cx82310_info
307 }, 316 },
308 { }, 317 { },
diff --git a/drivers/net/usb/hso.c b/drivers/net/usb/hso.c
index 9cdfb3fe9c15..778e91531fac 100644
--- a/drivers/net/usb/hso.c
+++ b/drivers/net/usb/hso.c
@@ -1594,7 +1594,7 @@ hso_wait_modem_status(struct hso_serial *serial, unsigned long arg)
1594 } 1594 }
1595 cprev = cnow; 1595 cprev = cnow;
1596 } 1596 }
1597 current->state = TASK_RUNNING; 1597 __set_current_state(TASK_RUNNING);
1598 remove_wait_queue(&tiocmget->waitq, &wait); 1598 remove_wait_queue(&tiocmget->waitq, &wait);
1599 1599
1600 return ret; 1600 return ret;
diff --git a/drivers/net/usb/plusb.c b/drivers/net/usb/plusb.c
index 3d18bb0eee85..1bfe0fcaccf5 100644
--- a/drivers/net/usb/plusb.c
+++ b/drivers/net/usb/plusb.c
@@ -134,6 +134,11 @@ static const struct usb_device_id products [] = {
134}, { 134}, {
135 USB_DEVICE(0x050d, 0x258a), /* Belkin F5U258/F5U279 (PL-25A1) */ 135 USB_DEVICE(0x050d, 0x258a), /* Belkin F5U258/F5U279 (PL-25A1) */
136 .driver_info = (unsigned long) &prolific_info, 136 .driver_info = (unsigned long) &prolific_info,
137}, {
138 USB_DEVICE(0x3923, 0x7825), /* National Instruments USB
139 * Host-to-Host Cable
140 */
141 .driver_info = (unsigned long) &prolific_info,
137}, 142},
138 143
139 { }, // END 144 { }, // END
diff --git a/drivers/net/virtio_net.c b/drivers/net/virtio_net.c
index f1ff3666f090..59b0e9754ae3 100644
--- a/drivers/net/virtio_net.c
+++ b/drivers/net/virtio_net.c
@@ -1448,8 +1448,10 @@ static void virtnet_free_queues(struct virtnet_info *vi)
1448{ 1448{
1449 int i; 1449 int i;
1450 1450
1451 for (i = 0; i < vi->max_queue_pairs; i++) 1451 for (i = 0; i < vi->max_queue_pairs; i++) {
1452 napi_hash_del(&vi->rq[i].napi);
1452 netif_napi_del(&vi->rq[i].napi); 1453 netif_napi_del(&vi->rq[i].napi);
1454 }
1453 1455
1454 kfree(vi->rq); 1456 kfree(vi->rq);
1455 kfree(vi->sq); 1457 kfree(vi->sq);
@@ -1948,11 +1950,8 @@ static int virtnet_freeze(struct virtio_device *vdev)
1948 cancel_delayed_work_sync(&vi->refill); 1950 cancel_delayed_work_sync(&vi->refill);
1949 1951
1950 if (netif_running(vi->dev)) { 1952 if (netif_running(vi->dev)) {
1951 for (i = 0; i < vi->max_queue_pairs; i++) { 1953 for (i = 0; i < vi->max_queue_pairs; i++)
1952 napi_disable(&vi->rq[i].napi); 1954 napi_disable(&vi->rq[i].napi);
1953 napi_hash_del(&vi->rq[i].napi);
1954 netif_napi_del(&vi->rq[i].napi);
1955 }
1956 } 1955 }
1957 1956
1958 remove_vq_common(vi); 1957 remove_vq_common(vi);
diff --git a/drivers/net/vxlan.c b/drivers/net/vxlan.c
index 1e0a775ea882..f8528a4cf54f 100644
--- a/drivers/net/vxlan.c
+++ b/drivers/net/vxlan.c
@@ -1218,7 +1218,7 @@ static int vxlan_udp_encap_recv(struct sock *sk, struct sk_buff *skb)
1218 goto drop; 1218 goto drop;
1219 1219
1220 flags &= ~VXLAN_HF_RCO; 1220 flags &= ~VXLAN_HF_RCO;
1221 vni &= VXLAN_VID_MASK; 1221 vni &= VXLAN_VNI_MASK;
1222 } 1222 }
1223 1223
1224 /* For backwards compatibility, only allow reserved fields to be 1224 /* For backwards compatibility, only allow reserved fields to be
@@ -1239,7 +1239,7 @@ static int vxlan_udp_encap_recv(struct sock *sk, struct sk_buff *skb)
1239 flags &= ~VXLAN_GBP_USED_BITS; 1239 flags &= ~VXLAN_GBP_USED_BITS;
1240 } 1240 }
1241 1241
1242 if (flags || (vni & ~VXLAN_VID_MASK)) { 1242 if (flags || vni & ~VXLAN_VNI_MASK) {
1243 /* If there are any unprocessed flags remaining treat 1243 /* If there are any unprocessed flags remaining treat
1244 * this as a malformed packet. This behavior diverges from 1244 * this as a malformed packet. This behavior diverges from
1245 * VXLAN RFC (RFC7348) which stipulates that bits in reserved 1245 * VXLAN RFC (RFC7348) which stipulates that bits in reserved
diff --git a/drivers/net/wan/cosa.c b/drivers/net/wan/cosa.c
index 83c39e2858bf..88d121d43c08 100644
--- a/drivers/net/wan/cosa.c
+++ b/drivers/net/wan/cosa.c
@@ -806,21 +806,21 @@ static ssize_t cosa_read(struct file *file,
806 spin_lock_irqsave(&cosa->lock, flags); 806 spin_lock_irqsave(&cosa->lock, flags);
807 add_wait_queue(&chan->rxwaitq, &wait); 807 add_wait_queue(&chan->rxwaitq, &wait);
808 while (!chan->rx_status) { 808 while (!chan->rx_status) {
809 current->state = TASK_INTERRUPTIBLE; 809 set_current_state(TASK_INTERRUPTIBLE);
810 spin_unlock_irqrestore(&cosa->lock, flags); 810 spin_unlock_irqrestore(&cosa->lock, flags);
811 schedule(); 811 schedule();
812 spin_lock_irqsave(&cosa->lock, flags); 812 spin_lock_irqsave(&cosa->lock, flags);
813 if (signal_pending(current) && chan->rx_status == 0) { 813 if (signal_pending(current) && chan->rx_status == 0) {
814 chan->rx_status = 1; 814 chan->rx_status = 1;
815 remove_wait_queue(&chan->rxwaitq, &wait); 815 remove_wait_queue(&chan->rxwaitq, &wait);
816 current->state = TASK_RUNNING; 816 __set_current_state(TASK_RUNNING);
817 spin_unlock_irqrestore(&cosa->lock, flags); 817 spin_unlock_irqrestore(&cosa->lock, flags);
818 mutex_unlock(&chan->rlock); 818 mutex_unlock(&chan->rlock);
819 return -ERESTARTSYS; 819 return -ERESTARTSYS;
820 } 820 }
821 } 821 }
822 remove_wait_queue(&chan->rxwaitq, &wait); 822 remove_wait_queue(&chan->rxwaitq, &wait);
823 current->state = TASK_RUNNING; 823 __set_current_state(TASK_RUNNING);
824 kbuf = chan->rxdata; 824 kbuf = chan->rxdata;
825 count = chan->rxsize; 825 count = chan->rxsize;
826 spin_unlock_irqrestore(&cosa->lock, flags); 826 spin_unlock_irqrestore(&cosa->lock, flags);
@@ -890,14 +890,14 @@ static ssize_t cosa_write(struct file *file,
890 spin_lock_irqsave(&cosa->lock, flags); 890 spin_lock_irqsave(&cosa->lock, flags);
891 add_wait_queue(&chan->txwaitq, &wait); 891 add_wait_queue(&chan->txwaitq, &wait);
892 while (!chan->tx_status) { 892 while (!chan->tx_status) {
893 current->state = TASK_INTERRUPTIBLE; 893 set_current_state(TASK_INTERRUPTIBLE);
894 spin_unlock_irqrestore(&cosa->lock, flags); 894 spin_unlock_irqrestore(&cosa->lock, flags);
895 schedule(); 895 schedule();
896 spin_lock_irqsave(&cosa->lock, flags); 896 spin_lock_irqsave(&cosa->lock, flags);
897 if (signal_pending(current) && chan->tx_status == 0) { 897 if (signal_pending(current) && chan->tx_status == 0) {
898 chan->tx_status = 1; 898 chan->tx_status = 1;
899 remove_wait_queue(&chan->txwaitq, &wait); 899 remove_wait_queue(&chan->txwaitq, &wait);
900 current->state = TASK_RUNNING; 900 __set_current_state(TASK_RUNNING);
901 chan->tx_status = 1; 901 chan->tx_status = 1;
902 spin_unlock_irqrestore(&cosa->lock, flags); 902 spin_unlock_irqrestore(&cosa->lock, flags);
903 up(&chan->wsem); 903 up(&chan->wsem);
@@ -905,7 +905,7 @@ static ssize_t cosa_write(struct file *file,
905 } 905 }
906 } 906 }
907 remove_wait_queue(&chan->txwaitq, &wait); 907 remove_wait_queue(&chan->txwaitq, &wait);
908 current->state = TASK_RUNNING; 908 __set_current_state(TASK_RUNNING);
909 up(&chan->wsem); 909 up(&chan->wsem);
910 spin_unlock_irqrestore(&cosa->lock, flags); 910 spin_unlock_irqrestore(&cosa->lock, flags);
911 kfree(kbuf); 911 kfree(kbuf);
diff --git a/drivers/net/wireless/b43/main.c b/drivers/net/wireless/b43/main.c
index ccbdb05b28cd..75345c1e8c34 100644
--- a/drivers/net/wireless/b43/main.c
+++ b/drivers/net/wireless/b43/main.c
@@ -5370,6 +5370,7 @@ static void b43_supported_bands(struct b43_wldev *dev, bool *have_2ghz_phy,
5370 case 0x432a: /* BCM4321 */ 5370 case 0x432a: /* BCM4321 */
5371 case 0x432d: /* BCM4322 */ 5371 case 0x432d: /* BCM4322 */
5372 case 0x4352: /* BCM43222 */ 5372 case 0x4352: /* BCM43222 */
5373 case 0x435a: /* BCM43228 */
5373 case 0x4333: /* BCM4331 */ 5374 case 0x4333: /* BCM4331 */
5374 case 0x43a2: /* BCM4360 */ 5375 case 0x43a2: /* BCM4360 */
5375 case 0x43b3: /* BCM4352 */ 5376 case 0x43b3: /* BCM4352 */
diff --git a/drivers/net/wireless/brcm80211/brcmfmac/vendor.c b/drivers/net/wireless/brcm80211/brcmfmac/vendor.c
index 50cdf7090198..8eff2753abad 100644
--- a/drivers/net/wireless/brcm80211/brcmfmac/vendor.c
+++ b/drivers/net/wireless/brcm80211/brcmfmac/vendor.c
@@ -39,13 +39,22 @@ static int brcmf_cfg80211_vndr_cmds_dcmd_handler(struct wiphy *wiphy,
39 void *dcmd_buf = NULL, *wr_pointer; 39 void *dcmd_buf = NULL, *wr_pointer;
40 u16 msglen, maxmsglen = PAGE_SIZE - 0x100; 40 u16 msglen, maxmsglen = PAGE_SIZE - 0x100;
41 41
42 brcmf_dbg(TRACE, "cmd %x set %d len %d\n", cmdhdr->cmd, cmdhdr->set, 42 if (len < sizeof(*cmdhdr)) {
43 cmdhdr->len); 43 brcmf_err("vendor command too short: %d\n", len);
44 return -EINVAL;
45 }
44 46
45 vif = container_of(wdev, struct brcmf_cfg80211_vif, wdev); 47 vif = container_of(wdev, struct brcmf_cfg80211_vif, wdev);
46 ifp = vif->ifp; 48 ifp = vif->ifp;
47 49
48 len -= sizeof(struct brcmf_vndr_dcmd_hdr); 50 brcmf_dbg(TRACE, "ifidx=%d, cmd=%d\n", ifp->ifidx, cmdhdr->cmd);
51
52 if (cmdhdr->offset > len) {
53 brcmf_err("bad buffer offset %d > %d\n", cmdhdr->offset, len);
54 return -EINVAL;
55 }
56
57 len -= cmdhdr->offset;
49 ret_len = cmdhdr->len; 58 ret_len = cmdhdr->len;
50 if (ret_len > 0 || len > 0) { 59 if (ret_len > 0 || len > 0) {
51 if (len > BRCMF_DCMD_MAXLEN) { 60 if (len > BRCMF_DCMD_MAXLEN) {
diff --git a/drivers/net/wireless/iwlwifi/iwl-1000.c b/drivers/net/wireless/iwlwifi/iwl-1000.c
index c3817fae16c0..06f6cc08f451 100644
--- a/drivers/net/wireless/iwlwifi/iwl-1000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-1000.c
@@ -95,7 +95,8 @@ static const struct iwl_eeprom_params iwl1000_eeprom_params = {
95 .nvm_calib_ver = EEPROM_1000_TX_POWER_VERSION, \ 95 .nvm_calib_ver = EEPROM_1000_TX_POWER_VERSION, \
96 .base_params = &iwl1000_base_params, \ 96 .base_params = &iwl1000_base_params, \
97 .eeprom_params = &iwl1000_eeprom_params, \ 97 .eeprom_params = &iwl1000_eeprom_params, \
98 .led_mode = IWL_LED_BLINK 98 .led_mode = IWL_LED_BLINK, \
99 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
99 100
100const struct iwl_cfg iwl1000_bgn_cfg = { 101const struct iwl_cfg iwl1000_bgn_cfg = {
101 .name = "Intel(R) Centrino(R) Wireless-N 1000 BGN", 102 .name = "Intel(R) Centrino(R) Wireless-N 1000 BGN",
@@ -121,7 +122,8 @@ const struct iwl_cfg iwl1000_bg_cfg = {
121 .base_params = &iwl1000_base_params, \ 122 .base_params = &iwl1000_base_params, \
122 .eeprom_params = &iwl1000_eeprom_params, \ 123 .eeprom_params = &iwl1000_eeprom_params, \
123 .led_mode = IWL_LED_RF_STATE, \ 124 .led_mode = IWL_LED_RF_STATE, \
124 .rx_with_siso_diversity = true 125 .rx_with_siso_diversity = true, \
126 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
125 127
126const struct iwl_cfg iwl100_bgn_cfg = { 128const struct iwl_cfg iwl100_bgn_cfg = {
127 .name = "Intel(R) Centrino(R) Wireless-N 100 BGN", 129 .name = "Intel(R) Centrino(R) Wireless-N 100 BGN",
diff --git a/drivers/net/wireless/iwlwifi/iwl-2000.c b/drivers/net/wireless/iwlwifi/iwl-2000.c
index 21e5d0843a62..890b95f497d6 100644
--- a/drivers/net/wireless/iwlwifi/iwl-2000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-2000.c
@@ -123,7 +123,9 @@ static const struct iwl_eeprom_params iwl20x0_eeprom_params = {
123 .nvm_calib_ver = EEPROM_2000_TX_POWER_VERSION, \ 123 .nvm_calib_ver = EEPROM_2000_TX_POWER_VERSION, \
124 .base_params = &iwl2000_base_params, \ 124 .base_params = &iwl2000_base_params, \
125 .eeprom_params = &iwl20x0_eeprom_params, \ 125 .eeprom_params = &iwl20x0_eeprom_params, \
126 .led_mode = IWL_LED_RF_STATE 126 .led_mode = IWL_LED_RF_STATE, \
127 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
128
127 129
128const struct iwl_cfg iwl2000_2bgn_cfg = { 130const struct iwl_cfg iwl2000_2bgn_cfg = {
129 .name = "Intel(R) Centrino(R) Wireless-N 2200 BGN", 131 .name = "Intel(R) Centrino(R) Wireless-N 2200 BGN",
@@ -149,7 +151,8 @@ const struct iwl_cfg iwl2000_2bgn_d_cfg = {
149 .nvm_calib_ver = EEPROM_2000_TX_POWER_VERSION, \ 151 .nvm_calib_ver = EEPROM_2000_TX_POWER_VERSION, \
150 .base_params = &iwl2030_base_params, \ 152 .base_params = &iwl2030_base_params, \
151 .eeprom_params = &iwl20x0_eeprom_params, \ 153 .eeprom_params = &iwl20x0_eeprom_params, \
152 .led_mode = IWL_LED_RF_STATE 154 .led_mode = IWL_LED_RF_STATE, \
155 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
153 156
154const struct iwl_cfg iwl2030_2bgn_cfg = { 157const struct iwl_cfg iwl2030_2bgn_cfg = {
155 .name = "Intel(R) Centrino(R) Wireless-N 2230 BGN", 158 .name = "Intel(R) Centrino(R) Wireless-N 2230 BGN",
@@ -170,7 +173,8 @@ const struct iwl_cfg iwl2030_2bgn_cfg = {
170 .base_params = &iwl2000_base_params, \ 173 .base_params = &iwl2000_base_params, \
171 .eeprom_params = &iwl20x0_eeprom_params, \ 174 .eeprom_params = &iwl20x0_eeprom_params, \
172 .led_mode = IWL_LED_RF_STATE, \ 175 .led_mode = IWL_LED_RF_STATE, \
173 .rx_with_siso_diversity = true 176 .rx_with_siso_diversity = true, \
177 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
174 178
175const struct iwl_cfg iwl105_bgn_cfg = { 179const struct iwl_cfg iwl105_bgn_cfg = {
176 .name = "Intel(R) Centrino(R) Wireless-N 105 BGN", 180 .name = "Intel(R) Centrino(R) Wireless-N 105 BGN",
@@ -197,7 +201,8 @@ const struct iwl_cfg iwl105_bgn_d_cfg = {
197 .base_params = &iwl2030_base_params, \ 201 .base_params = &iwl2030_base_params, \
198 .eeprom_params = &iwl20x0_eeprom_params, \ 202 .eeprom_params = &iwl20x0_eeprom_params, \
199 .led_mode = IWL_LED_RF_STATE, \ 203 .led_mode = IWL_LED_RF_STATE, \
200 .rx_with_siso_diversity = true 204 .rx_with_siso_diversity = true, \
205 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
201 206
202const struct iwl_cfg iwl135_bgn_cfg = { 207const struct iwl_cfg iwl135_bgn_cfg = {
203 .name = "Intel(R) Centrino(R) Wireless-N 135 BGN", 208 .name = "Intel(R) Centrino(R) Wireless-N 135 BGN",
diff --git a/drivers/net/wireless/iwlwifi/iwl-5000.c b/drivers/net/wireless/iwlwifi/iwl-5000.c
index 332bbede39e5..724194e23414 100644
--- a/drivers/net/wireless/iwlwifi/iwl-5000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-5000.c
@@ -93,7 +93,8 @@ static const struct iwl_eeprom_params iwl5000_eeprom_params = {
93 .nvm_calib_ver = EEPROM_5000_TX_POWER_VERSION, \ 93 .nvm_calib_ver = EEPROM_5000_TX_POWER_VERSION, \
94 .base_params = &iwl5000_base_params, \ 94 .base_params = &iwl5000_base_params, \
95 .eeprom_params = &iwl5000_eeprom_params, \ 95 .eeprom_params = &iwl5000_eeprom_params, \
96 .led_mode = IWL_LED_BLINK 96 .led_mode = IWL_LED_BLINK, \
97 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
97 98
98const struct iwl_cfg iwl5300_agn_cfg = { 99const struct iwl_cfg iwl5300_agn_cfg = {
99 .name = "Intel(R) Ultimate N WiFi Link 5300 AGN", 100 .name = "Intel(R) Ultimate N WiFi Link 5300 AGN",
@@ -158,7 +159,8 @@ const struct iwl_cfg iwl5350_agn_cfg = {
158 .base_params = &iwl5000_base_params, \ 159 .base_params = &iwl5000_base_params, \
159 .eeprom_params = &iwl5000_eeprom_params, \ 160 .eeprom_params = &iwl5000_eeprom_params, \
160 .led_mode = IWL_LED_BLINK, \ 161 .led_mode = IWL_LED_BLINK, \
161 .internal_wimax_coex = true 162 .internal_wimax_coex = true, \
163 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
162 164
163const struct iwl_cfg iwl5150_agn_cfg = { 165const struct iwl_cfg iwl5150_agn_cfg = {
164 .name = "Intel(R) WiMAX/WiFi Link 5150 AGN", 166 .name = "Intel(R) WiMAX/WiFi Link 5150 AGN",
diff --git a/drivers/net/wireless/iwlwifi/iwl-6000.c b/drivers/net/wireless/iwlwifi/iwl-6000.c
index 8f2c3c8c6b84..21b2630763dc 100644
--- a/drivers/net/wireless/iwlwifi/iwl-6000.c
+++ b/drivers/net/wireless/iwlwifi/iwl-6000.c
@@ -145,7 +145,8 @@ static const struct iwl_eeprom_params iwl6000_eeprom_params = {
145 .nvm_calib_ver = EEPROM_6005_TX_POWER_VERSION, \ 145 .nvm_calib_ver = EEPROM_6005_TX_POWER_VERSION, \
146 .base_params = &iwl6000_g2_base_params, \ 146 .base_params = &iwl6000_g2_base_params, \
147 .eeprom_params = &iwl6000_eeprom_params, \ 147 .eeprom_params = &iwl6000_eeprom_params, \
148 .led_mode = IWL_LED_RF_STATE 148 .led_mode = IWL_LED_RF_STATE, \
149 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
149 150
150const struct iwl_cfg iwl6005_2agn_cfg = { 151const struct iwl_cfg iwl6005_2agn_cfg = {
151 .name = "Intel(R) Centrino(R) Advanced-N 6205 AGN", 152 .name = "Intel(R) Centrino(R) Advanced-N 6205 AGN",
@@ -199,7 +200,8 @@ const struct iwl_cfg iwl6005_2agn_mow2_cfg = {
199 .nvm_calib_ver = EEPROM_6030_TX_POWER_VERSION, \ 200 .nvm_calib_ver = EEPROM_6030_TX_POWER_VERSION, \
200 .base_params = &iwl6000_g2_base_params, \ 201 .base_params = &iwl6000_g2_base_params, \
201 .eeprom_params = &iwl6000_eeprom_params, \ 202 .eeprom_params = &iwl6000_eeprom_params, \
202 .led_mode = IWL_LED_RF_STATE 203 .led_mode = IWL_LED_RF_STATE, \
204 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
203 205
204const struct iwl_cfg iwl6030_2agn_cfg = { 206const struct iwl_cfg iwl6030_2agn_cfg = {
205 .name = "Intel(R) Centrino(R) Advanced-N 6230 AGN", 207 .name = "Intel(R) Centrino(R) Advanced-N 6230 AGN",
@@ -235,7 +237,8 @@ const struct iwl_cfg iwl6030_2bg_cfg = {
235 .nvm_calib_ver = EEPROM_6030_TX_POWER_VERSION, \ 237 .nvm_calib_ver = EEPROM_6030_TX_POWER_VERSION, \
236 .base_params = &iwl6000_g2_base_params, \ 238 .base_params = &iwl6000_g2_base_params, \
237 .eeprom_params = &iwl6000_eeprom_params, \ 239 .eeprom_params = &iwl6000_eeprom_params, \
238 .led_mode = IWL_LED_RF_STATE 240 .led_mode = IWL_LED_RF_STATE, \
241 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
239 242
240const struct iwl_cfg iwl6035_2agn_cfg = { 243const struct iwl_cfg iwl6035_2agn_cfg = {
241 .name = "Intel(R) Centrino(R) Advanced-N 6235 AGN", 244 .name = "Intel(R) Centrino(R) Advanced-N 6235 AGN",
@@ -290,7 +293,8 @@ const struct iwl_cfg iwl130_bg_cfg = {
290 .nvm_calib_ver = EEPROM_6000_TX_POWER_VERSION, \ 293 .nvm_calib_ver = EEPROM_6000_TX_POWER_VERSION, \
291 .base_params = &iwl6000_base_params, \ 294 .base_params = &iwl6000_base_params, \
292 .eeprom_params = &iwl6000_eeprom_params, \ 295 .eeprom_params = &iwl6000_eeprom_params, \
293 .led_mode = IWL_LED_BLINK 296 .led_mode = IWL_LED_BLINK, \
297 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
294 298
295const struct iwl_cfg iwl6000i_2agn_cfg = { 299const struct iwl_cfg iwl6000i_2agn_cfg = {
296 .name = "Intel(R) Centrino(R) Advanced-N 6200 AGN", 300 .name = "Intel(R) Centrino(R) Advanced-N 6200 AGN",
@@ -322,7 +326,8 @@ const struct iwl_cfg iwl6000i_2bg_cfg = {
322 .base_params = &iwl6050_base_params, \ 326 .base_params = &iwl6050_base_params, \
323 .eeprom_params = &iwl6000_eeprom_params, \ 327 .eeprom_params = &iwl6000_eeprom_params, \
324 .led_mode = IWL_LED_BLINK, \ 328 .led_mode = IWL_LED_BLINK, \
325 .internal_wimax_coex = true 329 .internal_wimax_coex = true, \
330 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
326 331
327const struct iwl_cfg iwl6050_2agn_cfg = { 332const struct iwl_cfg iwl6050_2agn_cfg = {
328 .name = "Intel(R) Centrino(R) Advanced-N + WiMAX 6250 AGN", 333 .name = "Intel(R) Centrino(R) Advanced-N + WiMAX 6250 AGN",
@@ -347,7 +352,8 @@ const struct iwl_cfg iwl6050_2abg_cfg = {
347 .base_params = &iwl6050_base_params, \ 352 .base_params = &iwl6050_base_params, \
348 .eeprom_params = &iwl6000_eeprom_params, \ 353 .eeprom_params = &iwl6000_eeprom_params, \
349 .led_mode = IWL_LED_BLINK, \ 354 .led_mode = IWL_LED_BLINK, \
350 .internal_wimax_coex = true 355 .internal_wimax_coex = true, \
356 .max_ht_ampdu_exponent = IEEE80211_HT_MAX_AMPDU_64K
351 357
352const struct iwl_cfg iwl6150_bgn_cfg = { 358const struct iwl_cfg iwl6150_bgn_cfg = {
353 .name = "Intel(R) Centrino(R) Wireless-N + WiMAX 6150 BGN", 359 .name = "Intel(R) Centrino(R) Wireless-N + WiMAX 6150 BGN",
diff --git a/drivers/net/wireless/iwlwifi/mvm/coex.c b/drivers/net/wireless/iwlwifi/mvm/coex.c
index 1ec4d55155f7..7810c41cf9a7 100644
--- a/drivers/net/wireless/iwlwifi/mvm/coex.c
+++ b/drivers/net/wireless/iwlwifi/mvm/coex.c
@@ -793,7 +793,8 @@ static void iwl_mvm_bt_notif_iterator(void *_data, u8 *mac,
793 if (!vif->bss_conf.assoc) 793 if (!vif->bss_conf.assoc)
794 smps_mode = IEEE80211_SMPS_AUTOMATIC; 794 smps_mode = IEEE80211_SMPS_AUTOMATIC;
795 795
796 if (IWL_COEX_IS_RRC_ON(mvm->last_bt_notif.ttc_rrc_status, 796 if (mvmvif->phy_ctxt &&
797 IWL_COEX_IS_RRC_ON(mvm->last_bt_notif.ttc_rrc_status,
797 mvmvif->phy_ctxt->id)) 798 mvmvif->phy_ctxt->id))
798 smps_mode = IEEE80211_SMPS_AUTOMATIC; 799 smps_mode = IEEE80211_SMPS_AUTOMATIC;
799 800
diff --git a/drivers/net/wireless/iwlwifi/mvm/coex_legacy.c b/drivers/net/wireless/iwlwifi/mvm/coex_legacy.c
index d530ef3da107..542ee74f290a 100644
--- a/drivers/net/wireless/iwlwifi/mvm/coex_legacy.c
+++ b/drivers/net/wireless/iwlwifi/mvm/coex_legacy.c
@@ -832,7 +832,8 @@ static void iwl_mvm_bt_notif_iterator(void *_data, u8 *mac,
832 if (!vif->bss_conf.assoc) 832 if (!vif->bss_conf.assoc)
833 smps_mode = IEEE80211_SMPS_AUTOMATIC; 833 smps_mode = IEEE80211_SMPS_AUTOMATIC;
834 834
835 if (data->notif->rrc_enabled & BIT(mvmvif->phy_ctxt->id)) 835 if (mvmvif->phy_ctxt &&
836 data->notif->rrc_enabled & BIT(mvmvif->phy_ctxt->id))
836 smps_mode = IEEE80211_SMPS_AUTOMATIC; 837 smps_mode = IEEE80211_SMPS_AUTOMATIC;
837 838
838 IWL_DEBUG_COEX(data->mvm, 839 IWL_DEBUG_COEX(data->mvm,
diff --git a/drivers/net/wireless/iwlwifi/mvm/mac80211.c b/drivers/net/wireless/iwlwifi/mvm/mac80211.c
index 1ff7ec08532d..09654e73a533 100644
--- a/drivers/net/wireless/iwlwifi/mvm/mac80211.c
+++ b/drivers/net/wireless/iwlwifi/mvm/mac80211.c
@@ -405,7 +405,10 @@ int iwl_mvm_mac_setup_register(struct iwl_mvm *mvm)
405 hw->wiphy->bands[IEEE80211_BAND_5GHZ] = 405 hw->wiphy->bands[IEEE80211_BAND_5GHZ] =
406 &mvm->nvm_data->bands[IEEE80211_BAND_5GHZ]; 406 &mvm->nvm_data->bands[IEEE80211_BAND_5GHZ];
407 407
408 if (mvm->fw->ucode_capa.capa[0] & IWL_UCODE_TLV_CAPA_BEAMFORMER) 408 if ((mvm->fw->ucode_capa.capa[0] &
409 IWL_UCODE_TLV_CAPA_BEAMFORMER) &&
410 (mvm->fw->ucode_capa.api[0] &
411 IWL_UCODE_TLV_API_LQ_SS_PARAMS))
409 hw->wiphy->bands[IEEE80211_BAND_5GHZ]->vht_cap.cap |= 412 hw->wiphy->bands[IEEE80211_BAND_5GHZ]->vht_cap.cap |=
410 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE; 413 IEEE80211_VHT_CAP_SU_BEAMFORMER_CAPABLE;
411 } 414 }
@@ -2215,7 +2218,19 @@ static void iwl_mvm_mac_cancel_hw_scan(struct ieee80211_hw *hw,
2215 2218
2216 mutex_lock(&mvm->mutex); 2219 mutex_lock(&mvm->mutex);
2217 2220
2218 iwl_mvm_cancel_scan(mvm); 2221 /* Due to a race condition, it's possible that mac80211 asks
2222 * us to stop a hw_scan when it's already stopped. This can
2223 * happen, for instance, if we stopped the scan ourselves,
2224 * called ieee80211_scan_completed() and the userspace called
2225 * cancel scan scan before ieee80211_scan_work() could run.
2226 * To handle that, simply return if the scan is not running.
2227 */
2228 /* FIXME: for now, we ignore this race for UMAC scans, since
2229 * they don't set the scan_status.
2230 */
2231 if ((mvm->scan_status == IWL_MVM_SCAN_OS) ||
2232 (mvm->fw->ucode_capa.capa[0] & IWL_UCODE_TLV_CAPA_UMAC_SCAN))
2233 iwl_mvm_cancel_scan(mvm);
2219 2234
2220 mutex_unlock(&mvm->mutex); 2235 mutex_unlock(&mvm->mutex);
2221} 2236}
@@ -2559,12 +2574,29 @@ static int iwl_mvm_mac_sched_scan_stop(struct ieee80211_hw *hw,
2559 int ret; 2574 int ret;
2560 2575
2561 mutex_lock(&mvm->mutex); 2576 mutex_lock(&mvm->mutex);
2577
2578 /* Due to a race condition, it's possible that mac80211 asks
2579 * us to stop a sched_scan when it's already stopped. This
2580 * can happen, for instance, if we stopped the scan ourselves,
2581 * called ieee80211_sched_scan_stopped() and the userspace called
2582 * stop sched scan scan before ieee80211_sched_scan_stopped_work()
2583 * could run. To handle this, simply return if the scan is
2584 * not running.
2585 */
2586 /* FIXME: for now, we ignore this race for UMAC scans, since
2587 * they don't set the scan_status.
2588 */
2589 if (mvm->scan_status != IWL_MVM_SCAN_SCHED &&
2590 !(mvm->fw->ucode_capa.capa[0] & IWL_UCODE_TLV_CAPA_UMAC_SCAN)) {
2591 mutex_unlock(&mvm->mutex);
2592 return 0;
2593 }
2594
2562 ret = iwl_mvm_scan_offload_stop(mvm, false); 2595 ret = iwl_mvm_scan_offload_stop(mvm, false);
2563 mutex_unlock(&mvm->mutex); 2596 mutex_unlock(&mvm->mutex);
2564 iwl_mvm_wait_for_async_handlers(mvm); 2597 iwl_mvm_wait_for_async_handlers(mvm);
2565 2598
2566 return ret; 2599 return ret;
2567
2568} 2600}
2569 2601
2570static int iwl_mvm_mac_set_key(struct ieee80211_hw *hw, 2602static int iwl_mvm_mac_set_key(struct ieee80211_hw *hw,
diff --git a/drivers/net/wireless/iwlwifi/mvm/rs.c b/drivers/net/wireless/iwlwifi/mvm/rs.c
index 194bd1f939ca..efa9688a4cf1 100644
--- a/drivers/net/wireless/iwlwifi/mvm/rs.c
+++ b/drivers/net/wireless/iwlwifi/mvm/rs.c
@@ -134,9 +134,12 @@ enum rs_column_mode {
134#define MAX_NEXT_COLUMNS 7 134#define MAX_NEXT_COLUMNS 7
135#define MAX_COLUMN_CHECKS 3 135#define MAX_COLUMN_CHECKS 3
136 136
137struct rs_tx_column;
138
137typedef bool (*allow_column_func_t) (struct iwl_mvm *mvm, 139typedef bool (*allow_column_func_t) (struct iwl_mvm *mvm,
138 struct ieee80211_sta *sta, 140 struct ieee80211_sta *sta,
139 struct iwl_scale_tbl_info *tbl); 141 struct iwl_scale_tbl_info *tbl,
142 const struct rs_tx_column *next_col);
140 143
141struct rs_tx_column { 144struct rs_tx_column {
142 enum rs_column_mode mode; 145 enum rs_column_mode mode;
@@ -147,13 +150,15 @@ struct rs_tx_column {
147}; 150};
148 151
149static bool rs_ant_allow(struct iwl_mvm *mvm, struct ieee80211_sta *sta, 152static bool rs_ant_allow(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
150 struct iwl_scale_tbl_info *tbl) 153 struct iwl_scale_tbl_info *tbl,
154 const struct rs_tx_column *next_col)
151{ 155{
152 return iwl_mvm_bt_coex_is_ant_avail(mvm, tbl->rate.ant); 156 return iwl_mvm_bt_coex_is_ant_avail(mvm, next_col->ant);
153} 157}
154 158
155static bool rs_mimo_allow(struct iwl_mvm *mvm, struct ieee80211_sta *sta, 159static bool rs_mimo_allow(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
156 struct iwl_scale_tbl_info *tbl) 160 struct iwl_scale_tbl_info *tbl,
161 const struct rs_tx_column *next_col)
157{ 162{
158 if (!sta->ht_cap.ht_supported) 163 if (!sta->ht_cap.ht_supported)
159 return false; 164 return false;
@@ -171,7 +176,8 @@ static bool rs_mimo_allow(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
171} 176}
172 177
173static bool rs_siso_allow(struct iwl_mvm *mvm, struct ieee80211_sta *sta, 178static bool rs_siso_allow(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
174 struct iwl_scale_tbl_info *tbl) 179 struct iwl_scale_tbl_info *tbl,
180 const struct rs_tx_column *next_col)
175{ 181{
176 if (!sta->ht_cap.ht_supported) 182 if (!sta->ht_cap.ht_supported)
177 return false; 183 return false;
@@ -180,7 +186,8 @@ static bool rs_siso_allow(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
180} 186}
181 187
182static bool rs_sgi_allow(struct iwl_mvm *mvm, struct ieee80211_sta *sta, 188static bool rs_sgi_allow(struct iwl_mvm *mvm, struct ieee80211_sta *sta,
183 struct iwl_scale_tbl_info *tbl) 189 struct iwl_scale_tbl_info *tbl,
190 const struct rs_tx_column *next_col)
184{ 191{
185 struct rs_rate *rate = &tbl->rate; 192 struct rs_rate *rate = &tbl->rate;
186 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap; 193 struct ieee80211_sta_ht_cap *ht_cap = &sta->ht_cap;
@@ -1590,7 +1597,7 @@ static enum rs_column rs_get_next_column(struct iwl_mvm *mvm,
1590 1597
1591 for (j = 0; j < MAX_COLUMN_CHECKS; j++) { 1598 for (j = 0; j < MAX_COLUMN_CHECKS; j++) {
1592 allow_func = next_col->checks[j]; 1599 allow_func = next_col->checks[j];
1593 if (allow_func && !allow_func(mvm, sta, tbl)) 1600 if (allow_func && !allow_func(mvm, sta, tbl, next_col))
1594 break; 1601 break;
1595 } 1602 }
1596 1603
diff --git a/drivers/net/wireless/iwlwifi/mvm/scan.c b/drivers/net/wireless/iwlwifi/mvm/scan.c
index 7e9aa3cb3254..c47c8051da77 100644
--- a/drivers/net/wireless/iwlwifi/mvm/scan.c
+++ b/drivers/net/wireless/iwlwifi/mvm/scan.c
@@ -1128,8 +1128,10 @@ int iwl_mvm_scan_offload_stop(struct iwl_mvm *mvm, bool notify)
1128 if (mvm->scan_status == IWL_MVM_SCAN_NONE) 1128 if (mvm->scan_status == IWL_MVM_SCAN_NONE)
1129 return 0; 1129 return 0;
1130 1130
1131 if (iwl_mvm_is_radio_killed(mvm)) 1131 if (iwl_mvm_is_radio_killed(mvm)) {
1132 ret = 0;
1132 goto out; 1133 goto out;
1134 }
1133 1135
1134 if (mvm->scan_status != IWL_MVM_SCAN_SCHED && 1136 if (mvm->scan_status != IWL_MVM_SCAN_SCHED &&
1135 (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_LMAC_SCAN) || 1137 (!(mvm->fw->ucode_capa.api[0] & IWL_UCODE_TLV_API_LMAC_SCAN) ||
@@ -1148,16 +1150,14 @@ int iwl_mvm_scan_offload_stop(struct iwl_mvm *mvm, bool notify)
1148 IWL_DEBUG_SCAN(mvm, "Send stop %sscan failed %d\n", 1150 IWL_DEBUG_SCAN(mvm, "Send stop %sscan failed %d\n",
1149 sched ? "offloaded " : "", ret); 1151 sched ? "offloaded " : "", ret);
1150 iwl_remove_notification(&mvm->notif_wait, &wait_scan_done); 1152 iwl_remove_notification(&mvm->notif_wait, &wait_scan_done);
1151 return ret; 1153 goto out;
1152 } 1154 }
1153 1155
1154 IWL_DEBUG_SCAN(mvm, "Successfully sent stop %sscan\n", 1156 IWL_DEBUG_SCAN(mvm, "Successfully sent stop %sscan\n",
1155 sched ? "offloaded " : ""); 1157 sched ? "offloaded " : "");
1156 1158
1157 ret = iwl_wait_notification(&mvm->notif_wait, &wait_scan_done, 1 * HZ); 1159 ret = iwl_wait_notification(&mvm->notif_wait, &wait_scan_done, 1 * HZ);
1158 if (ret) 1160out:
1159 return ret;
1160
1161 /* 1161 /*
1162 * Clear the scan status so the next scan requests will succeed. This 1162 * Clear the scan status so the next scan requests will succeed. This
1163 * also ensures the Rx handler doesn't do anything, as the scan was 1163 * also ensures the Rx handler doesn't do anything, as the scan was
@@ -1167,7 +1167,6 @@ int iwl_mvm_scan_offload_stop(struct iwl_mvm *mvm, bool notify)
1167 if (mvm->scan_status == IWL_MVM_SCAN_OS) 1167 if (mvm->scan_status == IWL_MVM_SCAN_OS)
1168 iwl_mvm_unref(mvm, IWL_MVM_REF_SCAN); 1168 iwl_mvm_unref(mvm, IWL_MVM_REF_SCAN);
1169 1169
1170out:
1171 mvm->scan_status = IWL_MVM_SCAN_NONE; 1170 mvm->scan_status = IWL_MVM_SCAN_NONE;
1172 1171
1173 if (notify) { 1172 if (notify) {
@@ -1177,7 +1176,7 @@ out:
1177 ieee80211_scan_completed(mvm->hw, true); 1176 ieee80211_scan_completed(mvm->hw, true);
1178 } 1177 }
1179 1178
1180 return 0; 1179 return ret;
1181} 1180}
1182 1181
1183static void iwl_mvm_unified_scan_fill_tx_cmd(struct iwl_mvm *mvm, 1182static void iwl_mvm_unified_scan_fill_tx_cmd(struct iwl_mvm *mvm,
diff --git a/drivers/net/wireless/iwlwifi/mvm/time-event.c b/drivers/net/wireless/iwlwifi/mvm/time-event.c
index 54fafbf9a711..f8d6f306dd76 100644
--- a/drivers/net/wireless/iwlwifi/mvm/time-event.c
+++ b/drivers/net/wireless/iwlwifi/mvm/time-event.c
@@ -750,8 +750,7 @@ void iwl_mvm_stop_roc(struct iwl_mvm *mvm)
750 * request 750 * request
751 */ 751 */
752 list_for_each_entry(te_data, &mvm->time_event_list, list) { 752 list_for_each_entry(te_data, &mvm->time_event_list, list) {
753 if (te_data->vif->type == NL80211_IFTYPE_P2P_DEVICE && 753 if (te_data->vif->type == NL80211_IFTYPE_P2P_DEVICE) {
754 te_data->running) {
755 mvmvif = iwl_mvm_vif_from_mac80211(te_data->vif); 754 mvmvif = iwl_mvm_vif_from_mac80211(te_data->vif);
756 is_p2p = true; 755 is_p2p = true;
757 goto remove_te; 756 goto remove_te;
@@ -766,10 +765,8 @@ void iwl_mvm_stop_roc(struct iwl_mvm *mvm)
766 * request 765 * request
767 */ 766 */
768 list_for_each_entry(te_data, &mvm->aux_roc_te_list, list) { 767 list_for_each_entry(te_data, &mvm->aux_roc_te_list, list) {
769 if (te_data->running) { 768 mvmvif = iwl_mvm_vif_from_mac80211(te_data->vif);
770 mvmvif = iwl_mvm_vif_from_mac80211(te_data->vif); 769 goto remove_te;
771 goto remove_te;
772 }
773 } 770 }
774 771
775remove_te: 772remove_te:
diff --git a/drivers/net/wireless/mac80211_hwsim.c b/drivers/net/wireless/mac80211_hwsim.c
index 4a4c6586a8d2..8908be6dbc48 100644
--- a/drivers/net/wireless/mac80211_hwsim.c
+++ b/drivers/net/wireless/mac80211_hwsim.c
@@ -946,7 +946,8 @@ static void mac80211_hwsim_tx_frame_nl(struct ieee80211_hw *hw,
946 goto nla_put_failure; 946 goto nla_put_failure;
947 947
948 genlmsg_end(skb, msg_head); 948 genlmsg_end(skb, msg_head);
949 genlmsg_unicast(&init_net, skb, dst_portid); 949 if (genlmsg_unicast(&init_net, skb, dst_portid))
950 goto err_free_txskb;
950 951
951 /* Enqueue the packet */ 952 /* Enqueue the packet */
952 skb_queue_tail(&data->pending, my_skb); 953 skb_queue_tail(&data->pending, my_skb);
@@ -955,6 +956,8 @@ static void mac80211_hwsim_tx_frame_nl(struct ieee80211_hw *hw,
955 return; 956 return;
956 957
957nla_put_failure: 958nla_put_failure:
959 nlmsg_free(skb);
960err_free_txskb:
958 printk(KERN_DEBUG "mac80211_hwsim: error occurred in %s\n", __func__); 961 printk(KERN_DEBUG "mac80211_hwsim: error occurred in %s\n", __func__);
959 ieee80211_free_txskb(hw, my_skb); 962 ieee80211_free_txskb(hw, my_skb);
960 data->tx_failed++; 963 data->tx_failed++;
diff --git a/drivers/net/wireless/rtlwifi/base.c b/drivers/net/wireless/rtlwifi/base.c
index 1d4677460711..074f716020aa 100644
--- a/drivers/net/wireless/rtlwifi/base.c
+++ b/drivers/net/wireless/rtlwifi/base.c
@@ -1386,8 +1386,11 @@ u8 rtl_is_special_data(struct ieee80211_hw *hw, struct sk_buff *skb, u8 is_tx)
1386 } 1386 }
1387 1387
1388 return true; 1388 return true;
1389 } else if (0x86DD == ether_type) { 1389 } else if (ETH_P_IPV6 == ether_type) {
1390 return true; 1390 /* TODO: Handle any IPv6 cases that need special handling.
1391 * For now, always return false
1392 */
1393 goto end;
1391 } 1394 }
1392 1395
1393end: 1396end:
diff --git a/drivers/net/xen-netback/interface.c b/drivers/net/xen-netback/interface.c
index f38227afe099..3aa8648080c8 100644
--- a/drivers/net/xen-netback/interface.c
+++ b/drivers/net/xen-netback/interface.c
@@ -340,12 +340,11 @@ static void xenvif_get_ethtool_stats(struct net_device *dev,
340 unsigned int num_queues = vif->num_queues; 340 unsigned int num_queues = vif->num_queues;
341 int i; 341 int i;
342 unsigned int queue_index; 342 unsigned int queue_index;
343 struct xenvif_stats *vif_stats;
344 343
345 for (i = 0; i < ARRAY_SIZE(xenvif_stats); i++) { 344 for (i = 0; i < ARRAY_SIZE(xenvif_stats); i++) {
346 unsigned long accum = 0; 345 unsigned long accum = 0;
347 for (queue_index = 0; queue_index < num_queues; ++queue_index) { 346 for (queue_index = 0; queue_index < num_queues; ++queue_index) {
348 vif_stats = &vif->queues[queue_index].stats; 347 void *vif_stats = &vif->queues[queue_index].stats;
349 accum += *(unsigned long *)(vif_stats + xenvif_stats[i].offset); 348 accum += *(unsigned long *)(vif_stats + xenvif_stats[i].offset);
350 } 349 }
351 data[i] = accum; 350 data[i] = accum;
diff --git a/drivers/net/xen-netback/netback.c b/drivers/net/xen-netback/netback.c
index f7a31d2cb3f1..997cf0901ac2 100644
--- a/drivers/net/xen-netback/netback.c
+++ b/drivers/net/xen-netback/netback.c
@@ -96,6 +96,7 @@ static void xenvif_idx_release(struct xenvif_queue *queue, u16 pending_idx,
96static void make_tx_response(struct xenvif_queue *queue, 96static void make_tx_response(struct xenvif_queue *queue,
97 struct xen_netif_tx_request *txp, 97 struct xen_netif_tx_request *txp,
98 s8 st); 98 s8 st);
99static void push_tx_responses(struct xenvif_queue *queue);
99 100
100static inline int tx_work_todo(struct xenvif_queue *queue); 101static inline int tx_work_todo(struct xenvif_queue *queue);
101 102
@@ -657,6 +658,7 @@ static void xenvif_tx_err(struct xenvif_queue *queue,
657 do { 658 do {
658 spin_lock_irqsave(&queue->response_lock, flags); 659 spin_lock_irqsave(&queue->response_lock, flags);
659 make_tx_response(queue, txp, XEN_NETIF_RSP_ERROR); 660 make_tx_response(queue, txp, XEN_NETIF_RSP_ERROR);
661 push_tx_responses(queue);
660 spin_unlock_irqrestore(&queue->response_lock, flags); 662 spin_unlock_irqrestore(&queue->response_lock, flags);
661 if (cons == end) 663 if (cons == end)
662 break; 664 break;
@@ -1343,7 +1345,7 @@ static int xenvif_handle_frag_list(struct xenvif_queue *queue, struct sk_buff *s
1343{ 1345{
1344 unsigned int offset = skb_headlen(skb); 1346 unsigned int offset = skb_headlen(skb);
1345 skb_frag_t frags[MAX_SKB_FRAGS]; 1347 skb_frag_t frags[MAX_SKB_FRAGS];
1346 int i; 1348 int i, f;
1347 struct ubuf_info *uarg; 1349 struct ubuf_info *uarg;
1348 struct sk_buff *nskb = skb_shinfo(skb)->frag_list; 1350 struct sk_buff *nskb = skb_shinfo(skb)->frag_list;
1349 1351
@@ -1383,23 +1385,25 @@ static int xenvif_handle_frag_list(struct xenvif_queue *queue, struct sk_buff *s
1383 frags[i].page_offset = 0; 1385 frags[i].page_offset = 0;
1384 skb_frag_size_set(&frags[i], len); 1386 skb_frag_size_set(&frags[i], len);
1385 } 1387 }
1386 /* swap out with old one */
1387 memcpy(skb_shinfo(skb)->frags,
1388 frags,
1389 i * sizeof(skb_frag_t));
1390 skb_shinfo(skb)->nr_frags = i;
1391 skb->truesize += i * PAGE_SIZE;
1392 1388
1393 /* remove traces of mapped pages and frag_list */ 1389 /* Copied all the bits from the frag list -- free it. */
1394 skb_frag_list_init(skb); 1390 skb_frag_list_init(skb);
1391 xenvif_skb_zerocopy_prepare(queue, nskb);
1392 kfree_skb(nskb);
1393
1394 /* Release all the original (foreign) frags. */
1395 for (f = 0; f < skb_shinfo(skb)->nr_frags; f++)
1396 skb_frag_unref(skb, f);
1395 uarg = skb_shinfo(skb)->destructor_arg; 1397 uarg = skb_shinfo(skb)->destructor_arg;
1396 /* increase inflight counter to offset decrement in callback */ 1398 /* increase inflight counter to offset decrement in callback */
1397 atomic_inc(&queue->inflight_packets); 1399 atomic_inc(&queue->inflight_packets);
1398 uarg->callback(uarg, true); 1400 uarg->callback(uarg, true);
1399 skb_shinfo(skb)->destructor_arg = NULL; 1401 skb_shinfo(skb)->destructor_arg = NULL;
1400 1402
1401 xenvif_skb_zerocopy_prepare(queue, nskb); 1403 /* Fill the skb with the new (local) frags. */
1402 kfree_skb(nskb); 1404 memcpy(skb_shinfo(skb)->frags, frags, i * sizeof(skb_frag_t));
1405 skb_shinfo(skb)->nr_frags = i;
1406 skb->truesize += i * PAGE_SIZE;
1403 1407
1404 return 0; 1408 return 0;
1405} 1409}
@@ -1652,13 +1656,20 @@ static void xenvif_idx_release(struct xenvif_queue *queue, u16 pending_idx,
1652 unsigned long flags; 1656 unsigned long flags;
1653 1657
1654 pending_tx_info = &queue->pending_tx_info[pending_idx]; 1658 pending_tx_info = &queue->pending_tx_info[pending_idx];
1659
1655 spin_lock_irqsave(&queue->response_lock, flags); 1660 spin_lock_irqsave(&queue->response_lock, flags);
1661
1656 make_tx_response(queue, &pending_tx_info->req, status); 1662 make_tx_response(queue, &pending_tx_info->req, status);
1657 index = pending_index(queue->pending_prod); 1663
1664 /* Release the pending index before pusing the Tx response so
1665 * its available before a new Tx request is pushed by the
1666 * frontend.
1667 */
1668 index = pending_index(queue->pending_prod++);
1658 queue->pending_ring[index] = pending_idx; 1669 queue->pending_ring[index] = pending_idx;
1659 /* TX shouldn't use the index before we give it back here */ 1670
1660 mb(); 1671 push_tx_responses(queue);
1661 queue->pending_prod++; 1672
1662 spin_unlock_irqrestore(&queue->response_lock, flags); 1673 spin_unlock_irqrestore(&queue->response_lock, flags);
1663} 1674}
1664 1675
@@ -1669,7 +1680,6 @@ static void make_tx_response(struct xenvif_queue *queue,
1669{ 1680{
1670 RING_IDX i = queue->tx.rsp_prod_pvt; 1681 RING_IDX i = queue->tx.rsp_prod_pvt;
1671 struct xen_netif_tx_response *resp; 1682 struct xen_netif_tx_response *resp;
1672 int notify;
1673 1683
1674 resp = RING_GET_RESPONSE(&queue->tx, i); 1684 resp = RING_GET_RESPONSE(&queue->tx, i);
1675 resp->id = txp->id; 1685 resp->id = txp->id;
@@ -1679,6 +1689,12 @@ static void make_tx_response(struct xenvif_queue *queue,
1679 RING_GET_RESPONSE(&queue->tx, ++i)->status = XEN_NETIF_RSP_NULL; 1689 RING_GET_RESPONSE(&queue->tx, ++i)->status = XEN_NETIF_RSP_NULL;
1680 1690
1681 queue->tx.rsp_prod_pvt = ++i; 1691 queue->tx.rsp_prod_pvt = ++i;
1692}
1693
1694static void push_tx_responses(struct xenvif_queue *queue)
1695{
1696 int notify;
1697
1682 RING_PUSH_RESPONSES_AND_CHECK_NOTIFY(&queue->tx, notify); 1698 RING_PUSH_RESPONSES_AND_CHECK_NOTIFY(&queue->tx, notify);
1683 if (notify) 1699 if (notify)
1684 notify_remote_via_irq(queue->tx_irq); 1700 notify_remote_via_irq(queue->tx_irq);
diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig
index 38d1c51f58b1..7bcaeec876c0 100644
--- a/drivers/of/Kconfig
+++ b/drivers/of/Kconfig
@@ -84,8 +84,7 @@ config OF_RESOLVE
84 bool 84 bool
85 85
86config OF_OVERLAY 86config OF_OVERLAY
87 bool 87 bool "Device Tree overlays"
88 depends on OF
89 select OF_DYNAMIC 88 select OF_DYNAMIC
90 select OF_RESOLVE 89 select OF_RESOLVE
91 90
diff --git a/drivers/of/base.c b/drivers/of/base.c
index 0a8aeb8523fe..8f165b112e03 100644
--- a/drivers/of/base.c
+++ b/drivers/of/base.c
@@ -714,16 +714,12 @@ static struct device_node *__of_find_node_by_path(struct device_node *parent,
714 const char *path) 714 const char *path)
715{ 715{
716 struct device_node *child; 716 struct device_node *child;
717 int len = strchrnul(path, '/') - path; 717 int len;
718 int term;
719 718
719 len = strcspn(path, "/:");
720 if (!len) 720 if (!len)
721 return NULL; 721 return NULL;
722 722
723 term = strchrnul(path, ':') - path;
724 if (term < len)
725 len = term;
726
727 __for_each_child_of_node(parent, child) { 723 __for_each_child_of_node(parent, child) {
728 const char *name = strrchr(child->full_name, '/'); 724 const char *name = strrchr(child->full_name, '/');
729 if (WARN(!name, "malformed device_node %s\n", child->full_name)) 725 if (WARN(!name, "malformed device_node %s\n", child->full_name))
@@ -768,8 +764,12 @@ struct device_node *of_find_node_opts_by_path(const char *path, const char **opt
768 764
769 /* The path could begin with an alias */ 765 /* The path could begin with an alias */
770 if (*path != '/') { 766 if (*path != '/') {
771 char *p = strchrnul(path, '/'); 767 int len;
772 int len = separator ? separator - path : p - path; 768 const char *p = separator;
769
770 if (!p)
771 p = strchrnul(path, '/');
772 len = p - path;
773 773
774 /* of_aliases must not be NULL */ 774 /* of_aliases must not be NULL */
775 if (!of_aliases) 775 if (!of_aliases)
@@ -794,6 +794,8 @@ struct device_node *of_find_node_opts_by_path(const char *path, const char **opt
794 path++; /* Increment past '/' delimiter */ 794 path++; /* Increment past '/' delimiter */
795 np = __of_find_node_by_path(np, path); 795 np = __of_find_node_by_path(np, path);
796 path = strchrnul(path, '/'); 796 path = strchrnul(path, '/');
797 if (separator && separator < path)
798 break;
797 } 799 }
798 raw_spin_unlock_irqrestore(&devtree_lock, flags); 800 raw_spin_unlock_irqrestore(&devtree_lock, flags);
799 return np; 801 return np;
diff --git a/drivers/of/irq.c b/drivers/of/irq.c
index 0d7765807f49..1a7980692f25 100644
--- a/drivers/of/irq.c
+++ b/drivers/of/irq.c
@@ -290,7 +290,7 @@ int of_irq_parse_one(struct device_node *device, int index, struct of_phandle_ar
290 struct device_node *p; 290 struct device_node *p;
291 const __be32 *intspec, *tmp, *addr; 291 const __be32 *intspec, *tmp, *addr;
292 u32 intsize, intlen; 292 u32 intsize, intlen;
293 int i, res = -EINVAL; 293 int i, res;
294 294
295 pr_debug("of_irq_parse_one: dev=%s, index=%d\n", of_node_full_name(device), index); 295 pr_debug("of_irq_parse_one: dev=%s, index=%d\n", of_node_full_name(device), index);
296 296
@@ -323,15 +323,19 @@ int of_irq_parse_one(struct device_node *device, int index, struct of_phandle_ar
323 323
324 /* Get size of interrupt specifier */ 324 /* Get size of interrupt specifier */
325 tmp = of_get_property(p, "#interrupt-cells", NULL); 325 tmp = of_get_property(p, "#interrupt-cells", NULL);
326 if (tmp == NULL) 326 if (tmp == NULL) {
327 res = -EINVAL;
327 goto out; 328 goto out;
329 }
328 intsize = be32_to_cpu(*tmp); 330 intsize = be32_to_cpu(*tmp);
329 331
330 pr_debug(" intsize=%d intlen=%d\n", intsize, intlen); 332 pr_debug(" intsize=%d intlen=%d\n", intsize, intlen);
331 333
332 /* Check index */ 334 /* Check index */
333 if ((index + 1) * intsize > intlen) 335 if ((index + 1) * intsize > intlen) {
336 res = -EINVAL;
334 goto out; 337 goto out;
338 }
335 339
336 /* Copy intspec into irq structure */ 340 /* Copy intspec into irq structure */
337 intspec += index * intsize; 341 intspec += index * intsize;
diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c
index 352b4f28f82c..dee9270ba547 100644
--- a/drivers/of/overlay.c
+++ b/drivers/of/overlay.c
@@ -19,6 +19,7 @@
19#include <linux/string.h> 19#include <linux/string.h>
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/err.h> 21#include <linux/err.h>
22#include <linux/idr.h>
22 23
23#include "of_private.h" 24#include "of_private.h"
24 25
@@ -85,7 +86,7 @@ static int of_overlay_apply_single_device_node(struct of_overlay *ov,
85 struct device_node *target, struct device_node *child) 86 struct device_node *target, struct device_node *child)
86{ 87{
87 const char *cname; 88 const char *cname;
88 struct device_node *tchild, *grandchild; 89 struct device_node *tchild;
89 int ret = 0; 90 int ret = 0;
90 91
91 cname = kbasename(child->full_name); 92 cname = kbasename(child->full_name);
diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
index 0cf9a236d438..52c45c7df07f 100644
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -92,6 +92,16 @@ static void __init of_selftest_find_node_by_name(void)
92 "option path test failed\n"); 92 "option path test failed\n");
93 of_node_put(np); 93 of_node_put(np);
94 94
95 np = of_find_node_opts_by_path("/testcase-data:test/option", &options);
96 selftest(np && !strcmp("test/option", options),
97 "option path test, subcase #1 failed\n");
98 of_node_put(np);
99
100 np = of_find_node_opts_by_path("/testcase-data/testcase-device1:test/option", &options);
101 selftest(np && !strcmp("test/option", options),
102 "option path test, subcase #2 failed\n");
103 of_node_put(np);
104
95 np = of_find_node_opts_by_path("/testcase-data:testoption", NULL); 105 np = of_find_node_opts_by_path("/testcase-data:testoption", NULL);
96 selftest(np, "NULL option path test failed\n"); 106 selftest(np, "NULL option path test failed\n");
97 of_node_put(np); 107 of_node_put(np);
@@ -102,6 +112,12 @@ static void __init of_selftest_find_node_by_name(void)
102 "option alias path test failed\n"); 112 "option alias path test failed\n");
103 of_node_put(np); 113 of_node_put(np);
104 114
115 np = of_find_node_opts_by_path("testcase-alias:test/alias/option",
116 &options);
117 selftest(np && !strcmp("test/alias/option", options),
118 "option alias path test, subcase #1 failed\n");
119 of_node_put(np);
120
105 np = of_find_node_opts_by_path("testcase-alias:testaliasoption", NULL); 121 np = of_find_node_opts_by_path("testcase-alias:testaliasoption", NULL);
106 selftest(np, "NULL option alias path test failed\n"); 122 selftest(np, "NULL option alias path test failed\n");
107 of_node_put(np); 123 of_node_put(np);
@@ -378,9 +394,9 @@ static void __init of_selftest_property_string(void)
378 rc = of_property_match_string(np, "phandle-list-names", "first"); 394 rc = of_property_match_string(np, "phandle-list-names", "first");
379 selftest(rc == 0, "first expected:0 got:%i\n", rc); 395 selftest(rc == 0, "first expected:0 got:%i\n", rc);
380 rc = of_property_match_string(np, "phandle-list-names", "second"); 396 rc = of_property_match_string(np, "phandle-list-names", "second");
381 selftest(rc == 1, "second expected:0 got:%i\n", rc); 397 selftest(rc == 1, "second expected:1 got:%i\n", rc);
382 rc = of_property_match_string(np, "phandle-list-names", "third"); 398 rc = of_property_match_string(np, "phandle-list-names", "third");
383 selftest(rc == 2, "third expected:0 got:%i\n", rc); 399 selftest(rc == 2, "third expected:2 got:%i\n", rc);
384 rc = of_property_match_string(np, "phandle-list-names", "fourth"); 400 rc = of_property_match_string(np, "phandle-list-names", "fourth");
385 selftest(rc == -ENODATA, "unmatched string; rc=%i\n", rc); 401 selftest(rc == -ENODATA, "unmatched string; rc=%i\n", rc);
386 rc = of_property_match_string(np, "missing-property", "blah"); 402 rc = of_property_match_string(np, "missing-property", "blah");
@@ -478,7 +494,6 @@ static void __init of_selftest_changeset(void)
478 struct device_node *n1, *n2, *n21, *nremove, *parent, *np; 494 struct device_node *n1, *n2, *n21, *nremove, *parent, *np;
479 struct of_changeset chgset; 495 struct of_changeset chgset;
480 496
481 of_changeset_init(&chgset);
482 n1 = __of_node_dup(NULL, "/testcase-data/changeset/n1"); 497 n1 = __of_node_dup(NULL, "/testcase-data/changeset/n1");
483 selftest(n1, "testcase setup failure\n"); 498 selftest(n1, "testcase setup failure\n");
484 n2 = __of_node_dup(NULL, "/testcase-data/changeset/n2"); 499 n2 = __of_node_dup(NULL, "/testcase-data/changeset/n2");
@@ -979,7 +994,7 @@ static int of_path_platform_device_exists(const char *path)
979 return pdev != NULL; 994 return pdev != NULL;
980} 995}
981 996
982#if IS_ENABLED(CONFIG_I2C) 997#if IS_BUILTIN(CONFIG_I2C)
983 998
984/* get the i2c client device instantiated at the path */ 999/* get the i2c client device instantiated at the path */
985static struct i2c_client *of_path_to_i2c_client(const char *path) 1000static struct i2c_client *of_path_to_i2c_client(const char *path)
@@ -1445,7 +1460,7 @@ static void of_selftest_overlay_11(void)
1445 return; 1460 return;
1446} 1461}
1447 1462
1448#if IS_ENABLED(CONFIG_I2C) && IS_ENABLED(CONFIG_OF_OVERLAY) 1463#if IS_BUILTIN(CONFIG_I2C) && IS_ENABLED(CONFIG_OF_OVERLAY)
1449 1464
1450struct selftest_i2c_bus_data { 1465struct selftest_i2c_bus_data {
1451 struct platform_device *pdev; 1466 struct platform_device *pdev;
@@ -1584,7 +1599,7 @@ static struct i2c_driver selftest_i2c_dev_driver = {
1584 .id_table = selftest_i2c_dev_id, 1599 .id_table = selftest_i2c_dev_id,
1585}; 1600};
1586 1601
1587#if IS_ENABLED(CONFIG_I2C_MUX) 1602#if IS_BUILTIN(CONFIG_I2C_MUX)
1588 1603
1589struct selftest_i2c_mux_data { 1604struct selftest_i2c_mux_data {
1590 int nchans; 1605 int nchans;
@@ -1695,7 +1710,7 @@ static int of_selftest_overlay_i2c_init(void)
1695 "could not register selftest i2c bus driver\n")) 1710 "could not register selftest i2c bus driver\n"))
1696 return ret; 1711 return ret;
1697 1712
1698#if IS_ENABLED(CONFIG_I2C_MUX) 1713#if IS_BUILTIN(CONFIG_I2C_MUX)
1699 ret = i2c_add_driver(&selftest_i2c_mux_driver); 1714 ret = i2c_add_driver(&selftest_i2c_mux_driver);
1700 if (selftest(ret == 0, 1715 if (selftest(ret == 0,
1701 "could not register selftest i2c mux driver\n")) 1716 "could not register selftest i2c mux driver\n"))
@@ -1707,7 +1722,7 @@ static int of_selftest_overlay_i2c_init(void)
1707 1722
1708static void of_selftest_overlay_i2c_cleanup(void) 1723static void of_selftest_overlay_i2c_cleanup(void)
1709{ 1724{
1710#if IS_ENABLED(CONFIG_I2C_MUX) 1725#if IS_BUILTIN(CONFIG_I2C_MUX)
1711 i2c_del_driver(&selftest_i2c_mux_driver); 1726 i2c_del_driver(&selftest_i2c_mux_driver);
1712#endif 1727#endif
1713 platform_driver_unregister(&selftest_i2c_bus_driver); 1728 platform_driver_unregister(&selftest_i2c_bus_driver);
@@ -1814,7 +1829,7 @@ static void __init of_selftest_overlay(void)
1814 of_selftest_overlay_10(); 1829 of_selftest_overlay_10();
1815 of_selftest_overlay_11(); 1830 of_selftest_overlay_11();
1816 1831
1817#if IS_ENABLED(CONFIG_I2C) 1832#if IS_BUILTIN(CONFIG_I2C)
1818 if (selftest(of_selftest_overlay_i2c_init() == 0, "i2c init failed\n")) 1833 if (selftest(of_selftest_overlay_i2c_init() == 0, "i2c init failed\n"))
1819 goto out; 1834 goto out;
1820 1835
diff --git a/drivers/pci/host/pci-versatile.c b/drivers/pci/host/pci-versatile.c
index 1ec694a52379..464bf492ee2a 100644
--- a/drivers/pci/host/pci-versatile.c
+++ b/drivers/pci/host/pci-versatile.c
@@ -80,7 +80,7 @@ static int versatile_pci_parse_request_of_pci_ranges(struct device *dev,
80 if (err) 80 if (err)
81 return err; 81 return err;
82 82
83 resource_list_for_each_entry(win, res, list) { 83 resource_list_for_each_entry(win, res) {
84 struct resource *parent, *res = win->res; 84 struct resource *parent, *res = win->res;
85 85
86 switch (resource_type(res)) { 86 switch (resource_type(res)) {
diff --git a/drivers/pci/host/pci-xgene.c b/drivers/pci/host/pci-xgene.c
index aab55474dd0d..ee082c0366ec 100644
--- a/drivers/pci/host/pci-xgene.c
+++ b/drivers/pci/host/pci-xgene.c
@@ -127,7 +127,7 @@ static bool xgene_pcie_hide_rc_bars(struct pci_bus *bus, int offset)
127 return false; 127 return false;
128} 128}
129 129
130static int xgene_pcie_map_bus(struct pci_bus *bus, unsigned int devfn, 130static void __iomem *xgene_pcie_map_bus(struct pci_bus *bus, unsigned int devfn,
131 int offset) 131 int offset)
132{ 132{
133 struct xgene_pcie_port *port = bus->sysdata; 133 struct xgene_pcie_port *port = bus->sysdata;
@@ -137,7 +137,7 @@ static int xgene_pcie_map_bus(struct pci_bus *bus, unsigned int devfn,
137 return NULL; 137 return NULL;
138 138
139 xgene_pcie_set_rtdid_reg(bus, devfn); 139 xgene_pcie_set_rtdid_reg(bus, devfn);
140 return xgene_pcie_get_cfg_base(bus); 140 return xgene_pcie_get_cfg_base(bus) + offset;
141} 141}
142 142
143static struct pci_ops xgene_pcie_ops = { 143static struct pci_ops xgene_pcie_ops = {
diff --git a/drivers/pci/pci-sysfs.c b/drivers/pci/pci-sysfs.c
index aa012fb3834b..312f23a8429c 100644
--- a/drivers/pci/pci-sysfs.c
+++ b/drivers/pci/pci-sysfs.c
@@ -521,7 +521,8 @@ static ssize_t driver_override_store(struct device *dev,
521 struct pci_dev *pdev = to_pci_dev(dev); 521 struct pci_dev *pdev = to_pci_dev(dev);
522 char *driver_override, *old = pdev->driver_override, *cp; 522 char *driver_override, *old = pdev->driver_override, *cp;
523 523
524 if (count > PATH_MAX) 524 /* We need to keep extra room for a newline */
525 if (count >= (PAGE_SIZE - 1))
525 return -EINVAL; 526 return -EINVAL;
526 527
527 driver_override = kstrndup(buf, count, GFP_KERNEL); 528 driver_override = kstrndup(buf, count, GFP_KERNEL);
@@ -549,7 +550,7 @@ static ssize_t driver_override_show(struct device *dev,
549{ 550{
550 struct pci_dev *pdev = to_pci_dev(dev); 551 struct pci_dev *pdev = to_pci_dev(dev);
551 552
552 return sprintf(buf, "%s\n", pdev->driver_override); 553 return snprintf(buf, PAGE_SIZE, "%s\n", pdev->driver_override);
553} 554}
554static DEVICE_ATTR_RW(driver_override); 555static DEVICE_ATTR_RW(driver_override);
555 556
diff --git a/drivers/pcmcia/Kconfig b/drivers/pcmcia/Kconfig
index 3bb49252a098..45f67c63d385 100644
--- a/drivers/pcmcia/Kconfig
+++ b/drivers/pcmcia/Kconfig
@@ -69,8 +69,7 @@ config YENTA
69 tristate "CardBus yenta-compatible bridge support" 69 tristate "CardBus yenta-compatible bridge support"
70 depends on PCI 70 depends on PCI
71 select CARDBUS if !EXPERT 71 select CARDBUS if !EXPERT
72 select PCCARD_NONSTATIC if PCMCIA != n && ISA 72 select PCCARD_NONSTATIC if PCMCIA != n
73 select PCCARD_PCI if PCMCIA !=n && !ISA
74 ---help--- 73 ---help---
75 This option enables support for CardBus host bridges. Virtually 74 This option enables support for CardBus host bridges. Virtually
76 all modern PCMCIA bridges are CardBus compatible. A "bridge" is 75 all modern PCMCIA bridges are CardBus compatible. A "bridge" is
@@ -110,8 +109,7 @@ config YENTA_TOSHIBA
110config PD6729 109config PD6729
111 tristate "Cirrus PD6729 compatible bridge support" 110 tristate "Cirrus PD6729 compatible bridge support"
112 depends on PCMCIA && PCI 111 depends on PCMCIA && PCI
113 select PCCARD_NONSTATIC if PCMCIA != n && ISA 112 select PCCARD_NONSTATIC
114 select PCCARD_PCI if PCMCIA !=n && !ISA
115 help 113 help
116 This provides support for the Cirrus PD6729 PCI-to-PCMCIA bridge 114 This provides support for the Cirrus PD6729 PCI-to-PCMCIA bridge
117 device, found in some older laptops and PCMCIA card readers. 115 device, found in some older laptops and PCMCIA card readers.
@@ -119,8 +117,7 @@ config PD6729
119config I82092 117config I82092
120 tristate "i82092 compatible bridge support" 118 tristate "i82092 compatible bridge support"
121 depends on PCMCIA && PCI 119 depends on PCMCIA && PCI
122 select PCCARD_NONSTATIC if PCMCIA != n && ISA 120 select PCCARD_NONSTATIC
123 select PCCARD_PCI if PCMCIA !=n && !ISA
124 help 121 help
125 This provides support for the Intel I82092AA PCI-to-PCMCIA bridge device, 122 This provides support for the Intel I82092AA PCI-to-PCMCIA bridge device,
126 found in some older laptops and more commonly in evaluation boards for the 123 found in some older laptops and more commonly in evaluation boards for the
@@ -291,9 +288,6 @@ config ELECTRA_CF
291 Say Y here to support the CompactFlash controller on the 288 Say Y here to support the CompactFlash controller on the
292 PA Semi Electra eval board. 289 PA Semi Electra eval board.
293 290
294config PCCARD_PCI
295 bool
296
297config PCCARD_NONSTATIC 291config PCCARD_NONSTATIC
298 bool 292 bool
299 293
diff --git a/drivers/pcmcia/Makefile b/drivers/pcmcia/Makefile
index f1a7ca04d89e..27e94b30cf96 100644
--- a/drivers/pcmcia/Makefile
+++ b/drivers/pcmcia/Makefile
@@ -12,7 +12,6 @@ obj-$(CONFIG_PCMCIA) += pcmcia.o
12pcmcia_rsrc-y += rsrc_mgr.o 12pcmcia_rsrc-y += rsrc_mgr.o
13pcmcia_rsrc-$(CONFIG_PCCARD_NONSTATIC) += rsrc_nonstatic.o 13pcmcia_rsrc-$(CONFIG_PCCARD_NONSTATIC) += rsrc_nonstatic.o
14pcmcia_rsrc-$(CONFIG_PCCARD_IODYN) += rsrc_iodyn.o 14pcmcia_rsrc-$(CONFIG_PCCARD_IODYN) += rsrc_iodyn.o
15pcmcia_rsrc-$(CONFIG_PCCARD_PCI) += rsrc_pci.o
16obj-$(CONFIG_PCCARD) += pcmcia_rsrc.o 15obj-$(CONFIG_PCCARD) += pcmcia_rsrc.o
17 16
18 17
diff --git a/drivers/pcmcia/rsrc_pci.c b/drivers/pcmcia/rsrc_pci.c
deleted file mode 100644
index 1f67b3ba70fb..000000000000
--- a/drivers/pcmcia/rsrc_pci.c
+++ /dev/null
@@ -1,173 +0,0 @@
1#include <linux/slab.h>
2#include <linux/module.h>
3#include <linux/kernel.h>
4#include <linux/pci.h>
5
6#include <pcmcia/ss.h>
7#include <pcmcia/cistpl.h>
8#include "cs_internal.h"
9
10
11struct pcmcia_align_data {
12 unsigned long mask;
13 unsigned long offset;
14};
15
16static resource_size_t pcmcia_align(void *align_data,
17 const struct resource *res,
18 resource_size_t size, resource_size_t align)
19{
20 struct pcmcia_align_data *data = align_data;
21 resource_size_t start;
22
23 start = (res->start & ~data->mask) + data->offset;
24 if (start < res->start)
25 start += data->mask + 1;
26 return start;
27}
28
29static struct resource *find_io_region(struct pcmcia_socket *s,
30 unsigned long base, int num,
31 unsigned long align)
32{
33 struct resource *res = pcmcia_make_resource(0, num, IORESOURCE_IO,
34 dev_name(&s->dev));
35 struct pcmcia_align_data data;
36 int ret;
37
38 data.mask = align - 1;
39 data.offset = base & data.mask;
40
41 ret = pci_bus_alloc_resource(s->cb_dev->bus, res, num, 1,
42 base, 0, pcmcia_align, &data);
43 if (ret != 0) {
44 kfree(res);
45 res = NULL;
46 }
47 return res;
48}
49
50static int res_pci_find_io(struct pcmcia_socket *s, unsigned int attr,
51 unsigned int *base, unsigned int num,
52 unsigned int align, struct resource **parent)
53{
54 int i, ret = 0;
55
56 /* Check for an already-allocated window that must conflict with
57 * what was asked for. It is a hack because it does not catch all
58 * potential conflicts, just the most obvious ones.
59 */
60 for (i = 0; i < MAX_IO_WIN; i++) {
61 if (!s->io[i].res)
62 continue;
63
64 if (!*base)
65 continue;
66
67 if ((s->io[i].res->start & (align-1)) == *base)
68 return -EBUSY;
69 }
70
71 for (i = 0; i < MAX_IO_WIN; i++) {
72 struct resource *res = s->io[i].res;
73 unsigned int try;
74
75 if (res && (res->flags & IORESOURCE_BITS) !=
76 (attr & IORESOURCE_BITS))
77 continue;
78
79 if (!res) {
80 if (align == 0)
81 align = 0x10000;
82
83 res = s->io[i].res = find_io_region(s, *base, num,
84 align);
85 if (!res)
86 return -EINVAL;
87
88 *base = res->start;
89 s->io[i].res->flags =
90 ((res->flags & ~IORESOURCE_BITS) |
91 (attr & IORESOURCE_BITS));
92 s->io[i].InUse = num;
93 *parent = res;
94 return 0;
95 }
96
97 /* Try to extend top of window */
98 try = res->end + 1;
99 if ((*base == 0) || (*base == try)) {
100 ret = adjust_resource(s->io[i].res, res->start,
101 resource_size(res) + num);
102 if (ret)
103 continue;
104 *base = try;
105 s->io[i].InUse += num;
106 *parent = res;
107 return 0;
108 }
109
110 /* Try to extend bottom of window */
111 try = res->start - num;
112 if ((*base == 0) || (*base == try)) {
113 ret = adjust_resource(s->io[i].res,
114 res->start - num,
115 resource_size(res) + num);
116 if (ret)
117 continue;
118 *base = try;
119 s->io[i].InUse += num;
120 *parent = res;
121 return 0;
122 }
123 }
124 return -EINVAL;
125}
126
127static struct resource *res_pci_find_mem(u_long base, u_long num,
128 u_long align, int low, struct pcmcia_socket *s)
129{
130 struct resource *res = pcmcia_make_resource(0, num, IORESOURCE_MEM,
131 dev_name(&s->dev));
132 struct pcmcia_align_data data;
133 unsigned long min;
134 int ret;
135
136 if (align < 0x20000)
137 align = 0x20000;
138 data.mask = align - 1;
139 data.offset = base & data.mask;
140
141 min = 0;
142 if (!low)
143 min = 0x100000UL;
144
145 ret = pci_bus_alloc_resource(s->cb_dev->bus,
146 res, num, 1, min, 0,
147 pcmcia_align, &data);
148
149 if (ret != 0) {
150 kfree(res);
151 res = NULL;
152 }
153 return res;
154}
155
156
157static int res_pci_init(struct pcmcia_socket *s)
158{
159 if (!s->cb_dev || !(s->features & SS_CAP_PAGE_REGS)) {
160 dev_err(&s->dev, "not supported by res_pci\n");
161 return -EOPNOTSUPP;
162 }
163 return 0;
164}
165
166struct pccard_resource_ops pccard_nonstatic_ops = {
167 .validate_mem = NULL,
168 .find_io = res_pci_find_io,
169 .find_mem = res_pci_find_mem,
170 .init = res_pci_init,
171 .exit = NULL,
172};
173EXPORT_SYMBOL(pccard_nonstatic_ops);
diff --git a/drivers/phy/phy-armada375-usb2.c b/drivers/phy/phy-armada375-usb2.c
index 7c99ca256f05..8ccc3952c13d 100644
--- a/drivers/phy/phy-armada375-usb2.c
+++ b/drivers/phy/phy-armada375-usb2.c
@@ -37,7 +37,7 @@ static int armada375_usb_phy_init(struct phy *phy)
37 struct armada375_cluster_phy *cluster_phy; 37 struct armada375_cluster_phy *cluster_phy;
38 u32 reg; 38 u32 reg;
39 39
40 cluster_phy = dev_get_drvdata(phy->dev.parent); 40 cluster_phy = phy_get_drvdata(phy);
41 if (!cluster_phy) 41 if (!cluster_phy)
42 return -ENODEV; 42 return -ENODEV;
43 43
@@ -131,6 +131,7 @@ static int armada375_usb_phy_probe(struct platform_device *pdev)
131 cluster_phy->reg = usb_cluster_base; 131 cluster_phy->reg = usb_cluster_base;
132 132
133 dev_set_drvdata(dev, cluster_phy); 133 dev_set_drvdata(dev, cluster_phy);
134 phy_set_drvdata(phy, cluster_phy);
134 135
135 phy_provider = devm_of_phy_provider_register(&pdev->dev, 136 phy_provider = devm_of_phy_provider_register(&pdev->dev,
136 armada375_usb_phy_xlate); 137 armada375_usb_phy_xlate);
diff --git a/drivers/phy/phy-core.c b/drivers/phy/phy-core.c
index a12d35338313..3791838f4bd4 100644
--- a/drivers/phy/phy-core.c
+++ b/drivers/phy/phy-core.c
@@ -52,7 +52,9 @@ static void devm_phy_consume(struct device *dev, void *res)
52 52
53static int devm_phy_match(struct device *dev, void *res, void *match_data) 53static int devm_phy_match(struct device *dev, void *res, void *match_data)
54{ 54{
55 return res == match_data; 55 struct phy **phy = res;
56
57 return *phy == match_data;
56} 58}
57 59
58/** 60/**
@@ -223,6 +225,7 @@ int phy_init(struct phy *phy)
223 ret = phy_pm_runtime_get_sync(phy); 225 ret = phy_pm_runtime_get_sync(phy);
224 if (ret < 0 && ret != -ENOTSUPP) 226 if (ret < 0 && ret != -ENOTSUPP)
225 return ret; 227 return ret;
228 ret = 0; /* Override possible ret == -ENOTSUPP */
226 229
227 mutex_lock(&phy->mutex); 230 mutex_lock(&phy->mutex);
228 if (phy->init_count == 0 && phy->ops->init) { 231 if (phy->init_count == 0 && phy->ops->init) {
@@ -231,8 +234,6 @@ int phy_init(struct phy *phy)
231 dev_err(&phy->dev, "phy init failed --> %d\n", ret); 234 dev_err(&phy->dev, "phy init failed --> %d\n", ret);
232 goto out; 235 goto out;
233 } 236 }
234 } else {
235 ret = 0; /* Override possible ret == -ENOTSUPP */
236 } 237 }
237 ++phy->init_count; 238 ++phy->init_count;
238 239
@@ -253,6 +254,7 @@ int phy_exit(struct phy *phy)
253 ret = phy_pm_runtime_get_sync(phy); 254 ret = phy_pm_runtime_get_sync(phy);
254 if (ret < 0 && ret != -ENOTSUPP) 255 if (ret < 0 && ret != -ENOTSUPP)
255 return ret; 256 return ret;
257 ret = 0; /* Override possible ret == -ENOTSUPP */
256 258
257 mutex_lock(&phy->mutex); 259 mutex_lock(&phy->mutex);
258 if (phy->init_count == 1 && phy->ops->exit) { 260 if (phy->init_count == 1 && phy->ops->exit) {
@@ -287,6 +289,7 @@ int phy_power_on(struct phy *phy)
287 ret = phy_pm_runtime_get_sync(phy); 289 ret = phy_pm_runtime_get_sync(phy);
288 if (ret < 0 && ret != -ENOTSUPP) 290 if (ret < 0 && ret != -ENOTSUPP)
289 return ret; 291 return ret;
292 ret = 0; /* Override possible ret == -ENOTSUPP */
290 293
291 mutex_lock(&phy->mutex); 294 mutex_lock(&phy->mutex);
292 if (phy->power_count == 0 && phy->ops->power_on) { 295 if (phy->power_count == 0 && phy->ops->power_on) {
@@ -295,8 +298,6 @@ int phy_power_on(struct phy *phy)
295 dev_err(&phy->dev, "phy poweron failed --> %d\n", ret); 298 dev_err(&phy->dev, "phy poweron failed --> %d\n", ret);
296 goto out; 299 goto out;
297 } 300 }
298 } else {
299 ret = 0; /* Override possible ret == -ENOTSUPP */
300 } 301 }
301 ++phy->power_count; 302 ++phy->power_count;
302 mutex_unlock(&phy->mutex); 303 mutex_unlock(&phy->mutex);
diff --git a/drivers/phy/phy-exynos-dp-video.c b/drivers/phy/phy-exynos-dp-video.c
index f86cbe68ddaf..179cbf9451aa 100644
--- a/drivers/phy/phy-exynos-dp-video.c
+++ b/drivers/phy/phy-exynos-dp-video.c
@@ -30,28 +30,13 @@ struct exynos_dp_video_phy {
30 const struct exynos_dp_video_phy_drvdata *drvdata; 30 const struct exynos_dp_video_phy_drvdata *drvdata;
31}; 31};
32 32
33static void exynos_dp_video_phy_pwr_isol(struct exynos_dp_video_phy *state,
34 unsigned int on)
35{
36 unsigned int val;
37
38 if (IS_ERR(state->regs))
39 return;
40
41 val = on ? 0 : EXYNOS5_PHY_ENABLE;
42
43 regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset,
44 EXYNOS5_PHY_ENABLE, val);
45}
46
47static int exynos_dp_video_phy_power_on(struct phy *phy) 33static int exynos_dp_video_phy_power_on(struct phy *phy)
48{ 34{
49 struct exynos_dp_video_phy *state = phy_get_drvdata(phy); 35 struct exynos_dp_video_phy *state = phy_get_drvdata(phy);
50 36
51 /* Disable power isolation on DP-PHY */ 37 /* Disable power isolation on DP-PHY */
52 exynos_dp_video_phy_pwr_isol(state, 0); 38 return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset,
53 39 EXYNOS5_PHY_ENABLE, EXYNOS5_PHY_ENABLE);
54 return 0;
55} 40}
56 41
57static int exynos_dp_video_phy_power_off(struct phy *phy) 42static int exynos_dp_video_phy_power_off(struct phy *phy)
@@ -59,9 +44,8 @@ static int exynos_dp_video_phy_power_off(struct phy *phy)
59 struct exynos_dp_video_phy *state = phy_get_drvdata(phy); 44 struct exynos_dp_video_phy *state = phy_get_drvdata(phy);
60 45
61 /* Enable power isolation on DP-PHY */ 46 /* Enable power isolation on DP-PHY */
62 exynos_dp_video_phy_pwr_isol(state, 1); 47 return regmap_update_bits(state->regs, state->drvdata->phy_ctrl_offset,
63 48 EXYNOS5_PHY_ENABLE, 0);
64 return 0;
65} 49}
66 50
67static struct phy_ops exynos_dp_video_phy_ops = { 51static struct phy_ops exynos_dp_video_phy_ops = {
diff --git a/drivers/phy/phy-exynos-mipi-video.c b/drivers/phy/phy-exynos-mipi-video.c
index f017b2f2a54e..df7519a39ba0 100644
--- a/drivers/phy/phy-exynos-mipi-video.c
+++ b/drivers/phy/phy-exynos-mipi-video.c
@@ -43,7 +43,6 @@ struct exynos_mipi_video_phy {
43 } phys[EXYNOS_MIPI_PHYS_NUM]; 43 } phys[EXYNOS_MIPI_PHYS_NUM];
44 spinlock_t slock; 44 spinlock_t slock;
45 void __iomem *regs; 45 void __iomem *regs;
46 struct mutex mutex;
47 struct regmap *regmap; 46 struct regmap *regmap;
48}; 47};
49 48
@@ -59,8 +58,9 @@ static int __set_phy_state(struct exynos_mipi_video_phy *state,
59 else 58 else
60 reset = EXYNOS4_MIPI_PHY_SRESETN; 59 reset = EXYNOS4_MIPI_PHY_SRESETN;
61 60
62 if (state->regmap) { 61 spin_lock(&state->slock);
63 mutex_lock(&state->mutex); 62
63 if (!IS_ERR(state->regmap)) {
64 regmap_read(state->regmap, offset, &val); 64 regmap_read(state->regmap, offset, &val);
65 if (on) 65 if (on)
66 val |= reset; 66 val |= reset;
@@ -72,11 +72,9 @@ static int __set_phy_state(struct exynos_mipi_video_phy *state,
72 else if (!(val & EXYNOS4_MIPI_PHY_RESET_MASK)) 72 else if (!(val & EXYNOS4_MIPI_PHY_RESET_MASK))
73 val &= ~EXYNOS4_MIPI_PHY_ENABLE; 73 val &= ~EXYNOS4_MIPI_PHY_ENABLE;
74 regmap_write(state->regmap, offset, val); 74 regmap_write(state->regmap, offset, val);
75 mutex_unlock(&state->mutex);
76 } else { 75 } else {
77 addr = state->regs + EXYNOS_MIPI_PHY_CONTROL(id / 2); 76 addr = state->regs + EXYNOS_MIPI_PHY_CONTROL(id / 2);
78 77
79 spin_lock(&state->slock);
80 val = readl(addr); 78 val = readl(addr);
81 if (on) 79 if (on)
82 val |= reset; 80 val |= reset;
@@ -90,9 +88,9 @@ static int __set_phy_state(struct exynos_mipi_video_phy *state,
90 val &= ~EXYNOS4_MIPI_PHY_ENABLE; 88 val &= ~EXYNOS4_MIPI_PHY_ENABLE;
91 89
92 writel(val, addr); 90 writel(val, addr);
93 spin_unlock(&state->slock);
94 } 91 }
95 92
93 spin_unlock(&state->slock);
96 return 0; 94 return 0;
97} 95}
98 96
@@ -158,7 +156,6 @@ static int exynos_mipi_video_phy_probe(struct platform_device *pdev)
158 156
159 dev_set_drvdata(dev, state); 157 dev_set_drvdata(dev, state);
160 spin_lock_init(&state->slock); 158 spin_lock_init(&state->slock);
161 mutex_init(&state->mutex);
162 159
163 for (i = 0; i < EXYNOS_MIPI_PHYS_NUM; i++) { 160 for (i = 0; i < EXYNOS_MIPI_PHYS_NUM; i++) {
164 struct phy *phy = devm_phy_create(dev, NULL, 161 struct phy *phy = devm_phy_create(dev, NULL,
diff --git a/drivers/phy/phy-exynos4210-usb2.c b/drivers/phy/phy-exynos4210-usb2.c
index 236a52ad94eb..f30bbb0fb3b2 100644
--- a/drivers/phy/phy-exynos4210-usb2.c
+++ b/drivers/phy/phy-exynos4210-usb2.c
@@ -250,7 +250,6 @@ static const struct samsung_usb2_common_phy exynos4210_phys[] = {
250 .power_on = exynos4210_power_on, 250 .power_on = exynos4210_power_on,
251 .power_off = exynos4210_power_off, 251 .power_off = exynos4210_power_off,
252 }, 252 },
253 {},
254}; 253};
255 254
256const struct samsung_usb2_phy_config exynos4210_usb2_phy_config = { 255const struct samsung_usb2_phy_config exynos4210_usb2_phy_config = {
diff --git a/drivers/phy/phy-exynos4x12-usb2.c b/drivers/phy/phy-exynos4x12-usb2.c
index 0b9de88579b1..765da90a536f 100644
--- a/drivers/phy/phy-exynos4x12-usb2.c
+++ b/drivers/phy/phy-exynos4x12-usb2.c
@@ -361,7 +361,6 @@ static const struct samsung_usb2_common_phy exynos4x12_phys[] = {
361 .power_on = exynos4x12_power_on, 361 .power_on = exynos4x12_power_on,
362 .power_off = exynos4x12_power_off, 362 .power_off = exynos4x12_power_off,
363 }, 363 },
364 {},
365}; 364};
366 365
367const struct samsung_usb2_phy_config exynos3250_usb2_phy_config = { 366const struct samsung_usb2_phy_config exynos3250_usb2_phy_config = {
diff --git a/drivers/phy/phy-exynos5-usbdrd.c b/drivers/phy/phy-exynos5-usbdrd.c
index 04374018425f..e2a0be750ad9 100644
--- a/drivers/phy/phy-exynos5-usbdrd.c
+++ b/drivers/phy/phy-exynos5-usbdrd.c
@@ -531,7 +531,7 @@ static struct phy *exynos5_usbdrd_phy_xlate(struct device *dev,
531{ 531{
532 struct exynos5_usbdrd_phy *phy_drd = dev_get_drvdata(dev); 532 struct exynos5_usbdrd_phy *phy_drd = dev_get_drvdata(dev);
533 533
534 if (WARN_ON(args->args[0] > EXYNOS5_DRDPHYS_NUM)) 534 if (WARN_ON(args->args[0] >= EXYNOS5_DRDPHYS_NUM))
535 return ERR_PTR(-ENODEV); 535 return ERR_PTR(-ENODEV);
536 536
537 return phy_drd->phys[args->args[0]].phy; 537 return phy_drd->phys[args->args[0]].phy;
diff --git a/drivers/phy/phy-exynos5250-usb2.c b/drivers/phy/phy-exynos5250-usb2.c
index 1c139aa0d074..2ed1735a076a 100644
--- a/drivers/phy/phy-exynos5250-usb2.c
+++ b/drivers/phy/phy-exynos5250-usb2.c
@@ -391,7 +391,6 @@ static const struct samsung_usb2_common_phy exynos5250_phys[] = {
391 .power_on = exynos5250_power_on, 391 .power_on = exynos5250_power_on,
392 .power_off = exynos5250_power_off, 392 .power_off = exynos5250_power_off,
393 }, 393 },
394 {},
395}; 394};
396 395
397const struct samsung_usb2_phy_config exynos5250_usb2_phy_config = { 396const struct samsung_usb2_phy_config exynos5250_usb2_phy_config = {
diff --git a/drivers/phy/phy-hix5hd2-sata.c b/drivers/phy/phy-hix5hd2-sata.c
index 34915b4202f1..d6b22659cac1 100644
--- a/drivers/phy/phy-hix5hd2-sata.c
+++ b/drivers/phy/phy-hix5hd2-sata.c
@@ -147,6 +147,9 @@ static int hix5hd2_sata_phy_probe(struct platform_device *pdev)
147 return -ENOMEM; 147 return -ENOMEM;
148 148
149 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 149 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
150 if (!res)
151 return -EINVAL;
152
150 priv->base = devm_ioremap(dev, res->start, resource_size(res)); 153 priv->base = devm_ioremap(dev, res->start, resource_size(res));
151 if (!priv->base) 154 if (!priv->base)
152 return -ENOMEM; 155 return -ENOMEM;
diff --git a/drivers/phy/phy-miphy28lp.c b/drivers/phy/phy-miphy28lp.c
index 9b2848e6115d..933435214acc 100644
--- a/drivers/phy/phy-miphy28lp.c
+++ b/drivers/phy/phy-miphy28lp.c
@@ -228,6 +228,7 @@ struct miphy28lp_dev {
228 struct regmap *regmap; 228 struct regmap *regmap;
229 struct mutex miphy_mutex; 229 struct mutex miphy_mutex;
230 struct miphy28lp_phy **phys; 230 struct miphy28lp_phy **phys;
231 int nphys;
231}; 232};
232 233
233struct miphy_initval { 234struct miphy_initval {
@@ -1116,7 +1117,7 @@ static struct phy *miphy28lp_xlate(struct device *dev,
1116 return ERR_PTR(-EINVAL); 1117 return ERR_PTR(-EINVAL);
1117 } 1118 }
1118 1119
1119 for (index = 0; index < of_get_child_count(dev->of_node); index++) 1120 for (index = 0; index < miphy_dev->nphys; index++)
1120 if (phynode == miphy_dev->phys[index]->phy->dev.of_node) { 1121 if (phynode == miphy_dev->phys[index]->phy->dev.of_node) {
1121 miphy_phy = miphy_dev->phys[index]; 1122 miphy_phy = miphy_dev->phys[index];
1122 break; 1123 break;
@@ -1138,6 +1139,7 @@ static struct phy *miphy28lp_xlate(struct device *dev,
1138 1139
1139static struct phy_ops miphy28lp_ops = { 1140static struct phy_ops miphy28lp_ops = {
1140 .init = miphy28lp_init, 1141 .init = miphy28lp_init,
1142 .owner = THIS_MODULE,
1141}; 1143};
1142 1144
1143static int miphy28lp_probe_resets(struct device_node *node, 1145static int miphy28lp_probe_resets(struct device_node *node,
@@ -1200,16 +1202,15 @@ static int miphy28lp_probe(struct platform_device *pdev)
1200 struct miphy28lp_dev *miphy_dev; 1202 struct miphy28lp_dev *miphy_dev;
1201 struct phy_provider *provider; 1203 struct phy_provider *provider;
1202 struct phy *phy; 1204 struct phy *phy;
1203 int chancount, port = 0; 1205 int ret, port = 0;
1204 int ret;
1205 1206
1206 miphy_dev = devm_kzalloc(&pdev->dev, sizeof(*miphy_dev), GFP_KERNEL); 1207 miphy_dev = devm_kzalloc(&pdev->dev, sizeof(*miphy_dev), GFP_KERNEL);
1207 if (!miphy_dev) 1208 if (!miphy_dev)
1208 return -ENOMEM; 1209 return -ENOMEM;
1209 1210
1210 chancount = of_get_child_count(np); 1211 miphy_dev->nphys = of_get_child_count(np);
1211 miphy_dev->phys = devm_kzalloc(&pdev->dev, sizeof(phy) * chancount, 1212 miphy_dev->phys = devm_kcalloc(&pdev->dev, miphy_dev->nphys,
1212 GFP_KERNEL); 1213 sizeof(*miphy_dev->phys), GFP_KERNEL);
1213 if (!miphy_dev->phys) 1214 if (!miphy_dev->phys)
1214 return -ENOMEM; 1215 return -ENOMEM;
1215 1216
diff --git a/drivers/phy/phy-miphy365x.c b/drivers/phy/phy-miphy365x.c
index 6c80154e8bff..51b459db9137 100644
--- a/drivers/phy/phy-miphy365x.c
+++ b/drivers/phy/phy-miphy365x.c
@@ -150,6 +150,7 @@ struct miphy365x_dev {
150 struct regmap *regmap; 150 struct regmap *regmap;
151 struct mutex miphy_mutex; 151 struct mutex miphy_mutex;
152 struct miphy365x_phy **phys; 152 struct miphy365x_phy **phys;
153 int nphys;
153}; 154};
154 155
155/* 156/*
@@ -485,7 +486,7 @@ static struct phy *miphy365x_xlate(struct device *dev,
485 return ERR_PTR(-EINVAL); 486 return ERR_PTR(-EINVAL);
486 } 487 }
487 488
488 for (index = 0; index < of_get_child_count(dev->of_node); index++) 489 for (index = 0; index < miphy_dev->nphys; index++)
489 if (phynode == miphy_dev->phys[index]->phy->dev.of_node) { 490 if (phynode == miphy_dev->phys[index]->phy->dev.of_node) {
490 miphy_phy = miphy_dev->phys[index]; 491 miphy_phy = miphy_dev->phys[index];
491 break; 492 break;
@@ -541,16 +542,15 @@ static int miphy365x_probe(struct platform_device *pdev)
541 struct miphy365x_dev *miphy_dev; 542 struct miphy365x_dev *miphy_dev;
542 struct phy_provider *provider; 543 struct phy_provider *provider;
543 struct phy *phy; 544 struct phy *phy;
544 int chancount, port = 0; 545 int ret, port = 0;
545 int ret;
546 546
547 miphy_dev = devm_kzalloc(&pdev->dev, sizeof(*miphy_dev), GFP_KERNEL); 547 miphy_dev = devm_kzalloc(&pdev->dev, sizeof(*miphy_dev), GFP_KERNEL);
548 if (!miphy_dev) 548 if (!miphy_dev)
549 return -ENOMEM; 549 return -ENOMEM;
550 550
551 chancount = of_get_child_count(np); 551 miphy_dev->nphys = of_get_child_count(np);
552 miphy_dev->phys = devm_kzalloc(&pdev->dev, sizeof(phy) * chancount, 552 miphy_dev->phys = devm_kcalloc(&pdev->dev, miphy_dev->nphys,
553 GFP_KERNEL); 553 sizeof(*miphy_dev->phys), GFP_KERNEL);
554 if (!miphy_dev->phys) 554 if (!miphy_dev->phys)
555 return -ENOMEM; 555 return -ENOMEM;
556 556
diff --git a/drivers/phy/phy-omap-control.c b/drivers/phy/phy-omap-control.c
index efe724f97e02..93252e053a31 100644
--- a/drivers/phy/phy-omap-control.c
+++ b/drivers/phy/phy-omap-control.c
@@ -360,7 +360,7 @@ static void __exit omap_control_phy_exit(void)
360} 360}
361module_exit(omap_control_phy_exit); 361module_exit(omap_control_phy_exit);
362 362
363MODULE_ALIAS("platform: omap_control_phy"); 363MODULE_ALIAS("platform:omap_control_phy");
364MODULE_AUTHOR("Texas Instruments Inc."); 364MODULE_AUTHOR("Texas Instruments Inc.");
365MODULE_DESCRIPTION("OMAP Control Module PHY Driver"); 365MODULE_DESCRIPTION("OMAP Control Module PHY Driver");
366MODULE_LICENSE("GPL v2"); 366MODULE_LICENSE("GPL v2");
diff --git a/drivers/phy/phy-omap-usb2.c b/drivers/phy/phy-omap-usb2.c
index 6f4aef3db248..4757e765696a 100644
--- a/drivers/phy/phy-omap-usb2.c
+++ b/drivers/phy/phy-omap-usb2.c
@@ -296,10 +296,11 @@ static int omap_usb2_probe(struct platform_device *pdev)
296 dev_warn(&pdev->dev, 296 dev_warn(&pdev->dev,
297 "found usb_otg_ss_refclk960m, please fix DTS\n"); 297 "found usb_otg_ss_refclk960m, please fix DTS\n");
298 } 298 }
299 } else {
300 clk_prepare(phy->optclk);
301 } 299 }
302 300
301 if (!IS_ERR(phy->optclk))
302 clk_prepare(phy->optclk);
303
303 usb_add_phy_dev(&phy->phy); 304 usb_add_phy_dev(&phy->phy);
304 305
305 return 0; 306 return 0;
@@ -383,7 +384,7 @@ static struct platform_driver omap_usb2_driver = {
383 384
384module_platform_driver(omap_usb2_driver); 385module_platform_driver(omap_usb2_driver);
385 386
386MODULE_ALIAS("platform: omap_usb2"); 387MODULE_ALIAS("platform:omap_usb2");
387MODULE_AUTHOR("Texas Instruments Inc."); 388MODULE_AUTHOR("Texas Instruments Inc.");
388MODULE_DESCRIPTION("OMAP USB2 phy driver"); 389MODULE_DESCRIPTION("OMAP USB2 phy driver");
389MODULE_LICENSE("GPL v2"); 390MODULE_LICENSE("GPL v2");
diff --git a/drivers/phy/phy-rockchip-usb.c b/drivers/phy/phy-rockchip-usb.c
index 22011c3b6a4b..7d4c33643768 100644
--- a/drivers/phy/phy-rockchip-usb.c
+++ b/drivers/phy/phy-rockchip-usb.c
@@ -61,8 +61,6 @@ static int rockchip_usb_phy_power_off(struct phy *_phy)
61 return ret; 61 return ret;
62 62
63 clk_disable_unprepare(phy->clk); 63 clk_disable_unprepare(phy->clk);
64 if (ret)
65 return ret;
66 64
67 return 0; 65 return 0;
68} 66}
@@ -78,8 +76,10 @@ static int rockchip_usb_phy_power_on(struct phy *_phy)
78 76
79 /* Power up usb phy analog blocks by set siddq 0 */ 77 /* Power up usb phy analog blocks by set siddq 0 */
80 ret = rockchip_usb_phy_power(phy, 0); 78 ret = rockchip_usb_phy_power(phy, 0);
81 if (ret) 79 if (ret) {
80 clk_disable_unprepare(phy->clk);
82 return ret; 81 return ret;
82 }
83 83
84 return 0; 84 return 0;
85} 85}
diff --git a/drivers/phy/phy-ti-pipe3.c b/drivers/phy/phy-ti-pipe3.c
index 95c88f929f27..2ba610b72ca2 100644
--- a/drivers/phy/phy-ti-pipe3.c
+++ b/drivers/phy/phy-ti-pipe3.c
@@ -165,15 +165,11 @@ static int ti_pipe3_dpll_wait_lock(struct ti_pipe3 *phy)
165 cpu_relax(); 165 cpu_relax();
166 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS); 166 val = ti_pipe3_readl(phy->pll_ctrl_base, PLL_STATUS);
167 if (val & PLL_LOCK) 167 if (val & PLL_LOCK)
168 break; 168 return 0;
169 } while (!time_after(jiffies, timeout)); 169 } while (!time_after(jiffies, timeout));
170 170
171 if (!(val & PLL_LOCK)) { 171 dev_err(phy->dev, "DPLL failed to lock\n");
172 dev_err(phy->dev, "DPLL failed to lock\n"); 172 return -EBUSY;
173 return -EBUSY;
174 }
175
176 return 0;
177} 173}
178 174
179static int ti_pipe3_dpll_program(struct ti_pipe3 *phy) 175static int ti_pipe3_dpll_program(struct ti_pipe3 *phy)
@@ -608,7 +604,7 @@ static struct platform_driver ti_pipe3_driver = {
608 604
609module_platform_driver(ti_pipe3_driver); 605module_platform_driver(ti_pipe3_driver);
610 606
611MODULE_ALIAS("platform: ti_pipe3"); 607MODULE_ALIAS("platform:ti_pipe3");
612MODULE_AUTHOR("Texas Instruments Inc."); 608MODULE_AUTHOR("Texas Instruments Inc.");
613MODULE_DESCRIPTION("TI PIPE3 phy driver"); 609MODULE_DESCRIPTION("TI PIPE3 phy driver");
614MODULE_LICENSE("GPL v2"); 610MODULE_LICENSE("GPL v2");
diff --git a/drivers/phy/phy-twl4030-usb.c b/drivers/phy/phy-twl4030-usb.c
index 8e87f54671f3..bc42d6a8939f 100644
--- a/drivers/phy/phy-twl4030-usb.c
+++ b/drivers/phy/phy-twl4030-usb.c
@@ -666,7 +666,6 @@ static int twl4030_usb_probe(struct platform_device *pdev)
666 twl->dev = &pdev->dev; 666 twl->dev = &pdev->dev;
667 twl->irq = platform_get_irq(pdev, 0); 667 twl->irq = platform_get_irq(pdev, 0);
668 twl->vbus_supplied = false; 668 twl->vbus_supplied = false;
669 twl->linkstat = -EINVAL;
670 twl->linkstat = OMAP_MUSB_UNKNOWN; 669 twl->linkstat = OMAP_MUSB_UNKNOWN;
671 670
672 twl->phy.dev = twl->dev; 671 twl->phy.dev = twl->dev;
diff --git a/drivers/phy/phy-xgene.c b/drivers/phy/phy-xgene.c
index 29214a36ea28..2263cd010032 100644
--- a/drivers/phy/phy-xgene.c
+++ b/drivers/phy/phy-xgene.c
@@ -1704,7 +1704,6 @@ static int xgene_phy_probe(struct platform_device *pdev)
1704 for (i = 0; i < MAX_LANE; i++) 1704 for (i = 0; i < MAX_LANE; i++)
1705 ctx->sata_param.speed[i] = 2; /* Default to Gen3 */ 1705 ctx->sata_param.speed[i] = 2; /* Default to Gen3 */
1706 1706
1707 ctx->dev = &pdev->dev;
1708 platform_set_drvdata(pdev, ctx); 1707 platform_set_drvdata(pdev, ctx);
1709 1708
1710 ctx->phy = devm_phy_create(ctx->dev, NULL, &xgene_phy_ops); 1709 ctx->phy = devm_phy_create(ctx->dev, NULL, &xgene_phy_ops);
diff --git a/drivers/pinctrl/intel/pinctrl-baytrail.c b/drivers/pinctrl/intel/pinctrl-baytrail.c
index 5afe03e28b91..2062c224e32f 100644
--- a/drivers/pinctrl/intel/pinctrl-baytrail.c
+++ b/drivers/pinctrl/intel/pinctrl-baytrail.c
@@ -66,6 +66,10 @@
66#define BYT_DIR_MASK (BIT(1) | BIT(2)) 66#define BYT_DIR_MASK (BIT(1) | BIT(2))
67#define BYT_TRIG_MASK (BIT(26) | BIT(25) | BIT(24)) 67#define BYT_TRIG_MASK (BIT(26) | BIT(25) | BIT(24))
68 68
69#define BYT_CONF0_RESTORE_MASK (BYT_DIRECT_IRQ_EN | BYT_TRIG_MASK | \
70 BYT_PIN_MUX)
71#define BYT_VAL_RESTORE_MASK (BYT_DIR_MASK | BYT_LEVEL)
72
69#define BYT_NGPIO_SCORE 102 73#define BYT_NGPIO_SCORE 102
70#define BYT_NGPIO_NCORE 28 74#define BYT_NGPIO_NCORE 28
71#define BYT_NGPIO_SUS 44 75#define BYT_NGPIO_SUS 44
@@ -134,12 +138,18 @@ static struct pinctrl_gpio_range byt_ranges[] = {
134 }, 138 },
135}; 139};
136 140
141struct byt_gpio_pin_context {
142 u32 conf0;
143 u32 val;
144};
145
137struct byt_gpio { 146struct byt_gpio {
138 struct gpio_chip chip; 147 struct gpio_chip chip;
139 struct platform_device *pdev; 148 struct platform_device *pdev;
140 spinlock_t lock; 149 spinlock_t lock;
141 void __iomem *reg_base; 150 void __iomem *reg_base;
142 struct pinctrl_gpio_range *range; 151 struct pinctrl_gpio_range *range;
152 struct byt_gpio_pin_context *saved_context;
143}; 153};
144 154
145#define to_byt_gpio(c) container_of(c, struct byt_gpio, chip) 155#define to_byt_gpio(c) container_of(c, struct byt_gpio, chip)
@@ -158,40 +168,62 @@ static void __iomem *byt_gpio_reg(struct gpio_chip *chip, unsigned offset,
158 return vg->reg_base + reg_offset + reg; 168 return vg->reg_base + reg_offset + reg;
159} 169}
160 170
161static bool is_special_pin(struct byt_gpio *vg, unsigned offset) 171static void byt_gpio_clear_triggering(struct byt_gpio *vg, unsigned offset)
172{
173 void __iomem *reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);
174 unsigned long flags;
175 u32 value;
176
177 spin_lock_irqsave(&vg->lock, flags);
178 value = readl(reg);
179 value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL);
180 writel(value, reg);
181 spin_unlock_irqrestore(&vg->lock, flags);
182}
183
184static u32 byt_get_gpio_mux(struct byt_gpio *vg, unsigned offset)
162{ 185{
163 /* SCORE pin 92-93 */ 186 /* SCORE pin 92-93 */
164 if (!strcmp(vg->range->name, BYT_SCORE_ACPI_UID) && 187 if (!strcmp(vg->range->name, BYT_SCORE_ACPI_UID) &&
165 offset >= 92 && offset <= 93) 188 offset >= 92 && offset <= 93)
166 return true; 189 return 1;
167 190
168 /* SUS pin 11-21 */ 191 /* SUS pin 11-21 */
169 if (!strcmp(vg->range->name, BYT_SUS_ACPI_UID) && 192 if (!strcmp(vg->range->name, BYT_SUS_ACPI_UID) &&
170 offset >= 11 && offset <= 21) 193 offset >= 11 && offset <= 21)
171 return true; 194 return 1;
172 195
173 return false; 196 return 0;
174} 197}
175 198
176static int byt_gpio_request(struct gpio_chip *chip, unsigned offset) 199static int byt_gpio_request(struct gpio_chip *chip, unsigned offset)
177{ 200{
178 struct byt_gpio *vg = to_byt_gpio(chip); 201 struct byt_gpio *vg = to_byt_gpio(chip);
179 void __iomem *reg = byt_gpio_reg(chip, offset, BYT_CONF0_REG); 202 void __iomem *reg = byt_gpio_reg(chip, offset, BYT_CONF0_REG);
180 u32 value; 203 u32 value, gpio_mux;
181 bool special;
182 204
183 /* 205 /*
184 * In most cases, func pin mux 000 means GPIO function. 206 * In most cases, func pin mux 000 means GPIO function.
185 * But, some pins may have func pin mux 001 represents 207 * But, some pins may have func pin mux 001 represents
186 * GPIO function. Only allow user to export pin with 208 * GPIO function.
187 * func pin mux preset as GPIO function by BIOS/FW. 209 *
210 * Because there are devices out there where some pins were not
211 * configured correctly we allow changing the mux value from
212 * request (but print out warning about that).
188 */ 213 */
189 value = readl(reg) & BYT_PIN_MUX; 214 value = readl(reg) & BYT_PIN_MUX;
190 special = is_special_pin(vg, offset); 215 gpio_mux = byt_get_gpio_mux(vg, offset);
191 if ((special && value != 1) || (!special && value)) { 216 if (WARN_ON(gpio_mux != value)) {
192 dev_err(&vg->pdev->dev, 217 unsigned long flags;
193 "pin %u cannot be used as GPIO.\n", offset); 218
194 return -EINVAL; 219 spin_lock_irqsave(&vg->lock, flags);
220 value = readl(reg) & ~BYT_PIN_MUX;
221 value |= gpio_mux;
222 writel(value, reg);
223 spin_unlock_irqrestore(&vg->lock, flags);
224
225 dev_warn(&vg->pdev->dev,
226 "pin %u forcibly re-configured as GPIO\n", offset);
195 } 227 }
196 228
197 pm_runtime_get(&vg->pdev->dev); 229 pm_runtime_get(&vg->pdev->dev);
@@ -202,14 +234,8 @@ static int byt_gpio_request(struct gpio_chip *chip, unsigned offset)
202static void byt_gpio_free(struct gpio_chip *chip, unsigned offset) 234static void byt_gpio_free(struct gpio_chip *chip, unsigned offset)
203{ 235{
204 struct byt_gpio *vg = to_byt_gpio(chip); 236 struct byt_gpio *vg = to_byt_gpio(chip);
205 void __iomem *reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);
206 u32 value;
207
208 /* clear interrupt triggering */
209 value = readl(reg);
210 value &= ~(BYT_TRIG_POS | BYT_TRIG_NEG | BYT_TRIG_LVL);
211 writel(value, reg);
212 237
238 byt_gpio_clear_triggering(vg, offset);
213 pm_runtime_put(&vg->pdev->dev); 239 pm_runtime_put(&vg->pdev->dev);
214} 240}
215 241
@@ -236,23 +262,13 @@ static int byt_irq_type(struct irq_data *d, unsigned type)
236 value &= ~(BYT_DIRECT_IRQ_EN | BYT_TRIG_POS | BYT_TRIG_NEG | 262 value &= ~(BYT_DIRECT_IRQ_EN | BYT_TRIG_POS | BYT_TRIG_NEG |
237 BYT_TRIG_LVL); 263 BYT_TRIG_LVL);
238 264
239 switch (type) {
240 case IRQ_TYPE_LEVEL_HIGH:
241 value |= BYT_TRIG_LVL;
242 case IRQ_TYPE_EDGE_RISING:
243 value |= BYT_TRIG_POS;
244 break;
245 case IRQ_TYPE_LEVEL_LOW:
246 value |= BYT_TRIG_LVL;
247 case IRQ_TYPE_EDGE_FALLING:
248 value |= BYT_TRIG_NEG;
249 break;
250 case IRQ_TYPE_EDGE_BOTH:
251 value |= (BYT_TRIG_NEG | BYT_TRIG_POS);
252 break;
253 }
254 writel(value, reg); 265 writel(value, reg);
255 266
267 if (type & IRQ_TYPE_EDGE_BOTH)
268 __irq_set_handler_locked(d->irq, handle_edge_irq);
269 else if (type & IRQ_TYPE_LEVEL_MASK)
270 __irq_set_handler_locked(d->irq, handle_level_irq);
271
256 spin_unlock_irqrestore(&vg->lock, flags); 272 spin_unlock_irqrestore(&vg->lock, flags);
257 273
258 return 0; 274 return 0;
@@ -410,58 +426,80 @@ static void byt_gpio_irq_handler(unsigned irq, struct irq_desc *desc)
410 struct irq_data *data = irq_desc_get_irq_data(desc); 426 struct irq_data *data = irq_desc_get_irq_data(desc);
411 struct byt_gpio *vg = to_byt_gpio(irq_desc_get_handler_data(desc)); 427 struct byt_gpio *vg = to_byt_gpio(irq_desc_get_handler_data(desc));
412 struct irq_chip *chip = irq_data_get_irq_chip(data); 428 struct irq_chip *chip = irq_data_get_irq_chip(data);
413 u32 base, pin, mask; 429 u32 base, pin;
414 void __iomem *reg; 430 void __iomem *reg;
415 u32 pending; 431 unsigned long pending;
416 unsigned virq; 432 unsigned virq;
417 int looplimit = 0;
418 433
419 /* check from GPIO controller which pin triggered the interrupt */ 434 /* check from GPIO controller which pin triggered the interrupt */
420 for (base = 0; base < vg->chip.ngpio; base += 32) { 435 for (base = 0; base < vg->chip.ngpio; base += 32) {
421
422 reg = byt_gpio_reg(&vg->chip, base, BYT_INT_STAT_REG); 436 reg = byt_gpio_reg(&vg->chip, base, BYT_INT_STAT_REG);
423 437 pending = readl(reg);
424 while ((pending = readl(reg))) { 438 for_each_set_bit(pin, &pending, 32) {
425 pin = __ffs(pending);
426 mask = BIT(pin);
427 /* Clear before handling so we can't lose an edge */
428 writel(mask, reg);
429
430 virq = irq_find_mapping(vg->chip.irqdomain, base + pin); 439 virq = irq_find_mapping(vg->chip.irqdomain, base + pin);
431 generic_handle_irq(virq); 440 generic_handle_irq(virq);
432
433 /* In case bios or user sets triggering incorretly a pin
434 * might remain in "interrupt triggered" state.
435 */
436 if (looplimit++ > 32) {
437 dev_err(&vg->pdev->dev,
438 "Gpio %d interrupt flood, disabling\n",
439 base + pin);
440
441 reg = byt_gpio_reg(&vg->chip, base + pin,
442 BYT_CONF0_REG);
443 mask = readl(reg);
444 mask &= ~(BYT_TRIG_NEG | BYT_TRIG_POS |
445 BYT_TRIG_LVL);
446 writel(mask, reg);
447 mask = readl(reg); /* flush */
448 break;
449 }
450 } 441 }
451 } 442 }
452 chip->irq_eoi(data); 443 chip->irq_eoi(data);
453} 444}
454 445
446static void byt_irq_ack(struct irq_data *d)
447{
448 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
449 struct byt_gpio *vg = to_byt_gpio(gc);
450 unsigned offset = irqd_to_hwirq(d);
451 void __iomem *reg;
452
453 reg = byt_gpio_reg(&vg->chip, offset, BYT_INT_STAT_REG);
454 writel(BIT(offset % 32), reg);
455}
456
455static void byt_irq_unmask(struct irq_data *d) 457static void byt_irq_unmask(struct irq_data *d)
456{ 458{
459 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
460 struct byt_gpio *vg = to_byt_gpio(gc);
461 unsigned offset = irqd_to_hwirq(d);
462 unsigned long flags;
463 void __iomem *reg;
464 u32 value;
465
466 spin_lock_irqsave(&vg->lock, flags);
467
468 reg = byt_gpio_reg(&vg->chip, offset, BYT_CONF0_REG);
469 value = readl(reg);
470
471 switch (irqd_get_trigger_type(d)) {
472 case IRQ_TYPE_LEVEL_HIGH:
473 value |= BYT_TRIG_LVL;
474 case IRQ_TYPE_EDGE_RISING:
475 value |= BYT_TRIG_POS;
476 break;
477 case IRQ_TYPE_LEVEL_LOW:
478 value |= BYT_TRIG_LVL;
479 case IRQ_TYPE_EDGE_FALLING:
480 value |= BYT_TRIG_NEG;
481 break;
482 case IRQ_TYPE_EDGE_BOTH:
483 value |= (BYT_TRIG_NEG | BYT_TRIG_POS);
484 break;
485 }
486
487 writel(value, reg);
488
489 spin_unlock_irqrestore(&vg->lock, flags);
457} 490}
458 491
459static void byt_irq_mask(struct irq_data *d) 492static void byt_irq_mask(struct irq_data *d)
460{ 493{
494 struct gpio_chip *gc = irq_data_get_irq_chip_data(d);
495 struct byt_gpio *vg = to_byt_gpio(gc);
496
497 byt_gpio_clear_triggering(vg, irqd_to_hwirq(d));
461} 498}
462 499
463static struct irq_chip byt_irqchip = { 500static struct irq_chip byt_irqchip = {
464 .name = "BYT-GPIO", 501 .name = "BYT-GPIO",
502 .irq_ack = byt_irq_ack,
465 .irq_mask = byt_irq_mask, 503 .irq_mask = byt_irq_mask,
466 .irq_unmask = byt_irq_unmask, 504 .irq_unmask = byt_irq_unmask,
467 .irq_set_type = byt_irq_type, 505 .irq_set_type = byt_irq_type,
@@ -472,6 +510,21 @@ static void byt_gpio_irq_init_hw(struct byt_gpio *vg)
472{ 510{
473 void __iomem *reg; 511 void __iomem *reg;
474 u32 base, value; 512 u32 base, value;
513 int i;
514
515 /*
516 * Clear interrupt triggers for all pins that are GPIOs and
517 * do not use direct IRQ mode. This will prevent spurious
518 * interrupts from misconfigured pins.
519 */
520 for (i = 0; i < vg->chip.ngpio; i++) {
521 value = readl(byt_gpio_reg(&vg->chip, i, BYT_CONF0_REG));
522 if ((value & BYT_PIN_MUX) == byt_get_gpio_mux(vg, i) &&
523 !(value & BYT_DIRECT_IRQ_EN)) {
524 byt_gpio_clear_triggering(vg, i);
525 dev_dbg(&vg->pdev->dev, "disabling GPIO %d\n", i);
526 }
527 }
475 528
476 /* clear interrupt status trigger registers */ 529 /* clear interrupt status trigger registers */
477 for (base = 0; base < vg->chip.ngpio; base += 32) { 530 for (base = 0; base < vg->chip.ngpio; base += 32) {
@@ -541,6 +594,11 @@ static int byt_gpio_probe(struct platform_device *pdev)
541 gc->can_sleep = false; 594 gc->can_sleep = false;
542 gc->dev = dev; 595 gc->dev = dev;
543 596
597#ifdef CONFIG_PM_SLEEP
598 vg->saved_context = devm_kcalloc(&pdev->dev, gc->ngpio,
599 sizeof(*vg->saved_context), GFP_KERNEL);
600#endif
601
544 ret = gpiochip_add(gc); 602 ret = gpiochip_add(gc);
545 if (ret) { 603 if (ret) {
546 dev_err(&pdev->dev, "failed adding byt-gpio chip\n"); 604 dev_err(&pdev->dev, "failed adding byt-gpio chip\n");
@@ -569,6 +627,69 @@ static int byt_gpio_probe(struct platform_device *pdev)
569 return 0; 627 return 0;
570} 628}
571 629
630#ifdef CONFIG_PM_SLEEP
631static int byt_gpio_suspend(struct device *dev)
632{
633 struct platform_device *pdev = to_platform_device(dev);
634 struct byt_gpio *vg = platform_get_drvdata(pdev);
635 int i;
636
637 for (i = 0; i < vg->chip.ngpio; i++) {
638 void __iomem *reg;
639 u32 value;
640
641 reg = byt_gpio_reg(&vg->chip, i, BYT_CONF0_REG);
642 value = readl(reg) & BYT_CONF0_RESTORE_MASK;
643 vg->saved_context[i].conf0 = value;
644
645 reg = byt_gpio_reg(&vg->chip, i, BYT_VAL_REG);
646 value = readl(reg) & BYT_VAL_RESTORE_MASK;
647 vg->saved_context[i].val = value;
648 }
649
650 return 0;
651}
652
653static int byt_gpio_resume(struct device *dev)
654{
655 struct platform_device *pdev = to_platform_device(dev);
656 struct byt_gpio *vg = platform_get_drvdata(pdev);
657 int i;
658
659 for (i = 0; i < vg->chip.ngpio; i++) {
660 void __iomem *reg;
661 u32 value;
662
663 reg = byt_gpio_reg(&vg->chip, i, BYT_CONF0_REG);
664 value = readl(reg);
665 if ((value & BYT_CONF0_RESTORE_MASK) !=
666 vg->saved_context[i].conf0) {
667 value &= ~BYT_CONF0_RESTORE_MASK;
668 value |= vg->saved_context[i].conf0;
669 writel(value, reg);
670 dev_info(dev, "restored pin %d conf0 %#08x", i, value);
671 }
672
673 reg = byt_gpio_reg(&vg->chip, i, BYT_VAL_REG);
674 value = readl(reg);
675 if ((value & BYT_VAL_RESTORE_MASK) !=
676 vg->saved_context[i].val) {
677 u32 v;
678
679 v = value & ~BYT_VAL_RESTORE_MASK;
680 v |= vg->saved_context[i].val;
681 if (v != value) {
682 writel(v, reg);
683 dev_dbg(dev, "restored pin %d val %#08x\n",
684 i, v);
685 }
686 }
687 }
688
689 return 0;
690}
691#endif
692
572static int byt_gpio_runtime_suspend(struct device *dev) 693static int byt_gpio_runtime_suspend(struct device *dev)
573{ 694{
574 return 0; 695 return 0;
@@ -580,8 +701,9 @@ static int byt_gpio_runtime_resume(struct device *dev)
580} 701}
581 702
582static const struct dev_pm_ops byt_gpio_pm_ops = { 703static const struct dev_pm_ops byt_gpio_pm_ops = {
583 .runtime_suspend = byt_gpio_runtime_suspend, 704 SET_LATE_SYSTEM_SLEEP_PM_OPS(byt_gpio_suspend, byt_gpio_resume)
584 .runtime_resume = byt_gpio_runtime_resume, 705 SET_RUNTIME_PM_OPS(byt_gpio_runtime_suspend, byt_gpio_runtime_resume,
706 NULL)
585}; 707};
586 708
587static const struct acpi_device_id byt_gpio_acpi_match[] = { 709static const struct acpi_device_id byt_gpio_acpi_match[] = {
diff --git a/drivers/pinctrl/intel/pinctrl-cherryview.c b/drivers/pinctrl/intel/pinctrl-cherryview.c
index 3034fd03bced..82f691eeeec4 100644
--- a/drivers/pinctrl/intel/pinctrl-cherryview.c
+++ b/drivers/pinctrl/intel/pinctrl-cherryview.c
@@ -1226,6 +1226,7 @@ static int chv_gpio_direction_input(struct gpio_chip *chip, unsigned offset)
1226static int chv_gpio_direction_output(struct gpio_chip *chip, unsigned offset, 1226static int chv_gpio_direction_output(struct gpio_chip *chip, unsigned offset,
1227 int value) 1227 int value)
1228{ 1228{
1229 chv_gpio_set(chip, offset, value);
1229 return pinctrl_gpio_direction_output(chip->base + offset); 1230 return pinctrl_gpio_direction_output(chip->base + offset);
1230} 1231}
1231 1232
diff --git a/drivers/pinctrl/pinctrl-at91.c b/drivers/pinctrl/pinctrl-at91.c
index f4cd0b9b2438..a4814066ea08 100644
--- a/drivers/pinctrl/pinctrl-at91.c
+++ b/drivers/pinctrl/pinctrl-at91.c
@@ -1477,28 +1477,25 @@ static void gpio_irq_ack(struct irq_data *d)
1477 /* the interrupt is already cleared before by reading ISR */ 1477 /* the interrupt is already cleared before by reading ISR */
1478} 1478}
1479 1479
1480static unsigned int gpio_irq_startup(struct irq_data *d) 1480static int gpio_irq_request_res(struct irq_data *d)
1481{ 1481{
1482 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d); 1482 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
1483 unsigned pin = d->hwirq; 1483 unsigned pin = d->hwirq;
1484 int ret; 1484 int ret;
1485 1485
1486 ret = gpiochip_lock_as_irq(&at91_gpio->chip, pin); 1486 ret = gpiochip_lock_as_irq(&at91_gpio->chip, pin);
1487 if (ret) { 1487 if (ret)
1488 dev_err(at91_gpio->chip.dev, "unable to lock pind %lu IRQ\n", 1488 dev_err(at91_gpio->chip.dev, "unable to lock pind %lu IRQ\n",
1489 d->hwirq); 1489 d->hwirq);
1490 return ret; 1490
1491 } 1491 return ret;
1492 gpio_irq_unmask(d);
1493 return 0;
1494} 1492}
1495 1493
1496static void gpio_irq_shutdown(struct irq_data *d) 1494static void gpio_irq_release_res(struct irq_data *d)
1497{ 1495{
1498 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d); 1496 struct at91_gpio_chip *at91_gpio = irq_data_get_irq_chip_data(d);
1499 unsigned pin = d->hwirq; 1497 unsigned pin = d->hwirq;
1500 1498
1501 gpio_irq_mask(d);
1502 gpiochip_unlock_as_irq(&at91_gpio->chip, pin); 1499 gpiochip_unlock_as_irq(&at91_gpio->chip, pin);
1503} 1500}
1504 1501
@@ -1577,8 +1574,8 @@ void at91_pinctrl_gpio_resume(void)
1577static struct irq_chip gpio_irqchip = { 1574static struct irq_chip gpio_irqchip = {
1578 .name = "GPIO", 1575 .name = "GPIO",
1579 .irq_ack = gpio_irq_ack, 1576 .irq_ack = gpio_irq_ack,
1580 .irq_startup = gpio_irq_startup, 1577 .irq_request_resources = gpio_irq_request_res,
1581 .irq_shutdown = gpio_irq_shutdown, 1578 .irq_release_resources = gpio_irq_release_res,
1582 .irq_disable = gpio_irq_mask, 1579 .irq_disable = gpio_irq_mask,
1583 .irq_mask = gpio_irq_mask, 1580 .irq_mask = gpio_irq_mask,
1584 .irq_unmask = gpio_irq_unmask, 1581 .irq_unmask = gpio_irq_unmask,
diff --git a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
index 24c5d88f943f..3c68a8e5e0dd 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sun4i-a10.c
@@ -1011,6 +1011,7 @@ static const struct sunxi_pinctrl_desc sun4i_a10_pinctrl_data = {
1011 .pins = sun4i_a10_pins, 1011 .pins = sun4i_a10_pins,
1012 .npins = ARRAY_SIZE(sun4i_a10_pins), 1012 .npins = ARRAY_SIZE(sun4i_a10_pins),
1013 .irq_banks = 1, 1013 .irq_banks = 1,
1014 .irq_read_needs_mux = true,
1014}; 1015};
1015 1016
1016static int sun4i_a10_pinctrl_probe(struct platform_device *pdev) 1017static int sun4i_a10_pinctrl_probe(struct platform_device *pdev)
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.c b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
index 3d0744337736..f8e171b76693 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.c
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.c
@@ -29,6 +29,7 @@
29#include <linux/slab.h> 29#include <linux/slab.h>
30 30
31#include "../core.h" 31#include "../core.h"
32#include "../../gpio/gpiolib.h"
32#include "pinctrl-sunxi.h" 33#include "pinctrl-sunxi.h"
33 34
34static struct irq_chip sunxi_pinctrl_edge_irq_chip; 35static struct irq_chip sunxi_pinctrl_edge_irq_chip;
@@ -464,10 +465,19 @@ static int sunxi_pinctrl_gpio_direction_input(struct gpio_chip *chip,
464static int sunxi_pinctrl_gpio_get(struct gpio_chip *chip, unsigned offset) 465static int sunxi_pinctrl_gpio_get(struct gpio_chip *chip, unsigned offset)
465{ 466{
466 struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev); 467 struct sunxi_pinctrl *pctl = dev_get_drvdata(chip->dev);
467
468 u32 reg = sunxi_data_reg(offset); 468 u32 reg = sunxi_data_reg(offset);
469 u8 index = sunxi_data_offset(offset); 469 u8 index = sunxi_data_offset(offset);
470 u32 val = (readl(pctl->membase + reg) >> index) & DATA_PINS_MASK; 470 u32 set_mux = pctl->desc->irq_read_needs_mux &&
471 test_bit(FLAG_USED_AS_IRQ, &chip->desc[offset].flags);
472 u32 val;
473
474 if (set_mux)
475 sunxi_pmx_set(pctl->pctl_dev, offset, SUN4I_FUNC_INPUT);
476
477 val = (readl(pctl->membase + reg) >> index) & DATA_PINS_MASK;
478
479 if (set_mux)
480 sunxi_pmx_set(pctl->pctl_dev, offset, SUN4I_FUNC_IRQ);
471 481
472 return val; 482 return val;
473} 483}
diff --git a/drivers/pinctrl/sunxi/pinctrl-sunxi.h b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
index 5a51523a3459..e248e81a0f9e 100644
--- a/drivers/pinctrl/sunxi/pinctrl-sunxi.h
+++ b/drivers/pinctrl/sunxi/pinctrl-sunxi.h
@@ -77,6 +77,9 @@
77#define IRQ_LEVEL_LOW 0x03 77#define IRQ_LEVEL_LOW 0x03
78#define IRQ_EDGE_BOTH 0x04 78#define IRQ_EDGE_BOTH 0x04
79 79
80#define SUN4I_FUNC_INPUT 0
81#define SUN4I_FUNC_IRQ 6
82
80struct sunxi_desc_function { 83struct sunxi_desc_function {
81 const char *name; 84 const char *name;
82 u8 muxval; 85 u8 muxval;
@@ -94,6 +97,7 @@ struct sunxi_pinctrl_desc {
94 int npins; 97 int npins;
95 unsigned pin_base; 98 unsigned pin_base;
96 unsigned irq_banks; 99 unsigned irq_banks;
100 bool irq_read_needs_mux;
97}; 101};
98 102
99struct sunxi_pinctrl_function { 103struct sunxi_pinctrl_function {
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index 638e797037da..97527614141b 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -735,6 +735,31 @@ config INTEL_IPS
735 functionality. If in doubt, say Y here; it will only load on 735 functionality. If in doubt, say Y here; it will only load on
736 supported platforms. 736 supported platforms.
737 737
738config INTEL_IMR
739 bool "Intel Isolated Memory Region support"
740 default n
741 depends on X86_INTEL_QUARK && IOSF_MBI
742 ---help---
743 This option provides a means to manipulate Isolated Memory Regions.
744 IMRs are a set of registers that define read and write access masks
745 to prohibit certain system agents from accessing memory with 1 KiB
746 granularity.
747
748 IMRs make it possible to control read/write access to an address
749 by hardware agents inside the SoC. Read and write masks can be
750 defined for:
751 - eSRAM flush
752 - Dirty CPU snoop (write only)
753 - RMU access
754 - PCI Virtual Channel 0/Virtual Channel 1
755 - SMM mode
756 - Non SMM mode
757
758 Quark contains a set of eight IMR registers and makes use of those
759 registers during its bootup process.
760
761 If you are running on a Galileo/Quark say Y here.
762
738config IBM_RTL 763config IBM_RTL
739 tristate "Device driver to enable PRTL support" 764 tristate "Device driver to enable PRTL support"
740 depends on X86 && PCI 765 depends on X86 && PCI
diff --git a/drivers/pnp/resource.c b/drivers/pnp/resource.c
index 782e82289571..f980ff7166e9 100644
--- a/drivers/pnp/resource.c
+++ b/drivers/pnp/resource.c
@@ -179,8 +179,9 @@ int pnp_check_port(struct pnp_dev *dev, struct resource *res)
179 /* check if the resource is already in use, skip if the 179 /* check if the resource is already in use, skip if the
180 * device is active because it itself may be in use */ 180 * device is active because it itself may be in use */
181 if (!dev->active) { 181 if (!dev->active) {
182 if (__check_region(&ioport_resource, *port, length(port, end))) 182 if (!request_region(*port, length(port, end), "pnp"))
183 return 0; 183 return 0;
184 release_region(*port, length(port, end));
184 } 185 }
185 186
186 /* check if the resource is reserved */ 187 /* check if the resource is reserved */
@@ -241,8 +242,9 @@ int pnp_check_mem(struct pnp_dev *dev, struct resource *res)
241 /* check if the resource is already in use, skip if the 242 /* check if the resource is already in use, skip if the
242 * device is active because it itself may be in use */ 243 * device is active because it itself may be in use */
243 if (!dev->active) { 244 if (!dev->active) {
244 if (check_mem_region(*addr, length(addr, end))) 245 if (!request_mem_region(*addr, length(addr, end), "pnp"))
245 return 0; 246 return 0;
247 release_mem_region(*addr, length(addr, end));
246 } 248 }
247 249
248 /* check if the resource is reserved */ 250 /* check if the resource is reserved */
diff --git a/drivers/powercap/intel_rapl.c b/drivers/powercap/intel_rapl.c
index 97b5e4ee1ca4..63d4033eb683 100644
--- a/drivers/powercap/intel_rapl.c
+++ b/drivers/powercap/intel_rapl.c
@@ -73,7 +73,7 @@
73 73
74#define TIME_WINDOW_MAX_MSEC 40000 74#define TIME_WINDOW_MAX_MSEC 40000
75#define TIME_WINDOW_MIN_MSEC 250 75#define TIME_WINDOW_MIN_MSEC 250
76 76#define ENERGY_UNIT_SCALE 1000 /* scale from driver unit to powercap unit */
77enum unit_type { 77enum unit_type {
78 ARBITRARY_UNIT, /* no translation */ 78 ARBITRARY_UNIT, /* no translation */
79 POWER_UNIT, 79 POWER_UNIT,
@@ -158,6 +158,7 @@ struct rapl_domain {
158 struct rapl_power_limit rpl[NR_POWER_LIMITS]; 158 struct rapl_power_limit rpl[NR_POWER_LIMITS];
159 u64 attr_map; /* track capabilities */ 159 u64 attr_map; /* track capabilities */
160 unsigned int state; 160 unsigned int state;
161 unsigned int domain_energy_unit;
161 int package_id; 162 int package_id;
162}; 163};
163#define power_zone_to_rapl_domain(_zone) \ 164#define power_zone_to_rapl_domain(_zone) \
@@ -190,6 +191,7 @@ struct rapl_defaults {
190 void (*set_floor_freq)(struct rapl_domain *rd, bool mode); 191 void (*set_floor_freq)(struct rapl_domain *rd, bool mode);
191 u64 (*compute_time_window)(struct rapl_package *rp, u64 val, 192 u64 (*compute_time_window)(struct rapl_package *rp, u64 val,
192 bool to_raw); 193 bool to_raw);
194 unsigned int dram_domain_energy_unit;
193}; 195};
194static struct rapl_defaults *rapl_defaults; 196static struct rapl_defaults *rapl_defaults;
195 197
@@ -227,7 +229,8 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
227static int rapl_write_data_raw(struct rapl_domain *rd, 229static int rapl_write_data_raw(struct rapl_domain *rd,
228 enum rapl_primitives prim, 230 enum rapl_primitives prim,
229 unsigned long long value); 231 unsigned long long value);
230static u64 rapl_unit_xlate(int package, enum unit_type type, u64 value, 232static u64 rapl_unit_xlate(struct rapl_domain *rd, int package,
233 enum unit_type type, u64 value,
231 int to_raw); 234 int to_raw);
232static void package_power_limit_irq_save(int package_id); 235static void package_power_limit_irq_save(int package_id);
233 236
@@ -305,7 +308,9 @@ static int get_energy_counter(struct powercap_zone *power_zone, u64 *energy_raw)
305 308
306static int get_max_energy_counter(struct powercap_zone *pcd_dev, u64 *energy) 309static int get_max_energy_counter(struct powercap_zone *pcd_dev, u64 *energy)
307{ 310{
308 *energy = rapl_unit_xlate(0, ENERGY_UNIT, ENERGY_STATUS_MASK, 0); 311 struct rapl_domain *rd = power_zone_to_rapl_domain(pcd_dev);
312
313 *energy = rapl_unit_xlate(rd, 0, ENERGY_UNIT, ENERGY_STATUS_MASK, 0);
309 return 0; 314 return 0;
310} 315}
311 316
@@ -639,6 +644,11 @@ static void rapl_init_domains(struct rapl_package *rp)
639 rd->msrs[4] = MSR_DRAM_POWER_INFO; 644 rd->msrs[4] = MSR_DRAM_POWER_INFO;
640 rd->rpl[0].prim_id = PL1_ENABLE; 645 rd->rpl[0].prim_id = PL1_ENABLE;
641 rd->rpl[0].name = pl1_name; 646 rd->rpl[0].name = pl1_name;
647 rd->domain_energy_unit =
648 rapl_defaults->dram_domain_energy_unit;
649 if (rd->domain_energy_unit)
650 pr_info("DRAM domain energy unit %dpj\n",
651 rd->domain_energy_unit);
642 break; 652 break;
643 } 653 }
644 if (mask) { 654 if (mask) {
@@ -648,11 +658,13 @@ static void rapl_init_domains(struct rapl_package *rp)
648 } 658 }
649} 659}
650 660
651static u64 rapl_unit_xlate(int package, enum unit_type type, u64 value, 661static u64 rapl_unit_xlate(struct rapl_domain *rd, int package,
662 enum unit_type type, u64 value,
652 int to_raw) 663 int to_raw)
653{ 664{
654 u64 units = 1; 665 u64 units = 1;
655 struct rapl_package *rp; 666 struct rapl_package *rp;
667 u64 scale = 1;
656 668
657 rp = find_package_by_id(package); 669 rp = find_package_by_id(package);
658 if (!rp) 670 if (!rp)
@@ -663,7 +675,12 @@ static u64 rapl_unit_xlate(int package, enum unit_type type, u64 value,
663 units = rp->power_unit; 675 units = rp->power_unit;
664 break; 676 break;
665 case ENERGY_UNIT: 677 case ENERGY_UNIT:
666 units = rp->energy_unit; 678 scale = ENERGY_UNIT_SCALE;
679 /* per domain unit takes precedence */
680 if (rd && rd->domain_energy_unit)
681 units = rd->domain_energy_unit;
682 else
683 units = rp->energy_unit;
667 break; 684 break;
668 case TIME_UNIT: 685 case TIME_UNIT:
669 return rapl_defaults->compute_time_window(rp, value, to_raw); 686 return rapl_defaults->compute_time_window(rp, value, to_raw);
@@ -673,11 +690,11 @@ static u64 rapl_unit_xlate(int package, enum unit_type type, u64 value,
673 }; 690 };
674 691
675 if (to_raw) 692 if (to_raw)
676 return div64_u64(value, units); 693 return div64_u64(value, units) * scale;
677 694
678 value *= units; 695 value *= units;
679 696
680 return value; 697 return div64_u64(value, scale);
681} 698}
682 699
683/* in the order of enum rapl_primitives */ 700/* in the order of enum rapl_primitives */
@@ -773,7 +790,7 @@ static int rapl_read_data_raw(struct rapl_domain *rd,
773 final = value & rp->mask; 790 final = value & rp->mask;
774 final = final >> rp->shift; 791 final = final >> rp->shift;
775 if (xlate) 792 if (xlate)
776 *data = rapl_unit_xlate(rd->package_id, rp->unit, final, 0); 793 *data = rapl_unit_xlate(rd, rd->package_id, rp->unit, final, 0);
777 else 794 else
778 *data = final; 795 *data = final;
779 796
@@ -799,7 +816,7 @@ static int rapl_write_data_raw(struct rapl_domain *rd,
799 "failed to read msr 0x%x on cpu %d\n", msr, cpu); 816 "failed to read msr 0x%x on cpu %d\n", msr, cpu);
800 return -EIO; 817 return -EIO;
801 } 818 }
802 value = rapl_unit_xlate(rd->package_id, rp->unit, value, 1); 819 value = rapl_unit_xlate(rd, rd->package_id, rp->unit, value, 1);
803 msr_val &= ~rp->mask; 820 msr_val &= ~rp->mask;
804 msr_val |= value << rp->shift; 821 msr_val |= value << rp->shift;
805 if (wrmsrl_safe_on_cpu(cpu, msr, msr_val)) { 822 if (wrmsrl_safe_on_cpu(cpu, msr, msr_val)) {
@@ -818,7 +835,7 @@ static int rapl_write_data_raw(struct rapl_domain *rd,
818 * calculate units differ on different CPUs. 835 * calculate units differ on different CPUs.
819 * We convert the units to below format based on CPUs. 836 * We convert the units to below format based on CPUs.
820 * i.e. 837 * i.e.
821 * energy unit: microJoules : Represented in microJoules by default 838 * energy unit: picoJoules : Represented in picoJoules by default
822 * power unit : microWatts : Represented in milliWatts by default 839 * power unit : microWatts : Represented in milliWatts by default
823 * time unit : microseconds: Represented in seconds by default 840 * time unit : microseconds: Represented in seconds by default
824 */ 841 */
@@ -834,7 +851,7 @@ static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
834 } 851 }
835 852
836 value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET; 853 value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
837 rp->energy_unit = 1000000 / (1 << value); 854 rp->energy_unit = ENERGY_UNIT_SCALE * 1000000 / (1 << value);
838 855
839 value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET; 856 value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
840 rp->power_unit = 1000000 / (1 << value); 857 rp->power_unit = 1000000 / (1 << value);
@@ -842,7 +859,7 @@ static int rapl_check_unit_core(struct rapl_package *rp, int cpu)
842 value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET; 859 value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
843 rp->time_unit = 1000000 / (1 << value); 860 rp->time_unit = 1000000 / (1 << value);
844 861
845 pr_debug("Core CPU package %d energy=%duJ, time=%dus, power=%duW\n", 862 pr_debug("Core CPU package %d energy=%dpJ, time=%dus, power=%duW\n",
846 rp->id, rp->energy_unit, rp->time_unit, rp->power_unit); 863 rp->id, rp->energy_unit, rp->time_unit, rp->power_unit);
847 864
848 return 0; 865 return 0;
@@ -859,7 +876,7 @@ static int rapl_check_unit_atom(struct rapl_package *rp, int cpu)
859 return -ENODEV; 876 return -ENODEV;
860 } 877 }
861 value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET; 878 value = (msr_val & ENERGY_UNIT_MASK) >> ENERGY_UNIT_OFFSET;
862 rp->energy_unit = 1 << value; 879 rp->energy_unit = ENERGY_UNIT_SCALE * 1 << value;
863 880
864 value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET; 881 value = (msr_val & POWER_UNIT_MASK) >> POWER_UNIT_OFFSET;
865 rp->power_unit = (1 << value) * 1000; 882 rp->power_unit = (1 << value) * 1000;
@@ -867,7 +884,7 @@ static int rapl_check_unit_atom(struct rapl_package *rp, int cpu)
867 value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET; 884 value = (msr_val & TIME_UNIT_MASK) >> TIME_UNIT_OFFSET;
868 rp->time_unit = 1000000 / (1 << value); 885 rp->time_unit = 1000000 / (1 << value);
869 886
870 pr_debug("Atom package %d energy=%duJ, time=%dus, power=%duW\n", 887 pr_debug("Atom package %d energy=%dpJ, time=%dus, power=%duW\n",
871 rp->id, rp->energy_unit, rp->time_unit, rp->power_unit); 888 rp->id, rp->energy_unit, rp->time_unit, rp->power_unit);
872 889
873 return 0; 890 return 0;
@@ -1017,6 +1034,13 @@ static const struct rapl_defaults rapl_defaults_core = {
1017 .compute_time_window = rapl_compute_time_window_core, 1034 .compute_time_window = rapl_compute_time_window_core,
1018}; 1035};
1019 1036
1037static const struct rapl_defaults rapl_defaults_hsw_server = {
1038 .check_unit = rapl_check_unit_core,
1039 .set_floor_freq = set_floor_freq_default,
1040 .compute_time_window = rapl_compute_time_window_core,
1041 .dram_domain_energy_unit = 15300,
1042};
1043
1020static const struct rapl_defaults rapl_defaults_atom = { 1044static const struct rapl_defaults rapl_defaults_atom = {
1021 .check_unit = rapl_check_unit_atom, 1045 .check_unit = rapl_check_unit_atom,
1022 .set_floor_freq = set_floor_freq_atom, 1046 .set_floor_freq = set_floor_freq_atom,
@@ -1037,7 +1061,7 @@ static const struct x86_cpu_id rapl_ids[] = {
1037 RAPL_CPU(0x3a, rapl_defaults_core),/* Ivy Bridge */ 1061 RAPL_CPU(0x3a, rapl_defaults_core),/* Ivy Bridge */
1038 RAPL_CPU(0x3c, rapl_defaults_core),/* Haswell */ 1062 RAPL_CPU(0x3c, rapl_defaults_core),/* Haswell */
1039 RAPL_CPU(0x3d, rapl_defaults_core),/* Broadwell */ 1063 RAPL_CPU(0x3d, rapl_defaults_core),/* Broadwell */
1040 RAPL_CPU(0x3f, rapl_defaults_core),/* Haswell */ 1064 RAPL_CPU(0x3f, rapl_defaults_hsw_server),/* Haswell servers */
1041 RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */ 1065 RAPL_CPU(0x45, rapl_defaults_core),/* Haswell ULT */
1042 RAPL_CPU(0x4C, rapl_defaults_atom),/* Braswell */ 1066 RAPL_CPU(0x4C, rapl_defaults_atom),/* Braswell */
1043 RAPL_CPU(0x4A, rapl_defaults_atom),/* Tangier */ 1067 RAPL_CPU(0x4A, rapl_defaults_atom),/* Tangier */
diff --git a/drivers/regulator/core.c b/drivers/regulator/core.c
index b899947d839d..a4a8a6dc60c4 100644
--- a/drivers/regulator/core.c
+++ b/drivers/regulator/core.c
@@ -1839,10 +1839,12 @@ static int _regulator_do_enable(struct regulator_dev *rdev)
1839 } 1839 }
1840 1840
1841 if (rdev->ena_pin) { 1841 if (rdev->ena_pin) {
1842 ret = regulator_ena_gpio_ctrl(rdev, true); 1842 if (!rdev->ena_gpio_state) {
1843 if (ret < 0) 1843 ret = regulator_ena_gpio_ctrl(rdev, true);
1844 return ret; 1844 if (ret < 0)
1845 rdev->ena_gpio_state = 1; 1845 return ret;
1846 rdev->ena_gpio_state = 1;
1847 }
1846 } else if (rdev->desc->ops->enable) { 1848 } else if (rdev->desc->ops->enable) {
1847 ret = rdev->desc->ops->enable(rdev); 1849 ret = rdev->desc->ops->enable(rdev);
1848 if (ret < 0) 1850 if (ret < 0)
@@ -1939,10 +1941,12 @@ static int _regulator_do_disable(struct regulator_dev *rdev)
1939 trace_regulator_disable(rdev_get_name(rdev)); 1941 trace_regulator_disable(rdev_get_name(rdev));
1940 1942
1941 if (rdev->ena_pin) { 1943 if (rdev->ena_pin) {
1942 ret = regulator_ena_gpio_ctrl(rdev, false); 1944 if (rdev->ena_gpio_state) {
1943 if (ret < 0) 1945 ret = regulator_ena_gpio_ctrl(rdev, false);
1944 return ret; 1946 if (ret < 0)
1945 rdev->ena_gpio_state = 0; 1947 return ret;
1948 rdev->ena_gpio_state = 0;
1949 }
1946 1950
1947 } else if (rdev->desc->ops->disable) { 1951 } else if (rdev->desc->ops->disable) {
1948 ret = rdev->desc->ops->disable(rdev); 1952 ret = rdev->desc->ops->disable(rdev);
@@ -3444,13 +3448,6 @@ static umode_t regulator_attr_is_visible(struct kobject *kobj,
3444 if (attr == &dev_attr_requested_microamps.attr) 3448 if (attr == &dev_attr_requested_microamps.attr)
3445 return rdev->desc->type == REGULATOR_CURRENT ? mode : 0; 3449 return rdev->desc->type == REGULATOR_CURRENT ? mode : 0;
3446 3450
3447 /* all the other attributes exist to support constraints;
3448 * don't show them if there are no constraints, or if the
3449 * relevant supporting methods are missing.
3450 */
3451 if (!rdev->constraints)
3452 return 0;
3453
3454 /* constraints need specific supporting methods */ 3451 /* constraints need specific supporting methods */
3455 if (attr == &dev_attr_min_microvolts.attr || 3452 if (attr == &dev_attr_min_microvolts.attr ||
3456 attr == &dev_attr_max_microvolts.attr) 3453 attr == &dev_attr_max_microvolts.attr)
@@ -3633,12 +3630,6 @@ regulator_register(const struct regulator_desc *regulator_desc,
3633 config->ena_gpio, ret); 3630 config->ena_gpio, ret);
3634 goto wash; 3631 goto wash;
3635 } 3632 }
3636
3637 if (config->ena_gpio_flags & GPIOF_OUT_INIT_HIGH)
3638 rdev->ena_gpio_state = 1;
3639
3640 if (config->ena_gpio_invert)
3641 rdev->ena_gpio_state = !rdev->ena_gpio_state;
3642 } 3633 }
3643 3634
3644 /* set regulator constraints */ 3635 /* set regulator constraints */
@@ -3807,9 +3798,11 @@ int regulator_suspend_finish(void)
3807 list_for_each_entry(rdev, &regulator_list, list) { 3798 list_for_each_entry(rdev, &regulator_list, list) {
3808 mutex_lock(&rdev->mutex); 3799 mutex_lock(&rdev->mutex);
3809 if (rdev->use_count > 0 || rdev->constraints->always_on) { 3800 if (rdev->use_count > 0 || rdev->constraints->always_on) {
3810 error = _regulator_do_enable(rdev); 3801 if (!_regulator_is_enabled(rdev)) {
3811 if (error) 3802 error = _regulator_do_enable(rdev);
3812 ret = error; 3803 if (error)
3804 ret = error;
3805 }
3813 } else { 3806 } else {
3814 if (!have_full_constraints()) 3807 if (!have_full_constraints())
3815 goto unlock; 3808 goto unlock;
diff --git a/drivers/regulator/da9210-regulator.c b/drivers/regulator/da9210-regulator.c
index bc6100103f7f..f0489cb9018b 100644
--- a/drivers/regulator/da9210-regulator.c
+++ b/drivers/regulator/da9210-regulator.c
@@ -152,6 +152,15 @@ static int da9210_i2c_probe(struct i2c_client *i2c,
152 config.regmap = chip->regmap; 152 config.regmap = chip->regmap;
153 config.of_node = dev->of_node; 153 config.of_node = dev->of_node;
154 154
155 /* Mask all interrupt sources to deassert interrupt line */
156 error = regmap_write(chip->regmap, DA9210_REG_MASK_A, ~0);
157 if (!error)
158 error = regmap_write(chip->regmap, DA9210_REG_MASK_B, ~0);
159 if (error) {
160 dev_err(&i2c->dev, "Failed to write to mask reg: %d\n", error);
161 return error;
162 }
163
155 rdev = devm_regulator_register(&i2c->dev, &da9210_reg, &config); 164 rdev = devm_regulator_register(&i2c->dev, &da9210_reg, &config);
156 if (IS_ERR(rdev)) { 165 if (IS_ERR(rdev)) {
157 dev_err(&i2c->dev, "Failed to register DA9210 regulator\n"); 166 dev_err(&i2c->dev, "Failed to register DA9210 regulator\n");
diff --git a/drivers/regulator/rk808-regulator.c b/drivers/regulator/rk808-regulator.c
index 1f93b752a81c..3fd44353cc80 100644
--- a/drivers/regulator/rk808-regulator.c
+++ b/drivers/regulator/rk808-regulator.c
@@ -235,6 +235,7 @@ static const struct regulator_desc rk808_reg[] = {
235 .vsel_mask = RK808_LDO_VSEL_MASK, 235 .vsel_mask = RK808_LDO_VSEL_MASK,
236 .enable_reg = RK808_LDO_EN_REG, 236 .enable_reg = RK808_LDO_EN_REG,
237 .enable_mask = BIT(0), 237 .enable_mask = BIT(0),
238 .enable_time = 400,
238 .owner = THIS_MODULE, 239 .owner = THIS_MODULE,
239 }, { 240 }, {
240 .name = "LDO_REG2", 241 .name = "LDO_REG2",
@@ -249,6 +250,7 @@ static const struct regulator_desc rk808_reg[] = {
249 .vsel_mask = RK808_LDO_VSEL_MASK, 250 .vsel_mask = RK808_LDO_VSEL_MASK,
250 .enable_reg = RK808_LDO_EN_REG, 251 .enable_reg = RK808_LDO_EN_REG,
251 .enable_mask = BIT(1), 252 .enable_mask = BIT(1),
253 .enable_time = 400,
252 .owner = THIS_MODULE, 254 .owner = THIS_MODULE,
253 }, { 255 }, {
254 .name = "LDO_REG3", 256 .name = "LDO_REG3",
@@ -263,6 +265,7 @@ static const struct regulator_desc rk808_reg[] = {
263 .vsel_mask = RK808_BUCK4_VSEL_MASK, 265 .vsel_mask = RK808_BUCK4_VSEL_MASK,
264 .enable_reg = RK808_LDO_EN_REG, 266 .enable_reg = RK808_LDO_EN_REG,
265 .enable_mask = BIT(2), 267 .enable_mask = BIT(2),
268 .enable_time = 400,
266 .owner = THIS_MODULE, 269 .owner = THIS_MODULE,
267 }, { 270 }, {
268 .name = "LDO_REG4", 271 .name = "LDO_REG4",
@@ -277,6 +280,7 @@ static const struct regulator_desc rk808_reg[] = {
277 .vsel_mask = RK808_LDO_VSEL_MASK, 280 .vsel_mask = RK808_LDO_VSEL_MASK,
278 .enable_reg = RK808_LDO_EN_REG, 281 .enable_reg = RK808_LDO_EN_REG,
279 .enable_mask = BIT(3), 282 .enable_mask = BIT(3),
283 .enable_time = 400,
280 .owner = THIS_MODULE, 284 .owner = THIS_MODULE,
281 }, { 285 }, {
282 .name = "LDO_REG5", 286 .name = "LDO_REG5",
@@ -291,6 +295,7 @@ static const struct regulator_desc rk808_reg[] = {
291 .vsel_mask = RK808_LDO_VSEL_MASK, 295 .vsel_mask = RK808_LDO_VSEL_MASK,
292 .enable_reg = RK808_LDO_EN_REG, 296 .enable_reg = RK808_LDO_EN_REG,
293 .enable_mask = BIT(4), 297 .enable_mask = BIT(4),
298 .enable_time = 400,
294 .owner = THIS_MODULE, 299 .owner = THIS_MODULE,
295 }, { 300 }, {
296 .name = "LDO_REG6", 301 .name = "LDO_REG6",
@@ -305,6 +310,7 @@ static const struct regulator_desc rk808_reg[] = {
305 .vsel_mask = RK808_LDO_VSEL_MASK, 310 .vsel_mask = RK808_LDO_VSEL_MASK,
306 .enable_reg = RK808_LDO_EN_REG, 311 .enable_reg = RK808_LDO_EN_REG,
307 .enable_mask = BIT(5), 312 .enable_mask = BIT(5),
313 .enable_time = 400,
308 .owner = THIS_MODULE, 314 .owner = THIS_MODULE,
309 }, { 315 }, {
310 .name = "LDO_REG7", 316 .name = "LDO_REG7",
@@ -319,6 +325,7 @@ static const struct regulator_desc rk808_reg[] = {
319 .vsel_mask = RK808_LDO_VSEL_MASK, 325 .vsel_mask = RK808_LDO_VSEL_MASK,
320 .enable_reg = RK808_LDO_EN_REG, 326 .enable_reg = RK808_LDO_EN_REG,
321 .enable_mask = BIT(6), 327 .enable_mask = BIT(6),
328 .enable_time = 400,
322 .owner = THIS_MODULE, 329 .owner = THIS_MODULE,
323 }, { 330 }, {
324 .name = "LDO_REG8", 331 .name = "LDO_REG8",
@@ -333,6 +340,7 @@ static const struct regulator_desc rk808_reg[] = {
333 .vsel_mask = RK808_LDO_VSEL_MASK, 340 .vsel_mask = RK808_LDO_VSEL_MASK,
334 .enable_reg = RK808_LDO_EN_REG, 341 .enable_reg = RK808_LDO_EN_REG,
335 .enable_mask = BIT(7), 342 .enable_mask = BIT(7),
343 .enable_time = 400,
336 .owner = THIS_MODULE, 344 .owner = THIS_MODULE,
337 }, { 345 }, {
338 .name = "SWITCH_REG1", 346 .name = "SWITCH_REG1",
diff --git a/drivers/regulator/tps65910-regulator.c b/drivers/regulator/tps65910-regulator.c
index e2cffe01b807..fb991ec76423 100644
--- a/drivers/regulator/tps65910-regulator.c
+++ b/drivers/regulator/tps65910-regulator.c
@@ -17,6 +17,7 @@
17#include <linux/module.h> 17#include <linux/module.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/err.h> 19#include <linux/err.h>
20#include <linux/of.h>
20#include <linux/platform_device.h> 21#include <linux/platform_device.h>
21#include <linux/regulator/driver.h> 22#include <linux/regulator/driver.h>
22#include <linux/regulator/machine.h> 23#include <linux/regulator/machine.h>
diff --git a/drivers/rpmsg/virtio_rpmsg_bus.c b/drivers/rpmsg/virtio_rpmsg_bus.c
index 92f6af6da699..73354ee27877 100644
--- a/drivers/rpmsg/virtio_rpmsg_bus.c
+++ b/drivers/rpmsg/virtio_rpmsg_bus.c
@@ -951,6 +951,7 @@ static int rpmsg_probe(struct virtio_device *vdev)
951 void *bufs_va; 951 void *bufs_va;
952 int err = 0, i; 952 int err = 0, i;
953 size_t total_buf_space; 953 size_t total_buf_space;
954 bool notify;
954 955
955 vrp = kzalloc(sizeof(*vrp), GFP_KERNEL); 956 vrp = kzalloc(sizeof(*vrp), GFP_KERNEL);
956 if (!vrp) 957 if (!vrp)
@@ -1030,8 +1031,22 @@ static int rpmsg_probe(struct virtio_device *vdev)
1030 } 1031 }
1031 } 1032 }
1032 1033
1034 /*
1035 * Prepare to kick but don't notify yet - we can't do this before
1036 * device is ready.
1037 */
1038 notify = virtqueue_kick_prepare(vrp->rvq);
1039
1040 /* From this point on, we can notify and get callbacks. */
1041 virtio_device_ready(vdev);
1042
1033 /* tell the remote processor it can start sending messages */ 1043 /* tell the remote processor it can start sending messages */
1034 virtqueue_kick(vrp->rvq); 1044 /*
1045 * this might be concurrent with callbacks, but we are only
1046 * doing notify, not a full kick here, so that's ok.
1047 */
1048 if (notify)
1049 virtqueue_notify(vrp->rvq);
1035 1050
1036 dev_info(&vdev->dev, "rpmsg host is online\n"); 1051 dev_info(&vdev->dev, "rpmsg host is online\n");
1037 1052
diff --git a/drivers/rtc/rtc-at91rm9200.c b/drivers/rtc/rtc-at91rm9200.c
index 70a5d94cc766..b283a1a573b3 100644
--- a/drivers/rtc/rtc-at91rm9200.c
+++ b/drivers/rtc/rtc-at91rm9200.c
@@ -31,6 +31,7 @@
31#include <linux/io.h> 31#include <linux/io.h>
32#include <linux/of.h> 32#include <linux/of.h>
33#include <linux/of_device.h> 33#include <linux/of_device.h>
34#include <linux/suspend.h>
34#include <linux/uaccess.h> 35#include <linux/uaccess.h>
35 36
36#include "rtc-at91rm9200.h" 37#include "rtc-at91rm9200.h"
@@ -54,6 +55,10 @@ static void __iomem *at91_rtc_regs;
54static int irq; 55static int irq;
55static DEFINE_SPINLOCK(at91_rtc_lock); 56static DEFINE_SPINLOCK(at91_rtc_lock);
56static u32 at91_rtc_shadow_imr; 57static u32 at91_rtc_shadow_imr;
58static bool suspended;
59static DEFINE_SPINLOCK(suspended_lock);
60static unsigned long cached_events;
61static u32 at91_rtc_imr;
57 62
58static void at91_rtc_write_ier(u32 mask) 63static void at91_rtc_write_ier(u32 mask)
59{ 64{
@@ -290,7 +295,9 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
290 struct rtc_device *rtc = platform_get_drvdata(pdev); 295 struct rtc_device *rtc = platform_get_drvdata(pdev);
291 unsigned int rtsr; 296 unsigned int rtsr;
292 unsigned long events = 0; 297 unsigned long events = 0;
298 int ret = IRQ_NONE;
293 299
300 spin_lock(&suspended_lock);
294 rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr(); 301 rtsr = at91_rtc_read(AT91_RTC_SR) & at91_rtc_read_imr();
295 if (rtsr) { /* this interrupt is shared! Is it ours? */ 302 if (rtsr) { /* this interrupt is shared! Is it ours? */
296 if (rtsr & AT91_RTC_ALARM) 303 if (rtsr & AT91_RTC_ALARM)
@@ -304,14 +311,22 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *dev_id)
304 311
305 at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */ 312 at91_rtc_write(AT91_RTC_SCCR, rtsr); /* clear status reg */
306 313
307 rtc_update_irq(rtc, 1, events); 314 if (!suspended) {
315 rtc_update_irq(rtc, 1, events);
308 316
309 dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n", __func__, 317 dev_dbg(&pdev->dev, "%s(): num=%ld, events=0x%02lx\n",
310 events >> 8, events & 0x000000FF); 318 __func__, events >> 8, events & 0x000000FF);
319 } else {
320 cached_events |= events;
321 at91_rtc_write_idr(at91_rtc_imr);
322 pm_system_wakeup();
323 }
311 324
312 return IRQ_HANDLED; 325 ret = IRQ_HANDLED;
313 } 326 }
314 return IRQ_NONE; /* not handled */ 327 spin_unlock(&suspended_lock);
328
329 return ret;
315} 330}
316 331
317static const struct at91_rtc_config at91rm9200_config = { 332static const struct at91_rtc_config at91rm9200_config = {
@@ -401,8 +416,8 @@ static int __init at91_rtc_probe(struct platform_device *pdev)
401 AT91_RTC_CALEV); 416 AT91_RTC_CALEV);
402 417
403 ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt, 418 ret = devm_request_irq(&pdev->dev, irq, at91_rtc_interrupt,
404 IRQF_SHARED, 419 IRQF_SHARED | IRQF_COND_SUSPEND,
405 "at91_rtc", pdev); 420 "at91_rtc", pdev);
406 if (ret) { 421 if (ret) {
407 dev_err(&pdev->dev, "IRQ %d already in use.\n", irq); 422 dev_err(&pdev->dev, "IRQ %d already in use.\n", irq);
408 return ret; 423 return ret;
@@ -454,8 +469,6 @@ static void at91_rtc_shutdown(struct platform_device *pdev)
454 469
455/* AT91RM9200 RTC Power management control */ 470/* AT91RM9200 RTC Power management control */
456 471
457static u32 at91_rtc_imr;
458
459static int at91_rtc_suspend(struct device *dev) 472static int at91_rtc_suspend(struct device *dev)
460{ 473{
461 /* this IRQ is shared with DBGU and other hardware which isn't 474 /* this IRQ is shared with DBGU and other hardware which isn't
@@ -464,21 +477,42 @@ static int at91_rtc_suspend(struct device *dev)
464 at91_rtc_imr = at91_rtc_read_imr() 477 at91_rtc_imr = at91_rtc_read_imr()
465 & (AT91_RTC_ALARM|AT91_RTC_SECEV); 478 & (AT91_RTC_ALARM|AT91_RTC_SECEV);
466 if (at91_rtc_imr) { 479 if (at91_rtc_imr) {
467 if (device_may_wakeup(dev)) 480 if (device_may_wakeup(dev)) {
481 unsigned long flags;
482
468 enable_irq_wake(irq); 483 enable_irq_wake(irq);
469 else 484
485 spin_lock_irqsave(&suspended_lock, flags);
486 suspended = true;
487 spin_unlock_irqrestore(&suspended_lock, flags);
488 } else {
470 at91_rtc_write_idr(at91_rtc_imr); 489 at91_rtc_write_idr(at91_rtc_imr);
490 }
471 } 491 }
472 return 0; 492 return 0;
473} 493}
474 494
475static int at91_rtc_resume(struct device *dev) 495static int at91_rtc_resume(struct device *dev)
476{ 496{
497 struct rtc_device *rtc = dev_get_drvdata(dev);
498
477 if (at91_rtc_imr) { 499 if (at91_rtc_imr) {
478 if (device_may_wakeup(dev)) 500 if (device_may_wakeup(dev)) {
501 unsigned long flags;
502
503 spin_lock_irqsave(&suspended_lock, flags);
504
505 if (cached_events) {
506 rtc_update_irq(rtc, 1, cached_events);
507 cached_events = 0;
508 }
509
510 suspended = false;
511 spin_unlock_irqrestore(&suspended_lock, flags);
512
479 disable_irq_wake(irq); 513 disable_irq_wake(irq);
480 else 514 }
481 at91_rtc_write_ier(at91_rtc_imr); 515 at91_rtc_write_ier(at91_rtc_imr);
482 } 516 }
483 return 0; 517 return 0;
484} 518}
diff --git a/drivers/rtc/rtc-at91sam9.c b/drivers/rtc/rtc-at91sam9.c
index 2183fd2750ab..5ccaee32df72 100644
--- a/drivers/rtc/rtc-at91sam9.c
+++ b/drivers/rtc/rtc-at91sam9.c
@@ -23,6 +23,7 @@
23#include <linux/io.h> 23#include <linux/io.h>
24#include <linux/mfd/syscon.h> 24#include <linux/mfd/syscon.h>
25#include <linux/regmap.h> 25#include <linux/regmap.h>
26#include <linux/suspend.h>
26#include <linux/clk.h> 27#include <linux/clk.h>
27 28
28/* 29/*
@@ -77,6 +78,9 @@ struct sam9_rtc {
77 unsigned int gpbr_offset; 78 unsigned int gpbr_offset;
78 int irq; 79 int irq;
79 struct clk *sclk; 80 struct clk *sclk;
81 bool suspended;
82 unsigned long events;
83 spinlock_t lock;
80}; 84};
81 85
82#define rtt_readl(rtc, field) \ 86#define rtt_readl(rtc, field) \
@@ -271,14 +275,9 @@ static int at91_rtc_proc(struct device *dev, struct seq_file *seq)
271 return 0; 275 return 0;
272} 276}
273 277
274/* 278static irqreturn_t at91_rtc_cache_events(struct sam9_rtc *rtc)
275 * IRQ handler for the RTC
276 */
277static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc)
278{ 279{
279 struct sam9_rtc *rtc = _rtc;
280 u32 sr, mr; 280 u32 sr, mr;
281 unsigned long events = 0;
282 281
283 /* Shared interrupt may be for another device. Note: reading 282 /* Shared interrupt may be for another device. Note: reading
284 * SR clears it, so we must only read it in this irq handler! 283 * SR clears it, so we must only read it in this irq handler!
@@ -290,18 +289,54 @@ static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc)
290 289
291 /* alarm status */ 290 /* alarm status */
292 if (sr & AT91_RTT_ALMS) 291 if (sr & AT91_RTT_ALMS)
293 events |= (RTC_AF | RTC_IRQF); 292 rtc->events |= (RTC_AF | RTC_IRQF);
294 293
295 /* timer update/increment */ 294 /* timer update/increment */
296 if (sr & AT91_RTT_RTTINC) 295 if (sr & AT91_RTT_RTTINC)
297 events |= (RTC_UF | RTC_IRQF); 296 rtc->events |= (RTC_UF | RTC_IRQF);
297
298 return IRQ_HANDLED;
299}
300
301static void at91_rtc_flush_events(struct sam9_rtc *rtc)
302{
303 if (!rtc->events)
304 return;
298 305
299 rtc_update_irq(rtc->rtcdev, 1, events); 306 rtc_update_irq(rtc->rtcdev, 1, rtc->events);
307 rtc->events = 0;
300 308
301 pr_debug("%s: num=%ld, events=0x%02lx\n", __func__, 309 pr_debug("%s: num=%ld, events=0x%02lx\n", __func__,
302 events >> 8, events & 0x000000FF); 310 rtc->events >> 8, rtc->events & 0x000000FF);
311}
303 312
304 return IRQ_HANDLED; 313/*
314 * IRQ handler for the RTC
315 */
316static irqreturn_t at91_rtc_interrupt(int irq, void *_rtc)
317{
318 struct sam9_rtc *rtc = _rtc;
319 int ret;
320
321 spin_lock(&rtc->lock);
322
323 ret = at91_rtc_cache_events(rtc);
324
325 /* We're called in suspended state */
326 if (rtc->suspended) {
327 /* Mask irqs coming from this peripheral */
328 rtt_writel(rtc, MR,
329 rtt_readl(rtc, MR) &
330 ~(AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN));
331 /* Trigger a system wakeup */
332 pm_system_wakeup();
333 } else {
334 at91_rtc_flush_events(rtc);
335 }
336
337 spin_unlock(&rtc->lock);
338
339 return ret;
305} 340}
306 341
307static const struct rtc_class_ops at91_rtc_ops = { 342static const struct rtc_class_ops at91_rtc_ops = {
@@ -421,7 +456,8 @@ static int at91_rtc_probe(struct platform_device *pdev)
421 456
422 /* register irq handler after we know what name we'll use */ 457 /* register irq handler after we know what name we'll use */
423 ret = devm_request_irq(&pdev->dev, rtc->irq, at91_rtc_interrupt, 458 ret = devm_request_irq(&pdev->dev, rtc->irq, at91_rtc_interrupt,
424 IRQF_SHARED, dev_name(&rtc->rtcdev->dev), rtc); 459 IRQF_SHARED | IRQF_COND_SUSPEND,
460 dev_name(&rtc->rtcdev->dev), rtc);
425 if (ret) { 461 if (ret) {
426 dev_dbg(&pdev->dev, "can't share IRQ %d?\n", rtc->irq); 462 dev_dbg(&pdev->dev, "can't share IRQ %d?\n", rtc->irq);
427 return ret; 463 return ret;
@@ -482,7 +518,12 @@ static int at91_rtc_suspend(struct device *dev)
482 rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN); 518 rtc->imr = mr & (AT91_RTT_ALMIEN | AT91_RTT_RTTINCIEN);
483 if (rtc->imr) { 519 if (rtc->imr) {
484 if (device_may_wakeup(dev) && (mr & AT91_RTT_ALMIEN)) { 520 if (device_may_wakeup(dev) && (mr & AT91_RTT_ALMIEN)) {
521 unsigned long flags;
522
485 enable_irq_wake(rtc->irq); 523 enable_irq_wake(rtc->irq);
524 spin_lock_irqsave(&rtc->lock, flags);
525 rtc->suspended = true;
526 spin_unlock_irqrestore(&rtc->lock, flags);
486 /* don't let RTTINC cause wakeups */ 527 /* don't let RTTINC cause wakeups */
487 if (mr & AT91_RTT_RTTINCIEN) 528 if (mr & AT91_RTT_RTTINCIEN)
488 rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN); 529 rtt_writel(rtc, MR, mr & ~AT91_RTT_RTTINCIEN);
@@ -499,10 +540,18 @@ static int at91_rtc_resume(struct device *dev)
499 u32 mr; 540 u32 mr;
500 541
501 if (rtc->imr) { 542 if (rtc->imr) {
543 unsigned long flags;
544
502 if (device_may_wakeup(dev)) 545 if (device_may_wakeup(dev))
503 disable_irq_wake(rtc->irq); 546 disable_irq_wake(rtc->irq);
504 mr = rtt_readl(rtc, MR); 547 mr = rtt_readl(rtc, MR);
505 rtt_writel(rtc, MR, mr | rtc->imr); 548 rtt_writel(rtc, MR, mr | rtc->imr);
549
550 spin_lock_irqsave(&rtc->lock, flags);
551 rtc->suspended = false;
552 at91_rtc_cache_events(rtc);
553 at91_rtc_flush_events(rtc);
554 spin_unlock_irqrestore(&rtc->lock, flags);
506 } 555 }
507 556
508 return 0; 557 return 0;
diff --git a/drivers/rtc/rtc-ds1685.c b/drivers/rtc/rtc-ds1685.c
index 8c3bfcb115b7..803869c7d7c2 100644
--- a/drivers/rtc/rtc-ds1685.c
+++ b/drivers/rtc/rtc-ds1685.c
@@ -399,21 +399,21 @@ ds1685_rtc_read_alarm(struct device *dev, struct rtc_wkalrm *alrm)
399 * of this RTC chip. We check for it anyways in case support is 399 * of this RTC chip. We check for it anyways in case support is
400 * added in the future. 400 * added in the future.
401 */ 401 */
402 if (unlikely((seconds >= 0xc0) && (seconds <= 0xff))) 402 if (unlikely(seconds >= 0xc0))
403 alrm->time.tm_sec = -1; 403 alrm->time.tm_sec = -1;
404 else 404 else
405 alrm->time.tm_sec = ds1685_rtc_bcd2bin(rtc, seconds, 405 alrm->time.tm_sec = ds1685_rtc_bcd2bin(rtc, seconds,
406 RTC_SECS_BCD_MASK, 406 RTC_SECS_BCD_MASK,
407 RTC_SECS_BIN_MASK); 407 RTC_SECS_BIN_MASK);
408 408
409 if (unlikely((minutes >= 0xc0) && (minutes <= 0xff))) 409 if (unlikely(minutes >= 0xc0))
410 alrm->time.tm_min = -1; 410 alrm->time.tm_min = -1;
411 else 411 else
412 alrm->time.tm_min = ds1685_rtc_bcd2bin(rtc, minutes, 412 alrm->time.tm_min = ds1685_rtc_bcd2bin(rtc, minutes,
413 RTC_MINS_BCD_MASK, 413 RTC_MINS_BCD_MASK,
414 RTC_MINS_BIN_MASK); 414 RTC_MINS_BIN_MASK);
415 415
416 if (unlikely((hours >= 0xc0) && (hours <= 0xff))) 416 if (unlikely(hours >= 0xc0))
417 alrm->time.tm_hour = -1; 417 alrm->time.tm_hour = -1;
418 else 418 else
419 alrm->time.tm_hour = ds1685_rtc_bcd2bin(rtc, hours, 419 alrm->time.tm_hour = ds1685_rtc_bcd2bin(rtc, hours,
@@ -472,13 +472,13 @@ ds1685_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
472 * field, and we only support four fields. We put the support 472 * field, and we only support four fields. We put the support
473 * here anyways for the future. 473 * here anyways for the future.
474 */ 474 */
475 if (unlikely((seconds >= 0xc0) && (seconds <= 0xff))) 475 if (unlikely(seconds >= 0xc0))
476 seconds = 0xff; 476 seconds = 0xff;
477 477
478 if (unlikely((minutes >= 0xc0) && (minutes <= 0xff))) 478 if (unlikely(minutes >= 0xc0))
479 minutes = 0xff; 479 minutes = 0xff;
480 480
481 if (unlikely((hours >= 0xc0) && (hours <= 0xff))) 481 if (unlikely(hours >= 0xc0))
482 hours = 0xff; 482 hours = 0xff;
483 483
484 alrm->time.tm_mon = -1; 484 alrm->time.tm_mon = -1;
@@ -528,7 +528,6 @@ ds1685_rtc_set_alarm(struct device *dev, struct rtc_wkalrm *alrm)
528/* ----------------------------------------------------------------------- */ 528/* ----------------------------------------------------------------------- */
529/* /dev/rtcX Interface functions */ 529/* /dev/rtcX Interface functions */
530 530
531#ifdef CONFIG_RTC_INTF_DEV
532/** 531/**
533 * ds1685_rtc_alarm_irq_enable - replaces ioctl() RTC_AIE on/off. 532 * ds1685_rtc_alarm_irq_enable - replaces ioctl() RTC_AIE on/off.
534 * @dev: pointer to device structure. 533 * @dev: pointer to device structure.
@@ -557,7 +556,6 @@ ds1685_rtc_alarm_irq_enable(struct device *dev, unsigned int enabled)
557 556
558 return 0; 557 return 0;
559} 558}
560#endif
561/* ----------------------------------------------------------------------- */ 559/* ----------------------------------------------------------------------- */
562 560
563 561
@@ -1612,7 +1610,7 @@ ds1685_rtc_sysfs_time_regs_show(struct device *dev,
1612 ds1685_rtc_sysfs_time_regs_lookup(attr->attr.name, false); 1610 ds1685_rtc_sysfs_time_regs_lookup(attr->attr.name, false);
1613 1611
1614 /* Make sure we actually matched something. */ 1612 /* Make sure we actually matched something. */
1615 if (!bcd_reg_info && !bin_reg_info) 1613 if (!bcd_reg_info || !bin_reg_info)
1616 return -EINVAL; 1614 return -EINVAL;
1617 1615
1618 /* bcd_reg_info->reg == bin_reg_info->reg. */ 1616 /* bcd_reg_info->reg == bin_reg_info->reg. */
@@ -1650,7 +1648,7 @@ ds1685_rtc_sysfs_time_regs_store(struct device *dev,
1650 return -EINVAL; 1648 return -EINVAL;
1651 1649
1652 /* Make sure we actually matched something. */ 1650 /* Make sure we actually matched something. */
1653 if (!bcd_reg_info && !bin_reg_info) 1651 if (!bcd_reg_info || !bin_reg_info)
1654 return -EINVAL; 1652 return -EINVAL;
1655 1653
1656 /* Check for a valid range. */ 1654 /* Check for a valid range. */
diff --git a/drivers/rtc/rtc-s3c.c b/drivers/rtc/rtc-s3c.c
index 4241eeab3386..f4cf6851fae9 100644
--- a/drivers/rtc/rtc-s3c.c
+++ b/drivers/rtc/rtc-s3c.c
@@ -849,6 +849,7 @@ static struct s3c_rtc_data const s3c2443_rtc_data = {
849 849
850static struct s3c_rtc_data const s3c6410_rtc_data = { 850static struct s3c_rtc_data const s3c6410_rtc_data = {
851 .max_user_freq = 32768, 851 .max_user_freq = 32768,
852 .needs_src_clk = true,
852 .irq_handler = s3c6410_rtc_irq, 853 .irq_handler = s3c6410_rtc_irq,
853 .set_freq = s3c6410_rtc_setfreq, 854 .set_freq = s3c6410_rtc_setfreq,
854 .enable_tick = s3c6410_rtc_enable_tick, 855 .enable_tick = s3c6410_rtc_enable_tick,
diff --git a/drivers/s390/block/dcssblk.c b/drivers/s390/block/dcssblk.c
index 96128cb009f3..da212813f2d5 100644
--- a/drivers/s390/block/dcssblk.c
+++ b/drivers/s390/block/dcssblk.c
@@ -547,7 +547,7 @@ dcssblk_add_store(struct device *dev, struct device_attribute *attr, const char
547 * parse input 547 * parse input
548 */ 548 */
549 num_of_segments = 0; 549 num_of_segments = 0;
550 for (i = 0; ((buf[i] != '\0') && (buf[i] != '\n') && i < count); i++) { 550 for (i = 0; (i < count && (buf[i] != '\0') && (buf[i] != '\n')); i++) {
551 for (j = i; (buf[j] != ':') && 551 for (j = i; (buf[j] != ':') &&
552 (buf[j] != '\0') && 552 (buf[j] != '\0') &&
553 (buf[j] != '\n') && 553 (buf[j] != '\n') &&
diff --git a/drivers/s390/block/scm_blk_cluster.c b/drivers/s390/block/scm_blk_cluster.c
index 09db45296eed..7497ddde2dd6 100644
--- a/drivers/s390/block/scm_blk_cluster.c
+++ b/drivers/s390/block/scm_blk_cluster.c
@@ -92,7 +92,7 @@ bool scm_reserve_cluster(struct scm_request *scmrq)
92 add = 0; 92 add = 0;
93 continue; 93 continue;
94 } 94 }
95 for (pos = 0; pos <= iter->aob->request.msb_count; pos++) { 95 for (pos = 0; pos < iter->aob->request.msb_count; pos++) {
96 if (clusters_intersect(req, iter->request[pos]) && 96 if (clusters_intersect(req, iter->request[pos]) &&
97 (rq_data_dir(req) == WRITE || 97 (rq_data_dir(req) == WRITE ||
98 rq_data_dir(iter->request[pos]) == WRITE)) { 98 rq_data_dir(iter->request[pos]) == WRITE)) {
diff --git a/drivers/scsi/am53c974.c b/drivers/scsi/am53c974.c
index aa3e2c7cd83c..a6f5ee80fadc 100644
--- a/drivers/scsi/am53c974.c
+++ b/drivers/scsi/am53c974.c
@@ -178,12 +178,6 @@ static void pci_esp_dma_drain(struct esp *esp)
178 break; 178 break;
179 cpu_relax(); 179 cpu_relax();
180 } 180 }
181 if (resid > 1) {
182 /* FIFO not cleared */
183 shost_printk(KERN_INFO, esp->host,
184 "FIFO not cleared, %d bytes left\n",
185 resid);
186 }
187 181
188 /* 182 /*
189 * When there is a residual BCMPLT will never be set 183 * When there is a residual BCMPLT will never be set
diff --git a/drivers/scsi/be2iscsi/be_main.c b/drivers/scsi/be2iscsi/be_main.c
index 96241b20fd2c..a7cc61837818 100644
--- a/drivers/scsi/be2iscsi/be_main.c
+++ b/drivers/scsi/be2iscsi/be_main.c
@@ -585,7 +585,6 @@ static struct beiscsi_hba *beiscsi_hba_alloc(struct pci_dev *pcidev)
585 "beiscsi_hba_alloc - iscsi_host_alloc failed\n"); 585 "beiscsi_hba_alloc - iscsi_host_alloc failed\n");
586 return NULL; 586 return NULL;
587 } 587 }
588 shost->dma_boundary = pcidev->dma_mask;
589 shost->max_id = BE2_MAX_SESSIONS; 588 shost->max_id = BE2_MAX_SESSIONS;
590 shost->max_channel = 0; 589 shost->max_channel = 0;
591 shost->max_cmd_len = BEISCSI_MAX_CMD_LEN; 590 shost->max_cmd_len = BEISCSI_MAX_CMD_LEN;
diff --git a/drivers/scsi/hpsa.c b/drivers/scsi/hpsa.c
index 95d581c45413..a1cfbd3dda47 100644
--- a/drivers/scsi/hpsa.c
+++ b/drivers/scsi/hpsa.c
@@ -6831,10 +6831,8 @@ static struct workqueue_struct *hpsa_create_controller_wq(struct ctlr_info *h,
6831 char *name) 6831 char *name)
6832{ 6832{
6833 struct workqueue_struct *wq = NULL; 6833 struct workqueue_struct *wq = NULL;
6834 char wq_name[20];
6835 6834
6836 snprintf(wq_name, sizeof(wq_name), "%s_%d_hpsa", name, h->ctlr); 6835 wq = alloc_ordered_workqueue("%s_%d_hpsa", 0, name, h->ctlr);
6837 wq = alloc_ordered_workqueue(wq_name, 0);
6838 if (!wq) 6836 if (!wq)
6839 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name); 6837 dev_err(&h->pdev->dev, "failed to create %s workqueue\n", name);
6840 6838
diff --git a/drivers/scsi/libsas/sas_discover.c b/drivers/scsi/libsas/sas_discover.c
index 62b58d38ce2e..60de66252fa2 100644
--- a/drivers/scsi/libsas/sas_discover.c
+++ b/drivers/scsi/libsas/sas_discover.c
@@ -500,6 +500,7 @@ static void sas_revalidate_domain(struct work_struct *work)
500 struct sas_discovery_event *ev = to_sas_discovery_event(work); 500 struct sas_discovery_event *ev = to_sas_discovery_event(work);
501 struct asd_sas_port *port = ev->port; 501 struct asd_sas_port *port = ev->port;
502 struct sas_ha_struct *ha = port->ha; 502 struct sas_ha_struct *ha = port->ha;
503 struct domain_device *ddev = port->port_dev;
503 504
504 /* prevent revalidation from finding sata links in recovery */ 505 /* prevent revalidation from finding sata links in recovery */
505 mutex_lock(&ha->disco_mutex); 506 mutex_lock(&ha->disco_mutex);
@@ -514,8 +515,9 @@ static void sas_revalidate_domain(struct work_struct *work)
514 SAS_DPRINTK("REVALIDATING DOMAIN on port %d, pid:%d\n", port->id, 515 SAS_DPRINTK("REVALIDATING DOMAIN on port %d, pid:%d\n", port->id,
515 task_pid_nr(current)); 516 task_pid_nr(current));
516 517
517 if (port->port_dev) 518 if (ddev && (ddev->dev_type == SAS_FANOUT_EXPANDER_DEVICE ||
518 res = sas_ex_revalidate_domain(port->port_dev); 519 ddev->dev_type == SAS_EDGE_EXPANDER_DEVICE))
520 res = sas_ex_revalidate_domain(ddev);
519 521
520 SAS_DPRINTK("done REVALIDATING DOMAIN on port %d, pid:%d, res 0x%x\n", 522 SAS_DPRINTK("done REVALIDATING DOMAIN on port %d, pid:%d, res 0x%x\n",
521 port->id, task_pid_nr(current), res); 523 port->id, task_pid_nr(current), res);
diff --git a/drivers/scsi/qla2xxx/tcm_qla2xxx.c b/drivers/scsi/qla2xxx/tcm_qla2xxx.c
index 73f9feecda72..ab4879e12ea7 100644
--- a/drivers/scsi/qla2xxx/tcm_qla2xxx.c
+++ b/drivers/scsi/qla2xxx/tcm_qla2xxx.c
@@ -1570,9 +1570,7 @@ static int tcm_qla2xxx_check_initiator_node_acl(
1570 * match the format by tcm_qla2xxx explict ConfigFS NodeACLs. 1570 * match the format by tcm_qla2xxx explict ConfigFS NodeACLs.
1571 */ 1571 */
1572 memset(&port_name, 0, 36); 1572 memset(&port_name, 0, 36);
1573 snprintf(port_name, 36, "%02x:%02x:%02x:%02x:%02x:%02x:%02x:%02x", 1573 snprintf(port_name, sizeof(port_name), "%8phC", fc_wwpn);
1574 fc_wwpn[0], fc_wwpn[1], fc_wwpn[2], fc_wwpn[3], fc_wwpn[4],
1575 fc_wwpn[5], fc_wwpn[6], fc_wwpn[7]);
1576 /* 1574 /*
1577 * Locate our struct se_node_acl either from an explict NodeACL created 1575 * Locate our struct se_node_acl either from an explict NodeACL created
1578 * via ConfigFS, or via running in TPG demo mode. 1576 * via ConfigFS, or via running in TPG demo mode.
@@ -1598,7 +1596,7 @@ static int tcm_qla2xxx_check_initiator_node_acl(
1598 /* 1596 /*
1599 * Finally register the new FC Nexus with TCM 1597 * Finally register the new FC Nexus with TCM
1600 */ 1598 */
1601 __transport_register_session(se_nacl->se_tpg, se_nacl, se_sess, sess); 1599 transport_register_session(se_nacl->se_tpg, se_nacl, se_sess, sess);
1602 1600
1603 return 0; 1601 return 0;
1604} 1602}
diff --git a/drivers/scsi/sg.c b/drivers/scsi/sg.c
index 0cbc1fb45f10..2270bd51f9c2 100644
--- a/drivers/scsi/sg.c
+++ b/drivers/scsi/sg.c
@@ -546,7 +546,7 @@ static ssize_t
546sg_new_read(Sg_fd * sfp, char __user *buf, size_t count, Sg_request * srp) 546sg_new_read(Sg_fd * sfp, char __user *buf, size_t count, Sg_request * srp)
547{ 547{
548 sg_io_hdr_t *hp = &srp->header; 548 sg_io_hdr_t *hp = &srp->header;
549 int err = 0; 549 int err = 0, err2;
550 int len; 550 int len;
551 551
552 if (count < SZ_SG_IO_HDR) { 552 if (count < SZ_SG_IO_HDR) {
@@ -575,8 +575,8 @@ sg_new_read(Sg_fd * sfp, char __user *buf, size_t count, Sg_request * srp)
575 goto err_out; 575 goto err_out;
576 } 576 }
577err_out: 577err_out:
578 err = sg_finish_rem_req(srp); 578 err2 = sg_finish_rem_req(srp);
579 return (0 == err) ? count : err; 579 return err ? : err2 ? : count;
580} 580}
581 581
582static ssize_t 582static ssize_t
@@ -1335,6 +1335,17 @@ sg_rq_end_io(struct request *rq, int uptodate)
1335 } 1335 }
1336 /* Rely on write phase to clean out srp status values, so no "else" */ 1336 /* Rely on write phase to clean out srp status values, so no "else" */
1337 1337
1338 /*
1339 * Free the request as soon as it is complete so that its resources
1340 * can be reused without waiting for userspace to read() the
1341 * result. But keep the associated bio (if any) around until
1342 * blk_rq_unmap_user() can be called from user context.
1343 */
1344 srp->rq = NULL;
1345 if (rq->cmd != rq->__cmd)
1346 kfree(rq->cmd);
1347 __blk_put_request(rq->q, rq);
1348
1338 write_lock_irqsave(&sfp->rq_list_lock, iflags); 1349 write_lock_irqsave(&sfp->rq_list_lock, iflags);
1339 if (unlikely(srp->orphan)) { 1350 if (unlikely(srp->orphan)) {
1340 if (sfp->keep_orphan) 1351 if (sfp->keep_orphan)
@@ -1669,7 +1680,22 @@ sg_start_req(Sg_request *srp, unsigned char *cmd)
1669 return -ENOMEM; 1680 return -ENOMEM;
1670 } 1681 }
1671 1682
1672 rq = blk_get_request(q, rw, GFP_ATOMIC); 1683 /*
1684 * NOTE
1685 *
1686 * With scsi-mq enabled, there are a fixed number of preallocated
1687 * requests equal in number to shost->can_queue. If all of the
1688 * preallocated requests are already in use, then using GFP_ATOMIC with
1689 * blk_get_request() will return -EWOULDBLOCK, whereas using GFP_KERNEL
1690 * will cause blk_get_request() to sleep until an active command
1691 * completes, freeing up a request. Neither option is ideal, but
1692 * GFP_KERNEL is the better choice to prevent userspace from getting an
1693 * unexpected EWOULDBLOCK.
1694 *
1695 * With scsi-mq disabled, blk_get_request() with GFP_KERNEL usually
1696 * does not sleep except under memory pressure.
1697 */
1698 rq = blk_get_request(q, rw, GFP_KERNEL);
1673 if (IS_ERR(rq)) { 1699 if (IS_ERR(rq)) {
1674 kfree(long_cmdp); 1700 kfree(long_cmdp);
1675 return PTR_ERR(rq); 1701 return PTR_ERR(rq);
@@ -1759,10 +1785,10 @@ sg_finish_rem_req(Sg_request *srp)
1759 SCSI_LOG_TIMEOUT(4, sg_printk(KERN_INFO, sfp->parentdp, 1785 SCSI_LOG_TIMEOUT(4, sg_printk(KERN_INFO, sfp->parentdp,
1760 "sg_finish_rem_req: res_used=%d\n", 1786 "sg_finish_rem_req: res_used=%d\n",
1761 (int) srp->res_used)); 1787 (int) srp->res_used));
1762 if (srp->rq) { 1788 if (srp->bio)
1763 if (srp->bio) 1789 ret = blk_rq_unmap_user(srp->bio);
1764 ret = blk_rq_unmap_user(srp->bio);
1765 1790
1791 if (srp->rq) {
1766 if (srp->rq->cmd != srp->rq->__cmd) 1792 if (srp->rq->cmd != srp->rq->__cmd)
1767 kfree(srp->rq->cmd); 1793 kfree(srp->rq->cmd);
1768 blk_put_request(srp->rq); 1794 blk_put_request(srp->rq);
diff --git a/drivers/scsi/wd719x.c b/drivers/scsi/wd719x.c
index 7702664d7ed3..289ad016d925 100644
--- a/drivers/scsi/wd719x.c
+++ b/drivers/scsi/wd719x.c
@@ -870,6 +870,7 @@ fail_free_params:
870} 870}
871 871
872static struct scsi_host_template wd719x_template = { 872static struct scsi_host_template wd719x_template = {
873 .module = THIS_MODULE,
873 .name = "Western Digital 719x", 874 .name = "Western Digital 719x",
874 .queuecommand = wd719x_queuecommand, 875 .queuecommand = wd719x_queuecommand,
875 .eh_abort_handler = wd719x_abort, 876 .eh_abort_handler = wd719x_abort,
diff --git a/drivers/sh/pm_runtime.c b/drivers/sh/pm_runtime.c
index f3ee439d6f0e..cd4c293f0dd0 100644
--- a/drivers/sh/pm_runtime.c
+++ b/drivers/sh/pm_runtime.c
@@ -81,7 +81,9 @@ static int __init sh_pm_runtime_init(void)
81 if (!of_machine_is_compatible("renesas,emev2") && 81 if (!of_machine_is_compatible("renesas,emev2") &&
82 !of_machine_is_compatible("renesas,r7s72100") && 82 !of_machine_is_compatible("renesas,r7s72100") &&
83 !of_machine_is_compatible("renesas,r8a73a4") && 83 !of_machine_is_compatible("renesas,r8a73a4") &&
84#ifndef CONFIG_PM_GENERIC_DOMAINS_OF
84 !of_machine_is_compatible("renesas,r8a7740") && 85 !of_machine_is_compatible("renesas,r8a7740") &&
86#endif
85 !of_machine_is_compatible("renesas,r8a7778") && 87 !of_machine_is_compatible("renesas,r8a7778") &&
86 !of_machine_is_compatible("renesas,r8a7779") && 88 !of_machine_is_compatible("renesas,r8a7779") &&
87 !of_machine_is_compatible("renesas,r8a7790") && 89 !of_machine_is_compatible("renesas,r8a7790") &&
diff --git a/drivers/spi/spi-atmel.c b/drivers/spi/spi-atmel.c
index 9af7841f2e8c..06de34001c66 100644
--- a/drivers/spi/spi-atmel.c
+++ b/drivers/spi/spi-atmel.c
@@ -764,17 +764,17 @@ static void atmel_spi_pdc_next_xfer(struct spi_master *master,
764 (unsigned long long)xfer->rx_dma); 764 (unsigned long long)xfer->rx_dma);
765 } 765 }
766 766
767 /* REVISIT: We're waiting for ENDRX before we start the next 767 /* REVISIT: We're waiting for RXBUFF before we start the next
768 * transfer because we need to handle some difficult timing 768 * transfer because we need to handle some difficult timing
769 * issues otherwise. If we wait for ENDTX in one transfer and 769 * issues otherwise. If we wait for TXBUFE in one transfer and
770 * then starts waiting for ENDRX in the next, it's difficult 770 * then starts waiting for RXBUFF in the next, it's difficult
771 * to tell the difference between the ENDRX interrupt we're 771 * to tell the difference between the RXBUFF interrupt we're
772 * actually waiting for and the ENDRX interrupt of the 772 * actually waiting for and the RXBUFF interrupt of the
773 * previous transfer. 773 * previous transfer.
774 * 774 *
775 * It should be doable, though. Just not now... 775 * It should be doable, though. Just not now...
776 */ 776 */
777 spi_writel(as, IER, SPI_BIT(ENDRX) | SPI_BIT(OVRES)); 777 spi_writel(as, IER, SPI_BIT(RXBUFF) | SPI_BIT(OVRES));
778 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN)); 778 spi_writel(as, PTCR, SPI_BIT(TXTEN) | SPI_BIT(RXTEN));
779} 779}
780 780
diff --git a/drivers/spi/spi-dw-mid.c b/drivers/spi/spi-dw-mid.c
index a0197fd4e95c..3ce39d10fafb 100644
--- a/drivers/spi/spi-dw-mid.c
+++ b/drivers/spi/spi-dw-mid.c
@@ -139,6 +139,9 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_tx(struct dw_spi *dws)
139 1, 139 1,
140 DMA_MEM_TO_DEV, 140 DMA_MEM_TO_DEV,
141 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 141 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
142 if (!txdesc)
143 return NULL;
144
142 txdesc->callback = dw_spi_dma_tx_done; 145 txdesc->callback = dw_spi_dma_tx_done;
143 txdesc->callback_param = dws; 146 txdesc->callback_param = dws;
144 147
@@ -184,6 +187,9 @@ static struct dma_async_tx_descriptor *dw_spi_dma_prepare_rx(struct dw_spi *dws)
184 1, 187 1,
185 DMA_DEV_TO_MEM, 188 DMA_DEV_TO_MEM,
186 DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 189 DMA_PREP_INTERRUPT | DMA_CTRL_ACK);
190 if (!rxdesc)
191 return NULL;
192
187 rxdesc->callback = dw_spi_dma_rx_done; 193 rxdesc->callback = dw_spi_dma_rx_done;
188 rxdesc->callback_param = dws; 194 rxdesc->callback_param = dws;
189 195
diff --git a/drivers/spi/spi-dw-pci.c b/drivers/spi/spi-dw-pci.c
index 5ba331047cbe..6d331e0db331 100644
--- a/drivers/spi/spi-dw-pci.c
+++ b/drivers/spi/spi-dw-pci.c
@@ -36,13 +36,13 @@ struct spi_pci_desc {
36 36
37static struct spi_pci_desc spi_pci_mid_desc_1 = { 37static struct spi_pci_desc spi_pci_mid_desc_1 = {
38 .setup = dw_spi_mid_init, 38 .setup = dw_spi_mid_init,
39 .num_cs = 32, 39 .num_cs = 5,
40 .bus_num = 0, 40 .bus_num = 0,
41}; 41};
42 42
43static struct spi_pci_desc spi_pci_mid_desc_2 = { 43static struct spi_pci_desc spi_pci_mid_desc_2 = {
44 .setup = dw_spi_mid_init, 44 .setup = dw_spi_mid_init,
45 .num_cs = 4, 45 .num_cs = 2,
46 .bus_num = 1, 46 .bus_num = 1,
47}; 47};
48 48
diff --git a/drivers/spi/spi-dw.c b/drivers/spi/spi-dw.c
index 5a97a62b298a..4847afba89f4 100644
--- a/drivers/spi/spi-dw.c
+++ b/drivers/spi/spi-dw.c
@@ -621,14 +621,14 @@ static void spi_hw_init(struct device *dev, struct dw_spi *dws)
621 if (!dws->fifo_len) { 621 if (!dws->fifo_len) {
622 u32 fifo; 622 u32 fifo;
623 623
624 for (fifo = 2; fifo <= 256; fifo++) { 624 for (fifo = 1; fifo < 256; fifo++) {
625 dw_writew(dws, DW_SPI_TXFLTR, fifo); 625 dw_writew(dws, DW_SPI_TXFLTR, fifo);
626 if (fifo != dw_readw(dws, DW_SPI_TXFLTR)) 626 if (fifo != dw_readw(dws, DW_SPI_TXFLTR))
627 break; 627 break;
628 } 628 }
629 dw_writew(dws, DW_SPI_TXFLTR, 0); 629 dw_writew(dws, DW_SPI_TXFLTR, 0);
630 630
631 dws->fifo_len = (fifo == 2) ? 0 : fifo - 1; 631 dws->fifo_len = (fifo == 1) ? 0 : fifo;
632 dev_dbg(dev, "Detected FIFO size: %u bytes\n", dws->fifo_len); 632 dev_dbg(dev, "Detected FIFO size: %u bytes\n", dws->fifo_len);
633 } 633 }
634} 634}
diff --git a/drivers/spi/spi-img-spfi.c b/drivers/spi/spi-img-spfi.c
index c01567d53581..e649bc7d4c08 100644
--- a/drivers/spi/spi-img-spfi.c
+++ b/drivers/spi/spi-img-spfi.c
@@ -459,6 +459,13 @@ static int img_spfi_transfer_one(struct spi_master *master,
459 unsigned long flags; 459 unsigned long flags;
460 int ret; 460 int ret;
461 461
462 if (xfer->len > SPFI_TRANSACTION_TSIZE_MASK) {
463 dev_err(spfi->dev,
464 "Transfer length (%d) is greater than the max supported (%d)",
465 xfer->len, SPFI_TRANSACTION_TSIZE_MASK);
466 return -EINVAL;
467 }
468
462 /* 469 /*
463 * Stop all DMA and reset the controller if the previous transaction 470 * Stop all DMA and reset the controller if the previous transaction
464 * timed-out and never completed it's DMA. 471 * timed-out and never completed it's DMA.
diff --git a/drivers/spi/spi-pl022.c b/drivers/spi/spi-pl022.c
index 89ca162801da..ee513a85296b 100644
--- a/drivers/spi/spi-pl022.c
+++ b/drivers/spi/spi-pl022.c
@@ -534,12 +534,12 @@ static void giveback(struct pl022 *pl022)
534 pl022->cur_msg = NULL; 534 pl022->cur_msg = NULL;
535 pl022->cur_transfer = NULL; 535 pl022->cur_transfer = NULL;
536 pl022->cur_chip = NULL; 536 pl022->cur_chip = NULL;
537 spi_finalize_current_message(pl022->master);
538 537
539 /* disable the SPI/SSP operation */ 538 /* disable the SPI/SSP operation */
540 writew((readw(SSP_CR1(pl022->virtbase)) & 539 writew((readw(SSP_CR1(pl022->virtbase)) &
541 (~SSP_CR1_MASK_SSE)), SSP_CR1(pl022->virtbase)); 540 (~SSP_CR1_MASK_SSE)), SSP_CR1(pl022->virtbase));
542 541
542 spi_finalize_current_message(pl022->master);
543} 543}
544 544
545/** 545/**
diff --git a/drivers/spi/spi-ti-qspi.c b/drivers/spi/spi-ti-qspi.c
index 884a716e50cb..5c0616870358 100644
--- a/drivers/spi/spi-ti-qspi.c
+++ b/drivers/spi/spi-ti-qspi.c
@@ -101,6 +101,7 @@ struct ti_qspi {
101#define QSPI_FLEN(n) ((n - 1) << 0) 101#define QSPI_FLEN(n) ((n - 1) << 0)
102 102
103/* STATUS REGISTER */ 103/* STATUS REGISTER */
104#define BUSY 0x01
104#define WC 0x02 105#define WC 0x02
105 106
106/* INTERRUPT REGISTER */ 107/* INTERRUPT REGISTER */
@@ -199,6 +200,21 @@ static void ti_qspi_restore_ctx(struct ti_qspi *qspi)
199 ti_qspi_write(qspi, ctx_reg->clkctrl, QSPI_SPI_CLOCK_CNTRL_REG); 200 ti_qspi_write(qspi, ctx_reg->clkctrl, QSPI_SPI_CLOCK_CNTRL_REG);
200} 201}
201 202
203static inline u32 qspi_is_busy(struct ti_qspi *qspi)
204{
205 u32 stat;
206 unsigned long timeout = jiffies + QSPI_COMPLETION_TIMEOUT;
207
208 stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);
209 while ((stat & BUSY) && time_after(timeout, jiffies)) {
210 cpu_relax();
211 stat = ti_qspi_read(qspi, QSPI_SPI_STATUS_REG);
212 }
213
214 WARN(stat & BUSY, "qspi busy\n");
215 return stat & BUSY;
216}
217
202static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t) 218static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)
203{ 219{
204 int wlen, count; 220 int wlen, count;
@@ -211,6 +227,9 @@ static int qspi_write_msg(struct ti_qspi *qspi, struct spi_transfer *t)
211 wlen = t->bits_per_word >> 3; /* in bytes */ 227 wlen = t->bits_per_word >> 3; /* in bytes */
212 228
213 while (count) { 229 while (count) {
230 if (qspi_is_busy(qspi))
231 return -EBUSY;
232
214 switch (wlen) { 233 switch (wlen) {
215 case 1: 234 case 1:
216 dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %02x\n", 235 dev_dbg(qspi->dev, "tx cmd %08x dc %08x data %02x\n",
@@ -266,6 +285,9 @@ static int qspi_read_msg(struct ti_qspi *qspi, struct spi_transfer *t)
266 285
267 while (count) { 286 while (count) {
268 dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", cmd, qspi->dc); 287 dev_dbg(qspi->dev, "rx cmd %08x dc %08x\n", cmd, qspi->dc);
288 if (qspi_is_busy(qspi))
289 return -EBUSY;
290
269 ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG); 291 ti_qspi_write(qspi, cmd, QSPI_SPI_CMD_REG);
270 if (!wait_for_completion_timeout(&qspi->transfer_complete, 292 if (!wait_for_completion_timeout(&qspi->transfer_complete,
271 QSPI_COMPLETION_TIMEOUT)) { 293 QSPI_COMPLETION_TIMEOUT)) {
diff --git a/drivers/staging/comedi/drivers/adv_pci1710.c b/drivers/staging/comedi/drivers/adv_pci1710.c
index 9800c01e6fb9..3f72451d2de0 100644
--- a/drivers/staging/comedi/drivers/adv_pci1710.c
+++ b/drivers/staging/comedi/drivers/adv_pci1710.c
@@ -426,7 +426,6 @@ static int pci171x_ai_insn_read(struct comedi_device *dev,
426 unsigned int *data) 426 unsigned int *data)
427{ 427{
428 struct pci1710_private *devpriv = dev->private; 428 struct pci1710_private *devpriv = dev->private;
429 unsigned int chan = CR_CHAN(insn->chanspec);
430 int ret = 0; 429 int ret = 0;
431 int i; 430 int i;
432 431
@@ -447,7 +446,7 @@ static int pci171x_ai_insn_read(struct comedi_device *dev,
447 if (ret) 446 if (ret)
448 break; 447 break;
449 448
450 ret = pci171x_ai_read_sample(dev, s, chan, &val); 449 ret = pci171x_ai_read_sample(dev, s, 0, &val);
451 if (ret) 450 if (ret)
452 break; 451 break;
453 452
diff --git a/drivers/staging/comedi/drivers/comedi_isadma.c b/drivers/staging/comedi/drivers/comedi_isadma.c
index dbdea71d6b95..e856f01ca077 100644
--- a/drivers/staging/comedi/drivers/comedi_isadma.c
+++ b/drivers/staging/comedi/drivers/comedi_isadma.c
@@ -91,9 +91,10 @@ unsigned int comedi_isadma_disable_on_sample(unsigned int dma_chan,
91 stalled++; 91 stalled++;
92 if (stalled > 10) 92 if (stalled > 10)
93 break; 93 break;
94 } else {
95 residue = new_residue;
96 stalled = 0;
94 } 97 }
95 residue = new_residue;
96 stalled = 0;
97 } 98 }
98 return residue; 99 return residue;
99} 100}
diff --git a/drivers/staging/comedi/drivers/vmk80xx.c b/drivers/staging/comedi/drivers/vmk80xx.c
index e37118321a27..a0906685e27f 100644
--- a/drivers/staging/comedi/drivers/vmk80xx.c
+++ b/drivers/staging/comedi/drivers/vmk80xx.c
@@ -103,11 +103,6 @@ enum vmk80xx_model {
103 VMK8061_MODEL 103 VMK8061_MODEL
104}; 104};
105 105
106struct firmware_version {
107 unsigned char ic3_vers[32]; /* USB-Controller */
108 unsigned char ic6_vers[32]; /* CPU */
109};
110
111static const struct comedi_lrange vmk8061_range = { 106static const struct comedi_lrange vmk8061_range = {
112 2, { 107 2, {
113 UNI_RANGE(5), 108 UNI_RANGE(5),
@@ -156,68 +151,12 @@ static const struct vmk80xx_board vmk80xx_boardinfo[] = {
156struct vmk80xx_private { 151struct vmk80xx_private {
157 struct usb_endpoint_descriptor *ep_rx; 152 struct usb_endpoint_descriptor *ep_rx;
158 struct usb_endpoint_descriptor *ep_tx; 153 struct usb_endpoint_descriptor *ep_tx;
159 struct firmware_version fw;
160 struct semaphore limit_sem; 154 struct semaphore limit_sem;
161 unsigned char *usb_rx_buf; 155 unsigned char *usb_rx_buf;
162 unsigned char *usb_tx_buf; 156 unsigned char *usb_tx_buf;
163 enum vmk80xx_model model; 157 enum vmk80xx_model model;
164}; 158};
165 159
166static int vmk80xx_check_data_link(struct comedi_device *dev)
167{
168 struct vmk80xx_private *devpriv = dev->private;
169 struct usb_device *usb = comedi_to_usb_dev(dev);
170 unsigned int tx_pipe;
171 unsigned int rx_pipe;
172 unsigned char tx[1];
173 unsigned char rx[2];
174
175 tx_pipe = usb_sndbulkpipe(usb, 0x01);
176 rx_pipe = usb_rcvbulkpipe(usb, 0x81);
177
178 tx[0] = VMK8061_CMD_RD_PWR_STAT;
179
180 /*
181 * Check that IC6 (PIC16F871) is powered and
182 * running and the data link between IC3 and
183 * IC6 is working properly
184 */
185 usb_bulk_msg(usb, tx_pipe, tx, 1, NULL, devpriv->ep_tx->bInterval);
186 usb_bulk_msg(usb, rx_pipe, rx, 2, NULL, HZ * 10);
187
188 return (int)rx[1];
189}
190
191static void vmk80xx_read_eeprom(struct comedi_device *dev, int flag)
192{
193 struct vmk80xx_private *devpriv = dev->private;
194 struct usb_device *usb = comedi_to_usb_dev(dev);
195 unsigned int tx_pipe;
196 unsigned int rx_pipe;
197 unsigned char tx[1];
198 unsigned char rx[64];
199 int cnt;
200
201 tx_pipe = usb_sndbulkpipe(usb, 0x01);
202 rx_pipe = usb_rcvbulkpipe(usb, 0x81);
203
204 tx[0] = VMK8061_CMD_RD_VERSION;
205
206 /*
207 * Read the firmware version info of IC3 and
208 * IC6 from the internal EEPROM of the IC
209 */
210 usb_bulk_msg(usb, tx_pipe, tx, 1, NULL, devpriv->ep_tx->bInterval);
211 usb_bulk_msg(usb, rx_pipe, rx, 64, &cnt, HZ * 10);
212
213 rx[cnt] = '\0';
214
215 if (flag & IC3_VERSION)
216 strncpy(devpriv->fw.ic3_vers, rx + 1, 24);
217 else /* IC6_VERSION */
218 strncpy(devpriv->fw.ic6_vers, rx + 25, 24);
219}
220
221static void vmk80xx_do_bulk_msg(struct comedi_device *dev) 160static void vmk80xx_do_bulk_msg(struct comedi_device *dev)
222{ 161{
223 struct vmk80xx_private *devpriv = dev->private; 162 struct vmk80xx_private *devpriv = dev->private;
@@ -878,16 +817,6 @@ static int vmk80xx_auto_attach(struct comedi_device *dev,
878 817
879 usb_set_intfdata(intf, devpriv); 818 usb_set_intfdata(intf, devpriv);
880 819
881 if (devpriv->model == VMK8061_MODEL) {
882 vmk80xx_read_eeprom(dev, IC3_VERSION);
883 dev_info(&intf->dev, "%s\n", devpriv->fw.ic3_vers);
884
885 if (vmk80xx_check_data_link(dev)) {
886 vmk80xx_read_eeprom(dev, IC6_VERSION);
887 dev_info(&intf->dev, "%s\n", devpriv->fw.ic6_vers);
888 }
889 }
890
891 if (devpriv->model == VMK8055_MODEL) 820 if (devpriv->model == VMK8055_MODEL)
892 vmk80xx_reset_device(dev); 821 vmk80xx_reset_device(dev);
893 822
diff --git a/drivers/staging/iio/adc/mxs-lradc.c b/drivers/staging/iio/adc/mxs-lradc.c
index d9d6fad7cb00..816174388f13 100644
--- a/drivers/staging/iio/adc/mxs-lradc.c
+++ b/drivers/staging/iio/adc/mxs-lradc.c
@@ -214,11 +214,17 @@ struct mxs_lradc {
214 unsigned long is_divided; 214 unsigned long is_divided;
215 215
216 /* 216 /*
217 * Touchscreen LRADC channels receives a private slot in the CTRL4 217 * When the touchscreen is enabled, we give it two private virtual
218 * register, the slot #7. Therefore only 7 slots instead of 8 in the 218 * channels: #6 and #7. This means that only 6 virtual channels (instead
219 * CTRL4 register can be mapped to LRADC channels when using the 219 * of 8) will be available for buffered capture.
220 * touchscreen. 220 */
221 * 221#define TOUCHSCREEN_VCHANNEL1 7
222#define TOUCHSCREEN_VCHANNEL2 6
223#define BUFFER_VCHANS_LIMITED 0x3f
224#define BUFFER_VCHANS_ALL 0xff
225 u8 buffer_vchans;
226
227 /*
222 * Furthermore, certain LRADC channels are shared between touchscreen 228 * Furthermore, certain LRADC channels are shared between touchscreen
223 * and/or touch-buttons and generic LRADC block. Therefore when using 229 * and/or touch-buttons and generic LRADC block. Therefore when using
224 * either of these, these channels are not available for the regular 230 * either of these, these channels are not available for the regular
@@ -342,6 +348,9 @@ struct mxs_lradc {
342#define LRADC_CTRL4 0x140 348#define LRADC_CTRL4 0x140
343#define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4)) 349#define LRADC_CTRL4_LRADCSELECT_MASK(n) (0xf << ((n) * 4))
344#define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4) 350#define LRADC_CTRL4_LRADCSELECT_OFFSET(n) ((n) * 4)
351#define LRADC_CTRL4_LRADCSELECT(n, x) \
352 (((x) << LRADC_CTRL4_LRADCSELECT_OFFSET(n)) & \
353 LRADC_CTRL4_LRADCSELECT_MASK(n))
345 354
346#define LRADC_RESOLUTION 12 355#define LRADC_RESOLUTION 12
347#define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1) 356#define LRADC_SINGLE_SAMPLE_MASK ((1 << LRADC_RESOLUTION) - 1)
@@ -416,6 +425,14 @@ static bool mxs_lradc_check_touch_event(struct mxs_lradc *lradc)
416 LRADC_STATUS_TOUCH_DETECT_RAW); 425 LRADC_STATUS_TOUCH_DETECT_RAW);
417} 426}
418 427
428static void mxs_lradc_map_channel(struct mxs_lradc *lradc, unsigned vch,
429 unsigned ch)
430{
431 mxs_lradc_reg_clear(lradc, LRADC_CTRL4_LRADCSELECT_MASK(vch),
432 LRADC_CTRL4);
433 mxs_lradc_reg_set(lradc, LRADC_CTRL4_LRADCSELECT(vch, ch), LRADC_CTRL4);
434}
435
419static void mxs_lradc_setup_ts_channel(struct mxs_lradc *lradc, unsigned ch) 436static void mxs_lradc_setup_ts_channel(struct mxs_lradc *lradc, unsigned ch)
420{ 437{
421 /* 438 /*
@@ -450,12 +467,8 @@ static void mxs_lradc_setup_ts_channel(struct mxs_lradc *lradc, unsigned ch)
450 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1), 467 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),
451 LRADC_DELAY(3)); 468 LRADC_DELAY(3));
452 469
453 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(2) | 470 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch), LRADC_CTRL1);
454 LRADC_CTRL1_LRADC_IRQ(3) | LRADC_CTRL1_LRADC_IRQ(4) |
455 LRADC_CTRL1_LRADC_IRQ(5), LRADC_CTRL1);
456 471
457 /* wake us again, when the complete conversion is done */
458 mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(ch), LRADC_CTRL1);
459 /* 472 /*
460 * after changing the touchscreen plates setting 473 * after changing the touchscreen plates setting
461 * the signals need some initial time to settle. Start the 474 * the signals need some initial time to settle. Start the
@@ -509,12 +522,8 @@ static void mxs_lradc_setup_ts_pressure(struct mxs_lradc *lradc, unsigned ch1,
509 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1), 522 LRADC_DELAY_DELAY(lradc->over_sample_delay - 1),
510 LRADC_DELAY(3)); 523 LRADC_DELAY(3));
511 524
512 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(2) | 525 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(ch2), LRADC_CTRL1);
513 LRADC_CTRL1_LRADC_IRQ(3) | LRADC_CTRL1_LRADC_IRQ(4) |
514 LRADC_CTRL1_LRADC_IRQ(5), LRADC_CTRL1);
515 526
516 /* wake us again, when the conversions are done */
517 mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(ch2), LRADC_CTRL1);
518 /* 527 /*
519 * after changing the touchscreen plates setting 528 * after changing the touchscreen plates setting
520 * the signals need some initial time to settle. Start the 529 * the signals need some initial time to settle. Start the
@@ -580,36 +589,6 @@ static unsigned mxs_lradc_read_ts_pressure(struct mxs_lradc *lradc,
580#define TS_CH_XM 4 589#define TS_CH_XM 4
581#define TS_CH_YM 5 590#define TS_CH_YM 5
582 591
583static int mxs_lradc_read_ts_channel(struct mxs_lradc *lradc)
584{
585 u32 reg;
586 int val;
587
588 reg = readl(lradc->base + LRADC_CTRL1);
589
590 /* only channels 3 to 5 are of interest here */
591 if (reg & LRADC_CTRL1_LRADC_IRQ(TS_CH_YP)) {
592 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(TS_CH_YP) |
593 LRADC_CTRL1_LRADC_IRQ(TS_CH_YP), LRADC_CTRL1);
594 val = mxs_lradc_read_raw_channel(lradc, TS_CH_YP);
595 } else if (reg & LRADC_CTRL1_LRADC_IRQ(TS_CH_XM)) {
596 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(TS_CH_XM) |
597 LRADC_CTRL1_LRADC_IRQ(TS_CH_XM), LRADC_CTRL1);
598 val = mxs_lradc_read_raw_channel(lradc, TS_CH_XM);
599 } else if (reg & LRADC_CTRL1_LRADC_IRQ(TS_CH_YM)) {
600 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(TS_CH_YM) |
601 LRADC_CTRL1_LRADC_IRQ(TS_CH_YM), LRADC_CTRL1);
602 val = mxs_lradc_read_raw_channel(lradc, TS_CH_YM);
603 } else {
604 return -EIO;
605 }
606
607 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));
608 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));
609
610 return val;
611}
612
613/* 592/*
614 * YP(open)--+-------------+ 593 * YP(open)--+-------------+
615 * | |--+ 594 * | |--+
@@ -653,7 +632,8 @@ static void mxs_lradc_prepare_x_pos(struct mxs_lradc *lradc)
653 mxs_lradc_reg_set(lradc, mxs_lradc_drive_x_plate(lradc), LRADC_CTRL0); 632 mxs_lradc_reg_set(lradc, mxs_lradc_drive_x_plate(lradc), LRADC_CTRL0);
654 633
655 lradc->cur_plate = LRADC_SAMPLE_X; 634 lradc->cur_plate = LRADC_SAMPLE_X;
656 mxs_lradc_setup_ts_channel(lradc, TS_CH_YP); 635 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YP);
636 mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1);
657} 637}
658 638
659/* 639/*
@@ -674,7 +654,8 @@ static void mxs_lradc_prepare_y_pos(struct mxs_lradc *lradc)
674 mxs_lradc_reg_set(lradc, mxs_lradc_drive_y_plate(lradc), LRADC_CTRL0); 654 mxs_lradc_reg_set(lradc, mxs_lradc_drive_y_plate(lradc), LRADC_CTRL0);
675 655
676 lradc->cur_plate = LRADC_SAMPLE_Y; 656 lradc->cur_plate = LRADC_SAMPLE_Y;
677 mxs_lradc_setup_ts_channel(lradc, TS_CH_XM); 657 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_XM);
658 mxs_lradc_setup_ts_channel(lradc, TOUCHSCREEN_VCHANNEL1);
678} 659}
679 660
680/* 661/*
@@ -695,7 +676,10 @@ static void mxs_lradc_prepare_pressure(struct mxs_lradc *lradc)
695 mxs_lradc_reg_set(lradc, mxs_lradc_drive_pressure(lradc), LRADC_CTRL0); 676 mxs_lradc_reg_set(lradc, mxs_lradc_drive_pressure(lradc), LRADC_CTRL0);
696 677
697 lradc->cur_plate = LRADC_SAMPLE_PRESSURE; 678 lradc->cur_plate = LRADC_SAMPLE_PRESSURE;
698 mxs_lradc_setup_ts_pressure(lradc, TS_CH_XP, TS_CH_YM); 679 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL1, TS_CH_YM);
680 mxs_lradc_map_channel(lradc, TOUCHSCREEN_VCHANNEL2, TS_CH_XP);
681 mxs_lradc_setup_ts_pressure(lradc, TOUCHSCREEN_VCHANNEL2,
682 TOUCHSCREEN_VCHANNEL1);
699} 683}
700 684
701static void mxs_lradc_enable_touch_detection(struct mxs_lradc *lradc) 685static void mxs_lradc_enable_touch_detection(struct mxs_lradc *lradc)
@@ -708,6 +692,19 @@ static void mxs_lradc_enable_touch_detection(struct mxs_lradc *lradc)
708 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1); 692 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
709} 693}
710 694
695static void mxs_lradc_start_touch_event(struct mxs_lradc *lradc)
696{
697 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
698 LRADC_CTRL1);
699 mxs_lradc_reg_set(lradc,
700 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1), LRADC_CTRL1);
701 /*
702 * start with the Y-pos, because it uses nearly the same plate
703 * settings like the touch detection
704 */
705 mxs_lradc_prepare_y_pos(lradc);
706}
707
711static void mxs_lradc_report_ts_event(struct mxs_lradc *lradc) 708static void mxs_lradc_report_ts_event(struct mxs_lradc *lradc)
712{ 709{
713 input_report_abs(lradc->ts_input, ABS_X, lradc->ts_x_pos); 710 input_report_abs(lradc->ts_input, ABS_X, lradc->ts_x_pos);
@@ -725,10 +722,12 @@ static void mxs_lradc_complete_touch_event(struct mxs_lradc *lradc)
725 * start a dummy conversion to burn time to settle the signals 722 * start a dummy conversion to burn time to settle the signals
726 * note: we are not interested in the conversion's value 723 * note: we are not interested in the conversion's value
727 */ 724 */
728 mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(5)); 725 mxs_lradc_reg_wrt(lradc, 0, LRADC_CH(TOUCHSCREEN_VCHANNEL1));
729 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ(5), LRADC_CTRL1); 726 mxs_lradc_reg_clear(lradc,
730 mxs_lradc_reg_set(lradc, LRADC_CTRL1_LRADC_IRQ_EN(5), LRADC_CTRL1); 727 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
731 mxs_lradc_reg_wrt(lradc, LRADC_DELAY_TRIGGER(1 << 5) | 728 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2), LRADC_CTRL1);
729 mxs_lradc_reg_wrt(lradc,
730 LRADC_DELAY_TRIGGER(1 << TOUCHSCREEN_VCHANNEL1) |
732 LRADC_DELAY_KICK | LRADC_DELAY_DELAY(10), /* waste 5 ms */ 731 LRADC_DELAY_KICK | LRADC_DELAY_DELAY(10), /* waste 5 ms */
733 LRADC_DELAY(2)); 732 LRADC_DELAY(2));
734} 733}
@@ -760,59 +759,45 @@ static void mxs_lradc_finish_touch_event(struct mxs_lradc *lradc, bool valid)
760 759
761 /* if it is released, wait for the next touch via IRQ */ 760 /* if it is released, wait for the next touch via IRQ */
762 lradc->cur_plate = LRADC_TOUCH; 761 lradc->cur_plate = LRADC_TOUCH;
763 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ, LRADC_CTRL1); 762 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(2));
763 mxs_lradc_reg_wrt(lradc, 0, LRADC_DELAY(3));
764 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ |
765 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |
766 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1), LRADC_CTRL1);
764 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1); 767 mxs_lradc_reg_set(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN, LRADC_CTRL1);
765} 768}
766 769
767/* touchscreen's state machine */ 770/* touchscreen's state machine */
768static void mxs_lradc_handle_touch(struct mxs_lradc *lradc) 771static void mxs_lradc_handle_touch(struct mxs_lradc *lradc)
769{ 772{
770 int val;
771
772 switch (lradc->cur_plate) { 773 switch (lradc->cur_plate) {
773 case LRADC_TOUCH: 774 case LRADC_TOUCH:
774 /* 775 if (mxs_lradc_check_touch_event(lradc))
775 * start with the Y-pos, because it uses nearly the same plate 776 mxs_lradc_start_touch_event(lradc);
776 * settings like the touch detection
777 */
778 if (mxs_lradc_check_touch_event(lradc)) {
779 mxs_lradc_reg_clear(lradc,
780 LRADC_CTRL1_TOUCH_DETECT_IRQ_EN,
781 LRADC_CTRL1);
782 mxs_lradc_prepare_y_pos(lradc);
783 }
784 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ, 777 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ,
785 LRADC_CTRL1); 778 LRADC_CTRL1);
786 return; 779 return;
787 780
788 case LRADC_SAMPLE_Y: 781 case LRADC_SAMPLE_Y:
789 val = mxs_lradc_read_ts_channel(lradc); 782 lradc->ts_y_pos = mxs_lradc_read_raw_channel(lradc,
790 if (val < 0) { 783 TOUCHSCREEN_VCHANNEL1);
791 mxs_lradc_enable_touch_detection(lradc); /* re-start */
792 return;
793 }
794 lradc->ts_y_pos = val;
795 mxs_lradc_prepare_x_pos(lradc); 784 mxs_lradc_prepare_x_pos(lradc);
796 return; 785 return;
797 786
798 case LRADC_SAMPLE_X: 787 case LRADC_SAMPLE_X:
799 val = mxs_lradc_read_ts_channel(lradc); 788 lradc->ts_x_pos = mxs_lradc_read_raw_channel(lradc,
800 if (val < 0) { 789 TOUCHSCREEN_VCHANNEL1);
801 mxs_lradc_enable_touch_detection(lradc); /* re-start */
802 return;
803 }
804 lradc->ts_x_pos = val;
805 mxs_lradc_prepare_pressure(lradc); 790 mxs_lradc_prepare_pressure(lradc);
806 return; 791 return;
807 792
808 case LRADC_SAMPLE_PRESSURE: 793 case LRADC_SAMPLE_PRESSURE:
809 lradc->ts_pressure = 794 lradc->ts_pressure = mxs_lradc_read_ts_pressure(lradc,
810 mxs_lradc_read_ts_pressure(lradc, TS_CH_XP, TS_CH_YM); 795 TOUCHSCREEN_VCHANNEL2,
796 TOUCHSCREEN_VCHANNEL1);
811 mxs_lradc_complete_touch_event(lradc); 797 mxs_lradc_complete_touch_event(lradc);
812 return; 798 return;
813 799
814 case LRADC_SAMPLE_VALID: 800 case LRADC_SAMPLE_VALID:
815 val = mxs_lradc_read_ts_channel(lradc); /* ignore the value */
816 mxs_lradc_finish_touch_event(lradc, 1); 801 mxs_lradc_finish_touch_event(lradc, 1);
817 break; 802 break;
818 } 803 }
@@ -844,9 +829,9 @@ static int mxs_lradc_read_single(struct iio_dev *iio_dev, int chan, int *val)
844 * used if doing raw sampling. 829 * used if doing raw sampling.
845 */ 830 */
846 if (lradc->soc == IMX28_LRADC) 831 if (lradc->soc == IMX28_LRADC)
847 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK, 832 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_LRADC_IRQ_EN(0),
848 LRADC_CTRL1); 833 LRADC_CTRL1);
849 mxs_lradc_reg_clear(lradc, 0xff, LRADC_CTRL0); 834 mxs_lradc_reg_clear(lradc, 0x1, LRADC_CTRL0);
850 835
851 /* Enable / disable the divider per requirement */ 836 /* Enable / disable the divider per requirement */
852 if (test_bit(chan, &lradc->is_divided)) 837 if (test_bit(chan, &lradc->is_divided))
@@ -1090,9 +1075,8 @@ static void mxs_lradc_disable_ts(struct mxs_lradc *lradc)
1090{ 1075{
1091 /* stop all interrupts from firing */ 1076 /* stop all interrupts from firing */
1092 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN | 1077 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_TOUCH_DETECT_IRQ_EN |
1093 LRADC_CTRL1_LRADC_IRQ_EN(2) | LRADC_CTRL1_LRADC_IRQ_EN(3) | 1078 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL1) |
1094 LRADC_CTRL1_LRADC_IRQ_EN(4) | LRADC_CTRL1_LRADC_IRQ_EN(5), 1079 LRADC_CTRL1_LRADC_IRQ_EN(TOUCHSCREEN_VCHANNEL2), LRADC_CTRL1);
1095 LRADC_CTRL1);
1096 1080
1097 /* Power-down touchscreen touch-detect circuitry. */ 1081 /* Power-down touchscreen touch-detect circuitry. */
1098 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0); 1082 mxs_lradc_reg_clear(lradc, mxs_lradc_plate_mask(lradc), LRADC_CTRL0);
@@ -1158,26 +1142,31 @@ static irqreturn_t mxs_lradc_handle_irq(int irq, void *data)
1158 struct iio_dev *iio = data; 1142 struct iio_dev *iio = data;
1159 struct mxs_lradc *lradc = iio_priv(iio); 1143 struct mxs_lradc *lradc = iio_priv(iio);
1160 unsigned long reg = readl(lradc->base + LRADC_CTRL1); 1144 unsigned long reg = readl(lradc->base + LRADC_CTRL1);
1145 uint32_t clr_irq = mxs_lradc_irq_mask(lradc);
1161 const uint32_t ts_irq_mask = 1146 const uint32_t ts_irq_mask =
1162 LRADC_CTRL1_TOUCH_DETECT_IRQ | 1147 LRADC_CTRL1_TOUCH_DETECT_IRQ |
1163 LRADC_CTRL1_LRADC_IRQ(2) | 1148 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
1164 LRADC_CTRL1_LRADC_IRQ(3) | 1149 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2);
1165 LRADC_CTRL1_LRADC_IRQ(4) |
1166 LRADC_CTRL1_LRADC_IRQ(5);
1167 1150
1168 if (!(reg & mxs_lradc_irq_mask(lradc))) 1151 if (!(reg & mxs_lradc_irq_mask(lradc)))
1169 return IRQ_NONE; 1152 return IRQ_NONE;
1170 1153
1171 if (lradc->use_touchscreen && (reg & ts_irq_mask)) 1154 if (lradc->use_touchscreen && (reg & ts_irq_mask)) {
1172 mxs_lradc_handle_touch(lradc); 1155 mxs_lradc_handle_touch(lradc);
1173 1156
1174 if (iio_buffer_enabled(iio)) 1157 /* Make sure we don't clear the next conversion's interrupt. */
1175 iio_trigger_poll(iio->trig); 1158 clr_irq &= ~(LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL1) |
1176 else if (reg & LRADC_CTRL1_LRADC_IRQ(0)) 1159 LRADC_CTRL1_LRADC_IRQ(TOUCHSCREEN_VCHANNEL2));
1160 }
1161
1162 if (iio_buffer_enabled(iio)) {
1163 if (reg & lradc->buffer_vchans)
1164 iio_trigger_poll(iio->trig);
1165 } else if (reg & LRADC_CTRL1_LRADC_IRQ(0)) {
1177 complete(&lradc->completion); 1166 complete(&lradc->completion);
1167 }
1178 1168
1179 mxs_lradc_reg_clear(lradc, reg & mxs_lradc_irq_mask(lradc), 1169 mxs_lradc_reg_clear(lradc, reg & clr_irq, LRADC_CTRL1);
1180 LRADC_CTRL1);
1181 1170
1182 return IRQ_HANDLED; 1171 return IRQ_HANDLED;
1183} 1172}
@@ -1289,9 +1278,10 @@ static int mxs_lradc_buffer_preenable(struct iio_dev *iio)
1289 } 1278 }
1290 1279
1291 if (lradc->soc == IMX28_LRADC) 1280 if (lradc->soc == IMX28_LRADC)
1292 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK, 1281 mxs_lradc_reg_clear(lradc,
1293 LRADC_CTRL1); 1282 lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,
1294 mxs_lradc_reg_clear(lradc, 0xff, LRADC_CTRL0); 1283 LRADC_CTRL1);
1284 mxs_lradc_reg_clear(lradc, lradc->buffer_vchans, LRADC_CTRL0);
1295 1285
1296 for_each_set_bit(chan, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) { 1286 for_each_set_bit(chan, iio->active_scan_mask, LRADC_MAX_TOTAL_CHANS) {
1297 ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs); 1287 ctrl4_set |= chan << LRADC_CTRL4_LRADCSELECT_OFFSET(ofs);
@@ -1324,10 +1314,11 @@ static int mxs_lradc_buffer_postdisable(struct iio_dev *iio)
1324 mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK | 1314 mxs_lradc_reg_clear(lradc, LRADC_DELAY_TRIGGER_LRADCS_MASK |
1325 LRADC_DELAY_KICK, LRADC_DELAY(0)); 1315 LRADC_DELAY_KICK, LRADC_DELAY(0));
1326 1316
1327 mxs_lradc_reg_clear(lradc, 0xff, LRADC_CTRL0); 1317 mxs_lradc_reg_clear(lradc, lradc->buffer_vchans, LRADC_CTRL0);
1328 if (lradc->soc == IMX28_LRADC) 1318 if (lradc->soc == IMX28_LRADC)
1329 mxs_lradc_reg_clear(lradc, LRADC_CTRL1_MX28_LRADC_IRQ_EN_MASK, 1319 mxs_lradc_reg_clear(lradc,
1330 LRADC_CTRL1); 1320 lradc->buffer_vchans << LRADC_CTRL1_LRADC_IRQ_EN_OFFSET,
1321 LRADC_CTRL1);
1331 1322
1332 kfree(lradc->buffer); 1323 kfree(lradc->buffer);
1333 mutex_unlock(&lradc->lock); 1324 mutex_unlock(&lradc->lock);
@@ -1353,7 +1344,7 @@ static bool mxs_lradc_validate_scan_mask(struct iio_dev *iio,
1353 if (lradc->use_touchbutton) 1344 if (lradc->use_touchbutton)
1354 rsvd_chans++; 1345 rsvd_chans++;
1355 if (lradc->use_touchscreen) 1346 if (lradc->use_touchscreen)
1356 rsvd_chans++; 1347 rsvd_chans += 2;
1357 1348
1358 /* Test for attempts to map channels with special mode of operation. */ 1349 /* Test for attempts to map channels with special mode of operation. */
1359 if (bitmap_intersects(mask, &rsvd_mask, LRADC_MAX_TOTAL_CHANS)) 1350 if (bitmap_intersects(mask, &rsvd_mask, LRADC_MAX_TOTAL_CHANS))
@@ -1413,6 +1404,13 @@ static const struct iio_chan_spec mxs_lradc_chan_spec[] = {
1413 .channel = 8, 1404 .channel = 8,
1414 .scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,}, 1405 .scan_type = {.sign = 'u', .realbits = 18, .storagebits = 32,},
1415 }, 1406 },
1407 /* Hidden channel to keep indexes */
1408 {
1409 .type = IIO_TEMP,
1410 .indexed = 1,
1411 .scan_index = -1,
1412 .channel = 9,
1413 },
1416 MXS_ADC_CHAN(10, IIO_VOLTAGE), /* VDDIO */ 1414 MXS_ADC_CHAN(10, IIO_VOLTAGE), /* VDDIO */
1417 MXS_ADC_CHAN(11, IIO_VOLTAGE), /* VTH */ 1415 MXS_ADC_CHAN(11, IIO_VOLTAGE), /* VTH */
1418 MXS_ADC_CHAN(12, IIO_VOLTAGE), /* VDDA */ 1416 MXS_ADC_CHAN(12, IIO_VOLTAGE), /* VDDA */
@@ -1583,6 +1581,11 @@ static int mxs_lradc_probe(struct platform_device *pdev)
1583 1581
1584 touch_ret = mxs_lradc_probe_touchscreen(lradc, node); 1582 touch_ret = mxs_lradc_probe_touchscreen(lradc, node);
1585 1583
1584 if (touch_ret == 0)
1585 lradc->buffer_vchans = BUFFER_VCHANS_LIMITED;
1586 else
1587 lradc->buffer_vchans = BUFFER_VCHANS_ALL;
1588
1586 /* Grab all IRQ sources */ 1589 /* Grab all IRQ sources */
1587 for (i = 0; i < of_cfg->irq_count; i++) { 1590 for (i = 0; i < of_cfg->irq_count; i++) {
1588 lradc->irq[i] = platform_get_irq(pdev, i); 1591 lradc->irq[i] = platform_get_irq(pdev, i);
diff --git a/drivers/staging/iio/resolver/ad2s1200.c b/drivers/staging/iio/resolver/ad2s1200.c
index 017d2f8379b7..c17893b4918c 100644
--- a/drivers/staging/iio/resolver/ad2s1200.c
+++ b/drivers/staging/iio/resolver/ad2s1200.c
@@ -18,6 +18,7 @@
18#include <linux/delay.h> 18#include <linux/delay.h>
19#include <linux/gpio.h> 19#include <linux/gpio.h>
20#include <linux/module.h> 20#include <linux/module.h>
21#include <linux/bitops.h>
21 22
22#include <linux/iio/iio.h> 23#include <linux/iio/iio.h>
23#include <linux/iio/sysfs.h> 24#include <linux/iio/sysfs.h>
@@ -68,7 +69,7 @@ static int ad2s1200_read_raw(struct iio_dev *indio_dev,
68 break; 69 break;
69 case IIO_ANGL_VEL: 70 case IIO_ANGL_VEL:
70 vel = (((s16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4); 71 vel = (((s16)(st->rx[0])) << 4) | ((st->rx[1] & 0xF0) >> 4);
71 vel = (vel << 4) >> 4; 72 vel = sign_extend32(vel, 11);
72 *val = vel; 73 *val = vel;
73 break; 74 break;
74 default: 75 default:
diff --git a/drivers/staging/lustre/lustre/llite/dcache.c b/drivers/staging/lustre/lustre/llite/dcache.c
index 88614b71cf6d..ddf1fa9f67f8 100644
--- a/drivers/staging/lustre/lustre/llite/dcache.c
+++ b/drivers/staging/lustre/lustre/llite/dcache.c
@@ -270,7 +270,7 @@ void ll_invalidate_aliases(struct inode *inode)
270 270
271int ll_revalidate_it_finish(struct ptlrpc_request *request, 271int ll_revalidate_it_finish(struct ptlrpc_request *request,
272 struct lookup_intent *it, 272 struct lookup_intent *it,
273 struct dentry *de) 273 struct inode *inode)
274{ 274{
275 int rc = 0; 275 int rc = 0;
276 276
@@ -280,19 +280,17 @@ int ll_revalidate_it_finish(struct ptlrpc_request *request,
280 if (it_disposition(it, DISP_LOOKUP_NEG)) 280 if (it_disposition(it, DISP_LOOKUP_NEG))
281 return -ENOENT; 281 return -ENOENT;
282 282
283 rc = ll_prep_inode(&de->d_inode, request, NULL, it); 283 rc = ll_prep_inode(&inode, request, NULL, it);
284 284
285 return rc; 285 return rc;
286} 286}
287 287
288void ll_lookup_finish_locks(struct lookup_intent *it, struct dentry *dentry) 288void ll_lookup_finish_locks(struct lookup_intent *it, struct inode *inode)
289{ 289{
290 LASSERT(it != NULL); 290 LASSERT(it != NULL);
291 LASSERT(dentry != NULL);
292 291
293 if (it->d.lustre.it_lock_mode && dentry->d_inode != NULL) { 292 if (it->d.lustre.it_lock_mode && inode != NULL) {
294 struct inode *inode = dentry->d_inode; 293 struct ll_sb_info *sbi = ll_i2sbi(inode);
295 struct ll_sb_info *sbi = ll_i2sbi(dentry->d_inode);
296 294
297 CDEBUG(D_DLMTRACE, "setting l_data to inode %p (%lu/%u)\n", 295 CDEBUG(D_DLMTRACE, "setting l_data to inode %p (%lu/%u)\n",
298 inode, inode->i_ino, inode->i_generation); 296 inode, inode->i_ino, inode->i_generation);
diff --git a/drivers/staging/lustre/lustre/llite/file.c b/drivers/staging/lustre/lustre/llite/file.c
index 7c7ef7ec908e..5ebee6ca0a10 100644
--- a/drivers/staging/lustre/lustre/llite/file.c
+++ b/drivers/staging/lustre/lustre/llite/file.c
@@ -2912,8 +2912,8 @@ static int __ll_inode_revalidate(struct dentry *dentry, __u64 ibits)
2912 oit.it_op = IT_LOOKUP; 2912 oit.it_op = IT_LOOKUP;
2913 2913
2914 /* Call getattr by fid, so do not provide name at all. */ 2914 /* Call getattr by fid, so do not provide name at all. */
2915 op_data = ll_prep_md_op_data(NULL, dentry->d_inode, 2915 op_data = ll_prep_md_op_data(NULL, inode,
2916 dentry->d_inode, NULL, 0, 0, 2916 inode, NULL, 0, 0,
2917 LUSTRE_OPC_ANY, NULL); 2917 LUSTRE_OPC_ANY, NULL);
2918 if (IS_ERR(op_data)) 2918 if (IS_ERR(op_data))
2919 return PTR_ERR(op_data); 2919 return PTR_ERR(op_data);
@@ -2931,7 +2931,7 @@ static int __ll_inode_revalidate(struct dentry *dentry, __u64 ibits)
2931 goto out; 2931 goto out;
2932 } 2932 }
2933 2933
2934 rc = ll_revalidate_it_finish(req, &oit, dentry); 2934 rc = ll_revalidate_it_finish(req, &oit, inode);
2935 if (rc != 0) { 2935 if (rc != 0) {
2936 ll_intent_release(&oit); 2936 ll_intent_release(&oit);
2937 goto out; 2937 goto out;
@@ -2944,7 +2944,7 @@ static int __ll_inode_revalidate(struct dentry *dentry, __u64 ibits)
2944 if (!dentry->d_inode->i_nlink) 2944 if (!dentry->d_inode->i_nlink)
2945 d_lustre_invalidate(dentry, 0); 2945 d_lustre_invalidate(dentry, 0);
2946 2946
2947 ll_lookup_finish_locks(&oit, dentry); 2947 ll_lookup_finish_locks(&oit, inode);
2948 } else if (!ll_have_md_lock(dentry->d_inode, &ibits, LCK_MINMODE)) { 2948 } else if (!ll_have_md_lock(dentry->d_inode, &ibits, LCK_MINMODE)) {
2949 struct ll_sb_info *sbi = ll_i2sbi(dentry->d_inode); 2949 struct ll_sb_info *sbi = ll_i2sbi(dentry->d_inode);
2950 u64 valid = OBD_MD_FLGETATTR; 2950 u64 valid = OBD_MD_FLGETATTR;
diff --git a/drivers/staging/lustre/lustre/llite/llite_internal.h b/drivers/staging/lustre/lustre/llite/llite_internal.h
index d032c2b086cc..2af1d7286250 100644
--- a/drivers/staging/lustre/lustre/llite/llite_internal.h
+++ b/drivers/staging/lustre/lustre/llite/llite_internal.h
@@ -786,9 +786,9 @@ extern const struct dentry_operations ll_d_ops;
786void ll_intent_drop_lock(struct lookup_intent *); 786void ll_intent_drop_lock(struct lookup_intent *);
787void ll_intent_release(struct lookup_intent *); 787void ll_intent_release(struct lookup_intent *);
788void ll_invalidate_aliases(struct inode *); 788void ll_invalidate_aliases(struct inode *);
789void ll_lookup_finish_locks(struct lookup_intent *it, struct dentry *dentry); 789void ll_lookup_finish_locks(struct lookup_intent *it, struct inode *inode);
790int ll_revalidate_it_finish(struct ptlrpc_request *request, 790int ll_revalidate_it_finish(struct ptlrpc_request *request,
791 struct lookup_intent *it, struct dentry *de); 791 struct lookup_intent *it, struct inode *inode);
792 792
793/* llite/llite_lib.c */ 793/* llite/llite_lib.c */
794extern struct super_operations lustre_super_operations; 794extern struct super_operations lustre_super_operations;
diff --git a/drivers/staging/lustre/lustre/llite/namei.c b/drivers/staging/lustre/lustre/llite/namei.c
index 4f361b77c749..890ac190f5fa 100644
--- a/drivers/staging/lustre/lustre/llite/namei.c
+++ b/drivers/staging/lustre/lustre/llite/namei.c
@@ -481,6 +481,7 @@ static struct dentry *ll_lookup_it(struct inode *parent, struct dentry *dentry,
481 struct lookup_intent lookup_it = { .it_op = IT_LOOKUP }; 481 struct lookup_intent lookup_it = { .it_op = IT_LOOKUP };
482 struct dentry *save = dentry, *retval; 482 struct dentry *save = dentry, *retval;
483 struct ptlrpc_request *req = NULL; 483 struct ptlrpc_request *req = NULL;
484 struct inode *inode;
484 struct md_op_data *op_data; 485 struct md_op_data *op_data;
485 __u32 opc; 486 __u32 opc;
486 int rc; 487 int rc;
@@ -539,12 +540,13 @@ static struct dentry *ll_lookup_it(struct inode *parent, struct dentry *dentry,
539 goto out; 540 goto out;
540 } 541 }
541 542
542 if ((it->it_op & IT_OPEN) && dentry->d_inode && 543 inode = dentry->d_inode;
543 !S_ISREG(dentry->d_inode->i_mode) && 544 if ((it->it_op & IT_OPEN) && inode &&
544 !S_ISDIR(dentry->d_inode->i_mode)) { 545 !S_ISREG(inode->i_mode) &&
545 ll_release_openhandle(dentry->d_inode, it); 546 !S_ISDIR(inode->i_mode)) {
547 ll_release_openhandle(inode, it);
546 } 548 }
547 ll_lookup_finish_locks(it, dentry); 549 ll_lookup_finish_locks(it, inode);
548 550
549 if (dentry == save) 551 if (dentry == save)
550 retval = NULL; 552 retval = NULL;
diff --git a/drivers/staging/vt6655/device_main.c b/drivers/staging/vt6655/device_main.c
index 4324282afe49..03b2a90b9ac0 100644
--- a/drivers/staging/vt6655/device_main.c
+++ b/drivers/staging/vt6655/device_main.c
@@ -330,16 +330,6 @@ static void device_init_registers(struct vnt_private *pDevice)
330 /* zonetype initial */ 330 /* zonetype initial */
331 pDevice->byOriginalZonetype = pDevice->abyEEPROM[EEP_OFS_ZONETYPE]; 331 pDevice->byOriginalZonetype = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
332 332
333 /* Get RFType */
334 pDevice->byRFType = SROMbyReadEmbedded(pDevice->PortOffset, EEP_OFS_RFTYPE);
335
336 /* force change RevID for VT3253 emu */
337 if ((pDevice->byRFType & RF_EMU) != 0)
338 pDevice->byRevId = 0x80;
339
340 pDevice->byRFType &= RF_MASK;
341 pr_debug("pDevice->byRFType = %x\n", pDevice->byRFType);
342
343 if (!pDevice->bZoneRegExist) 333 if (!pDevice->bZoneRegExist)
344 pDevice->byZoneType = pDevice->abyEEPROM[EEP_OFS_ZONETYPE]; 334 pDevice->byZoneType = pDevice->abyEEPROM[EEP_OFS_ZONETYPE];
345 335
@@ -1187,12 +1177,14 @@ static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1187{ 1177{
1188 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data; 1178 struct ieee80211_hdr *hdr = (struct ieee80211_hdr *)skb->data;
1189 PSTxDesc head_td; 1179 PSTxDesc head_td;
1190 u32 dma_idx = TYPE_AC0DMA; 1180 u32 dma_idx;
1191 unsigned long flags; 1181 unsigned long flags;
1192 1182
1193 spin_lock_irqsave(&priv->lock, flags); 1183 spin_lock_irqsave(&priv->lock, flags);
1194 1184
1195 if (!ieee80211_is_data(hdr->frame_control)) 1185 if (ieee80211_is_data(hdr->frame_control))
1186 dma_idx = TYPE_AC0DMA;
1187 else
1196 dma_idx = TYPE_TXDMA0; 1188 dma_idx = TYPE_TXDMA0;
1197 1189
1198 if (AVAIL_TD(priv, dma_idx) < 1) { 1190 if (AVAIL_TD(priv, dma_idx) < 1) {
@@ -1206,6 +1198,9 @@ static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1206 1198
1207 head_td->pTDInfo->skb = skb; 1199 head_td->pTDInfo->skb = skb;
1208 1200
1201 if (dma_idx == TYPE_AC0DMA)
1202 head_td->pTDInfo->byFlags = TD_FLAGS_NETIF_SKB;
1203
1209 priv->iTDUsed[dma_idx]++; 1204 priv->iTDUsed[dma_idx]++;
1210 1205
1211 /* Take ownership */ 1206 /* Take ownership */
@@ -1234,13 +1229,10 @@ static int vnt_tx_packet(struct vnt_private *priv, struct sk_buff *skb)
1234 1229
1235 head_td->buff_addr = cpu_to_le32(head_td->pTDInfo->skb_dma); 1230 head_td->buff_addr = cpu_to_le32(head_td->pTDInfo->skb_dma);
1236 1231
1237 if (dma_idx == TYPE_AC0DMA) { 1232 if (head_td->pTDInfo->byFlags & TD_FLAGS_NETIF_SKB)
1238 head_td->pTDInfo->byFlags = TD_FLAGS_NETIF_SKB;
1239
1240 MACvTransmitAC0(priv->PortOffset); 1233 MACvTransmitAC0(priv->PortOffset);
1241 } else { 1234 else
1242 MACvTransmit0(priv->PortOffset); 1235 MACvTransmit0(priv->PortOffset);
1243 }
1244 1236
1245 spin_unlock_irqrestore(&priv->lock, flags); 1237 spin_unlock_irqrestore(&priv->lock, flags);
1246 1238
@@ -1778,6 +1770,12 @@ vt6655_probe(struct pci_dev *pcid, const struct pci_device_id *ent)
1778 MACvInitialize(priv->PortOffset); 1770 MACvInitialize(priv->PortOffset);
1779 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr); 1771 MACvReadEtherAddress(priv->PortOffset, priv->abyCurrentNetAddr);
1780 1772
1773 /* Get RFType */
1774 priv->byRFType = SROMbyReadEmbedded(priv->PortOffset, EEP_OFS_RFTYPE);
1775 priv->byRFType &= RF_MASK;
1776
1777 dev_dbg(&pcid->dev, "RF Type = %x\n", priv->byRFType);
1778
1781 device_get_options(priv); 1779 device_get_options(priv);
1782 device_set_options(priv); 1780 device_set_options(priv);
1783 /* Mask out the options cannot be set to the chip */ 1781 /* Mask out the options cannot be set to the chip */
diff --git a/drivers/staging/vt6655/rf.c b/drivers/staging/vt6655/rf.c
index 941b2adca95a..7626f635f160 100644
--- a/drivers/staging/vt6655/rf.c
+++ b/drivers/staging/vt6655/rf.c
@@ -794,6 +794,7 @@ bool RFbSetPower(
794 break; 794 break;
795 case RATE_6M: 795 case RATE_6M:
796 case RATE_9M: 796 case RATE_9M:
797 case RATE_12M:
797 case RATE_18M: 798 case RATE_18M:
798 byPwr = priv->abyOFDMPwrTbl[uCH]; 799 byPwr = priv->abyOFDMPwrTbl[uCH];
799 if (priv->byRFType == RF_UW2452) 800 if (priv->byRFType == RF_UW2452)
diff --git a/drivers/staging/vt6656/rf.c b/drivers/staging/vt6656/rf.c
index c42cde59f598..c4286ccac320 100644
--- a/drivers/staging/vt6656/rf.c
+++ b/drivers/staging/vt6656/rf.c
@@ -640,6 +640,7 @@ int vnt_rf_setpower(struct vnt_private *priv, u32 rate, u32 channel)
640 break; 640 break;
641 case RATE_6M: 641 case RATE_6M:
642 case RATE_9M: 642 case RATE_9M:
643 case RATE_12M:
643 case RATE_18M: 644 case RATE_18M:
644 case RATE_24M: 645 case RATE_24M:
645 case RATE_36M: 646 case RATE_36M:
diff --git a/drivers/target/iscsi/iscsi_target.c b/drivers/target/iscsi/iscsi_target.c
index aebde3289c50..2accb6e47beb 100644
--- a/drivers/target/iscsi/iscsi_target.c
+++ b/drivers/target/iscsi/iscsi_target.c
@@ -30,7 +30,7 @@
30#include <target/target_core_fabric.h> 30#include <target/target_core_fabric.h>
31#include <target/target_core_configfs.h> 31#include <target/target_core_configfs.h>
32 32
33#include "iscsi_target_core.h" 33#include <target/iscsi/iscsi_target_core.h>
34#include "iscsi_target_parameters.h" 34#include "iscsi_target_parameters.h"
35#include "iscsi_target_seq_pdu_list.h" 35#include "iscsi_target_seq_pdu_list.h"
36#include "iscsi_target_tq.h" 36#include "iscsi_target_tq.h"
@@ -45,7 +45,7 @@
45#include "iscsi_target_util.h" 45#include "iscsi_target_util.h"
46#include "iscsi_target.h" 46#include "iscsi_target.h"
47#include "iscsi_target_device.h" 47#include "iscsi_target_device.h"
48#include "iscsi_target_stat.h" 48#include <target/iscsi/iscsi_target_stat.h>
49 49
50#include <target/iscsi/iscsi_transport.h> 50#include <target/iscsi/iscsi_transport.h>
51 51
@@ -968,11 +968,7 @@ int iscsit_setup_scsi_cmd(struct iscsi_conn *conn, struct iscsi_cmd *cmd,
968 968
969 conn->sess->init_task_tag = cmd->init_task_tag = hdr->itt; 969 conn->sess->init_task_tag = cmd->init_task_tag = hdr->itt;
970 if (hdr->flags & ISCSI_FLAG_CMD_READ) { 970 if (hdr->flags & ISCSI_FLAG_CMD_READ) {
971 spin_lock_bh(&conn->sess->ttt_lock); 971 cmd->targ_xfer_tag = session_get_next_ttt(conn->sess);
972 cmd->targ_xfer_tag = conn->sess->targ_xfer_tag++;
973 if (cmd->targ_xfer_tag == 0xFFFFFFFF)
974 cmd->targ_xfer_tag = conn->sess->targ_xfer_tag++;
975 spin_unlock_bh(&conn->sess->ttt_lock);
976 } else if (hdr->flags & ISCSI_FLAG_CMD_WRITE) 972 } else if (hdr->flags & ISCSI_FLAG_CMD_WRITE)
977 cmd->targ_xfer_tag = 0xFFFFFFFF; 973 cmd->targ_xfer_tag = 0xFFFFFFFF;
978 cmd->cmd_sn = be32_to_cpu(hdr->cmdsn); 974 cmd->cmd_sn = be32_to_cpu(hdr->cmdsn);
@@ -1998,6 +1994,7 @@ iscsit_setup_text_cmd(struct iscsi_conn *conn, struct iscsi_cmd *cmd,
1998 cmd->cmd_sn = be32_to_cpu(hdr->cmdsn); 1994 cmd->cmd_sn = be32_to_cpu(hdr->cmdsn);
1999 cmd->exp_stat_sn = be32_to_cpu(hdr->exp_statsn); 1995 cmd->exp_stat_sn = be32_to_cpu(hdr->exp_statsn);
2000 cmd->data_direction = DMA_NONE; 1996 cmd->data_direction = DMA_NONE;
1997 cmd->text_in_ptr = NULL;
2001 1998
2002 return 0; 1999 return 0;
2003} 2000}
@@ -2011,9 +2008,13 @@ iscsit_process_text_cmd(struct iscsi_conn *conn, struct iscsi_cmd *cmd,
2011 int cmdsn_ret; 2008 int cmdsn_ret;
2012 2009
2013 if (!text_in) { 2010 if (!text_in) {
2014 pr_err("Unable to locate text_in buffer for sendtargets" 2011 cmd->targ_xfer_tag = be32_to_cpu(hdr->ttt);
2015 " discovery\n"); 2012 if (cmd->targ_xfer_tag == 0xFFFFFFFF) {
2016 goto reject; 2013 pr_err("Unable to locate text_in buffer for sendtargets"
2014 " discovery\n");
2015 goto reject;
2016 }
2017 goto empty_sendtargets;
2017 } 2018 }
2018 if (strncmp("SendTargets", text_in, 11) != 0) { 2019 if (strncmp("SendTargets", text_in, 11) != 0) {
2019 pr_err("Received Text Data that is not" 2020 pr_err("Received Text Data that is not"
@@ -2040,6 +2041,7 @@ iscsit_process_text_cmd(struct iscsi_conn *conn, struct iscsi_cmd *cmd,
2040 list_add_tail(&cmd->i_conn_node, &conn->conn_cmd_list); 2041 list_add_tail(&cmd->i_conn_node, &conn->conn_cmd_list);
2041 spin_unlock_bh(&conn->cmd_lock); 2042 spin_unlock_bh(&conn->cmd_lock);
2042 2043
2044empty_sendtargets:
2043 iscsit_ack_from_expstatsn(conn, be32_to_cpu(hdr->exp_statsn)); 2045 iscsit_ack_from_expstatsn(conn, be32_to_cpu(hdr->exp_statsn));
2044 2046
2045 if (!(hdr->opcode & ISCSI_OP_IMMEDIATE)) { 2047 if (!(hdr->opcode & ISCSI_OP_IMMEDIATE)) {
@@ -3047,11 +3049,7 @@ static int iscsit_send_r2t(
3047 int_to_scsilun(cmd->se_cmd.orig_fe_lun, 3049 int_to_scsilun(cmd->se_cmd.orig_fe_lun,
3048 (struct scsi_lun *)&hdr->lun); 3050 (struct scsi_lun *)&hdr->lun);
3049 hdr->itt = cmd->init_task_tag; 3051 hdr->itt = cmd->init_task_tag;
3050 spin_lock_bh(&conn->sess->ttt_lock); 3052 r2t->targ_xfer_tag = session_get_next_ttt(conn->sess);
3051 r2t->targ_xfer_tag = conn->sess->targ_xfer_tag++;
3052 if (r2t->targ_xfer_tag == 0xFFFFFFFF)
3053 r2t->targ_xfer_tag = conn->sess->targ_xfer_tag++;
3054 spin_unlock_bh(&conn->sess->ttt_lock);
3055 hdr->ttt = cpu_to_be32(r2t->targ_xfer_tag); 3053 hdr->ttt = cpu_to_be32(r2t->targ_xfer_tag);
3056 hdr->statsn = cpu_to_be32(conn->stat_sn); 3054 hdr->statsn = cpu_to_be32(conn->stat_sn);
3057 hdr->exp_cmdsn = cpu_to_be32(conn->sess->exp_cmd_sn); 3055 hdr->exp_cmdsn = cpu_to_be32(conn->sess->exp_cmd_sn);
@@ -3393,7 +3391,8 @@ static bool iscsit_check_inaddr_any(struct iscsi_np *np)
3393 3391
3394static int 3392static int
3395iscsit_build_sendtargets_response(struct iscsi_cmd *cmd, 3393iscsit_build_sendtargets_response(struct iscsi_cmd *cmd,
3396 enum iscsit_transport_type network_transport) 3394 enum iscsit_transport_type network_transport,
3395 int skip_bytes, bool *completed)
3397{ 3396{
3398 char *payload = NULL; 3397 char *payload = NULL;
3399 struct iscsi_conn *conn = cmd->conn; 3398 struct iscsi_conn *conn = cmd->conn;
@@ -3405,7 +3404,7 @@ iscsit_build_sendtargets_response(struct iscsi_cmd *cmd,
3405 unsigned char buf[ISCSI_IQN_LEN+12]; /* iqn + "TargetName=" + \0 */ 3404 unsigned char buf[ISCSI_IQN_LEN+12]; /* iqn + "TargetName=" + \0 */
3406 unsigned char *text_in = cmd->text_in_ptr, *text_ptr = NULL; 3405 unsigned char *text_in = cmd->text_in_ptr, *text_ptr = NULL;
3407 3406
3408 buffer_len = max(conn->conn_ops->MaxRecvDataSegmentLength, 3407 buffer_len = min(conn->conn_ops->MaxRecvDataSegmentLength,
3409 SENDTARGETS_BUF_LIMIT); 3408 SENDTARGETS_BUF_LIMIT);
3410 3409
3411 payload = kzalloc(buffer_len, GFP_KERNEL); 3410 payload = kzalloc(buffer_len, GFP_KERNEL);
@@ -3484,9 +3483,16 @@ iscsit_build_sendtargets_response(struct iscsi_cmd *cmd,
3484 end_of_buf = 1; 3483 end_of_buf = 1;
3485 goto eob; 3484 goto eob;
3486 } 3485 }
3487 memcpy(payload + payload_len, buf, len); 3486
3488 payload_len += len; 3487 if (skip_bytes && len <= skip_bytes) {
3489 target_name_printed = 1; 3488 skip_bytes -= len;
3489 } else {
3490 memcpy(payload + payload_len, buf, len);
3491 payload_len += len;
3492 target_name_printed = 1;
3493 if (len > skip_bytes)
3494 skip_bytes = 0;
3495 }
3490 } 3496 }
3491 3497
3492 len = sprintf(buf, "TargetAddress=" 3498 len = sprintf(buf, "TargetAddress="
@@ -3502,15 +3508,24 @@ iscsit_build_sendtargets_response(struct iscsi_cmd *cmd,
3502 end_of_buf = 1; 3508 end_of_buf = 1;
3503 goto eob; 3509 goto eob;
3504 } 3510 }
3505 memcpy(payload + payload_len, buf, len); 3511
3506 payload_len += len; 3512 if (skip_bytes && len <= skip_bytes) {
3513 skip_bytes -= len;
3514 } else {
3515 memcpy(payload + payload_len, buf, len);
3516 payload_len += len;
3517 if (len > skip_bytes)
3518 skip_bytes = 0;
3519 }
3507 } 3520 }
3508 spin_unlock(&tpg->tpg_np_lock); 3521 spin_unlock(&tpg->tpg_np_lock);
3509 } 3522 }
3510 spin_unlock(&tiqn->tiqn_tpg_lock); 3523 spin_unlock(&tiqn->tiqn_tpg_lock);
3511eob: 3524eob:
3512 if (end_of_buf) 3525 if (end_of_buf) {
3526 *completed = false;
3513 break; 3527 break;
3528 }
3514 3529
3515 if (cmd->cmd_flags & ICF_SENDTARGETS_SINGLE) 3530 if (cmd->cmd_flags & ICF_SENDTARGETS_SINGLE)
3516 break; 3531 break;
@@ -3528,13 +3543,23 @@ iscsit_build_text_rsp(struct iscsi_cmd *cmd, struct iscsi_conn *conn,
3528 enum iscsit_transport_type network_transport) 3543 enum iscsit_transport_type network_transport)
3529{ 3544{
3530 int text_length, padding; 3545 int text_length, padding;
3546 bool completed = true;
3531 3547
3532 text_length = iscsit_build_sendtargets_response(cmd, network_transport); 3548 text_length = iscsit_build_sendtargets_response(cmd, network_transport,
3549 cmd->read_data_done,
3550 &completed);
3533 if (text_length < 0) 3551 if (text_length < 0)
3534 return text_length; 3552 return text_length;
3535 3553
3554 if (completed) {
3555 hdr->flags |= ISCSI_FLAG_CMD_FINAL;
3556 } else {
3557 hdr->flags |= ISCSI_FLAG_TEXT_CONTINUE;
3558 cmd->read_data_done += text_length;
3559 if (cmd->targ_xfer_tag == 0xFFFFFFFF)
3560 cmd->targ_xfer_tag = session_get_next_ttt(conn->sess);
3561 }
3536 hdr->opcode = ISCSI_OP_TEXT_RSP; 3562 hdr->opcode = ISCSI_OP_TEXT_RSP;
3537 hdr->flags |= ISCSI_FLAG_CMD_FINAL;
3538 padding = ((-text_length) & 3); 3563 padding = ((-text_length) & 3);
3539 hton24(hdr->dlength, text_length); 3564 hton24(hdr->dlength, text_length);
3540 hdr->itt = cmd->init_task_tag; 3565 hdr->itt = cmd->init_task_tag;
@@ -3543,21 +3568,25 @@ iscsit_build_text_rsp(struct iscsi_cmd *cmd, struct iscsi_conn *conn,
3543 hdr->statsn = cpu_to_be32(cmd->stat_sn); 3568 hdr->statsn = cpu_to_be32(cmd->stat_sn);
3544 3569
3545 iscsit_increment_maxcmdsn(cmd, conn->sess); 3570 iscsit_increment_maxcmdsn(cmd, conn->sess);
3571 /*
3572 * Reset maxcmdsn_inc in multi-part text payload exchanges to
3573 * correctly increment MaxCmdSN for each response answering a
3574 * non immediate text request with a valid CmdSN.
3575 */
3576 cmd->maxcmdsn_inc = 0;
3546 hdr->exp_cmdsn = cpu_to_be32(conn->sess->exp_cmd_sn); 3577 hdr->exp_cmdsn = cpu_to_be32(conn->sess->exp_cmd_sn);
3547 hdr->max_cmdsn = cpu_to_be32(conn->sess->max_cmd_sn); 3578 hdr->max_cmdsn = cpu_to_be32(conn->sess->max_cmd_sn);
3548 3579
3549 pr_debug("Built Text Response: ITT: 0x%08x, StatSN: 0x%08x," 3580 pr_debug("Built Text Response: ITT: 0x%08x, TTT: 0x%08x, StatSN: 0x%08x,"
3550 " Length: %u, CID: %hu\n", cmd->init_task_tag, cmd->stat_sn, 3581 " Length: %u, CID: %hu F: %d C: %d\n", cmd->init_task_tag,
3551 text_length, conn->cid); 3582 cmd->targ_xfer_tag, cmd->stat_sn, text_length, conn->cid,
3583 !!(hdr->flags & ISCSI_FLAG_CMD_FINAL),
3584 !!(hdr->flags & ISCSI_FLAG_TEXT_CONTINUE));
3552 3585
3553 return text_length + padding; 3586 return text_length + padding;
3554} 3587}
3555EXPORT_SYMBOL(iscsit_build_text_rsp); 3588EXPORT_SYMBOL(iscsit_build_text_rsp);
3556 3589
3557/*
3558 * FIXME: Add support for F_BIT and C_BIT when the length is longer than
3559 * MaxRecvDataSegmentLength.
3560 */
3561static int iscsit_send_text_rsp( 3590static int iscsit_send_text_rsp(
3562 struct iscsi_cmd *cmd, 3591 struct iscsi_cmd *cmd,
3563 struct iscsi_conn *conn) 3592 struct iscsi_conn *conn)
@@ -4021,9 +4050,15 @@ static int iscsi_target_rx_opcode(struct iscsi_conn *conn, unsigned char *buf)
4021 ret = iscsit_handle_task_mgt_cmd(conn, cmd, buf); 4050 ret = iscsit_handle_task_mgt_cmd(conn, cmd, buf);
4022 break; 4051 break;
4023 case ISCSI_OP_TEXT: 4052 case ISCSI_OP_TEXT:
4024 cmd = iscsit_allocate_cmd(conn, TASK_INTERRUPTIBLE); 4053 if (hdr->ttt != cpu_to_be32(0xFFFFFFFF)) {
4025 if (!cmd) 4054 cmd = iscsit_find_cmd_from_itt(conn, hdr->itt);
4026 goto reject; 4055 if (!cmd)
4056 goto reject;
4057 } else {
4058 cmd = iscsit_allocate_cmd(conn, TASK_INTERRUPTIBLE);
4059 if (!cmd)
4060 goto reject;
4061 }
4027 4062
4028 ret = iscsit_handle_text_cmd(conn, cmd, buf); 4063 ret = iscsit_handle_text_cmd(conn, cmd, buf);
4029 break; 4064 break;
@@ -4221,11 +4256,17 @@ int iscsit_close_connection(
4221 pr_debug("Closing iSCSI connection CID %hu on SID:" 4256 pr_debug("Closing iSCSI connection CID %hu on SID:"
4222 " %u\n", conn->cid, sess->sid); 4257 " %u\n", conn->cid, sess->sid);
4223 /* 4258 /*
4224 * Always up conn_logout_comp just in case the RX Thread is sleeping 4259 * Always up conn_logout_comp for the traditional TCP case just in case
4225 * and the logout response never got sent because the connection 4260 * the RX Thread in iscsi_target_rx_opcode() is sleeping and the logout
4226 * failed. 4261 * response never got sent because the connection failed.
4262 *
4263 * However for iser-target, isert_wait4logout() is using conn_logout_comp
4264 * to signal logout response TX interrupt completion. Go ahead and skip
4265 * this for iser since isert_rx_opcode() does not wait on logout failure,
4266 * and to avoid iscsi_conn pointer dereference in iser-target code.
4227 */ 4267 */
4228 complete(&conn->conn_logout_comp); 4268 if (conn->conn_transport->transport_type == ISCSI_TCP)
4269 complete(&conn->conn_logout_comp);
4229 4270
4230 iscsi_release_thread_set(conn); 4271 iscsi_release_thread_set(conn);
4231 4272
diff --git a/drivers/target/iscsi/iscsi_target_auth.c b/drivers/target/iscsi/iscsi_target_auth.c
index ab4915c0d933..47e249dccb5f 100644
--- a/drivers/target/iscsi/iscsi_target_auth.c
+++ b/drivers/target/iscsi/iscsi_target_auth.c
@@ -22,7 +22,7 @@
22#include <linux/err.h> 22#include <linux/err.h>
23#include <linux/scatterlist.h> 23#include <linux/scatterlist.h>
24 24
25#include "iscsi_target_core.h" 25#include <target/iscsi/iscsi_target_core.h>
26#include "iscsi_target_nego.h" 26#include "iscsi_target_nego.h"
27#include "iscsi_target_auth.h" 27#include "iscsi_target_auth.h"
28 28
diff --git a/drivers/target/iscsi/iscsi_target_configfs.c b/drivers/target/iscsi/iscsi_target_configfs.c
index 9059c1e0b26e..48384b675e62 100644
--- a/drivers/target/iscsi/iscsi_target_configfs.c
+++ b/drivers/target/iscsi/iscsi_target_configfs.c
@@ -28,7 +28,7 @@
28#include <target/configfs_macros.h> 28#include <target/configfs_macros.h>
29#include <target/iscsi/iscsi_transport.h> 29#include <target/iscsi/iscsi_transport.h>
30 30
31#include "iscsi_target_core.h" 31#include <target/iscsi/iscsi_target_core.h>
32#include "iscsi_target_parameters.h" 32#include "iscsi_target_parameters.h"
33#include "iscsi_target_device.h" 33#include "iscsi_target_device.h"
34#include "iscsi_target_erl0.h" 34#include "iscsi_target_erl0.h"
@@ -36,7 +36,7 @@
36#include "iscsi_target_tpg.h" 36#include "iscsi_target_tpg.h"
37#include "iscsi_target_util.h" 37#include "iscsi_target_util.h"
38#include "iscsi_target.h" 38#include "iscsi_target.h"
39#include "iscsi_target_stat.h" 39#include <target/iscsi/iscsi_target_stat.h>
40#include "iscsi_target_configfs.h" 40#include "iscsi_target_configfs.h"
41 41
42struct target_fabric_configfs *lio_target_fabric_configfs; 42struct target_fabric_configfs *lio_target_fabric_configfs;
@@ -674,12 +674,9 @@ static ssize_t lio_target_nacl_show_info(
674 rb += sprintf(page+rb, "InitiatorAlias: %s\n", 674 rb += sprintf(page+rb, "InitiatorAlias: %s\n",
675 sess->sess_ops->InitiatorAlias); 675 sess->sess_ops->InitiatorAlias);
676 676
677 rb += sprintf(page+rb, "LIO Session ID: %u " 677 rb += sprintf(page+rb,
678 "ISID: 0x%02x %02x %02x %02x %02x %02x " 678 "LIO Session ID: %u ISID: 0x%6ph TSIH: %hu ",
679 "TSIH: %hu ", sess->sid, 679 sess->sid, sess->isid, sess->tsih);
680 sess->isid[0], sess->isid[1], sess->isid[2],
681 sess->isid[3], sess->isid[4], sess->isid[5],
682 sess->tsih);
683 rb += sprintf(page+rb, "SessionType: %s\n", 680 rb += sprintf(page+rb, "SessionType: %s\n",
684 (sess->sess_ops->SessionType) ? 681 (sess->sess_ops->SessionType) ?
685 "Discovery" : "Normal"); 682 "Discovery" : "Normal");
@@ -1758,9 +1755,7 @@ static u32 lio_sess_get_initiator_sid(
1758 /* 1755 /*
1759 * iSCSI Initiator Session Identifier from RFC-3720. 1756 * iSCSI Initiator Session Identifier from RFC-3720.
1760 */ 1757 */
1761 return snprintf(buf, size, "%02x%02x%02x%02x%02x%02x", 1758 return snprintf(buf, size, "%6phN", sess->isid);
1762 sess->isid[0], sess->isid[1], sess->isid[2],
1763 sess->isid[3], sess->isid[4], sess->isid[5]);
1764} 1759}
1765 1760
1766static int lio_queue_data_in(struct se_cmd *se_cmd) 1761static int lio_queue_data_in(struct se_cmd *se_cmd)
diff --git a/drivers/target/iscsi/iscsi_target_datain_values.c b/drivers/target/iscsi/iscsi_target_datain_values.c
index e93d5a7a3f81..fb3b52b124ac 100644
--- a/drivers/target/iscsi/iscsi_target_datain_values.c
+++ b/drivers/target/iscsi/iscsi_target_datain_values.c
@@ -18,7 +18,7 @@
18 18
19#include <scsi/iscsi_proto.h> 19#include <scsi/iscsi_proto.h>
20 20
21#include "iscsi_target_core.h" 21#include <target/iscsi/iscsi_target_core.h>
22#include "iscsi_target_seq_pdu_list.h" 22#include "iscsi_target_seq_pdu_list.h"
23#include "iscsi_target_erl1.h" 23#include "iscsi_target_erl1.h"
24#include "iscsi_target_util.h" 24#include "iscsi_target_util.h"
diff --git a/drivers/target/iscsi/iscsi_target_device.c b/drivers/target/iscsi/iscsi_target_device.c
index 7087c736daa5..34c3cd1b05ce 100644
--- a/drivers/target/iscsi/iscsi_target_device.c
+++ b/drivers/target/iscsi/iscsi_target_device.c
@@ -21,7 +21,7 @@
21#include <target/target_core_base.h> 21#include <target/target_core_base.h>
22#include <target/target_core_fabric.h> 22#include <target/target_core_fabric.h>
23 23
24#include "iscsi_target_core.h" 24#include <target/iscsi/iscsi_target_core.h>
25#include "iscsi_target_device.h" 25#include "iscsi_target_device.h"
26#include "iscsi_target_tpg.h" 26#include "iscsi_target_tpg.h"
27#include "iscsi_target_util.h" 27#include "iscsi_target_util.h"
diff --git a/drivers/target/iscsi/iscsi_target_erl0.c b/drivers/target/iscsi/iscsi_target_erl0.c
index a0ae5fc0ad75..bdd8731a4daa 100644
--- a/drivers/target/iscsi/iscsi_target_erl0.c
+++ b/drivers/target/iscsi/iscsi_target_erl0.c
@@ -21,7 +21,7 @@
21#include <target/target_core_base.h> 21#include <target/target_core_base.h>
22#include <target/target_core_fabric.h> 22#include <target/target_core_fabric.h>
23 23
24#include "iscsi_target_core.h" 24#include <target/iscsi/iscsi_target_core.h>
25#include "iscsi_target_seq_pdu_list.h" 25#include "iscsi_target_seq_pdu_list.h"
26#include "iscsi_target_tq.h" 26#include "iscsi_target_tq.h"
27#include "iscsi_target_erl0.h" 27#include "iscsi_target_erl0.h"
diff --git a/drivers/target/iscsi/iscsi_target_erl1.c b/drivers/target/iscsi/iscsi_target_erl1.c
index cda4d80cfaef..2e561deb30a2 100644
--- a/drivers/target/iscsi/iscsi_target_erl1.c
+++ b/drivers/target/iscsi/iscsi_target_erl1.c
@@ -22,7 +22,7 @@
22#include <target/target_core_fabric.h> 22#include <target/target_core_fabric.h>
23#include <target/iscsi/iscsi_transport.h> 23#include <target/iscsi/iscsi_transport.h>
24 24
25#include "iscsi_target_core.h" 25#include <target/iscsi/iscsi_target_core.h>
26#include "iscsi_target_seq_pdu_list.h" 26#include "iscsi_target_seq_pdu_list.h"
27#include "iscsi_target_datain_values.h" 27#include "iscsi_target_datain_values.h"
28#include "iscsi_target_device.h" 28#include "iscsi_target_device.h"
diff --git a/drivers/target/iscsi/iscsi_target_erl2.c b/drivers/target/iscsi/iscsi_target_erl2.c
index 4ca8fd2a70db..e24f1c7c5862 100644
--- a/drivers/target/iscsi/iscsi_target_erl2.c
+++ b/drivers/target/iscsi/iscsi_target_erl2.c
@@ -21,7 +21,7 @@
21#include <target/target_core_base.h> 21#include <target/target_core_base.h>
22#include <target/target_core_fabric.h> 22#include <target/target_core_fabric.h>
23 23
24#include "iscsi_target_core.h" 24#include <target/iscsi/iscsi_target_core.h>
25#include "iscsi_target_datain_values.h" 25#include "iscsi_target_datain_values.h"
26#include "iscsi_target_util.h" 26#include "iscsi_target_util.h"
27#include "iscsi_target_erl0.h" 27#include "iscsi_target_erl0.h"
diff --git a/drivers/target/iscsi/iscsi_target_login.c b/drivers/target/iscsi/iscsi_target_login.c
index 713c0c1877ab..153fb66ac1b8 100644
--- a/drivers/target/iscsi/iscsi_target_login.c
+++ b/drivers/target/iscsi/iscsi_target_login.c
@@ -24,14 +24,14 @@
24#include <target/target_core_base.h> 24#include <target/target_core_base.h>
25#include <target/target_core_fabric.h> 25#include <target/target_core_fabric.h>
26 26
27#include "iscsi_target_core.h" 27#include <target/iscsi/iscsi_target_core.h>
28#include <target/iscsi/iscsi_target_stat.h>
28#include "iscsi_target_tq.h" 29#include "iscsi_target_tq.h"
29#include "iscsi_target_device.h" 30#include "iscsi_target_device.h"
30#include "iscsi_target_nego.h" 31#include "iscsi_target_nego.h"
31#include "iscsi_target_erl0.h" 32#include "iscsi_target_erl0.h"
32#include "iscsi_target_erl2.h" 33#include "iscsi_target_erl2.h"
33#include "iscsi_target_login.h" 34#include "iscsi_target_login.h"
34#include "iscsi_target_stat.h"
35#include "iscsi_target_tpg.h" 35#include "iscsi_target_tpg.h"
36#include "iscsi_target_util.h" 36#include "iscsi_target_util.h"
37#include "iscsi_target.h" 37#include "iscsi_target.h"
diff --git a/drivers/target/iscsi/iscsi_target_nego.c b/drivers/target/iscsi/iscsi_target_nego.c
index 62a095f36bf2..8c02fa34716f 100644
--- a/drivers/target/iscsi/iscsi_target_nego.c
+++ b/drivers/target/iscsi/iscsi_target_nego.c
@@ -22,7 +22,7 @@
22#include <target/target_core_fabric.h> 22#include <target/target_core_fabric.h>
23#include <target/iscsi/iscsi_transport.h> 23#include <target/iscsi/iscsi_transport.h>
24 24
25#include "iscsi_target_core.h" 25#include <target/iscsi/iscsi_target_core.h>
26#include "iscsi_target_parameters.h" 26#include "iscsi_target_parameters.h"
27#include "iscsi_target_login.h" 27#include "iscsi_target_login.h"
28#include "iscsi_target_nego.h" 28#include "iscsi_target_nego.h"
diff --git a/drivers/target/iscsi/iscsi_target_nodeattrib.c b/drivers/target/iscsi/iscsi_target_nodeattrib.c
index 16454a922e2b..208cca8a363c 100644
--- a/drivers/target/iscsi/iscsi_target_nodeattrib.c
+++ b/drivers/target/iscsi/iscsi_target_nodeattrib.c
@@ -18,7 +18,7 @@
18 18
19#include <target/target_core_base.h> 19#include <target/target_core_base.h>
20 20
21#include "iscsi_target_core.h" 21#include <target/iscsi/iscsi_target_core.h>
22#include "iscsi_target_device.h" 22#include "iscsi_target_device.h"
23#include "iscsi_target_tpg.h" 23#include "iscsi_target_tpg.h"
24#include "iscsi_target_util.h" 24#include "iscsi_target_util.h"
diff --git a/drivers/target/iscsi/iscsi_target_parameters.c b/drivers/target/iscsi/iscsi_target_parameters.c
index 18c29260b4a2..d4f9e9645697 100644
--- a/drivers/target/iscsi/iscsi_target_parameters.c
+++ b/drivers/target/iscsi/iscsi_target_parameters.c
@@ -18,7 +18,7 @@
18 18
19#include <linux/slab.h> 19#include <linux/slab.h>
20 20
21#include "iscsi_target_core.h" 21#include <target/iscsi/iscsi_target_core.h>
22#include "iscsi_target_util.h" 22#include "iscsi_target_util.h"
23#include "iscsi_target_parameters.h" 23#include "iscsi_target_parameters.h"
24 24
diff --git a/drivers/target/iscsi/iscsi_target_seq_pdu_list.c b/drivers/target/iscsi/iscsi_target_seq_pdu_list.c
index ca41b583f2f6..e446a09c886b 100644
--- a/drivers/target/iscsi/iscsi_target_seq_pdu_list.c
+++ b/drivers/target/iscsi/iscsi_target_seq_pdu_list.c
@@ -20,7 +20,7 @@
20#include <linux/slab.h> 20#include <linux/slab.h>
21#include <linux/random.h> 21#include <linux/random.h>
22 22
23#include "iscsi_target_core.h" 23#include <target/iscsi/iscsi_target_core.h>
24#include "iscsi_target_util.h" 24#include "iscsi_target_util.h"
25#include "iscsi_target_tpg.h" 25#include "iscsi_target_tpg.h"
26#include "iscsi_target_seq_pdu_list.h" 26#include "iscsi_target_seq_pdu_list.h"
diff --git a/drivers/target/iscsi/iscsi_target_stat.c b/drivers/target/iscsi/iscsi_target_stat.c
index 103395510307..5e1349a3b143 100644
--- a/drivers/target/iscsi/iscsi_target_stat.c
+++ b/drivers/target/iscsi/iscsi_target_stat.c
@@ -23,12 +23,12 @@
23#include <target/target_core_base.h> 23#include <target/target_core_base.h>
24#include <target/configfs_macros.h> 24#include <target/configfs_macros.h>
25 25
26#include "iscsi_target_core.h" 26#include <target/iscsi/iscsi_target_core.h>
27#include "iscsi_target_parameters.h" 27#include "iscsi_target_parameters.h"
28#include "iscsi_target_device.h" 28#include "iscsi_target_device.h"
29#include "iscsi_target_tpg.h" 29#include "iscsi_target_tpg.h"
30#include "iscsi_target_util.h" 30#include "iscsi_target_util.h"
31#include "iscsi_target_stat.h" 31#include <target/iscsi/iscsi_target_stat.h>
32 32
33#ifndef INITIAL_JIFFIES 33#ifndef INITIAL_JIFFIES
34#define INITIAL_JIFFIES ((unsigned long)(unsigned int) (-300*HZ)) 34#define INITIAL_JIFFIES ((unsigned long)(unsigned int) (-300*HZ))
diff --git a/drivers/target/iscsi/iscsi_target_tmr.c b/drivers/target/iscsi/iscsi_target_tmr.c
index 78404b1cc0bf..b0224a77e26d 100644
--- a/drivers/target/iscsi/iscsi_target_tmr.c
+++ b/drivers/target/iscsi/iscsi_target_tmr.c
@@ -23,7 +23,7 @@
23#include <target/target_core_fabric.h> 23#include <target/target_core_fabric.h>
24#include <target/iscsi/iscsi_transport.h> 24#include <target/iscsi/iscsi_transport.h>
25 25
26#include "iscsi_target_core.h" 26#include <target/iscsi/iscsi_target_core.h>
27#include "iscsi_target_seq_pdu_list.h" 27#include "iscsi_target_seq_pdu_list.h"
28#include "iscsi_target_datain_values.h" 28#include "iscsi_target_datain_values.h"
29#include "iscsi_target_device.h" 29#include "iscsi_target_device.h"
diff --git a/drivers/target/iscsi/iscsi_target_tpg.c b/drivers/target/iscsi/iscsi_target_tpg.c
index 9053a3c0c6e5..bdd127c0e3ae 100644
--- a/drivers/target/iscsi/iscsi_target_tpg.c
+++ b/drivers/target/iscsi/iscsi_target_tpg.c
@@ -20,7 +20,7 @@
20#include <target/target_core_fabric.h> 20#include <target/target_core_fabric.h>
21#include <target/target_core_configfs.h> 21#include <target/target_core_configfs.h>
22 22
23#include "iscsi_target_core.h" 23#include <target/iscsi/iscsi_target_core.h>
24#include "iscsi_target_erl0.h" 24#include "iscsi_target_erl0.h"
25#include "iscsi_target_login.h" 25#include "iscsi_target_login.h"
26#include "iscsi_target_nodeattrib.h" 26#include "iscsi_target_nodeattrib.h"
diff --git a/drivers/target/iscsi/iscsi_target_tq.c b/drivers/target/iscsi/iscsi_target_tq.c
index 601e9cc61e98..26aa50996473 100644
--- a/drivers/target/iscsi/iscsi_target_tq.c
+++ b/drivers/target/iscsi/iscsi_target_tq.c
@@ -20,40 +20,26 @@
20#include <linux/list.h> 20#include <linux/list.h>
21#include <linux/bitmap.h> 21#include <linux/bitmap.h>
22 22
23#include "iscsi_target_core.h" 23#include <target/iscsi/iscsi_target_core.h>
24#include "iscsi_target_tq.h" 24#include "iscsi_target_tq.h"
25#include "iscsi_target.h" 25#include "iscsi_target.h"
26 26
27static LIST_HEAD(active_ts_list);
28static LIST_HEAD(inactive_ts_list); 27static LIST_HEAD(inactive_ts_list);
29static DEFINE_SPINLOCK(active_ts_lock);
30static DEFINE_SPINLOCK(inactive_ts_lock); 28static DEFINE_SPINLOCK(inactive_ts_lock);
31static DEFINE_SPINLOCK(ts_bitmap_lock); 29static DEFINE_SPINLOCK(ts_bitmap_lock);
32 30
33static void iscsi_add_ts_to_active_list(struct iscsi_thread_set *ts)
34{
35 spin_lock(&active_ts_lock);
36 list_add_tail(&ts->ts_list, &active_ts_list);
37 iscsit_global->active_ts++;
38 spin_unlock(&active_ts_lock);
39}
40
41static void iscsi_add_ts_to_inactive_list(struct iscsi_thread_set *ts) 31static void iscsi_add_ts_to_inactive_list(struct iscsi_thread_set *ts)
42{ 32{
33 if (!list_empty(&ts->ts_list)) {
34 WARN_ON(1);
35 return;
36 }
43 spin_lock(&inactive_ts_lock); 37 spin_lock(&inactive_ts_lock);
44 list_add_tail(&ts->ts_list, &inactive_ts_list); 38 list_add_tail(&ts->ts_list, &inactive_ts_list);
45 iscsit_global->inactive_ts++; 39 iscsit_global->inactive_ts++;
46 spin_unlock(&inactive_ts_lock); 40 spin_unlock(&inactive_ts_lock);
47} 41}
48 42
49static void iscsi_del_ts_from_active_list(struct iscsi_thread_set *ts)
50{
51 spin_lock(&active_ts_lock);
52 list_del(&ts->ts_list);
53 iscsit_global->active_ts--;
54 spin_unlock(&active_ts_lock);
55}
56
57static struct iscsi_thread_set *iscsi_get_ts_from_inactive_list(void) 43static struct iscsi_thread_set *iscsi_get_ts_from_inactive_list(void)
58{ 44{
59 struct iscsi_thread_set *ts; 45 struct iscsi_thread_set *ts;
@@ -66,7 +52,7 @@ static struct iscsi_thread_set *iscsi_get_ts_from_inactive_list(void)
66 52
67 ts = list_first_entry(&inactive_ts_list, struct iscsi_thread_set, ts_list); 53 ts = list_first_entry(&inactive_ts_list, struct iscsi_thread_set, ts_list);
68 54
69 list_del(&ts->ts_list); 55 list_del_init(&ts->ts_list);
70 iscsit_global->inactive_ts--; 56 iscsit_global->inactive_ts--;
71 spin_unlock(&inactive_ts_lock); 57 spin_unlock(&inactive_ts_lock);
72 58
@@ -204,8 +190,6 @@ static void iscsi_deallocate_extra_thread_sets(void)
204 190
205void iscsi_activate_thread_set(struct iscsi_conn *conn, struct iscsi_thread_set *ts) 191void iscsi_activate_thread_set(struct iscsi_conn *conn, struct iscsi_thread_set *ts)
206{ 192{
207 iscsi_add_ts_to_active_list(ts);
208
209 spin_lock_bh(&ts->ts_state_lock); 193 spin_lock_bh(&ts->ts_state_lock);
210 conn->thread_set = ts; 194 conn->thread_set = ts;
211 ts->conn = conn; 195 ts->conn = conn;
@@ -397,7 +381,6 @@ struct iscsi_conn *iscsi_rx_thread_pre_handler(struct iscsi_thread_set *ts)
397 381
398 if (ts->delay_inactive && (--ts->thread_count == 0)) { 382 if (ts->delay_inactive && (--ts->thread_count == 0)) {
399 spin_unlock_bh(&ts->ts_state_lock); 383 spin_unlock_bh(&ts->ts_state_lock);
400 iscsi_del_ts_from_active_list(ts);
401 384
402 if (!iscsit_global->in_shutdown) 385 if (!iscsit_global->in_shutdown)
403 iscsi_deallocate_extra_thread_sets(); 386 iscsi_deallocate_extra_thread_sets();
@@ -452,7 +435,6 @@ struct iscsi_conn *iscsi_tx_thread_pre_handler(struct iscsi_thread_set *ts)
452 435
453 if (ts->delay_inactive && (--ts->thread_count == 0)) { 436 if (ts->delay_inactive && (--ts->thread_count == 0)) {
454 spin_unlock_bh(&ts->ts_state_lock); 437 spin_unlock_bh(&ts->ts_state_lock);
455 iscsi_del_ts_from_active_list(ts);
456 438
457 if (!iscsit_global->in_shutdown) 439 if (!iscsit_global->in_shutdown)
458 iscsi_deallocate_extra_thread_sets(); 440 iscsi_deallocate_extra_thread_sets();
diff --git a/drivers/target/iscsi/iscsi_target_util.c b/drivers/target/iscsi/iscsi_target_util.c
index bcd88ec99793..390df8ed72b2 100644
--- a/drivers/target/iscsi/iscsi_target_util.c
+++ b/drivers/target/iscsi/iscsi_target_util.c
@@ -25,7 +25,7 @@
25#include <target/target_core_configfs.h> 25#include <target/target_core_configfs.h>
26#include <target/iscsi/iscsi_transport.h> 26#include <target/iscsi/iscsi_transport.h>
27 27
28#include "iscsi_target_core.h" 28#include <target/iscsi/iscsi_target_core.h>
29#include "iscsi_target_parameters.h" 29#include "iscsi_target_parameters.h"
30#include "iscsi_target_seq_pdu_list.h" 30#include "iscsi_target_seq_pdu_list.h"
31#include "iscsi_target_datain_values.h" 31#include "iscsi_target_datain_values.h"
@@ -390,6 +390,7 @@ struct iscsi_cmd *iscsit_find_cmd_from_itt(
390 init_task_tag, conn->cid); 390 init_task_tag, conn->cid);
391 return NULL; 391 return NULL;
392} 392}
393EXPORT_SYMBOL(iscsit_find_cmd_from_itt);
393 394
394struct iscsi_cmd *iscsit_find_cmd_from_itt_or_dump( 395struct iscsi_cmd *iscsit_find_cmd_from_itt_or_dump(
395 struct iscsi_conn *conn, 396 struct iscsi_conn *conn,
@@ -939,13 +940,8 @@ static int iscsit_add_nopin(struct iscsi_conn *conn, int want_response)
939 state = (want_response) ? ISTATE_SEND_NOPIN_WANT_RESPONSE : 940 state = (want_response) ? ISTATE_SEND_NOPIN_WANT_RESPONSE :
940 ISTATE_SEND_NOPIN_NO_RESPONSE; 941 ISTATE_SEND_NOPIN_NO_RESPONSE;
941 cmd->init_task_tag = RESERVED_ITT; 942 cmd->init_task_tag = RESERVED_ITT;
942 spin_lock_bh(&conn->sess->ttt_lock); 943 cmd->targ_xfer_tag = (want_response) ?
943 cmd->targ_xfer_tag = (want_response) ? conn->sess->targ_xfer_tag++ : 944 session_get_next_ttt(conn->sess) : 0xFFFFFFFF;
944 0xFFFFFFFF;
945 if (want_response && (cmd->targ_xfer_tag == 0xFFFFFFFF))
946 cmd->targ_xfer_tag = conn->sess->targ_xfer_tag++;
947 spin_unlock_bh(&conn->sess->ttt_lock);
948
949 spin_lock_bh(&conn->cmd_lock); 945 spin_lock_bh(&conn->cmd_lock);
950 list_add_tail(&cmd->i_conn_node, &conn->conn_cmd_list); 946 list_add_tail(&cmd->i_conn_node, &conn->conn_cmd_list);
951 spin_unlock_bh(&conn->cmd_lock); 947 spin_unlock_bh(&conn->cmd_lock);
diff --git a/drivers/target/iscsi/iscsi_target_util.h b/drivers/target/iscsi/iscsi_target_util.h
index a68508c4fec8..1ab754a671ff 100644
--- a/drivers/target/iscsi/iscsi_target_util.h
+++ b/drivers/target/iscsi/iscsi_target_util.h
@@ -16,7 +16,6 @@ extern struct iscsi_r2t *iscsit_get_holder_for_r2tsn(struct iscsi_cmd *, u32);
16extern int iscsit_sequence_cmd(struct iscsi_conn *conn, struct iscsi_cmd *cmd, 16extern int iscsit_sequence_cmd(struct iscsi_conn *conn, struct iscsi_cmd *cmd,
17 unsigned char * ,__be32 cmdsn); 17 unsigned char * ,__be32 cmdsn);
18extern int iscsit_check_unsolicited_dataout(struct iscsi_cmd *, unsigned char *); 18extern int iscsit_check_unsolicited_dataout(struct iscsi_cmd *, unsigned char *);
19extern struct iscsi_cmd *iscsit_find_cmd_from_itt(struct iscsi_conn *, itt_t);
20extern struct iscsi_cmd *iscsit_find_cmd_from_itt_or_dump(struct iscsi_conn *, 19extern struct iscsi_cmd *iscsit_find_cmd_from_itt_or_dump(struct iscsi_conn *,
21 itt_t, u32); 20 itt_t, u32);
22extern struct iscsi_cmd *iscsit_find_cmd_from_ttt(struct iscsi_conn *, u32); 21extern struct iscsi_cmd *iscsit_find_cmd_from_ttt(struct iscsi_conn *, u32);
diff --git a/drivers/target/loopback/tcm_loop.c b/drivers/target/loopback/tcm_loop.c
index 6b3c32954689..c36bd7c29136 100644
--- a/drivers/target/loopback/tcm_loop.c
+++ b/drivers/target/loopback/tcm_loop.c
@@ -953,11 +953,8 @@ static int tcm_loop_make_nexus(
953 transport_free_session(tl_nexus->se_sess); 953 transport_free_session(tl_nexus->se_sess);
954 goto out; 954 goto out;
955 } 955 }
956 /* 956 /* Now, register the SAS I_T Nexus as active. */
957 * Now, register the SAS I_T Nexus as active with the call to 957 transport_register_session(se_tpg, tl_nexus->se_sess->se_node_acl,
958 * transport_register_session()
959 */
960 __transport_register_session(se_tpg, tl_nexus->se_sess->se_node_acl,
961 tl_nexus->se_sess, tl_nexus); 958 tl_nexus->se_sess, tl_nexus);
962 tl_tpg->tl_nexus = tl_nexus; 959 tl_tpg->tl_nexus = tl_nexus;
963 pr_debug("TCM_Loop_ConfigFS: Established I_T Nexus to emulated" 960 pr_debug("TCM_Loop_ConfigFS: Established I_T Nexus to emulated"
diff --git a/drivers/target/target_core_device.c b/drivers/target/target_core_device.c
index 58f49ff69b14..79b4ec3ca2db 100644
--- a/drivers/target/target_core_device.c
+++ b/drivers/target/target_core_device.c
@@ -650,6 +650,18 @@ static u32 se_dev_align_max_sectors(u32 max_sectors, u32 block_size)
650 return aligned_max_sectors; 650 return aligned_max_sectors;
651} 651}
652 652
653bool se_dev_check_wce(struct se_device *dev)
654{
655 bool wce = false;
656
657 if (dev->transport->get_write_cache)
658 wce = dev->transport->get_write_cache(dev);
659 else if (dev->dev_attrib.emulate_write_cache > 0)
660 wce = true;
661
662 return wce;
663}
664
653int se_dev_set_max_unmap_lba_count( 665int se_dev_set_max_unmap_lba_count(
654 struct se_device *dev, 666 struct se_device *dev,
655 u32 max_unmap_lba_count) 667 u32 max_unmap_lba_count)
@@ -767,6 +779,16 @@ int se_dev_set_emulate_fua_write(struct se_device *dev, int flag)
767 pr_err("Illegal value %d\n", flag); 779 pr_err("Illegal value %d\n", flag);
768 return -EINVAL; 780 return -EINVAL;
769 } 781 }
782 if (flag &&
783 dev->transport->get_write_cache) {
784 pr_err("emulate_fua_write not supported for this device\n");
785 return -EINVAL;
786 }
787 if (dev->export_count) {
788 pr_err("emulate_fua_write cannot be changed with active"
789 " exports: %d\n", dev->export_count);
790 return -EINVAL;
791 }
770 dev->dev_attrib.emulate_fua_write = flag; 792 dev->dev_attrib.emulate_fua_write = flag;
771 pr_debug("dev[%p]: SE Device Forced Unit Access WRITEs: %d\n", 793 pr_debug("dev[%p]: SE Device Forced Unit Access WRITEs: %d\n",
772 dev, dev->dev_attrib.emulate_fua_write); 794 dev, dev->dev_attrib.emulate_fua_write);
@@ -801,7 +823,11 @@ int se_dev_set_emulate_write_cache(struct se_device *dev, int flag)
801 pr_err("emulate_write_cache not supported for this device\n"); 823 pr_err("emulate_write_cache not supported for this device\n");
802 return -EINVAL; 824 return -EINVAL;
803 } 825 }
804 826 if (dev->export_count) {
827 pr_err("emulate_write_cache cannot be changed with active"
828 " exports: %d\n", dev->export_count);
829 return -EINVAL;
830 }
805 dev->dev_attrib.emulate_write_cache = flag; 831 dev->dev_attrib.emulate_write_cache = flag;
806 pr_debug("dev[%p]: SE Device WRITE_CACHE_EMULATION flag: %d\n", 832 pr_debug("dev[%p]: SE Device WRITE_CACHE_EMULATION flag: %d\n",
807 dev, dev->dev_attrib.emulate_write_cache); 833 dev, dev->dev_attrib.emulate_write_cache);
@@ -1534,8 +1560,6 @@ int target_configure_device(struct se_device *dev)
1534 ret = dev->transport->configure_device(dev); 1560 ret = dev->transport->configure_device(dev);
1535 if (ret) 1561 if (ret)
1536 goto out; 1562 goto out;
1537 dev->dev_flags |= DF_CONFIGURED;
1538
1539 /* 1563 /*
1540 * XXX: there is not much point to have two different values here.. 1564 * XXX: there is not much point to have two different values here..
1541 */ 1565 */
@@ -1597,6 +1621,8 @@ int target_configure_device(struct se_device *dev)
1597 list_add_tail(&dev->g_dev_node, &g_device_list); 1621 list_add_tail(&dev->g_dev_node, &g_device_list);
1598 mutex_unlock(&g_device_mutex); 1622 mutex_unlock(&g_device_mutex);
1599 1623
1624 dev->dev_flags |= DF_CONFIGURED;
1625
1600 return 0; 1626 return 0;
1601 1627
1602out_free_alua: 1628out_free_alua:
diff --git a/drivers/target/target_core_file.c b/drivers/target/target_core_file.c
index d836de200a03..44620fb6bd45 100644
--- a/drivers/target/target_core_file.c
+++ b/drivers/target/target_core_file.c
@@ -494,6 +494,11 @@ fd_execute_write_same(struct se_cmd *cmd)
494 target_complete_cmd(cmd, SAM_STAT_GOOD); 494 target_complete_cmd(cmd, SAM_STAT_GOOD);
495 return 0; 495 return 0;
496 } 496 }
497 if (cmd->prot_op) {
498 pr_err("WRITE_SAME: Protection information with FILEIO"
499 " backends not supported\n");
500 return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE;
501 }
497 sg = &cmd->t_data_sg[0]; 502 sg = &cmd->t_data_sg[0];
498 503
499 if (cmd->t_data_nents > 1 || 504 if (cmd->t_data_nents > 1 ||
diff --git a/drivers/target/target_core_iblock.c b/drivers/target/target_core_iblock.c
index 78346b850968..d4a4b0fb444a 100644
--- a/drivers/target/target_core_iblock.c
+++ b/drivers/target/target_core_iblock.c
@@ -464,6 +464,11 @@ iblock_execute_write_same(struct se_cmd *cmd)
464 sector_t block_lba = cmd->t_task_lba; 464 sector_t block_lba = cmd->t_task_lba;
465 sector_t sectors = sbc_get_write_same_sectors(cmd); 465 sector_t sectors = sbc_get_write_same_sectors(cmd);
466 466
467 if (cmd->prot_op) {
468 pr_err("WRITE_SAME: Protection information with IBLOCK"
469 " backends not supported\n");
470 return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE;
471 }
467 sg = &cmd->t_data_sg[0]; 472 sg = &cmd->t_data_sg[0];
468 473
469 if (cmd->t_data_nents > 1 || 474 if (cmd->t_data_nents > 1 ||
diff --git a/drivers/target/target_core_pr.c b/drivers/target/target_core_pr.c
index 283cf786ef98..2de6fb8cee8d 100644
--- a/drivers/target/target_core_pr.c
+++ b/drivers/target/target_core_pr.c
@@ -1874,8 +1874,8 @@ static int core_scsi3_update_aptpl_buf(
1874 } 1874 }
1875 1875
1876 if ((len + strlen(tmp) >= pr_aptpl_buf_len)) { 1876 if ((len + strlen(tmp) >= pr_aptpl_buf_len)) {
1877 pr_err("Unable to update renaming" 1877 pr_err("Unable to update renaming APTPL metadata,"
1878 " APTPL metadata\n"); 1878 " reallocating larger buffer\n");
1879 ret = -EMSGSIZE; 1879 ret = -EMSGSIZE;
1880 goto out; 1880 goto out;
1881 } 1881 }
@@ -1892,8 +1892,8 @@ static int core_scsi3_update_aptpl_buf(
1892 lun->lun_sep->sep_rtpi, lun->unpacked_lun, reg_count); 1892 lun->lun_sep->sep_rtpi, lun->unpacked_lun, reg_count);
1893 1893
1894 if ((len + strlen(tmp) >= pr_aptpl_buf_len)) { 1894 if ((len + strlen(tmp) >= pr_aptpl_buf_len)) {
1895 pr_err("Unable to update renaming" 1895 pr_err("Unable to update renaming APTPL metadata,"
1896 " APTPL metadata\n"); 1896 " reallocating larger buffer\n");
1897 ret = -EMSGSIZE; 1897 ret = -EMSGSIZE;
1898 goto out; 1898 goto out;
1899 } 1899 }
@@ -1956,7 +1956,7 @@ static int __core_scsi3_write_aptpl_to_file(
1956static sense_reason_t core_scsi3_update_and_write_aptpl(struct se_device *dev, bool aptpl) 1956static sense_reason_t core_scsi3_update_and_write_aptpl(struct se_device *dev, bool aptpl)
1957{ 1957{
1958 unsigned char *buf; 1958 unsigned char *buf;
1959 int rc; 1959 int rc, len = PR_APTPL_BUF_LEN;
1960 1960
1961 if (!aptpl) { 1961 if (!aptpl) {
1962 char *null_buf = "No Registrations or Reservations\n"; 1962 char *null_buf = "No Registrations or Reservations\n";
@@ -1970,25 +1970,26 @@ static sense_reason_t core_scsi3_update_and_write_aptpl(struct se_device *dev, b
1970 1970
1971 return 0; 1971 return 0;
1972 } 1972 }
1973 1973retry:
1974 buf = kzalloc(PR_APTPL_BUF_LEN, GFP_KERNEL); 1974 buf = vzalloc(len);
1975 if (!buf) 1975 if (!buf)
1976 return TCM_OUT_OF_RESOURCES; 1976 return TCM_OUT_OF_RESOURCES;
1977 1977
1978 rc = core_scsi3_update_aptpl_buf(dev, buf, PR_APTPL_BUF_LEN); 1978 rc = core_scsi3_update_aptpl_buf(dev, buf, len);
1979 if (rc < 0) { 1979 if (rc < 0) {
1980 kfree(buf); 1980 vfree(buf);
1981 return TCM_OUT_OF_RESOURCES; 1981 len *= 2;
1982 goto retry;
1982 } 1983 }
1983 1984
1984 rc = __core_scsi3_write_aptpl_to_file(dev, buf); 1985 rc = __core_scsi3_write_aptpl_to_file(dev, buf);
1985 if (rc != 0) { 1986 if (rc != 0) {
1986 pr_err("SPC-3 PR: Could not update APTPL\n"); 1987 pr_err("SPC-3 PR: Could not update APTPL\n");
1987 kfree(buf); 1988 vfree(buf);
1988 return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE; 1989 return TCM_LOGICAL_UNIT_COMMUNICATION_FAILURE;
1989 } 1990 }
1990 dev->t10_pr.pr_aptpl_active = 1; 1991 dev->t10_pr.pr_aptpl_active = 1;
1991 kfree(buf); 1992 vfree(buf);
1992 pr_debug("SPC-3 PR: Set APTPL Bit Activated\n"); 1993 pr_debug("SPC-3 PR: Set APTPL Bit Activated\n");
1993 return 0; 1994 return 0;
1994} 1995}
diff --git a/drivers/target/target_core_pscsi.c b/drivers/target/target_core_pscsi.c
index 1045dcd7bf65..f6c954c4635f 100644
--- a/drivers/target/target_core_pscsi.c
+++ b/drivers/target/target_core_pscsi.c
@@ -1121,7 +1121,7 @@ static u32 pscsi_get_device_type(struct se_device *dev)
1121 struct pscsi_dev_virt *pdv = PSCSI_DEV(dev); 1121 struct pscsi_dev_virt *pdv = PSCSI_DEV(dev);
1122 struct scsi_device *sd = pdv->pdv_sd; 1122 struct scsi_device *sd = pdv->pdv_sd;
1123 1123
1124 return sd->type; 1124 return (sd) ? sd->type : TYPE_NO_LUN;
1125} 1125}
1126 1126
1127static sector_t pscsi_get_blocks(struct se_device *dev) 1127static sector_t pscsi_get_blocks(struct se_device *dev)
diff --git a/drivers/target/target_core_sbc.c b/drivers/target/target_core_sbc.c
index cd4bed7b2757..3e7297411110 100644
--- a/drivers/target/target_core_sbc.c
+++ b/drivers/target/target_core_sbc.c
@@ -37,6 +37,9 @@
37#include "target_core_alua.h" 37#include "target_core_alua.h"
38 38
39static sense_reason_t 39static sense_reason_t
40sbc_check_prot(struct se_device *, struct se_cmd *, unsigned char *, u32, bool);
41
42static sense_reason_t
40sbc_emulate_readcapacity(struct se_cmd *cmd) 43sbc_emulate_readcapacity(struct se_cmd *cmd)
41{ 44{
42 struct se_device *dev = cmd->se_dev; 45 struct se_device *dev = cmd->se_dev;
@@ -251,7 +254,10 @@ static inline unsigned long long transport_lba_64_ext(unsigned char *cdb)
251static sense_reason_t 254static sense_reason_t
252sbc_setup_write_same(struct se_cmd *cmd, unsigned char *flags, struct sbc_ops *ops) 255sbc_setup_write_same(struct se_cmd *cmd, unsigned char *flags, struct sbc_ops *ops)
253{ 256{
257 struct se_device *dev = cmd->se_dev;
258 sector_t end_lba = dev->transport->get_blocks(dev) + 1;
254 unsigned int sectors = sbc_get_write_same_sectors(cmd); 259 unsigned int sectors = sbc_get_write_same_sectors(cmd);
260 sense_reason_t ret;
255 261
256 if ((flags[0] & 0x04) || (flags[0] & 0x02)) { 262 if ((flags[0] & 0x04) || (flags[0] & 0x02)) {
257 pr_err("WRITE_SAME PBDATA and LBDATA" 263 pr_err("WRITE_SAME PBDATA and LBDATA"
@@ -264,6 +270,16 @@ sbc_setup_write_same(struct se_cmd *cmd, unsigned char *flags, struct sbc_ops *o
264 sectors, cmd->se_dev->dev_attrib.max_write_same_len); 270 sectors, cmd->se_dev->dev_attrib.max_write_same_len);
265 return TCM_INVALID_CDB_FIELD; 271 return TCM_INVALID_CDB_FIELD;
266 } 272 }
273 /*
274 * Sanity check for LBA wrap and request past end of device.
275 */
276 if (((cmd->t_task_lba + sectors) < cmd->t_task_lba) ||
277 ((cmd->t_task_lba + sectors) > end_lba)) {
278 pr_err("WRITE_SAME exceeds last lba %llu (lba %llu, sectors %u)\n",
279 (unsigned long long)end_lba, cmd->t_task_lba, sectors);
280 return TCM_ADDRESS_OUT_OF_RANGE;
281 }
282
267 /* We always have ANC_SUP == 0 so setting ANCHOR is always an error */ 283 /* We always have ANC_SUP == 0 so setting ANCHOR is always an error */
268 if (flags[0] & 0x10) { 284 if (flags[0] & 0x10) {
269 pr_warn("WRITE SAME with ANCHOR not supported\n"); 285 pr_warn("WRITE SAME with ANCHOR not supported\n");
@@ -277,12 +293,21 @@ sbc_setup_write_same(struct se_cmd *cmd, unsigned char *flags, struct sbc_ops *o
277 if (!ops->execute_write_same_unmap) 293 if (!ops->execute_write_same_unmap)
278 return TCM_UNSUPPORTED_SCSI_OPCODE; 294 return TCM_UNSUPPORTED_SCSI_OPCODE;
279 295
296 if (!dev->dev_attrib.emulate_tpws) {
297 pr_err("Got WRITE_SAME w/ UNMAP=1, but backend device"
298 " has emulate_tpws disabled\n");
299 return TCM_UNSUPPORTED_SCSI_OPCODE;
300 }
280 cmd->execute_cmd = ops->execute_write_same_unmap; 301 cmd->execute_cmd = ops->execute_write_same_unmap;
281 return 0; 302 return 0;
282 } 303 }
283 if (!ops->execute_write_same) 304 if (!ops->execute_write_same)
284 return TCM_UNSUPPORTED_SCSI_OPCODE; 305 return TCM_UNSUPPORTED_SCSI_OPCODE;
285 306
307 ret = sbc_check_prot(dev, cmd, &cmd->t_task_cdb[0], sectors, true);
308 if (ret)
309 return ret;
310
286 cmd->execute_cmd = ops->execute_write_same; 311 cmd->execute_cmd = ops->execute_write_same;
287 return 0; 312 return 0;
288} 313}
@@ -614,14 +639,21 @@ sbc_set_prot_op_checks(u8 protect, enum target_prot_type prot_type,
614 return 0; 639 return 0;
615} 640}
616 641
617static bool 642static sense_reason_t
618sbc_check_prot(struct se_device *dev, struct se_cmd *cmd, unsigned char *cdb, 643sbc_check_prot(struct se_device *dev, struct se_cmd *cmd, unsigned char *cdb,
619 u32 sectors, bool is_write) 644 u32 sectors, bool is_write)
620{ 645{
621 u8 protect = cdb[1] >> 5; 646 u8 protect = cdb[1] >> 5;
622 647
623 if ((!cmd->t_prot_sg || !cmd->t_prot_nents) && cmd->prot_pto) 648 if (!cmd->t_prot_sg || !cmd->t_prot_nents) {
624 return true; 649 if (protect && !dev->dev_attrib.pi_prot_type) {
650 pr_err("CDB contains protect bit, but device does not"
651 " advertise PROTECT=1 feature bit\n");
652 return TCM_INVALID_CDB_FIELD;
653 }
654 if (cmd->prot_pto)
655 return TCM_NO_SENSE;
656 }
625 657
626 switch (dev->dev_attrib.pi_prot_type) { 658 switch (dev->dev_attrib.pi_prot_type) {
627 case TARGET_DIF_TYPE3_PROT: 659 case TARGET_DIF_TYPE3_PROT:
@@ -629,7 +661,7 @@ sbc_check_prot(struct se_device *dev, struct se_cmd *cmd, unsigned char *cdb,
629 break; 661 break;
630 case TARGET_DIF_TYPE2_PROT: 662 case TARGET_DIF_TYPE2_PROT:
631 if (protect) 663 if (protect)
632 return false; 664 return TCM_INVALID_CDB_FIELD;
633 665
634 cmd->reftag_seed = cmd->t_task_lba; 666 cmd->reftag_seed = cmd->t_task_lba;
635 break; 667 break;
@@ -638,12 +670,12 @@ sbc_check_prot(struct se_device *dev, struct se_cmd *cmd, unsigned char *cdb,
638 break; 670 break;
639 case TARGET_DIF_TYPE0_PROT: 671 case TARGET_DIF_TYPE0_PROT:
640 default: 672 default:
641 return true; 673 return TCM_NO_SENSE;
642 } 674 }
643 675
644 if (sbc_set_prot_op_checks(protect, dev->dev_attrib.pi_prot_type, 676 if (sbc_set_prot_op_checks(protect, dev->dev_attrib.pi_prot_type,
645 is_write, cmd)) 677 is_write, cmd))
646 return false; 678 return TCM_INVALID_CDB_FIELD;
647 679
648 cmd->prot_type = dev->dev_attrib.pi_prot_type; 680 cmd->prot_type = dev->dev_attrib.pi_prot_type;
649 cmd->prot_length = dev->prot_length * sectors; 681 cmd->prot_length = dev->prot_length * sectors;
@@ -662,7 +694,29 @@ sbc_check_prot(struct se_device *dev, struct se_cmd *cmd, unsigned char *cdb,
662 __func__, cmd->prot_type, cmd->data_length, cmd->prot_length, 694 __func__, cmd->prot_type, cmd->data_length, cmd->prot_length,
663 cmd->prot_op, cmd->prot_checks); 695 cmd->prot_op, cmd->prot_checks);
664 696
665 return true; 697 return TCM_NO_SENSE;
698}
699
700static int
701sbc_check_dpofua(struct se_device *dev, struct se_cmd *cmd, unsigned char *cdb)
702{
703 if (cdb[1] & 0x10) {
704 if (!dev->dev_attrib.emulate_dpo) {
705 pr_err("Got CDB: 0x%02x with DPO bit set, but device"
706 " does not advertise support for DPO\n", cdb[0]);
707 return -EINVAL;
708 }
709 }
710 if (cdb[1] & 0x8) {
711 if (!dev->dev_attrib.emulate_fua_write || !se_dev_check_wce(dev)) {
712 pr_err("Got CDB: 0x%02x with FUA bit set, but device"
713 " does not advertise support for FUA write\n",
714 cdb[0]);
715 return -EINVAL;
716 }
717 cmd->se_cmd_flags |= SCF_FUA;
718 }
719 return 0;
666} 720}
667 721
668sense_reason_t 722sense_reason_t
@@ -686,8 +740,12 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
686 sectors = transport_get_sectors_10(cdb); 740 sectors = transport_get_sectors_10(cdb);
687 cmd->t_task_lba = transport_lba_32(cdb); 741 cmd->t_task_lba = transport_lba_32(cdb);
688 742
689 if (!sbc_check_prot(dev, cmd, cdb, sectors, false)) 743 if (sbc_check_dpofua(dev, cmd, cdb))
690 return TCM_UNSUPPORTED_SCSI_OPCODE; 744 return TCM_INVALID_CDB_FIELD;
745
746 ret = sbc_check_prot(dev, cmd, cdb, sectors, false);
747 if (ret)
748 return ret;
691 749
692 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB; 750 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB;
693 cmd->execute_rw = ops->execute_rw; 751 cmd->execute_rw = ops->execute_rw;
@@ -697,8 +755,12 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
697 sectors = transport_get_sectors_12(cdb); 755 sectors = transport_get_sectors_12(cdb);
698 cmd->t_task_lba = transport_lba_32(cdb); 756 cmd->t_task_lba = transport_lba_32(cdb);
699 757
700 if (!sbc_check_prot(dev, cmd, cdb, sectors, false)) 758 if (sbc_check_dpofua(dev, cmd, cdb))
701 return TCM_UNSUPPORTED_SCSI_OPCODE; 759 return TCM_INVALID_CDB_FIELD;
760
761 ret = sbc_check_prot(dev, cmd, cdb, sectors, false);
762 if (ret)
763 return ret;
702 764
703 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB; 765 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB;
704 cmd->execute_rw = ops->execute_rw; 766 cmd->execute_rw = ops->execute_rw;
@@ -708,8 +770,12 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
708 sectors = transport_get_sectors_16(cdb); 770 sectors = transport_get_sectors_16(cdb);
709 cmd->t_task_lba = transport_lba_64(cdb); 771 cmd->t_task_lba = transport_lba_64(cdb);
710 772
711 if (!sbc_check_prot(dev, cmd, cdb, sectors, false)) 773 if (sbc_check_dpofua(dev, cmd, cdb))
712 return TCM_UNSUPPORTED_SCSI_OPCODE; 774 return TCM_INVALID_CDB_FIELD;
775
776 ret = sbc_check_prot(dev, cmd, cdb, sectors, false);
777 if (ret)
778 return ret;
713 779
714 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB; 780 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB;
715 cmd->execute_rw = ops->execute_rw; 781 cmd->execute_rw = ops->execute_rw;
@@ -727,11 +793,13 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
727 sectors = transport_get_sectors_10(cdb); 793 sectors = transport_get_sectors_10(cdb);
728 cmd->t_task_lba = transport_lba_32(cdb); 794 cmd->t_task_lba = transport_lba_32(cdb);
729 795
730 if (!sbc_check_prot(dev, cmd, cdb, sectors, true)) 796 if (sbc_check_dpofua(dev, cmd, cdb))
731 return TCM_UNSUPPORTED_SCSI_OPCODE; 797 return TCM_INVALID_CDB_FIELD;
798
799 ret = sbc_check_prot(dev, cmd, cdb, sectors, true);
800 if (ret)
801 return ret;
732 802
733 if (cdb[1] & 0x8)
734 cmd->se_cmd_flags |= SCF_FUA;
735 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB; 803 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB;
736 cmd->execute_rw = ops->execute_rw; 804 cmd->execute_rw = ops->execute_rw;
737 cmd->execute_cmd = sbc_execute_rw; 805 cmd->execute_cmd = sbc_execute_rw;
@@ -740,11 +808,13 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
740 sectors = transport_get_sectors_12(cdb); 808 sectors = transport_get_sectors_12(cdb);
741 cmd->t_task_lba = transport_lba_32(cdb); 809 cmd->t_task_lba = transport_lba_32(cdb);
742 810
743 if (!sbc_check_prot(dev, cmd, cdb, sectors, true)) 811 if (sbc_check_dpofua(dev, cmd, cdb))
744 return TCM_UNSUPPORTED_SCSI_OPCODE; 812 return TCM_INVALID_CDB_FIELD;
813
814 ret = sbc_check_prot(dev, cmd, cdb, sectors, true);
815 if (ret)
816 return ret;
745 817
746 if (cdb[1] & 0x8)
747 cmd->se_cmd_flags |= SCF_FUA;
748 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB; 818 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB;
749 cmd->execute_rw = ops->execute_rw; 819 cmd->execute_rw = ops->execute_rw;
750 cmd->execute_cmd = sbc_execute_rw; 820 cmd->execute_cmd = sbc_execute_rw;
@@ -753,11 +823,13 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
753 sectors = transport_get_sectors_16(cdb); 823 sectors = transport_get_sectors_16(cdb);
754 cmd->t_task_lba = transport_lba_64(cdb); 824 cmd->t_task_lba = transport_lba_64(cdb);
755 825
756 if (!sbc_check_prot(dev, cmd, cdb, sectors, true)) 826 if (sbc_check_dpofua(dev, cmd, cdb))
757 return TCM_UNSUPPORTED_SCSI_OPCODE; 827 return TCM_INVALID_CDB_FIELD;
828
829 ret = sbc_check_prot(dev, cmd, cdb, sectors, true);
830 if (ret)
831 return ret;
758 832
759 if (cdb[1] & 0x8)
760 cmd->se_cmd_flags |= SCF_FUA;
761 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB; 833 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB;
762 cmd->execute_rw = ops->execute_rw; 834 cmd->execute_rw = ops->execute_rw;
763 cmd->execute_cmd = sbc_execute_rw; 835 cmd->execute_cmd = sbc_execute_rw;
@@ -768,6 +840,9 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
768 return TCM_INVALID_CDB_FIELD; 840 return TCM_INVALID_CDB_FIELD;
769 sectors = transport_get_sectors_10(cdb); 841 sectors = transport_get_sectors_10(cdb);
770 842
843 if (sbc_check_dpofua(dev, cmd, cdb))
844 return TCM_INVALID_CDB_FIELD;
845
771 cmd->t_task_lba = transport_lba_32(cdb); 846 cmd->t_task_lba = transport_lba_32(cdb);
772 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB; 847 cmd->se_cmd_flags |= SCF_SCSI_DATA_CDB;
773 848
@@ -777,8 +852,6 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
777 cmd->execute_rw = ops->execute_rw; 852 cmd->execute_rw = ops->execute_rw;
778 cmd->execute_cmd = sbc_execute_rw; 853 cmd->execute_cmd = sbc_execute_rw;
779 cmd->transport_complete_callback = &xdreadwrite_callback; 854 cmd->transport_complete_callback = &xdreadwrite_callback;
780 if (cdb[1] & 0x8)
781 cmd->se_cmd_flags |= SCF_FUA;
782 break; 855 break;
783 case VARIABLE_LENGTH_CMD: 856 case VARIABLE_LENGTH_CMD:
784 { 857 {
@@ -787,6 +860,8 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
787 case XDWRITEREAD_32: 860 case XDWRITEREAD_32:
788 sectors = transport_get_sectors_32(cdb); 861 sectors = transport_get_sectors_32(cdb);
789 862
863 if (sbc_check_dpofua(dev, cmd, cdb))
864 return TCM_INVALID_CDB_FIELD;
790 /* 865 /*
791 * Use WRITE_32 and READ_32 opcodes for the emulated 866 * Use WRITE_32 and READ_32 opcodes for the emulated
792 * XDWRITE_READ_32 logic. 867 * XDWRITE_READ_32 logic.
@@ -801,8 +876,6 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
801 cmd->execute_rw = ops->execute_rw; 876 cmd->execute_rw = ops->execute_rw;
802 cmd->execute_cmd = sbc_execute_rw; 877 cmd->execute_cmd = sbc_execute_rw;
803 cmd->transport_complete_callback = &xdreadwrite_callback; 878 cmd->transport_complete_callback = &xdreadwrite_callback;
804 if (cdb[1] & 0x8)
805 cmd->se_cmd_flags |= SCF_FUA;
806 break; 879 break;
807 case WRITE_SAME_32: 880 case WRITE_SAME_32:
808 sectors = transport_get_sectors_32(cdb); 881 sectors = transport_get_sectors_32(cdb);
@@ -888,6 +961,11 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
888 if (!ops->execute_unmap) 961 if (!ops->execute_unmap)
889 return TCM_UNSUPPORTED_SCSI_OPCODE; 962 return TCM_UNSUPPORTED_SCSI_OPCODE;
890 963
964 if (!dev->dev_attrib.emulate_tpu) {
965 pr_err("Got UNMAP, but backend device has"
966 " emulate_tpu disabled\n");
967 return TCM_UNSUPPORTED_SCSI_OPCODE;
968 }
891 size = get_unaligned_be16(&cdb[7]); 969 size = get_unaligned_be16(&cdb[7]);
892 cmd->execute_cmd = ops->execute_unmap; 970 cmd->execute_cmd = ops->execute_unmap;
893 break; 971 break;
@@ -955,7 +1033,8 @@ sbc_parse_cdb(struct se_cmd *cmd, struct sbc_ops *ops)
955 unsigned long long end_lba; 1033 unsigned long long end_lba;
956check_lba: 1034check_lba:
957 end_lba = dev->transport->get_blocks(dev) + 1; 1035 end_lba = dev->transport->get_blocks(dev) + 1;
958 if (cmd->t_task_lba + sectors > end_lba) { 1036 if (((cmd->t_task_lba + sectors) < cmd->t_task_lba) ||
1037 ((cmd->t_task_lba + sectors) > end_lba)) {
959 pr_err("cmd exceeds last lba %llu " 1038 pr_err("cmd exceeds last lba %llu "
960 "(lba %llu, sectors %u)\n", 1039 "(lba %llu, sectors %u)\n",
961 end_lba, cmd->t_task_lba, sectors); 1040 end_lba, cmd->t_task_lba, sectors);
diff --git a/drivers/target/target_core_spc.c b/drivers/target/target_core_spc.c
index 4c71657da56a..6c8bd6bc175c 100644
--- a/drivers/target/target_core_spc.c
+++ b/drivers/target/target_core_spc.c
@@ -454,19 +454,6 @@ check_scsi_name:
454} 454}
455EXPORT_SYMBOL(spc_emulate_evpd_83); 455EXPORT_SYMBOL(spc_emulate_evpd_83);
456 456
457static bool
458spc_check_dev_wce(struct se_device *dev)
459{
460 bool wce = false;
461
462 if (dev->transport->get_write_cache)
463 wce = dev->transport->get_write_cache(dev);
464 else if (dev->dev_attrib.emulate_write_cache > 0)
465 wce = true;
466
467 return wce;
468}
469
470/* Extended INQUIRY Data VPD Page */ 457/* Extended INQUIRY Data VPD Page */
471static sense_reason_t 458static sense_reason_t
472spc_emulate_evpd_86(struct se_cmd *cmd, unsigned char *buf) 459spc_emulate_evpd_86(struct se_cmd *cmd, unsigned char *buf)
@@ -490,7 +477,7 @@ spc_emulate_evpd_86(struct se_cmd *cmd, unsigned char *buf)
490 buf[5] = 0x07; 477 buf[5] = 0x07;
491 478
492 /* If WriteCache emulation is enabled, set V_SUP */ 479 /* If WriteCache emulation is enabled, set V_SUP */
493 if (spc_check_dev_wce(dev)) 480 if (se_dev_check_wce(dev))
494 buf[6] = 0x01; 481 buf[6] = 0x01;
495 /* If an LBA map is present set R_SUP */ 482 /* If an LBA map is present set R_SUP */
496 spin_lock(&cmd->se_dev->t10_alua.lba_map_lock); 483 spin_lock(&cmd->se_dev->t10_alua.lba_map_lock);
@@ -647,7 +634,7 @@ spc_emulate_evpd_b2(struct se_cmd *cmd, unsigned char *buf)
647 * support the use of the WRITE SAME (16) command to unmap LBAs. 634 * support the use of the WRITE SAME (16) command to unmap LBAs.
648 */ 635 */
649 if (dev->dev_attrib.emulate_tpws != 0) 636 if (dev->dev_attrib.emulate_tpws != 0)
650 buf[5] |= 0x40; 637 buf[5] |= 0x40 | 0x20;
651 638
652 return 0; 639 return 0;
653} 640}
@@ -897,7 +884,7 @@ static int spc_modesense_caching(struct se_cmd *cmd, u8 pc, u8 *p)
897 if (pc == 1) 884 if (pc == 1)
898 goto out; 885 goto out;
899 886
900 if (spc_check_dev_wce(dev)) 887 if (se_dev_check_wce(dev))
901 p[2] = 0x04; /* Write Cache Enable */ 888 p[2] = 0x04; /* Write Cache Enable */
902 p[12] = 0x20; /* Disabled Read Ahead */ 889 p[12] = 0x20; /* Disabled Read Ahead */
903 890
@@ -1009,7 +996,7 @@ static sense_reason_t spc_emulate_modesense(struct se_cmd *cmd)
1009 (cmd->se_deve->lun_flags & TRANSPORT_LUNFLAGS_READ_ONLY))) 996 (cmd->se_deve->lun_flags & TRANSPORT_LUNFLAGS_READ_ONLY)))
1010 spc_modesense_write_protect(&buf[length], type); 997 spc_modesense_write_protect(&buf[length], type);
1011 998
1012 if ((spc_check_dev_wce(dev)) && 999 if ((se_dev_check_wce(dev)) &&
1013 (dev->dev_attrib.emulate_fua_write > 0)) 1000 (dev->dev_attrib.emulate_fua_write > 0))
1014 spc_modesense_dpofua(&buf[length], type); 1001 spc_modesense_dpofua(&buf[length], type);
1015 1002
diff --git a/drivers/target/target_core_transport.c b/drivers/target/target_core_transport.c
index 0adc0f650213..ac3cbabdbdf0 100644
--- a/drivers/target/target_core_transport.c
+++ b/drivers/target/target_core_transport.c
@@ -2389,6 +2389,10 @@ int target_get_sess_cmd(struct se_session *se_sess, struct se_cmd *se_cmd,
2389 list_add_tail(&se_cmd->se_cmd_list, &se_sess->sess_cmd_list); 2389 list_add_tail(&se_cmd->se_cmd_list, &se_sess->sess_cmd_list);
2390out: 2390out:
2391 spin_unlock_irqrestore(&se_sess->sess_cmd_lock, flags); 2391 spin_unlock_irqrestore(&se_sess->sess_cmd_lock, flags);
2392
2393 if (ret && ack_kref)
2394 target_put_sess_cmd(se_sess, se_cmd);
2395
2392 return ret; 2396 return ret;
2393} 2397}
2394EXPORT_SYMBOL(target_get_sess_cmd); 2398EXPORT_SYMBOL(target_get_sess_cmd);
diff --git a/drivers/target/tcm_fc/tfc_io.c b/drivers/target/tcm_fc/tfc_io.c
index 97b486c3dda1..583e755d8091 100644
--- a/drivers/target/tcm_fc/tfc_io.c
+++ b/drivers/target/tcm_fc/tfc_io.c
@@ -359,7 +359,7 @@ void ft_invl_hw_context(struct ft_cmd *cmd)
359 ep = fc_seq_exch(seq); 359 ep = fc_seq_exch(seq);
360 if (ep) { 360 if (ep) {
361 lport = ep->lp; 361 lport = ep->lp;
362 if (lport && (ep->xid <= lport->lro_xid)) 362 if (lport && (ep->xid <= lport->lro_xid)) {
363 /* 363 /*
364 * "ddp_done" trigger invalidation of HW 364 * "ddp_done" trigger invalidation of HW
365 * specific DDP context 365 * specific DDP context
@@ -374,6 +374,7 @@ void ft_invl_hw_context(struct ft_cmd *cmd)
374 * identified using ep->xid) 374 * identified using ep->xid)
375 */ 375 */
376 cmd->was_ddp_setup = 0; 376 cmd->was_ddp_setup = 0;
377 }
377 } 378 }
378 } 379 }
379} 380}
diff --git a/drivers/thermal/int340x_thermal/int3400_thermal.c b/drivers/thermal/int340x_thermal/int3400_thermal.c
index 25d244cbbe8f..031018e7a65b 100644
--- a/drivers/thermal/int340x_thermal/int3400_thermal.c
+++ b/drivers/thermal/int340x_thermal/int3400_thermal.c
@@ -262,13 +262,12 @@ static int int3400_thermal_probe(struct platform_device *pdev)
262 result = acpi_parse_art(priv->adev->handle, &priv->art_count, 262 result = acpi_parse_art(priv->adev->handle, &priv->art_count,
263 &priv->arts, true); 263 &priv->arts, true);
264 if (result) 264 if (result)
265 goto free_priv; 265 dev_dbg(&pdev->dev, "_ART table parsing error\n");
266
267 266
268 result = acpi_parse_trt(priv->adev->handle, &priv->trt_count, 267 result = acpi_parse_trt(priv->adev->handle, &priv->trt_count,
269 &priv->trts, true); 268 &priv->trts, true);
270 if (result) 269 if (result)
271 goto free_art; 270 dev_dbg(&pdev->dev, "_TRT table parsing error\n");
272 271
273 platform_set_drvdata(pdev, priv); 272 platform_set_drvdata(pdev, priv);
274 273
@@ -281,7 +280,7 @@ static int int3400_thermal_probe(struct platform_device *pdev)
281 &int3400_thermal_params, 0, 0); 280 &int3400_thermal_params, 0, 0);
282 if (IS_ERR(priv->thermal)) { 281 if (IS_ERR(priv->thermal)) {
283 result = PTR_ERR(priv->thermal); 282 result = PTR_ERR(priv->thermal);
284 goto free_trt; 283 goto free_art_trt;
285 } 284 }
286 285
287 priv->rel_misc_dev_res = acpi_thermal_rel_misc_device_add( 286 priv->rel_misc_dev_res = acpi_thermal_rel_misc_device_add(
@@ -295,9 +294,8 @@ static int int3400_thermal_probe(struct platform_device *pdev)
295 294
296free_zone: 295free_zone:
297 thermal_zone_device_unregister(priv->thermal); 296 thermal_zone_device_unregister(priv->thermal);
298free_trt: 297free_art_trt:
299 kfree(priv->trts); 298 kfree(priv->trts);
300free_art:
301 kfree(priv->arts); 299 kfree(priv->arts);
302free_priv: 300free_priv:
303 kfree(priv); 301 kfree(priv);
diff --git a/drivers/thermal/int340x_thermal/int340x_thermal_zone.c b/drivers/thermal/int340x_thermal/int340x_thermal_zone.c
index f88b08877025..1e25133d35e2 100644
--- a/drivers/thermal/int340x_thermal/int340x_thermal_zone.c
+++ b/drivers/thermal/int340x_thermal/int340x_thermal_zone.c
@@ -208,7 +208,7 @@ struct int34x_thermal_zone *int340x_thermal_zone_add(struct acpi_device *adev,
208 trip_cnt, GFP_KERNEL); 208 trip_cnt, GFP_KERNEL);
209 if (!int34x_thermal_zone->aux_trips) { 209 if (!int34x_thermal_zone->aux_trips) {
210 ret = -ENOMEM; 210 ret = -ENOMEM;
211 goto free_mem; 211 goto err_trip_alloc;
212 } 212 }
213 trip_mask = BIT(trip_cnt) - 1; 213 trip_mask = BIT(trip_cnt) - 1;
214 int34x_thermal_zone->aux_trip_nr = trip_cnt; 214 int34x_thermal_zone->aux_trip_nr = trip_cnt;
@@ -248,14 +248,15 @@ struct int34x_thermal_zone *int340x_thermal_zone_add(struct acpi_device *adev,
248 0, 0); 248 0, 0);
249 if (IS_ERR(int34x_thermal_zone->zone)) { 249 if (IS_ERR(int34x_thermal_zone->zone)) {
250 ret = PTR_ERR(int34x_thermal_zone->zone); 250 ret = PTR_ERR(int34x_thermal_zone->zone);
251 goto free_lpat; 251 goto err_thermal_zone;
252 } 252 }
253 253
254 return int34x_thermal_zone; 254 return int34x_thermal_zone;
255 255
256free_lpat: 256err_thermal_zone:
257 acpi_lpat_free_conversion_table(int34x_thermal_zone->lpat_table); 257 acpi_lpat_free_conversion_table(int34x_thermal_zone->lpat_table);
258free_mem: 258 kfree(int34x_thermal_zone->aux_trips);
259err_trip_alloc:
259 kfree(int34x_thermal_zone); 260 kfree(int34x_thermal_zone);
260 return ERR_PTR(ret); 261 return ERR_PTR(ret);
261} 262}
@@ -266,6 +267,7 @@ void int340x_thermal_zone_remove(struct int34x_thermal_zone
266{ 267{
267 thermal_zone_device_unregister(int34x_thermal_zone->zone); 268 thermal_zone_device_unregister(int34x_thermal_zone->zone);
268 acpi_lpat_free_conversion_table(int34x_thermal_zone->lpat_table); 269 acpi_lpat_free_conversion_table(int34x_thermal_zone->lpat_table);
270 kfree(int34x_thermal_zone->aux_trips);
269 kfree(int34x_thermal_zone); 271 kfree(int34x_thermal_zone);
270} 272}
271EXPORT_SYMBOL_GPL(int340x_thermal_zone_remove); 273EXPORT_SYMBOL_GPL(int340x_thermal_zone_remove);
diff --git a/drivers/thermal/intel_powerclamp.c b/drivers/thermal/intel_powerclamp.c
index 6ceebd659dd4..12623bc02f46 100644
--- a/drivers/thermal/intel_powerclamp.c
+++ b/drivers/thermal/intel_powerclamp.c
@@ -688,6 +688,7 @@ static const struct x86_cpu_id intel_powerclamp_ids[] = {
688 { X86_VENDOR_INTEL, 6, 0x45}, 688 { X86_VENDOR_INTEL, 6, 0x45},
689 { X86_VENDOR_INTEL, 6, 0x46}, 689 { X86_VENDOR_INTEL, 6, 0x46},
690 { X86_VENDOR_INTEL, 6, 0x4c}, 690 { X86_VENDOR_INTEL, 6, 0x4c},
691 { X86_VENDOR_INTEL, 6, 0x4d},
691 { X86_VENDOR_INTEL, 6, 0x56}, 692 { X86_VENDOR_INTEL, 6, 0x56},
692 {} 693 {}
693}; 694};
diff --git a/drivers/thermal/rcar_thermal.c b/drivers/thermal/rcar_thermal.c
index 2580a4872f90..fe4e767018c4 100644
--- a/drivers/thermal/rcar_thermal.c
+++ b/drivers/thermal/rcar_thermal.c
@@ -387,21 +387,9 @@ static int rcar_thermal_probe(struct platform_device *pdev)
387 387
388 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); 388 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
389 if (irq) { 389 if (irq) {
390 int ret;
391
392 /* 390 /*
393 * platform has IRQ support. 391 * platform has IRQ support.
394 * Then, driver uses common registers 392 * Then, driver uses common registers
395 */
396
397 ret = devm_request_irq(dev, irq->start, rcar_thermal_irq, 0,
398 dev_name(dev), common);
399 if (ret) {
400 dev_err(dev, "irq request failed\n ");
401 return ret;
402 }
403
404 /*
405 * rcar_has_irq_support() will be enabled 393 * rcar_has_irq_support() will be enabled
406 */ 394 */
407 res = platform_get_resource(pdev, IORESOURCE_MEM, mres++); 395 res = platform_get_resource(pdev, IORESOURCE_MEM, mres++);
@@ -456,8 +444,16 @@ static int rcar_thermal_probe(struct platform_device *pdev)
456 } 444 }
457 445
458 /* enable temperature comparation */ 446 /* enable temperature comparation */
459 if (irq) 447 if (irq) {
448 ret = devm_request_irq(dev, irq->start, rcar_thermal_irq, 0,
449 dev_name(dev), common);
450 if (ret) {
451 dev_err(dev, "irq request failed\n ");
452 goto error_unregister;
453 }
454
460 rcar_thermal_common_write(common, ENR, enr_bits); 455 rcar_thermal_common_write(common, ENR, enr_bits);
456 }
461 457
462 platform_set_drvdata(pdev, common); 458 platform_set_drvdata(pdev, common);
463 459
@@ -467,9 +463,9 @@ static int rcar_thermal_probe(struct platform_device *pdev)
467 463
468error_unregister: 464error_unregister:
469 rcar_thermal_for_each_priv(priv, common) { 465 rcar_thermal_for_each_priv(priv, common) {
470 thermal_zone_device_unregister(priv->zone);
471 if (rcar_has_irq_support(priv)) 466 if (rcar_has_irq_support(priv))
472 rcar_thermal_irq_disable(priv); 467 rcar_thermal_irq_disable(priv);
468 thermal_zone_device_unregister(priv->zone);
473 } 469 }
474 470
475 pm_runtime_put(dev); 471 pm_runtime_put(dev);
@@ -485,9 +481,9 @@ static int rcar_thermal_remove(struct platform_device *pdev)
485 struct rcar_thermal_priv *priv; 481 struct rcar_thermal_priv *priv;
486 482
487 rcar_thermal_for_each_priv(priv, common) { 483 rcar_thermal_for_each_priv(priv, common) {
488 thermal_zone_device_unregister(priv->zone);
489 if (rcar_has_irq_support(priv)) 484 if (rcar_has_irq_support(priv))
490 rcar_thermal_irq_disable(priv); 485 rcar_thermal_irq_disable(priv);
486 thermal_zone_device_unregister(priv->zone);
491 } 487 }
492 488
493 pm_runtime_put(dev); 489 pm_runtime_put(dev);
diff --git a/drivers/thermal/samsung/exynos_tmu.c b/drivers/thermal/samsung/exynos_tmu.c
index fbeedc072cc2..1d30b0975651 100644
--- a/drivers/thermal/samsung/exynos_tmu.c
+++ b/drivers/thermal/samsung/exynos_tmu.c
@@ -682,6 +682,7 @@ static void exynos7_tmu_control(struct platform_device *pdev, bool on)
682 682
683 if (on) { 683 if (on) {
684 con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT); 684 con |= (1 << EXYNOS_TMU_CORE_EN_SHIFT);
685 con |= (1 << EXYNOS7_PD_DET_EN_SHIFT);
685 interrupt_en = 686 interrupt_en =
686 (of_thermal_is_trip_valid(tz, 7) 687 (of_thermal_is_trip_valid(tz, 7)
687 << EXYNOS7_TMU_INTEN_RISE7_SHIFT) | 688 << EXYNOS7_TMU_INTEN_RISE7_SHIFT) |
@@ -704,9 +705,9 @@ static void exynos7_tmu_control(struct platform_device *pdev, bool on)
704 interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT; 705 interrupt_en << EXYNOS_TMU_INTEN_FALL0_SHIFT;
705 } else { 706 } else {
706 con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT); 707 con &= ~(1 << EXYNOS_TMU_CORE_EN_SHIFT);
708 con &= ~(1 << EXYNOS7_PD_DET_EN_SHIFT);
707 interrupt_en = 0; /* Disable all interrupts */ 709 interrupt_en = 0; /* Disable all interrupts */
708 } 710 }
709 con |= 1 << EXYNOS7_PD_DET_EN_SHIFT;
710 711
711 writel(interrupt_en, data->base + EXYNOS7_TMU_REG_INTEN); 712 writel(interrupt_en, data->base + EXYNOS7_TMU_REG_INTEN);
712 writel(con, data->base + EXYNOS_TMU_REG_CONTROL); 713 writel(con, data->base + EXYNOS_TMU_REG_CONTROL);
@@ -716,7 +717,7 @@ static int exynos_get_temp(void *p, long *temp)
716{ 717{
717 struct exynos_tmu_data *data = p; 718 struct exynos_tmu_data *data = p;
718 719
719 if (!data) 720 if (!data || !data->tmu_read)
720 return -EINVAL; 721 return -EINVAL;
721 722
722 mutex_lock(&data->lock); 723 mutex_lock(&data->lock);
@@ -918,34 +919,16 @@ static irqreturn_t exynos_tmu_irq(int irq, void *id)
918} 919}
919 920
920static const struct of_device_id exynos_tmu_match[] = { 921static const struct of_device_id exynos_tmu_match[] = {
921 { 922 { .compatible = "samsung,exynos3250-tmu", },
922 .compatible = "samsung,exynos3250-tmu", 923 { .compatible = "samsung,exynos4210-tmu", },
923 }, 924 { .compatible = "samsung,exynos4412-tmu", },
924 { 925 { .compatible = "samsung,exynos5250-tmu", },
925 .compatible = "samsung,exynos4210-tmu", 926 { .compatible = "samsung,exynos5260-tmu", },
926 }, 927 { .compatible = "samsung,exynos5420-tmu", },
927 { 928 { .compatible = "samsung,exynos5420-tmu-ext-triminfo", },
928 .compatible = "samsung,exynos4412-tmu", 929 { .compatible = "samsung,exynos5440-tmu", },
929 }, 930 { .compatible = "samsung,exynos7-tmu", },
930 { 931 { /* sentinel */ },
931 .compatible = "samsung,exynos5250-tmu",
932 },
933 {
934 .compatible = "samsung,exynos5260-tmu",
935 },
936 {
937 .compatible = "samsung,exynos5420-tmu",
938 },
939 {
940 .compatible = "samsung,exynos5420-tmu-ext-triminfo",
941 },
942 {
943 .compatible = "samsung,exynos5440-tmu",
944 },
945 {
946 .compatible = "samsung,exynos7-tmu",
947 },
948 {},
949}; 932};
950MODULE_DEVICE_TABLE(of, exynos_tmu_match); 933MODULE_DEVICE_TABLE(of, exynos_tmu_match);
951 934
diff --git a/drivers/thermal/thermal_core.c b/drivers/thermal/thermal_core.c
index 48491d1a81d6..174d3bcf8bd7 100644
--- a/drivers/thermal/thermal_core.c
+++ b/drivers/thermal/thermal_core.c
@@ -899,6 +899,22 @@ thermal_cooling_device_trip_point_show(struct device *dev,
899 return sprintf(buf, "%d\n", instance->trip); 899 return sprintf(buf, "%d\n", instance->trip);
900} 900}
901 901
902static struct attribute *cooling_device_attrs[] = {
903 &dev_attr_cdev_type.attr,
904 &dev_attr_max_state.attr,
905 &dev_attr_cur_state.attr,
906 NULL,
907};
908
909static const struct attribute_group cooling_device_attr_group = {
910 .attrs = cooling_device_attrs,
911};
912
913static const struct attribute_group *cooling_device_attr_groups[] = {
914 &cooling_device_attr_group,
915 NULL,
916};
917
902/* Device management */ 918/* Device management */
903 919
904/** 920/**
@@ -1130,6 +1146,7 @@ __thermal_cooling_device_register(struct device_node *np,
1130 cdev->ops = ops; 1146 cdev->ops = ops;
1131 cdev->updated = false; 1147 cdev->updated = false;
1132 cdev->device.class = &thermal_class; 1148 cdev->device.class = &thermal_class;
1149 cdev->device.groups = cooling_device_attr_groups;
1133 cdev->devdata = devdata; 1150 cdev->devdata = devdata;
1134 dev_set_name(&cdev->device, "cooling_device%d", cdev->id); 1151 dev_set_name(&cdev->device, "cooling_device%d", cdev->id);
1135 result = device_register(&cdev->device); 1152 result = device_register(&cdev->device);
@@ -1139,21 +1156,6 @@ __thermal_cooling_device_register(struct device_node *np,
1139 return ERR_PTR(result); 1156 return ERR_PTR(result);
1140 } 1157 }
1141 1158
1142 /* sys I/F */
1143 if (type) {
1144 result = device_create_file(&cdev->device, &dev_attr_cdev_type);
1145 if (result)
1146 goto unregister;
1147 }
1148
1149 result = device_create_file(&cdev->device, &dev_attr_max_state);
1150 if (result)
1151 goto unregister;
1152
1153 result = device_create_file(&cdev->device, &dev_attr_cur_state);
1154 if (result)
1155 goto unregister;
1156
1157 /* Add 'this' new cdev to the global cdev list */ 1159 /* Add 'this' new cdev to the global cdev list */
1158 mutex_lock(&thermal_list_lock); 1160 mutex_lock(&thermal_list_lock);
1159 list_add(&cdev->node, &thermal_cdev_list); 1161 list_add(&cdev->node, &thermal_cdev_list);
@@ -1163,11 +1165,6 @@ __thermal_cooling_device_register(struct device_node *np,
1163 bind_cdev(cdev); 1165 bind_cdev(cdev);
1164 1166
1165 return cdev; 1167 return cdev;
1166
1167unregister:
1168 release_idr(&thermal_cdev_idr, &thermal_idr_lock, cdev->id);
1169 device_unregister(&cdev->device);
1170 return ERR_PTR(result);
1171} 1168}
1172 1169
1173/** 1170/**
diff --git a/drivers/thermal/ti-soc-thermal/ti-bandgap.c b/drivers/thermal/ti-soc-thermal/ti-bandgap.c
index 634b6ce0e63a..62a5d449c388 100644
--- a/drivers/thermal/ti-soc-thermal/ti-bandgap.c
+++ b/drivers/thermal/ti-soc-thermal/ti-bandgap.c
@@ -1402,7 +1402,7 @@ int ti_bandgap_remove(struct platform_device *pdev)
1402 return 0; 1402 return 0;
1403} 1403}
1404 1404
1405#ifdef CONFIG_PM 1405#ifdef CONFIG_PM_SLEEP
1406static int ti_bandgap_save_ctxt(struct ti_bandgap *bgp) 1406static int ti_bandgap_save_ctxt(struct ti_bandgap *bgp)
1407{ 1407{
1408 int i; 1408 int i;
diff --git a/drivers/thermal/ti-soc-thermal/ti-thermal-common.c b/drivers/thermal/ti-soc-thermal/ti-thermal-common.c
index 3fb054a10f6a..a38c1756442a 100644
--- a/drivers/thermal/ti-soc-thermal/ti-thermal-common.c
+++ b/drivers/thermal/ti-soc-thermal/ti-thermal-common.c
@@ -429,7 +429,7 @@ int ti_thermal_unregister_cpu_cooling(struct ti_bandgap *bgp, int id)
429 429
430 data = ti_bandgap_get_sensor_data(bgp, id); 430 data = ti_bandgap_get_sensor_data(bgp, id);
431 431
432 if (data && data->cool_dev) 432 if (data)
433 cpufreq_cooling_unregister(data->cool_dev); 433 cpufreq_cooling_unregister(data->cool_dev);
434 434
435 return 0; 435 return 0;
diff --git a/drivers/tty/bfin_jtag_comm.c b/drivers/tty/bfin_jtag_comm.c
index d7b198c400c7..ce24182f8514 100644
--- a/drivers/tty/bfin_jtag_comm.c
+++ b/drivers/tty/bfin_jtag_comm.c
@@ -210,18 +210,6 @@ bfin_jc_chars_in_buffer(struct tty_struct *tty)
210 return circ_cnt(&bfin_jc_write_buf); 210 return circ_cnt(&bfin_jc_write_buf);
211} 211}
212 212
213static void
214bfin_jc_wait_until_sent(struct tty_struct *tty, int timeout)
215{
216 unsigned long expire = jiffies + timeout;
217 while (!circ_empty(&bfin_jc_write_buf)) {
218 if (signal_pending(current))
219 break;
220 if (time_after(jiffies, expire))
221 break;
222 }
223}
224
225static const struct tty_operations bfin_jc_ops = { 213static const struct tty_operations bfin_jc_ops = {
226 .open = bfin_jc_open, 214 .open = bfin_jc_open,
227 .close = bfin_jc_close, 215 .close = bfin_jc_close,
@@ -230,7 +218,6 @@ static const struct tty_operations bfin_jc_ops = {
230 .flush_chars = bfin_jc_flush_chars, 218 .flush_chars = bfin_jc_flush_chars,
231 .write_room = bfin_jc_write_room, 219 .write_room = bfin_jc_write_room,
232 .chars_in_buffer = bfin_jc_chars_in_buffer, 220 .chars_in_buffer = bfin_jc_chars_in_buffer,
233 .wait_until_sent = bfin_jc_wait_until_sent,
234}; 221};
235 222
236static int __init bfin_jc_init(void) 223static int __init bfin_jc_init(void)
diff --git a/drivers/tty/serial/8250/8250_core.c b/drivers/tty/serial/8250/8250_core.c
index e3b9570a1eff..deae122c9c4b 100644
--- a/drivers/tty/serial/8250/8250_core.c
+++ b/drivers/tty/serial/8250/8250_core.c
@@ -2138,8 +2138,8 @@ int serial8250_do_startup(struct uart_port *port)
2138 /* 2138 /*
2139 * Clear the interrupt registers. 2139 * Clear the interrupt registers.
2140 */ 2140 */
2141 if (serial_port_in(port, UART_LSR) & UART_LSR_DR) 2141 serial_port_in(port, UART_LSR);
2142 serial_port_in(port, UART_RX); 2142 serial_port_in(port, UART_RX);
2143 serial_port_in(port, UART_IIR); 2143 serial_port_in(port, UART_IIR);
2144 serial_port_in(port, UART_MSR); 2144 serial_port_in(port, UART_MSR);
2145 2145
@@ -2300,8 +2300,8 @@ dont_test_tx_en:
2300 * saved flags to avoid getting false values from polling 2300 * saved flags to avoid getting false values from polling
2301 * routines or the previous session. 2301 * routines or the previous session.
2302 */ 2302 */
2303 if (serial_port_in(port, UART_LSR) & UART_LSR_DR) 2303 serial_port_in(port, UART_LSR);
2304 serial_port_in(port, UART_RX); 2304 serial_port_in(port, UART_RX);
2305 serial_port_in(port, UART_IIR); 2305 serial_port_in(port, UART_IIR);
2306 serial_port_in(port, UART_MSR); 2306 serial_port_in(port, UART_MSR);
2307 up->lsr_saved_flags = 0; 2307 up->lsr_saved_flags = 0;
@@ -2394,8 +2394,7 @@ void serial8250_do_shutdown(struct uart_port *port)
2394 * Read data port to reset things, and then unlink from 2394 * Read data port to reset things, and then unlink from
2395 * the IRQ chain. 2395 * the IRQ chain.
2396 */ 2396 */
2397 if (serial_port_in(port, UART_LSR) & UART_LSR_DR) 2397 serial_port_in(port, UART_RX);
2398 serial_port_in(port, UART_RX);
2399 serial8250_rpm_put(up); 2398 serial8250_rpm_put(up);
2400 2399
2401 del_timer_sync(&up->timer); 2400 del_timer_sync(&up->timer);
diff --git a/drivers/tty/serial/8250/8250_dw.c b/drivers/tty/serial/8250/8250_dw.c
index e60116235836..6ae5b8560e4d 100644
--- a/drivers/tty/serial/8250/8250_dw.c
+++ b/drivers/tty/serial/8250/8250_dw.c
@@ -59,6 +59,8 @@ struct dw8250_data {
59 u8 usr_reg; 59 u8 usr_reg;
60 int last_mcr; 60 int last_mcr;
61 int line; 61 int line;
62 int msr_mask_on;
63 int msr_mask_off;
62 struct clk *clk; 64 struct clk *clk;
63 struct clk *pclk; 65 struct clk *pclk;
64 struct reset_control *rst; 66 struct reset_control *rst;
@@ -81,6 +83,12 @@ static inline int dw8250_modify_msr(struct uart_port *p, int offset, int value)
81 value &= ~UART_MSR_DCTS; 83 value &= ~UART_MSR_DCTS;
82 } 84 }
83 85
86 /* Override any modem control signals if needed */
87 if (offset == UART_MSR) {
88 value |= d->msr_mask_on;
89 value &= ~d->msr_mask_off;
90 }
91
84 return value; 92 return value;
85} 93}
86 94
@@ -111,7 +119,10 @@ static void dw8250_serial_out(struct uart_port *p, int offset, int value)
111 dw8250_force_idle(p); 119 dw8250_force_idle(p);
112 writeb(value, p->membase + (UART_LCR << p->regshift)); 120 writeb(value, p->membase + (UART_LCR << p->regshift));
113 } 121 }
114 dev_err(p->dev, "Couldn't set LCR to %d\n", value); 122 /*
123 * FIXME: this deadlocks if port->lock is already held
124 * dev_err(p->dev, "Couldn't set LCR to %d\n", value);
125 */
115 } 126 }
116} 127}
117 128
@@ -155,7 +166,10 @@ static void dw8250_serial_outq(struct uart_port *p, int offset, int value)
155 __raw_writeq(value & 0xff, 166 __raw_writeq(value & 0xff,
156 p->membase + (UART_LCR << p->regshift)); 167 p->membase + (UART_LCR << p->regshift));
157 } 168 }
158 dev_err(p->dev, "Couldn't set LCR to %d\n", value); 169 /*
170 * FIXME: this deadlocks if port->lock is already held
171 * dev_err(p->dev, "Couldn't set LCR to %d\n", value);
172 */
159 } 173 }
160} 174}
161#endif /* CONFIG_64BIT */ 175#endif /* CONFIG_64BIT */
@@ -179,7 +193,10 @@ static void dw8250_serial_out32(struct uart_port *p, int offset, int value)
179 dw8250_force_idle(p); 193 dw8250_force_idle(p);
180 writel(value, p->membase + (UART_LCR << p->regshift)); 194 writel(value, p->membase + (UART_LCR << p->regshift));
181 } 195 }
182 dev_err(p->dev, "Couldn't set LCR to %d\n", value); 196 /*
197 * FIXME: this deadlocks if port->lock is already held
198 * dev_err(p->dev, "Couldn't set LCR to %d\n", value);
199 */
183 } 200 }
184} 201}
185 202
@@ -334,6 +351,30 @@ static int dw8250_probe_of(struct uart_port *p,
334 if (id >= 0) 351 if (id >= 0)
335 p->line = id; 352 p->line = id;
336 353
354 if (of_property_read_bool(np, "dcd-override")) {
355 /* Always report DCD as active */
356 data->msr_mask_on |= UART_MSR_DCD;
357 data->msr_mask_off |= UART_MSR_DDCD;
358 }
359
360 if (of_property_read_bool(np, "dsr-override")) {
361 /* Always report DSR as active */
362 data->msr_mask_on |= UART_MSR_DSR;
363 data->msr_mask_off |= UART_MSR_DDSR;
364 }
365
366 if (of_property_read_bool(np, "cts-override")) {
367 /* Always report DSR as active */
368 data->msr_mask_on |= UART_MSR_DSR;
369 data->msr_mask_off |= UART_MSR_DDSR;
370 }
371
372 if (of_property_read_bool(np, "ri-override")) {
373 /* Always report Ring indicator as inactive */
374 data->msr_mask_off |= UART_MSR_RI;
375 data->msr_mask_off |= UART_MSR_TERI;
376 }
377
337 /* clock got configured through clk api, all done */ 378 /* clock got configured through clk api, all done */
338 if (p->uartclk) 379 if (p->uartclk)
339 return 0; 380 return 0;
diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c
index daf2c82984e9..892eb32cdef4 100644
--- a/drivers/tty/serial/8250/8250_pci.c
+++ b/drivers/tty/serial/8250/8250_pci.c
@@ -69,7 +69,7 @@ static void moan_device(const char *str, struct pci_dev *dev)
69 "Please send the output of lspci -vv, this\n" 69 "Please send the output of lspci -vv, this\n"
70 "message (0x%04x,0x%04x,0x%04x,0x%04x), the\n" 70 "message (0x%04x,0x%04x,0x%04x,0x%04x), the\n"
71 "manufacturer and name of serial board or\n" 71 "manufacturer and name of serial board or\n"
72 "modem board to rmk+serial@arm.linux.org.uk.\n", 72 "modem board to <linux-serial@vger.kernel.org>.\n",
73 pci_name(dev), str, dev->vendor, dev->device, 73 pci_name(dev), str, dev->vendor, dev->device,
74 dev->subsystem_vendor, dev->subsystem_device); 74 dev->subsystem_vendor, dev->subsystem_device);
75} 75}
@@ -1989,13 +1989,6 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
1989 }, 1989 },
1990 { 1990 {
1991 .vendor = PCI_VENDOR_ID_INTEL, 1991 .vendor = PCI_VENDOR_ID_INTEL,
1992 .device = PCI_DEVICE_ID_INTEL_QRK_UART,
1993 .subvendor = PCI_ANY_ID,
1994 .subdevice = PCI_ANY_ID,
1995 .setup = pci_default_setup,
1996 },
1997 {
1998 .vendor = PCI_VENDOR_ID_INTEL,
1999 .device = PCI_DEVICE_ID_INTEL_BSW_UART1, 1992 .device = PCI_DEVICE_ID_INTEL_BSW_UART1,
2000 .subvendor = PCI_ANY_ID, 1993 .subvendor = PCI_ANY_ID,
2001 .subdevice = PCI_ANY_ID, 1994 .subdevice = PCI_ANY_ID,
@@ -2201,13 +2194,6 @@ static struct pci_serial_quirk pci_serial_quirks[] __refdata = {
2201 */ 2194 */
2202 { 2195 {
2203 .vendor = PCI_VENDOR_ID_PLX, 2196 .vendor = PCI_VENDOR_ID_PLX,
2204 .device = PCI_DEVICE_ID_PLX_9030,
2205 .subvendor = PCI_SUBVENDOR_ID_PERLE,
2206 .subdevice = PCI_ANY_ID,
2207 .setup = pci_default_setup,
2208 },
2209 {
2210 .vendor = PCI_VENDOR_ID_PLX,
2211 .device = PCI_DEVICE_ID_PLX_9050, 2197 .device = PCI_DEVICE_ID_PLX_9050,
2212 .subvendor = PCI_SUBVENDOR_ID_EXSYS, 2198 .subvendor = PCI_SUBVENDOR_ID_EXSYS,
2213 .subdevice = PCI_SUBDEVICE_ID_EXSYS_4055, 2199 .subdevice = PCI_SUBDEVICE_ID_EXSYS_4055,
@@ -5415,10 +5401,6 @@ static struct pci_device_id serial_pci_tbl[] = {
5415 PCI_ANY_ID, PCI_ANY_ID, 5401 PCI_ANY_ID, PCI_ANY_ID,
5416 0, 0, pbn_b0_bt_2_115200 }, 5402 0, 0, pbn_b0_bt_2_115200 },
5417 5403
5418 { PCI_VENDOR_ID_WCH, PCI_DEVICE_ID_WCH_CH352_2S,
5419 PCI_ANY_ID, PCI_ANY_ID,
5420 0, 0, pbn_b0_bt_2_115200 },
5421
5422 { PCIE_VENDOR_ID_WCH, PCIE_DEVICE_ID_WCH_CH384_4S, 5404 { PCIE_VENDOR_ID_WCH, PCIE_DEVICE_ID_WCH_CH384_4S,
5423 PCI_ANY_ID, PCI_ANY_ID, 5405 PCI_ANY_ID, PCI_ANY_ID,
5424 0, 0, pbn_wch384_4 }, 5406 0, 0, pbn_wch384_4 },
diff --git a/drivers/tty/serial/atmel_serial.c b/drivers/tty/serial/atmel_serial.c
index 846552bff67d..4e959c43f680 100644
--- a/drivers/tty/serial/atmel_serial.c
+++ b/drivers/tty/serial/atmel_serial.c
@@ -47,6 +47,7 @@
47#include <linux/gpio/consumer.h> 47#include <linux/gpio/consumer.h>
48#include <linux/err.h> 48#include <linux/err.h>
49#include <linux/irq.h> 49#include <linux/irq.h>
50#include <linux/suspend.h>
50 51
51#include <asm/io.h> 52#include <asm/io.h>
52#include <asm/ioctls.h> 53#include <asm/ioctls.h>
@@ -173,6 +174,12 @@ struct atmel_uart_port {
173 bool ms_irq_enabled; 174 bool ms_irq_enabled;
174 bool is_usart; /* usart or uart */ 175 bool is_usart; /* usart or uart */
175 struct timer_list uart_timer; /* uart timer */ 176 struct timer_list uart_timer; /* uart timer */
177
178 bool suspended;
179 unsigned int pending;
180 unsigned int pending_status;
181 spinlock_t lock_suspended;
182
176 int (*prepare_rx)(struct uart_port *port); 183 int (*prepare_rx)(struct uart_port *port);
177 int (*prepare_tx)(struct uart_port *port); 184 int (*prepare_tx)(struct uart_port *port);
178 void (*schedule_rx)(struct uart_port *port); 185 void (*schedule_rx)(struct uart_port *port);
@@ -1179,12 +1186,15 @@ static irqreturn_t atmel_interrupt(int irq, void *dev_id)
1179{ 1186{
1180 struct uart_port *port = dev_id; 1187 struct uart_port *port = dev_id;
1181 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 1188 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
1182 unsigned int status, pending, pass_counter = 0; 1189 unsigned int status, pending, mask, pass_counter = 0;
1183 bool gpio_handled = false; 1190 bool gpio_handled = false;
1184 1191
1192 spin_lock(&atmel_port->lock_suspended);
1193
1185 do { 1194 do {
1186 status = atmel_get_lines_status(port); 1195 status = atmel_get_lines_status(port);
1187 pending = status & UART_GET_IMR(port); 1196 mask = UART_GET_IMR(port);
1197 pending = status & mask;
1188 if (!gpio_handled) { 1198 if (!gpio_handled) {
1189 /* 1199 /*
1190 * Dealing with GPIO interrupt 1200 * Dealing with GPIO interrupt
@@ -1206,11 +1216,21 @@ static irqreturn_t atmel_interrupt(int irq, void *dev_id)
1206 if (!pending) 1216 if (!pending)
1207 break; 1217 break;
1208 1218
1219 if (atmel_port->suspended) {
1220 atmel_port->pending |= pending;
1221 atmel_port->pending_status = status;
1222 UART_PUT_IDR(port, mask);
1223 pm_system_wakeup();
1224 break;
1225 }
1226
1209 atmel_handle_receive(port, pending); 1227 atmel_handle_receive(port, pending);
1210 atmel_handle_status(port, pending, status); 1228 atmel_handle_status(port, pending, status);
1211 atmel_handle_transmit(port, pending); 1229 atmel_handle_transmit(port, pending);
1212 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT); 1230 } while (pass_counter++ < ATMEL_ISR_PASS_LIMIT);
1213 1231
1232 spin_unlock(&atmel_port->lock_suspended);
1233
1214 return pass_counter ? IRQ_HANDLED : IRQ_NONE; 1234 return pass_counter ? IRQ_HANDLED : IRQ_NONE;
1215} 1235}
1216 1236
@@ -1742,7 +1762,8 @@ static int atmel_startup(struct uart_port *port)
1742 /* 1762 /*
1743 * Allocate the IRQ 1763 * Allocate the IRQ
1744 */ 1764 */
1745 retval = request_irq(port->irq, atmel_interrupt, IRQF_SHARED, 1765 retval = request_irq(port->irq, atmel_interrupt,
1766 IRQF_SHARED | IRQF_COND_SUSPEND,
1746 tty ? tty->name : "atmel_serial", port); 1767 tty ? tty->name : "atmel_serial", port);
1747 if (retval) { 1768 if (retval) {
1748 dev_err(port->dev, "atmel_startup - Can't get irq\n"); 1769 dev_err(port->dev, "atmel_startup - Can't get irq\n");
@@ -2513,8 +2534,14 @@ static int atmel_serial_suspend(struct platform_device *pdev,
2513 2534
2514 /* we can not wake up if we're running on slow clock */ 2535 /* we can not wake up if we're running on slow clock */
2515 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev); 2536 atmel_port->may_wakeup = device_may_wakeup(&pdev->dev);
2516 if (atmel_serial_clk_will_stop()) 2537 if (atmel_serial_clk_will_stop()) {
2538 unsigned long flags;
2539
2540 spin_lock_irqsave(&atmel_port->lock_suspended, flags);
2541 atmel_port->suspended = true;
2542 spin_unlock_irqrestore(&atmel_port->lock_suspended, flags);
2517 device_set_wakeup_enable(&pdev->dev, 0); 2543 device_set_wakeup_enable(&pdev->dev, 0);
2544 }
2518 2545
2519 uart_suspend_port(&atmel_uart, port); 2546 uart_suspend_port(&atmel_uart, port);
2520 2547
@@ -2525,6 +2552,18 @@ static int atmel_serial_resume(struct platform_device *pdev)
2525{ 2552{
2526 struct uart_port *port = platform_get_drvdata(pdev); 2553 struct uart_port *port = platform_get_drvdata(pdev);
2527 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port); 2554 struct atmel_uart_port *atmel_port = to_atmel_uart_port(port);
2555 unsigned long flags;
2556
2557 spin_lock_irqsave(&atmel_port->lock_suspended, flags);
2558 if (atmel_port->pending) {
2559 atmel_handle_receive(port, atmel_port->pending);
2560 atmel_handle_status(port, atmel_port->pending,
2561 atmel_port->pending_status);
2562 atmel_handle_transmit(port, atmel_port->pending);
2563 atmel_port->pending = 0;
2564 }
2565 atmel_port->suspended = false;
2566 spin_unlock_irqrestore(&atmel_port->lock_suspended, flags);
2528 2567
2529 uart_resume_port(&atmel_uart, port); 2568 uart_resume_port(&atmel_uart, port);
2530 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup); 2569 device_set_wakeup_enable(&pdev->dev, atmel_port->may_wakeup);
@@ -2593,6 +2632,8 @@ static int atmel_serial_probe(struct platform_device *pdev)
2593 port->backup_imr = 0; 2632 port->backup_imr = 0;
2594 port->uart.line = ret; 2633 port->uart.line = ret;
2595 2634
2635 spin_lock_init(&port->lock_suspended);
2636
2596 ret = atmel_init_gpios(port, &pdev->dev); 2637 ret = atmel_init_gpios(port, &pdev->dev);
2597 if (ret < 0) 2638 if (ret < 0)
2598 dev_err(&pdev->dev, "%s", 2639 dev_err(&pdev->dev, "%s",
diff --git a/drivers/tty/serial/of_serial.c b/drivers/tty/serial/of_serial.c
index 7ff61e24a195..33fb94f78967 100644
--- a/drivers/tty/serial/of_serial.c
+++ b/drivers/tty/serial/of_serial.c
@@ -133,10 +133,6 @@ static int of_platform_serial_setup(struct platform_device *ofdev,
133 if (of_find_property(np, "no-loopback-test", NULL)) 133 if (of_find_property(np, "no-loopback-test", NULL))
134 port->flags |= UPF_SKIP_TEST; 134 port->flags |= UPF_SKIP_TEST;
135 135
136 ret = of_alias_get_id(np, "serial");
137 if (ret >= 0)
138 port->line = ret;
139
140 port->dev = &ofdev->dev; 136 port->dev = &ofdev->dev;
141 137
142 switch (type) { 138 switch (type) {
diff --git a/drivers/tty/serial/sprd_serial.c b/drivers/tty/serial/sprd_serial.c
index 594b63331ef4..bca975f5093b 100644
--- a/drivers/tty/serial/sprd_serial.c
+++ b/drivers/tty/serial/sprd_serial.c
@@ -293,8 +293,10 @@ static irqreturn_t sprd_handle_irq(int irq, void *dev_id)
293 293
294 ims = serial_in(port, SPRD_IMSR); 294 ims = serial_in(port, SPRD_IMSR);
295 295
296 if (!ims) 296 if (!ims) {
297 spin_unlock(&port->lock);
297 return IRQ_NONE; 298 return IRQ_NONE;
299 }
298 300
299 serial_out(port, SPRD_ICLR, ~0); 301 serial_out(port, SPRD_ICLR, ~0);
300 302
diff --git a/drivers/tty/tty_io.c b/drivers/tty/tty_io.c
index 51f066aa375e..2bb4dfc02873 100644
--- a/drivers/tty/tty_io.c
+++ b/drivers/tty/tty_io.c
@@ -1028,8 +1028,8 @@ EXPORT_SYMBOL(start_tty);
1028/* We limit tty time update visibility to every 8 seconds or so. */ 1028/* We limit tty time update visibility to every 8 seconds or so. */
1029static void tty_update_time(struct timespec *time) 1029static void tty_update_time(struct timespec *time)
1030{ 1030{
1031 unsigned long sec = get_seconds() & ~7; 1031 unsigned long sec = get_seconds();
1032 if ((long)(sec - time->tv_sec) > 0) 1032 if (abs(sec - time->tv_sec) & ~7)
1033 time->tv_sec = sec; 1033 time->tv_sec = sec;
1034} 1034}
1035 1035
diff --git a/drivers/tty/tty_ioctl.c b/drivers/tty/tty_ioctl.c
index a5cf253b2544..632fc8152061 100644
--- a/drivers/tty/tty_ioctl.c
+++ b/drivers/tty/tty_ioctl.c
@@ -217,11 +217,17 @@ void tty_wait_until_sent(struct tty_struct *tty, long timeout)
217#endif 217#endif
218 if (!timeout) 218 if (!timeout)
219 timeout = MAX_SCHEDULE_TIMEOUT; 219 timeout = MAX_SCHEDULE_TIMEOUT;
220 if (wait_event_interruptible_timeout(tty->write_wait, 220
221 !tty_chars_in_buffer(tty), timeout) >= 0) { 221 timeout = wait_event_interruptible_timeout(tty->write_wait,
222 if (tty->ops->wait_until_sent) 222 !tty_chars_in_buffer(tty), timeout);
223 tty->ops->wait_until_sent(tty, timeout); 223 if (timeout <= 0)
224 } 224 return;
225
226 if (timeout == MAX_SCHEDULE_TIMEOUT)
227 timeout = 0;
228
229 if (tty->ops->wait_until_sent)
230 tty->ops->wait_until_sent(tty, timeout);
225} 231}
226EXPORT_SYMBOL(tty_wait_until_sent); 232EXPORT_SYMBOL(tty_wait_until_sent);
227 233
diff --git a/drivers/usb/chipidea/udc.c b/drivers/usb/chipidea/udc.c
index ff451048c1ac..4bfb7ac0239f 100644
--- a/drivers/usb/chipidea/udc.c
+++ b/drivers/usb/chipidea/udc.c
@@ -929,6 +929,13 @@ __acquires(hwep->lock)
929 return retval; 929 return retval;
930} 930}
931 931
932static int otg_a_alt_hnp_support(struct ci_hdrc *ci)
933{
934 dev_warn(&ci->gadget.dev,
935 "connect the device to an alternate port if you want HNP\n");
936 return isr_setup_status_phase(ci);
937}
938
932/** 939/**
933 * isr_setup_packet_handler: setup packet handler 940 * isr_setup_packet_handler: setup packet handler
934 * @ci: UDC descriptor 941 * @ci: UDC descriptor
@@ -1061,6 +1068,10 @@ __acquires(ci->lock)
1061 ci); 1068 ci);
1062 } 1069 }
1063 break; 1070 break;
1071 case USB_DEVICE_A_ALT_HNP_SUPPORT:
1072 if (ci_otg_is_fsm_mode(ci))
1073 err = otg_a_alt_hnp_support(ci);
1074 break;
1064 default: 1075 default:
1065 goto delegate; 1076 goto delegate;
1066 } 1077 }
diff --git a/drivers/usb/class/cdc-acm.c b/drivers/usb/class/cdc-acm.c
index e78720b59d67..683617714e7c 100644
--- a/drivers/usb/class/cdc-acm.c
+++ b/drivers/usb/class/cdc-acm.c
@@ -1650,6 +1650,8 @@ static int acm_reset_resume(struct usb_interface *intf)
1650 1650
1651static const struct usb_device_id acm_ids[] = { 1651static const struct usb_device_id acm_ids[] = {
1652 /* quirky and broken devices */ 1652 /* quirky and broken devices */
1653 { USB_DEVICE(0x076d, 0x0006), /* Denso Cradle CU-321 */
1654 .driver_info = NO_UNION_NORMAL, },/* has no union descriptor */
1653 { USB_DEVICE(0x17ef, 0x7000), /* Lenovo USB modem */ 1655 { USB_DEVICE(0x17ef, 0x7000), /* Lenovo USB modem */
1654 .driver_info = NO_UNION_NORMAL, },/* has no union descriptor */ 1656 .driver_info = NO_UNION_NORMAL, },/* has no union descriptor */
1655 { USB_DEVICE(0x0870, 0x0001), /* Metricom GS Modem */ 1657 { USB_DEVICE(0x0870, 0x0001), /* Metricom GS Modem */
diff --git a/drivers/usb/common/usb-otg-fsm.c b/drivers/usb/common/usb-otg-fsm.c
index c6b35b77dab7..61d538aa2346 100644
--- a/drivers/usb/common/usb-otg-fsm.c
+++ b/drivers/usb/common/usb-otg-fsm.c
@@ -150,9 +150,9 @@ static int otg_set_state(struct otg_fsm *fsm, enum usb_otg_state new_state)
150 break; 150 break;
151 case OTG_STATE_B_PERIPHERAL: 151 case OTG_STATE_B_PERIPHERAL:
152 otg_chrg_vbus(fsm, 0); 152 otg_chrg_vbus(fsm, 0);
153 otg_loc_conn(fsm, 1);
154 otg_loc_sof(fsm, 0); 153 otg_loc_sof(fsm, 0);
155 otg_set_protocol(fsm, PROTO_GADGET); 154 otg_set_protocol(fsm, PROTO_GADGET);
155 otg_loc_conn(fsm, 1);
156 break; 156 break;
157 case OTG_STATE_B_WAIT_ACON: 157 case OTG_STATE_B_WAIT_ACON:
158 otg_chrg_vbus(fsm, 0); 158 otg_chrg_vbus(fsm, 0);
@@ -213,10 +213,10 @@ static int otg_set_state(struct otg_fsm *fsm, enum usb_otg_state new_state)
213 213
214 break; 214 break;
215 case OTG_STATE_A_PERIPHERAL: 215 case OTG_STATE_A_PERIPHERAL:
216 otg_loc_conn(fsm, 1);
217 otg_loc_sof(fsm, 0); 216 otg_loc_sof(fsm, 0);
218 otg_set_protocol(fsm, PROTO_GADGET); 217 otg_set_protocol(fsm, PROTO_GADGET);
219 otg_drv_vbus(fsm, 1); 218 otg_drv_vbus(fsm, 1);
219 otg_loc_conn(fsm, 1);
220 otg_add_timer(fsm, A_BIDL_ADIS); 220 otg_add_timer(fsm, A_BIDL_ADIS);
221 break; 221 break;
222 case OTG_STATE_A_WAIT_VFALL: 222 case OTG_STATE_A_WAIT_VFALL:
diff --git a/drivers/usb/core/devio.c b/drivers/usb/core/devio.c
index 66abdbcfbfa5..11635537c052 100644
--- a/drivers/usb/core/devio.c
+++ b/drivers/usb/core/devio.c
@@ -501,6 +501,7 @@ static void async_completed(struct urb *urb)
501 as->status = urb->status; 501 as->status = urb->status;
502 signr = as->signr; 502 signr = as->signr;
503 if (signr) { 503 if (signr) {
504 memset(&sinfo, 0, sizeof(sinfo));
504 sinfo.si_signo = as->signr; 505 sinfo.si_signo = as->signr;
505 sinfo.si_errno = as->status; 506 sinfo.si_errno = as->status;
506 sinfo.si_code = SI_ASYNCIO; 507 sinfo.si_code = SI_ASYNCIO;
@@ -2382,6 +2383,7 @@ static void usbdev_remove(struct usb_device *udev)
2382 wake_up_all(&ps->wait); 2383 wake_up_all(&ps->wait);
2383 list_del_init(&ps->list); 2384 list_del_init(&ps->list);
2384 if (ps->discsignr) { 2385 if (ps->discsignr) {
2386 memset(&sinfo, 0, sizeof(sinfo));
2385 sinfo.si_signo = ps->discsignr; 2387 sinfo.si_signo = ps->discsignr;
2386 sinfo.si_errno = EPIPE; 2388 sinfo.si_errno = EPIPE;
2387 sinfo.si_code = SI_ASYNCIO; 2389 sinfo.si_code = SI_ASYNCIO;
diff --git a/drivers/usb/dwc2/core_intr.c b/drivers/usb/dwc2/core_intr.c
index 02e3e2d4ea56..6cf047878dba 100644
--- a/drivers/usb/dwc2/core_intr.c
+++ b/drivers/usb/dwc2/core_intr.c
@@ -377,6 +377,9 @@ static void dwc2_handle_disconnect_intr(struct dwc2_hsotg *hsotg)
377 dwc2_is_host_mode(hsotg) ? "Host" : "Device", 377 dwc2_is_host_mode(hsotg) ? "Host" : "Device",
378 dwc2_op_state_str(hsotg)); 378 dwc2_op_state_str(hsotg));
379 379
380 if (hsotg->op_state == OTG_STATE_A_HOST)
381 dwc2_hcd_disconnect(hsotg);
382
380 /* Change to L3 (OFF) state */ 383 /* Change to L3 (OFF) state */
381 hsotg->lx_state = DWC2_L3; 384 hsotg->lx_state = DWC2_L3;
382 385
diff --git a/drivers/usb/dwc3/dwc3-omap.c b/drivers/usb/dwc3/dwc3-omap.c
index 172d64e585b6..52e0c4e5e48e 100644
--- a/drivers/usb/dwc3/dwc3-omap.c
+++ b/drivers/usb/dwc3/dwc3-omap.c
@@ -205,6 +205,18 @@ static void dwc3_omap_write_irq0_set(struct dwc3_omap *omap, u32 value)
205 omap->irq0_offset, value); 205 omap->irq0_offset, value);
206} 206}
207 207
208static void dwc3_omap_write_irqmisc_clr(struct dwc3_omap *omap, u32 value)
209{
210 dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_CLR_MISC +
211 omap->irqmisc_offset, value);
212}
213
214static void dwc3_omap_write_irq0_clr(struct dwc3_omap *omap, u32 value)
215{
216 dwc3_omap_writel(omap->base, USBOTGSS_IRQENABLE_CLR_0 -
217 omap->irq0_offset, value);
218}
219
208static void dwc3_omap_set_mailbox(struct dwc3_omap *omap, 220static void dwc3_omap_set_mailbox(struct dwc3_omap *omap,
209 enum omap_dwc3_vbus_id_status status) 221 enum omap_dwc3_vbus_id_status status)
210{ 222{
@@ -345,9 +357,23 @@ static void dwc3_omap_enable_irqs(struct dwc3_omap *omap)
345 357
346static void dwc3_omap_disable_irqs(struct dwc3_omap *omap) 358static void dwc3_omap_disable_irqs(struct dwc3_omap *omap)
347{ 359{
360 u32 reg;
361
348 /* disable all IRQs */ 362 /* disable all IRQs */
349 dwc3_omap_write_irqmisc_set(omap, 0x00); 363 reg = USBOTGSS_IRQO_COREIRQ_ST;
350 dwc3_omap_write_irq0_set(omap, 0x00); 364 dwc3_omap_write_irq0_clr(omap, reg);
365
366 reg = (USBOTGSS_IRQMISC_OEVT |
367 USBOTGSS_IRQMISC_DRVVBUS_RISE |
368 USBOTGSS_IRQMISC_CHRGVBUS_RISE |
369 USBOTGSS_IRQMISC_DISCHRGVBUS_RISE |
370 USBOTGSS_IRQMISC_IDPULLUP_RISE |
371 USBOTGSS_IRQMISC_DRVVBUS_FALL |
372 USBOTGSS_IRQMISC_CHRGVBUS_FALL |
373 USBOTGSS_IRQMISC_DISCHRGVBUS_FALL |
374 USBOTGSS_IRQMISC_IDPULLUP_FALL);
375
376 dwc3_omap_write_irqmisc_clr(omap, reg);
351} 377}
352 378
353static u64 dwc3_omap_dma_mask = DMA_BIT_MASK(32); 379static u64 dwc3_omap_dma_mask = DMA_BIT_MASK(32);
diff --git a/drivers/usb/gadget/configfs.c b/drivers/usb/gadget/configfs.c
index 75648145dc1b..c42765b3a060 100644
--- a/drivers/usb/gadget/configfs.c
+++ b/drivers/usb/gadget/configfs.c
@@ -1161,7 +1161,6 @@ static ssize_t interf_grp_compatible_id_store(struct usb_os_desc *desc,
1161 if (desc->opts_mutex) 1161 if (desc->opts_mutex)
1162 mutex_lock(desc->opts_mutex); 1162 mutex_lock(desc->opts_mutex);
1163 memcpy(desc->ext_compat_id, page, l); 1163 memcpy(desc->ext_compat_id, page, l);
1164 desc->ext_compat_id[l] = '\0';
1165 1164
1166 if (desc->opts_mutex) 1165 if (desc->opts_mutex)
1167 mutex_unlock(desc->opts_mutex); 1166 mutex_unlock(desc->opts_mutex);
@@ -1192,7 +1191,6 @@ static ssize_t interf_grp_sub_compatible_id_store(struct usb_os_desc *desc,
1192 if (desc->opts_mutex) 1191 if (desc->opts_mutex)
1193 mutex_lock(desc->opts_mutex); 1192 mutex_lock(desc->opts_mutex);
1194 memcpy(desc->ext_compat_id + 8, page, l); 1193 memcpy(desc->ext_compat_id + 8, page, l);
1195 desc->ext_compat_id[l + 8] = '\0';
1196 1194
1197 if (desc->opts_mutex) 1195 if (desc->opts_mutex)
1198 mutex_unlock(desc->opts_mutex); 1196 mutex_unlock(desc->opts_mutex);
diff --git a/drivers/usb/gadget/function/f_fs.c b/drivers/usb/gadget/function/f_fs.c
index af98b096af2f..175c9956cbe3 100644
--- a/drivers/usb/gadget/function/f_fs.c
+++ b/drivers/usb/gadget/function/f_fs.c
@@ -144,10 +144,9 @@ struct ffs_io_data {
144 bool read; 144 bool read;
145 145
146 struct kiocb *kiocb; 146 struct kiocb *kiocb;
147 const struct iovec *iovec; 147 struct iov_iter data;
148 unsigned long nr_segs; 148 const void *to_free;
149 char __user *buf; 149 char *buf;
150 size_t len;
151 150
152 struct mm_struct *mm; 151 struct mm_struct *mm;
153 struct work_struct work; 152 struct work_struct work;
@@ -649,29 +648,10 @@ static void ffs_user_copy_worker(struct work_struct *work)
649 io_data->req->actual; 648 io_data->req->actual;
650 649
651 if (io_data->read && ret > 0) { 650 if (io_data->read && ret > 0) {
652 int i;
653 size_t pos = 0;
654
655 /*
656 * Since req->length may be bigger than io_data->len (after
657 * being rounded up to maxpacketsize), we may end up with more
658 * data then user space has space for.
659 */
660 ret = min_t(int, ret, io_data->len);
661
662 use_mm(io_data->mm); 651 use_mm(io_data->mm);
663 for (i = 0; i < io_data->nr_segs; i++) { 652 ret = copy_to_iter(io_data->buf, ret, &io_data->data);
664 size_t len = min_t(size_t, ret - pos, 653 if (iov_iter_count(&io_data->data))
665 io_data->iovec[i].iov_len); 654 ret = -EFAULT;
666 if (!len)
667 break;
668 if (unlikely(copy_to_user(io_data->iovec[i].iov_base,
669 &io_data->buf[pos], len))) {
670 ret = -EFAULT;
671 break;
672 }
673 pos += len;
674 }
675 unuse_mm(io_data->mm); 655 unuse_mm(io_data->mm);
676 } 656 }
677 657
@@ -684,7 +664,7 @@ static void ffs_user_copy_worker(struct work_struct *work)
684 664
685 io_data->kiocb->private = NULL; 665 io_data->kiocb->private = NULL;
686 if (io_data->read) 666 if (io_data->read)
687 kfree(io_data->iovec); 667 kfree(io_data->to_free);
688 kfree(io_data->buf); 668 kfree(io_data->buf);
689 kfree(io_data); 669 kfree(io_data);
690} 670}
@@ -743,6 +723,7 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
743 * before the waiting completes, so do not assign to 'gadget' earlier 723 * before the waiting completes, so do not assign to 'gadget' earlier
744 */ 724 */
745 struct usb_gadget *gadget = epfile->ffs->gadget; 725 struct usb_gadget *gadget = epfile->ffs->gadget;
726 size_t copied;
746 727
747 spin_lock_irq(&epfile->ffs->eps_lock); 728 spin_lock_irq(&epfile->ffs->eps_lock);
748 /* In the meantime, endpoint got disabled or changed. */ 729 /* In the meantime, endpoint got disabled or changed. */
@@ -750,34 +731,21 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
750 spin_unlock_irq(&epfile->ffs->eps_lock); 731 spin_unlock_irq(&epfile->ffs->eps_lock);
751 return -ESHUTDOWN; 732 return -ESHUTDOWN;
752 } 733 }
734 data_len = iov_iter_count(&io_data->data);
753 /* 735 /*
754 * Controller may require buffer size to be aligned to 736 * Controller may require buffer size to be aligned to
755 * maxpacketsize of an out endpoint. 737 * maxpacketsize of an out endpoint.
756 */ 738 */
757 data_len = io_data->read ? 739 if (io_data->read)
758 usb_ep_align_maybe(gadget, ep->ep, io_data->len) : 740 data_len = usb_ep_align_maybe(gadget, ep->ep, data_len);
759 io_data->len;
760 spin_unlock_irq(&epfile->ffs->eps_lock); 741 spin_unlock_irq(&epfile->ffs->eps_lock);
761 742
762 data = kmalloc(data_len, GFP_KERNEL); 743 data = kmalloc(data_len, GFP_KERNEL);
763 if (unlikely(!data)) 744 if (unlikely(!data))
764 return -ENOMEM; 745 return -ENOMEM;
765 if (io_data->aio && !io_data->read) { 746 if (!io_data->read) {
766 int i; 747 copied = copy_from_iter(data, data_len, &io_data->data);
767 size_t pos = 0; 748 if (copied != data_len) {
768 for (i = 0; i < io_data->nr_segs; i++) {
769 if (unlikely(copy_from_user(&data[pos],
770 io_data->iovec[i].iov_base,
771 io_data->iovec[i].iov_len))) {
772 ret = -EFAULT;
773 goto error;
774 }
775 pos += io_data->iovec[i].iov_len;
776 }
777 } else {
778 if (!io_data->read &&
779 unlikely(__copy_from_user(data, io_data->buf,
780 io_data->len))) {
781 ret = -EFAULT; 749 ret = -EFAULT;
782 goto error; 750 goto error;
783 } 751 }
@@ -876,10 +844,8 @@ static ssize_t ffs_epfile_io(struct file *file, struct ffs_io_data *io_data)
876 */ 844 */
877 ret = ep->status; 845 ret = ep->status;
878 if (io_data->read && ret > 0) { 846 if (io_data->read && ret > 0) {
879 ret = min_t(size_t, ret, io_data->len); 847 ret = copy_to_iter(data, ret, &io_data->data);
880 848 if (unlikely(iov_iter_count(&io_data->data)))
881 if (unlikely(copy_to_user(io_data->buf,
882 data, ret)))
883 ret = -EFAULT; 849 ret = -EFAULT;
884 } 850 }
885 } 851 }
@@ -898,37 +864,6 @@ error:
898 return ret; 864 return ret;
899} 865}
900 866
901static ssize_t
902ffs_epfile_write(struct file *file, const char __user *buf, size_t len,
903 loff_t *ptr)
904{
905 struct ffs_io_data io_data;
906
907 ENTER();
908
909 io_data.aio = false;
910 io_data.read = false;
911 io_data.buf = (char * __user)buf;
912 io_data.len = len;
913
914 return ffs_epfile_io(file, &io_data);
915}
916
917static ssize_t
918ffs_epfile_read(struct file *file, char __user *buf, size_t len, loff_t *ptr)
919{
920 struct ffs_io_data io_data;
921
922 ENTER();
923
924 io_data.aio = false;
925 io_data.read = true;
926 io_data.buf = buf;
927 io_data.len = len;
928
929 return ffs_epfile_io(file, &io_data);
930}
931
932static int 867static int
933ffs_epfile_open(struct inode *inode, struct file *file) 868ffs_epfile_open(struct inode *inode, struct file *file)
934{ 869{
@@ -965,67 +900,86 @@ static int ffs_aio_cancel(struct kiocb *kiocb)
965 return value; 900 return value;
966} 901}
967 902
968static ssize_t ffs_epfile_aio_write(struct kiocb *kiocb, 903static ssize_t ffs_epfile_write_iter(struct kiocb *kiocb, struct iov_iter *from)
969 const struct iovec *iovec,
970 unsigned long nr_segs, loff_t loff)
971{ 904{
972 struct ffs_io_data *io_data; 905 struct ffs_io_data io_data, *p = &io_data;
906 ssize_t res;
973 907
974 ENTER(); 908 ENTER();
975 909
976 io_data = kmalloc(sizeof(*io_data), GFP_KERNEL); 910 if (!is_sync_kiocb(kiocb)) {
977 if (unlikely(!io_data)) 911 p = kmalloc(sizeof(io_data), GFP_KERNEL);
978 return -ENOMEM; 912 if (unlikely(!p))
913 return -ENOMEM;
914 p->aio = true;
915 } else {
916 p->aio = false;
917 }
979 918
980 io_data->aio = true; 919 p->read = false;
981 io_data->read = false; 920 p->kiocb = kiocb;
982 io_data->kiocb = kiocb; 921 p->data = *from;
983 io_data->iovec = iovec; 922 p->mm = current->mm;
984 io_data->nr_segs = nr_segs;
985 io_data->len = kiocb->ki_nbytes;
986 io_data->mm = current->mm;
987 923
988 kiocb->private = io_data; 924 kiocb->private = p;
989 925
990 kiocb_set_cancel_fn(kiocb, ffs_aio_cancel); 926 kiocb_set_cancel_fn(kiocb, ffs_aio_cancel);
991 927
992 return ffs_epfile_io(kiocb->ki_filp, io_data); 928 res = ffs_epfile_io(kiocb->ki_filp, p);
929 if (res == -EIOCBQUEUED)
930 return res;
931 if (p->aio)
932 kfree(p);
933 else
934 *from = p->data;
935 return res;
993} 936}
994 937
995static ssize_t ffs_epfile_aio_read(struct kiocb *kiocb, 938static ssize_t ffs_epfile_read_iter(struct kiocb *kiocb, struct iov_iter *to)
996 const struct iovec *iovec,
997 unsigned long nr_segs, loff_t loff)
998{ 939{
999 struct ffs_io_data *io_data; 940 struct ffs_io_data io_data, *p = &io_data;
1000 struct iovec *iovec_copy; 941 ssize_t res;
1001 942
1002 ENTER(); 943 ENTER();
1003 944
1004 iovec_copy = kmalloc_array(nr_segs, sizeof(*iovec_copy), GFP_KERNEL); 945 if (!is_sync_kiocb(kiocb)) {
1005 if (unlikely(!iovec_copy)) 946 p = kmalloc(sizeof(io_data), GFP_KERNEL);
1006 return -ENOMEM; 947 if (unlikely(!p))
1007 948 return -ENOMEM;
1008 memcpy(iovec_copy, iovec, sizeof(struct iovec)*nr_segs); 949 p->aio = true;
1009 950 } else {
1010 io_data = kmalloc(sizeof(*io_data), GFP_KERNEL); 951 p->aio = false;
1011 if (unlikely(!io_data)) {
1012 kfree(iovec_copy);
1013 return -ENOMEM;
1014 } 952 }
1015 953
1016 io_data->aio = true; 954 p->read = true;
1017 io_data->read = true; 955 p->kiocb = kiocb;
1018 io_data->kiocb = kiocb; 956 if (p->aio) {
1019 io_data->iovec = iovec_copy; 957 p->to_free = dup_iter(&p->data, to, GFP_KERNEL);
1020 io_data->nr_segs = nr_segs; 958 if (!p->to_free) {
1021 io_data->len = kiocb->ki_nbytes; 959 kfree(p);
1022 io_data->mm = current->mm; 960 return -ENOMEM;
961 }
962 } else {
963 p->data = *to;
964 p->to_free = NULL;
965 }
966 p->mm = current->mm;
1023 967
1024 kiocb->private = io_data; 968 kiocb->private = p;
1025 969
1026 kiocb_set_cancel_fn(kiocb, ffs_aio_cancel); 970 kiocb_set_cancel_fn(kiocb, ffs_aio_cancel);
1027 971
1028 return ffs_epfile_io(kiocb->ki_filp, io_data); 972 res = ffs_epfile_io(kiocb->ki_filp, p);
973 if (res == -EIOCBQUEUED)
974 return res;
975
976 if (p->aio) {
977 kfree(p->to_free);
978 kfree(p);
979 } else {
980 *to = p->data;
981 }
982 return res;
1029} 983}
1030 984
1031static int 985static int
@@ -1105,10 +1059,10 @@ static const struct file_operations ffs_epfile_operations = {
1105 .llseek = no_llseek, 1059 .llseek = no_llseek,
1106 1060
1107 .open = ffs_epfile_open, 1061 .open = ffs_epfile_open,
1108 .write = ffs_epfile_write, 1062 .write = new_sync_write,
1109 .read = ffs_epfile_read, 1063 .read = new_sync_read,
1110 .aio_write = ffs_epfile_aio_write, 1064 .write_iter = ffs_epfile_write_iter,
1111 .aio_read = ffs_epfile_aio_read, 1065 .read_iter = ffs_epfile_read_iter,
1112 .release = ffs_epfile_release, 1066 .release = ffs_epfile_release,
1113 .unlocked_ioctl = ffs_epfile_ioctl, 1067 .unlocked_ioctl = ffs_epfile_ioctl,
1114}; 1068};
diff --git a/drivers/usb/gadget/function/f_hid.c b/drivers/usb/gadget/function/f_hid.c
index 426d69a9c018..a2612fb79eff 100644
--- a/drivers/usb/gadget/function/f_hid.c
+++ b/drivers/usb/gadget/function/f_hid.c
@@ -569,7 +569,7 @@ fail:
569 return status; 569 return status;
570} 570}
571 571
572const struct file_operations f_hidg_fops = { 572static const struct file_operations f_hidg_fops = {
573 .owner = THIS_MODULE, 573 .owner = THIS_MODULE,
574 .open = f_hidg_open, 574 .open = f_hidg_open,
575 .release = f_hidg_release, 575 .release = f_hidg_release,
diff --git a/drivers/usb/gadget/function/f_loopback.c b/drivers/usb/gadget/function/f_loopback.c
index 298b46112b1a..39f49f1ad22f 100644
--- a/drivers/usb/gadget/function/f_loopback.c
+++ b/drivers/usb/gadget/function/f_loopback.c
@@ -289,8 +289,7 @@ static void disable_loopback(struct f_loopback *loop)
289 struct usb_composite_dev *cdev; 289 struct usb_composite_dev *cdev;
290 290
291 cdev = loop->function.config->cdev; 291 cdev = loop->function.config->cdev;
292 disable_endpoints(cdev, loop->in_ep, loop->out_ep, NULL, NULL, NULL, 292 disable_endpoints(cdev, loop->in_ep, loop->out_ep, NULL, NULL);
293 NULL);
294 VDBG(cdev, "%s disabled\n", loop->function.name); 293 VDBG(cdev, "%s disabled\n", loop->function.name);
295} 294}
296 295
diff --git a/drivers/usb/gadget/function/f_phonet.c b/drivers/usb/gadget/function/f_phonet.c
index c89e96cfa3e4..c0c3ef272714 100644
--- a/drivers/usb/gadget/function/f_phonet.c
+++ b/drivers/usb/gadget/function/f_phonet.c
@@ -417,7 +417,10 @@ static int pn_set_alt(struct usb_function *f, unsigned intf, unsigned alt)
417 return -EINVAL; 417 return -EINVAL;
418 418
419 spin_lock(&port->lock); 419 spin_lock(&port->lock);
420 __pn_reset(f); 420
421 if (fp->in_ep->driver_data)
422 __pn_reset(f);
423
421 if (alt == 1) { 424 if (alt == 1) {
422 int i; 425 int i;
423 426
diff --git a/drivers/usb/gadget/function/f_sourcesink.c b/drivers/usb/gadget/function/f_sourcesink.c
index e07c50ced64d..3a5ae9900b1e 100644
--- a/drivers/usb/gadget/function/f_sourcesink.c
+++ b/drivers/usb/gadget/function/f_sourcesink.c
@@ -23,15 +23,6 @@
23#include "gadget_chips.h" 23#include "gadget_chips.h"
24#include "u_f.h" 24#include "u_f.h"
25 25
26#define USB_MS_TO_SS_INTERVAL(x) USB_MS_TO_HS_INTERVAL(x)
27
28enum eptype {
29 EP_CONTROL = 0,
30 EP_BULK,
31 EP_ISOC,
32 EP_INTERRUPT,
33};
34
35/* 26/*
36 * SOURCE/SINK FUNCTION ... a primary testing vehicle for USB peripheral 27 * SOURCE/SINK FUNCTION ... a primary testing vehicle for USB peripheral
37 * controller drivers. 28 * controller drivers.
@@ -64,8 +55,6 @@ struct f_sourcesink {
64 struct usb_ep *out_ep; 55 struct usb_ep *out_ep;
65 struct usb_ep *iso_in_ep; 56 struct usb_ep *iso_in_ep;
66 struct usb_ep *iso_out_ep; 57 struct usb_ep *iso_out_ep;
67 struct usb_ep *int_in_ep;
68 struct usb_ep *int_out_ep;
69 int cur_alt; 58 int cur_alt;
70}; 59};
71 60
@@ -79,10 +68,6 @@ static unsigned isoc_interval;
79static unsigned isoc_maxpacket; 68static unsigned isoc_maxpacket;
80static unsigned isoc_mult; 69static unsigned isoc_mult;
81static unsigned isoc_maxburst; 70static unsigned isoc_maxburst;
82static unsigned int_interval; /* In ms */
83static unsigned int_maxpacket;
84static unsigned int_mult;
85static unsigned int_maxburst;
86static unsigned buflen; 71static unsigned buflen;
87 72
88/*-------------------------------------------------------------------------*/ 73/*-------------------------------------------------------------------------*/
@@ -107,16 +92,6 @@ static struct usb_interface_descriptor source_sink_intf_alt1 = {
107 /* .iInterface = DYNAMIC */ 92 /* .iInterface = DYNAMIC */
108}; 93};
109 94
110static struct usb_interface_descriptor source_sink_intf_alt2 = {
111 .bLength = USB_DT_INTERFACE_SIZE,
112 .bDescriptorType = USB_DT_INTERFACE,
113
114 .bAlternateSetting = 2,
115 .bNumEndpoints = 2,
116 .bInterfaceClass = USB_CLASS_VENDOR_SPEC,
117 /* .iInterface = DYNAMIC */
118};
119
120/* full speed support: */ 95/* full speed support: */
121 96
122static struct usb_endpoint_descriptor fs_source_desc = { 97static struct usb_endpoint_descriptor fs_source_desc = {
@@ -155,26 +130,6 @@ static struct usb_endpoint_descriptor fs_iso_sink_desc = {
155 .bInterval = 4, 130 .bInterval = 4,
156}; 131};
157 132
158static struct usb_endpoint_descriptor fs_int_source_desc = {
159 .bLength = USB_DT_ENDPOINT_SIZE,
160 .bDescriptorType = USB_DT_ENDPOINT,
161
162 .bEndpointAddress = USB_DIR_IN,
163 .bmAttributes = USB_ENDPOINT_XFER_INT,
164 .wMaxPacketSize = cpu_to_le16(64),
165 .bInterval = GZERO_INT_INTERVAL,
166};
167
168static struct usb_endpoint_descriptor fs_int_sink_desc = {
169 .bLength = USB_DT_ENDPOINT_SIZE,
170 .bDescriptorType = USB_DT_ENDPOINT,
171
172 .bEndpointAddress = USB_DIR_OUT,
173 .bmAttributes = USB_ENDPOINT_XFER_INT,
174 .wMaxPacketSize = cpu_to_le16(64),
175 .bInterval = GZERO_INT_INTERVAL,
176};
177
178static struct usb_descriptor_header *fs_source_sink_descs[] = { 133static struct usb_descriptor_header *fs_source_sink_descs[] = {
179 (struct usb_descriptor_header *) &source_sink_intf_alt0, 134 (struct usb_descriptor_header *) &source_sink_intf_alt0,
180 (struct usb_descriptor_header *) &fs_sink_desc, 135 (struct usb_descriptor_header *) &fs_sink_desc,
@@ -185,10 +140,6 @@ static struct usb_descriptor_header *fs_source_sink_descs[] = {
185 (struct usb_descriptor_header *) &fs_source_desc, 140 (struct usb_descriptor_header *) &fs_source_desc,
186 (struct usb_descriptor_header *) &fs_iso_sink_desc, 141 (struct usb_descriptor_header *) &fs_iso_sink_desc,
187 (struct usb_descriptor_header *) &fs_iso_source_desc, 142 (struct usb_descriptor_header *) &fs_iso_source_desc,
188 (struct usb_descriptor_header *) &source_sink_intf_alt2,
189#define FS_ALT_IFC_2_OFFSET 8
190 (struct usb_descriptor_header *) &fs_int_sink_desc,
191 (struct usb_descriptor_header *) &fs_int_source_desc,
192 NULL, 143 NULL,
193}; 144};
194 145
@@ -228,24 +179,6 @@ static struct usb_endpoint_descriptor hs_iso_sink_desc = {
228 .bInterval = 4, 179 .bInterval = 4,
229}; 180};
230 181
231static struct usb_endpoint_descriptor hs_int_source_desc = {
232 .bLength = USB_DT_ENDPOINT_SIZE,
233 .bDescriptorType = USB_DT_ENDPOINT,
234
235 .bmAttributes = USB_ENDPOINT_XFER_INT,
236 .wMaxPacketSize = cpu_to_le16(1024),
237 .bInterval = USB_MS_TO_HS_INTERVAL(GZERO_INT_INTERVAL),
238};
239
240static struct usb_endpoint_descriptor hs_int_sink_desc = {
241 .bLength = USB_DT_ENDPOINT_SIZE,
242 .bDescriptorType = USB_DT_ENDPOINT,
243
244 .bmAttributes = USB_ENDPOINT_XFER_INT,
245 .wMaxPacketSize = cpu_to_le16(1024),
246 .bInterval = USB_MS_TO_HS_INTERVAL(GZERO_INT_INTERVAL),
247};
248
249static struct usb_descriptor_header *hs_source_sink_descs[] = { 182static struct usb_descriptor_header *hs_source_sink_descs[] = {
250 (struct usb_descriptor_header *) &source_sink_intf_alt0, 183 (struct usb_descriptor_header *) &source_sink_intf_alt0,
251 (struct usb_descriptor_header *) &hs_source_desc, 184 (struct usb_descriptor_header *) &hs_source_desc,
@@ -256,10 +189,6 @@ static struct usb_descriptor_header *hs_source_sink_descs[] = {
256 (struct usb_descriptor_header *) &hs_sink_desc, 189 (struct usb_descriptor_header *) &hs_sink_desc,
257 (struct usb_descriptor_header *) &hs_iso_source_desc, 190 (struct usb_descriptor_header *) &hs_iso_source_desc,
258 (struct usb_descriptor_header *) &hs_iso_sink_desc, 191 (struct usb_descriptor_header *) &hs_iso_sink_desc,
259 (struct usb_descriptor_header *) &source_sink_intf_alt2,
260#define HS_ALT_IFC_2_OFFSET 8
261 (struct usb_descriptor_header *) &hs_int_source_desc,
262 (struct usb_descriptor_header *) &hs_int_sink_desc,
263 NULL, 192 NULL,
264}; 193};
265 194
@@ -335,42 +264,6 @@ static struct usb_ss_ep_comp_descriptor ss_iso_sink_comp_desc = {
335 .wBytesPerInterval = cpu_to_le16(1024), 264 .wBytesPerInterval = cpu_to_le16(1024),
336}; 265};
337 266
338static struct usb_endpoint_descriptor ss_int_source_desc = {
339 .bLength = USB_DT_ENDPOINT_SIZE,
340 .bDescriptorType = USB_DT_ENDPOINT,
341
342 .bmAttributes = USB_ENDPOINT_XFER_INT,
343 .wMaxPacketSize = cpu_to_le16(1024),
344 .bInterval = USB_MS_TO_SS_INTERVAL(GZERO_INT_INTERVAL),
345};
346
347struct usb_ss_ep_comp_descriptor ss_int_source_comp_desc = {
348 .bLength = USB_DT_SS_EP_COMP_SIZE,
349 .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
350
351 .bMaxBurst = 0,
352 .bmAttributes = 0,
353 .wBytesPerInterval = cpu_to_le16(1024),
354};
355
356static struct usb_endpoint_descriptor ss_int_sink_desc = {
357 .bLength = USB_DT_ENDPOINT_SIZE,
358 .bDescriptorType = USB_DT_ENDPOINT,
359
360 .bmAttributes = USB_ENDPOINT_XFER_INT,
361 .wMaxPacketSize = cpu_to_le16(1024),
362 .bInterval = USB_MS_TO_SS_INTERVAL(GZERO_INT_INTERVAL),
363};
364
365struct usb_ss_ep_comp_descriptor ss_int_sink_comp_desc = {
366 .bLength = USB_DT_SS_EP_COMP_SIZE,
367 .bDescriptorType = USB_DT_SS_ENDPOINT_COMP,
368
369 .bMaxBurst = 0,
370 .bmAttributes = 0,
371 .wBytesPerInterval = cpu_to_le16(1024),
372};
373
374static struct usb_descriptor_header *ss_source_sink_descs[] = { 267static struct usb_descriptor_header *ss_source_sink_descs[] = {
375 (struct usb_descriptor_header *) &source_sink_intf_alt0, 268 (struct usb_descriptor_header *) &source_sink_intf_alt0,
376 (struct usb_descriptor_header *) &ss_source_desc, 269 (struct usb_descriptor_header *) &ss_source_desc,
@@ -387,12 +280,6 @@ static struct usb_descriptor_header *ss_source_sink_descs[] = {
387 (struct usb_descriptor_header *) &ss_iso_source_comp_desc, 280 (struct usb_descriptor_header *) &ss_iso_source_comp_desc,
388 (struct usb_descriptor_header *) &ss_iso_sink_desc, 281 (struct usb_descriptor_header *) &ss_iso_sink_desc,
389 (struct usb_descriptor_header *) &ss_iso_sink_comp_desc, 282 (struct usb_descriptor_header *) &ss_iso_sink_comp_desc,
390 (struct usb_descriptor_header *) &source_sink_intf_alt2,
391#define SS_ALT_IFC_2_OFFSET 14
392 (struct usb_descriptor_header *) &ss_int_source_desc,
393 (struct usb_descriptor_header *) &ss_int_source_comp_desc,
394 (struct usb_descriptor_header *) &ss_int_sink_desc,
395 (struct usb_descriptor_header *) &ss_int_sink_comp_desc,
396 NULL, 283 NULL,
397}; 284};
398 285
@@ -414,21 +301,6 @@ static struct usb_gadget_strings *sourcesink_strings[] = {
414}; 301};
415 302
416/*-------------------------------------------------------------------------*/ 303/*-------------------------------------------------------------------------*/
417static const char *get_ep_string(enum eptype ep_type)
418{
419 switch (ep_type) {
420 case EP_ISOC:
421 return "ISOC-";
422 case EP_INTERRUPT:
423 return "INTERRUPT-";
424 case EP_CONTROL:
425 return "CTRL-";
426 case EP_BULK:
427 return "BULK-";
428 default:
429 return "UNKNOWN-";
430 }
431}
432 304
433static inline struct usb_request *ss_alloc_ep_req(struct usb_ep *ep, int len) 305static inline struct usb_request *ss_alloc_ep_req(struct usb_ep *ep, int len)
434{ 306{
@@ -456,8 +328,7 @@ static void disable_ep(struct usb_composite_dev *cdev, struct usb_ep *ep)
456 328
457void disable_endpoints(struct usb_composite_dev *cdev, 329void disable_endpoints(struct usb_composite_dev *cdev,
458 struct usb_ep *in, struct usb_ep *out, 330 struct usb_ep *in, struct usb_ep *out,
459 struct usb_ep *iso_in, struct usb_ep *iso_out, 331 struct usb_ep *iso_in, struct usb_ep *iso_out)
460 struct usb_ep *int_in, struct usb_ep *int_out)
461{ 332{
462 disable_ep(cdev, in); 333 disable_ep(cdev, in);
463 disable_ep(cdev, out); 334 disable_ep(cdev, out);
@@ -465,10 +336,6 @@ void disable_endpoints(struct usb_composite_dev *cdev,
465 disable_ep(cdev, iso_in); 336 disable_ep(cdev, iso_in);
466 if (iso_out) 337 if (iso_out)
467 disable_ep(cdev, iso_out); 338 disable_ep(cdev, iso_out);
468 if (int_in)
469 disable_ep(cdev, int_in);
470 if (int_out)
471 disable_ep(cdev, int_out);
472} 339}
473 340
474static int 341static int
@@ -485,7 +352,6 @@ sourcesink_bind(struct usb_configuration *c, struct usb_function *f)
485 return id; 352 return id;
486 source_sink_intf_alt0.bInterfaceNumber = id; 353 source_sink_intf_alt0.bInterfaceNumber = id;
487 source_sink_intf_alt1.bInterfaceNumber = id; 354 source_sink_intf_alt1.bInterfaceNumber = id;
488 source_sink_intf_alt2.bInterfaceNumber = id;
489 355
490 /* allocate bulk endpoints */ 356 /* allocate bulk endpoints */
491 ss->in_ep = usb_ep_autoconfig(cdev->gadget, &fs_source_desc); 357 ss->in_ep = usb_ep_autoconfig(cdev->gadget, &fs_source_desc);
@@ -546,55 +412,14 @@ no_iso:
546 if (isoc_maxpacket > 1024) 412 if (isoc_maxpacket > 1024)
547 isoc_maxpacket = 1024; 413 isoc_maxpacket = 1024;
548 414
549 /* sanity check the interrupt module parameters */
550 if (int_interval < 1)
551 int_interval = 1;
552 if (int_interval > 4096)
553 int_interval = 4096;
554 if (int_mult > 2)
555 int_mult = 2;
556 if (int_maxburst > 15)
557 int_maxburst = 15;
558
559 /* fill in the FS interrupt descriptors from the module parameters */
560 fs_int_source_desc.wMaxPacketSize = int_maxpacket > 64 ?
561 64 : int_maxpacket;
562 fs_int_source_desc.bInterval = int_interval > 255 ?
563 255 : int_interval;
564 fs_int_sink_desc.wMaxPacketSize = int_maxpacket > 64 ?
565 64 : int_maxpacket;
566 fs_int_sink_desc.bInterval = int_interval > 255 ?
567 255 : int_interval;
568
569 /* allocate int endpoints */
570 ss->int_in_ep = usb_ep_autoconfig(cdev->gadget, &fs_int_source_desc);
571 if (!ss->int_in_ep)
572 goto no_int;
573 ss->int_in_ep->driver_data = cdev; /* claim */
574
575 ss->int_out_ep = usb_ep_autoconfig(cdev->gadget, &fs_int_sink_desc);
576 if (ss->int_out_ep) {
577 ss->int_out_ep->driver_data = cdev; /* claim */
578 } else {
579 ss->int_in_ep->driver_data = NULL;
580 ss->int_in_ep = NULL;
581no_int:
582 fs_source_sink_descs[FS_ALT_IFC_2_OFFSET] = NULL;
583 hs_source_sink_descs[HS_ALT_IFC_2_OFFSET] = NULL;
584 ss_source_sink_descs[SS_ALT_IFC_2_OFFSET] = NULL;
585 }
586
587 if (int_maxpacket > 1024)
588 int_maxpacket = 1024;
589
590 /* support high speed hardware */ 415 /* support high speed hardware */
591 hs_source_desc.bEndpointAddress = fs_source_desc.bEndpointAddress; 416 hs_source_desc.bEndpointAddress = fs_source_desc.bEndpointAddress;
592 hs_sink_desc.bEndpointAddress = fs_sink_desc.bEndpointAddress; 417 hs_sink_desc.bEndpointAddress = fs_sink_desc.bEndpointAddress;
593 418
594 /* 419 /*
595 * Fill in the HS isoc and interrupt descriptors from the module 420 * Fill in the HS isoc descriptors from the module parameters.
596 * parameters. We assume that the user knows what they are doing and 421 * We assume that the user knows what they are doing and won't
597 * won't give parameters that their UDC doesn't support. 422 * give parameters that their UDC doesn't support.
598 */ 423 */
599 hs_iso_source_desc.wMaxPacketSize = isoc_maxpacket; 424 hs_iso_source_desc.wMaxPacketSize = isoc_maxpacket;
600 hs_iso_source_desc.wMaxPacketSize |= isoc_mult << 11; 425 hs_iso_source_desc.wMaxPacketSize |= isoc_mult << 11;
@@ -607,17 +432,6 @@ no_int:
607 hs_iso_sink_desc.bInterval = isoc_interval; 432 hs_iso_sink_desc.bInterval = isoc_interval;
608 hs_iso_sink_desc.bEndpointAddress = fs_iso_sink_desc.bEndpointAddress; 433 hs_iso_sink_desc.bEndpointAddress = fs_iso_sink_desc.bEndpointAddress;
609 434
610 hs_int_source_desc.wMaxPacketSize = int_maxpacket;
611 hs_int_source_desc.wMaxPacketSize |= int_mult << 11;
612 hs_int_source_desc.bInterval = USB_MS_TO_HS_INTERVAL(int_interval);
613 hs_int_source_desc.bEndpointAddress =
614 fs_int_source_desc.bEndpointAddress;
615
616 hs_int_sink_desc.wMaxPacketSize = int_maxpacket;
617 hs_int_sink_desc.wMaxPacketSize |= int_mult << 11;
618 hs_int_sink_desc.bInterval = USB_MS_TO_HS_INTERVAL(int_interval);
619 hs_int_sink_desc.bEndpointAddress = fs_int_sink_desc.bEndpointAddress;
620
621 /* support super speed hardware */ 435 /* support super speed hardware */
622 ss_source_desc.bEndpointAddress = 436 ss_source_desc.bEndpointAddress =
623 fs_source_desc.bEndpointAddress; 437 fs_source_desc.bEndpointAddress;
@@ -625,9 +439,9 @@ no_int:
625 fs_sink_desc.bEndpointAddress; 439 fs_sink_desc.bEndpointAddress;
626 440
627 /* 441 /*
628 * Fill in the SS isoc and interrupt descriptors from the module 442 * Fill in the SS isoc descriptors from the module parameters.
629 * parameters. We assume that the user knows what they are doing and 443 * We assume that the user knows what they are doing and won't
630 * won't give parameters that their UDC doesn't support. 444 * give parameters that their UDC doesn't support.
631 */ 445 */
632 ss_iso_source_desc.wMaxPacketSize = isoc_maxpacket; 446 ss_iso_source_desc.wMaxPacketSize = isoc_maxpacket;
633 ss_iso_source_desc.bInterval = isoc_interval; 447 ss_iso_source_desc.bInterval = isoc_interval;
@@ -646,37 +460,17 @@ no_int:
646 isoc_maxpacket * (isoc_mult + 1) * (isoc_maxburst + 1); 460 isoc_maxpacket * (isoc_mult + 1) * (isoc_maxburst + 1);
647 ss_iso_sink_desc.bEndpointAddress = fs_iso_sink_desc.bEndpointAddress; 461 ss_iso_sink_desc.bEndpointAddress = fs_iso_sink_desc.bEndpointAddress;
648 462
649 ss_int_source_desc.wMaxPacketSize = int_maxpacket;
650 ss_int_source_desc.bInterval = USB_MS_TO_SS_INTERVAL(int_interval);
651 ss_int_source_comp_desc.bmAttributes = int_mult;
652 ss_int_source_comp_desc.bMaxBurst = int_maxburst;
653 ss_int_source_comp_desc.wBytesPerInterval =
654 int_maxpacket * (int_mult + 1) * (int_maxburst + 1);
655 ss_int_source_desc.bEndpointAddress =
656 fs_int_source_desc.bEndpointAddress;
657
658 ss_int_sink_desc.wMaxPacketSize = int_maxpacket;
659 ss_int_sink_desc.bInterval = USB_MS_TO_SS_INTERVAL(int_interval);
660 ss_int_sink_comp_desc.bmAttributes = int_mult;
661 ss_int_sink_comp_desc.bMaxBurst = int_maxburst;
662 ss_int_sink_comp_desc.wBytesPerInterval =
663 int_maxpacket * (int_mult + 1) * (int_maxburst + 1);
664 ss_int_sink_desc.bEndpointAddress = fs_int_sink_desc.bEndpointAddress;
665
666 ret = usb_assign_descriptors(f, fs_source_sink_descs, 463 ret = usb_assign_descriptors(f, fs_source_sink_descs,
667 hs_source_sink_descs, ss_source_sink_descs); 464 hs_source_sink_descs, ss_source_sink_descs);
668 if (ret) 465 if (ret)
669 return ret; 466 return ret;
670 467
671 DBG(cdev, "%s speed %s: IN/%s, OUT/%s, ISO-IN/%s, ISO-OUT/%s, " 468 DBG(cdev, "%s speed %s: IN/%s, OUT/%s, ISO-IN/%s, ISO-OUT/%s\n",
672 "INT-IN/%s, INT-OUT/%s\n",
673 (gadget_is_superspeed(c->cdev->gadget) ? "super" : 469 (gadget_is_superspeed(c->cdev->gadget) ? "super" :
674 (gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full")), 470 (gadget_is_dualspeed(c->cdev->gadget) ? "dual" : "full")),
675 f->name, ss->in_ep->name, ss->out_ep->name, 471 f->name, ss->in_ep->name, ss->out_ep->name,
676 ss->iso_in_ep ? ss->iso_in_ep->name : "<none>", 472 ss->iso_in_ep ? ss->iso_in_ep->name : "<none>",
677 ss->iso_out_ep ? ss->iso_out_ep->name : "<none>", 473 ss->iso_out_ep ? ss->iso_out_ep->name : "<none>");
678 ss->int_in_ep ? ss->int_in_ep->name : "<none>",
679 ss->int_out_ep ? ss->int_out_ep->name : "<none>");
680 return 0; 474 return 0;
681} 475}
682 476
@@ -807,15 +601,14 @@ static void source_sink_complete(struct usb_ep *ep, struct usb_request *req)
807} 601}
808 602
809static int source_sink_start_ep(struct f_sourcesink *ss, bool is_in, 603static int source_sink_start_ep(struct f_sourcesink *ss, bool is_in,
810 enum eptype ep_type, int speed) 604 bool is_iso, int speed)
811{ 605{
812 struct usb_ep *ep; 606 struct usb_ep *ep;
813 struct usb_request *req; 607 struct usb_request *req;
814 int i, size, status; 608 int i, size, status;
815 609
816 for (i = 0; i < 8; i++) { 610 for (i = 0; i < 8; i++) {
817 switch (ep_type) { 611 if (is_iso) {
818 case EP_ISOC:
819 switch (speed) { 612 switch (speed) {
820 case USB_SPEED_SUPER: 613 case USB_SPEED_SUPER:
821 size = isoc_maxpacket * (isoc_mult + 1) * 614 size = isoc_maxpacket * (isoc_mult + 1) *
@@ -831,28 +624,9 @@ static int source_sink_start_ep(struct f_sourcesink *ss, bool is_in,
831 } 624 }
832 ep = is_in ? ss->iso_in_ep : ss->iso_out_ep; 625 ep = is_in ? ss->iso_in_ep : ss->iso_out_ep;
833 req = ss_alloc_ep_req(ep, size); 626 req = ss_alloc_ep_req(ep, size);
834 break; 627 } else {
835 case EP_INTERRUPT:
836 switch (speed) {
837 case USB_SPEED_SUPER:
838 size = int_maxpacket * (int_mult + 1) *
839 (int_maxburst + 1);
840 break;
841 case USB_SPEED_HIGH:
842 size = int_maxpacket * (int_mult + 1);
843 break;
844 default:
845 size = int_maxpacket > 1023 ?
846 1023 : int_maxpacket;
847 break;
848 }
849 ep = is_in ? ss->int_in_ep : ss->int_out_ep;
850 req = ss_alloc_ep_req(ep, size);
851 break;
852 default:
853 ep = is_in ? ss->in_ep : ss->out_ep; 628 ep = is_in ? ss->in_ep : ss->out_ep;
854 req = ss_alloc_ep_req(ep, 0); 629 req = ss_alloc_ep_req(ep, 0);
855 break;
856 } 630 }
857 631
858 if (!req) 632 if (!req)
@@ -870,12 +644,12 @@ static int source_sink_start_ep(struct f_sourcesink *ss, bool is_in,
870 644
871 cdev = ss->function.config->cdev; 645 cdev = ss->function.config->cdev;
872 ERROR(cdev, "start %s%s %s --> %d\n", 646 ERROR(cdev, "start %s%s %s --> %d\n",
873 get_ep_string(ep_type), is_in ? "IN" : "OUT", 647 is_iso ? "ISO-" : "", is_in ? "IN" : "OUT",
874 ep->name, status); 648 ep->name, status);
875 free_ep_req(ep, req); 649 free_ep_req(ep, req);
876 } 650 }
877 651
878 if (!(ep_type == EP_ISOC)) 652 if (!is_iso)
879 break; 653 break;
880 } 654 }
881 655
@@ -888,7 +662,7 @@ static void disable_source_sink(struct f_sourcesink *ss)
888 662
889 cdev = ss->function.config->cdev; 663 cdev = ss->function.config->cdev;
890 disable_endpoints(cdev, ss->in_ep, ss->out_ep, ss->iso_in_ep, 664 disable_endpoints(cdev, ss->in_ep, ss->out_ep, ss->iso_in_ep,
891 ss->iso_out_ep, ss->int_in_ep, ss->int_out_ep); 665 ss->iso_out_ep);
892 VDBG(cdev, "%s disabled\n", ss->function.name); 666 VDBG(cdev, "%s disabled\n", ss->function.name);
893} 667}
894 668
@@ -900,62 +674,6 @@ enable_source_sink(struct usb_composite_dev *cdev, struct f_sourcesink *ss,
900 int speed = cdev->gadget->speed; 674 int speed = cdev->gadget->speed;
901 struct usb_ep *ep; 675 struct usb_ep *ep;
902 676
903 if (alt == 2) {
904 /* Configure for periodic interrupt endpoint */
905 ep = ss->int_in_ep;
906 if (ep) {
907 result = config_ep_by_speed(cdev->gadget,
908 &(ss->function), ep);
909 if (result)
910 return result;
911
912 result = usb_ep_enable(ep);
913 if (result < 0)
914 return result;
915
916 ep->driver_data = ss;
917 result = source_sink_start_ep(ss, true, EP_INTERRUPT,
918 speed);
919 if (result < 0) {
920fail1:
921 ep = ss->int_in_ep;
922 if (ep) {
923 usb_ep_disable(ep);
924 ep->driver_data = NULL;
925 }
926 return result;
927 }
928 }
929
930 /*
931 * one interrupt endpoint reads (sinks) anything OUT (from the
932 * host)
933 */
934 ep = ss->int_out_ep;
935 if (ep) {
936 result = config_ep_by_speed(cdev->gadget,
937 &(ss->function), ep);
938 if (result)
939 goto fail1;
940
941 result = usb_ep_enable(ep);
942 if (result < 0)
943 goto fail1;
944
945 ep->driver_data = ss;
946 result = source_sink_start_ep(ss, false, EP_INTERRUPT,
947 speed);
948 if (result < 0) {
949 ep = ss->int_out_ep;
950 usb_ep_disable(ep);
951 ep->driver_data = NULL;
952 goto fail1;
953 }
954 }
955
956 goto out;
957 }
958
959 /* one bulk endpoint writes (sources) zeroes IN (to the host) */ 677 /* one bulk endpoint writes (sources) zeroes IN (to the host) */
960 ep = ss->in_ep; 678 ep = ss->in_ep;
961 result = config_ep_by_speed(cdev->gadget, &(ss->function), ep); 679 result = config_ep_by_speed(cdev->gadget, &(ss->function), ep);
@@ -966,7 +684,7 @@ fail1:
966 return result; 684 return result;
967 ep->driver_data = ss; 685 ep->driver_data = ss;
968 686
969 result = source_sink_start_ep(ss, true, EP_BULK, speed); 687 result = source_sink_start_ep(ss, true, false, speed);
970 if (result < 0) { 688 if (result < 0) {
971fail: 689fail:
972 ep = ss->in_ep; 690 ep = ss->in_ep;
@@ -985,7 +703,7 @@ fail:
985 goto fail; 703 goto fail;
986 ep->driver_data = ss; 704 ep->driver_data = ss;
987 705
988 result = source_sink_start_ep(ss, false, EP_BULK, speed); 706 result = source_sink_start_ep(ss, false, false, speed);
989 if (result < 0) { 707 if (result < 0) {
990fail2: 708fail2:
991 ep = ss->out_ep; 709 ep = ss->out_ep;
@@ -1008,7 +726,7 @@ fail2:
1008 goto fail2; 726 goto fail2;
1009 ep->driver_data = ss; 727 ep->driver_data = ss;
1010 728
1011 result = source_sink_start_ep(ss, true, EP_ISOC, speed); 729 result = source_sink_start_ep(ss, true, true, speed);
1012 if (result < 0) { 730 if (result < 0) {
1013fail3: 731fail3:
1014 ep = ss->iso_in_ep; 732 ep = ss->iso_in_ep;
@@ -1031,14 +749,13 @@ fail3:
1031 goto fail3; 749 goto fail3;
1032 ep->driver_data = ss; 750 ep->driver_data = ss;
1033 751
1034 result = source_sink_start_ep(ss, false, EP_ISOC, speed); 752 result = source_sink_start_ep(ss, false, true, speed);
1035 if (result < 0) { 753 if (result < 0) {
1036 usb_ep_disable(ep); 754 usb_ep_disable(ep);
1037 ep->driver_data = NULL; 755 ep->driver_data = NULL;
1038 goto fail3; 756 goto fail3;
1039 } 757 }
1040 } 758 }
1041
1042out: 759out:
1043 ss->cur_alt = alt; 760 ss->cur_alt = alt;
1044 761
@@ -1054,8 +771,6 @@ static int sourcesink_set_alt(struct usb_function *f,
1054 771
1055 if (ss->in_ep->driver_data) 772 if (ss->in_ep->driver_data)
1056 disable_source_sink(ss); 773 disable_source_sink(ss);
1057 else if (alt == 2 && ss->int_in_ep->driver_data)
1058 disable_source_sink(ss);
1059 return enable_source_sink(cdev, ss, alt); 774 return enable_source_sink(cdev, ss, alt);
1060} 775}
1061 776
@@ -1168,10 +883,6 @@ static struct usb_function *source_sink_alloc_func(
1168 isoc_maxpacket = ss_opts->isoc_maxpacket; 883 isoc_maxpacket = ss_opts->isoc_maxpacket;
1169 isoc_mult = ss_opts->isoc_mult; 884 isoc_mult = ss_opts->isoc_mult;
1170 isoc_maxburst = ss_opts->isoc_maxburst; 885 isoc_maxburst = ss_opts->isoc_maxburst;
1171 int_interval = ss_opts->int_interval;
1172 int_maxpacket = ss_opts->int_maxpacket;
1173 int_mult = ss_opts->int_mult;
1174 int_maxburst = ss_opts->int_maxburst;
1175 buflen = ss_opts->bulk_buflen; 886 buflen = ss_opts->bulk_buflen;
1176 887
1177 ss->function.name = "source/sink"; 888 ss->function.name = "source/sink";
@@ -1468,182 +1179,6 @@ static struct f_ss_opts_attribute f_ss_opts_bulk_buflen =
1468 f_ss_opts_bulk_buflen_show, 1179 f_ss_opts_bulk_buflen_show,
1469 f_ss_opts_bulk_buflen_store); 1180 f_ss_opts_bulk_buflen_store);
1470 1181
1471static ssize_t f_ss_opts_int_interval_show(struct f_ss_opts *opts, char *page)
1472{
1473 int result;
1474
1475 mutex_lock(&opts->lock);
1476 result = sprintf(page, "%u", opts->int_interval);
1477 mutex_unlock(&opts->lock);
1478
1479 return result;
1480}
1481
1482static ssize_t f_ss_opts_int_interval_store(struct f_ss_opts *opts,
1483 const char *page, size_t len)
1484{
1485 int ret;
1486 u32 num;
1487
1488 mutex_lock(&opts->lock);
1489 if (opts->refcnt) {
1490 ret = -EBUSY;
1491 goto end;
1492 }
1493
1494 ret = kstrtou32(page, 0, &num);
1495 if (ret)
1496 goto end;
1497
1498 if (num > 4096) {
1499 ret = -EINVAL;
1500 goto end;
1501 }
1502
1503 opts->int_interval = num;
1504 ret = len;
1505end:
1506 mutex_unlock(&opts->lock);
1507 return ret;
1508}
1509
1510static struct f_ss_opts_attribute f_ss_opts_int_interval =
1511 __CONFIGFS_ATTR(int_interval, S_IRUGO | S_IWUSR,
1512 f_ss_opts_int_interval_show,
1513 f_ss_opts_int_interval_store);
1514
1515static ssize_t f_ss_opts_int_maxpacket_show(struct f_ss_opts *opts, char *page)
1516{
1517 int result;
1518
1519 mutex_lock(&opts->lock);
1520 result = sprintf(page, "%u", opts->int_maxpacket);
1521 mutex_unlock(&opts->lock);
1522
1523 return result;
1524}
1525
1526static ssize_t f_ss_opts_int_maxpacket_store(struct f_ss_opts *opts,
1527 const char *page, size_t len)
1528{
1529 int ret;
1530 u16 num;
1531
1532 mutex_lock(&opts->lock);
1533 if (opts->refcnt) {
1534 ret = -EBUSY;
1535 goto end;
1536 }
1537
1538 ret = kstrtou16(page, 0, &num);
1539 if (ret)
1540 goto end;
1541
1542 if (num > 1024) {
1543 ret = -EINVAL;
1544 goto end;
1545 }
1546
1547 opts->int_maxpacket = num;
1548 ret = len;
1549end:
1550 mutex_unlock(&opts->lock);
1551 return ret;
1552}
1553
1554static struct f_ss_opts_attribute f_ss_opts_int_maxpacket =
1555 __CONFIGFS_ATTR(int_maxpacket, S_IRUGO | S_IWUSR,
1556 f_ss_opts_int_maxpacket_show,
1557 f_ss_opts_int_maxpacket_store);
1558
1559static ssize_t f_ss_opts_int_mult_show(struct f_ss_opts *opts, char *page)
1560{
1561 int result;
1562
1563 mutex_lock(&opts->lock);
1564 result = sprintf(page, "%u", opts->int_mult);
1565 mutex_unlock(&opts->lock);
1566
1567 return result;
1568}
1569
1570static ssize_t f_ss_opts_int_mult_store(struct f_ss_opts *opts,
1571 const char *page, size_t len)
1572{
1573 int ret;
1574 u8 num;
1575
1576 mutex_lock(&opts->lock);
1577 if (opts->refcnt) {
1578 ret = -EBUSY;
1579 goto end;
1580 }
1581
1582 ret = kstrtou8(page, 0, &num);
1583 if (ret)
1584 goto end;
1585
1586 if (num > 2) {
1587 ret = -EINVAL;
1588 goto end;
1589 }
1590
1591 opts->int_mult = num;
1592 ret = len;
1593end:
1594 mutex_unlock(&opts->lock);
1595 return ret;
1596}
1597
1598static struct f_ss_opts_attribute f_ss_opts_int_mult =
1599 __CONFIGFS_ATTR(int_mult, S_IRUGO | S_IWUSR,
1600 f_ss_opts_int_mult_show,
1601 f_ss_opts_int_mult_store);
1602
1603static ssize_t f_ss_opts_int_maxburst_show(struct f_ss_opts *opts, char *page)
1604{
1605 int result;
1606
1607 mutex_lock(&opts->lock);
1608 result = sprintf(page, "%u", opts->int_maxburst);
1609 mutex_unlock(&opts->lock);
1610
1611 return result;
1612}
1613
1614static ssize_t f_ss_opts_int_maxburst_store(struct f_ss_opts *opts,
1615 const char *page, size_t len)
1616{
1617 int ret;
1618 u8 num;
1619
1620 mutex_lock(&opts->lock);
1621 if (opts->refcnt) {
1622 ret = -EBUSY;
1623 goto end;
1624 }
1625
1626 ret = kstrtou8(page, 0, &num);
1627 if (ret)
1628 goto end;
1629
1630 if (num > 15) {
1631 ret = -EINVAL;
1632 goto end;
1633 }
1634
1635 opts->int_maxburst = num;
1636 ret = len;
1637end:
1638 mutex_unlock(&opts->lock);
1639 return ret;
1640}
1641
1642static struct f_ss_opts_attribute f_ss_opts_int_maxburst =
1643 __CONFIGFS_ATTR(int_maxburst, S_IRUGO | S_IWUSR,
1644 f_ss_opts_int_maxburst_show,
1645 f_ss_opts_int_maxburst_store);
1646
1647static struct configfs_attribute *ss_attrs[] = { 1182static struct configfs_attribute *ss_attrs[] = {
1648 &f_ss_opts_pattern.attr, 1183 &f_ss_opts_pattern.attr,
1649 &f_ss_opts_isoc_interval.attr, 1184 &f_ss_opts_isoc_interval.attr,
@@ -1651,10 +1186,6 @@ static struct configfs_attribute *ss_attrs[] = {
1651 &f_ss_opts_isoc_mult.attr, 1186 &f_ss_opts_isoc_mult.attr,
1652 &f_ss_opts_isoc_maxburst.attr, 1187 &f_ss_opts_isoc_maxburst.attr,
1653 &f_ss_opts_bulk_buflen.attr, 1188 &f_ss_opts_bulk_buflen.attr,
1654 &f_ss_opts_int_interval.attr,
1655 &f_ss_opts_int_maxpacket.attr,
1656 &f_ss_opts_int_mult.attr,
1657 &f_ss_opts_int_maxburst.attr,
1658 NULL, 1189 NULL,
1659}; 1190};
1660 1191
@@ -1684,8 +1215,6 @@ static struct usb_function_instance *source_sink_alloc_inst(void)
1684 ss_opts->isoc_interval = GZERO_ISOC_INTERVAL; 1215 ss_opts->isoc_interval = GZERO_ISOC_INTERVAL;
1685 ss_opts->isoc_maxpacket = GZERO_ISOC_MAXPACKET; 1216 ss_opts->isoc_maxpacket = GZERO_ISOC_MAXPACKET;
1686 ss_opts->bulk_buflen = GZERO_BULK_BUFLEN; 1217 ss_opts->bulk_buflen = GZERO_BULK_BUFLEN;
1687 ss_opts->int_interval = GZERO_INT_INTERVAL;
1688 ss_opts->int_maxpacket = GZERO_INT_MAXPACKET;
1689 1218
1690 config_group_init_type_name(&ss_opts->func_inst.group, "", 1219 config_group_init_type_name(&ss_opts->func_inst.group, "",
1691 &ss_func_type); 1220 &ss_func_type);
diff --git a/drivers/usb/gadget/function/f_uac2.c b/drivers/usb/gadget/function/f_uac2.c
index 33e16658e5cf..6d3eb8b00a48 100644
--- a/drivers/usb/gadget/function/f_uac2.c
+++ b/drivers/usb/gadget/function/f_uac2.c
@@ -54,7 +54,7 @@
54#define UNFLW_CTRL 8 54#define UNFLW_CTRL 8
55#define OVFLW_CTRL 10 55#define OVFLW_CTRL 10
56 56
57const char *uac2_name = "snd_uac2"; 57static const char *uac2_name = "snd_uac2";
58 58
59struct uac2_req { 59struct uac2_req {
60 struct uac2_rtd_params *pp; /* parent param */ 60 struct uac2_rtd_params *pp; /* parent param */
@@ -634,7 +634,7 @@ static struct usb_interface_descriptor std_ac_if_desc = {
634}; 634};
635 635
636/* Clock source for IN traffic */ 636/* Clock source for IN traffic */
637struct uac_clock_source_descriptor in_clk_src_desc = { 637static struct uac_clock_source_descriptor in_clk_src_desc = {
638 .bLength = sizeof in_clk_src_desc, 638 .bLength = sizeof in_clk_src_desc,
639 .bDescriptorType = USB_DT_CS_INTERFACE, 639 .bDescriptorType = USB_DT_CS_INTERFACE,
640 640
@@ -646,7 +646,7 @@ struct uac_clock_source_descriptor in_clk_src_desc = {
646}; 646};
647 647
648/* Clock source for OUT traffic */ 648/* Clock source for OUT traffic */
649struct uac_clock_source_descriptor out_clk_src_desc = { 649static struct uac_clock_source_descriptor out_clk_src_desc = {
650 .bLength = sizeof out_clk_src_desc, 650 .bLength = sizeof out_clk_src_desc,
651 .bDescriptorType = USB_DT_CS_INTERFACE, 651 .bDescriptorType = USB_DT_CS_INTERFACE,
652 652
@@ -658,7 +658,7 @@ struct uac_clock_source_descriptor out_clk_src_desc = {
658}; 658};
659 659
660/* Input Terminal for USB_OUT */ 660/* Input Terminal for USB_OUT */
661struct uac2_input_terminal_descriptor usb_out_it_desc = { 661static struct uac2_input_terminal_descriptor usb_out_it_desc = {
662 .bLength = sizeof usb_out_it_desc, 662 .bLength = sizeof usb_out_it_desc,
663 .bDescriptorType = USB_DT_CS_INTERFACE, 663 .bDescriptorType = USB_DT_CS_INTERFACE,
664 664
@@ -672,7 +672,7 @@ struct uac2_input_terminal_descriptor usb_out_it_desc = {
672}; 672};
673 673
674/* Input Terminal for I/O-In */ 674/* Input Terminal for I/O-In */
675struct uac2_input_terminal_descriptor io_in_it_desc = { 675static struct uac2_input_terminal_descriptor io_in_it_desc = {
676 .bLength = sizeof io_in_it_desc, 676 .bLength = sizeof io_in_it_desc,
677 .bDescriptorType = USB_DT_CS_INTERFACE, 677 .bDescriptorType = USB_DT_CS_INTERFACE,
678 678
@@ -686,7 +686,7 @@ struct uac2_input_terminal_descriptor io_in_it_desc = {
686}; 686};
687 687
688/* Ouput Terminal for USB_IN */ 688/* Ouput Terminal for USB_IN */
689struct uac2_output_terminal_descriptor usb_in_ot_desc = { 689static struct uac2_output_terminal_descriptor usb_in_ot_desc = {
690 .bLength = sizeof usb_in_ot_desc, 690 .bLength = sizeof usb_in_ot_desc,
691 .bDescriptorType = USB_DT_CS_INTERFACE, 691 .bDescriptorType = USB_DT_CS_INTERFACE,
692 692
@@ -700,7 +700,7 @@ struct uac2_output_terminal_descriptor usb_in_ot_desc = {
700}; 700};
701 701
702/* Ouput Terminal for I/O-Out */ 702/* Ouput Terminal for I/O-Out */
703struct uac2_output_terminal_descriptor io_out_ot_desc = { 703static struct uac2_output_terminal_descriptor io_out_ot_desc = {
704 .bLength = sizeof io_out_ot_desc, 704 .bLength = sizeof io_out_ot_desc,
705 .bDescriptorType = USB_DT_CS_INTERFACE, 705 .bDescriptorType = USB_DT_CS_INTERFACE,
706 706
@@ -713,7 +713,7 @@ struct uac2_output_terminal_descriptor io_out_ot_desc = {
713 .bmControls = (CONTROL_RDWR << COPY_CTRL), 713 .bmControls = (CONTROL_RDWR << COPY_CTRL),
714}; 714};
715 715
716struct uac2_ac_header_descriptor ac_hdr_desc = { 716static struct uac2_ac_header_descriptor ac_hdr_desc = {
717 .bLength = sizeof ac_hdr_desc, 717 .bLength = sizeof ac_hdr_desc,
718 .bDescriptorType = USB_DT_CS_INTERFACE, 718 .bDescriptorType = USB_DT_CS_INTERFACE,
719 719
@@ -751,7 +751,7 @@ static struct usb_interface_descriptor std_as_out_if1_desc = {
751}; 751};
752 752
753/* Audio Stream OUT Intface Desc */ 753/* Audio Stream OUT Intface Desc */
754struct uac2_as_header_descriptor as_out_hdr_desc = { 754static struct uac2_as_header_descriptor as_out_hdr_desc = {
755 .bLength = sizeof as_out_hdr_desc, 755 .bLength = sizeof as_out_hdr_desc,
756 .bDescriptorType = USB_DT_CS_INTERFACE, 756 .bDescriptorType = USB_DT_CS_INTERFACE,
757 757
@@ -764,7 +764,7 @@ struct uac2_as_header_descriptor as_out_hdr_desc = {
764}; 764};
765 765
766/* Audio USB_OUT Format */ 766/* Audio USB_OUT Format */
767struct uac2_format_type_i_descriptor as_out_fmt1_desc = { 767static struct uac2_format_type_i_descriptor as_out_fmt1_desc = {
768 .bLength = sizeof as_out_fmt1_desc, 768 .bLength = sizeof as_out_fmt1_desc,
769 .bDescriptorType = USB_DT_CS_INTERFACE, 769 .bDescriptorType = USB_DT_CS_INTERFACE,
770 .bDescriptorSubtype = UAC_FORMAT_TYPE, 770 .bDescriptorSubtype = UAC_FORMAT_TYPE,
@@ -772,7 +772,7 @@ struct uac2_format_type_i_descriptor as_out_fmt1_desc = {
772}; 772};
773 773
774/* STD AS ISO OUT Endpoint */ 774/* STD AS ISO OUT Endpoint */
775struct usb_endpoint_descriptor fs_epout_desc = { 775static struct usb_endpoint_descriptor fs_epout_desc = {
776 .bLength = USB_DT_ENDPOINT_SIZE, 776 .bLength = USB_DT_ENDPOINT_SIZE,
777 .bDescriptorType = USB_DT_ENDPOINT, 777 .bDescriptorType = USB_DT_ENDPOINT,
778 778
@@ -782,7 +782,7 @@ struct usb_endpoint_descriptor fs_epout_desc = {
782 .bInterval = 1, 782 .bInterval = 1,
783}; 783};
784 784
785struct usb_endpoint_descriptor hs_epout_desc = { 785static struct usb_endpoint_descriptor hs_epout_desc = {
786 .bLength = USB_DT_ENDPOINT_SIZE, 786 .bLength = USB_DT_ENDPOINT_SIZE,
787 .bDescriptorType = USB_DT_ENDPOINT, 787 .bDescriptorType = USB_DT_ENDPOINT,
788 788
@@ -828,7 +828,7 @@ static struct usb_interface_descriptor std_as_in_if1_desc = {
828}; 828};
829 829
830/* Audio Stream IN Intface Desc */ 830/* Audio Stream IN Intface Desc */
831struct uac2_as_header_descriptor as_in_hdr_desc = { 831static struct uac2_as_header_descriptor as_in_hdr_desc = {
832 .bLength = sizeof as_in_hdr_desc, 832 .bLength = sizeof as_in_hdr_desc,
833 .bDescriptorType = USB_DT_CS_INTERFACE, 833 .bDescriptorType = USB_DT_CS_INTERFACE,
834 834
@@ -841,7 +841,7 @@ struct uac2_as_header_descriptor as_in_hdr_desc = {
841}; 841};
842 842
843/* Audio USB_IN Format */ 843/* Audio USB_IN Format */
844struct uac2_format_type_i_descriptor as_in_fmt1_desc = { 844static struct uac2_format_type_i_descriptor as_in_fmt1_desc = {
845 .bLength = sizeof as_in_fmt1_desc, 845 .bLength = sizeof as_in_fmt1_desc,
846 .bDescriptorType = USB_DT_CS_INTERFACE, 846 .bDescriptorType = USB_DT_CS_INTERFACE,
847 .bDescriptorSubtype = UAC_FORMAT_TYPE, 847 .bDescriptorSubtype = UAC_FORMAT_TYPE,
@@ -849,7 +849,7 @@ struct uac2_format_type_i_descriptor as_in_fmt1_desc = {
849}; 849};
850 850
851/* STD AS ISO IN Endpoint */ 851/* STD AS ISO IN Endpoint */
852struct usb_endpoint_descriptor fs_epin_desc = { 852static struct usb_endpoint_descriptor fs_epin_desc = {
853 .bLength = USB_DT_ENDPOINT_SIZE, 853 .bLength = USB_DT_ENDPOINT_SIZE,
854 .bDescriptorType = USB_DT_ENDPOINT, 854 .bDescriptorType = USB_DT_ENDPOINT,
855 855
@@ -859,7 +859,7 @@ struct usb_endpoint_descriptor fs_epin_desc = {
859 .bInterval = 1, 859 .bInterval = 1,
860}; 860};
861 861
862struct usb_endpoint_descriptor hs_epin_desc = { 862static struct usb_endpoint_descriptor hs_epin_desc = {
863 .bLength = USB_DT_ENDPOINT_SIZE, 863 .bLength = USB_DT_ENDPOINT_SIZE,
864 .bDescriptorType = USB_DT_ENDPOINT, 864 .bDescriptorType = USB_DT_ENDPOINT,
865 865
@@ -1563,7 +1563,7 @@ static void afunc_unbind(struct usb_configuration *c, struct usb_function *f)
1563 agdev->out_ep->driver_data = NULL; 1563 agdev->out_ep->driver_data = NULL;
1564} 1564}
1565 1565
1566struct usb_function *afunc_alloc(struct usb_function_instance *fi) 1566static struct usb_function *afunc_alloc(struct usb_function_instance *fi)
1567{ 1567{
1568 struct audio_dev *agdev; 1568 struct audio_dev *agdev;
1569 struct f_uac2_opts *opts; 1569 struct f_uac2_opts *opts;
diff --git a/drivers/usb/gadget/function/g_zero.h b/drivers/usb/gadget/function/g_zero.h
index 2ce28b9d97cc..15f180904f8a 100644
--- a/drivers/usb/gadget/function/g_zero.h
+++ b/drivers/usb/gadget/function/g_zero.h
@@ -10,8 +10,6 @@
10#define GZERO_QLEN 32 10#define GZERO_QLEN 32
11#define GZERO_ISOC_INTERVAL 4 11#define GZERO_ISOC_INTERVAL 4
12#define GZERO_ISOC_MAXPACKET 1024 12#define GZERO_ISOC_MAXPACKET 1024
13#define GZERO_INT_INTERVAL 1 /* Default interrupt interval = 1 ms */
14#define GZERO_INT_MAXPACKET 1024
15 13
16struct usb_zero_options { 14struct usb_zero_options {
17 unsigned pattern; 15 unsigned pattern;
@@ -19,10 +17,6 @@ struct usb_zero_options {
19 unsigned isoc_maxpacket; 17 unsigned isoc_maxpacket;
20 unsigned isoc_mult; 18 unsigned isoc_mult;
21 unsigned isoc_maxburst; 19 unsigned isoc_maxburst;
22 unsigned int_interval; /* In ms */
23 unsigned int_maxpacket;
24 unsigned int_mult;
25 unsigned int_maxburst;
26 unsigned bulk_buflen; 20 unsigned bulk_buflen;
27 unsigned qlen; 21 unsigned qlen;
28}; 22};
@@ -34,10 +28,6 @@ struct f_ss_opts {
34 unsigned isoc_maxpacket; 28 unsigned isoc_maxpacket;
35 unsigned isoc_mult; 29 unsigned isoc_mult;
36 unsigned isoc_maxburst; 30 unsigned isoc_maxburst;
37 unsigned int_interval; /* In ms */
38 unsigned int_maxpacket;
39 unsigned int_mult;
40 unsigned int_maxburst;
41 unsigned bulk_buflen; 31 unsigned bulk_buflen;
42 32
43 /* 33 /*
@@ -72,7 +62,6 @@ int lb_modinit(void);
72void free_ep_req(struct usb_ep *ep, struct usb_request *req); 62void free_ep_req(struct usb_ep *ep, struct usb_request *req);
73void disable_endpoints(struct usb_composite_dev *cdev, 63void disable_endpoints(struct usb_composite_dev *cdev,
74 struct usb_ep *in, struct usb_ep *out, 64 struct usb_ep *in, struct usb_ep *out,
75 struct usb_ep *iso_in, struct usb_ep *iso_out, 65 struct usb_ep *iso_in, struct usb_ep *iso_out);
76 struct usb_ep *int_in, struct usb_ep *int_out);
77 66
78#endif /* __G_ZERO_H */ 67#endif /* __G_ZERO_H */
diff --git a/drivers/usb/gadget/function/uvc_v4l2.c b/drivers/usb/gadget/function/uvc_v4l2.c
index 5aad7fededa5..8b818fd027b3 100644
--- a/drivers/usb/gadget/function/uvc_v4l2.c
+++ b/drivers/usb/gadget/function/uvc_v4l2.c
@@ -27,6 +27,7 @@
27#include "uvc.h" 27#include "uvc.h"
28#include "uvc_queue.h" 28#include "uvc_queue.h"
29#include "uvc_video.h" 29#include "uvc_video.h"
30#include "uvc_v4l2.h"
30 31
31/* -------------------------------------------------------------------------- 32/* --------------------------------------------------------------------------
32 * Requests handling 33 * Requests handling
diff --git a/drivers/usb/gadget/function/uvc_video.c b/drivers/usb/gadget/function/uvc_video.c
index 9cb86bc1a9a5..50a5e637ca35 100644
--- a/drivers/usb/gadget/function/uvc_video.c
+++ b/drivers/usb/gadget/function/uvc_video.c
@@ -21,6 +21,7 @@
21 21
22#include "uvc.h" 22#include "uvc.h"
23#include "uvc_queue.h" 23#include "uvc_queue.h"
24#include "uvc_video.h"
24 25
25/* -------------------------------------------------------------------------- 26/* --------------------------------------------------------------------------
26 * Video codecs 27 * Video codecs
diff --git a/drivers/usb/gadget/legacy/g_ffs.c b/drivers/usb/gadget/legacy/g_ffs.c
index 06acfa55864a..b01b88e1b716 100644
--- a/drivers/usb/gadget/legacy/g_ffs.c
+++ b/drivers/usb/gadget/legacy/g_ffs.c
@@ -133,7 +133,9 @@ struct gfs_configuration {
133 struct usb_configuration c; 133 struct usb_configuration c;
134 int (*eth)(struct usb_configuration *c); 134 int (*eth)(struct usb_configuration *c);
135 int num; 135 int num;
136} gfs_configurations[] = { 136};
137
138static struct gfs_configuration gfs_configurations[] = {
137#ifdef CONFIG_USB_FUNCTIONFS_RNDIS 139#ifdef CONFIG_USB_FUNCTIONFS_RNDIS
138 { 140 {
139 .eth = bind_rndis_config, 141 .eth = bind_rndis_config,
@@ -278,7 +280,7 @@ static void *functionfs_acquire_dev(struct ffs_dev *dev)
278 if (!try_module_get(THIS_MODULE)) 280 if (!try_module_get(THIS_MODULE))
279 return ERR_PTR(-ENOENT); 281 return ERR_PTR(-ENOENT);
280 282
281 return 0; 283 return NULL;
282} 284}
283 285
284static void functionfs_release_dev(struct ffs_dev *dev) 286static void functionfs_release_dev(struct ffs_dev *dev)
diff --git a/drivers/usb/gadget/legacy/inode.c b/drivers/usb/gadget/legacy/inode.c
index db49ec4c748e..200f9a584064 100644
--- a/drivers/usb/gadget/legacy/inode.c
+++ b/drivers/usb/gadget/legacy/inode.c
@@ -74,6 +74,8 @@ MODULE_DESCRIPTION (DRIVER_DESC);
74MODULE_AUTHOR ("David Brownell"); 74MODULE_AUTHOR ("David Brownell");
75MODULE_LICENSE ("GPL"); 75MODULE_LICENSE ("GPL");
76 76
77static int ep_open(struct inode *, struct file *);
78
77 79
78/*----------------------------------------------------------------------*/ 80/*----------------------------------------------------------------------*/
79 81
@@ -283,14 +285,15 @@ static void epio_complete (struct usb_ep *ep, struct usb_request *req)
283 * still need dev->lock to use epdata->ep. 285 * still need dev->lock to use epdata->ep.
284 */ 286 */
285static int 287static int
286get_ready_ep (unsigned f_flags, struct ep_data *epdata) 288get_ready_ep (unsigned f_flags, struct ep_data *epdata, bool is_write)
287{ 289{
288 int val; 290 int val;
289 291
290 if (f_flags & O_NONBLOCK) { 292 if (f_flags & O_NONBLOCK) {
291 if (!mutex_trylock(&epdata->lock)) 293 if (!mutex_trylock(&epdata->lock))
292 goto nonblock; 294 goto nonblock;
293 if (epdata->state != STATE_EP_ENABLED) { 295 if (epdata->state != STATE_EP_ENABLED &&
296 (!is_write || epdata->state != STATE_EP_READY)) {
294 mutex_unlock(&epdata->lock); 297 mutex_unlock(&epdata->lock);
295nonblock: 298nonblock:
296 val = -EAGAIN; 299 val = -EAGAIN;
@@ -305,18 +308,20 @@ nonblock:
305 308
306 switch (epdata->state) { 309 switch (epdata->state) {
307 case STATE_EP_ENABLED: 310 case STATE_EP_ENABLED:
311 return 0;
312 case STATE_EP_READY: /* not configured yet */
313 if (is_write)
314 return 0;
315 // FALLTHRU
316 case STATE_EP_UNBOUND: /* clean disconnect */
308 break; 317 break;
309 // case STATE_EP_DISABLED: /* "can't happen" */ 318 // case STATE_EP_DISABLED: /* "can't happen" */
310 // case STATE_EP_READY: /* "can't happen" */
311 default: /* error! */ 319 default: /* error! */
312 pr_debug ("%s: ep %p not available, state %d\n", 320 pr_debug ("%s: ep %p not available, state %d\n",
313 shortname, epdata, epdata->state); 321 shortname, epdata, epdata->state);
314 // FALLTHROUGH
315 case STATE_EP_UNBOUND: /* clean disconnect */
316 val = -ENODEV;
317 mutex_unlock(&epdata->lock);
318 } 322 }
319 return val; 323 mutex_unlock(&epdata->lock);
324 return -ENODEV;
320} 325}
321 326
322static ssize_t 327static ssize_t
@@ -363,97 +368,6 @@ ep_io (struct ep_data *epdata, void *buf, unsigned len)
363 return value; 368 return value;
364} 369}
365 370
366
367/* handle a synchronous OUT bulk/intr/iso transfer */
368static ssize_t
369ep_read (struct file *fd, char __user *buf, size_t len, loff_t *ptr)
370{
371 struct ep_data *data = fd->private_data;
372 void *kbuf;
373 ssize_t value;
374
375 if ((value = get_ready_ep (fd->f_flags, data)) < 0)
376 return value;
377
378 /* halt any endpoint by doing a "wrong direction" i/o call */
379 if (usb_endpoint_dir_in(&data->desc)) {
380 if (usb_endpoint_xfer_isoc(&data->desc)) {
381 mutex_unlock(&data->lock);
382 return -EINVAL;
383 }
384 DBG (data->dev, "%s halt\n", data->name);
385 spin_lock_irq (&data->dev->lock);
386 if (likely (data->ep != NULL))
387 usb_ep_set_halt (data->ep);
388 spin_unlock_irq (&data->dev->lock);
389 mutex_unlock(&data->lock);
390 return -EBADMSG;
391 }
392
393 /* FIXME readahead for O_NONBLOCK and poll(); careful with ZLPs */
394
395 value = -ENOMEM;
396 kbuf = kmalloc (len, GFP_KERNEL);
397 if (unlikely (!kbuf))
398 goto free1;
399
400 value = ep_io (data, kbuf, len);
401 VDEBUG (data->dev, "%s read %zu OUT, status %d\n",
402 data->name, len, (int) value);
403 if (value >= 0 && copy_to_user (buf, kbuf, value))
404 value = -EFAULT;
405
406free1:
407 mutex_unlock(&data->lock);
408 kfree (kbuf);
409 return value;
410}
411
412/* handle a synchronous IN bulk/intr/iso transfer */
413static ssize_t
414ep_write (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
415{
416 struct ep_data *data = fd->private_data;
417 void *kbuf;
418 ssize_t value;
419
420 if ((value = get_ready_ep (fd->f_flags, data)) < 0)
421 return value;
422
423 /* halt any endpoint by doing a "wrong direction" i/o call */
424 if (!usb_endpoint_dir_in(&data->desc)) {
425 if (usb_endpoint_xfer_isoc(&data->desc)) {
426 mutex_unlock(&data->lock);
427 return -EINVAL;
428 }
429 DBG (data->dev, "%s halt\n", data->name);
430 spin_lock_irq (&data->dev->lock);
431 if (likely (data->ep != NULL))
432 usb_ep_set_halt (data->ep);
433 spin_unlock_irq (&data->dev->lock);
434 mutex_unlock(&data->lock);
435 return -EBADMSG;
436 }
437
438 /* FIXME writebehind for O_NONBLOCK and poll(), qlen = 1 */
439
440 value = -ENOMEM;
441 kbuf = memdup_user(buf, len);
442 if (IS_ERR(kbuf)) {
443 value = PTR_ERR(kbuf);
444 kbuf = NULL;
445 goto free1;
446 }
447
448 value = ep_io (data, kbuf, len);
449 VDEBUG (data->dev, "%s write %zu IN, status %d\n",
450 data->name, len, (int) value);
451free1:
452 mutex_unlock(&data->lock);
453 kfree (kbuf);
454 return value;
455}
456
457static int 371static int
458ep_release (struct inode *inode, struct file *fd) 372ep_release (struct inode *inode, struct file *fd)
459{ 373{
@@ -481,7 +395,7 @@ static long ep_ioctl(struct file *fd, unsigned code, unsigned long value)
481 struct ep_data *data = fd->private_data; 395 struct ep_data *data = fd->private_data;
482 int status; 396 int status;
483 397
484 if ((status = get_ready_ep (fd->f_flags, data)) < 0) 398 if ((status = get_ready_ep (fd->f_flags, data, false)) < 0)
485 return status; 399 return status;
486 400
487 spin_lock_irq (&data->dev->lock); 401 spin_lock_irq (&data->dev->lock);
@@ -517,8 +431,8 @@ struct kiocb_priv {
517 struct mm_struct *mm; 431 struct mm_struct *mm;
518 struct work_struct work; 432 struct work_struct work;
519 void *buf; 433 void *buf;
520 const struct iovec *iv; 434 struct iov_iter to;
521 unsigned long nr_segs; 435 const void *to_free;
522 unsigned actual; 436 unsigned actual;
523}; 437};
524 438
@@ -541,35 +455,6 @@ static int ep_aio_cancel(struct kiocb *iocb)
541 return value; 455 return value;
542} 456}
543 457
544static ssize_t ep_copy_to_user(struct kiocb_priv *priv)
545{
546 ssize_t len, total;
547 void *to_copy;
548 int i;
549
550 /* copy stuff into user buffers */
551 total = priv->actual;
552 len = 0;
553 to_copy = priv->buf;
554 for (i=0; i < priv->nr_segs; i++) {
555 ssize_t this = min((ssize_t)(priv->iv[i].iov_len), total);
556
557 if (copy_to_user(priv->iv[i].iov_base, to_copy, this)) {
558 if (len == 0)
559 len = -EFAULT;
560 break;
561 }
562
563 total -= this;
564 len += this;
565 to_copy += this;
566 if (total == 0)
567 break;
568 }
569
570 return len;
571}
572
573static void ep_user_copy_worker(struct work_struct *work) 458static void ep_user_copy_worker(struct work_struct *work)
574{ 459{
575 struct kiocb_priv *priv = container_of(work, struct kiocb_priv, work); 460 struct kiocb_priv *priv = container_of(work, struct kiocb_priv, work);
@@ -578,13 +463,16 @@ static void ep_user_copy_worker(struct work_struct *work)
578 size_t ret; 463 size_t ret;
579 464
580 use_mm(mm); 465 use_mm(mm);
581 ret = ep_copy_to_user(priv); 466 ret = copy_to_iter(priv->buf, priv->actual, &priv->to);
582 unuse_mm(mm); 467 unuse_mm(mm);
468 if (!ret)
469 ret = -EFAULT;
583 470
584 /* completing the iocb can drop the ctx and mm, don't touch mm after */ 471 /* completing the iocb can drop the ctx and mm, don't touch mm after */
585 aio_complete(iocb, ret, ret); 472 aio_complete(iocb, ret, ret);
586 473
587 kfree(priv->buf); 474 kfree(priv->buf);
475 kfree(priv->to_free);
588 kfree(priv); 476 kfree(priv);
589} 477}
590 478
@@ -603,8 +491,9 @@ static void ep_aio_complete(struct usb_ep *ep, struct usb_request *req)
603 * don't need to copy anything to userspace, so we can 491 * don't need to copy anything to userspace, so we can
604 * complete the aio request immediately. 492 * complete the aio request immediately.
605 */ 493 */
606 if (priv->iv == NULL || unlikely(req->actual == 0)) { 494 if (priv->to_free == NULL || unlikely(req->actual == 0)) {
607 kfree(req->buf); 495 kfree(req->buf);
496 kfree(priv->to_free);
608 kfree(priv); 497 kfree(priv);
609 iocb->private = NULL; 498 iocb->private = NULL;
610 /* aio_complete() reports bytes-transferred _and_ faults */ 499 /* aio_complete() reports bytes-transferred _and_ faults */
@@ -618,6 +507,7 @@ static void ep_aio_complete(struct usb_ep *ep, struct usb_request *req)
618 507
619 priv->buf = req->buf; 508 priv->buf = req->buf;
620 priv->actual = req->actual; 509 priv->actual = req->actual;
510 INIT_WORK(&priv->work, ep_user_copy_worker);
621 schedule_work(&priv->work); 511 schedule_work(&priv->work);
622 } 512 }
623 spin_unlock(&epdata->dev->lock); 513 spin_unlock(&epdata->dev->lock);
@@ -626,38 +516,17 @@ static void ep_aio_complete(struct usb_ep *ep, struct usb_request *req)
626 put_ep(epdata); 516 put_ep(epdata);
627} 517}
628 518
629static ssize_t 519static ssize_t ep_aio(struct kiocb *iocb,
630ep_aio_rwtail( 520 struct kiocb_priv *priv,
631 struct kiocb *iocb, 521 struct ep_data *epdata,
632 char *buf, 522 char *buf,
633 size_t len, 523 size_t len)
634 struct ep_data *epdata,
635 const struct iovec *iv,
636 unsigned long nr_segs
637)
638{ 524{
639 struct kiocb_priv *priv; 525 struct usb_request *req;
640 struct usb_request *req; 526 ssize_t value;
641 ssize_t value;
642 527
643 priv = kmalloc(sizeof *priv, GFP_KERNEL);
644 if (!priv) {
645 value = -ENOMEM;
646fail:
647 kfree(buf);
648 return value;
649 }
650 iocb->private = priv; 528 iocb->private = priv;
651 priv->iocb = iocb; 529 priv->iocb = iocb;
652 priv->iv = iv;
653 priv->nr_segs = nr_segs;
654 INIT_WORK(&priv->work, ep_user_copy_worker);
655
656 value = get_ready_ep(iocb->ki_filp->f_flags, epdata);
657 if (unlikely(value < 0)) {
658 kfree(priv);
659 goto fail;
660 }
661 530
662 kiocb_set_cancel_fn(iocb, ep_aio_cancel); 531 kiocb_set_cancel_fn(iocb, ep_aio_cancel);
663 get_ep(epdata); 532 get_ep(epdata);
@@ -669,75 +538,154 @@ fail:
669 * allocate or submit those if the host disconnected. 538 * allocate or submit those if the host disconnected.
670 */ 539 */
671 spin_lock_irq(&epdata->dev->lock); 540 spin_lock_irq(&epdata->dev->lock);
672 if (likely(epdata->ep)) { 541 value = -ENODEV;
673 req = usb_ep_alloc_request(epdata->ep, GFP_ATOMIC); 542 if (unlikely(epdata->ep))
674 if (likely(req)) { 543 goto fail;
675 priv->req = req;
676 req->buf = buf;
677 req->length = len;
678 req->complete = ep_aio_complete;
679 req->context = iocb;
680 value = usb_ep_queue(epdata->ep, req, GFP_ATOMIC);
681 if (unlikely(0 != value))
682 usb_ep_free_request(epdata->ep, req);
683 } else
684 value = -EAGAIN;
685 } else
686 value = -ENODEV;
687 spin_unlock_irq(&epdata->dev->lock);
688 544
689 mutex_unlock(&epdata->lock); 545 req = usb_ep_alloc_request(epdata->ep, GFP_ATOMIC);
546 value = -ENOMEM;
547 if (unlikely(!req))
548 goto fail;
690 549
691 if (unlikely(value)) { 550 priv->req = req;
692 kfree(priv); 551 req->buf = buf;
693 put_ep(epdata); 552 req->length = len;
694 } else 553 req->complete = ep_aio_complete;
695 value = -EIOCBQUEUED; 554 req->context = iocb;
555 value = usb_ep_queue(epdata->ep, req, GFP_ATOMIC);
556 if (unlikely(0 != value)) {
557 usb_ep_free_request(epdata->ep, req);
558 goto fail;
559 }
560 spin_unlock_irq(&epdata->dev->lock);
561 return -EIOCBQUEUED;
562
563fail:
564 spin_unlock_irq(&epdata->dev->lock);
565 kfree(priv->to_free);
566 kfree(priv);
567 put_ep(epdata);
696 return value; 568 return value;
697} 569}
698 570
699static ssize_t 571static ssize_t
700ep_aio_read(struct kiocb *iocb, const struct iovec *iov, 572ep_read_iter(struct kiocb *iocb, struct iov_iter *to)
701 unsigned long nr_segs, loff_t o)
702{ 573{
703 struct ep_data *epdata = iocb->ki_filp->private_data; 574 struct file *file = iocb->ki_filp;
704 char *buf; 575 struct ep_data *epdata = file->private_data;
576 size_t len = iov_iter_count(to);
577 ssize_t value;
578 char *buf;
705 579
706 if (unlikely(usb_endpoint_dir_in(&epdata->desc))) 580 if ((value = get_ready_ep(file->f_flags, epdata, false)) < 0)
707 return -EINVAL; 581 return value;
708 582
709 buf = kmalloc(iocb->ki_nbytes, GFP_KERNEL); 583 /* halt any endpoint by doing a "wrong direction" i/o call */
710 if (unlikely(!buf)) 584 if (usb_endpoint_dir_in(&epdata->desc)) {
711 return -ENOMEM; 585 if (usb_endpoint_xfer_isoc(&epdata->desc) ||
586 !is_sync_kiocb(iocb)) {
587 mutex_unlock(&epdata->lock);
588 return -EINVAL;
589 }
590 DBG (epdata->dev, "%s halt\n", epdata->name);
591 spin_lock_irq(&epdata->dev->lock);
592 if (likely(epdata->ep != NULL))
593 usb_ep_set_halt(epdata->ep);
594 spin_unlock_irq(&epdata->dev->lock);
595 mutex_unlock(&epdata->lock);
596 return -EBADMSG;
597 }
712 598
713 return ep_aio_rwtail(iocb, buf, iocb->ki_nbytes, epdata, iov, nr_segs); 599 buf = kmalloc(len, GFP_KERNEL);
600 if (unlikely(!buf)) {
601 mutex_unlock(&epdata->lock);
602 return -ENOMEM;
603 }
604 if (is_sync_kiocb(iocb)) {
605 value = ep_io(epdata, buf, len);
606 if (value >= 0 && copy_to_iter(buf, value, to))
607 value = -EFAULT;
608 } else {
609 struct kiocb_priv *priv = kzalloc(sizeof *priv, GFP_KERNEL);
610 value = -ENOMEM;
611 if (!priv)
612 goto fail;
613 priv->to_free = dup_iter(&priv->to, to, GFP_KERNEL);
614 if (!priv->to_free) {
615 kfree(priv);
616 goto fail;
617 }
618 value = ep_aio(iocb, priv, epdata, buf, len);
619 if (value == -EIOCBQUEUED)
620 buf = NULL;
621 }
622fail:
623 kfree(buf);
624 mutex_unlock(&epdata->lock);
625 return value;
714} 626}
715 627
628static ssize_t ep_config(struct ep_data *, const char *, size_t);
629
716static ssize_t 630static ssize_t
717ep_aio_write(struct kiocb *iocb, const struct iovec *iov, 631ep_write_iter(struct kiocb *iocb, struct iov_iter *from)
718 unsigned long nr_segs, loff_t o)
719{ 632{
720 struct ep_data *epdata = iocb->ki_filp->private_data; 633 struct file *file = iocb->ki_filp;
721 char *buf; 634 struct ep_data *epdata = file->private_data;
722 size_t len = 0; 635 size_t len = iov_iter_count(from);
723 int i = 0; 636 bool configured;
637 ssize_t value;
638 char *buf;
639
640 if ((value = get_ready_ep(file->f_flags, epdata, true)) < 0)
641 return value;
724 642
725 if (unlikely(!usb_endpoint_dir_in(&epdata->desc))) 643 configured = epdata->state == STATE_EP_ENABLED;
726 return -EINVAL;
727 644
728 buf = kmalloc(iocb->ki_nbytes, GFP_KERNEL); 645 /* halt any endpoint by doing a "wrong direction" i/o call */
729 if (unlikely(!buf)) 646 if (configured && !usb_endpoint_dir_in(&epdata->desc)) {
647 if (usb_endpoint_xfer_isoc(&epdata->desc) ||
648 !is_sync_kiocb(iocb)) {
649 mutex_unlock(&epdata->lock);
650 return -EINVAL;
651 }
652 DBG (epdata->dev, "%s halt\n", epdata->name);
653 spin_lock_irq(&epdata->dev->lock);
654 if (likely(epdata->ep != NULL))
655 usb_ep_set_halt(epdata->ep);
656 spin_unlock_irq(&epdata->dev->lock);
657 mutex_unlock(&epdata->lock);
658 return -EBADMSG;
659 }
660
661 buf = kmalloc(len, GFP_KERNEL);
662 if (unlikely(!buf)) {
663 mutex_unlock(&epdata->lock);
730 return -ENOMEM; 664 return -ENOMEM;
665 }
731 666
732 for (i=0; i < nr_segs; i++) { 667 if (unlikely(copy_from_iter(buf, len, from) != len)) {
733 if (unlikely(copy_from_user(&buf[len], iov[i].iov_base, 668 value = -EFAULT;
734 iov[i].iov_len) != 0)) { 669 goto out;
735 kfree(buf); 670 }
736 return -EFAULT; 671
672 if (unlikely(!configured)) {
673 value = ep_config(epdata, buf, len);
674 } else if (is_sync_kiocb(iocb)) {
675 value = ep_io(epdata, buf, len);
676 } else {
677 struct kiocb_priv *priv = kzalloc(sizeof *priv, GFP_KERNEL);
678 value = -ENOMEM;
679 if (priv) {
680 value = ep_aio(iocb, priv, epdata, buf, len);
681 if (value == -EIOCBQUEUED)
682 buf = NULL;
737 } 683 }
738 len += iov[i].iov_len;
739 } 684 }
740 return ep_aio_rwtail(iocb, buf, len, epdata, NULL, 0); 685out:
686 kfree(buf);
687 mutex_unlock(&epdata->lock);
688 return value;
741} 689}
742 690
743/*----------------------------------------------------------------------*/ 691/*----------------------------------------------------------------------*/
@@ -745,15 +693,15 @@ ep_aio_write(struct kiocb *iocb, const struct iovec *iov,
745/* used after endpoint configuration */ 693/* used after endpoint configuration */
746static const struct file_operations ep_io_operations = { 694static const struct file_operations ep_io_operations = {
747 .owner = THIS_MODULE, 695 .owner = THIS_MODULE,
748 .llseek = no_llseek,
749 696
750 .read = ep_read, 697 .open = ep_open,
751 .write = ep_write,
752 .unlocked_ioctl = ep_ioctl,
753 .release = ep_release, 698 .release = ep_release,
754 699 .llseek = no_llseek,
755 .aio_read = ep_aio_read, 700 .read = new_sync_read,
756 .aio_write = ep_aio_write, 701 .write = new_sync_write,
702 .unlocked_ioctl = ep_ioctl,
703 .read_iter = ep_read_iter,
704 .write_iter = ep_write_iter,
757}; 705};
758 706
759/* ENDPOINT INITIALIZATION 707/* ENDPOINT INITIALIZATION
@@ -770,17 +718,12 @@ static const struct file_operations ep_io_operations = {
770 * speed descriptor, then optional high speed descriptor. 718 * speed descriptor, then optional high speed descriptor.
771 */ 719 */
772static ssize_t 720static ssize_t
773ep_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr) 721ep_config (struct ep_data *data, const char *buf, size_t len)
774{ 722{
775 struct ep_data *data = fd->private_data;
776 struct usb_ep *ep; 723 struct usb_ep *ep;
777 u32 tag; 724 u32 tag;
778 int value, length = len; 725 int value, length = len;
779 726
780 value = mutex_lock_interruptible(&data->lock);
781 if (value < 0)
782 return value;
783
784 if (data->state != STATE_EP_READY) { 727 if (data->state != STATE_EP_READY) {
785 value = -EL2HLT; 728 value = -EL2HLT;
786 goto fail; 729 goto fail;
@@ -791,9 +734,7 @@ ep_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
791 goto fail0; 734 goto fail0;
792 735
793 /* we might need to change message format someday */ 736 /* we might need to change message format someday */
794 if (copy_from_user (&tag, buf, 4)) { 737 memcpy(&tag, buf, 4);
795 goto fail1;
796 }
797 if (tag != 1) { 738 if (tag != 1) {
798 DBG(data->dev, "config %s, bad tag %d\n", data->name, tag); 739 DBG(data->dev, "config %s, bad tag %d\n", data->name, tag);
799 goto fail0; 740 goto fail0;
@@ -806,19 +747,15 @@ ep_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
806 */ 747 */
807 748
808 /* full/low speed descriptor, then high speed */ 749 /* full/low speed descriptor, then high speed */
809 if (copy_from_user (&data->desc, buf, USB_DT_ENDPOINT_SIZE)) { 750 memcpy(&data->desc, buf, USB_DT_ENDPOINT_SIZE);
810 goto fail1;
811 }
812 if (data->desc.bLength != USB_DT_ENDPOINT_SIZE 751 if (data->desc.bLength != USB_DT_ENDPOINT_SIZE
813 || data->desc.bDescriptorType != USB_DT_ENDPOINT) 752 || data->desc.bDescriptorType != USB_DT_ENDPOINT)
814 goto fail0; 753 goto fail0;
815 if (len != USB_DT_ENDPOINT_SIZE) { 754 if (len != USB_DT_ENDPOINT_SIZE) {
816 if (len != 2 * USB_DT_ENDPOINT_SIZE) 755 if (len != 2 * USB_DT_ENDPOINT_SIZE)
817 goto fail0; 756 goto fail0;
818 if (copy_from_user (&data->hs_desc, buf + USB_DT_ENDPOINT_SIZE, 757 memcpy(&data->hs_desc, buf + USB_DT_ENDPOINT_SIZE,
819 USB_DT_ENDPOINT_SIZE)) { 758 USB_DT_ENDPOINT_SIZE);
820 goto fail1;
821 }
822 if (data->hs_desc.bLength != USB_DT_ENDPOINT_SIZE 759 if (data->hs_desc.bLength != USB_DT_ENDPOINT_SIZE
823 || data->hs_desc.bDescriptorType 760 || data->hs_desc.bDescriptorType
824 != USB_DT_ENDPOINT) { 761 != USB_DT_ENDPOINT) {
@@ -840,24 +777,20 @@ ep_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
840 case USB_SPEED_LOW: 777 case USB_SPEED_LOW:
841 case USB_SPEED_FULL: 778 case USB_SPEED_FULL:
842 ep->desc = &data->desc; 779 ep->desc = &data->desc;
843 value = usb_ep_enable(ep);
844 if (value == 0)
845 data->state = STATE_EP_ENABLED;
846 break; 780 break;
847 case USB_SPEED_HIGH: 781 case USB_SPEED_HIGH:
848 /* fails if caller didn't provide that descriptor... */ 782 /* fails if caller didn't provide that descriptor... */
849 ep->desc = &data->hs_desc; 783 ep->desc = &data->hs_desc;
850 value = usb_ep_enable(ep);
851 if (value == 0)
852 data->state = STATE_EP_ENABLED;
853 break; 784 break;
854 default: 785 default:
855 DBG(data->dev, "unconnected, %s init abandoned\n", 786 DBG(data->dev, "unconnected, %s init abandoned\n",
856 data->name); 787 data->name);
857 value = -EINVAL; 788 value = -EINVAL;
789 goto gone;
858 } 790 }
791 value = usb_ep_enable(ep);
859 if (value == 0) { 792 if (value == 0) {
860 fd->f_op = &ep_io_operations; 793 data->state = STATE_EP_ENABLED;
861 value = length; 794 value = length;
862 } 795 }
863gone: 796gone:
@@ -867,14 +800,10 @@ fail:
867 data->desc.bDescriptorType = 0; 800 data->desc.bDescriptorType = 0;
868 data->hs_desc.bDescriptorType = 0; 801 data->hs_desc.bDescriptorType = 0;
869 } 802 }
870 mutex_unlock(&data->lock);
871 return value; 803 return value;
872fail0: 804fail0:
873 value = -EINVAL; 805 value = -EINVAL;
874 goto fail; 806 goto fail;
875fail1:
876 value = -EFAULT;
877 goto fail;
878} 807}
879 808
880static int 809static int
@@ -902,15 +831,6 @@ ep_open (struct inode *inode, struct file *fd)
902 return value; 831 return value;
903} 832}
904 833
905/* used before endpoint configuration */
906static const struct file_operations ep_config_operations = {
907 .llseek = no_llseek,
908
909 .open = ep_open,
910 .write = ep_config,
911 .release = ep_release,
912};
913
914/*----------------------------------------------------------------------*/ 834/*----------------------------------------------------------------------*/
915 835
916/* EP0 IMPLEMENTATION can be partly in userspace. 836/* EP0 IMPLEMENTATION can be partly in userspace.
@@ -989,6 +909,10 @@ ep0_read (struct file *fd, char __user *buf, size_t len, loff_t *ptr)
989 enum ep0_state state; 909 enum ep0_state state;
990 910
991 spin_lock_irq (&dev->lock); 911 spin_lock_irq (&dev->lock);
912 if (dev->state <= STATE_DEV_OPENED) {
913 retval = -EINVAL;
914 goto done;
915 }
992 916
993 /* report fd mode change before acting on it */ 917 /* report fd mode change before acting on it */
994 if (dev->setup_abort) { 918 if (dev->setup_abort) {
@@ -1187,8 +1111,6 @@ ep0_write (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
1187 struct dev_data *dev = fd->private_data; 1111 struct dev_data *dev = fd->private_data;
1188 ssize_t retval = -ESRCH; 1112 ssize_t retval = -ESRCH;
1189 1113
1190 spin_lock_irq (&dev->lock);
1191
1192 /* report fd mode change before acting on it */ 1114 /* report fd mode change before acting on it */
1193 if (dev->setup_abort) { 1115 if (dev->setup_abort) {
1194 dev->setup_abort = 0; 1116 dev->setup_abort = 0;
@@ -1234,7 +1156,6 @@ ep0_write (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
1234 } else 1156 } else
1235 DBG (dev, "fail %s, state %d\n", __func__, dev->state); 1157 DBG (dev, "fail %s, state %d\n", __func__, dev->state);
1236 1158
1237 spin_unlock_irq (&dev->lock);
1238 return retval; 1159 return retval;
1239} 1160}
1240 1161
@@ -1281,6 +1202,9 @@ ep0_poll (struct file *fd, poll_table *wait)
1281 struct dev_data *dev = fd->private_data; 1202 struct dev_data *dev = fd->private_data;
1282 int mask = 0; 1203 int mask = 0;
1283 1204
1205 if (dev->state <= STATE_DEV_OPENED)
1206 return DEFAULT_POLLMASK;
1207
1284 poll_wait(fd, &dev->wait, wait); 1208 poll_wait(fd, &dev->wait, wait);
1285 1209
1286 spin_lock_irq (&dev->lock); 1210 spin_lock_irq (&dev->lock);
@@ -1316,19 +1240,6 @@ static long dev_ioctl (struct file *fd, unsigned code, unsigned long value)
1316 return ret; 1240 return ret;
1317} 1241}
1318 1242
1319/* used after device configuration */
1320static const struct file_operations ep0_io_operations = {
1321 .owner = THIS_MODULE,
1322 .llseek = no_llseek,
1323
1324 .read = ep0_read,
1325 .write = ep0_write,
1326 .fasync = ep0_fasync,
1327 .poll = ep0_poll,
1328 .unlocked_ioctl = dev_ioctl,
1329 .release = dev_release,
1330};
1331
1332/*----------------------------------------------------------------------*/ 1243/*----------------------------------------------------------------------*/
1333 1244
1334/* The in-kernel gadget driver handles most ep0 issues, in particular 1245/* The in-kernel gadget driver handles most ep0 issues, in particular
@@ -1650,7 +1561,7 @@ static int activate_ep_files (struct dev_data *dev)
1650 goto enomem1; 1561 goto enomem1;
1651 1562
1652 data->dentry = gadgetfs_create_file (dev->sb, data->name, 1563 data->dentry = gadgetfs_create_file (dev->sb, data->name,
1653 data, &ep_config_operations); 1564 data, &ep_io_operations);
1654 if (!data->dentry) 1565 if (!data->dentry)
1655 goto enomem2; 1566 goto enomem2;
1656 list_add_tail (&data->epfiles, &dev->epfiles); 1567 list_add_tail (&data->epfiles, &dev->epfiles);
@@ -1852,6 +1763,14 @@ dev_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
1852 u32 tag; 1763 u32 tag;
1853 char *kbuf; 1764 char *kbuf;
1854 1765
1766 spin_lock_irq(&dev->lock);
1767 if (dev->state > STATE_DEV_OPENED) {
1768 value = ep0_write(fd, buf, len, ptr);
1769 spin_unlock_irq(&dev->lock);
1770 return value;
1771 }
1772 spin_unlock_irq(&dev->lock);
1773
1855 if (len < (USB_DT_CONFIG_SIZE + USB_DT_DEVICE_SIZE + 4)) 1774 if (len < (USB_DT_CONFIG_SIZE + USB_DT_DEVICE_SIZE + 4))
1856 return -EINVAL; 1775 return -EINVAL;
1857 1776
@@ -1925,7 +1844,6 @@ dev_config (struct file *fd, const char __user *buf, size_t len, loff_t *ptr)
1925 * on, they can work ... except in cleanup paths that 1844 * on, they can work ... except in cleanup paths that
1926 * kick in after the ep0 descriptor is closed. 1845 * kick in after the ep0 descriptor is closed.
1927 */ 1846 */
1928 fd->f_op = &ep0_io_operations;
1929 value = len; 1847 value = len;
1930 } 1848 }
1931 return value; 1849 return value;
@@ -1956,12 +1874,14 @@ dev_open (struct inode *inode, struct file *fd)
1956 return value; 1874 return value;
1957} 1875}
1958 1876
1959static const struct file_operations dev_init_operations = { 1877static const struct file_operations ep0_operations = {
1960 .llseek = no_llseek, 1878 .llseek = no_llseek,
1961 1879
1962 .open = dev_open, 1880 .open = dev_open,
1881 .read = ep0_read,
1963 .write = dev_config, 1882 .write = dev_config,
1964 .fasync = ep0_fasync, 1883 .fasync = ep0_fasync,
1884 .poll = ep0_poll,
1965 .unlocked_ioctl = dev_ioctl, 1885 .unlocked_ioctl = dev_ioctl,
1966 .release = dev_release, 1886 .release = dev_release,
1967}; 1887};
@@ -2077,7 +1997,7 @@ gadgetfs_fill_super (struct super_block *sb, void *opts, int silent)
2077 goto Enomem; 1997 goto Enomem;
2078 1998
2079 dev->sb = sb; 1999 dev->sb = sb;
2080 dev->dentry = gadgetfs_create_file(sb, CHIP, dev, &dev_init_operations); 2000 dev->dentry = gadgetfs_create_file(sb, CHIP, dev, &ep0_operations);
2081 if (!dev->dentry) { 2001 if (!dev->dentry) {
2082 put_dev(dev); 2002 put_dev(dev);
2083 goto Enomem; 2003 goto Enomem;
diff --git a/drivers/usb/gadget/legacy/tcm_usb_gadget.c b/drivers/usb/gadget/legacy/tcm_usb_gadget.c
index 3a494168661e..6e0a019aad54 100644
--- a/drivers/usb/gadget/legacy/tcm_usb_gadget.c
+++ b/drivers/usb/gadget/legacy/tcm_usb_gadget.c
@@ -1740,10 +1740,9 @@ static int tcm_usbg_make_nexus(struct usbg_tpg *tpg, char *name)
1740 goto err_session; 1740 goto err_session;
1741 } 1741 }
1742 /* 1742 /*
1743 * Now register the TCM vHost virtual I_T Nexus as active with the 1743 * Now register the TCM vHost virtual I_T Nexus as active.
1744 * call to __transport_register_session()
1745 */ 1744 */
1746 __transport_register_session(se_tpg, tv_nexus->tvn_se_sess->se_node_acl, 1745 transport_register_session(se_tpg, tv_nexus->tvn_se_sess->se_node_acl,
1747 tv_nexus->tvn_se_sess, tv_nexus); 1746 tv_nexus->tvn_se_sess, tv_nexus);
1748 tpg->tpg_nexus = tv_nexus; 1747 tpg->tpg_nexus = tv_nexus;
1749 mutex_unlock(&tpg->tpg_mutex); 1748 mutex_unlock(&tpg->tpg_mutex);
diff --git a/drivers/usb/gadget/legacy/zero.c b/drivers/usb/gadget/legacy/zero.c
index ff97ac93ac03..5ee95152493c 100644
--- a/drivers/usb/gadget/legacy/zero.c
+++ b/drivers/usb/gadget/legacy/zero.c
@@ -68,8 +68,6 @@ static struct usb_zero_options gzero_options = {
68 .isoc_maxpacket = GZERO_ISOC_MAXPACKET, 68 .isoc_maxpacket = GZERO_ISOC_MAXPACKET,
69 .bulk_buflen = GZERO_BULK_BUFLEN, 69 .bulk_buflen = GZERO_BULK_BUFLEN,
70 .qlen = GZERO_QLEN, 70 .qlen = GZERO_QLEN,
71 .int_interval = GZERO_INT_INTERVAL,
72 .int_maxpacket = GZERO_INT_MAXPACKET,
73}; 71};
74 72
75/*-------------------------------------------------------------------------*/ 73/*-------------------------------------------------------------------------*/
@@ -268,21 +266,6 @@ module_param_named(isoc_maxburst, gzero_options.isoc_maxburst, uint,
268 S_IRUGO|S_IWUSR); 266 S_IRUGO|S_IWUSR);
269MODULE_PARM_DESC(isoc_maxburst, "0 - 15 (ss only)"); 267MODULE_PARM_DESC(isoc_maxburst, "0 - 15 (ss only)");
270 268
271module_param_named(int_interval, gzero_options.int_interval, uint,
272 S_IRUGO|S_IWUSR);
273MODULE_PARM_DESC(int_interval, "1 - 16");
274
275module_param_named(int_maxpacket, gzero_options.int_maxpacket, uint,
276 S_IRUGO|S_IWUSR);
277MODULE_PARM_DESC(int_maxpacket, "0 - 1023 (fs), 0 - 1024 (hs/ss)");
278
279module_param_named(int_mult, gzero_options.int_mult, uint, S_IRUGO|S_IWUSR);
280MODULE_PARM_DESC(int_mult, "0 - 2 (hs/ss only)");
281
282module_param_named(int_maxburst, gzero_options.int_maxburst, uint,
283 S_IRUGO|S_IWUSR);
284MODULE_PARM_DESC(int_maxburst, "0 - 15 (ss only)");
285
286static struct usb_function *func_lb; 269static struct usb_function *func_lb;
287static struct usb_function_instance *func_inst_lb; 270static struct usb_function_instance *func_inst_lb;
288 271
@@ -318,10 +301,6 @@ static int __init zero_bind(struct usb_composite_dev *cdev)
318 ss_opts->isoc_maxpacket = gzero_options.isoc_maxpacket; 301 ss_opts->isoc_maxpacket = gzero_options.isoc_maxpacket;
319 ss_opts->isoc_mult = gzero_options.isoc_mult; 302 ss_opts->isoc_mult = gzero_options.isoc_mult;
320 ss_opts->isoc_maxburst = gzero_options.isoc_maxburst; 303 ss_opts->isoc_maxburst = gzero_options.isoc_maxburst;
321 ss_opts->int_interval = gzero_options.int_interval;
322 ss_opts->int_maxpacket = gzero_options.int_maxpacket;
323 ss_opts->int_mult = gzero_options.int_mult;
324 ss_opts->int_maxburst = gzero_options.int_maxburst;
325 ss_opts->bulk_buflen = gzero_options.bulk_buflen; 304 ss_opts->bulk_buflen = gzero_options.bulk_buflen;
326 305
327 func_ss = usb_get_function(func_inst_ss); 306 func_ss = usb_get_function(func_inst_ss);
diff --git a/drivers/usb/host/ehci-atmel.c b/drivers/usb/host/ehci-atmel.c
index 663f7908b15c..be0964a801e8 100644
--- a/drivers/usb/host/ehci-atmel.c
+++ b/drivers/usb/host/ehci-atmel.c
@@ -34,7 +34,6 @@ static const char hcd_name[] = "ehci-atmel";
34 34
35struct atmel_ehci_priv { 35struct atmel_ehci_priv {
36 struct clk *iclk; 36 struct clk *iclk;
37 struct clk *fclk;
38 struct clk *uclk; 37 struct clk *uclk;
39 bool clocked; 38 bool clocked;
40}; 39};
@@ -51,12 +50,9 @@ static void atmel_start_clock(struct atmel_ehci_priv *atmel_ehci)
51{ 50{
52 if (atmel_ehci->clocked) 51 if (atmel_ehci->clocked)
53 return; 52 return;
54 if (IS_ENABLED(CONFIG_COMMON_CLK)) { 53
55 clk_set_rate(atmel_ehci->uclk, 48000000); 54 clk_prepare_enable(atmel_ehci->uclk);
56 clk_prepare_enable(atmel_ehci->uclk);
57 }
58 clk_prepare_enable(atmel_ehci->iclk); 55 clk_prepare_enable(atmel_ehci->iclk);
59 clk_prepare_enable(atmel_ehci->fclk);
60 atmel_ehci->clocked = true; 56 atmel_ehci->clocked = true;
61} 57}
62 58
@@ -64,10 +60,9 @@ static void atmel_stop_clock(struct atmel_ehci_priv *atmel_ehci)
64{ 60{
65 if (!atmel_ehci->clocked) 61 if (!atmel_ehci->clocked)
66 return; 62 return;
67 clk_disable_unprepare(atmel_ehci->fclk); 63
68 clk_disable_unprepare(atmel_ehci->iclk); 64 clk_disable_unprepare(atmel_ehci->iclk);
69 if (IS_ENABLED(CONFIG_COMMON_CLK)) 65 clk_disable_unprepare(atmel_ehci->uclk);
70 clk_disable_unprepare(atmel_ehci->uclk);
71 atmel_ehci->clocked = false; 66 atmel_ehci->clocked = false;
72} 67}
73 68
@@ -146,20 +141,13 @@ static int ehci_atmel_drv_probe(struct platform_device *pdev)
146 retval = -ENOENT; 141 retval = -ENOENT;
147 goto fail_request_resource; 142 goto fail_request_resource;
148 } 143 }
149 atmel_ehci->fclk = devm_clk_get(&pdev->dev, "uhpck"); 144
150 if (IS_ERR(atmel_ehci->fclk)) { 145 atmel_ehci->uclk = devm_clk_get(&pdev->dev, "usb_clk");
151 dev_err(&pdev->dev, "Error getting function clock\n"); 146 if (IS_ERR(atmel_ehci->uclk)) {
152 retval = -ENOENT; 147 dev_err(&pdev->dev, "failed to get uclk\n");
148 retval = PTR_ERR(atmel_ehci->uclk);
153 goto fail_request_resource; 149 goto fail_request_resource;
154 } 150 }
155 if (IS_ENABLED(CONFIG_COMMON_CLK)) {
156 atmel_ehci->uclk = devm_clk_get(&pdev->dev, "usb_clk");
157 if (IS_ERR(atmel_ehci->uclk)) {
158 dev_err(&pdev->dev, "failed to get uclk\n");
159 retval = PTR_ERR(atmel_ehci->uclk);
160 goto fail_request_resource;
161 }
162 }
163 151
164 ehci = hcd_to_ehci(hcd); 152 ehci = hcd_to_ehci(hcd);
165 /* registers start at offset 0x0 */ 153 /* registers start at offset 0x0 */
diff --git a/drivers/usb/host/xhci-pci.c b/drivers/usb/host/xhci-pci.c
index 7f76c8a12f89..fd53c9ebd662 100644
--- a/drivers/usb/host/xhci-pci.c
+++ b/drivers/usb/host/xhci-pci.c
@@ -37,6 +37,9 @@
37 37
38#define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31 38#define PCI_DEVICE_ID_INTEL_LYNXPOINT_XHCI 0x8c31
39#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31 39#define PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI 0x9c31
40#define PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI 0x22b5
41#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI 0xa12f
42#define PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI 0x9d2f
40 43
41static const char hcd_name[] = "xhci_hcd"; 44static const char hcd_name[] = "xhci_hcd";
42 45
@@ -133,6 +136,12 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
133 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) { 136 pdev->device == PCI_DEVICE_ID_INTEL_LYNXPOINT_LP_XHCI) {
134 xhci->quirks |= XHCI_SPURIOUS_REBOOT; 137 xhci->quirks |= XHCI_SPURIOUS_REBOOT;
135 } 138 }
139 if (pdev->vendor == PCI_VENDOR_ID_INTEL &&
140 (pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_LP_XHCI ||
141 pdev->device == PCI_DEVICE_ID_INTEL_SUNRISEPOINT_H_XHCI ||
142 pdev->device == PCI_DEVICE_ID_INTEL_CHERRYVIEW_XHCI)) {
143 xhci->quirks |= XHCI_PME_STUCK_QUIRK;
144 }
136 if (pdev->vendor == PCI_VENDOR_ID_ETRON && 145 if (pdev->vendor == PCI_VENDOR_ID_ETRON &&
137 pdev->device == PCI_DEVICE_ID_EJ168) { 146 pdev->device == PCI_DEVICE_ID_EJ168) {
138 xhci->quirks |= XHCI_RESET_ON_RESUME; 147 xhci->quirks |= XHCI_RESET_ON_RESUME;
@@ -159,6 +168,21 @@ static void xhci_pci_quirks(struct device *dev, struct xhci_hcd *xhci)
159 "QUIRK: Resetting on resume"); 168 "QUIRK: Resetting on resume");
160} 169}
161 170
171/*
172 * Make sure PME works on some Intel xHCI controllers by writing 1 to clear
173 * the Internal PME flag bit in vendor specific PMCTRL register at offset 0x80a4
174 */
175static void xhci_pme_quirk(struct xhci_hcd *xhci)
176{
177 u32 val;
178 void __iomem *reg;
179
180 reg = (void __iomem *) xhci->cap_regs + 0x80a4;
181 val = readl(reg);
182 writel(val | BIT(28), reg);
183 readl(reg);
184}
185
162/* called during probe() after chip reset completes */ 186/* called during probe() after chip reset completes */
163static int xhci_pci_setup(struct usb_hcd *hcd) 187static int xhci_pci_setup(struct usb_hcd *hcd)
164{ 188{
@@ -283,6 +307,9 @@ static int xhci_pci_suspend(struct usb_hcd *hcd, bool do_wakeup)
283 if (xhci->quirks & XHCI_COMP_MODE_QUIRK) 307 if (xhci->quirks & XHCI_COMP_MODE_QUIRK)
284 pdev->no_d3cold = true; 308 pdev->no_d3cold = true;
285 309
310 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
311 xhci_pme_quirk(xhci);
312
286 return xhci_suspend(xhci, do_wakeup); 313 return xhci_suspend(xhci, do_wakeup);
287} 314}
288 315
@@ -313,6 +340,9 @@ static int xhci_pci_resume(struct usb_hcd *hcd, bool hibernated)
313 if (pdev->vendor == PCI_VENDOR_ID_INTEL) 340 if (pdev->vendor == PCI_VENDOR_ID_INTEL)
314 usb_enable_intel_xhci_ports(pdev); 341 usb_enable_intel_xhci_ports(pdev);
315 342
343 if (xhci->quirks & XHCI_PME_STUCK_QUIRK)
344 xhci_pme_quirk(xhci);
345
316 retval = xhci_resume(xhci, hibernated); 346 retval = xhci_resume(xhci, hibernated);
317 return retval; 347 return retval;
318} 348}
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
index 08d402b15482..0e11d61408ff 100644
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -83,16 +83,6 @@ static int xhci_plat_probe(struct platform_device *pdev)
83 if (irq < 0) 83 if (irq < 0)
84 return -ENODEV; 84 return -ENODEV;
85 85
86
87 if (of_device_is_compatible(pdev->dev.of_node,
88 "marvell,armada-375-xhci") ||
89 of_device_is_compatible(pdev->dev.of_node,
90 "marvell,armada-380-xhci")) {
91 ret = xhci_mvebu_mbus_init_quirk(pdev);
92 if (ret)
93 return ret;
94 }
95
96 /* Initialize dma_mask and coherent_dma_mask to 32-bits */ 86 /* Initialize dma_mask and coherent_dma_mask to 32-bits */
97 ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32)); 87 ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
98 if (ret) 88 if (ret)
@@ -127,6 +117,15 @@ static int xhci_plat_probe(struct platform_device *pdev)
127 goto put_hcd; 117 goto put_hcd;
128 } 118 }
129 119
120 if (of_device_is_compatible(pdev->dev.of_node,
121 "marvell,armada-375-xhci") ||
122 of_device_is_compatible(pdev->dev.of_node,
123 "marvell,armada-380-xhci")) {
124 ret = xhci_mvebu_mbus_init_quirk(pdev);
125 if (ret)
126 goto disable_clk;
127 }
128
130 ret = usb_add_hcd(hcd, irq, IRQF_SHARED); 129 ret = usb_add_hcd(hcd, irq, IRQF_SHARED);
131 if (ret) 130 if (ret)
132 goto disable_clk; 131 goto disable_clk;
diff --git a/drivers/usb/host/xhci-ring.c b/drivers/usb/host/xhci-ring.c
index 88da8d629820..73485fa4372f 100644
--- a/drivers/usb/host/xhci-ring.c
+++ b/drivers/usb/host/xhci-ring.c
@@ -1946,7 +1946,7 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1946 if (event_trb != ep_ring->dequeue) { 1946 if (event_trb != ep_ring->dequeue) {
1947 /* The event was for the status stage */ 1947 /* The event was for the status stage */
1948 if (event_trb == td->last_trb) { 1948 if (event_trb == td->last_trb) {
1949 if (td->urb->actual_length != 0) { 1949 if (td->urb_length_set) {
1950 /* Don't overwrite a previously set error code 1950 /* Don't overwrite a previously set error code
1951 */ 1951 */
1952 if ((*status == -EINPROGRESS || *status == 0) && 1952 if ((*status == -EINPROGRESS || *status == 0) &&
@@ -1960,7 +1960,13 @@ static int process_ctrl_td(struct xhci_hcd *xhci, struct xhci_td *td,
1960 td->urb->transfer_buffer_length; 1960 td->urb->transfer_buffer_length;
1961 } 1961 }
1962 } else { 1962 } else {
1963 /* Maybe the event was for the data stage? */ 1963 /*
1964 * Maybe the event was for the data stage? If so, update
1965 * already the actual_length of the URB and flag it as
1966 * set, so that it is not overwritten in the event for
1967 * the last TRB.
1968 */
1969 td->urb_length_set = true;
1964 td->urb->actual_length = 1970 td->urb->actual_length =
1965 td->urb->transfer_buffer_length - 1971 td->urb->transfer_buffer_length -
1966 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len)); 1972 EVENT_TRB_LEN(le32_to_cpu(event->transfer_len));
diff --git a/drivers/usb/host/xhci.h b/drivers/usb/host/xhci.h
index 974514762a14..8e421b89632d 100644
--- a/drivers/usb/host/xhci.h
+++ b/drivers/usb/host/xhci.h
@@ -1,3 +1,4 @@
1
1/* 2/*
2 * xHCI host controller driver 3 * xHCI host controller driver
3 * 4 *
@@ -88,9 +89,10 @@ struct xhci_cap_regs {
88#define HCS_IST(p) (((p) >> 0) & 0xf) 89#define HCS_IST(p) (((p) >> 0) & 0xf)
89/* bits 4:7, max number of Event Ring segments */ 90/* bits 4:7, max number of Event Ring segments */
90#define HCS_ERST_MAX(p) (((p) >> 4) & 0xf) 91#define HCS_ERST_MAX(p) (((p) >> 4) & 0xf)
92/* bits 21:25 Hi 5 bits of Scratchpad buffers SW must allocate for the HW */
91/* bit 26 Scratchpad restore - for save/restore HW state - not used yet */ 93/* bit 26 Scratchpad restore - for save/restore HW state - not used yet */
92/* bits 27:31 number of Scratchpad buffers SW must allocate for the HW */ 94/* bits 27:31 Lo 5 bits of Scratchpad buffers SW must allocate for the HW */
93#define HCS_MAX_SCRATCHPAD(p) (((p) >> 27) & 0x1f) 95#define HCS_MAX_SCRATCHPAD(p) ((((p) >> 16) & 0x3e0) | (((p) >> 27) & 0x1f))
94 96
95/* HCSPARAMS3 - hcs_params3 - bitmasks */ 97/* HCSPARAMS3 - hcs_params3 - bitmasks */
96/* bits 0:7, Max U1 to U0 latency for the roothub ports */ 98/* bits 0:7, Max U1 to U0 latency for the roothub ports */
@@ -1288,6 +1290,8 @@ struct xhci_td {
1288 struct xhci_segment *start_seg; 1290 struct xhci_segment *start_seg;
1289 union xhci_trb *first_trb; 1291 union xhci_trb *first_trb;
1290 union xhci_trb *last_trb; 1292 union xhci_trb *last_trb;
1293 /* actual_length of the URB has already been set */
1294 bool urb_length_set;
1291}; 1295};
1292 1296
1293/* xHCI command default timeout value */ 1297/* xHCI command default timeout value */
@@ -1560,6 +1564,7 @@ struct xhci_hcd {
1560#define XHCI_SPURIOUS_WAKEUP (1 << 18) 1564#define XHCI_SPURIOUS_WAKEUP (1 << 18)
1561/* For controllers with a broken beyond repair streams implementation */ 1565/* For controllers with a broken beyond repair streams implementation */
1562#define XHCI_BROKEN_STREAMS (1 << 19) 1566#define XHCI_BROKEN_STREAMS (1 << 19)
1567#define XHCI_PME_STUCK_QUIRK (1 << 20)
1563 unsigned int num_active_eps; 1568 unsigned int num_active_eps;
1564 unsigned int limit_active_eps; 1569 unsigned int limit_active_eps;
1565 /* There are two roothubs to keep track of bus suspend info for */ 1570 /* There are two roothubs to keep track of bus suspend info for */
diff --git a/drivers/usb/isp1760/isp1760-core.c b/drivers/usb/isp1760/isp1760-core.c
index b9827556455f..bfa402cf3a27 100644
--- a/drivers/usb/isp1760/isp1760-core.c
+++ b/drivers/usb/isp1760/isp1760-core.c
@@ -151,8 +151,7 @@ int isp1760_register(struct resource *mem, int irq, unsigned long irqflags,
151 } 151 }
152 152
153 if (IS_ENABLED(CONFIG_USB_ISP1761_UDC) && !udc_disabled) { 153 if (IS_ENABLED(CONFIG_USB_ISP1761_UDC) && !udc_disabled) {
154 ret = isp1760_udc_register(isp, irq, irqflags | IRQF_SHARED | 154 ret = isp1760_udc_register(isp, irq, irqflags);
155 IRQF_DISABLED);
156 if (ret < 0) { 155 if (ret < 0) {
157 isp1760_hcd_unregister(&isp->hcd); 156 isp1760_hcd_unregister(&isp->hcd);
158 return ret; 157 return ret;
diff --git a/drivers/usb/isp1760/isp1760-hcd.c b/drivers/usb/isp1760/isp1760-hcd.c
index eba9b82e2d70..3cb98b1d5d29 100644
--- a/drivers/usb/isp1760/isp1760-hcd.c
+++ b/drivers/usb/isp1760/isp1760-hcd.c
@@ -1274,7 +1274,7 @@ static void errata2_function(unsigned long data)
1274 for (slot = 0; slot < 32; slot++) 1274 for (slot = 0; slot < 32; slot++)
1275 if (priv->atl_slots[slot].qh && time_after(jiffies, 1275 if (priv->atl_slots[slot].qh && time_after(jiffies,
1276 priv->atl_slots[slot].timestamp + 1276 priv->atl_slots[slot].timestamp +
1277 SLOT_TIMEOUT * HZ / 1000)) { 1277 msecs_to_jiffies(SLOT_TIMEOUT))) {
1278 ptd_read(hcd->regs, ATL_PTD_OFFSET, slot, &ptd); 1278 ptd_read(hcd->regs, ATL_PTD_OFFSET, slot, &ptd);
1279 if (!FROM_DW0_VALID(ptd.dw0) && 1279 if (!FROM_DW0_VALID(ptd.dw0) &&
1280 !FROM_DW3_ACTIVE(ptd.dw3)) 1280 !FROM_DW3_ACTIVE(ptd.dw3))
@@ -1286,7 +1286,7 @@ static void errata2_function(unsigned long data)
1286 1286
1287 spin_unlock_irqrestore(&priv->lock, spinflags); 1287 spin_unlock_irqrestore(&priv->lock, spinflags);
1288 1288
1289 errata2_timer.expires = jiffies + SLOT_CHECK_PERIOD * HZ / 1000; 1289 errata2_timer.expires = jiffies + msecs_to_jiffies(SLOT_CHECK_PERIOD);
1290 add_timer(&errata2_timer); 1290 add_timer(&errata2_timer);
1291} 1291}
1292 1292
@@ -1336,7 +1336,7 @@ static int isp1760_run(struct usb_hcd *hcd)
1336 return retval; 1336 return retval;
1337 1337
1338 setup_timer(&errata2_timer, errata2_function, (unsigned long)hcd); 1338 setup_timer(&errata2_timer, errata2_function, (unsigned long)hcd);
1339 errata2_timer.expires = jiffies + SLOT_CHECK_PERIOD * HZ / 1000; 1339 errata2_timer.expires = jiffies + msecs_to_jiffies(SLOT_CHECK_PERIOD);
1340 add_timer(&errata2_timer); 1340 add_timer(&errata2_timer);
1341 1341
1342 chipid = reg_read32(hcd->regs, HC_CHIP_ID_REG); 1342 chipid = reg_read32(hcd->regs, HC_CHIP_ID_REG);
diff --git a/drivers/usb/isp1760/isp1760-udc.c b/drivers/usb/isp1760/isp1760-udc.c
index 9612d7990565..f32c292cc868 100644
--- a/drivers/usb/isp1760/isp1760-udc.c
+++ b/drivers/usb/isp1760/isp1760-udc.c
@@ -1191,6 +1191,7 @@ static int isp1760_udc_start(struct usb_gadget *gadget,
1191 struct usb_gadget_driver *driver) 1191 struct usb_gadget_driver *driver)
1192{ 1192{
1193 struct isp1760_udc *udc = gadget_to_udc(gadget); 1193 struct isp1760_udc *udc = gadget_to_udc(gadget);
1194 unsigned long flags;
1194 1195
1195 /* The hardware doesn't support low speed. */ 1196 /* The hardware doesn't support low speed. */
1196 if (driver->max_speed < USB_SPEED_FULL) { 1197 if (driver->max_speed < USB_SPEED_FULL) {
@@ -1198,7 +1199,7 @@ static int isp1760_udc_start(struct usb_gadget *gadget,
1198 return -EINVAL; 1199 return -EINVAL;
1199 } 1200 }
1200 1201
1201 spin_lock(&udc->lock); 1202 spin_lock_irqsave(&udc->lock, flags);
1202 1203
1203 if (udc->driver) { 1204 if (udc->driver) {
1204 dev_err(udc->isp->dev, "UDC already has a gadget driver\n"); 1205 dev_err(udc->isp->dev, "UDC already has a gadget driver\n");
@@ -1208,7 +1209,7 @@ static int isp1760_udc_start(struct usb_gadget *gadget,
1208 1209
1209 udc->driver = driver; 1210 udc->driver = driver;
1210 1211
1211 spin_unlock(&udc->lock); 1212 spin_unlock_irqrestore(&udc->lock, flags);
1212 1213
1213 dev_dbg(udc->isp->dev, "starting UDC with driver %s\n", 1214 dev_dbg(udc->isp->dev, "starting UDC with driver %s\n",
1214 driver->function); 1215 driver->function);
@@ -1232,6 +1233,7 @@ static int isp1760_udc_start(struct usb_gadget *gadget,
1232static int isp1760_udc_stop(struct usb_gadget *gadget) 1233static int isp1760_udc_stop(struct usb_gadget *gadget)
1233{ 1234{
1234 struct isp1760_udc *udc = gadget_to_udc(gadget); 1235 struct isp1760_udc *udc = gadget_to_udc(gadget);
1236 unsigned long flags;
1235 1237
1236 dev_dbg(udc->isp->dev, "%s\n", __func__); 1238 dev_dbg(udc->isp->dev, "%s\n", __func__);
1237 1239
@@ -1239,9 +1241,9 @@ static int isp1760_udc_stop(struct usb_gadget *gadget)
1239 1241
1240 isp1760_udc_write(udc, DC_MODE, 0); 1242 isp1760_udc_write(udc, DC_MODE, 0);
1241 1243
1242 spin_lock(&udc->lock); 1244 spin_lock_irqsave(&udc->lock, flags);
1243 udc->driver = NULL; 1245 udc->driver = NULL;
1244 spin_unlock(&udc->lock); 1246 spin_unlock_irqrestore(&udc->lock, flags);
1245 1247
1246 return 0; 1248 return 0;
1247} 1249}
@@ -1411,7 +1413,7 @@ static int isp1760_udc_init(struct isp1760_udc *udc)
1411 return -ENODEV; 1413 return -ENODEV;
1412 } 1414 }
1413 1415
1414 if (chipid != 0x00011582) { 1416 if (chipid != 0x00011582 && chipid != 0x00158210) {
1415 dev_err(udc->isp->dev, "udc: invalid chip ID 0x%08x\n", chipid); 1417 dev_err(udc->isp->dev, "udc: invalid chip ID 0x%08x\n", chipid);
1416 return -ENODEV; 1418 return -ENODEV;
1417 } 1419 }
@@ -1451,8 +1453,8 @@ int isp1760_udc_register(struct isp1760_device *isp, int irq,
1451 1453
1452 sprintf(udc->irqname, "%s (udc)", devname); 1454 sprintf(udc->irqname, "%s (udc)", devname);
1453 1455
1454 ret = request_irq(irq, isp1760_udc_irq, IRQF_SHARED | IRQF_DISABLED | 1456 ret = request_irq(irq, isp1760_udc_irq, IRQF_SHARED | irqflags,
1455 irqflags, udc->irqname, udc); 1457 udc->irqname, udc);
1456 if (ret < 0) 1458 if (ret < 0)
1457 goto error; 1459 goto error;
1458 1460
diff --git a/drivers/usb/musb/Kconfig b/drivers/usb/musb/Kconfig
index 14e1628483d9..39db8b603627 100644
--- a/drivers/usb/musb/Kconfig
+++ b/drivers/usb/musb/Kconfig
@@ -79,7 +79,8 @@ config USB_MUSB_TUSB6010
79 79
80config USB_MUSB_OMAP2PLUS 80config USB_MUSB_OMAP2PLUS
81 tristate "OMAP2430 and onwards" 81 tristate "OMAP2430 and onwards"
82 depends on ARCH_OMAP2PLUS && USB && OMAP_CONTROL_PHY 82 depends on ARCH_OMAP2PLUS && USB
83 depends on OMAP_CONTROL_PHY || !OMAP_CONTROL_PHY
83 select GENERIC_PHY 84 select GENERIC_PHY
84 85
85config USB_MUSB_AM35X 86config USB_MUSB_AM35X
diff --git a/drivers/usb/musb/musb_core.c b/drivers/usb/musb/musb_core.c
index e6f4cbfeed97..067920f2d570 100644
--- a/drivers/usb/musb/musb_core.c
+++ b/drivers/usb/musb/musb_core.c
@@ -1969,10 +1969,6 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
1969 goto fail0; 1969 goto fail0;
1970 } 1970 }
1971 1971
1972 pm_runtime_use_autosuspend(musb->controller);
1973 pm_runtime_set_autosuspend_delay(musb->controller, 200);
1974 pm_runtime_enable(musb->controller);
1975
1976 spin_lock_init(&musb->lock); 1972 spin_lock_init(&musb->lock);
1977 musb->board_set_power = plat->set_power; 1973 musb->board_set_power = plat->set_power;
1978 musb->min_power = plat->min_power; 1974 musb->min_power = plat->min_power;
@@ -1991,6 +1987,12 @@ musb_init_controller(struct device *dev, int nIrq, void __iomem *ctrl)
1991 musb_readl = musb_default_readl; 1987 musb_readl = musb_default_readl;
1992 musb_writel = musb_default_writel; 1988 musb_writel = musb_default_writel;
1993 1989
1990 /* We need musb_read/write functions initialized for PM */
1991 pm_runtime_use_autosuspend(musb->controller);
1992 pm_runtime_set_autosuspend_delay(musb->controller, 200);
1993 pm_runtime_irq_safe(musb->controller);
1994 pm_runtime_enable(musb->controller);
1995
1994 /* The musb_platform_init() call: 1996 /* The musb_platform_init() call:
1995 * - adjusts musb->mregs 1997 * - adjusts musb->mregs
1996 * - sets the musb->isr 1998 * - sets the musb->isr
diff --git a/drivers/usb/musb/musb_dsps.c b/drivers/usb/musb/musb_dsps.c
index 53bd0e71d19f..a900c9877195 100644
--- a/drivers/usb/musb/musb_dsps.c
+++ b/drivers/usb/musb/musb_dsps.c
@@ -457,12 +457,27 @@ static int dsps_musb_init(struct musb *musb)
457 if (IS_ERR(musb->xceiv)) 457 if (IS_ERR(musb->xceiv))
458 return PTR_ERR(musb->xceiv); 458 return PTR_ERR(musb->xceiv);
459 459
460 musb->phy = devm_phy_get(dev->parent, "usb2-phy");
461
460 /* Returns zero if e.g. not clocked */ 462 /* Returns zero if e.g. not clocked */
461 rev = dsps_readl(reg_base, wrp->revision); 463 rev = dsps_readl(reg_base, wrp->revision);
462 if (!rev) 464 if (!rev)
463 return -ENODEV; 465 return -ENODEV;
464 466
465 usb_phy_init(musb->xceiv); 467 usb_phy_init(musb->xceiv);
468 if (IS_ERR(musb->phy)) {
469 musb->phy = NULL;
470 } else {
471 ret = phy_init(musb->phy);
472 if (ret < 0)
473 return ret;
474 ret = phy_power_on(musb->phy);
475 if (ret) {
476 phy_exit(musb->phy);
477 return ret;
478 }
479 }
480
466 setup_timer(&glue->timer, otg_timer, (unsigned long) musb); 481 setup_timer(&glue->timer, otg_timer, (unsigned long) musb);
467 482
468 /* Reset the musb */ 483 /* Reset the musb */
@@ -502,6 +517,8 @@ static int dsps_musb_exit(struct musb *musb)
502 517
503 del_timer_sync(&glue->timer); 518 del_timer_sync(&glue->timer);
504 usb_phy_shutdown(musb->xceiv); 519 usb_phy_shutdown(musb->xceiv);
520 phy_power_off(musb->phy);
521 phy_exit(musb->phy);
505 debugfs_remove_recursive(glue->dbgfs_root); 522 debugfs_remove_recursive(glue->dbgfs_root);
506 523
507 return 0; 524 return 0;
@@ -610,7 +627,7 @@ static int dsps_musb_reset(struct musb *musb)
610 struct device *dev = musb->controller; 627 struct device *dev = musb->controller;
611 struct dsps_glue *glue = dev_get_drvdata(dev->parent); 628 struct dsps_glue *glue = dev_get_drvdata(dev->parent);
612 const struct dsps_musb_wrapper *wrp = glue->wrp; 629 const struct dsps_musb_wrapper *wrp = glue->wrp;
613 int session_restart = 0; 630 int session_restart = 0, error;
614 631
615 if (glue->sw_babble_enabled) 632 if (glue->sw_babble_enabled)
616 session_restart = sw_babble_control(musb); 633 session_restart = sw_babble_control(musb);
@@ -624,8 +641,14 @@ static int dsps_musb_reset(struct musb *musb)
624 dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset)); 641 dsps_writel(musb->ctrl_base, wrp->control, (1 << wrp->reset));
625 usleep_range(100, 200); 642 usleep_range(100, 200);
626 usb_phy_shutdown(musb->xceiv); 643 usb_phy_shutdown(musb->xceiv);
644 error = phy_power_off(musb->phy);
645 if (error)
646 dev_err(dev, "phy shutdown failed: %i\n", error);
627 usleep_range(100, 200); 647 usleep_range(100, 200);
628 usb_phy_init(musb->xceiv); 648 usb_phy_init(musb->xceiv);
649 error = phy_power_on(musb->phy);
650 if (error)
651 dev_err(dev, "phy powerup failed: %i\n", error);
629 session_restart = 1; 652 session_restart = 1;
630 } 653 }
631 654
@@ -687,7 +710,7 @@ static int dsps_create_musb_pdev(struct dsps_glue *glue,
687 struct musb_hdrc_config *config; 710 struct musb_hdrc_config *config;
688 struct platform_device *musb; 711 struct platform_device *musb;
689 struct device_node *dn = parent->dev.of_node; 712 struct device_node *dn = parent->dev.of_node;
690 int ret; 713 int ret, val;
691 714
692 memset(resources, 0, sizeof(resources)); 715 memset(resources, 0, sizeof(resources));
693 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc"); 716 res = platform_get_resource_byname(parent, IORESOURCE_MEM, "mc");
@@ -739,7 +762,10 @@ static int dsps_create_musb_pdev(struct dsps_glue *glue,
739 pdata.mode = get_musb_port_mode(dev); 762 pdata.mode = get_musb_port_mode(dev);
740 /* DT keeps this entry in mA, musb expects it as per USB spec */ 763 /* DT keeps this entry in mA, musb expects it as per USB spec */
741 pdata.power = get_int_prop(dn, "mentor,power") / 2; 764 pdata.power = get_int_prop(dn, "mentor,power") / 2;
742 config->multipoint = of_property_read_bool(dn, "mentor,multipoint"); 765
766 ret = of_property_read_u32(dn, "mentor,multipoint", &val);
767 if (!ret && val)
768 config->multipoint = true;
743 769
744 ret = platform_device_add_data(musb, &pdata, sizeof(pdata)); 770 ret = platform_device_add_data(musb, &pdata, sizeof(pdata));
745 if (ret) { 771 if (ret) {
diff --git a/drivers/usb/musb/musb_host.c b/drivers/usb/musb/musb_host.c
index 883a9adfdfff..c3d5fc9dfb5b 100644
--- a/drivers/usb/musb/musb_host.c
+++ b/drivers/usb/musb/musb_host.c
@@ -2613,7 +2613,7 @@ static const struct hc_driver musb_hc_driver = {
2613 .description = "musb-hcd", 2613 .description = "musb-hcd",
2614 .product_desc = "MUSB HDRC host driver", 2614 .product_desc = "MUSB HDRC host driver",
2615 .hcd_priv_size = sizeof(struct musb *), 2615 .hcd_priv_size = sizeof(struct musb *),
2616 .flags = HCD_USB2 | HCD_MEMORY, 2616 .flags = HCD_USB2 | HCD_MEMORY | HCD_BH,
2617 2617
2618 /* not using irq handler or reset hooks from usbcore, since 2618 /* not using irq handler or reset hooks from usbcore, since
2619 * those must be shared with peripheral code for OTG configs 2619 * those must be shared with peripheral code for OTG configs
diff --git a/drivers/usb/musb/omap2430.c b/drivers/usb/musb/omap2430.c
index 763649eb4987..cc752d8c7773 100644
--- a/drivers/usb/musb/omap2430.c
+++ b/drivers/usb/musb/omap2430.c
@@ -516,7 +516,7 @@ static int omap2430_probe(struct platform_device *pdev)
516 struct omap2430_glue *glue; 516 struct omap2430_glue *glue;
517 struct device_node *np = pdev->dev.of_node; 517 struct device_node *np = pdev->dev.of_node;
518 struct musb_hdrc_config *config; 518 struct musb_hdrc_config *config;
519 int ret = -ENOMEM; 519 int ret = -ENOMEM, val;
520 520
521 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL); 521 glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
522 if (!glue) 522 if (!glue)
@@ -559,7 +559,10 @@ static int omap2430_probe(struct platform_device *pdev)
559 of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps); 559 of_property_read_u32(np, "num-eps", (u32 *)&config->num_eps);
560 of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits); 560 of_property_read_u32(np, "ram-bits", (u32 *)&config->ram_bits);
561 of_property_read_u32(np, "power", (u32 *)&pdata->power); 561 of_property_read_u32(np, "power", (u32 *)&pdata->power);
562 config->multipoint = of_property_read_bool(np, "multipoint"); 562
563 ret = of_property_read_u32(np, "multipoint", &val);
564 if (!ret && val)
565 config->multipoint = true;
563 566
564 pdata->board_data = data; 567 pdata->board_data = data;
565 pdata->config = config; 568 pdata->config = config;
diff --git a/drivers/usb/phy/phy-am335x-control.c b/drivers/usb/phy/phy-am335x-control.c
index 403fab772724..7b3035ff9434 100644
--- a/drivers/usb/phy/phy-am335x-control.c
+++ b/drivers/usb/phy/phy-am335x-control.c
@@ -126,6 +126,9 @@ struct phy_control *am335x_get_phy_control(struct device *dev)
126 return NULL; 126 return NULL;
127 127
128 dev = bus_find_device(&platform_bus_type, NULL, node, match); 128 dev = bus_find_device(&platform_bus_type, NULL, node, match);
129 if (!dev)
130 return NULL;
131
129 ctrl_usb = dev_get_drvdata(dev); 132 ctrl_usb = dev_get_drvdata(dev);
130 if (!ctrl_usb) 133 if (!ctrl_usb)
131 return NULL; 134 return NULL;
diff --git a/drivers/usb/renesas_usbhs/Kconfig b/drivers/usb/renesas_usbhs/Kconfig
index de83b9d0cd5c..ebc99ee076ce 100644
--- a/drivers/usb/renesas_usbhs/Kconfig
+++ b/drivers/usb/renesas_usbhs/Kconfig
@@ -6,6 +6,7 @@ config USB_RENESAS_USBHS
6 tristate 'Renesas USBHS controller' 6 tristate 'Renesas USBHS controller'
7 depends on USB_GADGET 7 depends on USB_GADGET
8 depends on ARCH_SHMOBILE || SUPERH || COMPILE_TEST 8 depends on ARCH_SHMOBILE || SUPERH || COMPILE_TEST
9 depends on EXTCON || !EXTCON # if EXTCON=m, USBHS cannot be built-in
9 default n 10 default n
10 help 11 help
11 Renesas USBHS is a discrete USB host and peripheral controller chip 12 Renesas USBHS is a discrete USB host and peripheral controller chip
diff --git a/drivers/usb/serial/bus.c b/drivers/usb/serial/bus.c
index 9374bd2aba20..8936a83c96cd 100644
--- a/drivers/usb/serial/bus.c
+++ b/drivers/usb/serial/bus.c
@@ -38,56 +38,51 @@ static int usb_serial_device_match(struct device *dev,
38 return 0; 38 return 0;
39} 39}
40 40
41static ssize_t port_number_show(struct device *dev,
42 struct device_attribute *attr, char *buf)
43{
44 struct usb_serial_port *port = to_usb_serial_port(dev);
45
46 return sprintf(buf, "%d\n", port->port_number);
47}
48static DEVICE_ATTR_RO(port_number);
49
50static int usb_serial_device_probe(struct device *dev) 41static int usb_serial_device_probe(struct device *dev)
51{ 42{
52 struct usb_serial_driver *driver; 43 struct usb_serial_driver *driver;
53 struct usb_serial_port *port; 44 struct usb_serial_port *port;
45 struct device *tty_dev;
54 int retval = 0; 46 int retval = 0;
55 int minor; 47 int minor;
56 48
57 port = to_usb_serial_port(dev); 49 port = to_usb_serial_port(dev);
58 if (!port) { 50 if (!port)
59 retval = -ENODEV; 51 return -ENODEV;
60 goto exit;
61 }
62 52
63 /* make sure suspend/resume doesn't race against port_probe */ 53 /* make sure suspend/resume doesn't race against port_probe */
64 retval = usb_autopm_get_interface(port->serial->interface); 54 retval = usb_autopm_get_interface(port->serial->interface);
65 if (retval) 55 if (retval)
66 goto exit; 56 return retval;
67 57
68 driver = port->serial->type; 58 driver = port->serial->type;
69 if (driver->port_probe) { 59 if (driver->port_probe) {
70 retval = driver->port_probe(port); 60 retval = driver->port_probe(port);
71 if (retval) 61 if (retval)
72 goto exit_with_autopm; 62 goto err_autopm_put;
73 } 63 }
74 64
75 retval = device_create_file(dev, &dev_attr_port_number); 65 minor = port->minor;
76 if (retval) { 66 tty_dev = tty_register_device(usb_serial_tty_driver, minor, dev);
77 if (driver->port_remove) 67 if (IS_ERR(tty_dev)) {
78 retval = driver->port_remove(port); 68 retval = PTR_ERR(tty_dev);
79 goto exit_with_autopm; 69 goto err_port_remove;
80 } 70 }
81 71
82 minor = port->minor; 72 usb_autopm_put_interface(port->serial->interface);
83 tty_register_device(usb_serial_tty_driver, minor, dev); 73
84 dev_info(&port->serial->dev->dev, 74 dev_info(&port->serial->dev->dev,
85 "%s converter now attached to ttyUSB%d\n", 75 "%s converter now attached to ttyUSB%d\n",
86 driver->description, minor); 76 driver->description, minor);
87 77
88exit_with_autopm: 78 return 0;
79
80err_port_remove:
81 if (driver->port_remove)
82 driver->port_remove(port);
83err_autopm_put:
89 usb_autopm_put_interface(port->serial->interface); 84 usb_autopm_put_interface(port->serial->interface);
90exit: 85
91 return retval; 86 return retval;
92} 87}
93 88
@@ -114,8 +109,6 @@ static int usb_serial_device_remove(struct device *dev)
114 minor = port->minor; 109 minor = port->minor;
115 tty_unregister_device(usb_serial_tty_driver, minor); 110 tty_unregister_device(usb_serial_tty_driver, minor);
116 111
117 device_remove_file(&port->dev, &dev_attr_port_number);
118
119 driver = port->serial->type; 112 driver = port->serial->type;
120 if (driver->port_remove) 113 if (driver->port_remove)
121 retval = driver->port_remove(port); 114 retval = driver->port_remove(port);
diff --git a/drivers/usb/serial/ch341.c b/drivers/usb/serial/ch341.c
index 2d72aa3564a3..ede4f5fcfadd 100644
--- a/drivers/usb/serial/ch341.c
+++ b/drivers/usb/serial/ch341.c
@@ -84,6 +84,10 @@ struct ch341_private {
84 u8 line_status; /* active status of modem control inputs */ 84 u8 line_status; /* active status of modem control inputs */
85}; 85};
86 86
87static void ch341_set_termios(struct tty_struct *tty,
88 struct usb_serial_port *port,
89 struct ktermios *old_termios);
90
87static int ch341_control_out(struct usb_device *dev, u8 request, 91static int ch341_control_out(struct usb_device *dev, u8 request,
88 u16 value, u16 index) 92 u16 value, u16 index)
89{ 93{
@@ -309,19 +313,12 @@ static int ch341_open(struct tty_struct *tty, struct usb_serial_port *port)
309 struct ch341_private *priv = usb_get_serial_port_data(port); 313 struct ch341_private *priv = usb_get_serial_port_data(port);
310 int r; 314 int r;
311 315
312 priv->baud_rate = DEFAULT_BAUD_RATE;
313
314 r = ch341_configure(serial->dev, priv); 316 r = ch341_configure(serial->dev, priv);
315 if (r) 317 if (r)
316 goto out; 318 goto out;
317 319
318 r = ch341_set_handshake(serial->dev, priv->line_control); 320 if (tty)
319 if (r) 321 ch341_set_termios(tty, port, NULL);
320 goto out;
321
322 r = ch341_set_baudrate(serial->dev, priv);
323 if (r)
324 goto out;
325 322
326 dev_dbg(&port->dev, "%s - submitting interrupt urb\n", __func__); 323 dev_dbg(&port->dev, "%s - submitting interrupt urb\n", __func__);
327 r = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL); 324 r = usb_submit_urb(port->interrupt_in_urb, GFP_KERNEL);
diff --git a/drivers/usb/serial/console.c b/drivers/usb/serial/console.c
index 29fa1c3d0089..3806e7014199 100644
--- a/drivers/usb/serial/console.c
+++ b/drivers/usb/serial/console.c
@@ -14,6 +14,7 @@
14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 14#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/module.h>
17#include <linux/slab.h> 18#include <linux/slab.h>
18#include <linux/tty.h> 19#include <linux/tty.h>
19#include <linux/console.h> 20#include <linux/console.h>
@@ -144,6 +145,7 @@ static int usb_console_setup(struct console *co, char *options)
144 init_ldsem(&tty->ldisc_sem); 145 init_ldsem(&tty->ldisc_sem);
145 INIT_LIST_HEAD(&tty->tty_files); 146 INIT_LIST_HEAD(&tty->tty_files);
146 kref_get(&tty->driver->kref); 147 kref_get(&tty->driver->kref);
148 __module_get(tty->driver->owner);
147 tty->ops = &usb_console_fake_tty_ops; 149 tty->ops = &usb_console_fake_tty_ops;
148 if (tty_init_termios(tty)) { 150 if (tty_init_termios(tty)) {
149 retval = -ENOMEM; 151 retval = -ENOMEM;
diff --git a/drivers/usb/serial/cp210x.c b/drivers/usb/serial/cp210x.c
index f40c856ff758..84ce2d74894c 100644
--- a/drivers/usb/serial/cp210x.c
+++ b/drivers/usb/serial/cp210x.c
@@ -147,6 +147,8 @@ static const struct usb_device_id id_table[] = {
147 { USB_DEVICE(0x166A, 0x0305) }, /* Clipsal C-5000CT2 C-Bus Spectrum Colour Touchscreen */ 147 { USB_DEVICE(0x166A, 0x0305) }, /* Clipsal C-5000CT2 C-Bus Spectrum Colour Touchscreen */
148 { USB_DEVICE(0x166A, 0x0401) }, /* Clipsal L51xx C-Bus Architectural Dimmer */ 148 { USB_DEVICE(0x166A, 0x0401) }, /* Clipsal L51xx C-Bus Architectural Dimmer */
149 { USB_DEVICE(0x166A, 0x0101) }, /* Clipsal 5560884 C-Bus Multi-room Audio Matrix Switcher */ 149 { USB_DEVICE(0x166A, 0x0101) }, /* Clipsal 5560884 C-Bus Multi-room Audio Matrix Switcher */
150 { USB_DEVICE(0x16C0, 0x09B0) }, /* Lunatico Seletek */
151 { USB_DEVICE(0x16C0, 0x09B1) }, /* Lunatico Seletek */
150 { USB_DEVICE(0x16D6, 0x0001) }, /* Jablotron serial interface */ 152 { USB_DEVICE(0x16D6, 0x0001) }, /* Jablotron serial interface */
151 { USB_DEVICE(0x16DC, 0x0010) }, /* W-IE-NE-R Plein & Baus GmbH PL512 Power Supply */ 153 { USB_DEVICE(0x16DC, 0x0010) }, /* W-IE-NE-R Plein & Baus GmbH PL512 Power Supply */
152 { USB_DEVICE(0x16DC, 0x0011) }, /* W-IE-NE-R Plein & Baus GmbH RCM Remote Control for MARATON Power Supply */ 154 { USB_DEVICE(0x16DC, 0x0011) }, /* W-IE-NE-R Plein & Baus GmbH RCM Remote Control for MARATON Power Supply */
diff --git a/drivers/usb/serial/ftdi_sio.c b/drivers/usb/serial/ftdi_sio.c
index 1ebb351b9e9a..3086dec0ef53 100644
--- a/drivers/usb/serial/ftdi_sio.c
+++ b/drivers/usb/serial/ftdi_sio.c
@@ -799,6 +799,8 @@ static const struct usb_device_id id_table_combined[] = {
799 { USB_DEVICE(FTDI_VID, FTDI_ELSTER_UNICOM_PID) }, 799 { USB_DEVICE(FTDI_VID, FTDI_ELSTER_UNICOM_PID) },
800 { USB_DEVICE(FTDI_VID, FTDI_PROPOX_JTAGCABLEII_PID) }, 800 { USB_DEVICE(FTDI_VID, FTDI_PROPOX_JTAGCABLEII_PID) },
801 { USB_DEVICE(FTDI_VID, FTDI_PROPOX_ISPCABLEIII_PID) }, 801 { USB_DEVICE(FTDI_VID, FTDI_PROPOX_ISPCABLEIII_PID) },
802 { USB_DEVICE(FTDI_VID, CYBER_CORTEX_AV_PID),
803 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
802 { USB_DEVICE(OLIMEX_VID, OLIMEX_ARM_USB_OCD_PID), 804 { USB_DEVICE(OLIMEX_VID, OLIMEX_ARM_USB_OCD_PID),
803 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk }, 805 .driver_info = (kernel_ulong_t)&ftdi_jtag_quirk },
804 { USB_DEVICE(OLIMEX_VID, OLIMEX_ARM_USB_OCD_H_PID), 806 { USB_DEVICE(OLIMEX_VID, OLIMEX_ARM_USB_OCD_H_PID),
@@ -978,6 +980,23 @@ static const struct usb_device_id id_table_combined[] = {
978 { USB_DEVICE_INTERFACE_NUMBER(INFINEON_VID, INFINEON_TRIBOARD_PID, 1) }, 980 { USB_DEVICE_INTERFACE_NUMBER(INFINEON_VID, INFINEON_TRIBOARD_PID, 1) },
979 /* GE Healthcare devices */ 981 /* GE Healthcare devices */
980 { USB_DEVICE(GE_HEALTHCARE_VID, GE_HEALTHCARE_NEMO_TRACKER_PID) }, 982 { USB_DEVICE(GE_HEALTHCARE_VID, GE_HEALTHCARE_NEMO_TRACKER_PID) },
983 /* Active Research (Actisense) devices */
984 { USB_DEVICE(FTDI_VID, ACTISENSE_NDC_PID) },
985 { USB_DEVICE(FTDI_VID, ACTISENSE_USG_PID) },
986 { USB_DEVICE(FTDI_VID, ACTISENSE_NGT_PID) },
987 { USB_DEVICE(FTDI_VID, ACTISENSE_NGW_PID) },
988 { USB_DEVICE(FTDI_VID, ACTISENSE_D9AC_PID) },
989 { USB_DEVICE(FTDI_VID, ACTISENSE_D9AD_PID) },
990 { USB_DEVICE(FTDI_VID, ACTISENSE_D9AE_PID) },
991 { USB_DEVICE(FTDI_VID, ACTISENSE_D9AF_PID) },
992 { USB_DEVICE(FTDI_VID, CHETCO_SEAGAUGE_PID) },
993 { USB_DEVICE(FTDI_VID, CHETCO_SEASWITCH_PID) },
994 { USB_DEVICE(FTDI_VID, CHETCO_SEASMART_NMEA2000_PID) },
995 { USB_DEVICE(FTDI_VID, CHETCO_SEASMART_ETHERNET_PID) },
996 { USB_DEVICE(FTDI_VID, CHETCO_SEASMART_WIFI_PID) },
997 { USB_DEVICE(FTDI_VID, CHETCO_SEASMART_DISPLAY_PID) },
998 { USB_DEVICE(FTDI_VID, CHETCO_SEASMART_LITE_PID) },
999 { USB_DEVICE(FTDI_VID, CHETCO_SEASMART_ANALOG_PID) },
981 { } /* Terminating entry */ 1000 { } /* Terminating entry */
982}; 1001};
983 1002
diff --git a/drivers/usb/serial/ftdi_sio_ids.h b/drivers/usb/serial/ftdi_sio_ids.h
index e52409c9be99..56b1b55c4751 100644
--- a/drivers/usb/serial/ftdi_sio_ids.h
+++ b/drivers/usb/serial/ftdi_sio_ids.h
@@ -38,6 +38,9 @@
38 38
39#define FTDI_LUMEL_PD12_PID 0x6002 39#define FTDI_LUMEL_PD12_PID 0x6002
40 40
41/* Cyber Cortex AV by Fabulous Silicon (http://fabuloussilicon.com) */
42#define CYBER_CORTEX_AV_PID 0x8698
43
41/* 44/*
42 * Marvell OpenRD Base, Client 45 * Marvell OpenRD Base, Client
43 * http://www.open-rd.org 46 * http://www.open-rd.org
@@ -1438,3 +1441,23 @@
1438 */ 1441 */
1439#define GE_HEALTHCARE_VID 0x1901 1442#define GE_HEALTHCARE_VID 0x1901
1440#define GE_HEALTHCARE_NEMO_TRACKER_PID 0x0015 1443#define GE_HEALTHCARE_NEMO_TRACKER_PID 0x0015
1444
1445/*
1446 * Active Research (Actisense) devices
1447 */
1448#define ACTISENSE_NDC_PID 0xD9A8 /* NDC USB Serial Adapter */
1449#define ACTISENSE_USG_PID 0xD9A9 /* USG USB Serial Adapter */
1450#define ACTISENSE_NGT_PID 0xD9AA /* NGT NMEA2000 Interface */
1451#define ACTISENSE_NGW_PID 0xD9AB /* NGW NMEA2000 Gateway */
1452#define ACTISENSE_D9AC_PID 0xD9AC /* Actisense Reserved */
1453#define ACTISENSE_D9AD_PID 0xD9AD /* Actisense Reserved */
1454#define ACTISENSE_D9AE_PID 0xD9AE /* Actisense Reserved */
1455#define ACTISENSE_D9AF_PID 0xD9AF /* Actisense Reserved */
1456#define CHETCO_SEAGAUGE_PID 0xA548 /* SeaGauge USB Adapter */
1457#define CHETCO_SEASWITCH_PID 0xA549 /* SeaSwitch USB Adapter */
1458#define CHETCO_SEASMART_NMEA2000_PID 0xA54A /* SeaSmart NMEA2000 Gateway */
1459#define CHETCO_SEASMART_ETHERNET_PID 0xA54B /* SeaSmart Ethernet Gateway */
1460#define CHETCO_SEASMART_WIFI_PID 0xA5AC /* SeaSmart Wifi Gateway */
1461#define CHETCO_SEASMART_DISPLAY_PID 0xA5AD /* SeaSmart NMEA2000 Display */
1462#define CHETCO_SEASMART_LITE_PID 0xA5AE /* SeaSmart Lite USB Adapter */
1463#define CHETCO_SEASMART_ANALOG_PID 0xA5AF /* SeaSmart Analog Adapter */
diff --git a/drivers/usb/serial/generic.c b/drivers/usb/serial/generic.c
index ccf1df7c4b80..54e170dd3dad 100644
--- a/drivers/usb/serial/generic.c
+++ b/drivers/usb/serial/generic.c
@@ -258,7 +258,8 @@ void usb_serial_generic_wait_until_sent(struct tty_struct *tty, long timeout)
258 * character or at least one jiffy. 258 * character or at least one jiffy.
259 */ 259 */
260 period = max_t(unsigned long, (10 * HZ / bps), 1); 260 period = max_t(unsigned long, (10 * HZ / bps), 1);
261 period = min_t(unsigned long, period, timeout); 261 if (timeout)
262 period = min_t(unsigned long, period, timeout);
262 263
263 dev_dbg(&port->dev, "%s - timeout = %u ms, period = %u ms\n", 264 dev_dbg(&port->dev, "%s - timeout = %u ms, period = %u ms\n",
264 __func__, jiffies_to_msecs(timeout), 265 __func__, jiffies_to_msecs(timeout),
@@ -268,7 +269,7 @@ void usb_serial_generic_wait_until_sent(struct tty_struct *tty, long timeout)
268 schedule_timeout_interruptible(period); 269 schedule_timeout_interruptible(period);
269 if (signal_pending(current)) 270 if (signal_pending(current))
270 break; 271 break;
271 if (time_after(jiffies, expire)) 272 if (timeout && time_after(jiffies, expire))
272 break; 273 break;
273 } 274 }
274} 275}
diff --git a/drivers/usb/serial/mxuport.c b/drivers/usb/serial/mxuport.c
index ab1d690274ae..460a40669967 100644
--- a/drivers/usb/serial/mxuport.c
+++ b/drivers/usb/serial/mxuport.c
@@ -1284,7 +1284,8 @@ static int mxuport_open(struct tty_struct *tty, struct usb_serial_port *port)
1284 } 1284 }
1285 1285
1286 /* Initial port termios */ 1286 /* Initial port termios */
1287 mxuport_set_termios(tty, port, NULL); 1287 if (tty)
1288 mxuport_set_termios(tty, port, NULL);
1288 1289
1289 /* 1290 /*
1290 * TODO: use RQ_VENDOR_GET_MSR, once we know what it 1291 * TODO: use RQ_VENDOR_GET_MSR, once we know what it
diff --git a/drivers/usb/serial/pl2303.c b/drivers/usb/serial/pl2303.c
index 0f872e6b2c87..829604d11f3f 100644
--- a/drivers/usb/serial/pl2303.c
+++ b/drivers/usb/serial/pl2303.c
@@ -132,6 +132,7 @@ MODULE_DEVICE_TABLE(usb, id_table);
132#define UART_OVERRUN_ERROR 0x40 132#define UART_OVERRUN_ERROR 0x40
133#define UART_CTS 0x80 133#define UART_CTS 0x80
134 134
135static void pl2303_set_break(struct usb_serial_port *port, bool enable);
135 136
136enum pl2303_type { 137enum pl2303_type {
137 TYPE_01, /* Type 0 and 1 (difference unknown) */ 138 TYPE_01, /* Type 0 and 1 (difference unknown) */
@@ -615,6 +616,7 @@ static void pl2303_close(struct usb_serial_port *port)
615{ 616{
616 usb_serial_generic_close(port); 617 usb_serial_generic_close(port);
617 usb_kill_urb(port->interrupt_in_urb); 618 usb_kill_urb(port->interrupt_in_urb);
619 pl2303_set_break(port, false);
618} 620}
619 621
620static int pl2303_open(struct tty_struct *tty, struct usb_serial_port *port) 622static int pl2303_open(struct tty_struct *tty, struct usb_serial_port *port)
@@ -741,17 +743,16 @@ static int pl2303_ioctl(struct tty_struct *tty,
741 return -ENOIOCTLCMD; 743 return -ENOIOCTLCMD;
742} 744}
743 745
744static void pl2303_break_ctl(struct tty_struct *tty, int break_state) 746static void pl2303_set_break(struct usb_serial_port *port, bool enable)
745{ 747{
746 struct usb_serial_port *port = tty->driver_data;
747 struct usb_serial *serial = port->serial; 748 struct usb_serial *serial = port->serial;
748 u16 state; 749 u16 state;
749 int result; 750 int result;
750 751
751 if (break_state == 0) 752 if (enable)
752 state = BREAK_OFF;
753 else
754 state = BREAK_ON; 753 state = BREAK_ON;
754 else
755 state = BREAK_OFF;
755 756
756 dev_dbg(&port->dev, "%s - turning break %s\n", __func__, 757 dev_dbg(&port->dev, "%s - turning break %s\n", __func__,
757 state == BREAK_OFF ? "off" : "on"); 758 state == BREAK_OFF ? "off" : "on");
@@ -763,6 +764,13 @@ static void pl2303_break_ctl(struct tty_struct *tty, int break_state)
763 dev_err(&port->dev, "error sending break = %d\n", result); 764 dev_err(&port->dev, "error sending break = %d\n", result);
764} 765}
765 766
767static void pl2303_break_ctl(struct tty_struct *tty, int state)
768{
769 struct usb_serial_port *port = tty->driver_data;
770
771 pl2303_set_break(port, state);
772}
773
766static void pl2303_update_line_status(struct usb_serial_port *port, 774static void pl2303_update_line_status(struct usb_serial_port *port,
767 unsigned char *data, 775 unsigned char *data,
768 unsigned int actual_length) 776 unsigned int actual_length)
diff --git a/drivers/usb/serial/usb-serial.c b/drivers/usb/serial/usb-serial.c
index 475723c006f9..529066bbc7e8 100644
--- a/drivers/usb/serial/usb-serial.c
+++ b/drivers/usb/serial/usb-serial.c
@@ -687,6 +687,21 @@ static void serial_port_dtr_rts(struct tty_port *port, int on)
687 drv->dtr_rts(p, on); 687 drv->dtr_rts(p, on);
688} 688}
689 689
690static ssize_t port_number_show(struct device *dev,
691 struct device_attribute *attr, char *buf)
692{
693 struct usb_serial_port *port = to_usb_serial_port(dev);
694
695 return sprintf(buf, "%u\n", port->port_number);
696}
697static DEVICE_ATTR_RO(port_number);
698
699static struct attribute *usb_serial_port_attrs[] = {
700 &dev_attr_port_number.attr,
701 NULL
702};
703ATTRIBUTE_GROUPS(usb_serial_port);
704
690static const struct tty_port_operations serial_port_ops = { 705static const struct tty_port_operations serial_port_ops = {
691 .carrier_raised = serial_port_carrier_raised, 706 .carrier_raised = serial_port_carrier_raised,
692 .dtr_rts = serial_port_dtr_rts, 707 .dtr_rts = serial_port_dtr_rts,
@@ -902,6 +917,7 @@ static int usb_serial_probe(struct usb_interface *interface,
902 port->dev.driver = NULL; 917 port->dev.driver = NULL;
903 port->dev.bus = &usb_serial_bus_type; 918 port->dev.bus = &usb_serial_bus_type;
904 port->dev.release = &usb_serial_port_release; 919 port->dev.release = &usb_serial_port_release;
920 port->dev.groups = usb_serial_port_groups;
905 device_initialize(&port->dev); 921 device_initialize(&port->dev);
906 } 922 }
907 923
@@ -940,8 +956,9 @@ static int usb_serial_probe(struct usb_interface *interface,
940 port = serial->port[i]; 956 port = serial->port[i];
941 if (kfifo_alloc(&port->write_fifo, PAGE_SIZE, GFP_KERNEL)) 957 if (kfifo_alloc(&port->write_fifo, PAGE_SIZE, GFP_KERNEL))
942 goto probe_error; 958 goto probe_error;
943 buffer_size = max_t(int, serial->type->bulk_out_size, 959 buffer_size = serial->type->bulk_out_size;
944 usb_endpoint_maxp(endpoint)); 960 if (!buffer_size)
961 buffer_size = usb_endpoint_maxp(endpoint);
945 port->bulk_out_size = buffer_size; 962 port->bulk_out_size = buffer_size;
946 port->bulk_out_endpointAddress = endpoint->bEndpointAddress; 963 port->bulk_out_endpointAddress = endpoint->bEndpointAddress;
947 964
diff --git a/drivers/usb/storage/unusual_uas.h b/drivers/usb/storage/unusual_uas.h
index dbc00e56c7f5..c85ea530085f 100644
--- a/drivers/usb/storage/unusual_uas.h
+++ b/drivers/usb/storage/unusual_uas.h
@@ -113,6 +113,20 @@ UNUSUAL_DEV(0x0bc2, 0xab2a, 0x0000, 0x9999,
113 USB_SC_DEVICE, USB_PR_DEVICE, NULL, 113 USB_SC_DEVICE, USB_PR_DEVICE, NULL,
114 US_FL_NO_ATA_1X), 114 US_FL_NO_ATA_1X),
115 115
116/* Reported-by: Benjamin Tissoires <benjamin.tissoires@redhat.com> */
117UNUSUAL_DEV(0x13fd, 0x3940, 0x0000, 0x9999,
118 "Initio Corporation",
119 "",
120 USB_SC_DEVICE, USB_PR_DEVICE, NULL,
121 US_FL_NO_ATA_1X),
122
123/* Reported-by: Tom Arild Naess <tanaess@gmail.com> */
124UNUSUAL_DEV(0x152d, 0x0539, 0x0000, 0x9999,
125 "JMicron",
126 "JMS539",
127 USB_SC_DEVICE, USB_PR_DEVICE, NULL,
128 US_FL_NO_REPORT_OPCODES),
129
116/* Reported-by: Claudio Bizzarri <claudio.bizzarri@gmail.com> */ 130/* Reported-by: Claudio Bizzarri <claudio.bizzarri@gmail.com> */
117UNUSUAL_DEV(0x152d, 0x0567, 0x0000, 0x9999, 131UNUSUAL_DEV(0x152d, 0x0567, 0x0000, 0x9999,
118 "JMicron", 132 "JMicron",
diff --git a/drivers/usb/storage/usb.c b/drivers/usb/storage/usb.c
index d468d02179f4..5600c33fcadb 100644
--- a/drivers/usb/storage/usb.c
+++ b/drivers/usb/storage/usb.c
@@ -889,6 +889,12 @@ static void usb_stor_scan_dwork(struct work_struct *work)
889 !(us->fflags & US_FL_SCM_MULT_TARG)) { 889 !(us->fflags & US_FL_SCM_MULT_TARG)) {
890 mutex_lock(&us->dev_mutex); 890 mutex_lock(&us->dev_mutex);
891 us->max_lun = usb_stor_Bulk_max_lun(us); 891 us->max_lun = usb_stor_Bulk_max_lun(us);
892 /*
893 * Allow proper scanning of devices that present more than 8 LUNs
894 * While not affecting other devices that may need the previous behavior
895 */
896 if (us->max_lun >= 8)
897 us_to_host(us)->max_lun = us->max_lun+1;
892 mutex_unlock(&us->dev_mutex); 898 mutex_unlock(&us->dev_mutex);
893 } 899 }
894 scsi_scan_host(us_to_host(us)); 900 scsi_scan_host(us_to_host(us));
diff --git a/drivers/vfio/pci/vfio_pci.c b/drivers/vfio/pci/vfio_pci.c
index 7cc0122a18ce..f8a186381ae8 100644
--- a/drivers/vfio/pci/vfio_pci.c
+++ b/drivers/vfio/pci/vfio_pci.c
@@ -239,9 +239,12 @@ static int vfio_pci_get_irq_count(struct vfio_pci_device *vdev, int irq_type)
239 239
240 return (flags & PCI_MSIX_FLAGS_QSIZE) + 1; 240 return (flags & PCI_MSIX_FLAGS_QSIZE) + 1;
241 } 241 }
242 } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) 242 } else if (irq_type == VFIO_PCI_ERR_IRQ_INDEX) {
243 if (pci_is_pcie(vdev->pdev)) 243 if (pci_is_pcie(vdev->pdev))
244 return 1; 244 return 1;
245 } else if (irq_type == VFIO_PCI_REQ_IRQ_INDEX) {
246 return 1;
247 }
245 248
246 return 0; 249 return 0;
247} 250}
@@ -464,6 +467,7 @@ static long vfio_pci_ioctl(void *device_data,
464 467
465 switch (info.index) { 468 switch (info.index) {
466 case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX: 469 case VFIO_PCI_INTX_IRQ_INDEX ... VFIO_PCI_MSIX_IRQ_INDEX:
470 case VFIO_PCI_REQ_IRQ_INDEX:
467 break; 471 break;
468 case VFIO_PCI_ERR_IRQ_INDEX: 472 case VFIO_PCI_ERR_IRQ_INDEX:
469 if (pci_is_pcie(vdev->pdev)) 473 if (pci_is_pcie(vdev->pdev))
@@ -828,6 +832,20 @@ static int vfio_pci_mmap(void *device_data, struct vm_area_struct *vma)
828 req_len, vma->vm_page_prot); 832 req_len, vma->vm_page_prot);
829} 833}
830 834
835static void vfio_pci_request(void *device_data, unsigned int count)
836{
837 struct vfio_pci_device *vdev = device_data;
838
839 mutex_lock(&vdev->igate);
840
841 if (vdev->req_trigger) {
842 dev_dbg(&vdev->pdev->dev, "Requesting device from user\n");
843 eventfd_signal(vdev->req_trigger, 1);
844 }
845
846 mutex_unlock(&vdev->igate);
847}
848
831static const struct vfio_device_ops vfio_pci_ops = { 849static const struct vfio_device_ops vfio_pci_ops = {
832 .name = "vfio-pci", 850 .name = "vfio-pci",
833 .open = vfio_pci_open, 851 .open = vfio_pci_open,
@@ -836,6 +854,7 @@ static const struct vfio_device_ops vfio_pci_ops = {
836 .read = vfio_pci_read, 854 .read = vfio_pci_read,
837 .write = vfio_pci_write, 855 .write = vfio_pci_write,
838 .mmap = vfio_pci_mmap, 856 .mmap = vfio_pci_mmap,
857 .request = vfio_pci_request,
839}; 858};
840 859
841static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id) 860static int vfio_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
diff --git a/drivers/vfio/pci/vfio_pci_intrs.c b/drivers/vfio/pci/vfio_pci_intrs.c
index e8d695b3f54e..2027a27546ef 100644
--- a/drivers/vfio/pci/vfio_pci_intrs.c
+++ b/drivers/vfio/pci/vfio_pci_intrs.c
@@ -763,46 +763,70 @@ static int vfio_pci_set_msi_trigger(struct vfio_pci_device *vdev,
763 return 0; 763 return 0;
764} 764}
765 765
766static int vfio_pci_set_err_trigger(struct vfio_pci_device *vdev, 766static int vfio_pci_set_ctx_trigger_single(struct eventfd_ctx **ctx,
767 unsigned index, unsigned start, 767 uint32_t flags, void *data)
768 unsigned count, uint32_t flags, void *data)
769{ 768{
770 int32_t fd = *(int32_t *)data; 769 int32_t fd = *(int32_t *)data;
771 770
772 if ((index != VFIO_PCI_ERR_IRQ_INDEX) || 771 if (!(flags & VFIO_IRQ_SET_DATA_TYPE_MASK))
773 !(flags & VFIO_IRQ_SET_DATA_TYPE_MASK))
774 return -EINVAL; 772 return -EINVAL;
775 773
776 /* DATA_NONE/DATA_BOOL enables loopback testing */ 774 /* DATA_NONE/DATA_BOOL enables loopback testing */
777 if (flags & VFIO_IRQ_SET_DATA_NONE) { 775 if (flags & VFIO_IRQ_SET_DATA_NONE) {
778 if (vdev->err_trigger) 776 if (*ctx)
779 eventfd_signal(vdev->err_trigger, 1); 777 eventfd_signal(*ctx, 1);
780 return 0; 778 return 0;
781 } else if (flags & VFIO_IRQ_SET_DATA_BOOL) { 779 } else if (flags & VFIO_IRQ_SET_DATA_BOOL) {
782 uint8_t trigger = *(uint8_t *)data; 780 uint8_t trigger = *(uint8_t *)data;
783 if (trigger && vdev->err_trigger) 781 if (trigger && *ctx)
784 eventfd_signal(vdev->err_trigger, 1); 782 eventfd_signal(*ctx, 1);
785 return 0; 783 return 0;
786 } 784 }
787 785
788 /* Handle SET_DATA_EVENTFD */ 786 /* Handle SET_DATA_EVENTFD */
789 if (fd == -1) { 787 if (fd == -1) {
790 if (vdev->err_trigger) 788 if (*ctx)
791 eventfd_ctx_put(vdev->err_trigger); 789 eventfd_ctx_put(*ctx);
792 vdev->err_trigger = NULL; 790 *ctx = NULL;
793 return 0; 791 return 0;
794 } else if (fd >= 0) { 792 } else if (fd >= 0) {
795 struct eventfd_ctx *efdctx; 793 struct eventfd_ctx *efdctx;
796 efdctx = eventfd_ctx_fdget(fd); 794 efdctx = eventfd_ctx_fdget(fd);
797 if (IS_ERR(efdctx)) 795 if (IS_ERR(efdctx))
798 return PTR_ERR(efdctx); 796 return PTR_ERR(efdctx);
799 if (vdev->err_trigger) 797 if (*ctx)
800 eventfd_ctx_put(vdev->err_trigger); 798 eventfd_ctx_put(*ctx);
801 vdev->err_trigger = efdctx; 799 *ctx = efdctx;
802 return 0; 800 return 0;
803 } else 801 } else
804 return -EINVAL; 802 return -EINVAL;
805} 803}
804
805static int vfio_pci_set_err_trigger(struct vfio_pci_device *vdev,
806 unsigned index, unsigned start,
807 unsigned count, uint32_t flags, void *data)
808{
809 if (index != VFIO_PCI_ERR_IRQ_INDEX)
810 return -EINVAL;
811
812 /*
813 * We should sanitize start & count, but that wasn't caught
814 * originally, so this IRQ index must forever ignore them :-(
815 */
816
817 return vfio_pci_set_ctx_trigger_single(&vdev->err_trigger, flags, data);
818}
819
820static int vfio_pci_set_req_trigger(struct vfio_pci_device *vdev,
821 unsigned index, unsigned start,
822 unsigned count, uint32_t flags, void *data)
823{
824 if (index != VFIO_PCI_REQ_IRQ_INDEX || start != 0 || count != 1)
825 return -EINVAL;
826
827 return vfio_pci_set_ctx_trigger_single(&vdev->req_trigger, flags, data);
828}
829
806int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev, uint32_t flags, 830int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev, uint32_t flags,
807 unsigned index, unsigned start, unsigned count, 831 unsigned index, unsigned start, unsigned count,
808 void *data) 832 void *data)
@@ -844,6 +868,14 @@ int vfio_pci_set_irqs_ioctl(struct vfio_pci_device *vdev, uint32_t flags,
844 func = vfio_pci_set_err_trigger; 868 func = vfio_pci_set_err_trigger;
845 break; 869 break;
846 } 870 }
871 break;
872 case VFIO_PCI_REQ_IRQ_INDEX:
873 switch (flags & VFIO_IRQ_SET_ACTION_TYPE_MASK) {
874 case VFIO_IRQ_SET_ACTION_TRIGGER:
875 func = vfio_pci_set_req_trigger;
876 break;
877 }
878 break;
847 } 879 }
848 880
849 if (!func) 881 if (!func)
diff --git a/drivers/vfio/pci/vfio_pci_private.h b/drivers/vfio/pci/vfio_pci_private.h
index 671c17a6e6d0..c9f9b323f152 100644
--- a/drivers/vfio/pci/vfio_pci_private.h
+++ b/drivers/vfio/pci/vfio_pci_private.h
@@ -58,6 +58,7 @@ struct vfio_pci_device {
58 struct pci_saved_state *pci_saved_state; 58 struct pci_saved_state *pci_saved_state;
59 int refcnt; 59 int refcnt;
60 struct eventfd_ctx *err_trigger; 60 struct eventfd_ctx *err_trigger;
61 struct eventfd_ctx *req_trigger;
61}; 62};
62 63
63#define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX) 64#define is_intx(vdev) (vdev->irq_type == VFIO_PCI_INTX_IRQ_INDEX)
diff --git a/drivers/vfio/vfio.c b/drivers/vfio/vfio.c
index f018d8d0f975..4cde85501444 100644
--- a/drivers/vfio/vfio.c
+++ b/drivers/vfio/vfio.c
@@ -63,6 +63,11 @@ struct vfio_container {
63 void *iommu_data; 63 void *iommu_data;
64}; 64};
65 65
66struct vfio_unbound_dev {
67 struct device *dev;
68 struct list_head unbound_next;
69};
70
66struct vfio_group { 71struct vfio_group {
67 struct kref kref; 72 struct kref kref;
68 int minor; 73 int minor;
@@ -75,6 +80,8 @@ struct vfio_group {
75 struct notifier_block nb; 80 struct notifier_block nb;
76 struct list_head vfio_next; 81 struct list_head vfio_next;
77 struct list_head container_next; 82 struct list_head container_next;
83 struct list_head unbound_list;
84 struct mutex unbound_lock;
78 atomic_t opened; 85 atomic_t opened;
79}; 86};
80 87
@@ -204,6 +211,8 @@ static struct vfio_group *vfio_create_group(struct iommu_group *iommu_group)
204 kref_init(&group->kref); 211 kref_init(&group->kref);
205 INIT_LIST_HEAD(&group->device_list); 212 INIT_LIST_HEAD(&group->device_list);
206 mutex_init(&group->device_lock); 213 mutex_init(&group->device_lock);
214 INIT_LIST_HEAD(&group->unbound_list);
215 mutex_init(&group->unbound_lock);
207 atomic_set(&group->container_users, 0); 216 atomic_set(&group->container_users, 0);
208 atomic_set(&group->opened, 0); 217 atomic_set(&group->opened, 0);
209 group->iommu_group = iommu_group; 218 group->iommu_group = iommu_group;
@@ -264,13 +273,22 @@ static struct vfio_group *vfio_create_group(struct iommu_group *iommu_group)
264static void vfio_group_release(struct kref *kref) 273static void vfio_group_release(struct kref *kref)
265{ 274{
266 struct vfio_group *group = container_of(kref, struct vfio_group, kref); 275 struct vfio_group *group = container_of(kref, struct vfio_group, kref);
276 struct vfio_unbound_dev *unbound, *tmp;
277 struct iommu_group *iommu_group = group->iommu_group;
267 278
268 WARN_ON(!list_empty(&group->device_list)); 279 WARN_ON(!list_empty(&group->device_list));
269 280
281 list_for_each_entry_safe(unbound, tmp,
282 &group->unbound_list, unbound_next) {
283 list_del(&unbound->unbound_next);
284 kfree(unbound);
285 }
286
270 device_destroy(vfio.class, MKDEV(MAJOR(vfio.group_devt), group->minor)); 287 device_destroy(vfio.class, MKDEV(MAJOR(vfio.group_devt), group->minor));
271 list_del(&group->vfio_next); 288 list_del(&group->vfio_next);
272 vfio_free_group_minor(group->minor); 289 vfio_free_group_minor(group->minor);
273 vfio_group_unlock_and_free(group); 290 vfio_group_unlock_and_free(group);
291 iommu_group_put(iommu_group);
274} 292}
275 293
276static void vfio_group_put(struct vfio_group *group) 294static void vfio_group_put(struct vfio_group *group)
@@ -440,17 +458,36 @@ static bool vfio_whitelisted_driver(struct device_driver *drv)
440} 458}
441 459
442/* 460/*
443 * A vfio group is viable for use by userspace if all devices are either 461 * A vfio group is viable for use by userspace if all devices are in
444 * driver-less or bound to a vfio or whitelisted driver. We test the 462 * one of the following states:
445 * latter by the existence of a struct vfio_device matching the dev. 463 * - driver-less
464 * - bound to a vfio driver
465 * - bound to a whitelisted driver
466 *
467 * We use two methods to determine whether a device is bound to a vfio
468 * driver. The first is to test whether the device exists in the vfio
469 * group. The second is to test if the device exists on the group
470 * unbound_list, indicating it's in the middle of transitioning from
471 * a vfio driver to driver-less.
446 */ 472 */
447static int vfio_dev_viable(struct device *dev, void *data) 473static int vfio_dev_viable(struct device *dev, void *data)
448{ 474{
449 struct vfio_group *group = data; 475 struct vfio_group *group = data;
450 struct vfio_device *device; 476 struct vfio_device *device;
451 struct device_driver *drv = ACCESS_ONCE(dev->driver); 477 struct device_driver *drv = ACCESS_ONCE(dev->driver);
478 struct vfio_unbound_dev *unbound;
479 int ret = -EINVAL;
452 480
453 if (!drv || vfio_whitelisted_driver(drv)) 481 mutex_lock(&group->unbound_lock);
482 list_for_each_entry(unbound, &group->unbound_list, unbound_next) {
483 if (dev == unbound->dev) {
484 ret = 0;
485 break;
486 }
487 }
488 mutex_unlock(&group->unbound_lock);
489
490 if (!ret || !drv || vfio_whitelisted_driver(drv))
454 return 0; 491 return 0;
455 492
456 device = vfio_group_get_device(group, dev); 493 device = vfio_group_get_device(group, dev);
@@ -459,7 +496,7 @@ static int vfio_dev_viable(struct device *dev, void *data)
459 return 0; 496 return 0;
460 } 497 }
461 498
462 return -EINVAL; 499 return ret;
463} 500}
464 501
465/** 502/**
@@ -501,6 +538,7 @@ static int vfio_iommu_group_notifier(struct notifier_block *nb,
501{ 538{
502 struct vfio_group *group = container_of(nb, struct vfio_group, nb); 539 struct vfio_group *group = container_of(nb, struct vfio_group, nb);
503 struct device *dev = data; 540 struct device *dev = data;
541 struct vfio_unbound_dev *unbound;
504 542
505 /* 543 /*
506 * Need to go through a group_lock lookup to get a reference or we 544 * Need to go through a group_lock lookup to get a reference or we
@@ -550,6 +588,17 @@ static int vfio_iommu_group_notifier(struct notifier_block *nb,
550 * stop the system to maintain isolation. At a minimum, we'd 588 * stop the system to maintain isolation. At a minimum, we'd
551 * want a toggle to disable driver auto probe for this device. 589 * want a toggle to disable driver auto probe for this device.
552 */ 590 */
591
592 mutex_lock(&group->unbound_lock);
593 list_for_each_entry(unbound,
594 &group->unbound_list, unbound_next) {
595 if (dev == unbound->dev) {
596 list_del(&unbound->unbound_next);
597 kfree(unbound);
598 break;
599 }
600 }
601 mutex_unlock(&group->unbound_lock);
553 break; 602 break;
554 } 603 }
555 604
@@ -578,6 +627,12 @@ int vfio_add_group_dev(struct device *dev,
578 iommu_group_put(iommu_group); 627 iommu_group_put(iommu_group);
579 return PTR_ERR(group); 628 return PTR_ERR(group);
580 } 629 }
630 } else {
631 /*
632 * A found vfio_group already holds a reference to the
633 * iommu_group. A created vfio_group keeps the reference.
634 */
635 iommu_group_put(iommu_group);
581 } 636 }
582 637
583 device = vfio_group_get_device(group, dev); 638 device = vfio_group_get_device(group, dev);
@@ -586,21 +641,19 @@ int vfio_add_group_dev(struct device *dev,
586 dev_name(dev), iommu_group_id(iommu_group)); 641 dev_name(dev), iommu_group_id(iommu_group));
587 vfio_device_put(device); 642 vfio_device_put(device);
588 vfio_group_put(group); 643 vfio_group_put(group);
589 iommu_group_put(iommu_group);
590 return -EBUSY; 644 return -EBUSY;
591 } 645 }
592 646
593 device = vfio_group_create_device(group, dev, ops, device_data); 647 device = vfio_group_create_device(group, dev, ops, device_data);
594 if (IS_ERR(device)) { 648 if (IS_ERR(device)) {
595 vfio_group_put(group); 649 vfio_group_put(group);
596 iommu_group_put(iommu_group);
597 return PTR_ERR(device); 650 return PTR_ERR(device);
598 } 651 }
599 652
600 /* 653 /*
601 * Added device holds reference to iommu_group and vfio_device 654 * Drop all but the vfio_device reference. The vfio_device holds
602 * (which in turn holds reference to vfio_group). Drop extra 655 * a reference to the vfio_group, which holds a reference to the
603 * group reference used while acquiring device. 656 * iommu_group.
604 */ 657 */
605 vfio_group_put(group); 658 vfio_group_put(group);
606 659
@@ -655,8 +708,9 @@ void *vfio_del_group_dev(struct device *dev)
655{ 708{
656 struct vfio_device *device = dev_get_drvdata(dev); 709 struct vfio_device *device = dev_get_drvdata(dev);
657 struct vfio_group *group = device->group; 710 struct vfio_group *group = device->group;
658 struct iommu_group *iommu_group = group->iommu_group;
659 void *device_data = device->device_data; 711 void *device_data = device->device_data;
712 struct vfio_unbound_dev *unbound;
713 unsigned int i = 0;
660 714
661 /* 715 /*
662 * The group exists so long as we have a device reference. Get 716 * The group exists so long as we have a device reference. Get
@@ -664,14 +718,49 @@ void *vfio_del_group_dev(struct device *dev)
664 */ 718 */
665 vfio_group_get(group); 719 vfio_group_get(group);
666 720
721 /*
722 * When the device is removed from the group, the group suddenly
723 * becomes non-viable; the device has a driver (until the unbind
724 * completes), but it's not present in the group. This is bad news
725 * for any external users that need to re-acquire a group reference
726 * in order to match and release their existing reference. To
727 * solve this, we track such devices on the unbound_list to bridge
728 * the gap until they're fully unbound.
729 */
730 unbound = kzalloc(sizeof(*unbound), GFP_KERNEL);
731 if (unbound) {
732 unbound->dev = dev;
733 mutex_lock(&group->unbound_lock);
734 list_add(&unbound->unbound_next, &group->unbound_list);
735 mutex_unlock(&group->unbound_lock);
736 }
737 WARN_ON(!unbound);
738
667 vfio_device_put(device); 739 vfio_device_put(device);
668 740
669 /* TODO send a signal to encourage this to be released */ 741 /*
670 wait_event(vfio.release_q, !vfio_dev_present(group, dev)); 742 * If the device is still present in the group after the above
743 * 'put', then it is in use and we need to request it from the
744 * bus driver. The driver may in turn need to request the
745 * device from the user. We send the request on an arbitrary
746 * interval with counter to allow the driver to take escalating
747 * measures to release the device if it has the ability to do so.
748 */
749 do {
750 device = vfio_group_get_device(group, dev);
751 if (!device)
752 break;
671 753
672 vfio_group_put(group); 754 if (device->ops->request)
755 device->ops->request(device_data, i++);
673 756
674 iommu_group_put(iommu_group); 757 vfio_device_put(device);
758
759 } while (wait_event_interruptible_timeout(vfio.release_q,
760 !vfio_dev_present(group, dev),
761 HZ * 10) <= 0);
762
763 vfio_group_put(group);
675 764
676 return device_data; 765 return device_data;
677} 766}
diff --git a/drivers/vfio/vfio_iommu_type1.c b/drivers/vfio/vfio_iommu_type1.c
index 4a9d666f1e91..57d8c37a002b 100644
--- a/drivers/vfio/vfio_iommu_type1.c
+++ b/drivers/vfio/vfio_iommu_type1.c
@@ -66,6 +66,7 @@ struct vfio_domain {
66 struct list_head next; 66 struct list_head next;
67 struct list_head group_list; 67 struct list_head group_list;
68 int prot; /* IOMMU_CACHE */ 68 int prot; /* IOMMU_CACHE */
69 bool fgsp; /* Fine-grained super pages */
69}; 70};
70 71
71struct vfio_dma { 72struct vfio_dma {
@@ -264,6 +265,7 @@ static long vfio_pin_pages(unsigned long vaddr, long npage,
264 unsigned long limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT; 265 unsigned long limit = rlimit(RLIMIT_MEMLOCK) >> PAGE_SHIFT;
265 bool lock_cap = capable(CAP_IPC_LOCK); 266 bool lock_cap = capable(CAP_IPC_LOCK);
266 long ret, i; 267 long ret, i;
268 bool rsvd;
267 269
268 if (!current->mm) 270 if (!current->mm)
269 return -ENODEV; 271 return -ENODEV;
@@ -272,10 +274,9 @@ static long vfio_pin_pages(unsigned long vaddr, long npage,
272 if (ret) 274 if (ret)
273 return ret; 275 return ret;
274 276
275 if (is_invalid_reserved_pfn(*pfn_base)) 277 rsvd = is_invalid_reserved_pfn(*pfn_base);
276 return 1;
277 278
278 if (!lock_cap && current->mm->locked_vm + 1 > limit) { 279 if (!rsvd && !lock_cap && current->mm->locked_vm + 1 > limit) {
279 put_pfn(*pfn_base, prot); 280 put_pfn(*pfn_base, prot);
280 pr_warn("%s: RLIMIT_MEMLOCK (%ld) exceeded\n", __func__, 281 pr_warn("%s: RLIMIT_MEMLOCK (%ld) exceeded\n", __func__,
281 limit << PAGE_SHIFT); 282 limit << PAGE_SHIFT);
@@ -283,7 +284,8 @@ static long vfio_pin_pages(unsigned long vaddr, long npage,
283 } 284 }
284 285
285 if (unlikely(disable_hugepages)) { 286 if (unlikely(disable_hugepages)) {
286 vfio_lock_acct(1); 287 if (!rsvd)
288 vfio_lock_acct(1);
287 return 1; 289 return 1;
288 } 290 }
289 291
@@ -295,12 +297,14 @@ static long vfio_pin_pages(unsigned long vaddr, long npage,
295 if (ret) 297 if (ret)
296 break; 298 break;
297 299
298 if (pfn != *pfn_base + i || is_invalid_reserved_pfn(pfn)) { 300 if (pfn != *pfn_base + i ||
301 rsvd != is_invalid_reserved_pfn(pfn)) {
299 put_pfn(pfn, prot); 302 put_pfn(pfn, prot);
300 break; 303 break;
301 } 304 }
302 305
303 if (!lock_cap && current->mm->locked_vm + i + 1 > limit) { 306 if (!rsvd && !lock_cap &&
307 current->mm->locked_vm + i + 1 > limit) {
304 put_pfn(pfn, prot); 308 put_pfn(pfn, prot);
305 pr_warn("%s: RLIMIT_MEMLOCK (%ld) exceeded\n", 309 pr_warn("%s: RLIMIT_MEMLOCK (%ld) exceeded\n",
306 __func__, limit << PAGE_SHIFT); 310 __func__, limit << PAGE_SHIFT);
@@ -308,7 +312,8 @@ static long vfio_pin_pages(unsigned long vaddr, long npage,
308 } 312 }
309 } 313 }
310 314
311 vfio_lock_acct(i); 315 if (!rsvd)
316 vfio_lock_acct(i);
312 317
313 return i; 318 return i;
314} 319}
@@ -346,12 +351,14 @@ static void vfio_unmap_unpin(struct vfio_iommu *iommu, struct vfio_dma *dma)
346 domain = d = list_first_entry(&iommu->domain_list, 351 domain = d = list_first_entry(&iommu->domain_list,
347 struct vfio_domain, next); 352 struct vfio_domain, next);
348 353
349 list_for_each_entry_continue(d, &iommu->domain_list, next) 354 list_for_each_entry_continue(d, &iommu->domain_list, next) {
350 iommu_unmap(d->domain, dma->iova, dma->size); 355 iommu_unmap(d->domain, dma->iova, dma->size);
356 cond_resched();
357 }
351 358
352 while (iova < end) { 359 while (iova < end) {
353 size_t unmapped; 360 size_t unmapped, len;
354 phys_addr_t phys; 361 phys_addr_t phys, next;
355 362
356 phys = iommu_iova_to_phys(domain->domain, iova); 363 phys = iommu_iova_to_phys(domain->domain, iova);
357 if (WARN_ON(!phys)) { 364 if (WARN_ON(!phys)) {
@@ -359,7 +366,19 @@ static void vfio_unmap_unpin(struct vfio_iommu *iommu, struct vfio_dma *dma)
359 continue; 366 continue;
360 } 367 }
361 368
362 unmapped = iommu_unmap(domain->domain, iova, PAGE_SIZE); 369 /*
370 * To optimize for fewer iommu_unmap() calls, each of which
371 * may require hardware cache flushing, try to find the
372 * largest contiguous physical memory chunk to unmap.
373 */
374 for (len = PAGE_SIZE;
375 !domain->fgsp && iova + len < end; len += PAGE_SIZE) {
376 next = iommu_iova_to_phys(domain->domain, iova + len);
377 if (next != phys + len)
378 break;
379 }
380
381 unmapped = iommu_unmap(domain->domain, iova, len);
363 if (WARN_ON(!unmapped)) 382 if (WARN_ON(!unmapped))
364 break; 383 break;
365 384
@@ -367,6 +386,8 @@ static void vfio_unmap_unpin(struct vfio_iommu *iommu, struct vfio_dma *dma)
367 unmapped >> PAGE_SHIFT, 386 unmapped >> PAGE_SHIFT,
368 dma->prot, false); 387 dma->prot, false);
369 iova += unmapped; 388 iova += unmapped;
389
390 cond_resched();
370 } 391 }
371 392
372 vfio_lock_acct(-unlocked); 393 vfio_lock_acct(-unlocked);
@@ -511,6 +532,8 @@ static int vfio_iommu_map(struct vfio_iommu *iommu, dma_addr_t iova,
511 map_try_harder(d, iova, pfn, npage, prot)) 532 map_try_harder(d, iova, pfn, npage, prot))
512 goto unwind; 533 goto unwind;
513 } 534 }
535
536 cond_resched();
514 } 537 }
515 538
516 return 0; 539 return 0;
@@ -665,6 +688,39 @@ static int vfio_iommu_replay(struct vfio_iommu *iommu,
665 return 0; 688 return 0;
666} 689}
667 690
691/*
692 * We change our unmap behavior slightly depending on whether the IOMMU
693 * supports fine-grained superpages. IOMMUs like AMD-Vi will use a superpage
694 * for practically any contiguous power-of-two mapping we give it. This means
695 * we don't need to look for contiguous chunks ourselves to make unmapping
696 * more efficient. On IOMMUs with coarse-grained super pages, like Intel VT-d
697 * with discrete 2M/1G/512G/1T superpages, identifying contiguous chunks
698 * significantly boosts non-hugetlbfs mappings and doesn't seem to hurt when
699 * hugetlbfs is in use.
700 */
701static void vfio_test_domain_fgsp(struct vfio_domain *domain)
702{
703 struct page *pages;
704 int ret, order = get_order(PAGE_SIZE * 2);
705
706 pages = alloc_pages(GFP_KERNEL | __GFP_ZERO, order);
707 if (!pages)
708 return;
709
710 ret = iommu_map(domain->domain, 0, page_to_phys(pages), PAGE_SIZE * 2,
711 IOMMU_READ | IOMMU_WRITE | domain->prot);
712 if (!ret) {
713 size_t unmapped = iommu_unmap(domain->domain, 0, PAGE_SIZE);
714
715 if (unmapped == PAGE_SIZE)
716 iommu_unmap(domain->domain, PAGE_SIZE, PAGE_SIZE);
717 else
718 domain->fgsp = true;
719 }
720
721 __free_pages(pages, order);
722}
723
668static int vfio_iommu_type1_attach_group(void *iommu_data, 724static int vfio_iommu_type1_attach_group(void *iommu_data,
669 struct iommu_group *iommu_group) 725 struct iommu_group *iommu_group)
670{ 726{
@@ -758,6 +814,8 @@ static int vfio_iommu_type1_attach_group(void *iommu_data,
758 } 814 }
759 } 815 }
760 816
817 vfio_test_domain_fgsp(domain);
818
761 /* replay mappings on new domains */ 819 /* replay mappings on new domains */
762 ret = vfio_iommu_replay(iommu, domain); 820 ret = vfio_iommu_replay(iommu, domain);
763 if (ret) 821 if (ret)
diff --git a/drivers/vhost/net.c b/drivers/vhost/net.c
index afa06d28725d..2bbfc25e582c 100644
--- a/drivers/vhost/net.c
+++ b/drivers/vhost/net.c
@@ -591,11 +591,6 @@ static void handle_rx(struct vhost_net *net)
591 * TODO: support TSO. 591 * TODO: support TSO.
592 */ 592 */
593 iov_iter_advance(&msg.msg_iter, vhost_hlen); 593 iov_iter_advance(&msg.msg_iter, vhost_hlen);
594 } else {
595 /* It'll come from socket; we'll need to patch
596 * ->num_buffers over if VIRTIO_NET_F_MRG_RXBUF
597 */
598 iov_iter_advance(&fixup, sizeof(hdr));
599 } 594 }
600 err = sock->ops->recvmsg(NULL, sock, &msg, 595 err = sock->ops->recvmsg(NULL, sock, &msg,
601 sock_len, MSG_DONTWAIT | MSG_TRUNC); 596 sock_len, MSG_DONTWAIT | MSG_TRUNC);
@@ -609,17 +604,25 @@ static void handle_rx(struct vhost_net *net)
609 continue; 604 continue;
610 } 605 }
611 /* Supply virtio_net_hdr if VHOST_NET_F_VIRTIO_NET_HDR */ 606 /* Supply virtio_net_hdr if VHOST_NET_F_VIRTIO_NET_HDR */
612 if (unlikely(vhost_hlen) && 607 if (unlikely(vhost_hlen)) {
613 copy_to_iter(&hdr, sizeof(hdr), &fixup) != sizeof(hdr)) { 608 if (copy_to_iter(&hdr, sizeof(hdr),
614 vq_err(vq, "Unable to write vnet_hdr at addr %p\n", 609 &fixup) != sizeof(hdr)) {
615 vq->iov->iov_base); 610 vq_err(vq, "Unable to write vnet_hdr "
616 break; 611 "at addr %p\n", vq->iov->iov_base);
612 break;
613 }
614 } else {
615 /* Header came from socket; we'll need to patch
616 * ->num_buffers over if VIRTIO_NET_F_MRG_RXBUF
617 */
618 iov_iter_advance(&fixup, sizeof(hdr));
617 } 619 }
618 /* TODO: Should check and handle checksum. */ 620 /* TODO: Should check and handle checksum. */
619 621
620 num_buffers = cpu_to_vhost16(vq, headcount); 622 num_buffers = cpu_to_vhost16(vq, headcount);
621 if (likely(mergeable) && 623 if (likely(mergeable) &&
622 copy_to_iter(&num_buffers, 2, &fixup) != 2) { 624 copy_to_iter(&num_buffers, sizeof num_buffers,
625 &fixup) != sizeof num_buffers) {
623 vq_err(vq, "Failed num_buffers write"); 626 vq_err(vq, "Failed num_buffers write");
624 vhost_discard_vq_desc(vq, headcount); 627 vhost_discard_vq_desc(vq, headcount);
625 break; 628 break;
diff --git a/drivers/vhost/scsi.c b/drivers/vhost/scsi.c
index dc78d87e0fc2..71df240a467a 100644
--- a/drivers/vhost/scsi.c
+++ b/drivers/vhost/scsi.c
@@ -38,7 +38,6 @@
38#include <linux/miscdevice.h> 38#include <linux/miscdevice.h>
39#include <asm/unaligned.h> 39#include <asm/unaligned.h>
40#include <scsi/scsi.h> 40#include <scsi/scsi.h>
41#include <scsi/scsi_tcq.h>
42#include <target/target_core_base.h> 41#include <target/target_core_base.h>
43#include <target/target_core_fabric.h> 42#include <target/target_core_fabric.h>
44#include <target/target_core_fabric_configfs.h> 43#include <target/target_core_fabric_configfs.h>
@@ -52,13 +51,13 @@
52 51
53#include "vhost.h" 52#include "vhost.h"
54 53
55#define TCM_VHOST_VERSION "v0.1" 54#define VHOST_SCSI_VERSION "v0.1"
56#define TCM_VHOST_NAMELEN 256 55#define VHOST_SCSI_NAMELEN 256
57#define TCM_VHOST_MAX_CDB_SIZE 32 56#define VHOST_SCSI_MAX_CDB_SIZE 32
58#define TCM_VHOST_DEFAULT_TAGS 256 57#define VHOST_SCSI_DEFAULT_TAGS 256
59#define TCM_VHOST_PREALLOC_SGLS 2048 58#define VHOST_SCSI_PREALLOC_SGLS 2048
60#define TCM_VHOST_PREALLOC_UPAGES 2048 59#define VHOST_SCSI_PREALLOC_UPAGES 2048
61#define TCM_VHOST_PREALLOC_PROT_SGLS 512 60#define VHOST_SCSI_PREALLOC_PROT_SGLS 512
62 61
63struct vhost_scsi_inflight { 62struct vhost_scsi_inflight {
64 /* Wait for the flush operation to finish */ 63 /* Wait for the flush operation to finish */
@@ -67,11 +66,13 @@ struct vhost_scsi_inflight {
67 struct kref kref; 66 struct kref kref;
68}; 67};
69 68
70struct tcm_vhost_cmd { 69struct vhost_scsi_cmd {
71 /* Descriptor from vhost_get_vq_desc() for virt_queue segment */ 70 /* Descriptor from vhost_get_vq_desc() for virt_queue segment */
72 int tvc_vq_desc; 71 int tvc_vq_desc;
73 /* virtio-scsi initiator task attribute */ 72 /* virtio-scsi initiator task attribute */
74 int tvc_task_attr; 73 int tvc_task_attr;
74 /* virtio-scsi response incoming iovecs */
75 int tvc_in_iovs;
75 /* virtio-scsi initiator data direction */ 76 /* virtio-scsi initiator data direction */
76 enum dma_data_direction tvc_data_direction; 77 enum dma_data_direction tvc_data_direction;
77 /* Expected data transfer length from virtio-scsi header */ 78 /* Expected data transfer length from virtio-scsi header */
@@ -81,26 +82,26 @@ struct tcm_vhost_cmd {
81 /* The number of scatterlists associated with this cmd */ 82 /* The number of scatterlists associated with this cmd */
82 u32 tvc_sgl_count; 83 u32 tvc_sgl_count;
83 u32 tvc_prot_sgl_count; 84 u32 tvc_prot_sgl_count;
84 /* Saved unpacked SCSI LUN for tcm_vhost_submission_work() */ 85 /* Saved unpacked SCSI LUN for vhost_scsi_submission_work() */
85 u32 tvc_lun; 86 u32 tvc_lun;
86 /* Pointer to the SGL formatted memory from virtio-scsi */ 87 /* Pointer to the SGL formatted memory from virtio-scsi */
87 struct scatterlist *tvc_sgl; 88 struct scatterlist *tvc_sgl;
88 struct scatterlist *tvc_prot_sgl; 89 struct scatterlist *tvc_prot_sgl;
89 struct page **tvc_upages; 90 struct page **tvc_upages;
90 /* Pointer to response */ 91 /* Pointer to response header iovec */
91 struct virtio_scsi_cmd_resp __user *tvc_resp; 92 struct iovec *tvc_resp_iov;
92 /* Pointer to vhost_scsi for our device */ 93 /* Pointer to vhost_scsi for our device */
93 struct vhost_scsi *tvc_vhost; 94 struct vhost_scsi *tvc_vhost;
94 /* Pointer to vhost_virtqueue for the cmd */ 95 /* Pointer to vhost_virtqueue for the cmd */
95 struct vhost_virtqueue *tvc_vq; 96 struct vhost_virtqueue *tvc_vq;
96 /* Pointer to vhost nexus memory */ 97 /* Pointer to vhost nexus memory */
97 struct tcm_vhost_nexus *tvc_nexus; 98 struct vhost_scsi_nexus *tvc_nexus;
98 /* The TCM I/O descriptor that is accessed via container_of() */ 99 /* The TCM I/O descriptor that is accessed via container_of() */
99 struct se_cmd tvc_se_cmd; 100 struct se_cmd tvc_se_cmd;
100 /* work item used for cmwq dispatch to tcm_vhost_submission_work() */ 101 /* work item used for cmwq dispatch to vhost_scsi_submission_work() */
101 struct work_struct work; 102 struct work_struct work;
102 /* Copy of the incoming SCSI command descriptor block (CDB) */ 103 /* Copy of the incoming SCSI command descriptor block (CDB) */
103 unsigned char tvc_cdb[TCM_VHOST_MAX_CDB_SIZE]; 104 unsigned char tvc_cdb[VHOST_SCSI_MAX_CDB_SIZE];
104 /* Sense buffer that will be mapped into outgoing status */ 105 /* Sense buffer that will be mapped into outgoing status */
105 unsigned char tvc_sense_buf[TRANSPORT_SENSE_BUFFER]; 106 unsigned char tvc_sense_buf[TRANSPORT_SENSE_BUFFER];
106 /* Completed commands list, serviced from vhost worker thread */ 107 /* Completed commands list, serviced from vhost worker thread */
@@ -109,53 +110,53 @@ struct tcm_vhost_cmd {
109 struct vhost_scsi_inflight *inflight; 110 struct vhost_scsi_inflight *inflight;
110}; 111};
111 112
112struct tcm_vhost_nexus { 113struct vhost_scsi_nexus {
113 /* Pointer to TCM session for I_T Nexus */ 114 /* Pointer to TCM session for I_T Nexus */
114 struct se_session *tvn_se_sess; 115 struct se_session *tvn_se_sess;
115}; 116};
116 117
117struct tcm_vhost_nacl { 118struct vhost_scsi_nacl {
118 /* Binary World Wide unique Port Name for Vhost Initiator port */ 119 /* Binary World Wide unique Port Name for Vhost Initiator port */
119 u64 iport_wwpn; 120 u64 iport_wwpn;
120 /* ASCII formatted WWPN for Sas Initiator port */ 121 /* ASCII formatted WWPN for Sas Initiator port */
121 char iport_name[TCM_VHOST_NAMELEN]; 122 char iport_name[VHOST_SCSI_NAMELEN];
122 /* Returned by tcm_vhost_make_nodeacl() */ 123 /* Returned by vhost_scsi_make_nodeacl() */
123 struct se_node_acl se_node_acl; 124 struct se_node_acl se_node_acl;
124}; 125};
125 126
126struct tcm_vhost_tpg { 127struct vhost_scsi_tpg {
127 /* Vhost port target portal group tag for TCM */ 128 /* Vhost port target portal group tag for TCM */
128 u16 tport_tpgt; 129 u16 tport_tpgt;
129 /* Used to track number of TPG Port/Lun Links wrt to explict I_T Nexus shutdown */ 130 /* Used to track number of TPG Port/Lun Links wrt to explict I_T Nexus shutdown */
130 int tv_tpg_port_count; 131 int tv_tpg_port_count;
131 /* Used for vhost_scsi device reference to tpg_nexus, protected by tv_tpg_mutex */ 132 /* Used for vhost_scsi device reference to tpg_nexus, protected by tv_tpg_mutex */
132 int tv_tpg_vhost_count; 133 int tv_tpg_vhost_count;
133 /* list for tcm_vhost_list */ 134 /* list for vhost_scsi_list */
134 struct list_head tv_tpg_list; 135 struct list_head tv_tpg_list;
135 /* Used to protect access for tpg_nexus */ 136 /* Used to protect access for tpg_nexus */
136 struct mutex tv_tpg_mutex; 137 struct mutex tv_tpg_mutex;
137 /* Pointer to the TCM VHost I_T Nexus for this TPG endpoint */ 138 /* Pointer to the TCM VHost I_T Nexus for this TPG endpoint */
138 struct tcm_vhost_nexus *tpg_nexus; 139 struct vhost_scsi_nexus *tpg_nexus;
139 /* Pointer back to tcm_vhost_tport */ 140 /* Pointer back to vhost_scsi_tport */
140 struct tcm_vhost_tport *tport; 141 struct vhost_scsi_tport *tport;
141 /* Returned by tcm_vhost_make_tpg() */ 142 /* Returned by vhost_scsi_make_tpg() */
142 struct se_portal_group se_tpg; 143 struct se_portal_group se_tpg;
143 /* Pointer back to vhost_scsi, protected by tv_tpg_mutex */ 144 /* Pointer back to vhost_scsi, protected by tv_tpg_mutex */
144 struct vhost_scsi *vhost_scsi; 145 struct vhost_scsi *vhost_scsi;
145}; 146};
146 147
147struct tcm_vhost_tport { 148struct vhost_scsi_tport {
148 /* SCSI protocol the tport is providing */ 149 /* SCSI protocol the tport is providing */
149 u8 tport_proto_id; 150 u8 tport_proto_id;
150 /* Binary World Wide unique Port Name for Vhost Target port */ 151 /* Binary World Wide unique Port Name for Vhost Target port */
151 u64 tport_wwpn; 152 u64 tport_wwpn;
152 /* ASCII formatted WWPN for Vhost Target port */ 153 /* ASCII formatted WWPN for Vhost Target port */
153 char tport_name[TCM_VHOST_NAMELEN]; 154 char tport_name[VHOST_SCSI_NAMELEN];
154 /* Returned by tcm_vhost_make_tport() */ 155 /* Returned by vhost_scsi_make_tport() */
155 struct se_wwn tport_wwn; 156 struct se_wwn tport_wwn;
156}; 157};
157 158
158struct tcm_vhost_evt { 159struct vhost_scsi_evt {
159 /* event to be sent to guest */ 160 /* event to be sent to guest */
160 struct virtio_scsi_event event; 161 struct virtio_scsi_event event;
161 /* event list, serviced from vhost worker thread */ 162 /* event list, serviced from vhost worker thread */
@@ -171,7 +172,9 @@ enum {
171/* Note: can't set VIRTIO_F_VERSION_1 yet, since that implies ANY_LAYOUT. */ 172/* Note: can't set VIRTIO_F_VERSION_1 yet, since that implies ANY_LAYOUT. */
172enum { 173enum {
173 VHOST_SCSI_FEATURES = VHOST_FEATURES | (1ULL << VIRTIO_SCSI_F_HOTPLUG) | 174 VHOST_SCSI_FEATURES = VHOST_FEATURES | (1ULL << VIRTIO_SCSI_F_HOTPLUG) |
174 (1ULL << VIRTIO_SCSI_F_T10_PI) 175 (1ULL << VIRTIO_SCSI_F_T10_PI) |
176 (1ULL << VIRTIO_F_ANY_LAYOUT) |
177 (1ULL << VIRTIO_F_VERSION_1)
175}; 178};
176 179
177#define VHOST_SCSI_MAX_TARGET 256 180#define VHOST_SCSI_MAX_TARGET 256
@@ -195,7 +198,7 @@ struct vhost_scsi_virtqueue {
195 198
196struct vhost_scsi { 199struct vhost_scsi {
197 /* Protected by vhost_scsi->dev.mutex */ 200 /* Protected by vhost_scsi->dev.mutex */
198 struct tcm_vhost_tpg **vs_tpg; 201 struct vhost_scsi_tpg **vs_tpg;
199 char vs_vhost_wwpn[TRANSPORT_IQN_LEN]; 202 char vs_vhost_wwpn[TRANSPORT_IQN_LEN];
200 203
201 struct vhost_dev dev; 204 struct vhost_dev dev;
@@ -212,21 +215,21 @@ struct vhost_scsi {
212}; 215};
213 216
214/* Local pointer to allocated TCM configfs fabric module */ 217/* Local pointer to allocated TCM configfs fabric module */
215static struct target_fabric_configfs *tcm_vhost_fabric_configfs; 218static struct target_fabric_configfs *vhost_scsi_fabric_configfs;
216 219
217static struct workqueue_struct *tcm_vhost_workqueue; 220static struct workqueue_struct *vhost_scsi_workqueue;
218 221
219/* Global spinlock to protect tcm_vhost TPG list for vhost IOCTL access */ 222/* Global spinlock to protect vhost_scsi TPG list for vhost IOCTL access */
220static DEFINE_MUTEX(tcm_vhost_mutex); 223static DEFINE_MUTEX(vhost_scsi_mutex);
221static LIST_HEAD(tcm_vhost_list); 224static LIST_HEAD(vhost_scsi_list);
222 225
223static int iov_num_pages(struct iovec *iov) 226static int iov_num_pages(void __user *iov_base, size_t iov_len)
224{ 227{
225 return (PAGE_ALIGN((unsigned long)iov->iov_base + iov->iov_len) - 228 return (PAGE_ALIGN((unsigned long)iov_base + iov_len) -
226 ((unsigned long)iov->iov_base & PAGE_MASK)) >> PAGE_SHIFT; 229 ((unsigned long)iov_base & PAGE_MASK)) >> PAGE_SHIFT;
227} 230}
228 231
229static void tcm_vhost_done_inflight(struct kref *kref) 232static void vhost_scsi_done_inflight(struct kref *kref)
230{ 233{
231 struct vhost_scsi_inflight *inflight; 234 struct vhost_scsi_inflight *inflight;
232 235
@@ -234,7 +237,7 @@ static void tcm_vhost_done_inflight(struct kref *kref)
234 complete(&inflight->comp); 237 complete(&inflight->comp);
235} 238}
236 239
237static void tcm_vhost_init_inflight(struct vhost_scsi *vs, 240static void vhost_scsi_init_inflight(struct vhost_scsi *vs,
238 struct vhost_scsi_inflight *old_inflight[]) 241 struct vhost_scsi_inflight *old_inflight[])
239{ 242{
240 struct vhost_scsi_inflight *new_inflight; 243 struct vhost_scsi_inflight *new_inflight;
@@ -262,7 +265,7 @@ static void tcm_vhost_init_inflight(struct vhost_scsi *vs,
262} 265}
263 266
264static struct vhost_scsi_inflight * 267static struct vhost_scsi_inflight *
265tcm_vhost_get_inflight(struct vhost_virtqueue *vq) 268vhost_scsi_get_inflight(struct vhost_virtqueue *vq)
266{ 269{
267 struct vhost_scsi_inflight *inflight; 270 struct vhost_scsi_inflight *inflight;
268 struct vhost_scsi_virtqueue *svq; 271 struct vhost_scsi_virtqueue *svq;
@@ -274,31 +277,31 @@ tcm_vhost_get_inflight(struct vhost_virtqueue *vq)
274 return inflight; 277 return inflight;
275} 278}
276 279
277static void tcm_vhost_put_inflight(struct vhost_scsi_inflight *inflight) 280static void vhost_scsi_put_inflight(struct vhost_scsi_inflight *inflight)
278{ 281{
279 kref_put(&inflight->kref, tcm_vhost_done_inflight); 282 kref_put(&inflight->kref, vhost_scsi_done_inflight);
280} 283}
281 284
282static int tcm_vhost_check_true(struct se_portal_group *se_tpg) 285static int vhost_scsi_check_true(struct se_portal_group *se_tpg)
283{ 286{
284 return 1; 287 return 1;
285} 288}
286 289
287static int tcm_vhost_check_false(struct se_portal_group *se_tpg) 290static int vhost_scsi_check_false(struct se_portal_group *se_tpg)
288{ 291{
289 return 0; 292 return 0;
290} 293}
291 294
292static char *tcm_vhost_get_fabric_name(void) 295static char *vhost_scsi_get_fabric_name(void)
293{ 296{
294 return "vhost"; 297 return "vhost";
295} 298}
296 299
297static u8 tcm_vhost_get_fabric_proto_ident(struct se_portal_group *se_tpg) 300static u8 vhost_scsi_get_fabric_proto_ident(struct se_portal_group *se_tpg)
298{ 301{
299 struct tcm_vhost_tpg *tpg = container_of(se_tpg, 302 struct vhost_scsi_tpg *tpg = container_of(se_tpg,
300 struct tcm_vhost_tpg, se_tpg); 303 struct vhost_scsi_tpg, se_tpg);
301 struct tcm_vhost_tport *tport = tpg->tport; 304 struct vhost_scsi_tport *tport = tpg->tport;
302 305
303 switch (tport->tport_proto_id) { 306 switch (tport->tport_proto_id) {
304 case SCSI_PROTOCOL_SAS: 307 case SCSI_PROTOCOL_SAS:
@@ -316,37 +319,37 @@ static u8 tcm_vhost_get_fabric_proto_ident(struct se_portal_group *se_tpg)
316 return sas_get_fabric_proto_ident(se_tpg); 319 return sas_get_fabric_proto_ident(se_tpg);
317} 320}
318 321
319static char *tcm_vhost_get_fabric_wwn(struct se_portal_group *se_tpg) 322static char *vhost_scsi_get_fabric_wwn(struct se_portal_group *se_tpg)
320{ 323{
321 struct tcm_vhost_tpg *tpg = container_of(se_tpg, 324 struct vhost_scsi_tpg *tpg = container_of(se_tpg,
322 struct tcm_vhost_tpg, se_tpg); 325 struct vhost_scsi_tpg, se_tpg);
323 struct tcm_vhost_tport *tport = tpg->tport; 326 struct vhost_scsi_tport *tport = tpg->tport;
324 327
325 return &tport->tport_name[0]; 328 return &tport->tport_name[0];
326} 329}
327 330
328static u16 tcm_vhost_get_tag(struct se_portal_group *se_tpg) 331static u16 vhost_scsi_get_tpgt(struct se_portal_group *se_tpg)
329{ 332{
330 struct tcm_vhost_tpg *tpg = container_of(se_tpg, 333 struct vhost_scsi_tpg *tpg = container_of(se_tpg,
331 struct tcm_vhost_tpg, se_tpg); 334 struct vhost_scsi_tpg, se_tpg);
332 return tpg->tport_tpgt; 335 return tpg->tport_tpgt;
333} 336}
334 337
335static u32 tcm_vhost_get_default_depth(struct se_portal_group *se_tpg) 338static u32 vhost_scsi_get_default_depth(struct se_portal_group *se_tpg)
336{ 339{
337 return 1; 340 return 1;
338} 341}
339 342
340static u32 343static u32
341tcm_vhost_get_pr_transport_id(struct se_portal_group *se_tpg, 344vhost_scsi_get_pr_transport_id(struct se_portal_group *se_tpg,
342 struct se_node_acl *se_nacl, 345 struct se_node_acl *se_nacl,
343 struct t10_pr_registration *pr_reg, 346 struct t10_pr_registration *pr_reg,
344 int *format_code, 347 int *format_code,
345 unsigned char *buf) 348 unsigned char *buf)
346{ 349{
347 struct tcm_vhost_tpg *tpg = container_of(se_tpg, 350 struct vhost_scsi_tpg *tpg = container_of(se_tpg,
348 struct tcm_vhost_tpg, se_tpg); 351 struct vhost_scsi_tpg, se_tpg);
349 struct tcm_vhost_tport *tport = tpg->tport; 352 struct vhost_scsi_tport *tport = tpg->tport;
350 353
351 switch (tport->tport_proto_id) { 354 switch (tport->tport_proto_id) {
352 case SCSI_PROTOCOL_SAS: 355 case SCSI_PROTOCOL_SAS:
@@ -369,14 +372,14 @@ tcm_vhost_get_pr_transport_id(struct se_portal_group *se_tpg,
369} 372}
370 373
371static u32 374static u32
372tcm_vhost_get_pr_transport_id_len(struct se_portal_group *se_tpg, 375vhost_scsi_get_pr_transport_id_len(struct se_portal_group *se_tpg,
373 struct se_node_acl *se_nacl, 376 struct se_node_acl *se_nacl,
374 struct t10_pr_registration *pr_reg, 377 struct t10_pr_registration *pr_reg,
375 int *format_code) 378 int *format_code)
376{ 379{
377 struct tcm_vhost_tpg *tpg = container_of(se_tpg, 380 struct vhost_scsi_tpg *tpg = container_of(se_tpg,
378 struct tcm_vhost_tpg, se_tpg); 381 struct vhost_scsi_tpg, se_tpg);
379 struct tcm_vhost_tport *tport = tpg->tport; 382 struct vhost_scsi_tport *tport = tpg->tport;
380 383
381 switch (tport->tport_proto_id) { 384 switch (tport->tport_proto_id) {
382 case SCSI_PROTOCOL_SAS: 385 case SCSI_PROTOCOL_SAS:
@@ -399,14 +402,14 @@ tcm_vhost_get_pr_transport_id_len(struct se_portal_group *se_tpg,
399} 402}
400 403
401static char * 404static char *
402tcm_vhost_parse_pr_out_transport_id(struct se_portal_group *se_tpg, 405vhost_scsi_parse_pr_out_transport_id(struct se_portal_group *se_tpg,
403 const char *buf, 406 const char *buf,
404 u32 *out_tid_len, 407 u32 *out_tid_len,
405 char **port_nexus_ptr) 408 char **port_nexus_ptr)
406{ 409{
407 struct tcm_vhost_tpg *tpg = container_of(se_tpg, 410 struct vhost_scsi_tpg *tpg = container_of(se_tpg,
408 struct tcm_vhost_tpg, se_tpg); 411 struct vhost_scsi_tpg, se_tpg);
409 struct tcm_vhost_tport *tport = tpg->tport; 412 struct vhost_scsi_tport *tport = tpg->tport;
410 413
411 switch (tport->tport_proto_id) { 414 switch (tport->tport_proto_id) {
412 case SCSI_PROTOCOL_SAS: 415 case SCSI_PROTOCOL_SAS:
@@ -429,13 +432,13 @@ tcm_vhost_parse_pr_out_transport_id(struct se_portal_group *se_tpg,
429} 432}
430 433
431static struct se_node_acl * 434static struct se_node_acl *
432tcm_vhost_alloc_fabric_acl(struct se_portal_group *se_tpg) 435vhost_scsi_alloc_fabric_acl(struct se_portal_group *se_tpg)
433{ 436{
434 struct tcm_vhost_nacl *nacl; 437 struct vhost_scsi_nacl *nacl;
435 438
436 nacl = kzalloc(sizeof(struct tcm_vhost_nacl), GFP_KERNEL); 439 nacl = kzalloc(sizeof(struct vhost_scsi_nacl), GFP_KERNEL);
437 if (!nacl) { 440 if (!nacl) {
438 pr_err("Unable to allocate struct tcm_vhost_nacl\n"); 441 pr_err("Unable to allocate struct vhost_scsi_nacl\n");
439 return NULL; 442 return NULL;
440 } 443 }
441 444
@@ -443,24 +446,24 @@ tcm_vhost_alloc_fabric_acl(struct se_portal_group *se_tpg)
443} 446}
444 447
445static void 448static void
446tcm_vhost_release_fabric_acl(struct se_portal_group *se_tpg, 449vhost_scsi_release_fabric_acl(struct se_portal_group *se_tpg,
447 struct se_node_acl *se_nacl) 450 struct se_node_acl *se_nacl)
448{ 451{
449 struct tcm_vhost_nacl *nacl = container_of(se_nacl, 452 struct vhost_scsi_nacl *nacl = container_of(se_nacl,
450 struct tcm_vhost_nacl, se_node_acl); 453 struct vhost_scsi_nacl, se_node_acl);
451 kfree(nacl); 454 kfree(nacl);
452} 455}
453 456
454static u32 tcm_vhost_tpg_get_inst_index(struct se_portal_group *se_tpg) 457static u32 vhost_scsi_tpg_get_inst_index(struct se_portal_group *se_tpg)
455{ 458{
456 return 1; 459 return 1;
457} 460}
458 461
459static void tcm_vhost_release_cmd(struct se_cmd *se_cmd) 462static void vhost_scsi_release_cmd(struct se_cmd *se_cmd)
460{ 463{
461 struct tcm_vhost_cmd *tv_cmd = container_of(se_cmd, 464 struct vhost_scsi_cmd *tv_cmd = container_of(se_cmd,
462 struct tcm_vhost_cmd, tvc_se_cmd); 465 struct vhost_scsi_cmd, tvc_se_cmd);
463 struct se_session *se_sess = se_cmd->se_sess; 466 struct se_session *se_sess = tv_cmd->tvc_nexus->tvn_se_sess;
464 int i; 467 int i;
465 468
466 if (tv_cmd->tvc_sgl_count) { 469 if (tv_cmd->tvc_sgl_count) {
@@ -472,53 +475,53 @@ static void tcm_vhost_release_cmd(struct se_cmd *se_cmd)
472 put_page(sg_page(&tv_cmd->tvc_prot_sgl[i])); 475 put_page(sg_page(&tv_cmd->tvc_prot_sgl[i]));
473 } 476 }
474 477
475 tcm_vhost_put_inflight(tv_cmd->inflight); 478 vhost_scsi_put_inflight(tv_cmd->inflight);
476 percpu_ida_free(&se_sess->sess_tag_pool, se_cmd->map_tag); 479 percpu_ida_free(&se_sess->sess_tag_pool, se_cmd->map_tag);
477} 480}
478 481
479static int tcm_vhost_shutdown_session(struct se_session *se_sess) 482static int vhost_scsi_shutdown_session(struct se_session *se_sess)
480{ 483{
481 return 0; 484 return 0;
482} 485}
483 486
484static void tcm_vhost_close_session(struct se_session *se_sess) 487static void vhost_scsi_close_session(struct se_session *se_sess)
485{ 488{
486 return; 489 return;
487} 490}
488 491
489static u32 tcm_vhost_sess_get_index(struct se_session *se_sess) 492static u32 vhost_scsi_sess_get_index(struct se_session *se_sess)
490{ 493{
491 return 0; 494 return 0;
492} 495}
493 496
494static int tcm_vhost_write_pending(struct se_cmd *se_cmd) 497static int vhost_scsi_write_pending(struct se_cmd *se_cmd)
495{ 498{
496 /* Go ahead and process the write immediately */ 499 /* Go ahead and process the write immediately */
497 target_execute_cmd(se_cmd); 500 target_execute_cmd(se_cmd);
498 return 0; 501 return 0;
499} 502}
500 503
501static int tcm_vhost_write_pending_status(struct se_cmd *se_cmd) 504static int vhost_scsi_write_pending_status(struct se_cmd *se_cmd)
502{ 505{
503 return 0; 506 return 0;
504} 507}
505 508
506static void tcm_vhost_set_default_node_attrs(struct se_node_acl *nacl) 509static void vhost_scsi_set_default_node_attrs(struct se_node_acl *nacl)
507{ 510{
508 return; 511 return;
509} 512}
510 513
511static u32 tcm_vhost_get_task_tag(struct se_cmd *se_cmd) 514static u32 vhost_scsi_get_task_tag(struct se_cmd *se_cmd)
512{ 515{
513 return 0; 516 return 0;
514} 517}
515 518
516static int tcm_vhost_get_cmd_state(struct se_cmd *se_cmd) 519static int vhost_scsi_get_cmd_state(struct se_cmd *se_cmd)
517{ 520{
518 return 0; 521 return 0;
519} 522}
520 523
521static void vhost_scsi_complete_cmd(struct tcm_vhost_cmd *cmd) 524static void vhost_scsi_complete_cmd(struct vhost_scsi_cmd *cmd)
522{ 525{
523 struct vhost_scsi *vs = cmd->tvc_vhost; 526 struct vhost_scsi *vs = cmd->tvc_vhost;
524 527
@@ -527,44 +530,44 @@ static void vhost_scsi_complete_cmd(struct tcm_vhost_cmd *cmd)
527 vhost_work_queue(&vs->dev, &vs->vs_completion_work); 530 vhost_work_queue(&vs->dev, &vs->vs_completion_work);
528} 531}
529 532
530static int tcm_vhost_queue_data_in(struct se_cmd *se_cmd) 533static int vhost_scsi_queue_data_in(struct se_cmd *se_cmd)
531{ 534{
532 struct tcm_vhost_cmd *cmd = container_of(se_cmd, 535 struct vhost_scsi_cmd *cmd = container_of(se_cmd,
533 struct tcm_vhost_cmd, tvc_se_cmd); 536 struct vhost_scsi_cmd, tvc_se_cmd);
534 vhost_scsi_complete_cmd(cmd); 537 vhost_scsi_complete_cmd(cmd);
535 return 0; 538 return 0;
536} 539}
537 540
538static int tcm_vhost_queue_status(struct se_cmd *se_cmd) 541static int vhost_scsi_queue_status(struct se_cmd *se_cmd)
539{ 542{
540 struct tcm_vhost_cmd *cmd = container_of(se_cmd, 543 struct vhost_scsi_cmd *cmd = container_of(se_cmd,
541 struct tcm_vhost_cmd, tvc_se_cmd); 544 struct vhost_scsi_cmd, tvc_se_cmd);
542 vhost_scsi_complete_cmd(cmd); 545 vhost_scsi_complete_cmd(cmd);
543 return 0; 546 return 0;
544} 547}
545 548
546static void tcm_vhost_queue_tm_rsp(struct se_cmd *se_cmd) 549static void vhost_scsi_queue_tm_rsp(struct se_cmd *se_cmd)
547{ 550{
548 return; 551 return;
549} 552}
550 553
551static void tcm_vhost_aborted_task(struct se_cmd *se_cmd) 554static void vhost_scsi_aborted_task(struct se_cmd *se_cmd)
552{ 555{
553 return; 556 return;
554} 557}
555 558
556static void tcm_vhost_free_evt(struct vhost_scsi *vs, struct tcm_vhost_evt *evt) 559static void vhost_scsi_free_evt(struct vhost_scsi *vs, struct vhost_scsi_evt *evt)
557{ 560{
558 vs->vs_events_nr--; 561 vs->vs_events_nr--;
559 kfree(evt); 562 kfree(evt);
560} 563}
561 564
562static struct tcm_vhost_evt * 565static struct vhost_scsi_evt *
563tcm_vhost_allocate_evt(struct vhost_scsi *vs, 566vhost_scsi_allocate_evt(struct vhost_scsi *vs,
564 u32 event, u32 reason) 567 u32 event, u32 reason)
565{ 568{
566 struct vhost_virtqueue *vq = &vs->vqs[VHOST_SCSI_VQ_EVT].vq; 569 struct vhost_virtqueue *vq = &vs->vqs[VHOST_SCSI_VQ_EVT].vq;
567 struct tcm_vhost_evt *evt; 570 struct vhost_scsi_evt *evt;
568 571
569 if (vs->vs_events_nr > VHOST_SCSI_MAX_EVENT) { 572 if (vs->vs_events_nr > VHOST_SCSI_MAX_EVENT) {
570 vs->vs_events_missed = true; 573 vs->vs_events_missed = true;
@@ -573,7 +576,7 @@ tcm_vhost_allocate_evt(struct vhost_scsi *vs,
573 576
574 evt = kzalloc(sizeof(*evt), GFP_KERNEL); 577 evt = kzalloc(sizeof(*evt), GFP_KERNEL);
575 if (!evt) { 578 if (!evt) {
576 vq_err(vq, "Failed to allocate tcm_vhost_evt\n"); 579 vq_err(vq, "Failed to allocate vhost_scsi_evt\n");
577 vs->vs_events_missed = true; 580 vs->vs_events_missed = true;
578 return NULL; 581 return NULL;
579 } 582 }
@@ -585,7 +588,7 @@ tcm_vhost_allocate_evt(struct vhost_scsi *vs,
585 return evt; 588 return evt;
586} 589}
587 590
588static void vhost_scsi_free_cmd(struct tcm_vhost_cmd *cmd) 591static void vhost_scsi_free_cmd(struct vhost_scsi_cmd *cmd)
589{ 592{
590 struct se_cmd *se_cmd = &cmd->tvc_se_cmd; 593 struct se_cmd *se_cmd = &cmd->tvc_se_cmd;
591 594
@@ -600,7 +603,7 @@ static int vhost_scsi_check_stop_free(struct se_cmd *se_cmd)
600} 603}
601 604
602static void 605static void
603tcm_vhost_do_evt_work(struct vhost_scsi *vs, struct tcm_vhost_evt *evt) 606vhost_scsi_do_evt_work(struct vhost_scsi *vs, struct vhost_scsi_evt *evt)
604{ 607{
605 struct vhost_virtqueue *vq = &vs->vqs[VHOST_SCSI_VQ_EVT].vq; 608 struct vhost_virtqueue *vq = &vs->vqs[VHOST_SCSI_VQ_EVT].vq;
606 struct virtio_scsi_event *event = &evt->event; 609 struct virtio_scsi_event *event = &evt->event;
@@ -646,24 +649,24 @@ again:
646 if (!ret) 649 if (!ret)
647 vhost_add_used_and_signal(&vs->dev, vq, head, 0); 650 vhost_add_used_and_signal(&vs->dev, vq, head, 0);
648 else 651 else
649 vq_err(vq, "Faulted on tcm_vhost_send_event\n"); 652 vq_err(vq, "Faulted on vhost_scsi_send_event\n");
650} 653}
651 654
652static void tcm_vhost_evt_work(struct vhost_work *work) 655static void vhost_scsi_evt_work(struct vhost_work *work)
653{ 656{
654 struct vhost_scsi *vs = container_of(work, struct vhost_scsi, 657 struct vhost_scsi *vs = container_of(work, struct vhost_scsi,
655 vs_event_work); 658 vs_event_work);
656 struct vhost_virtqueue *vq = &vs->vqs[VHOST_SCSI_VQ_EVT].vq; 659 struct vhost_virtqueue *vq = &vs->vqs[VHOST_SCSI_VQ_EVT].vq;
657 struct tcm_vhost_evt *evt; 660 struct vhost_scsi_evt *evt;
658 struct llist_node *llnode; 661 struct llist_node *llnode;
659 662
660 mutex_lock(&vq->mutex); 663 mutex_lock(&vq->mutex);
661 llnode = llist_del_all(&vs->vs_event_list); 664 llnode = llist_del_all(&vs->vs_event_list);
662 while (llnode) { 665 while (llnode) {
663 evt = llist_entry(llnode, struct tcm_vhost_evt, list); 666 evt = llist_entry(llnode, struct vhost_scsi_evt, list);
664 llnode = llist_next(llnode); 667 llnode = llist_next(llnode);
665 tcm_vhost_do_evt_work(vs, evt); 668 vhost_scsi_do_evt_work(vs, evt);
666 tcm_vhost_free_evt(vs, evt); 669 vhost_scsi_free_evt(vs, evt);
667 } 670 }
668 mutex_unlock(&vq->mutex); 671 mutex_unlock(&vq->mutex);
669} 672}
@@ -679,15 +682,16 @@ static void vhost_scsi_complete_cmd_work(struct vhost_work *work)
679 vs_completion_work); 682 vs_completion_work);
680 DECLARE_BITMAP(signal, VHOST_SCSI_MAX_VQ); 683 DECLARE_BITMAP(signal, VHOST_SCSI_MAX_VQ);
681 struct virtio_scsi_cmd_resp v_rsp; 684 struct virtio_scsi_cmd_resp v_rsp;
682 struct tcm_vhost_cmd *cmd; 685 struct vhost_scsi_cmd *cmd;
683 struct llist_node *llnode; 686 struct llist_node *llnode;
684 struct se_cmd *se_cmd; 687 struct se_cmd *se_cmd;
688 struct iov_iter iov_iter;
685 int ret, vq; 689 int ret, vq;
686 690
687 bitmap_zero(signal, VHOST_SCSI_MAX_VQ); 691 bitmap_zero(signal, VHOST_SCSI_MAX_VQ);
688 llnode = llist_del_all(&vs->vs_completion_list); 692 llnode = llist_del_all(&vs->vs_completion_list);
689 while (llnode) { 693 while (llnode) {
690 cmd = llist_entry(llnode, struct tcm_vhost_cmd, 694 cmd = llist_entry(llnode, struct vhost_scsi_cmd,
691 tvc_completion_list); 695 tvc_completion_list);
692 llnode = llist_next(llnode); 696 llnode = llist_next(llnode);
693 se_cmd = &cmd->tvc_se_cmd; 697 se_cmd = &cmd->tvc_se_cmd;
@@ -703,8 +707,11 @@ static void vhost_scsi_complete_cmd_work(struct vhost_work *work)
703 se_cmd->scsi_sense_length); 707 se_cmd->scsi_sense_length);
704 memcpy(v_rsp.sense, cmd->tvc_sense_buf, 708 memcpy(v_rsp.sense, cmd->tvc_sense_buf,
705 se_cmd->scsi_sense_length); 709 se_cmd->scsi_sense_length);
706 ret = copy_to_user(cmd->tvc_resp, &v_rsp, sizeof(v_rsp)); 710
707 if (likely(ret == 0)) { 711 iov_iter_init(&iov_iter, READ, cmd->tvc_resp_iov,
712 cmd->tvc_in_iovs, sizeof(v_rsp));
713 ret = copy_to_iter(&v_rsp, sizeof(v_rsp), &iov_iter);
714 if (likely(ret == sizeof(v_rsp))) {
708 struct vhost_scsi_virtqueue *q; 715 struct vhost_scsi_virtqueue *q;
709 vhost_add_used(cmd->tvc_vq, cmd->tvc_vq_desc, 0); 716 vhost_add_used(cmd->tvc_vq, cmd->tvc_vq_desc, 0);
710 q = container_of(cmd->tvc_vq, struct vhost_scsi_virtqueue, vq); 717 q = container_of(cmd->tvc_vq, struct vhost_scsi_virtqueue, vq);
@@ -722,13 +729,13 @@ static void vhost_scsi_complete_cmd_work(struct vhost_work *work)
722 vhost_signal(&vs->dev, &vs->vqs[vq].vq); 729 vhost_signal(&vs->dev, &vs->vqs[vq].vq);
723} 730}
724 731
725static struct tcm_vhost_cmd * 732static struct vhost_scsi_cmd *
726vhost_scsi_get_tag(struct vhost_virtqueue *vq, struct tcm_vhost_tpg *tpg, 733vhost_scsi_get_tag(struct vhost_virtqueue *vq, struct vhost_scsi_tpg *tpg,
727 unsigned char *cdb, u64 scsi_tag, u16 lun, u8 task_attr, 734 unsigned char *cdb, u64 scsi_tag, u16 lun, u8 task_attr,
728 u32 exp_data_len, int data_direction) 735 u32 exp_data_len, int data_direction)
729{ 736{
730 struct tcm_vhost_cmd *cmd; 737 struct vhost_scsi_cmd *cmd;
731 struct tcm_vhost_nexus *tv_nexus; 738 struct vhost_scsi_nexus *tv_nexus;
732 struct se_session *se_sess; 739 struct se_session *se_sess;
733 struct scatterlist *sg, *prot_sg; 740 struct scatterlist *sg, *prot_sg;
734 struct page **pages; 741 struct page **pages;
@@ -736,22 +743,22 @@ vhost_scsi_get_tag(struct vhost_virtqueue *vq, struct tcm_vhost_tpg *tpg,
736 743
737 tv_nexus = tpg->tpg_nexus; 744 tv_nexus = tpg->tpg_nexus;
738 if (!tv_nexus) { 745 if (!tv_nexus) {
739 pr_err("Unable to locate active struct tcm_vhost_nexus\n"); 746 pr_err("Unable to locate active struct vhost_scsi_nexus\n");
740 return ERR_PTR(-EIO); 747 return ERR_PTR(-EIO);
741 } 748 }
742 se_sess = tv_nexus->tvn_se_sess; 749 se_sess = tv_nexus->tvn_se_sess;
743 750
744 tag = percpu_ida_alloc(&se_sess->sess_tag_pool, TASK_RUNNING); 751 tag = percpu_ida_alloc(&se_sess->sess_tag_pool, TASK_RUNNING);
745 if (tag < 0) { 752 if (tag < 0) {
746 pr_err("Unable to obtain tag for tcm_vhost_cmd\n"); 753 pr_err("Unable to obtain tag for vhost_scsi_cmd\n");
747 return ERR_PTR(-ENOMEM); 754 return ERR_PTR(-ENOMEM);
748 } 755 }
749 756
750 cmd = &((struct tcm_vhost_cmd *)se_sess->sess_cmd_map)[tag]; 757 cmd = &((struct vhost_scsi_cmd *)se_sess->sess_cmd_map)[tag];
751 sg = cmd->tvc_sgl; 758 sg = cmd->tvc_sgl;
752 prot_sg = cmd->tvc_prot_sgl; 759 prot_sg = cmd->tvc_prot_sgl;
753 pages = cmd->tvc_upages; 760 pages = cmd->tvc_upages;
754 memset(cmd, 0, sizeof(struct tcm_vhost_cmd)); 761 memset(cmd, 0, sizeof(struct vhost_scsi_cmd));
755 762
756 cmd->tvc_sgl = sg; 763 cmd->tvc_sgl = sg;
757 cmd->tvc_prot_sgl = prot_sg; 764 cmd->tvc_prot_sgl = prot_sg;
@@ -763,9 +770,9 @@ vhost_scsi_get_tag(struct vhost_virtqueue *vq, struct tcm_vhost_tpg *tpg,
763 cmd->tvc_exp_data_len = exp_data_len; 770 cmd->tvc_exp_data_len = exp_data_len;
764 cmd->tvc_data_direction = data_direction; 771 cmd->tvc_data_direction = data_direction;
765 cmd->tvc_nexus = tv_nexus; 772 cmd->tvc_nexus = tv_nexus;
766 cmd->inflight = tcm_vhost_get_inflight(vq); 773 cmd->inflight = vhost_scsi_get_inflight(vq);
767 774
768 memcpy(cmd->tvc_cdb, cdb, TCM_VHOST_MAX_CDB_SIZE); 775 memcpy(cmd->tvc_cdb, cdb, VHOST_SCSI_MAX_CDB_SIZE);
769 776
770 return cmd; 777 return cmd;
771} 778}
@@ -776,29 +783,22 @@ vhost_scsi_get_tag(struct vhost_virtqueue *vq, struct tcm_vhost_tpg *tpg,
776 * Returns the number of scatterlist entries used or -errno on error. 783 * Returns the number of scatterlist entries used or -errno on error.
777 */ 784 */
778static int 785static int
779vhost_scsi_map_to_sgl(struct tcm_vhost_cmd *tv_cmd, 786vhost_scsi_map_to_sgl(struct vhost_scsi_cmd *cmd,
787 void __user *ptr,
788 size_t len,
780 struct scatterlist *sgl, 789 struct scatterlist *sgl,
781 unsigned int sgl_count,
782 struct iovec *iov,
783 struct page **pages,
784 bool write) 790 bool write)
785{ 791{
786 unsigned int npages = 0, pages_nr, offset, nbytes; 792 unsigned int npages = 0, offset, nbytes;
793 unsigned int pages_nr = iov_num_pages(ptr, len);
787 struct scatterlist *sg = sgl; 794 struct scatterlist *sg = sgl;
788 void __user *ptr = iov->iov_base; 795 struct page **pages = cmd->tvc_upages;
789 size_t len = iov->iov_len;
790 int ret, i; 796 int ret, i;
791 797
792 pages_nr = iov_num_pages(iov); 798 if (pages_nr > VHOST_SCSI_PREALLOC_UPAGES) {
793 if (pages_nr > sgl_count) {
794 pr_err("vhost_scsi_map_to_sgl() pages_nr: %u greater than"
795 " sgl_count: %u\n", pages_nr, sgl_count);
796 return -ENOBUFS;
797 }
798 if (pages_nr > TCM_VHOST_PREALLOC_UPAGES) {
799 pr_err("vhost_scsi_map_to_sgl() pages_nr: %u greater than" 799 pr_err("vhost_scsi_map_to_sgl() pages_nr: %u greater than"
800 " preallocated TCM_VHOST_PREALLOC_UPAGES: %u\n", 800 " preallocated VHOST_SCSI_PREALLOC_UPAGES: %u\n",
801 pages_nr, TCM_VHOST_PREALLOC_UPAGES); 801 pages_nr, VHOST_SCSI_PREALLOC_UPAGES);
802 return -ENOBUFS; 802 return -ENOBUFS;
803 } 803 }
804 804
@@ -829,84 +829,94 @@ out:
829} 829}
830 830
831static int 831static int
832vhost_scsi_map_iov_to_sgl(struct tcm_vhost_cmd *cmd, 832vhost_scsi_calc_sgls(struct iov_iter *iter, size_t bytes, int max_sgls)
833 struct iovec *iov,
834 int niov,
835 bool write)
836{ 833{
837 struct scatterlist *sg = cmd->tvc_sgl; 834 int sgl_count = 0;
838 unsigned int sgl_count = 0;
839 int ret, i;
840 835
841 for (i = 0; i < niov; i++) 836 if (!iter || !iter->iov) {
842 sgl_count += iov_num_pages(&iov[i]); 837 pr_err("%s: iter->iov is NULL, but expected bytes: %zu"
838 " present\n", __func__, bytes);
839 return -EINVAL;
840 }
843 841
844 if (sgl_count > TCM_VHOST_PREALLOC_SGLS) { 842 sgl_count = iov_iter_npages(iter, 0xffff);
845 pr_err("vhost_scsi_map_iov_to_sgl() sgl_count: %u greater than" 843 if (sgl_count > max_sgls) {
846 " preallocated TCM_VHOST_PREALLOC_SGLS: %u\n", 844 pr_err("%s: requested sgl_count: %d exceeds pre-allocated"
847 sgl_count, TCM_VHOST_PREALLOC_SGLS); 845 " max_sgls: %d\n", __func__, sgl_count, max_sgls);
848 return -ENOBUFS; 846 return -EINVAL;
849 } 847 }
848 return sgl_count;
849}
850 850
851 pr_debug("%s sg %p sgl_count %u\n", __func__, sg, sgl_count); 851static int
852 sg_init_table(sg, sgl_count); 852vhost_scsi_iov_to_sgl(struct vhost_scsi_cmd *cmd, bool write,
853 cmd->tvc_sgl_count = sgl_count; 853 struct iov_iter *iter,
854 struct scatterlist *sg, int sg_count)
855{
856 size_t off = iter->iov_offset;
857 int i, ret;
854 858
855 pr_debug("Mapping iovec %p for %u pages\n", &iov[0], sgl_count); 859 for (i = 0; i < iter->nr_segs; i++) {
860 void __user *base = iter->iov[i].iov_base + off;
861 size_t len = iter->iov[i].iov_len - off;
856 862
857 for (i = 0; i < niov; i++) { 863 ret = vhost_scsi_map_to_sgl(cmd, base, len, sg, write);
858 ret = vhost_scsi_map_to_sgl(cmd, sg, sgl_count, &iov[i],
859 cmd->tvc_upages, write);
860 if (ret < 0) { 864 if (ret < 0) {
861 for (i = 0; i < cmd->tvc_sgl_count; i++) 865 for (i = 0; i < sg_count; i++) {
862 put_page(sg_page(&cmd->tvc_sgl[i])); 866 struct page *page = sg_page(&sg[i]);
863 867 if (page)
864 cmd->tvc_sgl_count = 0; 868 put_page(page);
869 }
865 return ret; 870 return ret;
866 } 871 }
867 sg += ret; 872 sg += ret;
868 sgl_count -= ret; 873 off = 0;
869 } 874 }
870 return 0; 875 return 0;
871} 876}
872 877
873static int 878static int
874vhost_scsi_map_iov_to_prot(struct tcm_vhost_cmd *cmd, 879vhost_scsi_mapal(struct vhost_scsi_cmd *cmd,
875 struct iovec *iov, 880 size_t prot_bytes, struct iov_iter *prot_iter,
876 int niov, 881 size_t data_bytes, struct iov_iter *data_iter)
877 bool write) 882{
878{ 883 int sgl_count, ret;
879 struct scatterlist *prot_sg = cmd->tvc_prot_sgl; 884 bool write = (cmd->tvc_data_direction == DMA_FROM_DEVICE);
880 unsigned int prot_sgl_count = 0; 885
881 int ret, i; 886 if (prot_bytes) {
882 887 sgl_count = vhost_scsi_calc_sgls(prot_iter, prot_bytes,
883 for (i = 0; i < niov; i++) 888 VHOST_SCSI_PREALLOC_PROT_SGLS);
884 prot_sgl_count += iov_num_pages(&iov[i]); 889 if (sgl_count < 0)
885 890 return sgl_count;
886 if (prot_sgl_count > TCM_VHOST_PREALLOC_PROT_SGLS) { 891
887 pr_err("vhost_scsi_map_iov_to_prot() sgl_count: %u greater than" 892 sg_init_table(cmd->tvc_prot_sgl, sgl_count);
888 " preallocated TCM_VHOST_PREALLOC_PROT_SGLS: %u\n", 893 cmd->tvc_prot_sgl_count = sgl_count;
889 prot_sgl_count, TCM_VHOST_PREALLOC_PROT_SGLS); 894 pr_debug("%s prot_sg %p prot_sgl_count %u\n", __func__,
890 return -ENOBUFS; 895 cmd->tvc_prot_sgl, cmd->tvc_prot_sgl_count);
891 } 896
892 897 ret = vhost_scsi_iov_to_sgl(cmd, write, prot_iter,
893 pr_debug("%s prot_sg %p prot_sgl_count %u\n", __func__, 898 cmd->tvc_prot_sgl,
894 prot_sg, prot_sgl_count); 899 cmd->tvc_prot_sgl_count);
895 sg_init_table(prot_sg, prot_sgl_count);
896 cmd->tvc_prot_sgl_count = prot_sgl_count;
897
898 for (i = 0; i < niov; i++) {
899 ret = vhost_scsi_map_to_sgl(cmd, prot_sg, prot_sgl_count, &iov[i],
900 cmd->tvc_upages, write);
901 if (ret < 0) { 900 if (ret < 0) {
902 for (i = 0; i < cmd->tvc_prot_sgl_count; i++)
903 put_page(sg_page(&cmd->tvc_prot_sgl[i]));
904
905 cmd->tvc_prot_sgl_count = 0; 901 cmd->tvc_prot_sgl_count = 0;
906 return ret; 902 return ret;
907 } 903 }
908 prot_sg += ret; 904 }
909 prot_sgl_count -= ret; 905 sgl_count = vhost_scsi_calc_sgls(data_iter, data_bytes,
906 VHOST_SCSI_PREALLOC_SGLS);
907 if (sgl_count < 0)
908 return sgl_count;
909
910 sg_init_table(cmd->tvc_sgl, sgl_count);
911 cmd->tvc_sgl_count = sgl_count;
912 pr_debug("%s data_sg %p data_sgl_count %u\n", __func__,
913 cmd->tvc_sgl, cmd->tvc_sgl_count);
914
915 ret = vhost_scsi_iov_to_sgl(cmd, write, data_iter,
916 cmd->tvc_sgl, cmd->tvc_sgl_count);
917 if (ret < 0) {
918 cmd->tvc_sgl_count = 0;
919 return ret;
910 } 920 }
911 return 0; 921 return 0;
912} 922}
@@ -928,11 +938,11 @@ static int vhost_scsi_to_tcm_attr(int attr)
928 return TCM_SIMPLE_TAG; 938 return TCM_SIMPLE_TAG;
929} 939}
930 940
931static void tcm_vhost_submission_work(struct work_struct *work) 941static void vhost_scsi_submission_work(struct work_struct *work)
932{ 942{
933 struct tcm_vhost_cmd *cmd = 943 struct vhost_scsi_cmd *cmd =
934 container_of(work, struct tcm_vhost_cmd, work); 944 container_of(work, struct vhost_scsi_cmd, work);
935 struct tcm_vhost_nexus *tv_nexus; 945 struct vhost_scsi_nexus *tv_nexus;
936 struct se_cmd *se_cmd = &cmd->tvc_se_cmd; 946 struct se_cmd *se_cmd = &cmd->tvc_se_cmd;
937 struct scatterlist *sg_ptr, *sg_prot_ptr = NULL; 947 struct scatterlist *sg_ptr, *sg_prot_ptr = NULL;
938 int rc; 948 int rc;
@@ -986,19 +996,20 @@ vhost_scsi_send_bad_target(struct vhost_scsi *vs,
986static void 996static void
987vhost_scsi_handle_vq(struct vhost_scsi *vs, struct vhost_virtqueue *vq) 997vhost_scsi_handle_vq(struct vhost_scsi *vs, struct vhost_virtqueue *vq)
988{ 998{
989 struct tcm_vhost_tpg **vs_tpg; 999 struct vhost_scsi_tpg **vs_tpg, *tpg;
990 struct virtio_scsi_cmd_req v_req; 1000 struct virtio_scsi_cmd_req v_req;
991 struct virtio_scsi_cmd_req_pi v_req_pi; 1001 struct virtio_scsi_cmd_req_pi v_req_pi;
992 struct tcm_vhost_tpg *tpg; 1002 struct vhost_scsi_cmd *cmd;
993 struct tcm_vhost_cmd *cmd; 1003 struct iov_iter out_iter, in_iter, prot_iter, data_iter;
994 u64 tag; 1004 u64 tag;
995 u32 exp_data_len, data_first, data_num, data_direction, prot_first; 1005 u32 exp_data_len, data_direction;
996 unsigned out, in, i; 1006 unsigned out, in;
997 int head, ret, data_niov, prot_niov, prot_bytes; 1007 int head, ret, prot_bytes;
998 size_t req_size; 1008 size_t req_size, rsp_size = sizeof(struct virtio_scsi_cmd_resp);
1009 size_t out_size, in_size;
999 u16 lun; 1010 u16 lun;
1000 u8 *target, *lunp, task_attr; 1011 u8 *target, *lunp, task_attr;
1001 bool hdr_pi; 1012 bool t10_pi = vhost_has_feature(vq, VIRTIO_SCSI_F_T10_PI);
1002 void *req, *cdb; 1013 void *req, *cdb;
1003 1014
1004 mutex_lock(&vq->mutex); 1015 mutex_lock(&vq->mutex);
@@ -1014,10 +1025,10 @@ vhost_scsi_handle_vq(struct vhost_scsi *vs, struct vhost_virtqueue *vq)
1014 1025
1015 for (;;) { 1026 for (;;) {
1016 head = vhost_get_vq_desc(vq, vq->iov, 1027 head = vhost_get_vq_desc(vq, vq->iov,
1017 ARRAY_SIZE(vq->iov), &out, &in, 1028 ARRAY_SIZE(vq->iov), &out, &in,
1018 NULL, NULL); 1029 NULL, NULL);
1019 pr_debug("vhost_get_vq_desc: head: %d, out: %u in: %u\n", 1030 pr_debug("vhost_get_vq_desc: head: %d, out: %u in: %u\n",
1020 head, out, in); 1031 head, out, in);
1021 /* On error, stop handling until the next kick. */ 1032 /* On error, stop handling until the next kick. */
1022 if (unlikely(head < 0)) 1033 if (unlikely(head < 0))
1023 break; 1034 break;
@@ -1029,113 +1040,134 @@ vhost_scsi_handle_vq(struct vhost_scsi *vs, struct vhost_virtqueue *vq)
1029 } 1040 }
1030 break; 1041 break;
1031 } 1042 }
1032
1033 /* FIXME: BIDI operation */
1034 if (out == 1 && in == 1) {
1035 data_direction = DMA_NONE;
1036 data_first = 0;
1037 data_num = 0;
1038 } else if (out == 1 && in > 1) {
1039 data_direction = DMA_FROM_DEVICE;
1040 data_first = out + 1;
1041 data_num = in - 1;
1042 } else if (out > 1 && in == 1) {
1043 data_direction = DMA_TO_DEVICE;
1044 data_first = 1;
1045 data_num = out - 1;
1046 } else {
1047 vq_err(vq, "Invalid buffer layout out: %u in: %u\n",
1048 out, in);
1049 break;
1050 }
1051
1052 /* 1043 /*
1053 * Check for a sane resp buffer so we can report errors to 1044 * Check for a sane response buffer so we can report early
1054 * the guest. 1045 * errors back to the guest.
1055 */ 1046 */
1056 if (unlikely(vq->iov[out].iov_len != 1047 if (unlikely(vq->iov[out].iov_len < rsp_size)) {
1057 sizeof(struct virtio_scsi_cmd_resp))) { 1048 vq_err(vq, "Expecting at least virtio_scsi_cmd_resp"
1058 vq_err(vq, "Expecting virtio_scsi_cmd_resp, got %zu" 1049 " size, got %zu bytes\n", vq->iov[out].iov_len);
1059 " bytes\n", vq->iov[out].iov_len);
1060 break; 1050 break;
1061 } 1051 }
1062 1052 /*
1063 if (vhost_has_feature(vq, VIRTIO_SCSI_F_T10_PI)) { 1053 * Setup pointers and values based upon different virtio-scsi
1054 * request header if T10_PI is enabled in KVM guest.
1055 */
1056 if (t10_pi) {
1064 req = &v_req_pi; 1057 req = &v_req_pi;
1058 req_size = sizeof(v_req_pi);
1065 lunp = &v_req_pi.lun[0]; 1059 lunp = &v_req_pi.lun[0];
1066 target = &v_req_pi.lun[1]; 1060 target = &v_req_pi.lun[1];
1067 req_size = sizeof(v_req_pi);
1068 hdr_pi = true;
1069 } else { 1061 } else {
1070 req = &v_req; 1062 req = &v_req;
1063 req_size = sizeof(v_req);
1071 lunp = &v_req.lun[0]; 1064 lunp = &v_req.lun[0];
1072 target = &v_req.lun[1]; 1065 target = &v_req.lun[1];
1073 req_size = sizeof(v_req);
1074 hdr_pi = false;
1075 } 1066 }
1067 /*
1068 * FIXME: Not correct for BIDI operation
1069 */
1070 out_size = iov_length(vq->iov, out);
1071 in_size = iov_length(&vq->iov[out], in);
1076 1072
1077 if (unlikely(vq->iov[0].iov_len < req_size)) { 1073 /*
1078 pr_err("Expecting virtio-scsi header: %zu, got %zu\n", 1074 * Copy over the virtio-scsi request header, which for a
1079 req_size, vq->iov[0].iov_len); 1075 * ANY_LAYOUT enabled guest may span multiple iovecs, or a
1080 break; 1076 * single iovec may contain both the header + outgoing
1081 } 1077 * WRITE payloads.
1082 ret = copy_from_user(req, vq->iov[0].iov_base, req_size); 1078 *
1083 if (unlikely(ret)) { 1079 * copy_from_iter() will advance out_iter, so that it will
1084 vq_err(vq, "Faulted on virtio_scsi_cmd_req\n"); 1080 * point at the start of the outgoing WRITE payload, if
1085 break; 1081 * DMA_TO_DEVICE is set.
1086 } 1082 */
1083 iov_iter_init(&out_iter, WRITE, vq->iov, out, out_size);
1087 1084
1085 ret = copy_from_iter(req, req_size, &out_iter);
1086 if (unlikely(ret != req_size)) {
1087 vq_err(vq, "Faulted on copy_from_iter\n");
1088 vhost_scsi_send_bad_target(vs, vq, head, out);
1089 continue;
1090 }
1088 /* virtio-scsi spec requires byte 0 of the lun to be 1 */ 1091 /* virtio-scsi spec requires byte 0 of the lun to be 1 */
1089 if (unlikely(*lunp != 1)) { 1092 if (unlikely(*lunp != 1)) {
1093 vq_err(vq, "Illegal virtio-scsi lun: %u\n", *lunp);
1090 vhost_scsi_send_bad_target(vs, vq, head, out); 1094 vhost_scsi_send_bad_target(vs, vq, head, out);
1091 continue; 1095 continue;
1092 } 1096 }
1093 1097
1094 tpg = ACCESS_ONCE(vs_tpg[*target]); 1098 tpg = ACCESS_ONCE(vs_tpg[*target]);
1095
1096 /* Target does not exist, fail the request */
1097 if (unlikely(!tpg)) { 1099 if (unlikely(!tpg)) {
1100 /* Target does not exist, fail the request */
1098 vhost_scsi_send_bad_target(vs, vq, head, out); 1101 vhost_scsi_send_bad_target(vs, vq, head, out);
1099 continue; 1102 continue;
1100 } 1103 }
1101
1102 data_niov = data_num;
1103 prot_niov = prot_first = prot_bytes = 0;
1104 /* 1104 /*
1105 * Determine if any protection information iovecs are preceeding 1105 * Determine data_direction by calculating the total outgoing
1106 * the actual data payload, and adjust data_first + data_niov 1106 * iovec sizes + incoming iovec sizes vs. virtio-scsi request +
1107 * values accordingly for vhost_scsi_map_iov_to_sgl() below. 1107 * response headers respectively.
1108 * 1108 *
1109 * Also extract virtio_scsi header bits for vhost_scsi_get_tag() 1109 * For DMA_TO_DEVICE this is out_iter, which is already pointing
1110 * to the right place.
1111 *
1112 * For DMA_FROM_DEVICE, the iovec will be just past the end
1113 * of the virtio-scsi response header in either the same
1114 * or immediately following iovec.
1115 *
1116 * Any associated T10_PI bytes for the outgoing / incoming
1117 * payloads are included in calculation of exp_data_len here.
1110 */ 1118 */
1111 if (hdr_pi) { 1119 prot_bytes = 0;
1120
1121 if (out_size > req_size) {
1122 data_direction = DMA_TO_DEVICE;
1123 exp_data_len = out_size - req_size;
1124 data_iter = out_iter;
1125 } else if (in_size > rsp_size) {
1126 data_direction = DMA_FROM_DEVICE;
1127 exp_data_len = in_size - rsp_size;
1128
1129 iov_iter_init(&in_iter, READ, &vq->iov[out], in,
1130 rsp_size + exp_data_len);
1131 iov_iter_advance(&in_iter, rsp_size);
1132 data_iter = in_iter;
1133 } else {
1134 data_direction = DMA_NONE;
1135 exp_data_len = 0;
1136 }
1137 /*
1138 * If T10_PI header + payload is present, setup prot_iter values
1139 * and recalculate data_iter for vhost_scsi_mapal() mapping to
1140 * host scatterlists via get_user_pages_fast().
1141 */
1142 if (t10_pi) {
1112 if (v_req_pi.pi_bytesout) { 1143 if (v_req_pi.pi_bytesout) {
1113 if (data_direction != DMA_TO_DEVICE) { 1144 if (data_direction != DMA_TO_DEVICE) {
1114 vq_err(vq, "Received non zero do_pi_niov" 1145 vq_err(vq, "Received non zero pi_bytesout,"
1115 ", but wrong data_direction\n"); 1146 " but wrong data_direction\n");
1116 goto err_cmd; 1147 vhost_scsi_send_bad_target(vs, vq, head, out);
1148 continue;
1117 } 1149 }
1118 prot_bytes = vhost32_to_cpu(vq, v_req_pi.pi_bytesout); 1150 prot_bytes = vhost32_to_cpu(vq, v_req_pi.pi_bytesout);
1119 } else if (v_req_pi.pi_bytesin) { 1151 } else if (v_req_pi.pi_bytesin) {
1120 if (data_direction != DMA_FROM_DEVICE) { 1152 if (data_direction != DMA_FROM_DEVICE) {
1121 vq_err(vq, "Received non zero di_pi_niov" 1153 vq_err(vq, "Received non zero pi_bytesin,"
1122 ", but wrong data_direction\n"); 1154 " but wrong data_direction\n");
1123 goto err_cmd; 1155 vhost_scsi_send_bad_target(vs, vq, head, out);
1156 continue;
1124 } 1157 }
1125 prot_bytes = vhost32_to_cpu(vq, v_req_pi.pi_bytesin); 1158 prot_bytes = vhost32_to_cpu(vq, v_req_pi.pi_bytesin);
1126 } 1159 }
1160 /*
1161 * Set prot_iter to data_iter, and advance past any
1162 * preceeding prot_bytes that may be present.
1163 *
1164 * Also fix up the exp_data_len to reflect only the
1165 * actual data payload length.
1166 */
1127 if (prot_bytes) { 1167 if (prot_bytes) {
1128 int tmp = 0; 1168 exp_data_len -= prot_bytes;
1129 1169 prot_iter = data_iter;
1130 for (i = 0; i < data_num; i++) { 1170 iov_iter_advance(&data_iter, prot_bytes);
1131 tmp += vq->iov[data_first + i].iov_len;
1132 prot_niov++;
1133 if (tmp >= prot_bytes)
1134 break;
1135 }
1136 prot_first = data_first;
1137 data_first += prot_niov;
1138 data_niov = data_num - prot_niov;
1139 } 1171 }
1140 tag = vhost64_to_cpu(vq, v_req_pi.tag); 1172 tag = vhost64_to_cpu(vq, v_req_pi.tag);
1141 task_attr = v_req_pi.task_attr; 1173 task_attr = v_req_pi.task_attr;
@@ -1147,83 +1179,65 @@ vhost_scsi_handle_vq(struct vhost_scsi *vs, struct vhost_virtqueue *vq)
1147 cdb = &v_req.cdb[0]; 1179 cdb = &v_req.cdb[0];
1148 lun = ((v_req.lun[2] << 8) | v_req.lun[3]) & 0x3FFF; 1180 lun = ((v_req.lun[2] << 8) | v_req.lun[3]) & 0x3FFF;
1149 } 1181 }
1150 exp_data_len = 0;
1151 for (i = 0; i < data_niov; i++)
1152 exp_data_len += vq->iov[data_first + i].iov_len;
1153 /* 1182 /*
1154 * Check that the recieved CDB size does not exceeded our 1183 * Check that the received CDB size does not exceeded our
1155 * hardcoded max for vhost-scsi 1184 * hardcoded max for vhost-scsi, then get a pre-allocated
1185 * cmd descriptor for the new virtio-scsi tag.
1156 * 1186 *
1157 * TODO what if cdb was too small for varlen cdb header? 1187 * TODO what if cdb was too small for varlen cdb header?
1158 */ 1188 */
1159 if (unlikely(scsi_command_size(cdb) > TCM_VHOST_MAX_CDB_SIZE)) { 1189 if (unlikely(scsi_command_size(cdb) > VHOST_SCSI_MAX_CDB_SIZE)) {
1160 vq_err(vq, "Received SCSI CDB with command_size: %d that" 1190 vq_err(vq, "Received SCSI CDB with command_size: %d that"
1161 " exceeds SCSI_MAX_VARLEN_CDB_SIZE: %d\n", 1191 " exceeds SCSI_MAX_VARLEN_CDB_SIZE: %d\n",
1162 scsi_command_size(cdb), TCM_VHOST_MAX_CDB_SIZE); 1192 scsi_command_size(cdb), VHOST_SCSI_MAX_CDB_SIZE);
1163 goto err_cmd; 1193 vhost_scsi_send_bad_target(vs, vq, head, out);
1194 continue;
1164 } 1195 }
1165
1166 cmd = vhost_scsi_get_tag(vq, tpg, cdb, tag, lun, task_attr, 1196 cmd = vhost_scsi_get_tag(vq, tpg, cdb, tag, lun, task_attr,
1167 exp_data_len + prot_bytes, 1197 exp_data_len + prot_bytes,
1168 data_direction); 1198 data_direction);
1169 if (IS_ERR(cmd)) { 1199 if (IS_ERR(cmd)) {
1170 vq_err(vq, "vhost_scsi_get_tag failed %ld\n", 1200 vq_err(vq, "vhost_scsi_get_tag failed %ld\n",
1171 PTR_ERR(cmd)); 1201 PTR_ERR(cmd));
1172 goto err_cmd; 1202 vhost_scsi_send_bad_target(vs, vq, head, out);
1203 continue;
1173 } 1204 }
1174
1175 pr_debug("Allocated tv_cmd: %p exp_data_len: %d, data_direction"
1176 ": %d\n", cmd, exp_data_len, data_direction);
1177
1178 cmd->tvc_vhost = vs; 1205 cmd->tvc_vhost = vs;
1179 cmd->tvc_vq = vq; 1206 cmd->tvc_vq = vq;
1180 cmd->tvc_resp = vq->iov[out].iov_base; 1207 cmd->tvc_resp_iov = &vq->iov[out];
1208 cmd->tvc_in_iovs = in;
1181 1209
1182 pr_debug("vhost_scsi got command opcode: %#02x, lun: %d\n", 1210 pr_debug("vhost_scsi got command opcode: %#02x, lun: %d\n",
1183 cmd->tvc_cdb[0], cmd->tvc_lun); 1211 cmd->tvc_cdb[0], cmd->tvc_lun);
1212 pr_debug("cmd: %p exp_data_len: %d, prot_bytes: %d data_direction:"
1213 " %d\n", cmd, exp_data_len, prot_bytes, data_direction);
1184 1214
1185 if (prot_niov) {
1186 ret = vhost_scsi_map_iov_to_prot(cmd,
1187 &vq->iov[prot_first], prot_niov,
1188 data_direction == DMA_FROM_DEVICE);
1189 if (unlikely(ret)) {
1190 vq_err(vq, "Failed to map iov to"
1191 " prot_sgl\n");
1192 goto err_free;
1193 }
1194 }
1195 if (data_direction != DMA_NONE) { 1215 if (data_direction != DMA_NONE) {
1196 ret = vhost_scsi_map_iov_to_sgl(cmd, 1216 ret = vhost_scsi_mapal(cmd,
1197 &vq->iov[data_first], data_niov, 1217 prot_bytes, &prot_iter,
1198 data_direction == DMA_FROM_DEVICE); 1218 exp_data_len, &data_iter);
1199 if (unlikely(ret)) { 1219 if (unlikely(ret)) {
1200 vq_err(vq, "Failed to map iov to sgl\n"); 1220 vq_err(vq, "Failed to map iov to sgl\n");
1201 goto err_free; 1221 vhost_scsi_release_cmd(&cmd->tvc_se_cmd);
1222 vhost_scsi_send_bad_target(vs, vq, head, out);
1223 continue;
1202 } 1224 }
1203 } 1225 }
1204 /* 1226 /*
1205 * Save the descriptor from vhost_get_vq_desc() to be used to 1227 * Save the descriptor from vhost_get_vq_desc() to be used to
1206 * complete the virtio-scsi request in TCM callback context via 1228 * complete the virtio-scsi request in TCM callback context via
1207 * tcm_vhost_queue_data_in() and tcm_vhost_queue_status() 1229 * vhost_scsi_queue_data_in() and vhost_scsi_queue_status()
1208 */ 1230 */
1209 cmd->tvc_vq_desc = head; 1231 cmd->tvc_vq_desc = head;
1210 /* 1232 /*
1211 * Dispatch tv_cmd descriptor for cmwq execution in process 1233 * Dispatch cmd descriptor for cmwq execution in process
1212 * context provided by tcm_vhost_workqueue. This also ensures 1234 * context provided by vhost_scsi_workqueue. This also ensures
1213 * tv_cmd is executed on the same kworker CPU as this vhost 1235 * cmd is executed on the same kworker CPU as this vhost
1214 * thread to gain positive L2 cache locality effects.. 1236 * thread to gain positive L2 cache locality effects.
1215 */ 1237 */
1216 INIT_WORK(&cmd->work, tcm_vhost_submission_work); 1238 INIT_WORK(&cmd->work, vhost_scsi_submission_work);
1217 queue_work(tcm_vhost_workqueue, &cmd->work); 1239 queue_work(vhost_scsi_workqueue, &cmd->work);
1218 } 1240 }
1219
1220 mutex_unlock(&vq->mutex);
1221 return;
1222
1223err_free:
1224 vhost_scsi_free_cmd(cmd);
1225err_cmd:
1226 vhost_scsi_send_bad_target(vs, vq, head, out);
1227out: 1241out:
1228 mutex_unlock(&vq->mutex); 1242 mutex_unlock(&vq->mutex);
1229} 1243}
@@ -1234,15 +1248,15 @@ static void vhost_scsi_ctl_handle_kick(struct vhost_work *work)
1234} 1248}
1235 1249
1236static void 1250static void
1237tcm_vhost_send_evt(struct vhost_scsi *vs, 1251vhost_scsi_send_evt(struct vhost_scsi *vs,
1238 struct tcm_vhost_tpg *tpg, 1252 struct vhost_scsi_tpg *tpg,
1239 struct se_lun *lun, 1253 struct se_lun *lun,
1240 u32 event, 1254 u32 event,
1241 u32 reason) 1255 u32 reason)
1242{ 1256{
1243 struct tcm_vhost_evt *evt; 1257 struct vhost_scsi_evt *evt;
1244 1258
1245 evt = tcm_vhost_allocate_evt(vs, event, reason); 1259 evt = vhost_scsi_allocate_evt(vs, event, reason);
1246 if (!evt) 1260 if (!evt)
1247 return; 1261 return;
1248 1262
@@ -1253,7 +1267,7 @@ tcm_vhost_send_evt(struct vhost_scsi *vs,
1253 * lun[4-7] need to be zero according to virtio-scsi spec. 1267 * lun[4-7] need to be zero according to virtio-scsi spec.
1254 */ 1268 */
1255 evt->event.lun[0] = 0x01; 1269 evt->event.lun[0] = 0x01;
1256 evt->event.lun[1] = tpg->tport_tpgt & 0xFF; 1270 evt->event.lun[1] = tpg->tport_tpgt;
1257 if (lun->unpacked_lun >= 256) 1271 if (lun->unpacked_lun >= 256)
1258 evt->event.lun[2] = lun->unpacked_lun >> 8 | 0x40 ; 1272 evt->event.lun[2] = lun->unpacked_lun >> 8 | 0x40 ;
1259 evt->event.lun[3] = lun->unpacked_lun & 0xFF; 1273 evt->event.lun[3] = lun->unpacked_lun & 0xFF;
@@ -1274,7 +1288,7 @@ static void vhost_scsi_evt_handle_kick(struct vhost_work *work)
1274 goto out; 1288 goto out;
1275 1289
1276 if (vs->vs_events_missed) 1290 if (vs->vs_events_missed)
1277 tcm_vhost_send_evt(vs, NULL, NULL, VIRTIO_SCSI_T_NO_EVENT, 0); 1291 vhost_scsi_send_evt(vs, NULL, NULL, VIRTIO_SCSI_T_NO_EVENT, 0);
1278out: 1292out:
1279 mutex_unlock(&vq->mutex); 1293 mutex_unlock(&vq->mutex);
1280} 1294}
@@ -1300,7 +1314,7 @@ static void vhost_scsi_flush(struct vhost_scsi *vs)
1300 int i; 1314 int i;
1301 1315
1302 /* Init new inflight and remember the old inflight */ 1316 /* Init new inflight and remember the old inflight */
1303 tcm_vhost_init_inflight(vs, old_inflight); 1317 vhost_scsi_init_inflight(vs, old_inflight);
1304 1318
1305 /* 1319 /*
1306 * The inflight->kref was initialized to 1. We decrement it here to 1320 * The inflight->kref was initialized to 1. We decrement it here to
@@ -1308,7 +1322,7 @@ static void vhost_scsi_flush(struct vhost_scsi *vs)
1308 * when all the reqs are finished. 1322 * when all the reqs are finished.
1309 */ 1323 */
1310 for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) 1324 for (i = 0; i < VHOST_SCSI_MAX_VQ; i++)
1311 kref_put(&old_inflight[i]->kref, tcm_vhost_done_inflight); 1325 kref_put(&old_inflight[i]->kref, vhost_scsi_done_inflight);
1312 1326
1313 /* Flush both the vhost poll and vhost work */ 1327 /* Flush both the vhost poll and vhost work */
1314 for (i = 0; i < VHOST_SCSI_MAX_VQ; i++) 1328 for (i = 0; i < VHOST_SCSI_MAX_VQ; i++)
@@ -1323,24 +1337,24 @@ static void vhost_scsi_flush(struct vhost_scsi *vs)
1323 1337
1324/* 1338/*
1325 * Called from vhost_scsi_ioctl() context to walk the list of available 1339 * Called from vhost_scsi_ioctl() context to walk the list of available
1326 * tcm_vhost_tpg with an active struct tcm_vhost_nexus 1340 * vhost_scsi_tpg with an active struct vhost_scsi_nexus
1327 * 1341 *
1328 * The lock nesting rule is: 1342 * The lock nesting rule is:
1329 * tcm_vhost_mutex -> vs->dev.mutex -> tpg->tv_tpg_mutex -> vq->mutex 1343 * vhost_scsi_mutex -> vs->dev.mutex -> tpg->tv_tpg_mutex -> vq->mutex
1330 */ 1344 */
1331static int 1345static int
1332vhost_scsi_set_endpoint(struct vhost_scsi *vs, 1346vhost_scsi_set_endpoint(struct vhost_scsi *vs,
1333 struct vhost_scsi_target *t) 1347 struct vhost_scsi_target *t)
1334{ 1348{
1335 struct se_portal_group *se_tpg; 1349 struct se_portal_group *se_tpg;
1336 struct tcm_vhost_tport *tv_tport; 1350 struct vhost_scsi_tport *tv_tport;
1337 struct tcm_vhost_tpg *tpg; 1351 struct vhost_scsi_tpg *tpg;
1338 struct tcm_vhost_tpg **vs_tpg; 1352 struct vhost_scsi_tpg **vs_tpg;
1339 struct vhost_virtqueue *vq; 1353 struct vhost_virtqueue *vq;
1340 int index, ret, i, len; 1354 int index, ret, i, len;
1341 bool match = false; 1355 bool match = false;
1342 1356
1343 mutex_lock(&tcm_vhost_mutex); 1357 mutex_lock(&vhost_scsi_mutex);
1344 mutex_lock(&vs->dev.mutex); 1358 mutex_lock(&vs->dev.mutex);
1345 1359
1346 /* Verify that ring has been setup correctly. */ 1360 /* Verify that ring has been setup correctly. */
@@ -1361,7 +1375,7 @@ vhost_scsi_set_endpoint(struct vhost_scsi *vs,
1361 if (vs->vs_tpg) 1375 if (vs->vs_tpg)
1362 memcpy(vs_tpg, vs->vs_tpg, len); 1376 memcpy(vs_tpg, vs->vs_tpg, len);
1363 1377
1364 list_for_each_entry(tpg, &tcm_vhost_list, tv_tpg_list) { 1378 list_for_each_entry(tpg, &vhost_scsi_list, tv_tpg_list) {
1365 mutex_lock(&tpg->tv_tpg_mutex); 1379 mutex_lock(&tpg->tv_tpg_mutex);
1366 if (!tpg->tpg_nexus) { 1380 if (!tpg->tpg_nexus) {
1367 mutex_unlock(&tpg->tv_tpg_mutex); 1381 mutex_unlock(&tpg->tv_tpg_mutex);
@@ -1429,7 +1443,7 @@ vhost_scsi_set_endpoint(struct vhost_scsi *vs,
1429 1443
1430out: 1444out:
1431 mutex_unlock(&vs->dev.mutex); 1445 mutex_unlock(&vs->dev.mutex);
1432 mutex_unlock(&tcm_vhost_mutex); 1446 mutex_unlock(&vhost_scsi_mutex);
1433 return ret; 1447 return ret;
1434} 1448}
1435 1449
@@ -1438,14 +1452,14 @@ vhost_scsi_clear_endpoint(struct vhost_scsi *vs,
1438 struct vhost_scsi_target *t) 1452 struct vhost_scsi_target *t)
1439{ 1453{
1440 struct se_portal_group *se_tpg; 1454 struct se_portal_group *se_tpg;
1441 struct tcm_vhost_tport *tv_tport; 1455 struct vhost_scsi_tport *tv_tport;
1442 struct tcm_vhost_tpg *tpg; 1456 struct vhost_scsi_tpg *tpg;
1443 struct vhost_virtqueue *vq; 1457 struct vhost_virtqueue *vq;
1444 bool match = false; 1458 bool match = false;
1445 int index, ret, i; 1459 int index, ret, i;
1446 u8 target; 1460 u8 target;
1447 1461
1448 mutex_lock(&tcm_vhost_mutex); 1462 mutex_lock(&vhost_scsi_mutex);
1449 mutex_lock(&vs->dev.mutex); 1463 mutex_lock(&vs->dev.mutex);
1450 /* Verify that ring has been setup correctly. */ 1464 /* Verify that ring has been setup correctly. */
1451 for (index = 0; index < vs->dev.nvqs; ++index) { 1465 for (index = 0; index < vs->dev.nvqs; ++index) {
@@ -1511,14 +1525,14 @@ vhost_scsi_clear_endpoint(struct vhost_scsi *vs,
1511 vs->vs_tpg = NULL; 1525 vs->vs_tpg = NULL;
1512 WARN_ON(vs->vs_events_nr); 1526 WARN_ON(vs->vs_events_nr);
1513 mutex_unlock(&vs->dev.mutex); 1527 mutex_unlock(&vs->dev.mutex);
1514 mutex_unlock(&tcm_vhost_mutex); 1528 mutex_unlock(&vhost_scsi_mutex);
1515 return 0; 1529 return 0;
1516 1530
1517err_tpg: 1531err_tpg:
1518 mutex_unlock(&tpg->tv_tpg_mutex); 1532 mutex_unlock(&tpg->tv_tpg_mutex);
1519err_dev: 1533err_dev:
1520 mutex_unlock(&vs->dev.mutex); 1534 mutex_unlock(&vs->dev.mutex);
1521 mutex_unlock(&tcm_vhost_mutex); 1535 mutex_unlock(&vhost_scsi_mutex);
1522 return ret; 1536 return ret;
1523} 1537}
1524 1538
@@ -1565,7 +1579,7 @@ static int vhost_scsi_open(struct inode *inode, struct file *f)
1565 goto err_vqs; 1579 goto err_vqs;
1566 1580
1567 vhost_work_init(&vs->vs_completion_work, vhost_scsi_complete_cmd_work); 1581 vhost_work_init(&vs->vs_completion_work, vhost_scsi_complete_cmd_work);
1568 vhost_work_init(&vs->vs_event_work, tcm_vhost_evt_work); 1582 vhost_work_init(&vs->vs_event_work, vhost_scsi_evt_work);
1569 1583
1570 vs->vs_events_nr = 0; 1584 vs->vs_events_nr = 0;
1571 vs->vs_events_missed = false; 1585 vs->vs_events_missed = false;
@@ -1580,7 +1594,7 @@ static int vhost_scsi_open(struct inode *inode, struct file *f)
1580 } 1594 }
1581 vhost_dev_init(&vs->dev, vqs, VHOST_SCSI_MAX_VQ); 1595 vhost_dev_init(&vs->dev, vqs, VHOST_SCSI_MAX_VQ);
1582 1596
1583 tcm_vhost_init_inflight(vs, NULL); 1597 vhost_scsi_init_inflight(vs, NULL);
1584 1598
1585 f->private_data = vs; 1599 f->private_data = vs;
1586 return 0; 1600 return 0;
@@ -1712,7 +1726,7 @@ static int vhost_scsi_deregister(void)
1712 return misc_deregister(&vhost_scsi_misc); 1726 return misc_deregister(&vhost_scsi_misc);
1713} 1727}
1714 1728
1715static char *tcm_vhost_dump_proto_id(struct tcm_vhost_tport *tport) 1729static char *vhost_scsi_dump_proto_id(struct vhost_scsi_tport *tport)
1716{ 1730{
1717 switch (tport->tport_proto_id) { 1731 switch (tport->tport_proto_id) {
1718 case SCSI_PROTOCOL_SAS: 1732 case SCSI_PROTOCOL_SAS:
@@ -1729,7 +1743,7 @@ static char *tcm_vhost_dump_proto_id(struct tcm_vhost_tport *tport)
1729} 1743}
1730 1744
1731static void 1745static void
1732tcm_vhost_do_plug(struct tcm_vhost_tpg *tpg, 1746vhost_scsi_do_plug(struct vhost_scsi_tpg *tpg,
1733 struct se_lun *lun, bool plug) 1747 struct se_lun *lun, bool plug)
1734{ 1748{
1735 1749
@@ -1750,71 +1764,71 @@ tcm_vhost_do_plug(struct tcm_vhost_tpg *tpg,
1750 vq = &vs->vqs[VHOST_SCSI_VQ_EVT].vq; 1764 vq = &vs->vqs[VHOST_SCSI_VQ_EVT].vq;
1751 mutex_lock(&vq->mutex); 1765 mutex_lock(&vq->mutex);
1752 if (vhost_has_feature(vq, VIRTIO_SCSI_F_HOTPLUG)) 1766 if (vhost_has_feature(vq, VIRTIO_SCSI_F_HOTPLUG))
1753 tcm_vhost_send_evt(vs, tpg, lun, 1767 vhost_scsi_send_evt(vs, tpg, lun,
1754 VIRTIO_SCSI_T_TRANSPORT_RESET, reason); 1768 VIRTIO_SCSI_T_TRANSPORT_RESET, reason);
1755 mutex_unlock(&vq->mutex); 1769 mutex_unlock(&vq->mutex);
1756 mutex_unlock(&vs->dev.mutex); 1770 mutex_unlock(&vs->dev.mutex);
1757} 1771}
1758 1772
1759static void tcm_vhost_hotplug(struct tcm_vhost_tpg *tpg, struct se_lun *lun) 1773static void vhost_scsi_hotplug(struct vhost_scsi_tpg *tpg, struct se_lun *lun)
1760{ 1774{
1761 tcm_vhost_do_plug(tpg, lun, true); 1775 vhost_scsi_do_plug(tpg, lun, true);
1762} 1776}
1763 1777
1764static void tcm_vhost_hotunplug(struct tcm_vhost_tpg *tpg, struct se_lun *lun) 1778static void vhost_scsi_hotunplug(struct vhost_scsi_tpg *tpg, struct se_lun *lun)
1765{ 1779{
1766 tcm_vhost_do_plug(tpg, lun, false); 1780 vhost_scsi_do_plug(tpg, lun, false);
1767} 1781}
1768 1782
1769static int tcm_vhost_port_link(struct se_portal_group *se_tpg, 1783static int vhost_scsi_port_link(struct se_portal_group *se_tpg,
1770 struct se_lun *lun) 1784 struct se_lun *lun)
1771{ 1785{
1772 struct tcm_vhost_tpg *tpg = container_of(se_tpg, 1786 struct vhost_scsi_tpg *tpg = container_of(se_tpg,
1773 struct tcm_vhost_tpg, se_tpg); 1787 struct vhost_scsi_tpg, se_tpg);
1774 1788
1775 mutex_lock(&tcm_vhost_mutex); 1789 mutex_lock(&vhost_scsi_mutex);
1776 1790
1777 mutex_lock(&tpg->tv_tpg_mutex); 1791 mutex_lock(&tpg->tv_tpg_mutex);
1778 tpg->tv_tpg_port_count++; 1792 tpg->tv_tpg_port_count++;
1779 mutex_unlock(&tpg->tv_tpg_mutex); 1793 mutex_unlock(&tpg->tv_tpg_mutex);
1780 1794
1781 tcm_vhost_hotplug(tpg, lun); 1795 vhost_scsi_hotplug(tpg, lun);
1782 1796
1783 mutex_unlock(&tcm_vhost_mutex); 1797 mutex_unlock(&vhost_scsi_mutex);
1784 1798
1785 return 0; 1799 return 0;
1786} 1800}
1787 1801
1788static void tcm_vhost_port_unlink(struct se_portal_group *se_tpg, 1802static void vhost_scsi_port_unlink(struct se_portal_group *se_tpg,
1789 struct se_lun *lun) 1803 struct se_lun *lun)
1790{ 1804{
1791 struct tcm_vhost_tpg *tpg = container_of(se_tpg, 1805 struct vhost_scsi_tpg *tpg = container_of(se_tpg,
1792 struct tcm_vhost_tpg, se_tpg); 1806 struct vhost_scsi_tpg, se_tpg);
1793 1807
1794 mutex_lock(&tcm_vhost_mutex); 1808 mutex_lock(&vhost_scsi_mutex);
1795 1809
1796 mutex_lock(&tpg->tv_tpg_mutex); 1810 mutex_lock(&tpg->tv_tpg_mutex);
1797 tpg->tv_tpg_port_count--; 1811 tpg->tv_tpg_port_count--;
1798 mutex_unlock(&tpg->tv_tpg_mutex); 1812 mutex_unlock(&tpg->tv_tpg_mutex);
1799 1813
1800 tcm_vhost_hotunplug(tpg, lun); 1814 vhost_scsi_hotunplug(tpg, lun);
1801 1815
1802 mutex_unlock(&tcm_vhost_mutex); 1816 mutex_unlock(&vhost_scsi_mutex);
1803} 1817}
1804 1818
1805static struct se_node_acl * 1819static struct se_node_acl *
1806tcm_vhost_make_nodeacl(struct se_portal_group *se_tpg, 1820vhost_scsi_make_nodeacl(struct se_portal_group *se_tpg,
1807 struct config_group *group, 1821 struct config_group *group,
1808 const char *name) 1822 const char *name)
1809{ 1823{
1810 struct se_node_acl *se_nacl, *se_nacl_new; 1824 struct se_node_acl *se_nacl, *se_nacl_new;
1811 struct tcm_vhost_nacl *nacl; 1825 struct vhost_scsi_nacl *nacl;
1812 u64 wwpn = 0; 1826 u64 wwpn = 0;
1813 u32 nexus_depth; 1827 u32 nexus_depth;
1814 1828
1815 /* tcm_vhost_parse_wwn(name, &wwpn, 1) < 0) 1829 /* vhost_scsi_parse_wwn(name, &wwpn, 1) < 0)
1816 return ERR_PTR(-EINVAL); */ 1830 return ERR_PTR(-EINVAL); */
1817 se_nacl_new = tcm_vhost_alloc_fabric_acl(se_tpg); 1831 se_nacl_new = vhost_scsi_alloc_fabric_acl(se_tpg);
1818 if (!se_nacl_new) 1832 if (!se_nacl_new)
1819 return ERR_PTR(-ENOMEM); 1833 return ERR_PTR(-ENOMEM);
1820 1834
@@ -1826,37 +1840,37 @@ tcm_vhost_make_nodeacl(struct se_portal_group *se_tpg,
1826 se_nacl = core_tpg_add_initiator_node_acl(se_tpg, se_nacl_new, 1840 se_nacl = core_tpg_add_initiator_node_acl(se_tpg, se_nacl_new,
1827 name, nexus_depth); 1841 name, nexus_depth);
1828 if (IS_ERR(se_nacl)) { 1842 if (IS_ERR(se_nacl)) {
1829 tcm_vhost_release_fabric_acl(se_tpg, se_nacl_new); 1843 vhost_scsi_release_fabric_acl(se_tpg, se_nacl_new);
1830 return se_nacl; 1844 return se_nacl;
1831 } 1845 }
1832 /* 1846 /*
1833 * Locate our struct tcm_vhost_nacl and set the FC Nport WWPN 1847 * Locate our struct vhost_scsi_nacl and set the FC Nport WWPN
1834 */ 1848 */
1835 nacl = container_of(se_nacl, struct tcm_vhost_nacl, se_node_acl); 1849 nacl = container_of(se_nacl, struct vhost_scsi_nacl, se_node_acl);
1836 nacl->iport_wwpn = wwpn; 1850 nacl->iport_wwpn = wwpn;
1837 1851
1838 return se_nacl; 1852 return se_nacl;
1839} 1853}
1840 1854
1841static void tcm_vhost_drop_nodeacl(struct se_node_acl *se_acl) 1855static void vhost_scsi_drop_nodeacl(struct se_node_acl *se_acl)
1842{ 1856{
1843 struct tcm_vhost_nacl *nacl = container_of(se_acl, 1857 struct vhost_scsi_nacl *nacl = container_of(se_acl,
1844 struct tcm_vhost_nacl, se_node_acl); 1858 struct vhost_scsi_nacl, se_node_acl);
1845 core_tpg_del_initiator_node_acl(se_acl->se_tpg, se_acl, 1); 1859 core_tpg_del_initiator_node_acl(se_acl->se_tpg, se_acl, 1);
1846 kfree(nacl); 1860 kfree(nacl);
1847} 1861}
1848 1862
1849static void tcm_vhost_free_cmd_map_res(struct tcm_vhost_nexus *nexus, 1863static void vhost_scsi_free_cmd_map_res(struct vhost_scsi_nexus *nexus,
1850 struct se_session *se_sess) 1864 struct se_session *se_sess)
1851{ 1865{
1852 struct tcm_vhost_cmd *tv_cmd; 1866 struct vhost_scsi_cmd *tv_cmd;
1853 unsigned int i; 1867 unsigned int i;
1854 1868
1855 if (!se_sess->sess_cmd_map) 1869 if (!se_sess->sess_cmd_map)
1856 return; 1870 return;
1857 1871
1858 for (i = 0; i < TCM_VHOST_DEFAULT_TAGS; i++) { 1872 for (i = 0; i < VHOST_SCSI_DEFAULT_TAGS; i++) {
1859 tv_cmd = &((struct tcm_vhost_cmd *)se_sess->sess_cmd_map)[i]; 1873 tv_cmd = &((struct vhost_scsi_cmd *)se_sess->sess_cmd_map)[i];
1860 1874
1861 kfree(tv_cmd->tvc_sgl); 1875 kfree(tv_cmd->tvc_sgl);
1862 kfree(tv_cmd->tvc_prot_sgl); 1876 kfree(tv_cmd->tvc_prot_sgl);
@@ -1864,13 +1878,13 @@ static void tcm_vhost_free_cmd_map_res(struct tcm_vhost_nexus *nexus,
1864 } 1878 }
1865} 1879}
1866 1880
1867static int tcm_vhost_make_nexus(struct tcm_vhost_tpg *tpg, 1881static int vhost_scsi_make_nexus(struct vhost_scsi_tpg *tpg,
1868 const char *name) 1882 const char *name)
1869{ 1883{
1870 struct se_portal_group *se_tpg; 1884 struct se_portal_group *se_tpg;
1871 struct se_session *se_sess; 1885 struct se_session *se_sess;
1872 struct tcm_vhost_nexus *tv_nexus; 1886 struct vhost_scsi_nexus *tv_nexus;
1873 struct tcm_vhost_cmd *tv_cmd; 1887 struct vhost_scsi_cmd *tv_cmd;
1874 unsigned int i; 1888 unsigned int i;
1875 1889
1876 mutex_lock(&tpg->tv_tpg_mutex); 1890 mutex_lock(&tpg->tv_tpg_mutex);
@@ -1881,19 +1895,19 @@ static int tcm_vhost_make_nexus(struct tcm_vhost_tpg *tpg,
1881 } 1895 }
1882 se_tpg = &tpg->se_tpg; 1896 se_tpg = &tpg->se_tpg;
1883 1897
1884 tv_nexus = kzalloc(sizeof(struct tcm_vhost_nexus), GFP_KERNEL); 1898 tv_nexus = kzalloc(sizeof(struct vhost_scsi_nexus), GFP_KERNEL);
1885 if (!tv_nexus) { 1899 if (!tv_nexus) {
1886 mutex_unlock(&tpg->tv_tpg_mutex); 1900 mutex_unlock(&tpg->tv_tpg_mutex);
1887 pr_err("Unable to allocate struct tcm_vhost_nexus\n"); 1901 pr_err("Unable to allocate struct vhost_scsi_nexus\n");
1888 return -ENOMEM; 1902 return -ENOMEM;
1889 } 1903 }
1890 /* 1904 /*
1891 * Initialize the struct se_session pointer and setup tagpool 1905 * Initialize the struct se_session pointer and setup tagpool
1892 * for struct tcm_vhost_cmd descriptors 1906 * for struct vhost_scsi_cmd descriptors
1893 */ 1907 */
1894 tv_nexus->tvn_se_sess = transport_init_session_tags( 1908 tv_nexus->tvn_se_sess = transport_init_session_tags(
1895 TCM_VHOST_DEFAULT_TAGS, 1909 VHOST_SCSI_DEFAULT_TAGS,
1896 sizeof(struct tcm_vhost_cmd), 1910 sizeof(struct vhost_scsi_cmd),
1897 TARGET_PROT_DIN_PASS | TARGET_PROT_DOUT_PASS); 1911 TARGET_PROT_DIN_PASS | TARGET_PROT_DOUT_PASS);
1898 if (IS_ERR(tv_nexus->tvn_se_sess)) { 1912 if (IS_ERR(tv_nexus->tvn_se_sess)) {
1899 mutex_unlock(&tpg->tv_tpg_mutex); 1913 mutex_unlock(&tpg->tv_tpg_mutex);
@@ -1901,11 +1915,11 @@ static int tcm_vhost_make_nexus(struct tcm_vhost_tpg *tpg,
1901 return -ENOMEM; 1915 return -ENOMEM;
1902 } 1916 }
1903 se_sess = tv_nexus->tvn_se_sess; 1917 se_sess = tv_nexus->tvn_se_sess;
1904 for (i = 0; i < TCM_VHOST_DEFAULT_TAGS; i++) { 1918 for (i = 0; i < VHOST_SCSI_DEFAULT_TAGS; i++) {
1905 tv_cmd = &((struct tcm_vhost_cmd *)se_sess->sess_cmd_map)[i]; 1919 tv_cmd = &((struct vhost_scsi_cmd *)se_sess->sess_cmd_map)[i];
1906 1920
1907 tv_cmd->tvc_sgl = kzalloc(sizeof(struct scatterlist) * 1921 tv_cmd->tvc_sgl = kzalloc(sizeof(struct scatterlist) *
1908 TCM_VHOST_PREALLOC_SGLS, GFP_KERNEL); 1922 VHOST_SCSI_PREALLOC_SGLS, GFP_KERNEL);
1909 if (!tv_cmd->tvc_sgl) { 1923 if (!tv_cmd->tvc_sgl) {
1910 mutex_unlock(&tpg->tv_tpg_mutex); 1924 mutex_unlock(&tpg->tv_tpg_mutex);
1911 pr_err("Unable to allocate tv_cmd->tvc_sgl\n"); 1925 pr_err("Unable to allocate tv_cmd->tvc_sgl\n");
@@ -1913,7 +1927,7 @@ static int tcm_vhost_make_nexus(struct tcm_vhost_tpg *tpg,
1913 } 1927 }
1914 1928
1915 tv_cmd->tvc_upages = kzalloc(sizeof(struct page *) * 1929 tv_cmd->tvc_upages = kzalloc(sizeof(struct page *) *
1916 TCM_VHOST_PREALLOC_UPAGES, GFP_KERNEL); 1930 VHOST_SCSI_PREALLOC_UPAGES, GFP_KERNEL);
1917 if (!tv_cmd->tvc_upages) { 1931 if (!tv_cmd->tvc_upages) {
1918 mutex_unlock(&tpg->tv_tpg_mutex); 1932 mutex_unlock(&tpg->tv_tpg_mutex);
1919 pr_err("Unable to allocate tv_cmd->tvc_upages\n"); 1933 pr_err("Unable to allocate tv_cmd->tvc_upages\n");
@@ -1921,7 +1935,7 @@ static int tcm_vhost_make_nexus(struct tcm_vhost_tpg *tpg,
1921 } 1935 }
1922 1936
1923 tv_cmd->tvc_prot_sgl = kzalloc(sizeof(struct scatterlist) * 1937 tv_cmd->tvc_prot_sgl = kzalloc(sizeof(struct scatterlist) *
1924 TCM_VHOST_PREALLOC_PROT_SGLS, GFP_KERNEL); 1938 VHOST_SCSI_PREALLOC_PROT_SGLS, GFP_KERNEL);
1925 if (!tv_cmd->tvc_prot_sgl) { 1939 if (!tv_cmd->tvc_prot_sgl) {
1926 mutex_unlock(&tpg->tv_tpg_mutex); 1940 mutex_unlock(&tpg->tv_tpg_mutex);
1927 pr_err("Unable to allocate tv_cmd->tvc_prot_sgl\n"); 1941 pr_err("Unable to allocate tv_cmd->tvc_prot_sgl\n");
@@ -1930,7 +1944,7 @@ static int tcm_vhost_make_nexus(struct tcm_vhost_tpg *tpg,
1930 } 1944 }
1931 /* 1945 /*
1932 * Since we are running in 'demo mode' this call with generate a 1946 * Since we are running in 'demo mode' this call with generate a
1933 * struct se_node_acl for the tcm_vhost struct se_portal_group with 1947 * struct se_node_acl for the vhost_scsi struct se_portal_group with
1934 * the SCSI Initiator port name of the passed configfs group 'name'. 1948 * the SCSI Initiator port name of the passed configfs group 'name'.
1935 */ 1949 */
1936 tv_nexus->tvn_se_sess->se_node_acl = core_tpg_check_initiator_node_acl( 1950 tv_nexus->tvn_se_sess->se_node_acl = core_tpg_check_initiator_node_acl(
@@ -1942,10 +1956,9 @@ static int tcm_vhost_make_nexus(struct tcm_vhost_tpg *tpg,
1942 goto out; 1956 goto out;
1943 } 1957 }
1944 /* 1958 /*
1945 * Now register the TCM vhost virtual I_T Nexus as active with the 1959 * Now register the TCM vhost virtual I_T Nexus as active.
1946 * call to __transport_register_session()
1947 */ 1960 */
1948 __transport_register_session(se_tpg, tv_nexus->tvn_se_sess->se_node_acl, 1961 transport_register_session(se_tpg, tv_nexus->tvn_se_sess->se_node_acl,
1949 tv_nexus->tvn_se_sess, tv_nexus); 1962 tv_nexus->tvn_se_sess, tv_nexus);
1950 tpg->tpg_nexus = tv_nexus; 1963 tpg->tpg_nexus = tv_nexus;
1951 1964
@@ -1953,16 +1966,16 @@ static int tcm_vhost_make_nexus(struct tcm_vhost_tpg *tpg,
1953 return 0; 1966 return 0;
1954 1967
1955out: 1968out:
1956 tcm_vhost_free_cmd_map_res(tv_nexus, se_sess); 1969 vhost_scsi_free_cmd_map_res(tv_nexus, se_sess);
1957 transport_free_session(se_sess); 1970 transport_free_session(se_sess);
1958 kfree(tv_nexus); 1971 kfree(tv_nexus);
1959 return -ENOMEM; 1972 return -ENOMEM;
1960} 1973}
1961 1974
1962static int tcm_vhost_drop_nexus(struct tcm_vhost_tpg *tpg) 1975static int vhost_scsi_drop_nexus(struct vhost_scsi_tpg *tpg)
1963{ 1976{
1964 struct se_session *se_sess; 1977 struct se_session *se_sess;
1965 struct tcm_vhost_nexus *tv_nexus; 1978 struct vhost_scsi_nexus *tv_nexus;
1966 1979
1967 mutex_lock(&tpg->tv_tpg_mutex); 1980 mutex_lock(&tpg->tv_tpg_mutex);
1968 tv_nexus = tpg->tpg_nexus; 1981 tv_nexus = tpg->tpg_nexus;
@@ -1994,10 +2007,10 @@ static int tcm_vhost_drop_nexus(struct tcm_vhost_tpg *tpg)
1994 } 2007 }
1995 2008
1996 pr_debug("TCM_vhost_ConfigFS: Removing I_T Nexus to emulated" 2009 pr_debug("TCM_vhost_ConfigFS: Removing I_T Nexus to emulated"
1997 " %s Initiator Port: %s\n", tcm_vhost_dump_proto_id(tpg->tport), 2010 " %s Initiator Port: %s\n", vhost_scsi_dump_proto_id(tpg->tport),
1998 tv_nexus->tvn_se_sess->se_node_acl->initiatorname); 2011 tv_nexus->tvn_se_sess->se_node_acl->initiatorname);
1999 2012
2000 tcm_vhost_free_cmd_map_res(tv_nexus, se_sess); 2013 vhost_scsi_free_cmd_map_res(tv_nexus, se_sess);
2001 /* 2014 /*
2002 * Release the SCSI I_T Nexus to the emulated vhost Target Port 2015 * Release the SCSI I_T Nexus to the emulated vhost Target Port
2003 */ 2016 */
@@ -2009,12 +2022,12 @@ static int tcm_vhost_drop_nexus(struct tcm_vhost_tpg *tpg)
2009 return 0; 2022 return 0;
2010} 2023}
2011 2024
2012static ssize_t tcm_vhost_tpg_show_nexus(struct se_portal_group *se_tpg, 2025static ssize_t vhost_scsi_tpg_show_nexus(struct se_portal_group *se_tpg,
2013 char *page) 2026 char *page)
2014{ 2027{
2015 struct tcm_vhost_tpg *tpg = container_of(se_tpg, 2028 struct vhost_scsi_tpg *tpg = container_of(se_tpg,
2016 struct tcm_vhost_tpg, se_tpg); 2029 struct vhost_scsi_tpg, se_tpg);
2017 struct tcm_vhost_nexus *tv_nexus; 2030 struct vhost_scsi_nexus *tv_nexus;
2018 ssize_t ret; 2031 ssize_t ret;
2019 2032
2020 mutex_lock(&tpg->tv_tpg_mutex); 2033 mutex_lock(&tpg->tv_tpg_mutex);
@@ -2030,40 +2043,40 @@ static ssize_t tcm_vhost_tpg_show_nexus(struct se_portal_group *se_tpg,
2030 return ret; 2043 return ret;
2031} 2044}
2032 2045
2033static ssize_t tcm_vhost_tpg_store_nexus(struct se_portal_group *se_tpg, 2046static ssize_t vhost_scsi_tpg_store_nexus(struct se_portal_group *se_tpg,
2034 const char *page, 2047 const char *page,
2035 size_t count) 2048 size_t count)
2036{ 2049{
2037 struct tcm_vhost_tpg *tpg = container_of(se_tpg, 2050 struct vhost_scsi_tpg *tpg = container_of(se_tpg,
2038 struct tcm_vhost_tpg, se_tpg); 2051 struct vhost_scsi_tpg, se_tpg);
2039 struct tcm_vhost_tport *tport_wwn = tpg->tport; 2052 struct vhost_scsi_tport *tport_wwn = tpg->tport;
2040 unsigned char i_port[TCM_VHOST_NAMELEN], *ptr, *port_ptr; 2053 unsigned char i_port[VHOST_SCSI_NAMELEN], *ptr, *port_ptr;
2041 int ret; 2054 int ret;
2042 /* 2055 /*
2043 * Shutdown the active I_T nexus if 'NULL' is passed.. 2056 * Shutdown the active I_T nexus if 'NULL' is passed..
2044 */ 2057 */
2045 if (!strncmp(page, "NULL", 4)) { 2058 if (!strncmp(page, "NULL", 4)) {
2046 ret = tcm_vhost_drop_nexus(tpg); 2059 ret = vhost_scsi_drop_nexus(tpg);
2047 return (!ret) ? count : ret; 2060 return (!ret) ? count : ret;
2048 } 2061 }
2049 /* 2062 /*
2050 * Otherwise make sure the passed virtual Initiator port WWN matches 2063 * Otherwise make sure the passed virtual Initiator port WWN matches
2051 * the fabric protocol_id set in tcm_vhost_make_tport(), and call 2064 * the fabric protocol_id set in vhost_scsi_make_tport(), and call
2052 * tcm_vhost_make_nexus(). 2065 * vhost_scsi_make_nexus().
2053 */ 2066 */
2054 if (strlen(page) >= TCM_VHOST_NAMELEN) { 2067 if (strlen(page) >= VHOST_SCSI_NAMELEN) {
2055 pr_err("Emulated NAA Sas Address: %s, exceeds" 2068 pr_err("Emulated NAA Sas Address: %s, exceeds"
2056 " max: %d\n", page, TCM_VHOST_NAMELEN); 2069 " max: %d\n", page, VHOST_SCSI_NAMELEN);
2057 return -EINVAL; 2070 return -EINVAL;
2058 } 2071 }
2059 snprintf(&i_port[0], TCM_VHOST_NAMELEN, "%s", page); 2072 snprintf(&i_port[0], VHOST_SCSI_NAMELEN, "%s", page);
2060 2073
2061 ptr = strstr(i_port, "naa."); 2074 ptr = strstr(i_port, "naa.");
2062 if (ptr) { 2075 if (ptr) {
2063 if (tport_wwn->tport_proto_id != SCSI_PROTOCOL_SAS) { 2076 if (tport_wwn->tport_proto_id != SCSI_PROTOCOL_SAS) {
2064 pr_err("Passed SAS Initiator Port %s does not" 2077 pr_err("Passed SAS Initiator Port %s does not"
2065 " match target port protoid: %s\n", i_port, 2078 " match target port protoid: %s\n", i_port,
2066 tcm_vhost_dump_proto_id(tport_wwn)); 2079 vhost_scsi_dump_proto_id(tport_wwn));
2067 return -EINVAL; 2080 return -EINVAL;
2068 } 2081 }
2069 port_ptr = &i_port[0]; 2082 port_ptr = &i_port[0];
@@ -2074,7 +2087,7 @@ static ssize_t tcm_vhost_tpg_store_nexus(struct se_portal_group *se_tpg,
2074 if (tport_wwn->tport_proto_id != SCSI_PROTOCOL_FCP) { 2087 if (tport_wwn->tport_proto_id != SCSI_PROTOCOL_FCP) {
2075 pr_err("Passed FCP Initiator Port %s does not" 2088 pr_err("Passed FCP Initiator Port %s does not"
2076 " match target port protoid: %s\n", i_port, 2089 " match target port protoid: %s\n", i_port,
2077 tcm_vhost_dump_proto_id(tport_wwn)); 2090 vhost_scsi_dump_proto_id(tport_wwn));
2078 return -EINVAL; 2091 return -EINVAL;
2079 } 2092 }
2080 port_ptr = &i_port[3]; /* Skip over "fc." */ 2093 port_ptr = &i_port[3]; /* Skip over "fc." */
@@ -2085,7 +2098,7 @@ static ssize_t tcm_vhost_tpg_store_nexus(struct se_portal_group *se_tpg,
2085 if (tport_wwn->tport_proto_id != SCSI_PROTOCOL_ISCSI) { 2098 if (tport_wwn->tport_proto_id != SCSI_PROTOCOL_ISCSI) {
2086 pr_err("Passed iSCSI Initiator Port %s does not" 2099 pr_err("Passed iSCSI Initiator Port %s does not"
2087 " match target port protoid: %s\n", i_port, 2100 " match target port protoid: %s\n", i_port,
2088 tcm_vhost_dump_proto_id(tport_wwn)); 2101 vhost_scsi_dump_proto_id(tport_wwn));
2089 return -EINVAL; 2102 return -EINVAL;
2090 } 2103 }
2091 port_ptr = &i_port[0]; 2104 port_ptr = &i_port[0];
@@ -2101,40 +2114,40 @@ check_newline:
2101 if (i_port[strlen(i_port)-1] == '\n') 2114 if (i_port[strlen(i_port)-1] == '\n')
2102 i_port[strlen(i_port)-1] = '\0'; 2115 i_port[strlen(i_port)-1] = '\0';
2103 2116
2104 ret = tcm_vhost_make_nexus(tpg, port_ptr); 2117 ret = vhost_scsi_make_nexus(tpg, port_ptr);
2105 if (ret < 0) 2118 if (ret < 0)
2106 return ret; 2119 return ret;
2107 2120
2108 return count; 2121 return count;
2109} 2122}
2110 2123
2111TF_TPG_BASE_ATTR(tcm_vhost, nexus, S_IRUGO | S_IWUSR); 2124TF_TPG_BASE_ATTR(vhost_scsi, nexus, S_IRUGO | S_IWUSR);
2112 2125
2113static struct configfs_attribute *tcm_vhost_tpg_attrs[] = { 2126static struct configfs_attribute *vhost_scsi_tpg_attrs[] = {
2114 &tcm_vhost_tpg_nexus.attr, 2127 &vhost_scsi_tpg_nexus.attr,
2115 NULL, 2128 NULL,
2116}; 2129};
2117 2130
2118static struct se_portal_group * 2131static struct se_portal_group *
2119tcm_vhost_make_tpg(struct se_wwn *wwn, 2132vhost_scsi_make_tpg(struct se_wwn *wwn,
2120 struct config_group *group, 2133 struct config_group *group,
2121 const char *name) 2134 const char *name)
2122{ 2135{
2123 struct tcm_vhost_tport *tport = container_of(wwn, 2136 struct vhost_scsi_tport *tport = container_of(wwn,
2124 struct tcm_vhost_tport, tport_wwn); 2137 struct vhost_scsi_tport, tport_wwn);
2125 2138
2126 struct tcm_vhost_tpg *tpg; 2139 struct vhost_scsi_tpg *tpg;
2127 unsigned long tpgt; 2140 u16 tpgt;
2128 int ret; 2141 int ret;
2129 2142
2130 if (strstr(name, "tpgt_") != name) 2143 if (strstr(name, "tpgt_") != name)
2131 return ERR_PTR(-EINVAL); 2144 return ERR_PTR(-EINVAL);
2132 if (kstrtoul(name + 5, 10, &tpgt) || tpgt > UINT_MAX) 2145 if (kstrtou16(name + 5, 10, &tpgt) || tpgt >= VHOST_SCSI_MAX_TARGET)
2133 return ERR_PTR(-EINVAL); 2146 return ERR_PTR(-EINVAL);
2134 2147
2135 tpg = kzalloc(sizeof(struct tcm_vhost_tpg), GFP_KERNEL); 2148 tpg = kzalloc(sizeof(struct vhost_scsi_tpg), GFP_KERNEL);
2136 if (!tpg) { 2149 if (!tpg) {
2137 pr_err("Unable to allocate struct tcm_vhost_tpg"); 2150 pr_err("Unable to allocate struct vhost_scsi_tpg");
2138 return ERR_PTR(-ENOMEM); 2151 return ERR_PTR(-ENOMEM);
2139 } 2152 }
2140 mutex_init(&tpg->tv_tpg_mutex); 2153 mutex_init(&tpg->tv_tpg_mutex);
@@ -2142,31 +2155,31 @@ tcm_vhost_make_tpg(struct se_wwn *wwn,
2142 tpg->tport = tport; 2155 tpg->tport = tport;
2143 tpg->tport_tpgt = tpgt; 2156 tpg->tport_tpgt = tpgt;
2144 2157
2145 ret = core_tpg_register(&tcm_vhost_fabric_configfs->tf_ops, wwn, 2158 ret = core_tpg_register(&vhost_scsi_fabric_configfs->tf_ops, wwn,
2146 &tpg->se_tpg, tpg, TRANSPORT_TPG_TYPE_NORMAL); 2159 &tpg->se_tpg, tpg, TRANSPORT_TPG_TYPE_NORMAL);
2147 if (ret < 0) { 2160 if (ret < 0) {
2148 kfree(tpg); 2161 kfree(tpg);
2149 return NULL; 2162 return NULL;
2150 } 2163 }
2151 mutex_lock(&tcm_vhost_mutex); 2164 mutex_lock(&vhost_scsi_mutex);
2152 list_add_tail(&tpg->tv_tpg_list, &tcm_vhost_list); 2165 list_add_tail(&tpg->tv_tpg_list, &vhost_scsi_list);
2153 mutex_unlock(&tcm_vhost_mutex); 2166 mutex_unlock(&vhost_scsi_mutex);
2154 2167
2155 return &tpg->se_tpg; 2168 return &tpg->se_tpg;
2156} 2169}
2157 2170
2158static void tcm_vhost_drop_tpg(struct se_portal_group *se_tpg) 2171static void vhost_scsi_drop_tpg(struct se_portal_group *se_tpg)
2159{ 2172{
2160 struct tcm_vhost_tpg *tpg = container_of(se_tpg, 2173 struct vhost_scsi_tpg *tpg = container_of(se_tpg,
2161 struct tcm_vhost_tpg, se_tpg); 2174 struct vhost_scsi_tpg, se_tpg);
2162 2175
2163 mutex_lock(&tcm_vhost_mutex); 2176 mutex_lock(&vhost_scsi_mutex);
2164 list_del(&tpg->tv_tpg_list); 2177 list_del(&tpg->tv_tpg_list);
2165 mutex_unlock(&tcm_vhost_mutex); 2178 mutex_unlock(&vhost_scsi_mutex);
2166 /* 2179 /*
2167 * Release the virtual I_T Nexus for this vhost TPG 2180 * Release the virtual I_T Nexus for this vhost TPG
2168 */ 2181 */
2169 tcm_vhost_drop_nexus(tpg); 2182 vhost_scsi_drop_nexus(tpg);
2170 /* 2183 /*
2171 * Deregister the se_tpg from TCM.. 2184 * Deregister the se_tpg from TCM..
2172 */ 2185 */
@@ -2175,21 +2188,21 @@ static void tcm_vhost_drop_tpg(struct se_portal_group *se_tpg)
2175} 2188}
2176 2189
2177static struct se_wwn * 2190static struct se_wwn *
2178tcm_vhost_make_tport(struct target_fabric_configfs *tf, 2191vhost_scsi_make_tport(struct target_fabric_configfs *tf,
2179 struct config_group *group, 2192 struct config_group *group,
2180 const char *name) 2193 const char *name)
2181{ 2194{
2182 struct tcm_vhost_tport *tport; 2195 struct vhost_scsi_tport *tport;
2183 char *ptr; 2196 char *ptr;
2184 u64 wwpn = 0; 2197 u64 wwpn = 0;
2185 int off = 0; 2198 int off = 0;
2186 2199
2187 /* if (tcm_vhost_parse_wwn(name, &wwpn, 1) < 0) 2200 /* if (vhost_scsi_parse_wwn(name, &wwpn, 1) < 0)
2188 return ERR_PTR(-EINVAL); */ 2201 return ERR_PTR(-EINVAL); */
2189 2202
2190 tport = kzalloc(sizeof(struct tcm_vhost_tport), GFP_KERNEL); 2203 tport = kzalloc(sizeof(struct vhost_scsi_tport), GFP_KERNEL);
2191 if (!tport) { 2204 if (!tport) {
2192 pr_err("Unable to allocate struct tcm_vhost_tport"); 2205 pr_err("Unable to allocate struct vhost_scsi_tport");
2193 return ERR_PTR(-ENOMEM); 2206 return ERR_PTR(-ENOMEM);
2194 } 2207 }
2195 tport->tport_wwpn = wwpn; 2208 tport->tport_wwpn = wwpn;
@@ -2220,102 +2233,102 @@ tcm_vhost_make_tport(struct target_fabric_configfs *tf,
2220 return ERR_PTR(-EINVAL); 2233 return ERR_PTR(-EINVAL);
2221 2234
2222check_len: 2235check_len:
2223 if (strlen(name) >= TCM_VHOST_NAMELEN) { 2236 if (strlen(name) >= VHOST_SCSI_NAMELEN) {
2224 pr_err("Emulated %s Address: %s, exceeds" 2237 pr_err("Emulated %s Address: %s, exceeds"
2225 " max: %d\n", name, tcm_vhost_dump_proto_id(tport), 2238 " max: %d\n", name, vhost_scsi_dump_proto_id(tport),
2226 TCM_VHOST_NAMELEN); 2239 VHOST_SCSI_NAMELEN);
2227 kfree(tport); 2240 kfree(tport);
2228 return ERR_PTR(-EINVAL); 2241 return ERR_PTR(-EINVAL);
2229 } 2242 }
2230 snprintf(&tport->tport_name[0], TCM_VHOST_NAMELEN, "%s", &name[off]); 2243 snprintf(&tport->tport_name[0], VHOST_SCSI_NAMELEN, "%s", &name[off]);
2231 2244
2232 pr_debug("TCM_VHost_ConfigFS: Allocated emulated Target" 2245 pr_debug("TCM_VHost_ConfigFS: Allocated emulated Target"
2233 " %s Address: %s\n", tcm_vhost_dump_proto_id(tport), name); 2246 " %s Address: %s\n", vhost_scsi_dump_proto_id(tport), name);
2234 2247
2235 return &tport->tport_wwn; 2248 return &tport->tport_wwn;
2236} 2249}
2237 2250
2238static void tcm_vhost_drop_tport(struct se_wwn *wwn) 2251static void vhost_scsi_drop_tport(struct se_wwn *wwn)
2239{ 2252{
2240 struct tcm_vhost_tport *tport = container_of(wwn, 2253 struct vhost_scsi_tport *tport = container_of(wwn,
2241 struct tcm_vhost_tport, tport_wwn); 2254 struct vhost_scsi_tport, tport_wwn);
2242 2255
2243 pr_debug("TCM_VHost_ConfigFS: Deallocating emulated Target" 2256 pr_debug("TCM_VHost_ConfigFS: Deallocating emulated Target"
2244 " %s Address: %s\n", tcm_vhost_dump_proto_id(tport), 2257 " %s Address: %s\n", vhost_scsi_dump_proto_id(tport),
2245 tport->tport_name); 2258 tport->tport_name);
2246 2259
2247 kfree(tport); 2260 kfree(tport);
2248} 2261}
2249 2262
2250static ssize_t 2263static ssize_t
2251tcm_vhost_wwn_show_attr_version(struct target_fabric_configfs *tf, 2264vhost_scsi_wwn_show_attr_version(struct target_fabric_configfs *tf,
2252 char *page) 2265 char *page)
2253{ 2266{
2254 return sprintf(page, "TCM_VHOST fabric module %s on %s/%s" 2267 return sprintf(page, "TCM_VHOST fabric module %s on %s/%s"
2255 "on "UTS_RELEASE"\n", TCM_VHOST_VERSION, utsname()->sysname, 2268 "on "UTS_RELEASE"\n", VHOST_SCSI_VERSION, utsname()->sysname,
2256 utsname()->machine); 2269 utsname()->machine);
2257} 2270}
2258 2271
2259TF_WWN_ATTR_RO(tcm_vhost, version); 2272TF_WWN_ATTR_RO(vhost_scsi, version);
2260 2273
2261static struct configfs_attribute *tcm_vhost_wwn_attrs[] = { 2274static struct configfs_attribute *vhost_scsi_wwn_attrs[] = {
2262 &tcm_vhost_wwn_version.attr, 2275 &vhost_scsi_wwn_version.attr,
2263 NULL, 2276 NULL,
2264}; 2277};
2265 2278
2266static struct target_core_fabric_ops tcm_vhost_ops = { 2279static struct target_core_fabric_ops vhost_scsi_ops = {
2267 .get_fabric_name = tcm_vhost_get_fabric_name, 2280 .get_fabric_name = vhost_scsi_get_fabric_name,
2268 .get_fabric_proto_ident = tcm_vhost_get_fabric_proto_ident, 2281 .get_fabric_proto_ident = vhost_scsi_get_fabric_proto_ident,
2269 .tpg_get_wwn = tcm_vhost_get_fabric_wwn, 2282 .tpg_get_wwn = vhost_scsi_get_fabric_wwn,
2270 .tpg_get_tag = tcm_vhost_get_tag, 2283 .tpg_get_tag = vhost_scsi_get_tpgt,
2271 .tpg_get_default_depth = tcm_vhost_get_default_depth, 2284 .tpg_get_default_depth = vhost_scsi_get_default_depth,
2272 .tpg_get_pr_transport_id = tcm_vhost_get_pr_transport_id, 2285 .tpg_get_pr_transport_id = vhost_scsi_get_pr_transport_id,
2273 .tpg_get_pr_transport_id_len = tcm_vhost_get_pr_transport_id_len, 2286 .tpg_get_pr_transport_id_len = vhost_scsi_get_pr_transport_id_len,
2274 .tpg_parse_pr_out_transport_id = tcm_vhost_parse_pr_out_transport_id, 2287 .tpg_parse_pr_out_transport_id = vhost_scsi_parse_pr_out_transport_id,
2275 .tpg_check_demo_mode = tcm_vhost_check_true, 2288 .tpg_check_demo_mode = vhost_scsi_check_true,
2276 .tpg_check_demo_mode_cache = tcm_vhost_check_true, 2289 .tpg_check_demo_mode_cache = vhost_scsi_check_true,
2277 .tpg_check_demo_mode_write_protect = tcm_vhost_check_false, 2290 .tpg_check_demo_mode_write_protect = vhost_scsi_check_false,
2278 .tpg_check_prod_mode_write_protect = tcm_vhost_check_false, 2291 .tpg_check_prod_mode_write_protect = vhost_scsi_check_false,
2279 .tpg_alloc_fabric_acl = tcm_vhost_alloc_fabric_acl, 2292 .tpg_alloc_fabric_acl = vhost_scsi_alloc_fabric_acl,
2280 .tpg_release_fabric_acl = tcm_vhost_release_fabric_acl, 2293 .tpg_release_fabric_acl = vhost_scsi_release_fabric_acl,
2281 .tpg_get_inst_index = tcm_vhost_tpg_get_inst_index, 2294 .tpg_get_inst_index = vhost_scsi_tpg_get_inst_index,
2282 .release_cmd = tcm_vhost_release_cmd, 2295 .release_cmd = vhost_scsi_release_cmd,
2283 .check_stop_free = vhost_scsi_check_stop_free, 2296 .check_stop_free = vhost_scsi_check_stop_free,
2284 .shutdown_session = tcm_vhost_shutdown_session, 2297 .shutdown_session = vhost_scsi_shutdown_session,
2285 .close_session = tcm_vhost_close_session, 2298 .close_session = vhost_scsi_close_session,
2286 .sess_get_index = tcm_vhost_sess_get_index, 2299 .sess_get_index = vhost_scsi_sess_get_index,
2287 .sess_get_initiator_sid = NULL, 2300 .sess_get_initiator_sid = NULL,
2288 .write_pending = tcm_vhost_write_pending, 2301 .write_pending = vhost_scsi_write_pending,
2289 .write_pending_status = tcm_vhost_write_pending_status, 2302 .write_pending_status = vhost_scsi_write_pending_status,
2290 .set_default_node_attributes = tcm_vhost_set_default_node_attrs, 2303 .set_default_node_attributes = vhost_scsi_set_default_node_attrs,
2291 .get_task_tag = tcm_vhost_get_task_tag, 2304 .get_task_tag = vhost_scsi_get_task_tag,
2292 .get_cmd_state = tcm_vhost_get_cmd_state, 2305 .get_cmd_state = vhost_scsi_get_cmd_state,
2293 .queue_data_in = tcm_vhost_queue_data_in, 2306 .queue_data_in = vhost_scsi_queue_data_in,
2294 .queue_status = tcm_vhost_queue_status, 2307 .queue_status = vhost_scsi_queue_status,
2295 .queue_tm_rsp = tcm_vhost_queue_tm_rsp, 2308 .queue_tm_rsp = vhost_scsi_queue_tm_rsp,
2296 .aborted_task = tcm_vhost_aborted_task, 2309 .aborted_task = vhost_scsi_aborted_task,
2297 /* 2310 /*
2298 * Setup callers for generic logic in target_core_fabric_configfs.c 2311 * Setup callers for generic logic in target_core_fabric_configfs.c
2299 */ 2312 */
2300 .fabric_make_wwn = tcm_vhost_make_tport, 2313 .fabric_make_wwn = vhost_scsi_make_tport,
2301 .fabric_drop_wwn = tcm_vhost_drop_tport, 2314 .fabric_drop_wwn = vhost_scsi_drop_tport,
2302 .fabric_make_tpg = tcm_vhost_make_tpg, 2315 .fabric_make_tpg = vhost_scsi_make_tpg,
2303 .fabric_drop_tpg = tcm_vhost_drop_tpg, 2316 .fabric_drop_tpg = vhost_scsi_drop_tpg,
2304 .fabric_post_link = tcm_vhost_port_link, 2317 .fabric_post_link = vhost_scsi_port_link,
2305 .fabric_pre_unlink = tcm_vhost_port_unlink, 2318 .fabric_pre_unlink = vhost_scsi_port_unlink,
2306 .fabric_make_np = NULL, 2319 .fabric_make_np = NULL,
2307 .fabric_drop_np = NULL, 2320 .fabric_drop_np = NULL,
2308 .fabric_make_nodeacl = tcm_vhost_make_nodeacl, 2321 .fabric_make_nodeacl = vhost_scsi_make_nodeacl,
2309 .fabric_drop_nodeacl = tcm_vhost_drop_nodeacl, 2322 .fabric_drop_nodeacl = vhost_scsi_drop_nodeacl,
2310}; 2323};
2311 2324
2312static int tcm_vhost_register_configfs(void) 2325static int vhost_scsi_register_configfs(void)
2313{ 2326{
2314 struct target_fabric_configfs *fabric; 2327 struct target_fabric_configfs *fabric;
2315 int ret; 2328 int ret;
2316 2329
2317 pr_debug("TCM_VHOST fabric module %s on %s/%s" 2330 pr_debug("vhost-scsi fabric module %s on %s/%s"
2318 " on "UTS_RELEASE"\n", TCM_VHOST_VERSION, utsname()->sysname, 2331 " on "UTS_RELEASE"\n", VHOST_SCSI_VERSION, utsname()->sysname,
2319 utsname()->machine); 2332 utsname()->machine);
2320 /* 2333 /*
2321 * Register the top level struct config_item_type with TCM core 2334 * Register the top level struct config_item_type with TCM core
@@ -2326,14 +2339,14 @@ static int tcm_vhost_register_configfs(void)
2326 return PTR_ERR(fabric); 2339 return PTR_ERR(fabric);
2327 } 2340 }
2328 /* 2341 /*
2329 * Setup fabric->tf_ops from our local tcm_vhost_ops 2342 * Setup fabric->tf_ops from our local vhost_scsi_ops
2330 */ 2343 */
2331 fabric->tf_ops = tcm_vhost_ops; 2344 fabric->tf_ops = vhost_scsi_ops;
2332 /* 2345 /*
2333 * Setup default attribute lists for various fabric->tf_cit_tmpl 2346 * Setup default attribute lists for various fabric->tf_cit_tmpl
2334 */ 2347 */
2335 fabric->tf_cit_tmpl.tfc_wwn_cit.ct_attrs = tcm_vhost_wwn_attrs; 2348 fabric->tf_cit_tmpl.tfc_wwn_cit.ct_attrs = vhost_scsi_wwn_attrs;
2336 fabric->tf_cit_tmpl.tfc_tpg_base_cit.ct_attrs = tcm_vhost_tpg_attrs; 2349 fabric->tf_cit_tmpl.tfc_tpg_base_cit.ct_attrs = vhost_scsi_tpg_attrs;
2337 fabric->tf_cit_tmpl.tfc_tpg_attrib_cit.ct_attrs = NULL; 2350 fabric->tf_cit_tmpl.tfc_tpg_attrib_cit.ct_attrs = NULL;
2338 fabric->tf_cit_tmpl.tfc_tpg_param_cit.ct_attrs = NULL; 2351 fabric->tf_cit_tmpl.tfc_tpg_param_cit.ct_attrs = NULL;
2339 fabric->tf_cit_tmpl.tfc_tpg_np_base_cit.ct_attrs = NULL; 2352 fabric->tf_cit_tmpl.tfc_tpg_np_base_cit.ct_attrs = NULL;
@@ -2353,37 +2366,37 @@ static int tcm_vhost_register_configfs(void)
2353 /* 2366 /*
2354 * Setup our local pointer to *fabric 2367 * Setup our local pointer to *fabric
2355 */ 2368 */
2356 tcm_vhost_fabric_configfs = fabric; 2369 vhost_scsi_fabric_configfs = fabric;
2357 pr_debug("TCM_VHOST[0] - Set fabric -> tcm_vhost_fabric_configfs\n"); 2370 pr_debug("TCM_VHOST[0] - Set fabric -> vhost_scsi_fabric_configfs\n");
2358 return 0; 2371 return 0;
2359}; 2372};
2360 2373
2361static void tcm_vhost_deregister_configfs(void) 2374static void vhost_scsi_deregister_configfs(void)
2362{ 2375{
2363 if (!tcm_vhost_fabric_configfs) 2376 if (!vhost_scsi_fabric_configfs)
2364 return; 2377 return;
2365 2378
2366 target_fabric_configfs_deregister(tcm_vhost_fabric_configfs); 2379 target_fabric_configfs_deregister(vhost_scsi_fabric_configfs);
2367 tcm_vhost_fabric_configfs = NULL; 2380 vhost_scsi_fabric_configfs = NULL;
2368 pr_debug("TCM_VHOST[0] - Cleared tcm_vhost_fabric_configfs\n"); 2381 pr_debug("TCM_VHOST[0] - Cleared vhost_scsi_fabric_configfs\n");
2369}; 2382};
2370 2383
2371static int __init tcm_vhost_init(void) 2384static int __init vhost_scsi_init(void)
2372{ 2385{
2373 int ret = -ENOMEM; 2386 int ret = -ENOMEM;
2374 /* 2387 /*
2375 * Use our own dedicated workqueue for submitting I/O into 2388 * Use our own dedicated workqueue for submitting I/O into
2376 * target core to avoid contention within system_wq. 2389 * target core to avoid contention within system_wq.
2377 */ 2390 */
2378 tcm_vhost_workqueue = alloc_workqueue("tcm_vhost", 0, 0); 2391 vhost_scsi_workqueue = alloc_workqueue("vhost_scsi", 0, 0);
2379 if (!tcm_vhost_workqueue) 2392 if (!vhost_scsi_workqueue)
2380 goto out; 2393 goto out;
2381 2394
2382 ret = vhost_scsi_register(); 2395 ret = vhost_scsi_register();
2383 if (ret < 0) 2396 if (ret < 0)
2384 goto out_destroy_workqueue; 2397 goto out_destroy_workqueue;
2385 2398
2386 ret = tcm_vhost_register_configfs(); 2399 ret = vhost_scsi_register_configfs();
2387 if (ret < 0) 2400 if (ret < 0)
2388 goto out_vhost_scsi_deregister; 2401 goto out_vhost_scsi_deregister;
2389 2402
@@ -2392,20 +2405,20 @@ static int __init tcm_vhost_init(void)
2392out_vhost_scsi_deregister: 2405out_vhost_scsi_deregister:
2393 vhost_scsi_deregister(); 2406 vhost_scsi_deregister();
2394out_destroy_workqueue: 2407out_destroy_workqueue:
2395 destroy_workqueue(tcm_vhost_workqueue); 2408 destroy_workqueue(vhost_scsi_workqueue);
2396out: 2409out:
2397 return ret; 2410 return ret;
2398}; 2411};
2399 2412
2400static void tcm_vhost_exit(void) 2413static void vhost_scsi_exit(void)
2401{ 2414{
2402 tcm_vhost_deregister_configfs(); 2415 vhost_scsi_deregister_configfs();
2403 vhost_scsi_deregister(); 2416 vhost_scsi_deregister();
2404 destroy_workqueue(tcm_vhost_workqueue); 2417 destroy_workqueue(vhost_scsi_workqueue);
2405}; 2418};
2406 2419
2407MODULE_DESCRIPTION("VHOST_SCSI series fabric driver"); 2420MODULE_DESCRIPTION("VHOST_SCSI series fabric driver");
2408MODULE_ALIAS("tcm_vhost"); 2421MODULE_ALIAS("tcm_vhost");
2409MODULE_LICENSE("GPL"); 2422MODULE_LICENSE("GPL");
2410module_init(tcm_vhost_init); 2423module_init(vhost_scsi_init);
2411module_exit(tcm_vhost_exit); 2424module_exit(vhost_scsi_exit);
diff --git a/drivers/video/fbdev/amba-clcd.c b/drivers/video/fbdev/amba-clcd.c
index 32c0b6b28097..9362424c2340 100644
--- a/drivers/video/fbdev/amba-clcd.c
+++ b/drivers/video/fbdev/amba-clcd.c
@@ -599,6 +599,9 @@ static int clcdfb_of_get_mode(struct device *dev, struct device_node *endpoint,
599 599
600 len = clcdfb_snprintf_mode(NULL, 0, mode); 600 len = clcdfb_snprintf_mode(NULL, 0, mode);
601 name = devm_kzalloc(dev, len + 1, GFP_KERNEL); 601 name = devm_kzalloc(dev, len + 1, GFP_KERNEL);
602 if (!name)
603 return -ENOMEM;
604
602 clcdfb_snprintf_mode(name, len + 1, mode); 605 clcdfb_snprintf_mode(name, len + 1, mode);
603 mode->name = name; 606 mode->name = name;
604 607
diff --git a/drivers/video/fbdev/core/fbmon.c b/drivers/video/fbdev/core/fbmon.c
index 95338593ebf4..868facdec638 100644
--- a/drivers/video/fbdev/core/fbmon.c
+++ b/drivers/video/fbdev/core/fbmon.c
@@ -624,9 +624,6 @@ static struct fb_videomode *fb_create_modedb(unsigned char *edid, int *dbsize,
624 int num = 0, i, first = 1; 624 int num = 0, i, first = 1;
625 int ver, rev; 625 int ver, rev;
626 626
627 ver = edid[EDID_STRUCT_VERSION];
628 rev = edid[EDID_STRUCT_REVISION];
629
630 mode = kzalloc(50 * sizeof(struct fb_videomode), GFP_KERNEL); 627 mode = kzalloc(50 * sizeof(struct fb_videomode), GFP_KERNEL);
631 if (mode == NULL) 628 if (mode == NULL)
632 return NULL; 629 return NULL;
@@ -637,6 +634,9 @@ static struct fb_videomode *fb_create_modedb(unsigned char *edid, int *dbsize,
637 return NULL; 634 return NULL;
638 } 635 }
639 636
637 ver = edid[EDID_STRUCT_VERSION];
638 rev = edid[EDID_STRUCT_REVISION];
639
640 *dbsize = 0; 640 *dbsize = 0;
641 641
642 DPRINTK(" Detailed Timings\n"); 642 DPRINTK(" Detailed Timings\n");
diff --git a/drivers/video/fbdev/omap2/dss/display-sysfs.c b/drivers/video/fbdev/omap2/dss/display-sysfs.c
index 5a2095a98ed8..12186557a9d4 100644
--- a/drivers/video/fbdev/omap2/dss/display-sysfs.c
+++ b/drivers/video/fbdev/omap2/dss/display-sysfs.c
@@ -28,44 +28,22 @@
28#include <video/omapdss.h> 28#include <video/omapdss.h>
29#include "dss.h" 29#include "dss.h"
30 30
31static struct omap_dss_device *to_dss_device_sysfs(struct device *dev) 31static ssize_t display_name_show(struct omap_dss_device *dssdev, char *buf)
32{ 32{
33 struct omap_dss_device *dssdev = NULL;
34
35 for_each_dss_dev(dssdev) {
36 if (dssdev->dev == dev) {
37 omap_dss_put_device(dssdev);
38 return dssdev;
39 }
40 }
41
42 return NULL;
43}
44
45static ssize_t display_name_show(struct device *dev,
46 struct device_attribute *attr, char *buf)
47{
48 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
49
50 return snprintf(buf, PAGE_SIZE, "%s\n", 33 return snprintf(buf, PAGE_SIZE, "%s\n",
51 dssdev->name ? 34 dssdev->name ?
52 dssdev->name : ""); 35 dssdev->name : "");
53} 36}
54 37
55static ssize_t display_enabled_show(struct device *dev, 38static ssize_t display_enabled_show(struct omap_dss_device *dssdev, char *buf)
56 struct device_attribute *attr, char *buf)
57{ 39{
58 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
59
60 return snprintf(buf, PAGE_SIZE, "%d\n", 40 return snprintf(buf, PAGE_SIZE, "%d\n",
61 omapdss_device_is_enabled(dssdev)); 41 omapdss_device_is_enabled(dssdev));
62} 42}
63 43
64static ssize_t display_enabled_store(struct device *dev, 44static ssize_t display_enabled_store(struct omap_dss_device *dssdev,
65 struct device_attribute *attr,
66 const char *buf, size_t size) 45 const char *buf, size_t size)
67{ 46{
68 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
69 int r; 47 int r;
70 bool enable; 48 bool enable;
71 49
@@ -90,19 +68,16 @@ static ssize_t display_enabled_store(struct device *dev,
90 return size; 68 return size;
91} 69}
92 70
93static ssize_t display_tear_show(struct device *dev, 71static ssize_t display_tear_show(struct omap_dss_device *dssdev, char *buf)
94 struct device_attribute *attr, char *buf)
95{ 72{
96 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
97 return snprintf(buf, PAGE_SIZE, "%d\n", 73 return snprintf(buf, PAGE_SIZE, "%d\n",
98 dssdev->driver->get_te ? 74 dssdev->driver->get_te ?
99 dssdev->driver->get_te(dssdev) : 0); 75 dssdev->driver->get_te(dssdev) : 0);
100} 76}
101 77
102static ssize_t display_tear_store(struct device *dev, 78static ssize_t display_tear_store(struct omap_dss_device *dssdev,
103 struct device_attribute *attr, const char *buf, size_t size) 79 const char *buf, size_t size)
104{ 80{
105 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
106 int r; 81 int r;
107 bool te; 82 bool te;
108 83
@@ -120,10 +95,8 @@ static ssize_t display_tear_store(struct device *dev,
120 return size; 95 return size;
121} 96}
122 97
123static ssize_t display_timings_show(struct device *dev, 98static ssize_t display_timings_show(struct omap_dss_device *dssdev, char *buf)
124 struct device_attribute *attr, char *buf)
125{ 99{
126 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
127 struct omap_video_timings t; 100 struct omap_video_timings t;
128 101
129 if (!dssdev->driver->get_timings) 102 if (!dssdev->driver->get_timings)
@@ -137,10 +110,9 @@ static ssize_t display_timings_show(struct device *dev,
137 t.y_res, t.vfp, t.vbp, t.vsw); 110 t.y_res, t.vfp, t.vbp, t.vsw);
138} 111}
139 112
140static ssize_t display_timings_store(struct device *dev, 113static ssize_t display_timings_store(struct omap_dss_device *dssdev,
141 struct device_attribute *attr, const char *buf, size_t size) 114 const char *buf, size_t size)
142{ 115{
143 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
144 struct omap_video_timings t = dssdev->panel.timings; 116 struct omap_video_timings t = dssdev->panel.timings;
145 int r, found; 117 int r, found;
146 118
@@ -176,10 +148,8 @@ static ssize_t display_timings_store(struct device *dev,
176 return size; 148 return size;
177} 149}
178 150
179static ssize_t display_rotate_show(struct device *dev, 151static ssize_t display_rotate_show(struct omap_dss_device *dssdev, char *buf)
180 struct device_attribute *attr, char *buf)
181{ 152{
182 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
183 int rotate; 153 int rotate;
184 if (!dssdev->driver->get_rotate) 154 if (!dssdev->driver->get_rotate)
185 return -ENOENT; 155 return -ENOENT;
@@ -187,10 +157,9 @@ static ssize_t display_rotate_show(struct device *dev,
187 return snprintf(buf, PAGE_SIZE, "%u\n", rotate); 157 return snprintf(buf, PAGE_SIZE, "%u\n", rotate);
188} 158}
189 159
190static ssize_t display_rotate_store(struct device *dev, 160static ssize_t display_rotate_store(struct omap_dss_device *dssdev,
191 struct device_attribute *attr, const char *buf, size_t size) 161 const char *buf, size_t size)
192{ 162{
193 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
194 int rot, r; 163 int rot, r;
195 164
196 if (!dssdev->driver->set_rotate || !dssdev->driver->get_rotate) 165 if (!dssdev->driver->set_rotate || !dssdev->driver->get_rotate)
@@ -207,10 +176,8 @@ static ssize_t display_rotate_store(struct device *dev,
207 return size; 176 return size;
208} 177}
209 178
210static ssize_t display_mirror_show(struct device *dev, 179static ssize_t display_mirror_show(struct omap_dss_device *dssdev, char *buf)
211 struct device_attribute *attr, char *buf)
212{ 180{
213 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
214 int mirror; 181 int mirror;
215 if (!dssdev->driver->get_mirror) 182 if (!dssdev->driver->get_mirror)
216 return -ENOENT; 183 return -ENOENT;
@@ -218,10 +185,9 @@ static ssize_t display_mirror_show(struct device *dev,
218 return snprintf(buf, PAGE_SIZE, "%u\n", mirror); 185 return snprintf(buf, PAGE_SIZE, "%u\n", mirror);
219} 186}
220 187
221static ssize_t display_mirror_store(struct device *dev, 188static ssize_t display_mirror_store(struct omap_dss_device *dssdev,
222 struct device_attribute *attr, const char *buf, size_t size) 189 const char *buf, size_t size)
223{ 190{
224 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
225 int r; 191 int r;
226 bool mirror; 192 bool mirror;
227 193
@@ -239,10 +205,8 @@ static ssize_t display_mirror_store(struct device *dev,
239 return size; 205 return size;
240} 206}
241 207
242static ssize_t display_wss_show(struct device *dev, 208static ssize_t display_wss_show(struct omap_dss_device *dssdev, char *buf)
243 struct device_attribute *attr, char *buf)
244{ 209{
245 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
246 unsigned int wss; 210 unsigned int wss;
247 211
248 if (!dssdev->driver->get_wss) 212 if (!dssdev->driver->get_wss)
@@ -253,10 +217,9 @@ static ssize_t display_wss_show(struct device *dev,
253 return snprintf(buf, PAGE_SIZE, "0x%05x\n", wss); 217 return snprintf(buf, PAGE_SIZE, "0x%05x\n", wss);
254} 218}
255 219
256static ssize_t display_wss_store(struct device *dev, 220static ssize_t display_wss_store(struct omap_dss_device *dssdev,
257 struct device_attribute *attr, const char *buf, size_t size) 221 const char *buf, size_t size)
258{ 222{
259 struct omap_dss_device *dssdev = to_dss_device_sysfs(dev);
260 u32 wss; 223 u32 wss;
261 int r; 224 int r;
262 225
@@ -277,50 +240,94 @@ static ssize_t display_wss_store(struct device *dev,
277 return size; 240 return size;
278} 241}
279 242
280static DEVICE_ATTR(display_name, S_IRUGO, display_name_show, NULL); 243struct display_attribute {
281static DEVICE_ATTR(enabled, S_IRUGO|S_IWUSR, 244 struct attribute attr;
245 ssize_t (*show)(struct omap_dss_device *, char *);
246 ssize_t (*store)(struct omap_dss_device *, const char *, size_t);
247};
248
249#define DISPLAY_ATTR(_name, _mode, _show, _store) \
250 struct display_attribute display_attr_##_name = \
251 __ATTR(_name, _mode, _show, _store)
252
253static DISPLAY_ATTR(name, S_IRUGO, display_name_show, NULL);
254static DISPLAY_ATTR(display_name, S_IRUGO, display_name_show, NULL);
255static DISPLAY_ATTR(enabled, S_IRUGO|S_IWUSR,
282 display_enabled_show, display_enabled_store); 256 display_enabled_show, display_enabled_store);
283static DEVICE_ATTR(tear_elim, S_IRUGO|S_IWUSR, 257static DISPLAY_ATTR(tear_elim, S_IRUGO|S_IWUSR,
284 display_tear_show, display_tear_store); 258 display_tear_show, display_tear_store);
285static DEVICE_ATTR(timings, S_IRUGO|S_IWUSR, 259static DISPLAY_ATTR(timings, S_IRUGO|S_IWUSR,
286 display_timings_show, display_timings_store); 260 display_timings_show, display_timings_store);
287static DEVICE_ATTR(rotate, S_IRUGO|S_IWUSR, 261static DISPLAY_ATTR(rotate, S_IRUGO|S_IWUSR,
288 display_rotate_show, display_rotate_store); 262 display_rotate_show, display_rotate_store);
289static DEVICE_ATTR(mirror, S_IRUGO|S_IWUSR, 263static DISPLAY_ATTR(mirror, S_IRUGO|S_IWUSR,
290 display_mirror_show, display_mirror_store); 264 display_mirror_show, display_mirror_store);
291static DEVICE_ATTR(wss, S_IRUGO|S_IWUSR, 265static DISPLAY_ATTR(wss, S_IRUGO|S_IWUSR,
292 display_wss_show, display_wss_store); 266 display_wss_show, display_wss_store);
293 267
294static const struct attribute *display_sysfs_attrs[] = { 268static struct attribute *display_sysfs_attrs[] = {
295 &dev_attr_display_name.attr, 269 &display_attr_name.attr,
296 &dev_attr_enabled.attr, 270 &display_attr_display_name.attr,
297 &dev_attr_tear_elim.attr, 271 &display_attr_enabled.attr,
298 &dev_attr_timings.attr, 272 &display_attr_tear_elim.attr,
299 &dev_attr_rotate.attr, 273 &display_attr_timings.attr,
300 &dev_attr_mirror.attr, 274 &display_attr_rotate.attr,
301 &dev_attr_wss.attr, 275 &display_attr_mirror.attr,
276 &display_attr_wss.attr,
302 NULL 277 NULL
303}; 278};
304 279
280static ssize_t display_attr_show(struct kobject *kobj, struct attribute *attr,
281 char *buf)
282{
283 struct omap_dss_device *dssdev;
284 struct display_attribute *display_attr;
285
286 dssdev = container_of(kobj, struct omap_dss_device, kobj);
287 display_attr = container_of(attr, struct display_attribute, attr);
288
289 if (!display_attr->show)
290 return -ENOENT;
291
292 return display_attr->show(dssdev, buf);
293}
294
295static ssize_t display_attr_store(struct kobject *kobj, struct attribute *attr,
296 const char *buf, size_t size)
297{
298 struct omap_dss_device *dssdev;
299 struct display_attribute *display_attr;
300
301 dssdev = container_of(kobj, struct omap_dss_device, kobj);
302 display_attr = container_of(attr, struct display_attribute, attr);
303
304 if (!display_attr->store)
305 return -ENOENT;
306
307 return display_attr->store(dssdev, buf, size);
308}
309
310static const struct sysfs_ops display_sysfs_ops = {
311 .show = display_attr_show,
312 .store = display_attr_store,
313};
314
315static struct kobj_type display_ktype = {
316 .sysfs_ops = &display_sysfs_ops,
317 .default_attrs = display_sysfs_attrs,
318};
319
305int display_init_sysfs(struct platform_device *pdev) 320int display_init_sysfs(struct platform_device *pdev)
306{ 321{
307 struct omap_dss_device *dssdev = NULL; 322 struct omap_dss_device *dssdev = NULL;
308 int r; 323 int r;
309 324
310 for_each_dss_dev(dssdev) { 325 for_each_dss_dev(dssdev) {
311 struct kobject *kobj = &dssdev->dev->kobj; 326 r = kobject_init_and_add(&dssdev->kobj, &display_ktype,
312 327 &pdev->dev.kobj, dssdev->alias);
313 r = sysfs_create_files(kobj, display_sysfs_attrs);
314 if (r) { 328 if (r) {
315 DSSERR("failed to create sysfs files\n"); 329 DSSERR("failed to create sysfs files\n");
316 goto err; 330 omap_dss_put_device(dssdev);
317 }
318
319 r = sysfs_create_link(&pdev->dev.kobj, kobj, dssdev->alias);
320 if (r) {
321 sysfs_remove_files(kobj, display_sysfs_attrs);
322
323 DSSERR("failed to create sysfs display link\n");
324 goto err; 331 goto err;
325 } 332 }
326 } 333 }
@@ -338,8 +345,12 @@ void display_uninit_sysfs(struct platform_device *pdev)
338 struct omap_dss_device *dssdev = NULL; 345 struct omap_dss_device *dssdev = NULL;
339 346
340 for_each_dss_dev(dssdev) { 347 for_each_dss_dev(dssdev) {
341 sysfs_remove_link(&pdev->dev.kobj, dssdev->alias); 348 if (kobject_name(&dssdev->kobj) == NULL)
342 sysfs_remove_files(&dssdev->dev->kobj, 349 continue;
343 display_sysfs_attrs); 350
351 kobject_del(&dssdev->kobj);
352 kobject_put(&dssdev->kobj);
353
354 memset(&dssdev->kobj, 0, sizeof(dssdev->kobj));
344 } 355 }
345} 356}
diff --git a/drivers/virtio/virtio_balloon.c b/drivers/virtio/virtio_balloon.c
index 0413157f3b49..6a356e344f82 100644
--- a/drivers/virtio/virtio_balloon.c
+++ b/drivers/virtio/virtio_balloon.c
@@ -29,6 +29,7 @@
29#include <linux/module.h> 29#include <linux/module.h>
30#include <linux/balloon_compaction.h> 30#include <linux/balloon_compaction.h>
31#include <linux/oom.h> 31#include <linux/oom.h>
32#include <linux/wait.h>
32 33
33/* 34/*
34 * Balloon device works in 4K page units. So each page is pointed to by 35 * Balloon device works in 4K page units. So each page is pointed to by
@@ -334,17 +335,25 @@ static int virtballoon_oom_notify(struct notifier_block *self,
334static int balloon(void *_vballoon) 335static int balloon(void *_vballoon)
335{ 336{
336 struct virtio_balloon *vb = _vballoon; 337 struct virtio_balloon *vb = _vballoon;
338 DEFINE_WAIT_FUNC(wait, woken_wake_function);
337 339
338 set_freezable(); 340 set_freezable();
339 while (!kthread_should_stop()) { 341 while (!kthread_should_stop()) {
340 s64 diff; 342 s64 diff;
341 343
342 try_to_freeze(); 344 try_to_freeze();
343 wait_event_interruptible(vb->config_change, 345
344 (diff = towards_target(vb)) != 0 346 add_wait_queue(&vb->config_change, &wait);
345 || vb->need_stats_update 347 for (;;) {
346 || kthread_should_stop() 348 if ((diff = towards_target(vb)) != 0 ||
347 || freezing(current)); 349 vb->need_stats_update ||
350 kthread_should_stop() ||
351 freezing(current))
352 break;
353 wait_woken(&wait, TASK_INTERRUPTIBLE, MAX_SCHEDULE_TIMEOUT);
354 }
355 remove_wait_queue(&vb->config_change, &wait);
356
348 if (vb->need_stats_update) 357 if (vb->need_stats_update)
349 stats_handle_request(vb); 358 stats_handle_request(vb);
350 if (diff > 0) 359 if (diff > 0)
@@ -499,6 +508,8 @@ static int virtballoon_probe(struct virtio_device *vdev)
499 if (err < 0) 508 if (err < 0)
500 goto out_oom_notify; 509 goto out_oom_notify;
501 510
511 virtio_device_ready(vdev);
512
502 vb->thread = kthread_run(balloon, vb, "vballoon"); 513 vb->thread = kthread_run(balloon, vb, "vballoon");
503 if (IS_ERR(vb->thread)) { 514 if (IS_ERR(vb->thread)) {
504 err = PTR_ERR(vb->thread); 515 err = PTR_ERR(vb->thread);
diff --git a/drivers/virtio/virtio_mmio.c b/drivers/virtio/virtio_mmio.c
index cad569890908..6010d7ec0a0f 100644
--- a/drivers/virtio/virtio_mmio.c
+++ b/drivers/virtio/virtio_mmio.c
@@ -156,22 +156,95 @@ static void vm_get(struct virtio_device *vdev, unsigned offset,
156 void *buf, unsigned len) 156 void *buf, unsigned len)
157{ 157{
158 struct virtio_mmio_device *vm_dev = to_virtio_mmio_device(vdev); 158 struct virtio_mmio_device *vm_dev = to_virtio_mmio_device(vdev);
159 u8 *ptr = buf; 159 void __iomem *base = vm_dev->base + VIRTIO_MMIO_CONFIG;
160 int i; 160 u8 b;
161 __le16 w;
162 __le32 l;
161 163
162 for (i = 0; i < len; i++) 164 if (vm_dev->version == 1) {
163 ptr[i] = readb(vm_dev->base + VIRTIO_MMIO_CONFIG + offset + i); 165 u8 *ptr = buf;
166 int i;
167
168 for (i = 0; i < len; i++)
169 ptr[i] = readb(base + offset + i);
170 return;
171 }
172
173 switch (len) {
174 case 1:
175 b = readb(base + offset);
176 memcpy(buf, &b, sizeof b);
177 break;
178 case 2:
179 w = cpu_to_le16(readw(base + offset));
180 memcpy(buf, &w, sizeof w);
181 break;
182 case 4:
183 l = cpu_to_le32(readl(base + offset));
184 memcpy(buf, &l, sizeof l);
185 break;
186 case 8:
187 l = cpu_to_le32(readl(base + offset));
188 memcpy(buf, &l, sizeof l);
189 l = cpu_to_le32(ioread32(base + offset + sizeof l));
190 memcpy(buf + sizeof l, &l, sizeof l);
191 break;
192 default:
193 BUG();
194 }
164} 195}
165 196
166static void vm_set(struct virtio_device *vdev, unsigned offset, 197static void vm_set(struct virtio_device *vdev, unsigned offset,
167 const void *buf, unsigned len) 198 const void *buf, unsigned len)
168{ 199{
169 struct virtio_mmio_device *vm_dev = to_virtio_mmio_device(vdev); 200 struct virtio_mmio_device *vm_dev = to_virtio_mmio_device(vdev);
170 const u8 *ptr = buf; 201 void __iomem *base = vm_dev->base + VIRTIO_MMIO_CONFIG;
171 int i; 202 u8 b;
203 __le16 w;
204 __le32 l;
172 205
173 for (i = 0; i < len; i++) 206 if (vm_dev->version == 1) {
174 writeb(ptr[i], vm_dev->base + VIRTIO_MMIO_CONFIG + offset + i); 207 const u8 *ptr = buf;
208 int i;
209
210 for (i = 0; i < len; i++)
211 writeb(ptr[i], base + offset + i);
212
213 return;
214 }
215
216 switch (len) {
217 case 1:
218 memcpy(&b, buf, sizeof b);
219 writeb(b, base + offset);
220 break;
221 case 2:
222 memcpy(&w, buf, sizeof w);
223 writew(le16_to_cpu(w), base + offset);
224 break;
225 case 4:
226 memcpy(&l, buf, sizeof l);
227 writel(le32_to_cpu(l), base + offset);
228 break;
229 case 8:
230 memcpy(&l, buf, sizeof l);
231 writel(le32_to_cpu(l), base + offset);
232 memcpy(&l, buf + sizeof l, sizeof l);
233 writel(le32_to_cpu(l), base + offset + sizeof l);
234 break;
235 default:
236 BUG();
237 }
238}
239
240static u32 vm_generation(struct virtio_device *vdev)
241{
242 struct virtio_mmio_device *vm_dev = to_virtio_mmio_device(vdev);
243
244 if (vm_dev->version == 1)
245 return 0;
246 else
247 return readl(vm_dev->base + VIRTIO_MMIO_CONFIG_GENERATION);
175} 248}
176 249
177static u8 vm_get_status(struct virtio_device *vdev) 250static u8 vm_get_status(struct virtio_device *vdev)
@@ -440,6 +513,7 @@ static const char *vm_bus_name(struct virtio_device *vdev)
440static const struct virtio_config_ops virtio_mmio_config_ops = { 513static const struct virtio_config_ops virtio_mmio_config_ops = {
441 .get = vm_get, 514 .get = vm_get,
442 .set = vm_set, 515 .set = vm_set,
516 .generation = vm_generation,
443 .get_status = vm_get_status, 517 .get_status = vm_get_status,
444 .set_status = vm_set_status, 518 .set_status = vm_set_status,
445 .reset = vm_reset, 519 .reset = vm_reset,
diff --git a/drivers/watchdog/at91sam9_wdt.c b/drivers/watchdog/at91sam9_wdt.c
index 6df940528fd2..1443b3c391de 100644
--- a/drivers/watchdog/at91sam9_wdt.c
+++ b/drivers/watchdog/at91sam9_wdt.c
@@ -208,7 +208,8 @@ static int at91_wdt_init(struct platform_device *pdev, struct at91wdt *wdt)
208 208
209 if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) { 209 if ((tmp & AT91_WDT_WDFIEN) && wdt->irq) {
210 err = request_irq(wdt->irq, wdt_interrupt, 210 err = request_irq(wdt->irq, wdt_interrupt,
211 IRQF_SHARED | IRQF_IRQPOLL, 211 IRQF_SHARED | IRQF_IRQPOLL |
212 IRQF_NO_SUSPEND,
212 pdev->name, wdt); 213 pdev->name, wdt);
213 if (err) 214 if (err)
214 return err; 215 return err;
diff --git a/drivers/xen/Makefile b/drivers/xen/Makefile
index 2140398a2a8c..2ccd3592d41f 100644
--- a/drivers/xen/Makefile
+++ b/drivers/xen/Makefile
@@ -2,7 +2,7 @@ ifeq ($(filter y, $(CONFIG_ARM) $(CONFIG_ARM64)),)
2obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o 2obj-$(CONFIG_HOTPLUG_CPU) += cpu_hotplug.o
3endif 3endif
4obj-$(CONFIG_X86) += fallback.o 4obj-$(CONFIG_X86) += fallback.o
5obj-y += grant-table.o features.o balloon.o manage.o 5obj-y += grant-table.o features.o balloon.o manage.o preempt.o
6obj-y += events/ 6obj-y += events/
7obj-y += xenbus/ 7obj-y += xenbus/
8 8
diff --git a/drivers/xen/events/events_base.c b/drivers/xen/events/events_base.c
index b4bca2d4a7e5..70fba973a107 100644
--- a/drivers/xen/events/events_base.c
+++ b/drivers/xen/events/events_base.c
@@ -526,20 +526,26 @@ static unsigned int __startup_pirq(unsigned int irq)
526 pirq_query_unmask(irq); 526 pirq_query_unmask(irq);
527 527
528 rc = set_evtchn_to_irq(evtchn, irq); 528 rc = set_evtchn_to_irq(evtchn, irq);
529 if (rc != 0) { 529 if (rc)
530 pr_err("irq%d: Failed to set port to irq mapping (%d)\n", 530 goto err;
531 irq, rc); 531
532 xen_evtchn_close(evtchn);
533 return 0;
534 }
535 bind_evtchn_to_cpu(evtchn, 0); 532 bind_evtchn_to_cpu(evtchn, 0);
536 info->evtchn = evtchn; 533 info->evtchn = evtchn;
537 534
535 rc = xen_evtchn_port_setup(info);
536 if (rc)
537 goto err;
538
538out: 539out:
539 unmask_evtchn(evtchn); 540 unmask_evtchn(evtchn);
540 eoi_pirq(irq_get_irq_data(irq)); 541 eoi_pirq(irq_get_irq_data(irq));
541 542
542 return 0; 543 return 0;
544
545err:
546 pr_err("irq%d: Failed to set port to irq mapping (%d)\n", irq, rc);
547 xen_evtchn_close(evtchn);
548 return 0;
543} 549}
544 550
545static unsigned int startup_pirq(struct irq_data *data) 551static unsigned int startup_pirq(struct irq_data *data)
diff --git a/drivers/xen/preempt.c b/drivers/xen/preempt.c
new file mode 100644
index 000000000000..a1800c150839
--- /dev/null
+++ b/drivers/xen/preempt.c
@@ -0,0 +1,44 @@
1/*
2 * Preemptible hypercalls
3 *
4 * Copyright (C) 2014 Citrix Systems R&D ltd.
5 *
6 * This source code is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of the
9 * License, or (at your option) any later version.
10 */
11
12#include <linux/sched.h>
13#include <xen/xen-ops.h>
14
15#ifndef CONFIG_PREEMPT
16
17/*
18 * Some hypercalls issued by the toolstack can take many 10s of
19 * seconds. Allow tasks running hypercalls via the privcmd driver to
20 * be voluntarily preempted even if full kernel preemption is
21 * disabled.
22 *
23 * Such preemptible hypercalls are bracketed by
24 * xen_preemptible_hcall_begin() and xen_preemptible_hcall_end()
25 * calls.
26 */
27
28DEFINE_PER_CPU(bool, xen_in_preemptible_hcall);
29EXPORT_SYMBOL_GPL(xen_in_preemptible_hcall);
30
31asmlinkage __visible void xen_maybe_preempt_hcall(void)
32{
33 if (unlikely(__this_cpu_read(xen_in_preemptible_hcall)
34 && should_resched())) {
35 /*
36 * Clear flag as we may be rescheduled on a different
37 * cpu.
38 */
39 __this_cpu_write(xen_in_preemptible_hcall, false);
40 _cond_resched();
41 __this_cpu_write(xen_in_preemptible_hcall, true);
42 }
43}
44#endif /* CONFIG_PREEMPT */
diff --git a/drivers/xen/privcmd.c b/drivers/xen/privcmd.c
index 569a13b9e856..59ac71c4a043 100644
--- a/drivers/xen/privcmd.c
+++ b/drivers/xen/privcmd.c
@@ -56,10 +56,12 @@ static long privcmd_ioctl_hypercall(void __user *udata)
56 if (copy_from_user(&hypercall, udata, sizeof(hypercall))) 56 if (copy_from_user(&hypercall, udata, sizeof(hypercall)))
57 return -EFAULT; 57 return -EFAULT;
58 58
59 xen_preemptible_hcall_begin();
59 ret = privcmd_call(hypercall.op, 60 ret = privcmd_call(hypercall.op,
60 hypercall.arg[0], hypercall.arg[1], 61 hypercall.arg[0], hypercall.arg[1],
61 hypercall.arg[2], hypercall.arg[3], 62 hypercall.arg[2], hypercall.arg[3],
62 hypercall.arg[4]); 63 hypercall.arg[4]);
64 xen_preemptible_hcall_end();
63 65
64 return ret; 66 return ret;
65} 67}
diff --git a/drivers/xen/xen-pciback/conf_space.c b/drivers/xen/xen-pciback/conf_space.c
index 46ae0f9f02ad..75fe3d466515 100644
--- a/drivers/xen/xen-pciback/conf_space.c
+++ b/drivers/xen/xen-pciback/conf_space.c
@@ -16,7 +16,7 @@
16#include "conf_space.h" 16#include "conf_space.h"
17#include "conf_space_quirks.h" 17#include "conf_space_quirks.h"
18 18
19static bool permissive; 19bool permissive;
20module_param(permissive, bool, 0644); 20module_param(permissive, bool, 0644);
21 21
22/* This is where xen_pcibk_read_config_byte, xen_pcibk_read_config_word, 22/* This is where xen_pcibk_read_config_byte, xen_pcibk_read_config_word,
diff --git a/drivers/xen/xen-pciback/conf_space.h b/drivers/xen/xen-pciback/conf_space.h
index e56c934ad137..2e1d73d1d5d0 100644
--- a/drivers/xen/xen-pciback/conf_space.h
+++ b/drivers/xen/xen-pciback/conf_space.h
@@ -64,6 +64,8 @@ struct config_field_entry {
64 void *data; 64 void *data;
65}; 65};
66 66
67extern bool permissive;
68
67#define OFFSET(cfg_entry) ((cfg_entry)->base_offset+(cfg_entry)->field->offset) 69#define OFFSET(cfg_entry) ((cfg_entry)->base_offset+(cfg_entry)->field->offset)
68 70
69/* Add fields to a device - the add_fields macro expects to get a pointer to 71/* Add fields to a device - the add_fields macro expects to get a pointer to
diff --git a/drivers/xen/xen-pciback/conf_space_header.c b/drivers/xen/xen-pciback/conf_space_header.c
index c5ee82587e8c..2d7369391472 100644
--- a/drivers/xen/xen-pciback/conf_space_header.c
+++ b/drivers/xen/xen-pciback/conf_space_header.c
@@ -11,6 +11,10 @@
11#include "pciback.h" 11#include "pciback.h"
12#include "conf_space.h" 12#include "conf_space.h"
13 13
14struct pci_cmd_info {
15 u16 val;
16};
17
14struct pci_bar_info { 18struct pci_bar_info {
15 u32 val; 19 u32 val;
16 u32 len_val; 20 u32 len_val;
@@ -20,22 +24,36 @@ struct pci_bar_info {
20#define is_enable_cmd(value) ((value)&(PCI_COMMAND_MEMORY|PCI_COMMAND_IO)) 24#define is_enable_cmd(value) ((value)&(PCI_COMMAND_MEMORY|PCI_COMMAND_IO))
21#define is_master_cmd(value) ((value)&PCI_COMMAND_MASTER) 25#define is_master_cmd(value) ((value)&PCI_COMMAND_MASTER)
22 26
23static int command_read(struct pci_dev *dev, int offset, u16 *value, void *data) 27/* Bits guests are allowed to control in permissive mode. */
28#define PCI_COMMAND_GUEST (PCI_COMMAND_MASTER|PCI_COMMAND_SPECIAL| \
29 PCI_COMMAND_INVALIDATE|PCI_COMMAND_VGA_PALETTE| \
30 PCI_COMMAND_WAIT|PCI_COMMAND_FAST_BACK)
31
32static void *command_init(struct pci_dev *dev, int offset)
24{ 33{
25 int i; 34 struct pci_cmd_info *cmd = kmalloc(sizeof(*cmd), GFP_KERNEL);
26 int ret; 35 int err;
27 36
28 ret = xen_pcibk_read_config_word(dev, offset, value, data); 37 if (!cmd)
29 if (!pci_is_enabled(dev)) 38 return ERR_PTR(-ENOMEM);
30 return ret; 39
31 40 err = pci_read_config_word(dev, PCI_COMMAND, &cmd->val);
32 for (i = 0; i < PCI_ROM_RESOURCE; i++) { 41 if (err) {
33 if (dev->resource[i].flags & IORESOURCE_IO) 42 kfree(cmd);
34 *value |= PCI_COMMAND_IO; 43 return ERR_PTR(err);
35 if (dev->resource[i].flags & IORESOURCE_MEM)
36 *value |= PCI_COMMAND_MEMORY;
37 } 44 }
38 45
46 return cmd;
47}
48
49static int command_read(struct pci_dev *dev, int offset, u16 *value, void *data)
50{
51 int ret = pci_read_config_word(dev, offset, value);
52 const struct pci_cmd_info *cmd = data;
53
54 *value &= PCI_COMMAND_GUEST;
55 *value |= cmd->val & ~PCI_COMMAND_GUEST;
56
39 return ret; 57 return ret;
40} 58}
41 59
@@ -43,6 +61,8 @@ static int command_write(struct pci_dev *dev, int offset, u16 value, void *data)
43{ 61{
44 struct xen_pcibk_dev_data *dev_data; 62 struct xen_pcibk_dev_data *dev_data;
45 int err; 63 int err;
64 u16 val;
65 struct pci_cmd_info *cmd = data;
46 66
47 dev_data = pci_get_drvdata(dev); 67 dev_data = pci_get_drvdata(dev);
48 if (!pci_is_enabled(dev) && is_enable_cmd(value)) { 68 if (!pci_is_enabled(dev) && is_enable_cmd(value)) {
@@ -83,6 +103,19 @@ static int command_write(struct pci_dev *dev, int offset, u16 value, void *data)
83 } 103 }
84 } 104 }
85 105
106 cmd->val = value;
107
108 if (!permissive && (!dev_data || !dev_data->permissive))
109 return 0;
110
111 /* Only allow the guest to control certain bits. */
112 err = pci_read_config_word(dev, offset, &val);
113 if (err || val == value)
114 return err;
115
116 value &= PCI_COMMAND_GUEST;
117 value |= val & ~PCI_COMMAND_GUEST;
118
86 return pci_write_config_word(dev, offset, value); 119 return pci_write_config_word(dev, offset, value);
87} 120}
88 121
@@ -282,6 +315,8 @@ static const struct config_field header_common[] = {
282 { 315 {
283 .offset = PCI_COMMAND, 316 .offset = PCI_COMMAND,
284 .size = 2, 317 .size = 2,
318 .init = command_init,
319 .release = bar_release,
285 .u.w.read = command_read, 320 .u.w.read = command_read,
286 .u.w.write = command_write, 321 .u.w.write = command_write,
287 }, 322 },
diff --git a/drivers/xen/xen-scsiback.c b/drivers/xen/xen-scsiback.c
index 61653a03a8f5..42bd55a6c237 100644
--- a/drivers/xen/xen-scsiback.c
+++ b/drivers/xen/xen-scsiback.c
@@ -709,12 +709,11 @@ static int prepare_pending_reqs(struct vscsibk_info *info,
709static int scsiback_do_cmd_fn(struct vscsibk_info *info) 709static int scsiback_do_cmd_fn(struct vscsibk_info *info)
710{ 710{
711 struct vscsiif_back_ring *ring = &info->ring; 711 struct vscsiif_back_ring *ring = &info->ring;
712 struct vscsiif_request *ring_req; 712 struct vscsiif_request ring_req;
713 struct vscsibk_pend *pending_req; 713 struct vscsibk_pend *pending_req;
714 RING_IDX rc, rp; 714 RING_IDX rc, rp;
715 int err, more_to_do; 715 int err, more_to_do;
716 uint32_t result; 716 uint32_t result;
717 uint8_t act;
718 717
719 rc = ring->req_cons; 718 rc = ring->req_cons;
720 rp = ring->sring->req_prod; 719 rp = ring->sring->req_prod;
@@ -735,11 +734,10 @@ static int scsiback_do_cmd_fn(struct vscsibk_info *info)
735 if (!pending_req) 734 if (!pending_req)
736 return 1; 735 return 1;
737 736
738 ring_req = RING_GET_REQUEST(ring, rc); 737 ring_req = *RING_GET_REQUEST(ring, rc);
739 ring->req_cons = ++rc; 738 ring->req_cons = ++rc;
740 739
741 act = ring_req->act; 740 err = prepare_pending_reqs(info, &ring_req, pending_req);
742 err = prepare_pending_reqs(info, ring_req, pending_req);
743 if (err) { 741 if (err) {
744 switch (err) { 742 switch (err) {
745 case -ENODEV: 743 case -ENODEV:
@@ -755,9 +753,9 @@ static int scsiback_do_cmd_fn(struct vscsibk_info *info)
755 return 1; 753 return 1;
756 } 754 }
757 755
758 switch (act) { 756 switch (ring_req.act) {
759 case VSCSIIF_ACT_SCSI_CDB: 757 case VSCSIIF_ACT_SCSI_CDB:
760 if (scsiback_gnttab_data_map(ring_req, pending_req)) { 758 if (scsiback_gnttab_data_map(&ring_req, pending_req)) {
761 scsiback_fast_flush_area(pending_req); 759 scsiback_fast_flush_area(pending_req);
762 scsiback_do_resp_with_sense(NULL, 760 scsiback_do_resp_with_sense(NULL,
763 DRIVER_ERROR << 24, 0, pending_req); 761 DRIVER_ERROR << 24, 0, pending_req);
@@ -768,7 +766,7 @@ static int scsiback_do_cmd_fn(struct vscsibk_info *info)
768 break; 766 break;
769 case VSCSIIF_ACT_SCSI_ABORT: 767 case VSCSIIF_ACT_SCSI_ABORT:
770 scsiback_device_action(pending_req, TMR_ABORT_TASK, 768 scsiback_device_action(pending_req, TMR_ABORT_TASK,
771 ring_req->ref_rqid); 769 ring_req.ref_rqid);
772 break; 770 break;
773 case VSCSIIF_ACT_SCSI_RESET: 771 case VSCSIIF_ACT_SCSI_RESET:
774 scsiback_device_action(pending_req, TMR_LUN_RESET, 0); 772 scsiback_device_action(pending_req, TMR_LUN_RESET, 0);
@@ -1661,11 +1659,8 @@ static int scsiback_make_nexus(struct scsiback_tpg *tpg,
1661 name); 1659 name);
1662 goto out; 1660 goto out;
1663 } 1661 }
1664 /* 1662 /* Now register the TCM pvscsi virtual I_T Nexus as active. */
1665 * Now register the TCM pvscsi virtual I_T Nexus as active with the 1663 transport_register_session(se_tpg, tv_nexus->tvn_se_sess->se_node_acl,
1666 * call to __transport_register_session()
1667 */
1668 __transport_register_session(se_tpg, tv_nexus->tvn_se_sess->se_node_acl,
1669 tv_nexus->tvn_se_sess, tv_nexus); 1664 tv_nexus->tvn_se_sess, tv_nexus);
1670 tpg->tpg_nexus = tv_nexus; 1665 tpg->tpg_nexus = tv_nexus;
1671 1666
diff --git a/fs/9p/vfs_inode.c b/fs/9p/vfs_inode.c
index 9ee5343d4884..3662f1d1d9cf 100644
--- a/fs/9p/vfs_inode.c
+++ b/fs/9p/vfs_inode.c
@@ -1127,7 +1127,7 @@ static int v9fs_vfs_setattr(struct dentry *dentry, struct iattr *iattr)
1127 } 1127 }
1128 1128
1129 /* Write all dirty data */ 1129 /* Write all dirty data */
1130 if (S_ISREG(dentry->d_inode->i_mode)) 1130 if (d_is_reg(dentry))
1131 filemap_write_and_wait(dentry->d_inode->i_mapping); 1131 filemap_write_and_wait(dentry->d_inode->i_mapping);
1132 1132
1133 retval = p9_client_wstat(fid, &wstat); 1133 retval = p9_client_wstat(fid, &wstat);
diff --git a/fs/aio.c b/fs/aio.c
index 118a2e0088d8..f8e52a1854c1 100644
--- a/fs/aio.c
+++ b/fs/aio.c
@@ -1285,7 +1285,7 @@ SYSCALL_DEFINE2(io_setup, unsigned, nr_events, aio_context_t __user *, ctxp)
1285 1285
1286 ret = -EINVAL; 1286 ret = -EINVAL;
1287 if (unlikely(ctx || nr_events == 0)) { 1287 if (unlikely(ctx || nr_events == 0)) {
1288 pr_debug("EINVAL: io_setup: ctx %lu nr_events %u\n", 1288 pr_debug("EINVAL: ctx %lu nr_events %u\n",
1289 ctx, nr_events); 1289 ctx, nr_events);
1290 goto out; 1290 goto out;
1291 } 1291 }
@@ -1333,7 +1333,7 @@ SYSCALL_DEFINE1(io_destroy, aio_context_t, ctx)
1333 1333
1334 return ret; 1334 return ret;
1335 } 1335 }
1336 pr_debug("EINVAL: io_destroy: invalid context id\n"); 1336 pr_debug("EINVAL: invalid context id\n");
1337 return -EINVAL; 1337 return -EINVAL;
1338} 1338}
1339 1339
@@ -1515,7 +1515,7 @@ static int io_submit_one(struct kioctx *ctx, struct iocb __user *user_iocb,
1515 (iocb->aio_nbytes != (size_t)iocb->aio_nbytes) || 1515 (iocb->aio_nbytes != (size_t)iocb->aio_nbytes) ||
1516 ((ssize_t)iocb->aio_nbytes < 0) 1516 ((ssize_t)iocb->aio_nbytes < 0)
1517 )) { 1517 )) {
1518 pr_debug("EINVAL: io_submit: overflow check\n"); 1518 pr_debug("EINVAL: overflow check\n");
1519 return -EINVAL; 1519 return -EINVAL;
1520 } 1520 }
1521 1521
diff --git a/fs/autofs4/dev-ioctl.c b/fs/autofs4/dev-ioctl.c
index aaf96cb25452..ac7d921ed984 100644
--- a/fs/autofs4/dev-ioctl.c
+++ b/fs/autofs4/dev-ioctl.c
@@ -95,7 +95,7 @@ static int check_dev_ioctl_version(int cmd, struct autofs_dev_ioctl *param)
95 */ 95 */
96static struct autofs_dev_ioctl *copy_dev_ioctl(struct autofs_dev_ioctl __user *in) 96static struct autofs_dev_ioctl *copy_dev_ioctl(struct autofs_dev_ioctl __user *in)
97{ 97{
98 struct autofs_dev_ioctl tmp; 98 struct autofs_dev_ioctl tmp, *res;
99 99
100 if (copy_from_user(&tmp, in, sizeof(tmp))) 100 if (copy_from_user(&tmp, in, sizeof(tmp)))
101 return ERR_PTR(-EFAULT); 101 return ERR_PTR(-EFAULT);
@@ -106,7 +106,11 @@ static struct autofs_dev_ioctl *copy_dev_ioctl(struct autofs_dev_ioctl __user *i
106 if (tmp.size > (PATH_MAX + sizeof(tmp))) 106 if (tmp.size > (PATH_MAX + sizeof(tmp)))
107 return ERR_PTR(-ENAMETOOLONG); 107 return ERR_PTR(-ENAMETOOLONG);
108 108
109 return memdup_user(in, tmp.size); 109 res = memdup_user(in, tmp.size);
110 if (!IS_ERR(res))
111 res->size = tmp.size;
112
113 return res;
110} 114}
111 115
112static inline void free_dev_ioctl(struct autofs_dev_ioctl *param) 116static inline void free_dev_ioctl(struct autofs_dev_ioctl *param)
diff --git a/fs/autofs4/expire.c b/fs/autofs4/expire.c
index bfdbaba9c2ba..11dd118f75e2 100644
--- a/fs/autofs4/expire.c
+++ b/fs/autofs4/expire.c
@@ -374,7 +374,7 @@ static struct dentry *should_expire(struct dentry *dentry,
374 return NULL; 374 return NULL;
375 } 375 }
376 376
377 if (dentry->d_inode && S_ISLNK(dentry->d_inode->i_mode)) { 377 if (dentry->d_inode && d_is_symlink(dentry)) {
378 DPRINTK("checking symlink %p %pd", dentry, dentry); 378 DPRINTK("checking symlink %p %pd", dentry, dentry);
379 /* 379 /*
380 * A symlink can't be "busy" in the usual sense so 380 * A symlink can't be "busy" in the usual sense so
diff --git a/fs/autofs4/root.c b/fs/autofs4/root.c
index dbb5b7212ce1..7e44fdd03e2d 100644
--- a/fs/autofs4/root.c
+++ b/fs/autofs4/root.c
@@ -108,7 +108,7 @@ static int autofs4_dir_open(struct inode *inode, struct file *file)
108 struct dentry *dentry = file->f_path.dentry; 108 struct dentry *dentry = file->f_path.dentry;
109 struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb); 109 struct autofs_sb_info *sbi = autofs4_sbi(dentry->d_sb);
110 110
111 DPRINTK("file=%p dentry=%p %pD", file, dentry, dentry); 111 DPRINTK("file=%p dentry=%p %pd", file, dentry, dentry);
112 112
113 if (autofs4_oz_mode(sbi)) 113 if (autofs4_oz_mode(sbi))
114 goto out; 114 goto out;
@@ -371,7 +371,7 @@ static struct vfsmount *autofs4_d_automount(struct path *path)
371 * having d_mountpoint() true, so there's no need to call back 371 * having d_mountpoint() true, so there's no need to call back
372 * to the daemon. 372 * to the daemon.
373 */ 373 */
374 if (dentry->d_inode && S_ISLNK(dentry->d_inode->i_mode)) { 374 if (dentry->d_inode && d_is_symlink(dentry)) {
375 spin_unlock(&sbi->fs_lock); 375 spin_unlock(&sbi->fs_lock);
376 goto done; 376 goto done;
377 } 377 }
@@ -485,7 +485,7 @@ static int autofs4_d_manage(struct dentry *dentry, bool rcu_walk)
485 * an incorrect ELOOP error return. 485 * an incorrect ELOOP error return.
486 */ 486 */
487 if ((!d_mountpoint(dentry) && !simple_empty(dentry)) || 487 if ((!d_mountpoint(dentry) && !simple_empty(dentry)) ||
488 (dentry->d_inode && S_ISLNK(dentry->d_inode->i_mode))) 488 (dentry->d_inode && d_is_symlink(dentry)))
489 status = -EISDIR; 489 status = -EISDIR;
490 } 490 }
491 spin_unlock(&sbi->fs_lock); 491 spin_unlock(&sbi->fs_lock);
diff --git a/fs/bad_inode.c b/fs/bad_inode.c
index afd2b4408adf..861b1e1c4777 100644
--- a/fs/bad_inode.c
+++ b/fs/bad_inode.c
@@ -15,161 +15,14 @@
15#include <linux/namei.h> 15#include <linux/namei.h>
16#include <linux/poll.h> 16#include <linux/poll.h>
17 17
18
19static loff_t bad_file_llseek(struct file *file, loff_t offset, int whence)
20{
21 return -EIO;
22}
23
24static ssize_t bad_file_read(struct file *filp, char __user *buf,
25 size_t size, loff_t *ppos)
26{
27 return -EIO;
28}
29
30static ssize_t bad_file_write(struct file *filp, const char __user *buf,
31 size_t siz, loff_t *ppos)
32{
33 return -EIO;
34}
35
36static ssize_t bad_file_aio_read(struct kiocb *iocb, const struct iovec *iov,
37 unsigned long nr_segs, loff_t pos)
38{
39 return -EIO;
40}
41
42static ssize_t bad_file_aio_write(struct kiocb *iocb, const struct iovec *iov,
43 unsigned long nr_segs, loff_t pos)
44{
45 return -EIO;
46}
47
48static int bad_file_readdir(struct file *file, struct dir_context *ctx)
49{
50 return -EIO;
51}
52
53static unsigned int bad_file_poll(struct file *filp, poll_table *wait)
54{
55 return POLLERR;
56}
57
58static long bad_file_unlocked_ioctl(struct file *file, unsigned cmd,
59 unsigned long arg)
60{
61 return -EIO;
62}
63
64static long bad_file_compat_ioctl(struct file *file, unsigned int cmd,
65 unsigned long arg)
66{
67 return -EIO;
68}
69
70static int bad_file_mmap(struct file *file, struct vm_area_struct *vma)
71{
72 return -EIO;
73}
74
75static int bad_file_open(struct inode *inode, struct file *filp) 18static int bad_file_open(struct inode *inode, struct file *filp)
76{ 19{
77 return -EIO; 20 return -EIO;
78} 21}
79 22
80static int bad_file_flush(struct file *file, fl_owner_t id)
81{
82 return -EIO;
83}
84
85static int bad_file_release(struct inode *inode, struct file *filp)
86{
87 return -EIO;
88}
89
90static int bad_file_fsync(struct file *file, loff_t start, loff_t end,
91 int datasync)
92{
93 return -EIO;
94}
95
96static int bad_file_aio_fsync(struct kiocb *iocb, int datasync)
97{
98 return -EIO;
99}
100
101static int bad_file_fasync(int fd, struct file *filp, int on)
102{
103 return -EIO;
104}
105
106static int bad_file_lock(struct file *file, int cmd, struct file_lock *fl)
107{
108 return -EIO;
109}
110
111static ssize_t bad_file_sendpage(struct file *file, struct page *page,
112 int off, size_t len, loff_t *pos, int more)
113{
114 return -EIO;
115}
116
117static unsigned long bad_file_get_unmapped_area(struct file *file,
118 unsigned long addr, unsigned long len,
119 unsigned long pgoff, unsigned long flags)
120{
121 return -EIO;
122}
123
124static int bad_file_check_flags(int flags)
125{
126 return -EIO;
127}
128
129static int bad_file_flock(struct file *filp, int cmd, struct file_lock *fl)
130{
131 return -EIO;
132}
133
134static ssize_t bad_file_splice_write(struct pipe_inode_info *pipe,
135 struct file *out, loff_t *ppos, size_t len,
136 unsigned int flags)
137{
138 return -EIO;
139}
140
141static ssize_t bad_file_splice_read(struct file *in, loff_t *ppos,
142 struct pipe_inode_info *pipe, size_t len,
143 unsigned int flags)
144{
145 return -EIO;
146}
147
148static const struct file_operations bad_file_ops = 23static const struct file_operations bad_file_ops =
149{ 24{
150 .llseek = bad_file_llseek,
151 .read = bad_file_read,
152 .write = bad_file_write,
153 .aio_read = bad_file_aio_read,
154 .aio_write = bad_file_aio_write,
155 .iterate = bad_file_readdir,
156 .poll = bad_file_poll,
157 .unlocked_ioctl = bad_file_unlocked_ioctl,
158 .compat_ioctl = bad_file_compat_ioctl,
159 .mmap = bad_file_mmap,
160 .open = bad_file_open, 25 .open = bad_file_open,
161 .flush = bad_file_flush,
162 .release = bad_file_release,
163 .fsync = bad_file_fsync,
164 .aio_fsync = bad_file_aio_fsync,
165 .fasync = bad_file_fasync,
166 .lock = bad_file_lock,
167 .sendpage = bad_file_sendpage,
168 .get_unmapped_area = bad_file_get_unmapped_area,
169 .check_flags = bad_file_check_flags,
170 .flock = bad_file_flock,
171 .splice_write = bad_file_splice_write,
172 .splice_read = bad_file_splice_read,
173}; 26};
174 27
175static int bad_inode_create (struct inode *dir, struct dentry *dentry, 28static int bad_inode_create (struct inode *dir, struct dentry *dentry,
diff --git a/fs/binfmt_elf.c b/fs/binfmt_elf.c
index 02b16910f4c9..995986b8e36b 100644
--- a/fs/binfmt_elf.c
+++ b/fs/binfmt_elf.c
@@ -645,11 +645,12 @@ out:
645 645
646static unsigned long randomize_stack_top(unsigned long stack_top) 646static unsigned long randomize_stack_top(unsigned long stack_top)
647{ 647{
648 unsigned int random_variable = 0; 648 unsigned long random_variable = 0;
649 649
650 if ((current->flags & PF_RANDOMIZE) && 650 if ((current->flags & PF_RANDOMIZE) &&
651 !(current->personality & ADDR_NO_RANDOMIZE)) { 651 !(current->personality & ADDR_NO_RANDOMIZE)) {
652 random_variable = get_random_int() & STACK_RND_MASK; 652 random_variable = (unsigned long) get_random_int();
653 random_variable &= STACK_RND_MASK;
653 random_variable <<= PAGE_SHIFT; 654 random_variable <<= PAGE_SHIFT;
654 } 655 }
655#ifdef CONFIG_STACK_GROWSUP 656#ifdef CONFIG_STACK_GROWSUP
diff --git a/fs/btrfs/ctree.c b/fs/btrfs/ctree.c
index 993642199326..6d67f32e648d 100644
--- a/fs/btrfs/ctree.c
+++ b/fs/btrfs/ctree.c
@@ -1645,14 +1645,14 @@ int btrfs_realloc_node(struct btrfs_trans_handle *trans,
1645 1645
1646 parent_nritems = btrfs_header_nritems(parent); 1646 parent_nritems = btrfs_header_nritems(parent);
1647 blocksize = root->nodesize; 1647 blocksize = root->nodesize;
1648 end_slot = parent_nritems; 1648 end_slot = parent_nritems - 1;
1649 1649
1650 if (parent_nritems == 1) 1650 if (parent_nritems <= 1)
1651 return 0; 1651 return 0;
1652 1652
1653 btrfs_set_lock_blocking(parent); 1653 btrfs_set_lock_blocking(parent);
1654 1654
1655 for (i = start_slot; i < end_slot; i++) { 1655 for (i = start_slot; i <= end_slot; i++) {
1656 int close = 1; 1656 int close = 1;
1657 1657
1658 btrfs_node_key(parent, &disk_key, i); 1658 btrfs_node_key(parent, &disk_key, i);
@@ -1669,7 +1669,7 @@ int btrfs_realloc_node(struct btrfs_trans_handle *trans,
1669 other = btrfs_node_blockptr(parent, i - 1); 1669 other = btrfs_node_blockptr(parent, i - 1);
1670 close = close_blocks(blocknr, other, blocksize); 1670 close = close_blocks(blocknr, other, blocksize);
1671 } 1671 }
1672 if (!close && i < end_slot - 2) { 1672 if (!close && i < end_slot) {
1673 other = btrfs_node_blockptr(parent, i + 1); 1673 other = btrfs_node_blockptr(parent, i + 1);
1674 close = close_blocks(blocknr, other, blocksize); 1674 close = close_blocks(blocknr, other, blocksize);
1675 } 1675 }
diff --git a/fs/btrfs/ctree.h b/fs/btrfs/ctree.h
index 84c3b00f3de8..f9c89cae39ee 100644
--- a/fs/btrfs/ctree.h
+++ b/fs/btrfs/ctree.h
@@ -3387,6 +3387,8 @@ int btrfs_inc_extent_ref(struct btrfs_trans_handle *trans,
3387 3387
3388int btrfs_write_dirty_block_groups(struct btrfs_trans_handle *trans, 3388int btrfs_write_dirty_block_groups(struct btrfs_trans_handle *trans,
3389 struct btrfs_root *root); 3389 struct btrfs_root *root);
3390int btrfs_setup_space_cache(struct btrfs_trans_handle *trans,
3391 struct btrfs_root *root);
3390int btrfs_extent_readonly(struct btrfs_root *root, u64 bytenr); 3392int btrfs_extent_readonly(struct btrfs_root *root, u64 bytenr);
3391int btrfs_free_block_groups(struct btrfs_fs_info *info); 3393int btrfs_free_block_groups(struct btrfs_fs_info *info);
3392int btrfs_read_block_groups(struct btrfs_root *root); 3394int btrfs_read_block_groups(struct btrfs_root *root);
@@ -3909,6 +3911,9 @@ int btrfs_prealloc_file_range_trans(struct inode *inode,
3909 loff_t actual_len, u64 *alloc_hint); 3911 loff_t actual_len, u64 *alloc_hint);
3910int btrfs_inode_check_errors(struct inode *inode); 3912int btrfs_inode_check_errors(struct inode *inode);
3911extern const struct dentry_operations btrfs_dentry_operations; 3913extern const struct dentry_operations btrfs_dentry_operations;
3914#ifdef CONFIG_BTRFS_FS_RUN_SANITY_TESTS
3915void btrfs_test_inode_set_ops(struct inode *inode);
3916#endif
3912 3917
3913/* ioctl.c */ 3918/* ioctl.c */
3914long btrfs_ioctl(struct file *file, unsigned int cmd, unsigned long arg); 3919long btrfs_ioctl(struct file *file, unsigned int cmd, unsigned long arg);
diff --git a/fs/btrfs/disk-io.c b/fs/btrfs/disk-io.c
index f79f38542a73..639f2663ed3f 100644
--- a/fs/btrfs/disk-io.c
+++ b/fs/btrfs/disk-io.c
@@ -3921,7 +3921,7 @@ static int btrfs_check_super_valid(struct btrfs_fs_info *fs_info,
3921 } 3921 }
3922 if (btrfs_super_sys_array_size(sb) < sizeof(struct btrfs_disk_key) 3922 if (btrfs_super_sys_array_size(sb) < sizeof(struct btrfs_disk_key)
3923 + sizeof(struct btrfs_chunk)) { 3923 + sizeof(struct btrfs_chunk)) {
3924 printk(KERN_ERR "BTRFS: system chunk array too small %u < %lu\n", 3924 printk(KERN_ERR "BTRFS: system chunk array too small %u < %zu\n",
3925 btrfs_super_sys_array_size(sb), 3925 btrfs_super_sys_array_size(sb),
3926 sizeof(struct btrfs_disk_key) 3926 sizeof(struct btrfs_disk_key)
3927 + sizeof(struct btrfs_chunk)); 3927 + sizeof(struct btrfs_chunk));
diff --git a/fs/btrfs/extent-tree.c b/fs/btrfs/extent-tree.c
index 571f402d3fc4..8b353ad02f03 100644
--- a/fs/btrfs/extent-tree.c
+++ b/fs/btrfs/extent-tree.c
@@ -3208,6 +3208,8 @@ static int cache_save_setup(struct btrfs_block_group_cache *block_group,
3208 return 0; 3208 return 0;
3209 } 3209 }
3210 3210
3211 if (trans->aborted)
3212 return 0;
3211again: 3213again:
3212 inode = lookup_free_space_inode(root, block_group, path); 3214 inode = lookup_free_space_inode(root, block_group, path);
3213 if (IS_ERR(inode) && PTR_ERR(inode) != -ENOENT) { 3215 if (IS_ERR(inode) && PTR_ERR(inode) != -ENOENT) {
@@ -3243,6 +3245,20 @@ again:
3243 */ 3245 */
3244 BTRFS_I(inode)->generation = 0; 3246 BTRFS_I(inode)->generation = 0;
3245 ret = btrfs_update_inode(trans, root, inode); 3247 ret = btrfs_update_inode(trans, root, inode);
3248 if (ret) {
3249 /*
3250 * So theoretically we could recover from this, simply set the
3251 * super cache generation to 0 so we know to invalidate the
3252 * cache, but then we'd have to keep track of the block groups
3253 * that fail this way so we know we _have_ to reset this cache
3254 * before the next commit or risk reading stale cache. So to
3255 * limit our exposure to horrible edge cases lets just abort the
3256 * transaction, this only happens in really bad situations
3257 * anyway.
3258 */
3259 btrfs_abort_transaction(trans, root, ret);
3260 goto out_put;
3261 }
3246 WARN_ON(ret); 3262 WARN_ON(ret);
3247 3263
3248 if (i_size_read(inode) > 0) { 3264 if (i_size_read(inode) > 0) {
@@ -3309,6 +3325,32 @@ out:
3309 return ret; 3325 return ret;
3310} 3326}
3311 3327
3328int btrfs_setup_space_cache(struct btrfs_trans_handle *trans,
3329 struct btrfs_root *root)
3330{
3331 struct btrfs_block_group_cache *cache, *tmp;
3332 struct btrfs_transaction *cur_trans = trans->transaction;
3333 struct btrfs_path *path;
3334
3335 if (list_empty(&cur_trans->dirty_bgs) ||
3336 !btrfs_test_opt(root, SPACE_CACHE))
3337 return 0;
3338
3339 path = btrfs_alloc_path();
3340 if (!path)
3341 return -ENOMEM;
3342
3343 /* Could add new block groups, use _safe just in case */
3344 list_for_each_entry_safe(cache, tmp, &cur_trans->dirty_bgs,
3345 dirty_list) {
3346 if (cache->disk_cache_state == BTRFS_DC_CLEAR)
3347 cache_save_setup(cache, trans, path);
3348 }
3349
3350 btrfs_free_path(path);
3351 return 0;
3352}
3353
3312int btrfs_write_dirty_block_groups(struct btrfs_trans_handle *trans, 3354int btrfs_write_dirty_block_groups(struct btrfs_trans_handle *trans,
3313 struct btrfs_root *root) 3355 struct btrfs_root *root)
3314{ 3356{
@@ -5094,7 +5136,11 @@ int btrfs_delalloc_reserve_metadata(struct inode *inode, u64 num_bytes)
5094 num_bytes = ALIGN(num_bytes, root->sectorsize); 5136 num_bytes = ALIGN(num_bytes, root->sectorsize);
5095 5137
5096 spin_lock(&BTRFS_I(inode)->lock); 5138 spin_lock(&BTRFS_I(inode)->lock);
5097 BTRFS_I(inode)->outstanding_extents++; 5139 nr_extents = (unsigned)div64_u64(num_bytes +
5140 BTRFS_MAX_EXTENT_SIZE - 1,
5141 BTRFS_MAX_EXTENT_SIZE);
5142 BTRFS_I(inode)->outstanding_extents += nr_extents;
5143 nr_extents = 0;
5098 5144
5099 if (BTRFS_I(inode)->outstanding_extents > 5145 if (BTRFS_I(inode)->outstanding_extents >
5100 BTRFS_I(inode)->reserved_extents) 5146 BTRFS_I(inode)->reserved_extents)
@@ -5239,6 +5285,9 @@ void btrfs_delalloc_release_metadata(struct inode *inode, u64 num_bytes)
5239 if (dropped > 0) 5285 if (dropped > 0)
5240 to_free += btrfs_calc_trans_metadata_size(root, dropped); 5286 to_free += btrfs_calc_trans_metadata_size(root, dropped);
5241 5287
5288 if (btrfs_test_is_dummy_root(root))
5289 return;
5290
5242 trace_btrfs_space_reservation(root->fs_info, "delalloc", 5291 trace_btrfs_space_reservation(root->fs_info, "delalloc",
5243 btrfs_ino(inode), to_free, 0); 5292 btrfs_ino(inode), to_free, 0);
5244 if (root->fs_info->quota_enabled) { 5293 if (root->fs_info->quota_enabled) {
diff --git a/fs/btrfs/extent_io.c b/fs/btrfs/extent_io.c
index c7233ff1d533..d688cfe5d496 100644
--- a/fs/btrfs/extent_io.c
+++ b/fs/btrfs/extent_io.c
@@ -4968,6 +4968,12 @@ static int release_extent_buffer(struct extent_buffer *eb)
4968 4968
4969 /* Should be safe to release our pages at this point */ 4969 /* Should be safe to release our pages at this point */
4970 btrfs_release_extent_buffer_page(eb); 4970 btrfs_release_extent_buffer_page(eb);
4971#ifdef CONFIG_BTRFS_FS_RUN_SANITY_TESTS
4972 if (unlikely(test_bit(EXTENT_BUFFER_DUMMY, &eb->bflags))) {
4973 __free_extent_buffer(eb);
4974 return 1;
4975 }
4976#endif
4971 call_rcu(&eb->rcu_head, btrfs_release_extent_buffer_rcu); 4977 call_rcu(&eb->rcu_head, btrfs_release_extent_buffer_rcu);
4972 return 1; 4978 return 1;
4973 } 4979 }
diff --git a/fs/btrfs/file.c b/fs/btrfs/file.c
index b78bbbac900d..30982bbd31c3 100644
--- a/fs/btrfs/file.c
+++ b/fs/btrfs/file.c
@@ -1811,22 +1811,10 @@ static ssize_t btrfs_file_write_iter(struct kiocb *iocb,
1811 mutex_unlock(&inode->i_mutex); 1811 mutex_unlock(&inode->i_mutex);
1812 1812
1813 /* 1813 /*
1814 * we want to make sure fsync finds this change
1815 * but we haven't joined a transaction running right now.
1816 *
1817 * Later on, someone is sure to update the inode and get the
1818 * real transid recorded.
1819 *
1820 * We set last_trans now to the fs_info generation + 1,
1821 * this will either be one more than the running transaction
1822 * or the generation used for the next transaction if there isn't
1823 * one running right now.
1824 *
1825 * We also have to set last_sub_trans to the current log transid, 1814 * We also have to set last_sub_trans to the current log transid,
1826 * otherwise subsequent syncs to a file that's been synced in this 1815 * otherwise subsequent syncs to a file that's been synced in this
1827 * transaction will appear to have already occured. 1816 * transaction will appear to have already occured.
1828 */ 1817 */
1829 BTRFS_I(inode)->last_trans = root->fs_info->generation + 1;
1830 BTRFS_I(inode)->last_sub_trans = root->log_transid; 1818 BTRFS_I(inode)->last_sub_trans = root->log_transid;
1831 if (num_written > 0) { 1819 if (num_written > 0) {
1832 err = generic_write_sync(file, pos, num_written); 1820 err = generic_write_sync(file, pos, num_written);
@@ -1959,25 +1947,37 @@ int btrfs_sync_file(struct file *file, loff_t start, loff_t end, int datasync)
1959 atomic_inc(&root->log_batch); 1947 atomic_inc(&root->log_batch);
1960 1948
1961 /* 1949 /*
1962 * check the transaction that last modified this inode 1950 * If the last transaction that changed this file was before the current
1963 * and see if its already been committed 1951 * transaction and we have the full sync flag set in our inode, we can
1964 */ 1952 * bail out now without any syncing.
1965 if (!BTRFS_I(inode)->last_trans) { 1953 *
1966 mutex_unlock(&inode->i_mutex); 1954 * Note that we can't bail out if the full sync flag isn't set. This is
1967 goto out; 1955 * because when the full sync flag is set we start all ordered extents
1968 } 1956 * and wait for them to fully complete - when they complete they update
1969 1957 * the inode's last_trans field through:
1970 /* 1958 *
1971 * if the last transaction that changed this file was before 1959 * btrfs_finish_ordered_io() ->
1972 * the current transaction, we can bail out now without any 1960 * btrfs_update_inode_fallback() ->
1973 * syncing 1961 * btrfs_update_inode() ->
1962 * btrfs_set_inode_last_trans()
1963 *
1964 * So we are sure that last_trans is up to date and can do this check to
1965 * bail out safely. For the fast path, when the full sync flag is not
1966 * set in our inode, we can not do it because we start only our ordered
1967 * extents and don't wait for them to complete (that is when
1968 * btrfs_finish_ordered_io runs), so here at this point their last_trans
1969 * value might be less than or equals to fs_info->last_trans_committed,
1970 * and setting a speculative last_trans for an inode when a buffered
1971 * write is made (such as fs_info->generation + 1 for example) would not
1972 * be reliable since after setting the value and before fsync is called
1973 * any number of transactions can start and commit (transaction kthread
1974 * commits the current transaction periodically), and a transaction
1975 * commit does not start nor waits for ordered extents to complete.
1974 */ 1976 */
1975 smp_mb(); 1977 smp_mb();
1976 if (btrfs_inode_in_log(inode, root->fs_info->generation) || 1978 if (btrfs_inode_in_log(inode, root->fs_info->generation) ||
1977 BTRFS_I(inode)->last_trans <= 1979 (full_sync && BTRFS_I(inode)->last_trans <=
1978 root->fs_info->last_trans_committed) { 1980 root->fs_info->last_trans_committed)) {
1979 BTRFS_I(inode)->last_trans = 0;
1980
1981 /* 1981 /*
1982 * We'v had everything committed since the last time we were 1982 * We'v had everything committed since the last time we were
1983 * modified so clear this flag in case it was set for whatever 1983 * modified so clear this flag in case it was set for whatever
@@ -2275,6 +2275,8 @@ static int btrfs_punch_hole(struct inode *inode, loff_t offset, loff_t len)
2275 bool same_page; 2275 bool same_page;
2276 bool no_holes = btrfs_fs_incompat(root->fs_info, NO_HOLES); 2276 bool no_holes = btrfs_fs_incompat(root->fs_info, NO_HOLES);
2277 u64 ino_size; 2277 u64 ino_size;
2278 bool truncated_page = false;
2279 bool updated_inode = false;
2278 2280
2279 ret = btrfs_wait_ordered_range(inode, offset, len); 2281 ret = btrfs_wait_ordered_range(inode, offset, len);
2280 if (ret) 2282 if (ret)
@@ -2306,13 +2308,18 @@ static int btrfs_punch_hole(struct inode *inode, loff_t offset, loff_t len)
2306 * entire page. 2308 * entire page.
2307 */ 2309 */
2308 if (same_page && len < PAGE_CACHE_SIZE) { 2310 if (same_page && len < PAGE_CACHE_SIZE) {
2309 if (offset < ino_size) 2311 if (offset < ino_size) {
2312 truncated_page = true;
2310 ret = btrfs_truncate_page(inode, offset, len, 0); 2313 ret = btrfs_truncate_page(inode, offset, len, 0);
2314 } else {
2315 ret = 0;
2316 }
2311 goto out_only_mutex; 2317 goto out_only_mutex;
2312 } 2318 }
2313 2319
2314 /* zero back part of the first page */ 2320 /* zero back part of the first page */
2315 if (offset < ino_size) { 2321 if (offset < ino_size) {
2322 truncated_page = true;
2316 ret = btrfs_truncate_page(inode, offset, 0, 0); 2323 ret = btrfs_truncate_page(inode, offset, 0, 0);
2317 if (ret) { 2324 if (ret) {
2318 mutex_unlock(&inode->i_mutex); 2325 mutex_unlock(&inode->i_mutex);
@@ -2348,6 +2355,7 @@ static int btrfs_punch_hole(struct inode *inode, loff_t offset, loff_t len)
2348 if (!ret) { 2355 if (!ret) {
2349 /* zero the front end of the last page */ 2356 /* zero the front end of the last page */
2350 if (tail_start + tail_len < ino_size) { 2357 if (tail_start + tail_len < ino_size) {
2358 truncated_page = true;
2351 ret = btrfs_truncate_page(inode, 2359 ret = btrfs_truncate_page(inode,
2352 tail_start + tail_len, 0, 1); 2360 tail_start + tail_len, 0, 1);
2353 if (ret) 2361 if (ret)
@@ -2357,8 +2365,8 @@ static int btrfs_punch_hole(struct inode *inode, loff_t offset, loff_t len)
2357 } 2365 }
2358 2366
2359 if (lockend < lockstart) { 2367 if (lockend < lockstart) {
2360 mutex_unlock(&inode->i_mutex); 2368 ret = 0;
2361 return 0; 2369 goto out_only_mutex;
2362 } 2370 }
2363 2371
2364 while (1) { 2372 while (1) {
@@ -2506,6 +2514,7 @@ out_trans:
2506 2514
2507 trans->block_rsv = &root->fs_info->trans_block_rsv; 2515 trans->block_rsv = &root->fs_info->trans_block_rsv;
2508 ret = btrfs_update_inode(trans, root, inode); 2516 ret = btrfs_update_inode(trans, root, inode);
2517 updated_inode = true;
2509 btrfs_end_transaction(trans, root); 2518 btrfs_end_transaction(trans, root);
2510 btrfs_btree_balance_dirty(root); 2519 btrfs_btree_balance_dirty(root);
2511out_free: 2520out_free:
@@ -2515,6 +2524,22 @@ out:
2515 unlock_extent_cached(&BTRFS_I(inode)->io_tree, lockstart, lockend, 2524 unlock_extent_cached(&BTRFS_I(inode)->io_tree, lockstart, lockend,
2516 &cached_state, GFP_NOFS); 2525 &cached_state, GFP_NOFS);
2517out_only_mutex: 2526out_only_mutex:
2527 if (!updated_inode && truncated_page && !ret && !err) {
2528 /*
2529 * If we only end up zeroing part of a page, we still need to
2530 * update the inode item, so that all the time fields are
2531 * updated as well as the necessary btrfs inode in memory fields
2532 * for detecting, at fsync time, if the inode isn't yet in the
2533 * log tree or it's there but not up to date.
2534 */
2535 trans = btrfs_start_transaction(root, 1);
2536 if (IS_ERR(trans)) {
2537 err = PTR_ERR(trans);
2538 } else {
2539 err = btrfs_update_inode(trans, root, inode);
2540 ret = btrfs_end_transaction(trans, root);
2541 }
2542 }
2518 mutex_unlock(&inode->i_mutex); 2543 mutex_unlock(&inode->i_mutex);
2519 if (ret && !err) 2544 if (ret && !err)
2520 err = ret; 2545 err = ret;
diff --git a/fs/btrfs/inode.c b/fs/btrfs/inode.c
index a85c23dfcddb..d2e732d7af52 100644
--- a/fs/btrfs/inode.c
+++ b/fs/btrfs/inode.c
@@ -108,6 +108,13 @@ static struct extent_map *create_pinned_em(struct inode *inode, u64 start,
108 108
109static int btrfs_dirty_inode(struct inode *inode); 109static int btrfs_dirty_inode(struct inode *inode);
110 110
111#ifdef CONFIG_BTRFS_FS_RUN_SANITY_TESTS
112void btrfs_test_inode_set_ops(struct inode *inode)
113{
114 BTRFS_I(inode)->io_tree.ops = &btrfs_extent_io_ops;
115}
116#endif
117
111static int btrfs_init_inode_security(struct btrfs_trans_handle *trans, 118static int btrfs_init_inode_security(struct btrfs_trans_handle *trans,
112 struct inode *inode, struct inode *dir, 119 struct inode *inode, struct inode *dir,
113 const struct qstr *qstr) 120 const struct qstr *qstr)
@@ -1542,30 +1549,17 @@ static void btrfs_split_extent_hook(struct inode *inode,
1542 u64 new_size; 1549 u64 new_size;
1543 1550
1544 /* 1551 /*
1545 * We need the largest size of the remaining extent to see if we 1552 * See the explanation in btrfs_merge_extent_hook, the same
1546 * need to add a new outstanding extent. Think of the following 1553 * applies here, just in reverse.
1547 * case
1548 *
1549 * [MEAX_EXTENT_SIZEx2 - 4k][4k]
1550 *
1551 * The new_size would just be 4k and we'd think we had enough
1552 * outstanding extents for this if we only took one side of the
1553 * split, same goes for the other direction. We need to see if
1554 * the larger size still is the same amount of extents as the
1555 * original size, because if it is we need to add a new
1556 * outstanding extent. But if we split up and the larger size
1557 * is less than the original then we are good to go since we've
1558 * already accounted for the extra extent in our original
1559 * accounting.
1560 */ 1554 */
1561 new_size = orig->end - split + 1; 1555 new_size = orig->end - split + 1;
1562 if ((split - orig->start) > new_size) 1556 num_extents = div64_u64(new_size + BTRFS_MAX_EXTENT_SIZE - 1,
1563 new_size = split - orig->start;
1564
1565 num_extents = div64_u64(size + BTRFS_MAX_EXTENT_SIZE - 1,
1566 BTRFS_MAX_EXTENT_SIZE); 1557 BTRFS_MAX_EXTENT_SIZE);
1567 if (div64_u64(new_size + BTRFS_MAX_EXTENT_SIZE - 1, 1558 new_size = split - orig->start;
1568 BTRFS_MAX_EXTENT_SIZE) < num_extents) 1559 num_extents += div64_u64(new_size + BTRFS_MAX_EXTENT_SIZE - 1,
1560 BTRFS_MAX_EXTENT_SIZE);
1561 if (div64_u64(size + BTRFS_MAX_EXTENT_SIZE - 1,
1562 BTRFS_MAX_EXTENT_SIZE) >= num_extents)
1569 return; 1563 return;
1570 } 1564 }
1571 1565
@@ -1591,8 +1585,10 @@ static void btrfs_merge_extent_hook(struct inode *inode,
1591 if (!(other->state & EXTENT_DELALLOC)) 1585 if (!(other->state & EXTENT_DELALLOC))
1592 return; 1586 return;
1593 1587
1594 old_size = other->end - other->start + 1; 1588 if (new->start > other->start)
1595 new_size = old_size + (new->end - new->start + 1); 1589 new_size = new->end - other->start + 1;
1590 else
1591 new_size = other->end - new->start + 1;
1596 1592
1597 /* we're not bigger than the max, unreserve the space and go */ 1593 /* we're not bigger than the max, unreserve the space and go */
1598 if (new_size <= BTRFS_MAX_EXTENT_SIZE) { 1594 if (new_size <= BTRFS_MAX_EXTENT_SIZE) {
@@ -1603,13 +1599,32 @@ static void btrfs_merge_extent_hook(struct inode *inode,
1603 } 1599 }
1604 1600
1605 /* 1601 /*
1606 * If we grew by another max_extent, just return, we want to keep that 1602 * We have to add up either side to figure out how many extents were
1607 * reserved amount. 1603 * accounted for before we merged into one big extent. If the number of
1604 * extents we accounted for is <= the amount we need for the new range
1605 * then we can return, otherwise drop. Think of it like this
1606 *
1607 * [ 4k][MAX_SIZE]
1608 *
1609 * So we've grown the extent by a MAX_SIZE extent, this would mean we
1610 * need 2 outstanding extents, on one side we have 1 and the other side
1611 * we have 1 so they are == and we can return. But in this case
1612 *
1613 * [MAX_SIZE+4k][MAX_SIZE+4k]
1614 *
1615 * Each range on their own accounts for 2 extents, but merged together
1616 * they are only 3 extents worth of accounting, so we need to drop in
1617 * this case.
1608 */ 1618 */
1619 old_size = other->end - other->start + 1;
1609 num_extents = div64_u64(old_size + BTRFS_MAX_EXTENT_SIZE - 1, 1620 num_extents = div64_u64(old_size + BTRFS_MAX_EXTENT_SIZE - 1,
1610 BTRFS_MAX_EXTENT_SIZE); 1621 BTRFS_MAX_EXTENT_SIZE);
1622 old_size = new->end - new->start + 1;
1623 num_extents += div64_u64(old_size + BTRFS_MAX_EXTENT_SIZE - 1,
1624 BTRFS_MAX_EXTENT_SIZE);
1625
1611 if (div64_u64(new_size + BTRFS_MAX_EXTENT_SIZE - 1, 1626 if (div64_u64(new_size + BTRFS_MAX_EXTENT_SIZE - 1,
1612 BTRFS_MAX_EXTENT_SIZE) > num_extents) 1627 BTRFS_MAX_EXTENT_SIZE) >= num_extents)
1613 return; 1628 return;
1614 1629
1615 spin_lock(&BTRFS_I(inode)->lock); 1630 spin_lock(&BTRFS_I(inode)->lock);
@@ -1686,6 +1701,10 @@ static void btrfs_set_bit_hook(struct inode *inode,
1686 spin_unlock(&BTRFS_I(inode)->lock); 1701 spin_unlock(&BTRFS_I(inode)->lock);
1687 } 1702 }
1688 1703
1704 /* For sanity tests */
1705 if (btrfs_test_is_dummy_root(root))
1706 return;
1707
1689 __percpu_counter_add(&root->fs_info->delalloc_bytes, len, 1708 __percpu_counter_add(&root->fs_info->delalloc_bytes, len,
1690 root->fs_info->delalloc_batch); 1709 root->fs_info->delalloc_batch);
1691 spin_lock(&BTRFS_I(inode)->lock); 1710 spin_lock(&BTRFS_I(inode)->lock);
@@ -1741,6 +1760,10 @@ static void btrfs_clear_bit_hook(struct inode *inode,
1741 root != root->fs_info->tree_root) 1760 root != root->fs_info->tree_root)
1742 btrfs_delalloc_release_metadata(inode, len); 1761 btrfs_delalloc_release_metadata(inode, len);
1743 1762
1763 /* For sanity tests. */
1764 if (btrfs_test_is_dummy_root(root))
1765 return;
1766
1744 if (root->root_key.objectid != BTRFS_DATA_RELOC_TREE_OBJECTID 1767 if (root->root_key.objectid != BTRFS_DATA_RELOC_TREE_OBJECTID
1745 && do_list && !(state->state & EXTENT_NORESERVE)) 1768 && do_list && !(state->state & EXTENT_NORESERVE))
1746 btrfs_free_reserved_data_space(inode, len); 1769 btrfs_free_reserved_data_space(inode, len);
@@ -7213,7 +7236,7 @@ static int btrfs_get_blocks_direct(struct inode *inode, sector_t iblock,
7213 u64 start = iblock << inode->i_blkbits; 7236 u64 start = iblock << inode->i_blkbits;
7214 u64 lockstart, lockend; 7237 u64 lockstart, lockend;
7215 u64 len = bh_result->b_size; 7238 u64 len = bh_result->b_size;
7216 u64 orig_len = len; 7239 u64 *outstanding_extents = NULL;
7217 int unlock_bits = EXTENT_LOCKED; 7240 int unlock_bits = EXTENT_LOCKED;
7218 int ret = 0; 7241 int ret = 0;
7219 7242
@@ -7225,6 +7248,16 @@ static int btrfs_get_blocks_direct(struct inode *inode, sector_t iblock,
7225 lockstart = start; 7248 lockstart = start;
7226 lockend = start + len - 1; 7249 lockend = start + len - 1;
7227 7250
7251 if (current->journal_info) {
7252 /*
7253 * Need to pull our outstanding extents and set journal_info to NULL so
7254 * that anything that needs to check if there's a transction doesn't get
7255 * confused.
7256 */
7257 outstanding_extents = current->journal_info;
7258 current->journal_info = NULL;
7259 }
7260
7228 /* 7261 /*
7229 * If this errors out it's because we couldn't invalidate pagecache for 7262 * If this errors out it's because we couldn't invalidate pagecache for
7230 * this range and we need to fallback to buffered. 7263 * this range and we need to fallback to buffered.
@@ -7285,7 +7318,6 @@ static int btrfs_get_blocks_direct(struct inode *inode, sector_t iblock,
7285 ((BTRFS_I(inode)->flags & BTRFS_INODE_NODATACOW) && 7318 ((BTRFS_I(inode)->flags & BTRFS_INODE_NODATACOW) &&
7286 em->block_start != EXTENT_MAP_HOLE)) { 7319 em->block_start != EXTENT_MAP_HOLE)) {
7287 int type; 7320 int type;
7288 int ret;
7289 u64 block_start, orig_start, orig_block_len, ram_bytes; 7321 u64 block_start, orig_start, orig_block_len, ram_bytes;
7290 7322
7291 if (test_bit(EXTENT_FLAG_PREALLOC, &em->flags)) 7323 if (test_bit(EXTENT_FLAG_PREALLOC, &em->flags))
@@ -7349,11 +7381,20 @@ unlock:
7349 if (start + len > i_size_read(inode)) 7381 if (start + len > i_size_read(inode))
7350 i_size_write(inode, start + len); 7382 i_size_write(inode, start + len);
7351 7383
7352 if (len < orig_len) { 7384 /*
7385 * If we have an outstanding_extents count still set then we're
7386 * within our reservation, otherwise we need to adjust our inode
7387 * counter appropriately.
7388 */
7389 if (*outstanding_extents) {
7390 (*outstanding_extents)--;
7391 } else {
7353 spin_lock(&BTRFS_I(inode)->lock); 7392 spin_lock(&BTRFS_I(inode)->lock);
7354 BTRFS_I(inode)->outstanding_extents++; 7393 BTRFS_I(inode)->outstanding_extents++;
7355 spin_unlock(&BTRFS_I(inode)->lock); 7394 spin_unlock(&BTRFS_I(inode)->lock);
7356 } 7395 }
7396
7397 current->journal_info = outstanding_extents;
7357 btrfs_free_reserved_data_space(inode, len); 7398 btrfs_free_reserved_data_space(inode, len);
7358 } 7399 }
7359 7400
@@ -7377,6 +7418,8 @@ unlock:
7377unlock_err: 7418unlock_err:
7378 clear_extent_bit(&BTRFS_I(inode)->io_tree, lockstart, lockend, 7419 clear_extent_bit(&BTRFS_I(inode)->io_tree, lockstart, lockend,
7379 unlock_bits, 1, 0, &cached_state, GFP_NOFS); 7420 unlock_bits, 1, 0, &cached_state, GFP_NOFS);
7421 if (outstanding_extents)
7422 current->journal_info = outstanding_extents;
7380 return ret; 7423 return ret;
7381} 7424}
7382 7425
@@ -8076,6 +8119,7 @@ static ssize_t btrfs_direct_IO(int rw, struct kiocb *iocb,
8076{ 8119{
8077 struct file *file = iocb->ki_filp; 8120 struct file *file = iocb->ki_filp;
8078 struct inode *inode = file->f_mapping->host; 8121 struct inode *inode = file->f_mapping->host;
8122 u64 outstanding_extents = 0;
8079 size_t count = 0; 8123 size_t count = 0;
8080 int flags = 0; 8124 int flags = 0;
8081 bool wakeup = true; 8125 bool wakeup = true;
@@ -8113,6 +8157,16 @@ static ssize_t btrfs_direct_IO(int rw, struct kiocb *iocb,
8113 ret = btrfs_delalloc_reserve_space(inode, count); 8157 ret = btrfs_delalloc_reserve_space(inode, count);
8114 if (ret) 8158 if (ret)
8115 goto out; 8159 goto out;
8160 outstanding_extents = div64_u64(count +
8161 BTRFS_MAX_EXTENT_SIZE - 1,
8162 BTRFS_MAX_EXTENT_SIZE);
8163
8164 /*
8165 * We need to know how many extents we reserved so that we can
8166 * do the accounting properly if we go over the number we
8167 * originally calculated. Abuse current->journal_info for this.
8168 */
8169 current->journal_info = &outstanding_extents;
8116 } else if (test_bit(BTRFS_INODE_READDIO_NEED_LOCK, 8170 } else if (test_bit(BTRFS_INODE_READDIO_NEED_LOCK,
8117 &BTRFS_I(inode)->runtime_flags)) { 8171 &BTRFS_I(inode)->runtime_flags)) {
8118 inode_dio_done(inode); 8172 inode_dio_done(inode);
@@ -8125,6 +8179,7 @@ static ssize_t btrfs_direct_IO(int rw, struct kiocb *iocb,
8125 iter, offset, btrfs_get_blocks_direct, NULL, 8179 iter, offset, btrfs_get_blocks_direct, NULL,
8126 btrfs_submit_direct, flags); 8180 btrfs_submit_direct, flags);
8127 if (rw & WRITE) { 8181 if (rw & WRITE) {
8182 current->journal_info = NULL;
8128 if (ret < 0 && ret != -EIOCBQUEUED) 8183 if (ret < 0 && ret != -EIOCBQUEUED)
8129 btrfs_delalloc_release_space(inode, count); 8184 btrfs_delalloc_release_space(inode, count);
8130 else if (ret >= 0 && (size_t)ret < count) 8185 else if (ret >= 0 && (size_t)ret < count)
diff --git a/fs/btrfs/ioctl.c b/fs/btrfs/ioctl.c
index d49fe8a0f6b5..74609b931ba5 100644
--- a/fs/btrfs/ioctl.c
+++ b/fs/btrfs/ioctl.c
@@ -776,11 +776,11 @@ static int btrfs_may_delete(struct inode *dir, struct dentry *victim, int isdir)
776 IS_IMMUTABLE(victim->d_inode) || IS_SWAPFILE(victim->d_inode)) 776 IS_IMMUTABLE(victim->d_inode) || IS_SWAPFILE(victim->d_inode))
777 return -EPERM; 777 return -EPERM;
778 if (isdir) { 778 if (isdir) {
779 if (!S_ISDIR(victim->d_inode->i_mode)) 779 if (!d_is_dir(victim))
780 return -ENOTDIR; 780 return -ENOTDIR;
781 if (IS_ROOT(victim)) 781 if (IS_ROOT(victim))
782 return -EBUSY; 782 return -EBUSY;
783 } else if (S_ISDIR(victim->d_inode->i_mode)) 783 } else if (d_is_dir(victim))
784 return -EISDIR; 784 return -EISDIR;
785 if (IS_DEADDIR(dir)) 785 if (IS_DEADDIR(dir))
786 return -ENOENT; 786 return -ENOENT;
diff --git a/fs/btrfs/ordered-data.c b/fs/btrfs/ordered-data.c
index 534544e08f76..157cc54fc634 100644
--- a/fs/btrfs/ordered-data.c
+++ b/fs/btrfs/ordered-data.c
@@ -452,9 +452,7 @@ void btrfs_get_logged_extents(struct inode *inode,
452 continue; 452 continue;
453 if (entry_end(ordered) <= start) 453 if (entry_end(ordered) <= start)
454 break; 454 break;
455 if (!list_empty(&ordered->log_list)) 455 if (test_and_set_bit(BTRFS_ORDERED_LOGGED, &ordered->flags))
456 continue;
457 if (test_bit(BTRFS_ORDERED_LOGGED, &ordered->flags))
458 continue; 456 continue;
459 list_add(&ordered->log_list, logged_list); 457 list_add(&ordered->log_list, logged_list);
460 atomic_inc(&ordered->refs); 458 atomic_inc(&ordered->refs);
@@ -511,8 +509,7 @@ void btrfs_wait_logged_extents(struct btrfs_trans_handle *trans,
511 wait_event(ordered->wait, test_bit(BTRFS_ORDERED_IO_DONE, 509 wait_event(ordered->wait, test_bit(BTRFS_ORDERED_IO_DONE,
512 &ordered->flags)); 510 &ordered->flags));
513 511
514 if (!test_and_set_bit(BTRFS_ORDERED_LOGGED, &ordered->flags)) 512 list_add_tail(&ordered->trans_list, &trans->ordered);
515 list_add_tail(&ordered->trans_list, &trans->ordered);
516 spin_lock_irq(&log->log_extents_lock[index]); 513 spin_lock_irq(&log->log_extents_lock[index]);
517 } 514 }
518 spin_unlock_irq(&log->log_extents_lock[index]); 515 spin_unlock_irq(&log->log_extents_lock[index]);
diff --git a/fs/btrfs/qgroup.c b/fs/btrfs/qgroup.c
index 97159a8e91d4..058c79eecbfb 100644
--- a/fs/btrfs/qgroup.c
+++ b/fs/btrfs/qgroup.c
@@ -1259,7 +1259,7 @@ static int comp_oper(struct btrfs_qgroup_operation *oper1,
1259 if (oper1->seq < oper2->seq) 1259 if (oper1->seq < oper2->seq)
1260 return -1; 1260 return -1;
1261 if (oper1->seq > oper2->seq) 1261 if (oper1->seq > oper2->seq)
1262 return -1; 1262 return 1;
1263 if (oper1->ref_root < oper2->ref_root) 1263 if (oper1->ref_root < oper2->ref_root)
1264 return -1; 1264 return -1;
1265 if (oper1->ref_root > oper2->ref_root) 1265 if (oper1->ref_root > oper2->ref_root)
diff --git a/fs/btrfs/send.c b/fs/btrfs/send.c
index fe5857223515..d6033f540cc7 100644
--- a/fs/btrfs/send.c
+++ b/fs/btrfs/send.c
@@ -230,6 +230,7 @@ struct pending_dir_move {
230 u64 parent_ino; 230 u64 parent_ino;
231 u64 ino; 231 u64 ino;
232 u64 gen; 232 u64 gen;
233 bool is_orphan;
233 struct list_head update_refs; 234 struct list_head update_refs;
234}; 235};
235 236
@@ -2984,7 +2985,8 @@ static int add_pending_dir_move(struct send_ctx *sctx,
2984 u64 ino_gen, 2985 u64 ino_gen,
2985 u64 parent_ino, 2986 u64 parent_ino,
2986 struct list_head *new_refs, 2987 struct list_head *new_refs,
2987 struct list_head *deleted_refs) 2988 struct list_head *deleted_refs,
2989 const bool is_orphan)
2988{ 2990{
2989 struct rb_node **p = &sctx->pending_dir_moves.rb_node; 2991 struct rb_node **p = &sctx->pending_dir_moves.rb_node;
2990 struct rb_node *parent = NULL; 2992 struct rb_node *parent = NULL;
@@ -2999,6 +3001,7 @@ static int add_pending_dir_move(struct send_ctx *sctx,
2999 pm->parent_ino = parent_ino; 3001 pm->parent_ino = parent_ino;
3000 pm->ino = ino; 3002 pm->ino = ino;
3001 pm->gen = ino_gen; 3003 pm->gen = ino_gen;
3004 pm->is_orphan = is_orphan;
3002 INIT_LIST_HEAD(&pm->list); 3005 INIT_LIST_HEAD(&pm->list);
3003 INIT_LIST_HEAD(&pm->update_refs); 3006 INIT_LIST_HEAD(&pm->update_refs);
3004 RB_CLEAR_NODE(&pm->node); 3007 RB_CLEAR_NODE(&pm->node);
@@ -3131,16 +3134,20 @@ static int apply_dir_move(struct send_ctx *sctx, struct pending_dir_move *pm)
3131 rmdir_ino = dm->rmdir_ino; 3134 rmdir_ino = dm->rmdir_ino;
3132 free_waiting_dir_move(sctx, dm); 3135 free_waiting_dir_move(sctx, dm);
3133 3136
3134 ret = get_first_ref(sctx->parent_root, pm->ino, 3137 if (pm->is_orphan) {
3135 &parent_ino, &parent_gen, name); 3138 ret = gen_unique_name(sctx, pm->ino,
3136 if (ret < 0) 3139 pm->gen, from_path);
3137 goto out; 3140 } else {
3138 3141 ret = get_first_ref(sctx->parent_root, pm->ino,
3139 ret = get_cur_path(sctx, parent_ino, parent_gen, 3142 &parent_ino, &parent_gen, name);
3140 from_path); 3143 if (ret < 0)
3141 if (ret < 0) 3144 goto out;
3142 goto out; 3145 ret = get_cur_path(sctx, parent_ino, parent_gen,
3143 ret = fs_path_add_path(from_path, name); 3146 from_path);
3147 if (ret < 0)
3148 goto out;
3149 ret = fs_path_add_path(from_path, name);
3150 }
3144 if (ret < 0) 3151 if (ret < 0)
3145 goto out; 3152 goto out;
3146 3153
@@ -3150,7 +3157,8 @@ static int apply_dir_move(struct send_ctx *sctx, struct pending_dir_move *pm)
3150 LIST_HEAD(deleted_refs); 3157 LIST_HEAD(deleted_refs);
3151 ASSERT(ancestor > BTRFS_FIRST_FREE_OBJECTID); 3158 ASSERT(ancestor > BTRFS_FIRST_FREE_OBJECTID);
3152 ret = add_pending_dir_move(sctx, pm->ino, pm->gen, ancestor, 3159 ret = add_pending_dir_move(sctx, pm->ino, pm->gen, ancestor,
3153 &pm->update_refs, &deleted_refs); 3160 &pm->update_refs, &deleted_refs,
3161 pm->is_orphan);
3154 if (ret < 0) 3162 if (ret < 0)
3155 goto out; 3163 goto out;
3156 if (rmdir_ino) { 3164 if (rmdir_ino) {
@@ -3283,6 +3291,127 @@ out:
3283 return ret; 3291 return ret;
3284} 3292}
3285 3293
3294/*
3295 * We might need to delay a directory rename even when no ancestor directory
3296 * (in the send root) with a higher inode number than ours (sctx->cur_ino) was
3297 * renamed. This happens when we rename a directory to the old name (the name
3298 * in the parent root) of some other unrelated directory that got its rename
3299 * delayed due to some ancestor with higher number that got renamed.
3300 *
3301 * Example:
3302 *
3303 * Parent snapshot:
3304 * . (ino 256)
3305 * |---- a/ (ino 257)
3306 * | |---- file (ino 260)
3307 * |
3308 * |---- b/ (ino 258)
3309 * |---- c/ (ino 259)
3310 *
3311 * Send snapshot:
3312 * . (ino 256)
3313 * |---- a/ (ino 258)
3314 * |---- x/ (ino 259)
3315 * |---- y/ (ino 257)
3316 * |----- file (ino 260)
3317 *
3318 * Here we can not rename 258 from 'b' to 'a' without the rename of inode 257
3319 * from 'a' to 'x/y' happening first, which in turn depends on the rename of
3320 * inode 259 from 'c' to 'x'. So the order of rename commands the send stream
3321 * must issue is:
3322 *
3323 * 1 - rename 259 from 'c' to 'x'
3324 * 2 - rename 257 from 'a' to 'x/y'
3325 * 3 - rename 258 from 'b' to 'a'
3326 *
3327 * Returns 1 if the rename of sctx->cur_ino needs to be delayed, 0 if it can
3328 * be done right away and < 0 on error.
3329 */
3330static int wait_for_dest_dir_move(struct send_ctx *sctx,
3331 struct recorded_ref *parent_ref,
3332 const bool is_orphan)
3333{
3334 struct btrfs_path *path;
3335 struct btrfs_key key;
3336 struct btrfs_key di_key;
3337 struct btrfs_dir_item *di;
3338 u64 left_gen;
3339 u64 right_gen;
3340 int ret = 0;
3341
3342 if (RB_EMPTY_ROOT(&sctx->waiting_dir_moves))
3343 return 0;
3344
3345 path = alloc_path_for_send();
3346 if (!path)
3347 return -ENOMEM;
3348
3349 key.objectid = parent_ref->dir;
3350 key.type = BTRFS_DIR_ITEM_KEY;
3351 key.offset = btrfs_name_hash(parent_ref->name, parent_ref->name_len);
3352
3353 ret = btrfs_search_slot(NULL, sctx->parent_root, &key, path, 0, 0);
3354 if (ret < 0) {
3355 goto out;
3356 } else if (ret > 0) {
3357 ret = 0;
3358 goto out;
3359 }
3360
3361 di = btrfs_match_dir_item_name(sctx->parent_root, path,
3362 parent_ref->name, parent_ref->name_len);
3363 if (!di) {
3364 ret = 0;
3365 goto out;
3366 }
3367 /*
3368 * di_key.objectid has the number of the inode that has a dentry in the
3369 * parent directory with the same name that sctx->cur_ino is being
3370 * renamed to. We need to check if that inode is in the send root as
3371 * well and if it is currently marked as an inode with a pending rename,
3372 * if it is, we need to delay the rename of sctx->cur_ino as well, so
3373 * that it happens after that other inode is renamed.
3374 */
3375 btrfs_dir_item_key_to_cpu(path->nodes[0], di, &di_key);
3376 if (di_key.type != BTRFS_INODE_ITEM_KEY) {
3377 ret = 0;
3378 goto out;
3379 }
3380
3381 ret = get_inode_info(sctx->parent_root, di_key.objectid, NULL,
3382 &left_gen, NULL, NULL, NULL, NULL);
3383 if (ret < 0)
3384 goto out;
3385 ret = get_inode_info(sctx->send_root, di_key.objectid, NULL,
3386 &right_gen, NULL, NULL, NULL, NULL);
3387 if (ret < 0) {
3388 if (ret == -ENOENT)
3389 ret = 0;
3390 goto out;
3391 }
3392
3393 /* Different inode, no need to delay the rename of sctx->cur_ino */
3394 if (right_gen != left_gen) {
3395 ret = 0;
3396 goto out;
3397 }
3398
3399 if (is_waiting_for_move(sctx, di_key.objectid)) {
3400 ret = add_pending_dir_move(sctx,
3401 sctx->cur_ino,
3402 sctx->cur_inode_gen,
3403 di_key.objectid,
3404 &sctx->new_refs,
3405 &sctx->deleted_refs,
3406 is_orphan);
3407 if (!ret)
3408 ret = 1;
3409 }
3410out:
3411 btrfs_free_path(path);
3412 return ret;
3413}
3414
3286static int wait_for_parent_move(struct send_ctx *sctx, 3415static int wait_for_parent_move(struct send_ctx *sctx,
3287 struct recorded_ref *parent_ref) 3416 struct recorded_ref *parent_ref)
3288{ 3417{
@@ -3349,7 +3478,8 @@ out:
3349 sctx->cur_inode_gen, 3478 sctx->cur_inode_gen,
3350 ino, 3479 ino,
3351 &sctx->new_refs, 3480 &sctx->new_refs,
3352 &sctx->deleted_refs); 3481 &sctx->deleted_refs,
3482 false);
3353 if (!ret) 3483 if (!ret)
3354 ret = 1; 3484 ret = 1;
3355 } 3485 }
@@ -3372,6 +3502,7 @@ static int process_recorded_refs(struct send_ctx *sctx, int *pending_move)
3372 int did_overwrite = 0; 3502 int did_overwrite = 0;
3373 int is_orphan = 0; 3503 int is_orphan = 0;
3374 u64 last_dir_ino_rm = 0; 3504 u64 last_dir_ino_rm = 0;
3505 bool can_rename = true;
3375 3506
3376verbose_printk("btrfs: process_recorded_refs %llu\n", sctx->cur_ino); 3507verbose_printk("btrfs: process_recorded_refs %llu\n", sctx->cur_ino);
3377 3508
@@ -3490,12 +3621,22 @@ verbose_printk("btrfs: process_recorded_refs %llu\n", sctx->cur_ino);
3490 } 3621 }
3491 } 3622 }
3492 3623
3624 if (S_ISDIR(sctx->cur_inode_mode) && sctx->parent_root) {
3625 ret = wait_for_dest_dir_move(sctx, cur, is_orphan);
3626 if (ret < 0)
3627 goto out;
3628 if (ret == 1) {
3629 can_rename = false;
3630 *pending_move = 1;
3631 }
3632 }
3633
3493 /* 3634 /*
3494 * link/move the ref to the new place. If we have an orphan 3635 * link/move the ref to the new place. If we have an orphan
3495 * inode, move it and update valid_path. If not, link or move 3636 * inode, move it and update valid_path. If not, link or move
3496 * it depending on the inode mode. 3637 * it depending on the inode mode.
3497 */ 3638 */
3498 if (is_orphan) { 3639 if (is_orphan && can_rename) {
3499 ret = send_rename(sctx, valid_path, cur->full_path); 3640 ret = send_rename(sctx, valid_path, cur->full_path);
3500 if (ret < 0) 3641 if (ret < 0)
3501 goto out; 3642 goto out;
@@ -3503,7 +3644,7 @@ verbose_printk("btrfs: process_recorded_refs %llu\n", sctx->cur_ino);
3503 ret = fs_path_copy(valid_path, cur->full_path); 3644 ret = fs_path_copy(valid_path, cur->full_path);
3504 if (ret < 0) 3645 if (ret < 0)
3505 goto out; 3646 goto out;
3506 } else { 3647 } else if (can_rename) {
3507 if (S_ISDIR(sctx->cur_inode_mode)) { 3648 if (S_ISDIR(sctx->cur_inode_mode)) {
3508 /* 3649 /*
3509 * Dirs can't be linked, so move it. For moved 3650 * Dirs can't be linked, so move it. For moved
diff --git a/fs/btrfs/tests/inode-tests.c b/fs/btrfs/tests/inode-tests.c
index a116b55ce788..054fc0d97131 100644
--- a/fs/btrfs/tests/inode-tests.c
+++ b/fs/btrfs/tests/inode-tests.c
@@ -911,6 +911,197 @@ out:
911 return ret; 911 return ret;
912} 912}
913 913
914static int test_extent_accounting(void)
915{
916 struct inode *inode = NULL;
917 struct btrfs_root *root = NULL;
918 int ret = -ENOMEM;
919
920 inode = btrfs_new_test_inode();
921 if (!inode) {
922 test_msg("Couldn't allocate inode\n");
923 return ret;
924 }
925
926 root = btrfs_alloc_dummy_root();
927 if (IS_ERR(root)) {
928 test_msg("Couldn't allocate root\n");
929 goto out;
930 }
931
932 root->fs_info = btrfs_alloc_dummy_fs_info();
933 if (!root->fs_info) {
934 test_msg("Couldn't allocate dummy fs info\n");
935 goto out;
936 }
937
938 BTRFS_I(inode)->root = root;
939 btrfs_test_inode_set_ops(inode);
940
941 /* [BTRFS_MAX_EXTENT_SIZE] */
942 BTRFS_I(inode)->outstanding_extents++;
943 ret = btrfs_set_extent_delalloc(inode, 0, BTRFS_MAX_EXTENT_SIZE - 1,
944 NULL);
945 if (ret) {
946 test_msg("btrfs_set_extent_delalloc returned %d\n", ret);
947 goto out;
948 }
949 if (BTRFS_I(inode)->outstanding_extents != 1) {
950 ret = -EINVAL;
951 test_msg("Miscount, wanted 1, got %u\n",
952 BTRFS_I(inode)->outstanding_extents);
953 goto out;
954 }
955
956 /* [BTRFS_MAX_EXTENT_SIZE][4k] */
957 BTRFS_I(inode)->outstanding_extents++;
958 ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE,
959 BTRFS_MAX_EXTENT_SIZE + 4095, NULL);
960 if (ret) {
961 test_msg("btrfs_set_extent_delalloc returned %d\n", ret);
962 goto out;
963 }
964 if (BTRFS_I(inode)->outstanding_extents != 2) {
965 ret = -EINVAL;
966 test_msg("Miscount, wanted 2, got %u\n",
967 BTRFS_I(inode)->outstanding_extents);
968 goto out;
969 }
970
971 /* [BTRFS_MAX_EXTENT_SIZE/2][4K HOLE][the rest] */
972 ret = clear_extent_bit(&BTRFS_I(inode)->io_tree,
973 BTRFS_MAX_EXTENT_SIZE >> 1,
974 (BTRFS_MAX_EXTENT_SIZE >> 1) + 4095,
975 EXTENT_DELALLOC | EXTENT_DIRTY |
976 EXTENT_UPTODATE | EXTENT_DO_ACCOUNTING, 0, 0,
977 NULL, GFP_NOFS);
978 if (ret) {
979 test_msg("clear_extent_bit returned %d\n", ret);
980 goto out;
981 }
982 if (BTRFS_I(inode)->outstanding_extents != 2) {
983 ret = -EINVAL;
984 test_msg("Miscount, wanted 2, got %u\n",
985 BTRFS_I(inode)->outstanding_extents);
986 goto out;
987 }
988
989 /* [BTRFS_MAX_EXTENT_SIZE][4K] */
990 BTRFS_I(inode)->outstanding_extents++;
991 ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE >> 1,
992 (BTRFS_MAX_EXTENT_SIZE >> 1) + 4095,
993 NULL);
994 if (ret) {
995 test_msg("btrfs_set_extent_delalloc returned %d\n", ret);
996 goto out;
997 }
998 if (BTRFS_I(inode)->outstanding_extents != 2) {
999 ret = -EINVAL;
1000 test_msg("Miscount, wanted 2, got %u\n",
1001 BTRFS_I(inode)->outstanding_extents);
1002 goto out;
1003 }
1004
1005 /*
1006 * [BTRFS_MAX_EXTENT_SIZE+4K][4K HOLE][BTRFS_MAX_EXTENT_SIZE+4K]
1007 *
1008 * I'm artificially adding 2 to outstanding_extents because in the
1009 * buffered IO case we'd add things up as we go, but I don't feel like
1010 * doing that here, this isn't the interesting case we want to test.
1011 */
1012 BTRFS_I(inode)->outstanding_extents += 2;
1013 ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE + 8192,
1014 (BTRFS_MAX_EXTENT_SIZE << 1) + 12287,
1015 NULL);
1016 if (ret) {
1017 test_msg("btrfs_set_extent_delalloc returned %d\n", ret);
1018 goto out;
1019 }
1020 if (BTRFS_I(inode)->outstanding_extents != 4) {
1021 ret = -EINVAL;
1022 test_msg("Miscount, wanted 4, got %u\n",
1023 BTRFS_I(inode)->outstanding_extents);
1024 goto out;
1025 }
1026
1027 /* [BTRFS_MAX_EXTENT_SIZE+4k][4k][BTRFS_MAX_EXTENT_SIZE+4k] */
1028 BTRFS_I(inode)->outstanding_extents++;
1029 ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE+4096,
1030 BTRFS_MAX_EXTENT_SIZE+8191, NULL);
1031 if (ret) {
1032 test_msg("btrfs_set_extent_delalloc returned %d\n", ret);
1033 goto out;
1034 }
1035 if (BTRFS_I(inode)->outstanding_extents != 3) {
1036 ret = -EINVAL;
1037 test_msg("Miscount, wanted 3, got %u\n",
1038 BTRFS_I(inode)->outstanding_extents);
1039 goto out;
1040 }
1041
1042 /* [BTRFS_MAX_EXTENT_SIZE+4k][4K HOLE][BTRFS_MAX_EXTENT_SIZE+4k] */
1043 ret = clear_extent_bit(&BTRFS_I(inode)->io_tree,
1044 BTRFS_MAX_EXTENT_SIZE+4096,
1045 BTRFS_MAX_EXTENT_SIZE+8191,
1046 EXTENT_DIRTY | EXTENT_DELALLOC |
1047 EXTENT_DO_ACCOUNTING | EXTENT_UPTODATE, 0, 0,
1048 NULL, GFP_NOFS);
1049 if (ret) {
1050 test_msg("clear_extent_bit returned %d\n", ret);
1051 goto out;
1052 }
1053 if (BTRFS_I(inode)->outstanding_extents != 4) {
1054 ret = -EINVAL;
1055 test_msg("Miscount, wanted 4, got %u\n",
1056 BTRFS_I(inode)->outstanding_extents);
1057 goto out;
1058 }
1059
1060 /*
1061 * Refill the hole again just for good measure, because I thought it
1062 * might fail and I'd rather satisfy my paranoia at this point.
1063 */
1064 BTRFS_I(inode)->outstanding_extents++;
1065 ret = btrfs_set_extent_delalloc(inode, BTRFS_MAX_EXTENT_SIZE+4096,
1066 BTRFS_MAX_EXTENT_SIZE+8191, NULL);
1067 if (ret) {
1068 test_msg("btrfs_set_extent_delalloc returned %d\n", ret);
1069 goto out;
1070 }
1071 if (BTRFS_I(inode)->outstanding_extents != 3) {
1072 ret = -EINVAL;
1073 test_msg("Miscount, wanted 3, got %u\n",
1074 BTRFS_I(inode)->outstanding_extents);
1075 goto out;
1076 }
1077
1078 /* Empty */
1079 ret = clear_extent_bit(&BTRFS_I(inode)->io_tree, 0, (u64)-1,
1080 EXTENT_DIRTY | EXTENT_DELALLOC |
1081 EXTENT_DO_ACCOUNTING | EXTENT_UPTODATE, 0, 0,
1082 NULL, GFP_NOFS);
1083 if (ret) {
1084 test_msg("clear_extent_bit returned %d\n", ret);
1085 goto out;
1086 }
1087 if (BTRFS_I(inode)->outstanding_extents) {
1088 ret = -EINVAL;
1089 test_msg("Miscount, wanted 0, got %u\n",
1090 BTRFS_I(inode)->outstanding_extents);
1091 goto out;
1092 }
1093 ret = 0;
1094out:
1095 if (ret)
1096 clear_extent_bit(&BTRFS_I(inode)->io_tree, 0, (u64)-1,
1097 EXTENT_DIRTY | EXTENT_DELALLOC |
1098 EXTENT_DO_ACCOUNTING | EXTENT_UPTODATE, 0, 0,
1099 NULL, GFP_NOFS);
1100 iput(inode);
1101 btrfs_free_dummy_root(root);
1102 return ret;
1103}
1104
914int btrfs_test_inodes(void) 1105int btrfs_test_inodes(void)
915{ 1106{
916 int ret; 1107 int ret;
@@ -924,5 +1115,9 @@ int btrfs_test_inodes(void)
924 if (ret) 1115 if (ret)
925 return ret; 1116 return ret;
926 test_msg("Running hole first btrfs_get_extent test\n"); 1117 test_msg("Running hole first btrfs_get_extent test\n");
927 return test_hole_first(); 1118 ret = test_hole_first();
1119 if (ret)
1120 return ret;
1121 test_msg("Running outstanding_extents tests\n");
1122 return test_extent_accounting();
928} 1123}
diff --git a/fs/btrfs/transaction.c b/fs/btrfs/transaction.c
index 7e80f32550a6..8be4278e25e8 100644
--- a/fs/btrfs/transaction.c
+++ b/fs/btrfs/transaction.c
@@ -1023,17 +1023,13 @@ static int update_cowonly_root(struct btrfs_trans_handle *trans,
1023 u64 old_root_bytenr; 1023 u64 old_root_bytenr;
1024 u64 old_root_used; 1024 u64 old_root_used;
1025 struct btrfs_root *tree_root = root->fs_info->tree_root; 1025 struct btrfs_root *tree_root = root->fs_info->tree_root;
1026 bool extent_root = (root->objectid == BTRFS_EXTENT_TREE_OBJECTID);
1027 1026
1028 old_root_used = btrfs_root_used(&root->root_item); 1027 old_root_used = btrfs_root_used(&root->root_item);
1029 btrfs_write_dirty_block_groups(trans, root);
1030 1028
1031 while (1) { 1029 while (1) {
1032 old_root_bytenr = btrfs_root_bytenr(&root->root_item); 1030 old_root_bytenr = btrfs_root_bytenr(&root->root_item);
1033 if (old_root_bytenr == root->node->start && 1031 if (old_root_bytenr == root->node->start &&
1034 old_root_used == btrfs_root_used(&root->root_item) && 1032 old_root_used == btrfs_root_used(&root->root_item))
1035 (!extent_root ||
1036 list_empty(&trans->transaction->dirty_bgs)))
1037 break; 1033 break;
1038 1034
1039 btrfs_set_root_node(&root->root_item, root->node); 1035 btrfs_set_root_node(&root->root_item, root->node);
@@ -1044,17 +1040,6 @@ static int update_cowonly_root(struct btrfs_trans_handle *trans,
1044 return ret; 1040 return ret;
1045 1041
1046 old_root_used = btrfs_root_used(&root->root_item); 1042 old_root_used = btrfs_root_used(&root->root_item);
1047 if (extent_root) {
1048 ret = btrfs_write_dirty_block_groups(trans, root);
1049 if (ret)
1050 return ret;
1051 }
1052 ret = btrfs_run_delayed_refs(trans, root, (unsigned long)-1);
1053 if (ret)
1054 return ret;
1055 ret = btrfs_run_delayed_refs(trans, root, (unsigned long)-1);
1056 if (ret)
1057 return ret;
1058 } 1043 }
1059 1044
1060 return 0; 1045 return 0;
@@ -1071,6 +1056,7 @@ static noinline int commit_cowonly_roots(struct btrfs_trans_handle *trans,
1071 struct btrfs_root *root) 1056 struct btrfs_root *root)
1072{ 1057{
1073 struct btrfs_fs_info *fs_info = root->fs_info; 1058 struct btrfs_fs_info *fs_info = root->fs_info;
1059 struct list_head *dirty_bgs = &trans->transaction->dirty_bgs;
1074 struct list_head *next; 1060 struct list_head *next;
1075 struct extent_buffer *eb; 1061 struct extent_buffer *eb;
1076 int ret; 1062 int ret;
@@ -1098,11 +1084,15 @@ static noinline int commit_cowonly_roots(struct btrfs_trans_handle *trans,
1098 if (ret) 1084 if (ret)
1099 return ret; 1085 return ret;
1100 1086
1087 ret = btrfs_setup_space_cache(trans, root);
1088 if (ret)
1089 return ret;
1090
1101 /* run_qgroups might have added some more refs */ 1091 /* run_qgroups might have added some more refs */
1102 ret = btrfs_run_delayed_refs(trans, root, (unsigned long)-1); 1092 ret = btrfs_run_delayed_refs(trans, root, (unsigned long)-1);
1103 if (ret) 1093 if (ret)
1104 return ret; 1094 return ret;
1105 1095again:
1106 while (!list_empty(&fs_info->dirty_cowonly_roots)) { 1096 while (!list_empty(&fs_info->dirty_cowonly_roots)) {
1107 next = fs_info->dirty_cowonly_roots.next; 1097 next = fs_info->dirty_cowonly_roots.next;
1108 list_del_init(next); 1098 list_del_init(next);
@@ -1115,8 +1105,23 @@ static noinline int commit_cowonly_roots(struct btrfs_trans_handle *trans,
1115 ret = update_cowonly_root(trans, root); 1105 ret = update_cowonly_root(trans, root);
1116 if (ret) 1106 if (ret)
1117 return ret; 1107 return ret;
1108 ret = btrfs_run_delayed_refs(trans, root, (unsigned long)-1);
1109 if (ret)
1110 return ret;
1118 } 1111 }
1119 1112
1113 while (!list_empty(dirty_bgs)) {
1114 ret = btrfs_write_dirty_block_groups(trans, root);
1115 if (ret)
1116 return ret;
1117 ret = btrfs_run_delayed_refs(trans, root, (unsigned long)-1);
1118 if (ret)
1119 return ret;
1120 }
1121
1122 if (!list_empty(&fs_info->dirty_cowonly_roots))
1123 goto again;
1124
1120 list_add_tail(&fs_info->extent_root->dirty_list, 1125 list_add_tail(&fs_info->extent_root->dirty_list,
1121 &trans->transaction->switch_commits); 1126 &trans->transaction->switch_commits);
1122 btrfs_after_dev_replace_commit(fs_info); 1127 btrfs_after_dev_replace_commit(fs_info);
@@ -1814,6 +1819,9 @@ int btrfs_commit_transaction(struct btrfs_trans_handle *trans,
1814 1819
1815 wait_for_commit(root, cur_trans); 1820 wait_for_commit(root, cur_trans);
1816 1821
1822 if (unlikely(cur_trans->aborted))
1823 ret = cur_trans->aborted;
1824
1817 btrfs_put_transaction(cur_trans); 1825 btrfs_put_transaction(cur_trans);
1818 1826
1819 return ret; 1827 return ret;
diff --git a/fs/btrfs/tree-log.c b/fs/btrfs/tree-log.c
index 9a37f8b39bae..c5b8ba37f88e 100644
--- a/fs/btrfs/tree-log.c
+++ b/fs/btrfs/tree-log.c
@@ -1012,7 +1012,7 @@ again:
1012 base = btrfs_item_ptr_offset(leaf, path->slots[0]); 1012 base = btrfs_item_ptr_offset(leaf, path->slots[0]);
1013 1013
1014 while (cur_offset < item_size) { 1014 while (cur_offset < item_size) {
1015 extref = (struct btrfs_inode_extref *)base + cur_offset; 1015 extref = (struct btrfs_inode_extref *)(base + cur_offset);
1016 1016
1017 victim_name_len = btrfs_inode_extref_name_len(leaf, extref); 1017 victim_name_len = btrfs_inode_extref_name_len(leaf, extref);
1018 1018
diff --git a/fs/btrfs/volumes.c b/fs/btrfs/volumes.c
index cd4d1315aaa9..8222f6f74147 100644
--- a/fs/btrfs/volumes.c
+++ b/fs/btrfs/volumes.c
@@ -4903,10 +4903,17 @@ static void sort_parity_stripes(struct btrfs_bio *bbio, int num_stripes)
4903static struct btrfs_bio *alloc_btrfs_bio(int total_stripes, int real_stripes) 4903static struct btrfs_bio *alloc_btrfs_bio(int total_stripes, int real_stripes)
4904{ 4904{
4905 struct btrfs_bio *bbio = kzalloc( 4905 struct btrfs_bio *bbio = kzalloc(
4906 /* the size of the btrfs_bio */
4906 sizeof(struct btrfs_bio) + 4907 sizeof(struct btrfs_bio) +
4908 /* plus the variable array for the stripes */
4907 sizeof(struct btrfs_bio_stripe) * (total_stripes) + 4909 sizeof(struct btrfs_bio_stripe) * (total_stripes) +
4910 /* plus the variable array for the tgt dev */
4908 sizeof(int) * (real_stripes) + 4911 sizeof(int) * (real_stripes) +
4909 sizeof(u64) * (real_stripes), 4912 /*
4913 * plus the raid_map, which includes both the tgt dev
4914 * and the stripes
4915 */
4916 sizeof(u64) * (total_stripes),
4910 GFP_NOFS); 4917 GFP_NOFS);
4911 if (!bbio) 4918 if (!bbio)
4912 return NULL; 4919 return NULL;
diff --git a/fs/btrfs/xattr.c b/fs/btrfs/xattr.c
index 47b19465f0dc..883b93623bc5 100644
--- a/fs/btrfs/xattr.c
+++ b/fs/btrfs/xattr.c
@@ -111,6 +111,8 @@ static int do_setxattr(struct btrfs_trans_handle *trans,
111 name, name_len, -1); 111 name, name_len, -1);
112 if (!di && (flags & XATTR_REPLACE)) 112 if (!di && (flags & XATTR_REPLACE))
113 ret = -ENODATA; 113 ret = -ENODATA;
114 else if (IS_ERR(di))
115 ret = PTR_ERR(di);
114 else if (di) 116 else if (di)
115 ret = btrfs_delete_one_dir_name(trans, root, path, di); 117 ret = btrfs_delete_one_dir_name(trans, root, path, di);
116 goto out; 118 goto out;
@@ -127,10 +129,12 @@ static int do_setxattr(struct btrfs_trans_handle *trans,
127 ASSERT(mutex_is_locked(&inode->i_mutex)); 129 ASSERT(mutex_is_locked(&inode->i_mutex));
128 di = btrfs_lookup_xattr(NULL, root, path, btrfs_ino(inode), 130 di = btrfs_lookup_xattr(NULL, root, path, btrfs_ino(inode),
129 name, name_len, 0); 131 name, name_len, 0);
130 if (!di) { 132 if (!di)
131 ret = -ENODATA; 133 ret = -ENODATA;
134 else if (IS_ERR(di))
135 ret = PTR_ERR(di);
136 if (ret)
132 goto out; 137 goto out;
133 }
134 btrfs_release_path(path); 138 btrfs_release_path(path);
135 di = NULL; 139 di = NULL;
136 } 140 }
diff --git a/fs/cachefiles/daemon.c b/fs/cachefiles/daemon.c
index ce1b115dcc28..f601def05bdf 100644
--- a/fs/cachefiles/daemon.c
+++ b/fs/cachefiles/daemon.c
@@ -574,7 +574,7 @@ static int cachefiles_daemon_cull(struct cachefiles_cache *cache, char *args)
574 /* extract the directory dentry from the cwd */ 574 /* extract the directory dentry from the cwd */
575 get_fs_pwd(current->fs, &path); 575 get_fs_pwd(current->fs, &path);
576 576
577 if (!S_ISDIR(path.dentry->d_inode->i_mode)) 577 if (!d_can_lookup(path.dentry))
578 goto notdir; 578 goto notdir;
579 579
580 cachefiles_begin_secure(cache, &saved_cred); 580 cachefiles_begin_secure(cache, &saved_cred);
@@ -646,7 +646,7 @@ static int cachefiles_daemon_inuse(struct cachefiles_cache *cache, char *args)
646 /* extract the directory dentry from the cwd */ 646 /* extract the directory dentry from the cwd */
647 get_fs_pwd(current->fs, &path); 647 get_fs_pwd(current->fs, &path);
648 648
649 if (!S_ISDIR(path.dentry->d_inode->i_mode)) 649 if (!d_can_lookup(path.dentry))
650 goto notdir; 650 goto notdir;
651 651
652 cachefiles_begin_secure(cache, &saved_cred); 652 cachefiles_begin_secure(cache, &saved_cred);
diff --git a/fs/cachefiles/interface.c b/fs/cachefiles/interface.c
index 1c7293c3a93a..232426214fdd 100644
--- a/fs/cachefiles/interface.c
+++ b/fs/cachefiles/interface.c
@@ -437,7 +437,7 @@ static int cachefiles_attr_changed(struct fscache_object *_object)
437 if (!object->backer) 437 if (!object->backer)
438 return -ENOBUFS; 438 return -ENOBUFS;
439 439
440 ASSERT(S_ISREG(object->backer->d_inode->i_mode)); 440 ASSERT(d_is_reg(object->backer));
441 441
442 fscache_set_store_limit(&object->fscache, ni_size); 442 fscache_set_store_limit(&object->fscache, ni_size);
443 443
@@ -501,7 +501,7 @@ static void cachefiles_invalidate_object(struct fscache_operation *op)
501 op->object->debug_id, (unsigned long long)ni_size); 501 op->object->debug_id, (unsigned long long)ni_size);
502 502
503 if (object->backer) { 503 if (object->backer) {
504 ASSERT(S_ISREG(object->backer->d_inode->i_mode)); 504 ASSERT(d_is_reg(object->backer));
505 505
506 fscache_set_store_limit(&object->fscache, ni_size); 506 fscache_set_store_limit(&object->fscache, ni_size);
507 507
diff --git a/fs/cachefiles/namei.c b/fs/cachefiles/namei.c
index 7f8e83f9d74e..1e51714eb33e 100644
--- a/fs/cachefiles/namei.c
+++ b/fs/cachefiles/namei.c
@@ -277,7 +277,7 @@ static int cachefiles_bury_object(struct cachefiles_cache *cache,
277 _debug("remove %p from %p", rep, dir); 277 _debug("remove %p from %p", rep, dir);
278 278
279 /* non-directories can just be unlinked */ 279 /* non-directories can just be unlinked */
280 if (!S_ISDIR(rep->d_inode->i_mode)) { 280 if (!d_is_dir(rep)) {
281 _debug("unlink stale object"); 281 _debug("unlink stale object");
282 282
283 path.mnt = cache->mnt; 283 path.mnt = cache->mnt;
@@ -323,7 +323,7 @@ try_again:
323 return 0; 323 return 0;
324 } 324 }
325 325
326 if (!S_ISDIR(cache->graveyard->d_inode->i_mode)) { 326 if (!d_can_lookup(cache->graveyard)) {
327 unlock_rename(cache->graveyard, dir); 327 unlock_rename(cache->graveyard, dir);
328 cachefiles_io_error(cache, "Graveyard no longer a directory"); 328 cachefiles_io_error(cache, "Graveyard no longer a directory");
329 return -EIO; 329 return -EIO;
@@ -475,7 +475,7 @@ int cachefiles_walk_to_object(struct cachefiles_object *parent,
475 ASSERT(parent->dentry); 475 ASSERT(parent->dentry);
476 ASSERT(parent->dentry->d_inode); 476 ASSERT(parent->dentry->d_inode);
477 477
478 if (!(S_ISDIR(parent->dentry->d_inode->i_mode))) { 478 if (!(d_is_dir(parent->dentry))) {
479 // TODO: convert file to dir 479 // TODO: convert file to dir
480 _leave("looking up in none directory"); 480 _leave("looking up in none directory");
481 return -ENOBUFS; 481 return -ENOBUFS;
@@ -539,7 +539,7 @@ lookup_again:
539 _debug("mkdir -> %p{%p{ino=%lu}}", 539 _debug("mkdir -> %p{%p{ino=%lu}}",
540 next, next->d_inode, next->d_inode->i_ino); 540 next, next->d_inode, next->d_inode->i_ino);
541 541
542 } else if (!S_ISDIR(next->d_inode->i_mode)) { 542 } else if (!d_can_lookup(next)) {
543 pr_err("inode %lu is not a directory\n", 543 pr_err("inode %lu is not a directory\n",
544 next->d_inode->i_ino); 544 next->d_inode->i_ino);
545 ret = -ENOBUFS; 545 ret = -ENOBUFS;
@@ -568,8 +568,8 @@ lookup_again:
568 _debug("create -> %p{%p{ino=%lu}}", 568 _debug("create -> %p{%p{ino=%lu}}",
569 next, next->d_inode, next->d_inode->i_ino); 569 next, next->d_inode, next->d_inode->i_ino);
570 570
571 } else if (!S_ISDIR(next->d_inode->i_mode) && 571 } else if (!d_can_lookup(next) &&
572 !S_ISREG(next->d_inode->i_mode) 572 !d_is_reg(next)
573 ) { 573 ) {
574 pr_err("inode %lu is not a file or directory\n", 574 pr_err("inode %lu is not a file or directory\n",
575 next->d_inode->i_ino); 575 next->d_inode->i_ino);
@@ -642,7 +642,7 @@ lookup_again:
642 642
643 /* open a file interface onto a data file */ 643 /* open a file interface onto a data file */
644 if (object->type != FSCACHE_COOKIE_TYPE_INDEX) { 644 if (object->type != FSCACHE_COOKIE_TYPE_INDEX) {
645 if (S_ISREG(object->dentry->d_inode->i_mode)) { 645 if (d_is_reg(object->dentry)) {
646 const struct address_space_operations *aops; 646 const struct address_space_operations *aops;
647 647
648 ret = -EPERM; 648 ret = -EPERM;
@@ -763,7 +763,7 @@ struct dentry *cachefiles_get_directory(struct cachefiles_cache *cache,
763 /* we need to make sure the subdir is a directory */ 763 /* we need to make sure the subdir is a directory */
764 ASSERT(subdir->d_inode); 764 ASSERT(subdir->d_inode);
765 765
766 if (!S_ISDIR(subdir->d_inode->i_mode)) { 766 if (!d_can_lookup(subdir)) {
767 pr_err("%s is not a directory\n", dirname); 767 pr_err("%s is not a directory\n", dirname);
768 ret = -EIO; 768 ret = -EIO;
769 goto check_error; 769 goto check_error;
diff --git a/fs/cachefiles/rdwr.c b/fs/cachefiles/rdwr.c
index 616db0e77b44..c6cd8d7a4eef 100644
--- a/fs/cachefiles/rdwr.c
+++ b/fs/cachefiles/rdwr.c
@@ -900,7 +900,7 @@ int cachefiles_write_page(struct fscache_storage *op, struct page *page)
900 return -ENOBUFS; 900 return -ENOBUFS;
901 } 901 }
902 902
903 ASSERT(S_ISREG(object->backer->d_inode->i_mode)); 903 ASSERT(d_is_reg(object->backer));
904 904
905 cache = container_of(object->fscache.cache, 905 cache = container_of(object->fscache.cache,
906 struct cachefiles_cache, cache); 906 struct cachefiles_cache, cache);
diff --git a/fs/ceph/dir.c b/fs/ceph/dir.c
index 0411dbb15815..83e9976f7189 100644
--- a/fs/ceph/dir.c
+++ b/fs/ceph/dir.c
@@ -904,7 +904,7 @@ static int ceph_unlink(struct inode *dir, struct dentry *dentry)
904 } else if (ceph_snap(dir) == CEPH_NOSNAP) { 904 } else if (ceph_snap(dir) == CEPH_NOSNAP) {
905 dout("unlink/rmdir dir %p dn %p inode %p\n", 905 dout("unlink/rmdir dir %p dn %p inode %p\n",
906 dir, dentry, inode); 906 dir, dentry, inode);
907 op = S_ISDIR(dentry->d_inode->i_mode) ? 907 op = d_is_dir(dentry) ?
908 CEPH_MDS_OP_RMDIR : CEPH_MDS_OP_UNLINK; 908 CEPH_MDS_OP_RMDIR : CEPH_MDS_OP_UNLINK;
909 } else 909 } else
910 goto out; 910 goto out;
diff --git a/fs/ceph/file.c b/fs/ceph/file.c
index a3d774b35149..d533075a823d 100644
--- a/fs/ceph/file.c
+++ b/fs/ceph/file.c
@@ -292,7 +292,7 @@ int ceph_atomic_open(struct inode *dir, struct dentry *dentry,
292 } 292 }
293 if (err) 293 if (err)
294 goto out_req; 294 goto out_req;
295 if (dn || dentry->d_inode == NULL || S_ISLNK(dentry->d_inode->i_mode)) { 295 if (dn || dentry->d_inode == NULL || d_is_symlink(dentry)) {
296 /* make vfs retry on splice, ENOENT, or symlink */ 296 /* make vfs retry on splice, ENOENT, or symlink */
297 dout("atomic_open finish_no_open on dn %p\n", dn); 297 dout("atomic_open finish_no_open on dn %p\n", dn);
298 err = finish_no_open(file, dn); 298 err = finish_no_open(file, dn);
diff --git a/fs/coda/dir.c b/fs/coda/dir.c
index 281ee011bb6a..60cb88c1dd2b 100644
--- a/fs/coda/dir.c
+++ b/fs/coda/dir.c
@@ -304,7 +304,7 @@ static int coda_rename(struct inode *old_dir, struct dentry *old_dentry,
304 (const char *) old_name, (const char *)new_name); 304 (const char *) old_name, (const char *)new_name);
305 if (!error) { 305 if (!error) {
306 if (new_dentry->d_inode) { 306 if (new_dentry->d_inode) {
307 if (S_ISDIR(new_dentry->d_inode->i_mode)) { 307 if (d_is_dir(new_dentry)) {
308 coda_dir_drop_nlink(old_dir); 308 coda_dir_drop_nlink(old_dir);
309 coda_dir_inc_nlink(new_dir); 309 coda_dir_inc_nlink(new_dir);
310 } 310 }
diff --git a/fs/configfs/configfs_internal.h b/fs/configfs/configfs_internal.h
index a315677e44d3..b65d1ef532d5 100644
--- a/fs/configfs/configfs_internal.h
+++ b/fs/configfs/configfs_internal.h
@@ -69,14 +69,13 @@ extern struct kmem_cache *configfs_dir_cachep;
69extern int configfs_is_root(struct config_item *item); 69extern int configfs_is_root(struct config_item *item);
70 70
71extern struct inode * configfs_new_inode(umode_t mode, struct configfs_dirent *, struct super_block *); 71extern struct inode * configfs_new_inode(umode_t mode, struct configfs_dirent *, struct super_block *);
72extern int configfs_create(struct dentry *, umode_t mode, int (*init)(struct inode *)); 72extern int configfs_create(struct dentry *, umode_t mode, void (*init)(struct inode *));
73 73
74extern int configfs_create_file(struct config_item *, const struct configfs_attribute *); 74extern int configfs_create_file(struct config_item *, const struct configfs_attribute *);
75extern int configfs_make_dirent(struct configfs_dirent *, 75extern int configfs_make_dirent(struct configfs_dirent *,
76 struct dentry *, void *, umode_t, int); 76 struct dentry *, void *, umode_t, int);
77extern int configfs_dirent_is_ready(struct configfs_dirent *); 77extern int configfs_dirent_is_ready(struct configfs_dirent *);
78 78
79extern int configfs_add_file(struct dentry *, const struct configfs_attribute *, int);
80extern void configfs_hash_and_remove(struct dentry * dir, const char * name); 79extern void configfs_hash_and_remove(struct dentry * dir, const char * name);
81 80
82extern const unsigned char * configfs_get_name(struct configfs_dirent *sd); 81extern const unsigned char * configfs_get_name(struct configfs_dirent *sd);
diff --git a/fs/configfs/dir.c b/fs/configfs/dir.c
index c9c298bd3058..cf0db005d2f5 100644
--- a/fs/configfs/dir.c
+++ b/fs/configfs/dir.c
@@ -240,60 +240,26 @@ int configfs_make_dirent(struct configfs_dirent * parent_sd,
240 return 0; 240 return 0;
241} 241}
242 242
243static int init_dir(struct inode * inode) 243static void init_dir(struct inode * inode)
244{ 244{
245 inode->i_op = &configfs_dir_inode_operations; 245 inode->i_op = &configfs_dir_inode_operations;
246 inode->i_fop = &configfs_dir_operations; 246 inode->i_fop = &configfs_dir_operations;
247 247
248 /* directory inodes start off with i_nlink == 2 (for "." entry) */ 248 /* directory inodes start off with i_nlink == 2 (for "." entry) */
249 inc_nlink(inode); 249 inc_nlink(inode);
250 return 0;
251} 250}
252 251
253static int configfs_init_file(struct inode * inode) 252static void configfs_init_file(struct inode * inode)
254{ 253{
255 inode->i_size = PAGE_SIZE; 254 inode->i_size = PAGE_SIZE;
256 inode->i_fop = &configfs_file_operations; 255 inode->i_fop = &configfs_file_operations;
257 return 0;
258} 256}
259 257
260static int init_symlink(struct inode * inode) 258static void init_symlink(struct inode * inode)
261{ 259{
262 inode->i_op = &configfs_symlink_inode_operations; 260 inode->i_op = &configfs_symlink_inode_operations;
263 return 0;
264}
265
266static int create_dir(struct config_item *k, struct dentry *d)
267{
268 int error;
269 umode_t mode = S_IFDIR| S_IRWXU | S_IRUGO | S_IXUGO;
270 struct dentry *p = d->d_parent;
271
272 BUG_ON(!k);
273
274 error = configfs_dirent_exists(p->d_fsdata, d->d_name.name);
275 if (!error)
276 error = configfs_make_dirent(p->d_fsdata, d, k, mode,
277 CONFIGFS_DIR | CONFIGFS_USET_CREATING);
278 if (!error) {
279 configfs_set_dir_dirent_depth(p->d_fsdata, d->d_fsdata);
280 error = configfs_create(d, mode, init_dir);
281 if (!error) {
282 inc_nlink(p->d_inode);
283 } else {
284 struct configfs_dirent *sd = d->d_fsdata;
285 if (sd) {
286 spin_lock(&configfs_dirent_lock);
287 list_del_init(&sd->s_sibling);
288 spin_unlock(&configfs_dirent_lock);
289 configfs_put(sd);
290 }
291 }
292 }
293 return error;
294} 261}
295 262
296
297/** 263/**
298 * configfs_create_dir - create a directory for an config_item. 264 * configfs_create_dir - create a directory for an config_item.
299 * @item: config_itemwe're creating directory for. 265 * @item: config_itemwe're creating directory for.
@@ -303,11 +269,37 @@ static int create_dir(struct config_item *k, struct dentry *d)
303 * until it is validated by configfs_dir_set_ready() 269 * until it is validated by configfs_dir_set_ready()
304 */ 270 */
305 271
306static int configfs_create_dir(struct config_item * item, struct dentry *dentry) 272static int configfs_create_dir(struct config_item *item, struct dentry *dentry)
307{ 273{
308 int error = create_dir(item, dentry); 274 int error;
309 if (!error) 275 umode_t mode = S_IFDIR| S_IRWXU | S_IRUGO | S_IXUGO;
276 struct dentry *p = dentry->d_parent;
277
278 BUG_ON(!item);
279
280 error = configfs_dirent_exists(p->d_fsdata, dentry->d_name.name);
281 if (unlikely(error))
282 return error;
283
284 error = configfs_make_dirent(p->d_fsdata, dentry, item, mode,
285 CONFIGFS_DIR | CONFIGFS_USET_CREATING);
286 if (unlikely(error))
287 return error;
288
289 configfs_set_dir_dirent_depth(p->d_fsdata, dentry->d_fsdata);
290 error = configfs_create(dentry, mode, init_dir);
291 if (!error) {
292 inc_nlink(p->d_inode);
310 item->ci_dentry = dentry; 293 item->ci_dentry = dentry;
294 } else {
295 struct configfs_dirent *sd = dentry->d_fsdata;
296 if (sd) {
297 spin_lock(&configfs_dirent_lock);
298 list_del_init(&sd->s_sibling);
299 spin_unlock(&configfs_dirent_lock);
300 configfs_put(sd);
301 }
302 }
311 return error; 303 return error;
312} 304}
313 305
diff --git a/fs/configfs/file.c b/fs/configfs/file.c
index 1d1c41f1014d..56d2cdc9ae0a 100644
--- a/fs/configfs/file.c
+++ b/fs/configfs/file.c
@@ -313,21 +313,6 @@ const struct file_operations configfs_file_operations = {
313 .release = configfs_release, 313 .release = configfs_release,
314}; 314};
315 315
316
317int configfs_add_file(struct dentry * dir, const struct configfs_attribute * attr, int type)
318{
319 struct configfs_dirent * parent_sd = dir->d_fsdata;
320 umode_t mode = (attr->ca_mode & S_IALLUGO) | S_IFREG;
321 int error = 0;
322
323 mutex_lock_nested(&dir->d_inode->i_mutex, I_MUTEX_NORMAL);
324 error = configfs_make_dirent(parent_sd, NULL, (void *) attr, mode, type);
325 mutex_unlock(&dir->d_inode->i_mutex);
326
327 return error;
328}
329
330
331/** 316/**
332 * configfs_create_file - create an attribute file for an item. 317 * configfs_create_file - create an attribute file for an item.
333 * @item: item we're creating for. 318 * @item: item we're creating for.
@@ -336,9 +321,16 @@ int configfs_add_file(struct dentry * dir, const struct configfs_attribute * att
336 321
337int configfs_create_file(struct config_item * item, const struct configfs_attribute * attr) 322int configfs_create_file(struct config_item * item, const struct configfs_attribute * attr)
338{ 323{
339 BUG_ON(!item || !item->ci_dentry || !attr); 324 struct dentry *dir = item->ci_dentry;
325 struct configfs_dirent *parent_sd = dir->d_fsdata;
326 umode_t mode = (attr->ca_mode & S_IALLUGO) | S_IFREG;
327 int error = 0;
340 328
341 return configfs_add_file(item->ci_dentry, attr, 329 mutex_lock_nested(&dir->d_inode->i_mutex, I_MUTEX_NORMAL);
342 CONFIGFS_ITEM_ATTR); 330 error = configfs_make_dirent(parent_sd, NULL, (void *) attr, mode,
331 CONFIGFS_ITEM_ATTR);
332 mutex_unlock(&dir->d_inode->i_mutex);
333
334 return error;
343} 335}
344 336
diff --git a/fs/configfs/inode.c b/fs/configfs/inode.c
index 65af86147154..5423a6a6ecc8 100644
--- a/fs/configfs/inode.c
+++ b/fs/configfs/inode.c
@@ -176,7 +176,7 @@ static void configfs_set_inode_lock_class(struct configfs_dirent *sd,
176 176
177#endif /* CONFIG_LOCKDEP */ 177#endif /* CONFIG_LOCKDEP */
178 178
179int configfs_create(struct dentry * dentry, umode_t mode, int (*init)(struct inode *)) 179int configfs_create(struct dentry * dentry, umode_t mode, void (*init)(struct inode *))
180{ 180{
181 int error = 0; 181 int error = 0;
182 struct inode *inode = NULL; 182 struct inode *inode = NULL;
@@ -198,13 +198,7 @@ int configfs_create(struct dentry * dentry, umode_t mode, int (*init)(struct ino
198 p_inode->i_mtime = p_inode->i_ctime = CURRENT_TIME; 198 p_inode->i_mtime = p_inode->i_ctime = CURRENT_TIME;
199 configfs_set_inode_lock_class(sd, inode); 199 configfs_set_inode_lock_class(sd, inode);
200 200
201 if (init) { 201 init(inode);
202 error = init(inode);
203 if (error) {
204 iput(inode);
205 return error;
206 }
207 }
208 d_instantiate(dentry, inode); 202 d_instantiate(dentry, inode);
209 if (S_ISDIR(mode) || S_ISLNK(mode)) 203 if (S_ISDIR(mode) || S_ISLNK(mode))
210 dget(dentry); /* pin link and directory dentries in core */ 204 dget(dentry); /* pin link and directory dentries in core */
@@ -242,7 +236,7 @@ void configfs_drop_dentry(struct configfs_dirent * sd, struct dentry * parent)
242 236
243 if (dentry) { 237 if (dentry) {
244 spin_lock(&dentry->d_lock); 238 spin_lock(&dentry->d_lock);
245 if (!(d_unhashed(dentry) && dentry->d_inode)) { 239 if (!d_unhashed(dentry) && dentry->d_inode) {
246 dget_dlock(dentry); 240 dget_dlock(dentry);
247 __d_drop(dentry); 241 __d_drop(dentry);
248 spin_unlock(&dentry->d_lock); 242 spin_unlock(&dentry->d_lock);
diff --git a/fs/coredump.c b/fs/coredump.c
index b5c86ffd5033..f319926ddf8c 100644
--- a/fs/coredump.c
+++ b/fs/coredump.c
@@ -572,7 +572,7 @@ void do_coredump(const siginfo_t *siginfo)
572 * 572 *
573 * Normally core limits are irrelevant to pipes, since 573 * Normally core limits are irrelevant to pipes, since
574 * we're not writing to the file system, but we use 574 * we're not writing to the file system, but we use
575 * cprm.limit of 1 here as a speacial value, this is a 575 * cprm.limit of 1 here as a special value, this is a
576 * consistent way to catch recursive crashes. 576 * consistent way to catch recursive crashes.
577 * We can still crash if the core_pattern binary sets 577 * We can still crash if the core_pattern binary sets
578 * RLIM_CORE = !1, but it runs as root, and can do 578 * RLIM_CORE = !1, but it runs as root, and can do
diff --git a/fs/dcache.c b/fs/dcache.c
index dc400fd29f4d..c71e3732e53b 100644
--- a/fs/dcache.c
+++ b/fs/dcache.c
@@ -1659,9 +1659,25 @@ void d_set_d_op(struct dentry *dentry, const struct dentry_operations *op)
1659} 1659}
1660EXPORT_SYMBOL(d_set_d_op); 1660EXPORT_SYMBOL(d_set_d_op);
1661 1661
1662
1663/*
1664 * d_set_fallthru - Mark a dentry as falling through to a lower layer
1665 * @dentry - The dentry to mark
1666 *
1667 * Mark a dentry as falling through to the lower layer (as set with
1668 * d_pin_lower()). This flag may be recorded on the medium.
1669 */
1670void d_set_fallthru(struct dentry *dentry)
1671{
1672 spin_lock(&dentry->d_lock);
1673 dentry->d_flags |= DCACHE_FALLTHRU;
1674 spin_unlock(&dentry->d_lock);
1675}
1676EXPORT_SYMBOL(d_set_fallthru);
1677
1662static unsigned d_flags_for_inode(struct inode *inode) 1678static unsigned d_flags_for_inode(struct inode *inode)
1663{ 1679{
1664 unsigned add_flags = DCACHE_FILE_TYPE; 1680 unsigned add_flags = DCACHE_REGULAR_TYPE;
1665 1681
1666 if (!inode) 1682 if (!inode)
1667 return DCACHE_MISS_TYPE; 1683 return DCACHE_MISS_TYPE;
@@ -1674,13 +1690,21 @@ static unsigned d_flags_for_inode(struct inode *inode)
1674 else 1690 else
1675 inode->i_opflags |= IOP_LOOKUP; 1691 inode->i_opflags |= IOP_LOOKUP;
1676 } 1692 }
1677 } else if (unlikely(!(inode->i_opflags & IOP_NOFOLLOW))) { 1693 goto type_determined;
1678 if (unlikely(inode->i_op->follow_link)) 1694 }
1695
1696 if (unlikely(!(inode->i_opflags & IOP_NOFOLLOW))) {
1697 if (unlikely(inode->i_op->follow_link)) {
1679 add_flags = DCACHE_SYMLINK_TYPE; 1698 add_flags = DCACHE_SYMLINK_TYPE;
1680 else 1699 goto type_determined;
1681 inode->i_opflags |= IOP_NOFOLLOW; 1700 }
1701 inode->i_opflags |= IOP_NOFOLLOW;
1682 } 1702 }
1683 1703
1704 if (unlikely(!S_ISREG(inode->i_mode)))
1705 add_flags = DCACHE_SPECIAL_TYPE;
1706
1707type_determined:
1684 if (unlikely(IS_AUTOMOUNT(inode))) 1708 if (unlikely(IS_AUTOMOUNT(inode)))
1685 add_flags |= DCACHE_NEED_AUTOMOUNT; 1709 add_flags |= DCACHE_NEED_AUTOMOUNT;
1686 return add_flags; 1710 return add_flags;
@@ -1691,7 +1715,8 @@ static void __d_instantiate(struct dentry *dentry, struct inode *inode)
1691 unsigned add_flags = d_flags_for_inode(inode); 1715 unsigned add_flags = d_flags_for_inode(inode);
1692 1716
1693 spin_lock(&dentry->d_lock); 1717 spin_lock(&dentry->d_lock);
1694 __d_set_type(dentry, add_flags); 1718 dentry->d_flags &= ~(DCACHE_ENTRY_TYPE | DCACHE_FALLTHRU);
1719 dentry->d_flags |= add_flags;
1695 if (inode) 1720 if (inode)
1696 hlist_add_head(&dentry->d_u.d_alias, &inode->i_dentry); 1721 hlist_add_head(&dentry->d_u.d_alias, &inode->i_dentry);
1697 dentry->d_inode = inode; 1722 dentry->d_inode = inode;
diff --git a/fs/debugfs/inode.c b/fs/debugfs/inode.c
index 45b18a5e225c..96400ab42d13 100644
--- a/fs/debugfs/inode.c
+++ b/fs/debugfs/inode.c
@@ -169,10 +169,19 @@ static int debugfs_show_options(struct seq_file *m, struct dentry *root)
169 return 0; 169 return 0;
170} 170}
171 171
172static void debugfs_evict_inode(struct inode *inode)
173{
174 truncate_inode_pages_final(&inode->i_data);
175 clear_inode(inode);
176 if (S_ISLNK(inode->i_mode))
177 kfree(inode->i_private);
178}
179
172static const struct super_operations debugfs_super_operations = { 180static const struct super_operations debugfs_super_operations = {
173 .statfs = simple_statfs, 181 .statfs = simple_statfs,
174 .remount_fs = debugfs_remount, 182 .remount_fs = debugfs_remount,
175 .show_options = debugfs_show_options, 183 .show_options = debugfs_show_options,
184 .evict_inode = debugfs_evict_inode,
176}; 185};
177 186
178static struct vfsmount *debugfs_automount(struct path *path) 187static struct vfsmount *debugfs_automount(struct path *path)
@@ -511,23 +520,14 @@ static int __debugfs_remove(struct dentry *dentry, struct dentry *parent)
511 int ret = 0; 520 int ret = 0;
512 521
513 if (debugfs_positive(dentry)) { 522 if (debugfs_positive(dentry)) {
514 if (dentry->d_inode) { 523 dget(dentry);
515 dget(dentry); 524 if (S_ISDIR(dentry->d_inode->i_mode))
516 switch (dentry->d_inode->i_mode & S_IFMT) { 525 ret = simple_rmdir(parent->d_inode, dentry);
517 case S_IFDIR: 526 else
518 ret = simple_rmdir(parent->d_inode, dentry); 527 simple_unlink(parent->d_inode, dentry);
519 break; 528 if (!ret)
520 case S_IFLNK: 529 d_delete(dentry);
521 kfree(dentry->d_inode->i_private); 530 dput(dentry);
522 /* fall through */
523 default:
524 simple_unlink(parent->d_inode, dentry);
525 break;
526 }
527 if (!ret)
528 d_delete(dentry);
529 dput(dentry);
530 }
531 } 531 }
532 return ret; 532 return ret;
533} 533}
@@ -690,7 +690,7 @@ struct dentry *debugfs_rename(struct dentry *old_dir, struct dentry *old_dentry,
690 } 690 }
691 d_move(old_dentry, dentry); 691 d_move(old_dentry, dentry);
692 fsnotify_move(old_dir->d_inode, new_dir->d_inode, old_name, 692 fsnotify_move(old_dir->d_inode, new_dir->d_inode, old_name,
693 S_ISDIR(old_dentry->d_inode->i_mode), 693 d_is_dir(old_dentry),
694 NULL, old_dentry); 694 NULL, old_dentry);
695 fsnotify_oldname_free(old_name); 695 fsnotify_oldname_free(old_name);
696 unlock_rename(new_dir, old_dir); 696 unlock_rename(new_dir, old_dir);
diff --git a/fs/ecryptfs/ecryptfs_kernel.h b/fs/ecryptfs/ecryptfs_kernel.h
index 90d1882b306f..5ba029e627cc 100644
--- a/fs/ecryptfs/ecryptfs_kernel.h
+++ b/fs/ecryptfs/ecryptfs_kernel.h
@@ -124,7 +124,7 @@ ecryptfs_get_key_payload_data(struct key *key)
124} 124}
125 125
126#define ECRYPTFS_MAX_KEYSET_SIZE 1024 126#define ECRYPTFS_MAX_KEYSET_SIZE 1024
127#define ECRYPTFS_MAX_CIPHER_NAME_SIZE 32 127#define ECRYPTFS_MAX_CIPHER_NAME_SIZE 31
128#define ECRYPTFS_MAX_NUM_ENC_KEYS 64 128#define ECRYPTFS_MAX_NUM_ENC_KEYS 64
129#define ECRYPTFS_MAX_IV_BYTES 16 /* 128 bits */ 129#define ECRYPTFS_MAX_IV_BYTES 16 /* 128 bits */
130#define ECRYPTFS_SALT_BYTES 2 130#define ECRYPTFS_SALT_BYTES 2
@@ -237,7 +237,7 @@ struct ecryptfs_crypt_stat {
237 struct crypto_ablkcipher *tfm; 237 struct crypto_ablkcipher *tfm;
238 struct crypto_hash *hash_tfm; /* Crypto context for generating 238 struct crypto_hash *hash_tfm; /* Crypto context for generating
239 * the initialization vectors */ 239 * the initialization vectors */
240 unsigned char cipher[ECRYPTFS_MAX_CIPHER_NAME_SIZE]; 240 unsigned char cipher[ECRYPTFS_MAX_CIPHER_NAME_SIZE + 1];
241 unsigned char key[ECRYPTFS_MAX_KEY_BYTES]; 241 unsigned char key[ECRYPTFS_MAX_KEY_BYTES];
242 unsigned char root_iv[ECRYPTFS_MAX_IV_BYTES]; 242 unsigned char root_iv[ECRYPTFS_MAX_IV_BYTES];
243 struct list_head keysig_list; 243 struct list_head keysig_list;
diff --git a/fs/ecryptfs/file.c b/fs/ecryptfs/file.c
index 6f4e659f508f..fd39bad6f1bd 100644
--- a/fs/ecryptfs/file.c
+++ b/fs/ecryptfs/file.c
@@ -230,7 +230,7 @@ static int ecryptfs_open(struct inode *inode, struct file *file)
230 } 230 }
231 ecryptfs_set_file_lower( 231 ecryptfs_set_file_lower(
232 file, ecryptfs_inode_to_private(inode)->lower_file); 232 file, ecryptfs_inode_to_private(inode)->lower_file);
233 if (S_ISDIR(ecryptfs_dentry->d_inode->i_mode)) { 233 if (d_is_dir(ecryptfs_dentry)) {
234 ecryptfs_printk(KERN_DEBUG, "This is a directory\n"); 234 ecryptfs_printk(KERN_DEBUG, "This is a directory\n");
235 mutex_lock(&crypt_stat->cs_mutex); 235 mutex_lock(&crypt_stat->cs_mutex);
236 crypt_stat->flags &= ~(ECRYPTFS_ENCRYPTED); 236 crypt_stat->flags &= ~(ECRYPTFS_ENCRYPTED);
@@ -303,9 +303,22 @@ ecryptfs_unlocked_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
303 struct file *lower_file = ecryptfs_file_to_lower(file); 303 struct file *lower_file = ecryptfs_file_to_lower(file);
304 long rc = -ENOTTY; 304 long rc = -ENOTTY;
305 305
306 if (lower_file->f_op->unlocked_ioctl) 306 if (!lower_file->f_op->unlocked_ioctl)
307 return rc;
308
309 switch (cmd) {
310 case FITRIM:
311 case FS_IOC_GETFLAGS:
312 case FS_IOC_SETFLAGS:
313 case FS_IOC_GETVERSION:
314 case FS_IOC_SETVERSION:
307 rc = lower_file->f_op->unlocked_ioctl(lower_file, cmd, arg); 315 rc = lower_file->f_op->unlocked_ioctl(lower_file, cmd, arg);
308 return rc; 316 fsstack_copy_attr_all(file_inode(file), file_inode(lower_file));
317
318 return rc;
319 default:
320 return rc;
321 }
309} 322}
310 323
311#ifdef CONFIG_COMPAT 324#ifdef CONFIG_COMPAT
@@ -315,9 +328,22 @@ ecryptfs_compat_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
315 struct file *lower_file = ecryptfs_file_to_lower(file); 328 struct file *lower_file = ecryptfs_file_to_lower(file);
316 long rc = -ENOIOCTLCMD; 329 long rc = -ENOIOCTLCMD;
317 330
318 if (lower_file->f_op->compat_ioctl) 331 if (!lower_file->f_op->compat_ioctl)
332 return rc;
333
334 switch (cmd) {
335 case FITRIM:
336 case FS_IOC32_GETFLAGS:
337 case FS_IOC32_SETFLAGS:
338 case FS_IOC32_GETVERSION:
339 case FS_IOC32_SETVERSION:
319 rc = lower_file->f_op->compat_ioctl(lower_file, cmd, arg); 340 rc = lower_file->f_op->compat_ioctl(lower_file, cmd, arg);
320 return rc; 341 fsstack_copy_attr_all(file_inode(file), file_inode(lower_file));
342
343 return rc;
344 default:
345 return rc;
346 }
321} 347}
322#endif 348#endif
323 349
diff --git a/fs/ecryptfs/inode.c b/fs/ecryptfs/inode.c
index 34b36a504059..b08b5187f662 100644
--- a/fs/ecryptfs/inode.c
+++ b/fs/ecryptfs/inode.c
@@ -907,9 +907,9 @@ static int ecryptfs_setattr(struct dentry *dentry, struct iattr *ia)
907 lower_inode = ecryptfs_inode_to_lower(inode); 907 lower_inode = ecryptfs_inode_to_lower(inode);
908 lower_dentry = ecryptfs_dentry_to_lower(dentry); 908 lower_dentry = ecryptfs_dentry_to_lower(dentry);
909 mutex_lock(&crypt_stat->cs_mutex); 909 mutex_lock(&crypt_stat->cs_mutex);
910 if (S_ISDIR(dentry->d_inode->i_mode)) 910 if (d_is_dir(dentry))
911 crypt_stat->flags &= ~(ECRYPTFS_ENCRYPTED); 911 crypt_stat->flags &= ~(ECRYPTFS_ENCRYPTED);
912 else if (S_ISREG(dentry->d_inode->i_mode) 912 else if (d_is_reg(dentry)
913 && (!(crypt_stat->flags & ECRYPTFS_POLICY_APPLIED) 913 && (!(crypt_stat->flags & ECRYPTFS_POLICY_APPLIED)
914 || !(crypt_stat->flags & ECRYPTFS_KEY_VALID))) { 914 || !(crypt_stat->flags & ECRYPTFS_KEY_VALID))) {
915 struct ecryptfs_mount_crypt_stat *mount_crypt_stat; 915 struct ecryptfs_mount_crypt_stat *mount_crypt_stat;
diff --git a/fs/ecryptfs/keystore.c b/fs/ecryptfs/keystore.c
index 917bd5c9776a..6bd67e2011f0 100644
--- a/fs/ecryptfs/keystore.c
+++ b/fs/ecryptfs/keystore.c
@@ -891,7 +891,7 @@ struct ecryptfs_parse_tag_70_packet_silly_stack {
891 struct blkcipher_desc desc; 891 struct blkcipher_desc desc;
892 char fnek_sig_hex[ECRYPTFS_SIG_SIZE_HEX + 1]; 892 char fnek_sig_hex[ECRYPTFS_SIG_SIZE_HEX + 1];
893 char iv[ECRYPTFS_MAX_IV_BYTES]; 893 char iv[ECRYPTFS_MAX_IV_BYTES];
894 char cipher_string[ECRYPTFS_MAX_CIPHER_NAME_SIZE]; 894 char cipher_string[ECRYPTFS_MAX_CIPHER_NAME_SIZE + 1];
895}; 895};
896 896
897/** 897/**
diff --git a/fs/ecryptfs/main.c b/fs/ecryptfs/main.c
index 1895d60f4122..c095d3264259 100644
--- a/fs/ecryptfs/main.c
+++ b/fs/ecryptfs/main.c
@@ -407,7 +407,7 @@ static int ecryptfs_parse_options(struct ecryptfs_sb_info *sbi, char *options,
407 if (!cipher_name_set) { 407 if (!cipher_name_set) {
408 int cipher_name_len = strlen(ECRYPTFS_DEFAULT_CIPHER); 408 int cipher_name_len = strlen(ECRYPTFS_DEFAULT_CIPHER);
409 409
410 BUG_ON(cipher_name_len >= ECRYPTFS_MAX_CIPHER_NAME_SIZE); 410 BUG_ON(cipher_name_len > ECRYPTFS_MAX_CIPHER_NAME_SIZE);
411 strcpy(mount_crypt_stat->global_default_cipher_name, 411 strcpy(mount_crypt_stat->global_default_cipher_name,
412 ECRYPTFS_DEFAULT_CIPHER); 412 ECRYPTFS_DEFAULT_CIPHER);
413 } 413 }
diff --git a/fs/exportfs/expfs.c b/fs/exportfs/expfs.c
index fdfd206c737a..714cd37a6ba3 100644
--- a/fs/exportfs/expfs.c
+++ b/fs/exportfs/expfs.c
@@ -429,7 +429,7 @@ struct dentry *exportfs_decode_fh(struct vfsmount *mnt, struct fid *fid,
429 if (IS_ERR(result)) 429 if (IS_ERR(result))
430 return result; 430 return result;
431 431
432 if (S_ISDIR(result->d_inode->i_mode)) { 432 if (d_is_dir(result)) {
433 /* 433 /*
434 * This request is for a directory. 434 * This request is for a directory.
435 * 435 *
diff --git a/fs/ext4/ext4.h b/fs/ext4/ext4.h
index 982d934fd9ac..f63c3d5805c4 100644
--- a/fs/ext4/ext4.h
+++ b/fs/ext4/ext4.h
@@ -364,7 +364,8 @@ struct flex_groups {
364#define EXT4_DIRTY_FL 0x00000100 364#define EXT4_DIRTY_FL 0x00000100
365#define EXT4_COMPRBLK_FL 0x00000200 /* One or more compressed clusters */ 365#define EXT4_COMPRBLK_FL 0x00000200 /* One or more compressed clusters */
366#define EXT4_NOCOMPR_FL 0x00000400 /* Don't compress */ 366#define EXT4_NOCOMPR_FL 0x00000400 /* Don't compress */
367#define EXT4_ECOMPR_FL 0x00000800 /* Compression error */ 367 /* nb: was previously EXT2_ECOMPR_FL */
368#define EXT4_ENCRYPT_FL 0x00000800 /* encrypted file */
368/* End compression flags --- maybe not all used */ 369/* End compression flags --- maybe not all used */
369#define EXT4_INDEX_FL 0x00001000 /* hash-indexed directory */ 370#define EXT4_INDEX_FL 0x00001000 /* hash-indexed directory */
370#define EXT4_IMAGIC_FL 0x00002000 /* AFS directory */ 371#define EXT4_IMAGIC_FL 0x00002000 /* AFS directory */
@@ -421,7 +422,7 @@ enum {
421 EXT4_INODE_DIRTY = 8, 422 EXT4_INODE_DIRTY = 8,
422 EXT4_INODE_COMPRBLK = 9, /* One or more compressed clusters */ 423 EXT4_INODE_COMPRBLK = 9, /* One or more compressed clusters */
423 EXT4_INODE_NOCOMPR = 10, /* Don't compress */ 424 EXT4_INODE_NOCOMPR = 10, /* Don't compress */
424 EXT4_INODE_ECOMPR = 11, /* Compression error */ 425 EXT4_INODE_ENCRYPT = 11, /* Compression error */
425/* End compression flags --- maybe not all used */ 426/* End compression flags --- maybe not all used */
426 EXT4_INODE_INDEX = 12, /* hash-indexed directory */ 427 EXT4_INODE_INDEX = 12, /* hash-indexed directory */
427 EXT4_INODE_IMAGIC = 13, /* AFS directory */ 428 EXT4_INODE_IMAGIC = 13, /* AFS directory */
@@ -466,7 +467,7 @@ static inline void ext4_check_flag_values(void)
466 CHECK_FLAG_VALUE(DIRTY); 467 CHECK_FLAG_VALUE(DIRTY);
467 CHECK_FLAG_VALUE(COMPRBLK); 468 CHECK_FLAG_VALUE(COMPRBLK);
468 CHECK_FLAG_VALUE(NOCOMPR); 469 CHECK_FLAG_VALUE(NOCOMPR);
469 CHECK_FLAG_VALUE(ECOMPR); 470 CHECK_FLAG_VALUE(ENCRYPT);
470 CHECK_FLAG_VALUE(INDEX); 471 CHECK_FLAG_VALUE(INDEX);
471 CHECK_FLAG_VALUE(IMAGIC); 472 CHECK_FLAG_VALUE(IMAGIC);
472 CHECK_FLAG_VALUE(JOURNAL_DATA); 473 CHECK_FLAG_VALUE(JOURNAL_DATA);
@@ -1048,6 +1049,12 @@ extern void ext4_set_bits(void *bm, int cur, int len);
1048/* Metadata checksum algorithm codes */ 1049/* Metadata checksum algorithm codes */
1049#define EXT4_CRC32C_CHKSUM 1 1050#define EXT4_CRC32C_CHKSUM 1
1050 1051
1052/* Encryption algorithms */
1053#define EXT4_ENCRYPTION_MODE_INVALID 0
1054#define EXT4_ENCRYPTION_MODE_AES_256_XTS 1
1055#define EXT4_ENCRYPTION_MODE_AES_256_GCM 2
1056#define EXT4_ENCRYPTION_MODE_AES_256_CBC 3
1057
1051/* 1058/*
1052 * Structure of the super block 1059 * Structure of the super block
1053 */ 1060 */
@@ -1161,7 +1168,8 @@ struct ext4_super_block {
1161 __le32 s_grp_quota_inum; /* inode for tracking group quota */ 1168 __le32 s_grp_quota_inum; /* inode for tracking group quota */
1162 __le32 s_overhead_clusters; /* overhead blocks/clusters in fs */ 1169 __le32 s_overhead_clusters; /* overhead blocks/clusters in fs */
1163 __le32 s_backup_bgs[2]; /* groups with sparse_super2 SBs */ 1170 __le32 s_backup_bgs[2]; /* groups with sparse_super2 SBs */
1164 __le32 s_reserved[106]; /* Padding to the end of the block */ 1171 __u8 s_encrypt_algos[4]; /* Encryption algorithms in use */
1172 __le32 s_reserved[105]; /* Padding to the end of the block */
1165 __le32 s_checksum; /* crc32c(superblock) */ 1173 __le32 s_checksum; /* crc32c(superblock) */
1166}; 1174};
1167 1175
@@ -1527,6 +1535,7 @@ static inline void ext4_clear_state_flags(struct ext4_inode_info *ei)
1527 * GDT_CSUM bits are mutually exclusive. 1535 * GDT_CSUM bits are mutually exclusive.
1528 */ 1536 */
1529#define EXT4_FEATURE_RO_COMPAT_METADATA_CSUM 0x0400 1537#define EXT4_FEATURE_RO_COMPAT_METADATA_CSUM 0x0400
1538#define EXT4_FEATURE_RO_COMPAT_READONLY 0x1000
1530 1539
1531#define EXT4_FEATURE_INCOMPAT_COMPRESSION 0x0001 1540#define EXT4_FEATURE_INCOMPAT_COMPRESSION 0x0001
1532#define EXT4_FEATURE_INCOMPAT_FILETYPE 0x0002 1541#define EXT4_FEATURE_INCOMPAT_FILETYPE 0x0002
@@ -1542,6 +1551,7 @@ static inline void ext4_clear_state_flags(struct ext4_inode_info *ei)
1542#define EXT4_FEATURE_INCOMPAT_BG_USE_META_CSUM 0x2000 /* use crc32c for bg */ 1551#define EXT4_FEATURE_INCOMPAT_BG_USE_META_CSUM 0x2000 /* use crc32c for bg */
1543#define EXT4_FEATURE_INCOMPAT_LARGEDIR 0x4000 /* >2GB or 3-lvl htree */ 1552#define EXT4_FEATURE_INCOMPAT_LARGEDIR 0x4000 /* >2GB or 3-lvl htree */
1544#define EXT4_FEATURE_INCOMPAT_INLINE_DATA 0x8000 /* data in inode */ 1553#define EXT4_FEATURE_INCOMPAT_INLINE_DATA 0x8000 /* data in inode */
1554#define EXT4_FEATURE_INCOMPAT_ENCRYPT 0x10000
1545 1555
1546#define EXT2_FEATURE_COMPAT_SUPP EXT4_FEATURE_COMPAT_EXT_ATTR 1556#define EXT2_FEATURE_COMPAT_SUPP EXT4_FEATURE_COMPAT_EXT_ATTR
1547#define EXT2_FEATURE_INCOMPAT_SUPP (EXT4_FEATURE_INCOMPAT_FILETYPE| \ 1557#define EXT2_FEATURE_INCOMPAT_SUPP (EXT4_FEATURE_INCOMPAT_FILETYPE| \
diff --git a/fs/ext4/indirect.c b/fs/ext4/indirect.c
index 6b9878a24182..45fe924f82bc 100644
--- a/fs/ext4/indirect.c
+++ b/fs/ext4/indirect.c
@@ -1401,10 +1401,7 @@ end_range:
1401 * to free. Everything was covered by the start 1401 * to free. Everything was covered by the start
1402 * of the range. 1402 * of the range.
1403 */ 1403 */
1404 return 0; 1404 goto do_indirects;
1405 } else {
1406 /* Shared branch grows from an indirect block */
1407 partial2--;
1408 } 1405 }
1409 } else { 1406 } else {
1410 /* 1407 /*
@@ -1435,56 +1432,96 @@ end_range:
1435 /* Punch happened within the same level (n == n2) */ 1432 /* Punch happened within the same level (n == n2) */
1436 partial = ext4_find_shared(inode, n, offsets, chain, &nr); 1433 partial = ext4_find_shared(inode, n, offsets, chain, &nr);
1437 partial2 = ext4_find_shared(inode, n2, offsets2, chain2, &nr2); 1434 partial2 = ext4_find_shared(inode, n2, offsets2, chain2, &nr2);
1438 /* 1435
1439 * ext4_find_shared returns Indirect structure which 1436 /* Free top, but only if partial2 isn't its subtree. */
1440 * points to the last element which should not be 1437 if (nr) {
1441 * removed by truncate. But this is end of the range 1438 int level = min(partial - chain, partial2 - chain2);
1442 * in punch_hole so we need to point to the next element 1439 int i;
1443 */ 1440 int subtree = 1;
1444 partial2->p++; 1441
1445 while ((partial > chain) || (partial2 > chain2)) { 1442 for (i = 0; i <= level; i++) {
1446 /* We're at the same block, so we're almost finished */ 1443 if (offsets[i] != offsets2[i]) {
1447 if ((partial->bh && partial2->bh) && 1444 subtree = 0;
1448 (partial->bh->b_blocknr == partial2->bh->b_blocknr)) { 1445 break;
1449 if ((partial > chain) && (partial2 > chain2)) { 1446 }
1447 }
1448
1449 if (!subtree) {
1450 if (partial == chain) {
1451 /* Shared branch grows from the inode */
1452 ext4_free_branches(handle, inode, NULL,
1453 &nr, &nr+1,
1454 (chain+n-1) - partial);
1455 *partial->p = 0;
1456 } else {
1457 /* Shared branch grows from an indirect block */
1458 BUFFER_TRACE(partial->bh, "get_write_access");
1450 ext4_free_branches(handle, inode, partial->bh, 1459 ext4_free_branches(handle, inode, partial->bh,
1451 partial->p + 1, 1460 partial->p,
1452 partial2->p, 1461 partial->p+1,
1453 (chain+n-1) - partial); 1462 (chain+n-1) - partial);
1454 BUFFER_TRACE(partial->bh, "call brelse");
1455 brelse(partial->bh);
1456 BUFFER_TRACE(partial2->bh, "call brelse");
1457 brelse(partial2->bh);
1458 } 1463 }
1459 return 0;
1460 } 1464 }
1465 }
1466
1467 if (!nr2) {
1461 /* 1468 /*
1462 * Clear the ends of indirect blocks on the shared branch 1469 * ext4_find_shared returns Indirect structure which
1463 * at the start of the range 1470 * points to the last element which should not be
1471 * removed by truncate. But this is end of the range
1472 * in punch_hole so we need to point to the next element
1464 */ 1473 */
1465 if (partial > chain) { 1474 partial2->p++;
1475 }
1476
1477 while (partial > chain || partial2 > chain2) {
1478 int depth = (chain+n-1) - partial;
1479 int depth2 = (chain2+n2-1) - partial2;
1480
1481 if (partial > chain && partial2 > chain2 &&
1482 partial->bh->b_blocknr == partial2->bh->b_blocknr) {
1483 /*
1484 * We've converged on the same block. Clear the range,
1485 * then we're done.
1486 */
1466 ext4_free_branches(handle, inode, partial->bh, 1487 ext4_free_branches(handle, inode, partial->bh,
1467 partial->p + 1, 1488 partial->p + 1,
1468 (__le32 *)partial->bh->b_data+addr_per_block, 1489 partial2->p,
1469 (chain+n-1) - partial); 1490 (chain+n-1) - partial);
1470 BUFFER_TRACE(partial->bh, "call brelse"); 1491 BUFFER_TRACE(partial->bh, "call brelse");
1471 brelse(partial->bh); 1492 brelse(partial->bh);
1472 partial--; 1493 BUFFER_TRACE(partial2->bh, "call brelse");
1494 brelse(partial2->bh);
1495 return 0;
1473 } 1496 }
1497
1474 /* 1498 /*
1475 * Clear the ends of indirect blocks on the shared branch 1499 * The start and end partial branches may not be at the same
1476 * at the end of the range 1500 * level even though the punch happened within one level. So, we
1501 * give them a chance to arrive at the same level, then walk
1502 * them in step with each other until we converge on the same
1503 * block.
1477 */ 1504 */
1478 if (partial2 > chain2) { 1505 if (partial > chain && depth <= depth2) {
1506 ext4_free_branches(handle, inode, partial->bh,
1507 partial->p + 1,
1508 (__le32 *)partial->bh->b_data+addr_per_block,
1509 (chain+n-1) - partial);
1510 BUFFER_TRACE(partial->bh, "call brelse");
1511 brelse(partial->bh);
1512 partial--;
1513 }
1514 if (partial2 > chain2 && depth2 <= depth) {
1479 ext4_free_branches(handle, inode, partial2->bh, 1515 ext4_free_branches(handle, inode, partial2->bh,
1480 (__le32 *)partial2->bh->b_data, 1516 (__le32 *)partial2->bh->b_data,
1481 partial2->p, 1517 partial2->p,
1482 (chain2+n-1) - partial2); 1518 (chain2+n2-1) - partial2);
1483 BUFFER_TRACE(partial2->bh, "call brelse"); 1519 BUFFER_TRACE(partial2->bh, "call brelse");
1484 brelse(partial2->bh); 1520 brelse(partial2->bh);
1485 partial2--; 1521 partial2--;
1486 } 1522 }
1487 } 1523 }
1524 return 0;
1488 1525
1489do_indirects: 1526do_indirects:
1490 /* Kill the remaining (whole) subtrees */ 1527 /* Kill the remaining (whole) subtrees */
diff --git a/fs/ext4/inode.c b/fs/ext4/inode.c
index 85404f15e53a..5cb9a212b86f 100644
--- a/fs/ext4/inode.c
+++ b/fs/ext4/inode.c
@@ -1024,6 +1024,7 @@ static int ext4_write_end(struct file *file,
1024{ 1024{
1025 handle_t *handle = ext4_journal_current_handle(); 1025 handle_t *handle = ext4_journal_current_handle();
1026 struct inode *inode = mapping->host; 1026 struct inode *inode = mapping->host;
1027 loff_t old_size = inode->i_size;
1027 int ret = 0, ret2; 1028 int ret = 0, ret2;
1028 int i_size_changed = 0; 1029 int i_size_changed = 0;
1029 1030
@@ -1054,6 +1055,8 @@ static int ext4_write_end(struct file *file,
1054 unlock_page(page); 1055 unlock_page(page);
1055 page_cache_release(page); 1056 page_cache_release(page);
1056 1057
1058 if (old_size < pos)
1059 pagecache_isize_extended(inode, old_size, pos);
1057 /* 1060 /*
1058 * Don't mark the inode dirty under page lock. First, it unnecessarily 1061 * Don't mark the inode dirty under page lock. First, it unnecessarily
1059 * makes the holding time of page lock longer. Second, it forces lock 1062 * makes the holding time of page lock longer. Second, it forces lock
@@ -1095,6 +1098,7 @@ static int ext4_journalled_write_end(struct file *file,
1095{ 1098{
1096 handle_t *handle = ext4_journal_current_handle(); 1099 handle_t *handle = ext4_journal_current_handle();
1097 struct inode *inode = mapping->host; 1100 struct inode *inode = mapping->host;
1101 loff_t old_size = inode->i_size;
1098 int ret = 0, ret2; 1102 int ret = 0, ret2;
1099 int partial = 0; 1103 int partial = 0;
1100 unsigned from, to; 1104 unsigned from, to;
@@ -1127,6 +1131,9 @@ static int ext4_journalled_write_end(struct file *file,
1127 unlock_page(page); 1131 unlock_page(page);
1128 page_cache_release(page); 1132 page_cache_release(page);
1129 1133
1134 if (old_size < pos)
1135 pagecache_isize_extended(inode, old_size, pos);
1136
1130 if (size_changed) { 1137 if (size_changed) {
1131 ret2 = ext4_mark_inode_dirty(handle, inode); 1138 ret2 = ext4_mark_inode_dirty(handle, inode);
1132 if (!ret) 1139 if (!ret)
diff --git a/fs/ext4/super.c b/fs/ext4/super.c
index 1adac6868e6f..e061e66c8280 100644
--- a/fs/ext4/super.c
+++ b/fs/ext4/super.c
@@ -2779,6 +2779,12 @@ static int ext4_feature_set_ok(struct super_block *sb, int readonly)
2779 if (readonly) 2779 if (readonly)
2780 return 1; 2780 return 1;
2781 2781
2782 if (EXT4_HAS_RO_COMPAT_FEATURE(sb, EXT4_FEATURE_RO_COMPAT_READONLY)) {
2783 ext4_msg(sb, KERN_INFO, "filesystem is read-only");
2784 sb->s_flags |= MS_RDONLY;
2785 return 1;
2786 }
2787
2782 /* Check that feature set is OK for a read-write mount */ 2788 /* Check that feature set is OK for a read-write mount */
2783 if (EXT4_HAS_RO_COMPAT_FEATURE(sb, ~EXT4_FEATURE_RO_COMPAT_SUPP)) { 2789 if (EXT4_HAS_RO_COMPAT_FEATURE(sb, ~EXT4_FEATURE_RO_COMPAT_SUPP)) {
2784 ext4_msg(sb, KERN_ERR, "couldn't mount RDWR because of " 2790 ext4_msg(sb, KERN_ERR, "couldn't mount RDWR because of "
@@ -3936,9 +3942,8 @@ static int ext4_fill_super(struct super_block *sb, void *data, int silent)
3936 get_random_bytes(&sbi->s_next_generation, sizeof(u32)); 3942 get_random_bytes(&sbi->s_next_generation, sizeof(u32));
3937 spin_lock_init(&sbi->s_next_gen_lock); 3943 spin_lock_init(&sbi->s_next_gen_lock);
3938 3944
3939 init_timer(&sbi->s_err_report); 3945 setup_timer(&sbi->s_err_report, print_daily_error_info,
3940 sbi->s_err_report.function = print_daily_error_info; 3946 (unsigned long) sb);
3941 sbi->s_err_report.data = (unsigned long) sb;
3942 3947
3943 /* Register extent status tree shrinker */ 3948 /* Register extent status tree shrinker */
3944 if (ext4_es_register_shrinker(sbi)) 3949 if (ext4_es_register_shrinker(sbi))
@@ -4866,9 +4871,6 @@ static int ext4_remount(struct super_block *sb, int *flags, char *data)
4866 if (sbi->s_journal && sbi->s_journal->j_task->io_context) 4871 if (sbi->s_journal && sbi->s_journal->j_task->io_context)
4867 journal_ioprio = sbi->s_journal->j_task->io_context->ioprio; 4872 journal_ioprio = sbi->s_journal->j_task->io_context->ioprio;
4868 4873
4869 /*
4870 * Allow the "check" option to be passed as a remount option.
4871 */
4872 if (!parse_options(data, sb, NULL, &journal_ioprio, 1)) { 4874 if (!parse_options(data, sb, NULL, &journal_ioprio, 1)) {
4873 err = -EINVAL; 4875 err = -EINVAL;
4874 goto restore_opts; 4876 goto restore_opts;
@@ -4877,17 +4879,8 @@ static int ext4_remount(struct super_block *sb, int *flags, char *data)
4877 if ((old_opts.s_mount_opt & EXT4_MOUNT_JOURNAL_CHECKSUM) ^ 4879 if ((old_opts.s_mount_opt & EXT4_MOUNT_JOURNAL_CHECKSUM) ^
4878 test_opt(sb, JOURNAL_CHECKSUM)) { 4880 test_opt(sb, JOURNAL_CHECKSUM)) {
4879 ext4_msg(sb, KERN_ERR, "changing journal_checksum " 4881 ext4_msg(sb, KERN_ERR, "changing journal_checksum "
4880 "during remount not supported"); 4882 "during remount not supported; ignoring");
4881 err = -EINVAL; 4883 sbi->s_mount_opt ^= EXT4_MOUNT_JOURNAL_CHECKSUM;
4882 goto restore_opts;
4883 }
4884
4885 if ((old_opts.s_mount_opt & EXT4_MOUNT_JOURNAL_CHECKSUM) ^
4886 test_opt(sb, JOURNAL_CHECKSUM)) {
4887 ext4_msg(sb, KERN_ERR, "changing journal_checksum "
4888 "during remount not supported");
4889 err = -EINVAL;
4890 goto restore_opts;
4891 } 4884 }
4892 4885
4893 if (test_opt(sb, DATA_FLAGS) == EXT4_MOUNT_JOURNAL_DATA) { 4886 if (test_opt(sb, DATA_FLAGS) == EXT4_MOUNT_JOURNAL_DATA) {
@@ -4963,7 +4956,9 @@ static int ext4_remount(struct super_block *sb, int *flags, char *data)
4963 ext4_mark_recovery_complete(sb, es); 4956 ext4_mark_recovery_complete(sb, es);
4964 } else { 4957 } else {
4965 /* Make sure we can mount this feature set readwrite */ 4958 /* Make sure we can mount this feature set readwrite */
4966 if (!ext4_feature_set_ok(sb, 0)) { 4959 if (EXT4_HAS_RO_COMPAT_FEATURE(sb,
4960 EXT4_FEATURE_RO_COMPAT_READONLY) ||
4961 !ext4_feature_set_ok(sb, 0)) {
4967 err = -EROFS; 4962 err = -EROFS;
4968 goto restore_opts; 4963 goto restore_opts;
4969 } 4964 }
diff --git a/fs/fs-writeback.c b/fs/fs-writeback.c
index 073657f755d4..e907052eeadb 100644
--- a/fs/fs-writeback.c
+++ b/fs/fs-writeback.c
@@ -769,9 +769,9 @@ static long __writeback_inodes_wb(struct bdi_writeback *wb,
769 struct inode *inode = wb_inode(wb->b_io.prev); 769 struct inode *inode = wb_inode(wb->b_io.prev);
770 struct super_block *sb = inode->i_sb; 770 struct super_block *sb = inode->i_sb;
771 771
772 if (!grab_super_passive(sb)) { 772 if (!trylock_super(sb)) {
773 /* 773 /*
774 * grab_super_passive() may fail consistently due to 774 * trylock_super() may fail consistently due to
775 * s_umount being grabbed by someone else. Don't use 775 * s_umount being grabbed by someone else. Don't use
776 * requeue_io() to avoid busy retrying the inode/sb. 776 * requeue_io() to avoid busy retrying the inode/sb.
777 */ 777 */
@@ -779,7 +779,7 @@ static long __writeback_inodes_wb(struct bdi_writeback *wb,
779 continue; 779 continue;
780 } 780 }
781 wrote += writeback_sb_inodes(sb, wb, work); 781 wrote += writeback_sb_inodes(sb, wb, work);
782 drop_super(sb); 782 up_read(&sb->s_umount);
783 783
784 /* refer to the same tests at the end of writeback_sb_inodes */ 784 /* refer to the same tests at the end of writeback_sb_inodes */
785 if (wrote) { 785 if (wrote) {
diff --git a/fs/fuse/dev.c b/fs/fuse/dev.c
index ed19a7d622fa..39706c57ad3c 100644
--- a/fs/fuse/dev.c
+++ b/fs/fuse/dev.c
@@ -890,8 +890,8 @@ static int fuse_try_move_page(struct fuse_copy_state *cs, struct page **pagep)
890 890
891 newpage = buf->page; 891 newpage = buf->page;
892 892
893 if (WARN_ON(!PageUptodate(newpage))) 893 if (!PageUptodate(newpage))
894 return -EIO; 894 SetPageUptodate(newpage);
895 895
896 ClearPageMappedToDisk(newpage); 896 ClearPageMappedToDisk(newpage);
897 897
@@ -1353,6 +1353,17 @@ static ssize_t fuse_dev_do_read(struct fuse_conn *fc, struct file *file,
1353 return err; 1353 return err;
1354} 1354}
1355 1355
1356static int fuse_dev_open(struct inode *inode, struct file *file)
1357{
1358 /*
1359 * The fuse device's file's private_data is used to hold
1360 * the fuse_conn(ection) when it is mounted, and is used to
1361 * keep track of whether the file has been mounted already.
1362 */
1363 file->private_data = NULL;
1364 return 0;
1365}
1366
1356static ssize_t fuse_dev_read(struct kiocb *iocb, const struct iovec *iov, 1367static ssize_t fuse_dev_read(struct kiocb *iocb, const struct iovec *iov,
1357 unsigned long nr_segs, loff_t pos) 1368 unsigned long nr_segs, loff_t pos)
1358{ 1369{
@@ -1797,6 +1808,9 @@ copy_finish:
1797static int fuse_notify(struct fuse_conn *fc, enum fuse_notify_code code, 1808static int fuse_notify(struct fuse_conn *fc, enum fuse_notify_code code,
1798 unsigned int size, struct fuse_copy_state *cs) 1809 unsigned int size, struct fuse_copy_state *cs)
1799{ 1810{
1811 /* Don't try to move pages (yet) */
1812 cs->move_pages = 0;
1813
1800 switch (code) { 1814 switch (code) {
1801 case FUSE_NOTIFY_POLL: 1815 case FUSE_NOTIFY_POLL:
1802 return fuse_notify_poll(fc, size, cs); 1816 return fuse_notify_poll(fc, size, cs);
@@ -2217,6 +2231,7 @@ static int fuse_dev_fasync(int fd, struct file *file, int on)
2217 2231
2218const struct file_operations fuse_dev_operations = { 2232const struct file_operations fuse_dev_operations = {
2219 .owner = THIS_MODULE, 2233 .owner = THIS_MODULE,
2234 .open = fuse_dev_open,
2220 .llseek = no_llseek, 2235 .llseek = no_llseek,
2221 .read = do_sync_read, 2236 .read = do_sync_read,
2222 .aio_read = fuse_dev_read, 2237 .aio_read = fuse_dev_read,
diff --git a/fs/fuse/dir.c b/fs/fuse/dir.c
index 08e7b1a9d5d0..1545b711ddcf 100644
--- a/fs/fuse/dir.c
+++ b/fs/fuse/dir.c
@@ -971,7 +971,7 @@ int fuse_reverse_inval_entry(struct super_block *sb, u64 parent_nodeid,
971 err = -EBUSY; 971 err = -EBUSY;
972 goto badentry; 972 goto badentry;
973 } 973 }
974 if (S_ISDIR(entry->d_inode->i_mode)) { 974 if (d_is_dir(entry)) {
975 shrink_dcache_parent(entry); 975 shrink_dcache_parent(entry);
976 if (!simple_empty(entry)) { 976 if (!simple_empty(entry)) {
977 err = -ENOTEMPTY; 977 err = -ENOTEMPTY;
diff --git a/fs/gfs2/dir.c b/fs/gfs2/dir.c
index 6371192961e2..487527b42d94 100644
--- a/fs/gfs2/dir.c
+++ b/fs/gfs2/dir.c
@@ -1809,7 +1809,7 @@ int gfs2_dir_del(struct gfs2_inode *dip, const struct dentry *dentry)
1809 gfs2_consist_inode(dip); 1809 gfs2_consist_inode(dip);
1810 dip->i_entries--; 1810 dip->i_entries--;
1811 dip->i_inode.i_mtime = dip->i_inode.i_ctime = tv; 1811 dip->i_inode.i_mtime = dip->i_inode.i_ctime = tv;
1812 if (S_ISDIR(dentry->d_inode->i_mode)) 1812 if (d_is_dir(dentry))
1813 drop_nlink(&dip->i_inode); 1813 drop_nlink(&dip->i_inode);
1814 mark_inode_dirty(&dip->i_inode); 1814 mark_inode_dirty(&dip->i_inode);
1815 1815
diff --git a/fs/hfsplus/dir.c b/fs/hfsplus/dir.c
index 435bea231cc6..f0235c1640af 100644
--- a/fs/hfsplus/dir.c
+++ b/fs/hfsplus/dir.c
@@ -530,7 +530,7 @@ static int hfsplus_rename(struct inode *old_dir, struct dentry *old_dentry,
530 530
531 /* Unlink destination if it already exists */ 531 /* Unlink destination if it already exists */
532 if (new_dentry->d_inode) { 532 if (new_dentry->d_inode) {
533 if (S_ISDIR(new_dentry->d_inode->i_mode)) 533 if (d_is_dir(new_dentry))
534 res = hfsplus_rmdir(new_dir, new_dentry); 534 res = hfsplus_rmdir(new_dir, new_dentry);
535 else 535 else
536 res = hfsplus_unlink(new_dir, new_dentry); 536 res = hfsplus_unlink(new_dir, new_dentry);
diff --git a/fs/hppfs/hppfs.c b/fs/hppfs/hppfs.c
index 5f2755117ce7..043ac9d77262 100644
--- a/fs/hppfs/hppfs.c
+++ b/fs/hppfs/hppfs.c
@@ -678,10 +678,10 @@ static struct inode *get_inode(struct super_block *sb, struct dentry *dentry)
678 return NULL; 678 return NULL;
679 } 679 }
680 680
681 if (S_ISDIR(dentry->d_inode->i_mode)) { 681 if (d_is_dir(dentry)) {
682 inode->i_op = &hppfs_dir_iops; 682 inode->i_op = &hppfs_dir_iops;
683 inode->i_fop = &hppfs_dir_fops; 683 inode->i_fop = &hppfs_dir_fops;
684 } else if (S_ISLNK(dentry->d_inode->i_mode)) { 684 } else if (d_is_symlink(dentry)) {
685 inode->i_op = &hppfs_link_iops; 685 inode->i_op = &hppfs_link_iops;
686 inode->i_fop = &hppfs_file_fops; 686 inode->i_fop = &hppfs_file_fops;
687 } else { 687 } else {
diff --git a/fs/internal.h b/fs/internal.h
index 30459dab409d..01dce1d1476b 100644
--- a/fs/internal.h
+++ b/fs/internal.h
@@ -84,7 +84,7 @@ extern struct file *get_empty_filp(void);
84 * super.c 84 * super.c
85 */ 85 */
86extern int do_remount_sb(struct super_block *, int, void *, int); 86extern int do_remount_sb(struct super_block *, int, void *, int);
87extern bool grab_super_passive(struct super_block *sb); 87extern bool trylock_super(struct super_block *sb);
88extern struct dentry *mount_fs(struct file_system_type *, 88extern struct dentry *mount_fs(struct file_system_type *,
89 int, const char *, void *); 89 int, const char *, void *);
90extern struct super_block *user_get_super(dev_t); 90extern struct super_block *user_get_super(dev_t);
diff --git a/fs/jbd2/recovery.c b/fs/jbd2/recovery.c
index bcbef08a4d8f..b5128c6e63ad 100644
--- a/fs/jbd2/recovery.c
+++ b/fs/jbd2/recovery.c
@@ -524,6 +524,9 @@ static int do_one_pass(journal_t *journal,
524 if (descr_csum_size > 0 && 524 if (descr_csum_size > 0 &&
525 !jbd2_descr_block_csum_verify(journal, 525 !jbd2_descr_block_csum_verify(journal,
526 bh->b_data)) { 526 bh->b_data)) {
527 printk(KERN_ERR "JBD2: Invalid checksum "
528 "recovering block %lu in log\n",
529 next_log_block);
527 err = -EIO; 530 err = -EIO;
528 brelse(bh); 531 brelse(bh);
529 goto failed; 532 goto failed;
diff --git a/fs/jffs2/dir.c b/fs/jffs2/dir.c
index 938556025d64..f21b6fb5e4c4 100644
--- a/fs/jffs2/dir.c
+++ b/fs/jffs2/dir.c
@@ -252,7 +252,7 @@ static int jffs2_link (struct dentry *old_dentry, struct inode *dir_i, struct de
252 if (!f->inocache) 252 if (!f->inocache)
253 return -EIO; 253 return -EIO;
254 254
255 if (S_ISDIR(old_dentry->d_inode->i_mode)) 255 if (d_is_dir(old_dentry))
256 return -EPERM; 256 return -EPERM;
257 257
258 /* XXX: This is ugly */ 258 /* XXX: This is ugly */
@@ -772,7 +772,7 @@ static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry,
772 */ 772 */
773 if (new_dentry->d_inode) { 773 if (new_dentry->d_inode) {
774 victim_f = JFFS2_INODE_INFO(new_dentry->d_inode); 774 victim_f = JFFS2_INODE_INFO(new_dentry->d_inode);
775 if (S_ISDIR(new_dentry->d_inode->i_mode)) { 775 if (d_is_dir(new_dentry)) {
776 struct jffs2_full_dirent *fd; 776 struct jffs2_full_dirent *fd;
777 777
778 mutex_lock(&victim_f->sem); 778 mutex_lock(&victim_f->sem);
@@ -807,7 +807,7 @@ static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry,
807 807
808 if (victim_f) { 808 if (victim_f) {
809 /* There was a victim. Kill it off nicely */ 809 /* There was a victim. Kill it off nicely */
810 if (S_ISDIR(new_dentry->d_inode->i_mode)) 810 if (d_is_dir(new_dentry))
811 clear_nlink(new_dentry->d_inode); 811 clear_nlink(new_dentry->d_inode);
812 else 812 else
813 drop_nlink(new_dentry->d_inode); 813 drop_nlink(new_dentry->d_inode);
@@ -815,7 +815,7 @@ static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry,
815 inode which didn't exist. */ 815 inode which didn't exist. */
816 if (victim_f->inocache) { 816 if (victim_f->inocache) {
817 mutex_lock(&victim_f->sem); 817 mutex_lock(&victim_f->sem);
818 if (S_ISDIR(new_dentry->d_inode->i_mode)) 818 if (d_is_dir(new_dentry))
819 victim_f->inocache->pino_nlink = 0; 819 victim_f->inocache->pino_nlink = 0;
820 else 820 else
821 victim_f->inocache->pino_nlink--; 821 victim_f->inocache->pino_nlink--;
@@ -825,7 +825,7 @@ static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry,
825 825
826 /* If it was a directory we moved, and there was no victim, 826 /* If it was a directory we moved, and there was no victim,
827 increase i_nlink on its new parent */ 827 increase i_nlink on its new parent */
828 if (S_ISDIR(old_dentry->d_inode->i_mode) && !victim_f) 828 if (d_is_dir(old_dentry) && !victim_f)
829 inc_nlink(new_dir_i); 829 inc_nlink(new_dir_i);
830 830
831 /* Unlink the original */ 831 /* Unlink the original */
@@ -839,7 +839,7 @@ static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry,
839 struct jffs2_inode_info *f = JFFS2_INODE_INFO(old_dentry->d_inode); 839 struct jffs2_inode_info *f = JFFS2_INODE_INFO(old_dentry->d_inode);
840 mutex_lock(&f->sem); 840 mutex_lock(&f->sem);
841 inc_nlink(old_dentry->d_inode); 841 inc_nlink(old_dentry->d_inode);
842 if (f->inocache && !S_ISDIR(old_dentry->d_inode->i_mode)) 842 if (f->inocache && !d_is_dir(old_dentry))
843 f->inocache->pino_nlink++; 843 f->inocache->pino_nlink++;
844 mutex_unlock(&f->sem); 844 mutex_unlock(&f->sem);
845 845
@@ -852,7 +852,7 @@ static int jffs2_rename (struct inode *old_dir_i, struct dentry *old_dentry,
852 return ret; 852 return ret;
853 } 853 }
854 854
855 if (S_ISDIR(old_dentry->d_inode->i_mode)) 855 if (d_is_dir(old_dentry))
856 drop_nlink(old_dir_i); 856 drop_nlink(old_dir_i);
857 857
858 new_dir_i->i_mtime = new_dir_i->i_ctime = old_dir_i->i_mtime = old_dir_i->i_ctime = ITIME(now); 858 new_dir_i->i_mtime = new_dir_i->i_ctime = old_dir_i->i_mtime = old_dir_i->i_ctime = ITIME(now);
diff --git a/fs/jffs2/super.c b/fs/jffs2/super.c
index 0918f0e2e266..3d76f28a2ba9 100644
--- a/fs/jffs2/super.c
+++ b/fs/jffs2/super.c
@@ -138,7 +138,7 @@ static struct dentry *jffs2_get_parent(struct dentry *child)
138 struct jffs2_inode_info *f; 138 struct jffs2_inode_info *f;
139 uint32_t pino; 139 uint32_t pino;
140 140
141 BUG_ON(!S_ISDIR(child->d_inode->i_mode)); 141 BUG_ON(!d_is_dir(child));
142 142
143 f = JFFS2_INODE_INFO(child->d_inode); 143 f = JFFS2_INODE_INFO(child->d_inode);
144 144
diff --git a/fs/kernfs/file.c b/fs/kernfs/file.c
index b684e8a132e6..2bacb9988566 100644
--- a/fs/kernfs/file.c
+++ b/fs/kernfs/file.c
@@ -207,6 +207,7 @@ static ssize_t kernfs_file_direct_read(struct kernfs_open_file *of,
207 goto out_free; 207 goto out_free;
208 } 208 }
209 209
210 of->event = atomic_read(&of->kn->attr.open->event);
210 ops = kernfs_ops(of->kn); 211 ops = kernfs_ops(of->kn);
211 if (ops->read) 212 if (ops->read)
212 len = ops->read(of, buf, len, *ppos); 213 len = ops->read(of, buf, len, *ppos);
diff --git a/fs/libfs.c b/fs/libfs.c
index b2ffdb045be4..0ab65122ee45 100644
--- a/fs/libfs.c
+++ b/fs/libfs.c
@@ -329,7 +329,7 @@ int simple_rename(struct inode *old_dir, struct dentry *old_dentry,
329 struct inode *new_dir, struct dentry *new_dentry) 329 struct inode *new_dir, struct dentry *new_dentry)
330{ 330{
331 struct inode *inode = old_dentry->d_inode; 331 struct inode *inode = old_dentry->d_inode;
332 int they_are_dirs = S_ISDIR(old_dentry->d_inode->i_mode); 332 int they_are_dirs = d_is_dir(old_dentry);
333 333
334 if (!simple_empty(new_dentry)) 334 if (!simple_empty(new_dentry))
335 return -ENOTEMPTY; 335 return -ENOTEMPTY;
diff --git a/fs/locks.c b/fs/locks.c
index 365c82e1b3a9..528fedfda15e 100644
--- a/fs/locks.c
+++ b/fs/locks.c
@@ -1665,7 +1665,8 @@ generic_add_lease(struct file *filp, long arg, struct file_lock **flp, void **pr
1665 } 1665 }
1666 1666
1667 if (my_fl != NULL) { 1667 if (my_fl != NULL) {
1668 error = lease->fl_lmops->lm_change(my_fl, arg, &dispose); 1668 lease = my_fl;
1669 error = lease->fl_lmops->lm_change(lease, arg, &dispose);
1669 if (error) 1670 if (error)
1670 goto out; 1671 goto out;
1671 goto out_setup; 1672 goto out_setup;
@@ -1727,7 +1728,7 @@ static int generic_delete_lease(struct file *filp, void *owner)
1727 break; 1728 break;
1728 } 1729 }
1729 } 1730 }
1730 trace_generic_delete_lease(inode, fl); 1731 trace_generic_delete_lease(inode, victim);
1731 if (victim) 1732 if (victim)
1732 error = fl->fl_lmops->lm_change(victim, F_UNLCK, &dispose); 1733 error = fl->fl_lmops->lm_change(victim, F_UNLCK, &dispose);
1733 spin_unlock(&ctx->flc_lock); 1734 spin_unlock(&ctx->flc_lock);
diff --git a/fs/namei.c b/fs/namei.c
index 96ca11dea4a2..c83145af4bfc 100644
--- a/fs/namei.c
+++ b/fs/namei.c
@@ -2814,7 +2814,7 @@ no_open:
2814 } else if (!dentry->d_inode) { 2814 } else if (!dentry->d_inode) {
2815 goto out; 2815 goto out;
2816 } else if ((open_flag & O_TRUNC) && 2816 } else if ((open_flag & O_TRUNC) &&
2817 S_ISREG(dentry->d_inode->i_mode)) { 2817 d_is_reg(dentry)) {
2818 goto out; 2818 goto out;
2819 } 2819 }
2820 /* will fail later, go on to get the right error */ 2820 /* will fail later, go on to get the right error */
diff --git a/fs/namespace.c b/fs/namespace.c
index 72a286e0d33e..82ef1405260e 100644
--- a/fs/namespace.c
+++ b/fs/namespace.c
@@ -1907,8 +1907,8 @@ static int graft_tree(struct mount *mnt, struct mount *p, struct mountpoint *mp)
1907 if (mnt->mnt.mnt_sb->s_flags & MS_NOUSER) 1907 if (mnt->mnt.mnt_sb->s_flags & MS_NOUSER)
1908 return -EINVAL; 1908 return -EINVAL;
1909 1909
1910 if (S_ISDIR(mp->m_dentry->d_inode->i_mode) != 1910 if (d_is_dir(mp->m_dentry) !=
1911 S_ISDIR(mnt->mnt.mnt_root->d_inode->i_mode)) 1911 d_is_dir(mnt->mnt.mnt_root))
1912 return -ENOTDIR; 1912 return -ENOTDIR;
1913 1913
1914 return attach_recursive_mnt(mnt, p, mp, NULL); 1914 return attach_recursive_mnt(mnt, p, mp, NULL);
@@ -2180,8 +2180,8 @@ static int do_move_mount(struct path *path, const char *old_name)
2180 if (!mnt_has_parent(old)) 2180 if (!mnt_has_parent(old))
2181 goto out1; 2181 goto out1;
2182 2182
2183 if (S_ISDIR(path->dentry->d_inode->i_mode) != 2183 if (d_is_dir(path->dentry) !=
2184 S_ISDIR(old_path.dentry->d_inode->i_mode)) 2184 d_is_dir(old_path.dentry))
2185 goto out1; 2185 goto out1;
2186 /* 2186 /*
2187 * Don't move a mount residing in a shared parent. 2187 * Don't move a mount residing in a shared parent.
@@ -2271,7 +2271,7 @@ static int do_add_mount(struct mount *newmnt, struct path *path, int mnt_flags)
2271 goto unlock; 2271 goto unlock;
2272 2272
2273 err = -EINVAL; 2273 err = -EINVAL;
2274 if (S_ISLNK(newmnt->mnt.mnt_root->d_inode->i_mode)) 2274 if (d_is_symlink(newmnt->mnt.mnt_root))
2275 goto unlock; 2275 goto unlock;
2276 2276
2277 newmnt->mnt.mnt_flags = mnt_flags; 2277 newmnt->mnt.mnt_flags = mnt_flags;
diff --git a/fs/nfs/callback_proc.c b/fs/nfs/callback_proc.c
index e36a9d78ea49..197806fb87ff 100644
--- a/fs/nfs/callback_proc.c
+++ b/fs/nfs/callback_proc.c
@@ -427,6 +427,8 @@ __be32 nfs4_callback_sequence(struct cb_sequenceargs *args,
427 if (clp == NULL) 427 if (clp == NULL)
428 goto out; 428 goto out;
429 429
430 if (!(clp->cl_session->flags & SESSION4_BACK_CHAN))
431 goto out;
430 tbl = &clp->cl_session->bc_slot_table; 432 tbl = &clp->cl_session->bc_slot_table;
431 433
432 spin_lock(&tbl->slot_tbl_lock); 434 spin_lock(&tbl->slot_tbl_lock);
diff --git a/fs/nfs/callback_xdr.c b/fs/nfs/callback_xdr.c
index f4ccfe6521ec..19ca95cdfd9b 100644
--- a/fs/nfs/callback_xdr.c
+++ b/fs/nfs/callback_xdr.c
@@ -313,7 +313,7 @@ __be32 decode_devicenotify_args(struct svc_rqst *rqstp,
313 goto out; 313 goto out;
314 } 314 }
315 315
316 args->devs = kmalloc(n * sizeof(*args->devs), GFP_KERNEL); 316 args->devs = kmalloc_array(n, sizeof(*args->devs), GFP_KERNEL);
317 if (!args->devs) { 317 if (!args->devs) {
318 status = htonl(NFS4ERR_DELAY); 318 status = htonl(NFS4ERR_DELAY);
319 goto out; 319 goto out;
@@ -415,7 +415,7 @@ static __be32 decode_rc_list(struct xdr_stream *xdr,
415 rc_list->rcl_nrefcalls * 2 * sizeof(uint32_t)); 415 rc_list->rcl_nrefcalls * 2 * sizeof(uint32_t));
416 if (unlikely(p == NULL)) 416 if (unlikely(p == NULL))
417 goto out; 417 goto out;
418 rc_list->rcl_refcalls = kmalloc(rc_list->rcl_nrefcalls * 418 rc_list->rcl_refcalls = kmalloc_array(rc_list->rcl_nrefcalls,
419 sizeof(*rc_list->rcl_refcalls), 419 sizeof(*rc_list->rcl_refcalls),
420 GFP_KERNEL); 420 GFP_KERNEL);
421 if (unlikely(rc_list->rcl_refcalls == NULL)) 421 if (unlikely(rc_list->rcl_refcalls == NULL))
@@ -464,8 +464,10 @@ static __be32 decode_cb_sequence_args(struct svc_rqst *rqstp,
464 464
465 for (i = 0; i < args->csa_nrclists; i++) { 465 for (i = 0; i < args->csa_nrclists; i++) {
466 status = decode_rc_list(xdr, &args->csa_rclists[i]); 466 status = decode_rc_list(xdr, &args->csa_rclists[i]);
467 if (status) 467 if (status) {
468 args->csa_nrclists = i;
468 goto out_free; 469 goto out_free;
470 }
469 } 471 }
470 } 472 }
471 status = 0; 473 status = 0;
diff --git a/fs/nfs/client.c b/fs/nfs/client.c
index f9f4845db989..19874151e95c 100644
--- a/fs/nfs/client.c
+++ b/fs/nfs/client.c
@@ -433,7 +433,7 @@ static struct nfs_client *nfs_match_client(const struct nfs_client_initdata *dat
433 433
434static bool nfs_client_init_is_complete(const struct nfs_client *clp) 434static bool nfs_client_init_is_complete(const struct nfs_client *clp)
435{ 435{
436 return clp->cl_cons_state != NFS_CS_INITING; 436 return clp->cl_cons_state <= NFS_CS_READY;
437} 437}
438 438
439int nfs_wait_client_init_complete(const struct nfs_client *clp) 439int nfs_wait_client_init_complete(const struct nfs_client *clp)
diff --git a/fs/nfs/delegation.c b/fs/nfs/delegation.c
index da5433230bb1..a6ad68865880 100644
--- a/fs/nfs/delegation.c
+++ b/fs/nfs/delegation.c
@@ -180,10 +180,9 @@ void nfs_inode_reclaim_delegation(struct inode *inode, struct rpc_cred *cred,
180 delegation->cred = get_rpccred(cred); 180 delegation->cred = get_rpccred(cred);
181 clear_bit(NFS_DELEGATION_NEED_RECLAIM, 181 clear_bit(NFS_DELEGATION_NEED_RECLAIM,
182 &delegation->flags); 182 &delegation->flags);
183 NFS_I(inode)->delegation_state = delegation->type;
184 spin_unlock(&delegation->lock); 183 spin_unlock(&delegation->lock);
185 put_rpccred(oldcred);
186 rcu_read_unlock(); 184 rcu_read_unlock();
185 put_rpccred(oldcred);
187 trace_nfs4_reclaim_delegation(inode, res->delegation_type); 186 trace_nfs4_reclaim_delegation(inode, res->delegation_type);
188 } else { 187 } else {
189 /* We appear to have raced with a delegation return. */ 188 /* We appear to have raced with a delegation return. */
@@ -275,7 +274,6 @@ nfs_detach_delegation_locked(struct nfs_inode *nfsi,
275 set_bit(NFS_DELEGATION_RETURNING, &delegation->flags); 274 set_bit(NFS_DELEGATION_RETURNING, &delegation->flags);
276 list_del_rcu(&delegation->super_list); 275 list_del_rcu(&delegation->super_list);
277 delegation->inode = NULL; 276 delegation->inode = NULL;
278 nfsi->delegation_state = 0;
279 rcu_assign_pointer(nfsi->delegation, NULL); 277 rcu_assign_pointer(nfsi->delegation, NULL);
280 spin_unlock(&delegation->lock); 278 spin_unlock(&delegation->lock);
281 return delegation; 279 return delegation;
@@ -355,7 +353,6 @@ int nfs_inode_set_delegation(struct inode *inode, struct rpc_cred *cred, struct
355 &delegation->stateid)) { 353 &delegation->stateid)) {
356 nfs_update_inplace_delegation(old_delegation, 354 nfs_update_inplace_delegation(old_delegation,
357 delegation); 355 delegation);
358 nfsi->delegation_state = old_delegation->type;
359 goto out; 356 goto out;
360 } 357 }
361 /* 358 /*
@@ -373,13 +370,15 @@ int nfs_inode_set_delegation(struct inode *inode, struct rpc_cred *cred, struct
373 delegation = NULL; 370 delegation = NULL;
374 goto out; 371 goto out;
375 } 372 }
376 freeme = nfs_detach_delegation_locked(nfsi, 373 if (test_and_set_bit(NFS_DELEGATION_RETURNING,
374 &old_delegation->flags))
375 goto out;
376 freeme = nfs_detach_delegation_locked(nfsi,
377 old_delegation, clp); 377 old_delegation, clp);
378 if (freeme == NULL) 378 if (freeme == NULL)
379 goto out; 379 goto out;
380 } 380 }
381 list_add_rcu(&delegation->super_list, &server->delegations); 381 list_add_rcu(&delegation->super_list, &server->delegations);
382 nfsi->delegation_state = delegation->type;
383 rcu_assign_pointer(nfsi->delegation, delegation); 382 rcu_assign_pointer(nfsi->delegation, delegation);
384 delegation = NULL; 383 delegation = NULL;
385 384
@@ -437,6 +436,8 @@ static bool nfs_delegation_need_return(struct nfs_delegation *delegation)
437{ 436{
438 bool ret = false; 437 bool ret = false;
439 438
439 if (test_bit(NFS_DELEGATION_RETURNING, &delegation->flags))
440 goto out;
440 if (test_and_clear_bit(NFS_DELEGATION_RETURN, &delegation->flags)) 441 if (test_and_clear_bit(NFS_DELEGATION_RETURN, &delegation->flags))
441 ret = true; 442 ret = true;
442 if (test_and_clear_bit(NFS_DELEGATION_RETURN_IF_CLOSED, &delegation->flags) && !ret) { 443 if (test_and_clear_bit(NFS_DELEGATION_RETURN_IF_CLOSED, &delegation->flags) && !ret) {
@@ -448,6 +449,7 @@ static bool nfs_delegation_need_return(struct nfs_delegation *delegation)
448 ret = true; 449 ret = true;
449 spin_unlock(&delegation->lock); 450 spin_unlock(&delegation->lock);
450 } 451 }
452out:
451 return ret; 453 return ret;
452} 454}
453 455
@@ -475,14 +477,20 @@ restart:
475 super_list) { 477 super_list) {
476 if (!nfs_delegation_need_return(delegation)) 478 if (!nfs_delegation_need_return(delegation))
477 continue; 479 continue;
478 inode = nfs_delegation_grab_inode(delegation); 480 if (!nfs_sb_active(server->super))
479 if (inode == NULL)
480 continue; 481 continue;
482 inode = nfs_delegation_grab_inode(delegation);
483 if (inode == NULL) {
484 rcu_read_unlock();
485 nfs_sb_deactive(server->super);
486 goto restart;
487 }
481 delegation = nfs_start_delegation_return_locked(NFS_I(inode)); 488 delegation = nfs_start_delegation_return_locked(NFS_I(inode));
482 rcu_read_unlock(); 489 rcu_read_unlock();
483 490
484 err = nfs_end_delegation_return(inode, delegation, 0); 491 err = nfs_end_delegation_return(inode, delegation, 0);
485 iput(inode); 492 iput(inode);
493 nfs_sb_deactive(server->super);
486 if (!err) 494 if (!err)
487 goto restart; 495 goto restart;
488 set_bit(NFS4CLNT_DELEGRETURN, &clp->cl_state); 496 set_bit(NFS4CLNT_DELEGRETURN, &clp->cl_state);
@@ -813,19 +821,30 @@ restart:
813 list_for_each_entry_rcu(server, &clp->cl_superblocks, client_link) { 821 list_for_each_entry_rcu(server, &clp->cl_superblocks, client_link) {
814 list_for_each_entry_rcu(delegation, &server->delegations, 822 list_for_each_entry_rcu(delegation, &server->delegations,
815 super_list) { 823 super_list) {
824 if (test_bit(NFS_DELEGATION_RETURNING,
825 &delegation->flags))
826 continue;
816 if (test_bit(NFS_DELEGATION_NEED_RECLAIM, 827 if (test_bit(NFS_DELEGATION_NEED_RECLAIM,
817 &delegation->flags) == 0) 828 &delegation->flags) == 0)
818 continue; 829 continue;
819 inode = nfs_delegation_grab_inode(delegation); 830 if (!nfs_sb_active(server->super))
820 if (inode == NULL)
821 continue; 831 continue;
822 delegation = nfs_detach_delegation(NFS_I(inode), 832 inode = nfs_delegation_grab_inode(delegation);
823 delegation, server); 833 if (inode == NULL) {
834 rcu_read_unlock();
835 nfs_sb_deactive(server->super);
836 goto restart;
837 }
838 delegation = nfs_start_delegation_return_locked(NFS_I(inode));
824 rcu_read_unlock(); 839 rcu_read_unlock();
825 840 if (delegation != NULL) {
826 if (delegation != NULL) 841 delegation = nfs_detach_delegation(NFS_I(inode),
827 nfs_free_delegation(delegation); 842 delegation, server);
843 if (delegation != NULL)
844 nfs_free_delegation(delegation);
845 }
828 iput(inode); 846 iput(inode);
847 nfs_sb_deactive(server->super);
829 goto restart; 848 goto restart;
830 } 849 }
831 } 850 }
diff --git a/fs/nfs/dir.c b/fs/nfs/dir.c
index 9b0c55cb2a2e..c19e16f0b2d0 100644
--- a/fs/nfs/dir.c
+++ b/fs/nfs/dir.c
@@ -408,14 +408,22 @@ static int xdr_decode(nfs_readdir_descriptor_t *desc,
408 return 0; 408 return 0;
409} 409}
410 410
411/* Match file and dirent using either filehandle or fileid
412 * Note: caller is responsible for checking the fsid
413 */
411static 414static
412int nfs_same_file(struct dentry *dentry, struct nfs_entry *entry) 415int nfs_same_file(struct dentry *dentry, struct nfs_entry *entry)
413{ 416{
417 struct nfs_inode *nfsi;
418
414 if (dentry->d_inode == NULL) 419 if (dentry->d_inode == NULL)
415 goto different; 420 goto different;
416 if (nfs_compare_fh(entry->fh, NFS_FH(dentry->d_inode)) != 0) 421
417 goto different; 422 nfsi = NFS_I(dentry->d_inode);
418 return 1; 423 if (entry->fattr->fileid == nfsi->fileid)
424 return 1;
425 if (nfs_compare_fh(entry->fh, &nfsi->fh) == 0)
426 return 1;
419different: 427different:
420 return 0; 428 return 0;
421} 429}
@@ -469,6 +477,10 @@ void nfs_prime_dcache(struct dentry *parent, struct nfs_entry *entry)
469 struct inode *inode; 477 struct inode *inode;
470 int status; 478 int status;
471 479
480 if (!(entry->fattr->valid & NFS_ATTR_FATTR_FILEID))
481 return;
482 if (!(entry->fattr->valid & NFS_ATTR_FATTR_FSID))
483 return;
472 if (filename.name[0] == '.') { 484 if (filename.name[0] == '.') {
473 if (filename.len == 1) 485 if (filename.len == 1)
474 return; 486 return;
@@ -479,6 +491,10 @@ void nfs_prime_dcache(struct dentry *parent, struct nfs_entry *entry)
479 491
480 dentry = d_lookup(parent, &filename); 492 dentry = d_lookup(parent, &filename);
481 if (dentry != NULL) { 493 if (dentry != NULL) {
494 /* Is there a mountpoint here? If so, just exit */
495 if (!nfs_fsid_equal(&NFS_SB(dentry->d_sb)->fsid,
496 &entry->fattr->fsid))
497 goto out;
482 if (nfs_same_file(dentry, entry)) { 498 if (nfs_same_file(dentry, entry)) {
483 nfs_set_verifier(dentry, nfs_save_change_attribute(dir)); 499 nfs_set_verifier(dentry, nfs_save_change_attribute(dir));
484 status = nfs_refresh_inode(dentry->d_inode, entry->fattr); 500 status = nfs_refresh_inode(dentry->d_inode, entry->fattr);
diff --git a/fs/nfs/direct.c b/fs/nfs/direct.c
index 7077521acdf4..e907c8cf732e 100644
--- a/fs/nfs/direct.c
+++ b/fs/nfs/direct.c
@@ -283,7 +283,7 @@ static void nfs_direct_release_pages(struct page **pages, unsigned int npages)
283void nfs_init_cinfo_from_dreq(struct nfs_commit_info *cinfo, 283void nfs_init_cinfo_from_dreq(struct nfs_commit_info *cinfo,
284 struct nfs_direct_req *dreq) 284 struct nfs_direct_req *dreq)
285{ 285{
286 cinfo->lock = &dreq->lock; 286 cinfo->lock = &dreq->inode->i_lock;
287 cinfo->mds = &dreq->mds_cinfo; 287 cinfo->mds = &dreq->mds_cinfo;
288 cinfo->ds = &dreq->ds_cinfo; 288 cinfo->ds = &dreq->ds_cinfo;
289 cinfo->dreq = dreq; 289 cinfo->dreq = dreq;
diff --git a/fs/nfs/file.c b/fs/nfs/file.c
index 94712fc781fa..e679d24c39d3 100644
--- a/fs/nfs/file.c
+++ b/fs/nfs/file.c
@@ -178,7 +178,7 @@ nfs_file_read(struct kiocb *iocb, struct iov_iter *to)
178 iocb->ki_filp, 178 iocb->ki_filp,
179 iov_iter_count(to), (unsigned long) iocb->ki_pos); 179 iov_iter_count(to), (unsigned long) iocb->ki_pos);
180 180
181 result = nfs_revalidate_mapping(inode, iocb->ki_filp->f_mapping); 181 result = nfs_revalidate_mapping_protected(inode, iocb->ki_filp->f_mapping);
182 if (!result) { 182 if (!result) {
183 result = generic_file_read_iter(iocb, to); 183 result = generic_file_read_iter(iocb, to);
184 if (result > 0) 184 if (result > 0)
@@ -199,7 +199,7 @@ nfs_file_splice_read(struct file *filp, loff_t *ppos,
199 dprintk("NFS: splice_read(%pD2, %lu@%Lu)\n", 199 dprintk("NFS: splice_read(%pD2, %lu@%Lu)\n",
200 filp, (unsigned long) count, (unsigned long long) *ppos); 200 filp, (unsigned long) count, (unsigned long long) *ppos);
201 201
202 res = nfs_revalidate_mapping(inode, filp->f_mapping); 202 res = nfs_revalidate_mapping_protected(inode, filp->f_mapping);
203 if (!res) { 203 if (!res) {
204 res = generic_file_splice_read(filp, ppos, pipe, count, flags); 204 res = generic_file_splice_read(filp, ppos, pipe, count, flags);
205 if (res > 0) 205 if (res > 0)
@@ -372,6 +372,10 @@ start:
372 nfs_wait_bit_killable, TASK_KILLABLE); 372 nfs_wait_bit_killable, TASK_KILLABLE);
373 if (ret) 373 if (ret)
374 return ret; 374 return ret;
375 /*
376 * Wait for O_DIRECT to complete
377 */
378 nfs_inode_dio_wait(mapping->host);
375 379
376 page = grab_cache_page_write_begin(mapping, index, flags); 380 page = grab_cache_page_write_begin(mapping, index, flags);
377 if (!page) 381 if (!page)
@@ -619,6 +623,9 @@ static int nfs_vm_page_mkwrite(struct vm_area_struct *vma, struct vm_fault *vmf)
619 /* make sure the cache has finished storing the page */ 623 /* make sure the cache has finished storing the page */
620 nfs_fscache_wait_on_page_write(NFS_I(inode), page); 624 nfs_fscache_wait_on_page_write(NFS_I(inode), page);
621 625
626 wait_on_bit_action(&NFS_I(inode)->flags, NFS_INO_INVALIDATING,
627 nfs_wait_bit_killable, TASK_KILLABLE);
628
622 lock_page(page); 629 lock_page(page);
623 mapping = page_file_mapping(page); 630 mapping = page_file_mapping(page);
624 if (mapping != inode->i_mapping) 631 if (mapping != inode->i_mapping)
diff --git a/fs/nfs/filelayout/filelayout.c b/fs/nfs/filelayout/filelayout.c
index 7ae1c263c5cf..91e88a7ecef0 100644
--- a/fs/nfs/filelayout/filelayout.c
+++ b/fs/nfs/filelayout/filelayout.c
@@ -960,52 +960,19 @@ filelayout_mark_request_commit(struct nfs_page *req,
960{ 960{
961 struct nfs4_filelayout_segment *fl = FILELAYOUT_LSEG(lseg); 961 struct nfs4_filelayout_segment *fl = FILELAYOUT_LSEG(lseg);
962 u32 i, j; 962 u32 i, j;
963 struct list_head *list;
964 struct pnfs_commit_bucket *buckets;
965 963
966 if (fl->commit_through_mds) { 964 if (fl->commit_through_mds) {
967 list = &cinfo->mds->list; 965 nfs_request_add_commit_list(req, &cinfo->mds->list, cinfo);
968 spin_lock(cinfo->lock); 966 } else {
969 goto mds_commit; 967 /* Note that we are calling nfs4_fl_calc_j_index on each page
970 } 968 * that ends up being committed to a data server. An attractive
971 969 * alternative is to add a field to nfs_write_data and nfs_page
972 /* Note that we are calling nfs4_fl_calc_j_index on each page 970 * to store the value calculated in filelayout_write_pagelist
973 * that ends up being committed to a data server. An attractive 971 * and just use that here.
974 * alternative is to add a field to nfs_write_data and nfs_page
975 * to store the value calculated in filelayout_write_pagelist
976 * and just use that here.
977 */
978 j = nfs4_fl_calc_j_index(lseg, req_offset(req));
979 i = select_bucket_index(fl, j);
980 spin_lock(cinfo->lock);
981 buckets = cinfo->ds->buckets;
982 list = &buckets[i].written;
983 if (list_empty(list)) {
984 /* Non-empty buckets hold a reference on the lseg. That ref
985 * is normally transferred to the COMMIT call and released
986 * there. It could also be released if the last req is pulled
987 * off due to a rewrite, in which case it will be done in
988 * pnfs_generic_clear_request_commit
989 */ 972 */
990 buckets[i].wlseg = pnfs_get_lseg(lseg); 973 j = nfs4_fl_calc_j_index(lseg, req_offset(req));
991 } 974 i = select_bucket_index(fl, j);
992 set_bit(PG_COMMIT_TO_DS, &req->wb_flags); 975 pnfs_layout_mark_request_commit(req, lseg, cinfo, i);
993 cinfo->ds->nwritten++;
994
995mds_commit:
996 /* nfs_request_add_commit_list(). We need to add req to list without
997 * dropping cinfo lock.
998 */
999 set_bit(PG_CLEAN, &(req)->wb_flags);
1000 nfs_list_add_request(req, list);
1001 cinfo->mds->ncommit++;
1002 spin_unlock(cinfo->lock);
1003 if (!cinfo->dreq) {
1004 inc_zone_page_state(req->wb_page, NR_UNSTABLE_NFS);
1005 inc_bdi_stat(inode_to_bdi(page_file_mapping(req->wb_page)->host),
1006 BDI_RECLAIMABLE);
1007 __mark_inode_dirty(req->wb_context->dentry->d_inode,
1008 I_DIRTY_DATASYNC);
1009 } 976 }
1010} 977}
1011 978
diff --git a/fs/nfs/flexfilelayout/flexfilelayout.c b/fs/nfs/flexfilelayout/flexfilelayout.c
index c22ecaa86c1c..315cc68945b9 100644
--- a/fs/nfs/flexfilelayout/flexfilelayout.c
+++ b/fs/nfs/flexfilelayout/flexfilelayout.c
@@ -1332,47 +1332,6 @@ ff_layout_write_pagelist(struct nfs_pgio_header *hdr, int sync)
1332 return PNFS_ATTEMPTED; 1332 return PNFS_ATTEMPTED;
1333} 1333}
1334 1334
1335static void
1336ff_layout_mark_request_commit(struct nfs_page *req,
1337 struct pnfs_layout_segment *lseg,
1338 struct nfs_commit_info *cinfo,
1339 u32 ds_commit_idx)
1340{
1341 struct list_head *list;
1342 struct pnfs_commit_bucket *buckets;
1343
1344 spin_lock(cinfo->lock);
1345 buckets = cinfo->ds->buckets;
1346 list = &buckets[ds_commit_idx].written;
1347 if (list_empty(list)) {
1348 /* Non-empty buckets hold a reference on the lseg. That ref
1349 * is normally transferred to the COMMIT call and released
1350 * there. It could also be released if the last req is pulled
1351 * off due to a rewrite, in which case it will be done in
1352 * pnfs_common_clear_request_commit
1353 */
1354 WARN_ON_ONCE(buckets[ds_commit_idx].wlseg != NULL);
1355 buckets[ds_commit_idx].wlseg = pnfs_get_lseg(lseg);
1356 }
1357 set_bit(PG_COMMIT_TO_DS, &req->wb_flags);
1358 cinfo->ds->nwritten++;
1359
1360 /* nfs_request_add_commit_list(). We need to add req to list without
1361 * dropping cinfo lock.
1362 */
1363 set_bit(PG_CLEAN, &(req)->wb_flags);
1364 nfs_list_add_request(req, list);
1365 cinfo->mds->ncommit++;
1366 spin_unlock(cinfo->lock);
1367 if (!cinfo->dreq) {
1368 inc_zone_page_state(req->wb_page, NR_UNSTABLE_NFS);
1369 inc_bdi_stat(inode_to_bdi(page_file_mapping(req->wb_page)->host),
1370 BDI_RECLAIMABLE);
1371 __mark_inode_dirty(req->wb_context->dentry->d_inode,
1372 I_DIRTY_DATASYNC);
1373 }
1374}
1375
1376static u32 calc_ds_index_from_commit(struct pnfs_layout_segment *lseg, u32 i) 1335static u32 calc_ds_index_from_commit(struct pnfs_layout_segment *lseg, u32 i)
1377{ 1336{
1378 return i; 1337 return i;
@@ -1540,7 +1499,7 @@ static struct pnfs_layoutdriver_type flexfilelayout_type = {
1540 .pg_write_ops = &ff_layout_pg_write_ops, 1499 .pg_write_ops = &ff_layout_pg_write_ops,
1541 .get_ds_info = ff_layout_get_ds_info, 1500 .get_ds_info = ff_layout_get_ds_info,
1542 .free_deviceid_node = ff_layout_free_deveiceid_node, 1501 .free_deviceid_node = ff_layout_free_deveiceid_node,
1543 .mark_request_commit = ff_layout_mark_request_commit, 1502 .mark_request_commit = pnfs_layout_mark_request_commit,
1544 .clear_request_commit = pnfs_generic_clear_request_commit, 1503 .clear_request_commit = pnfs_generic_clear_request_commit,
1545 .scan_commit_lists = pnfs_generic_scan_commit_lists, 1504 .scan_commit_lists = pnfs_generic_scan_commit_lists,
1546 .recover_commit_reqs = pnfs_generic_recover_commit_reqs, 1505 .recover_commit_reqs = pnfs_generic_recover_commit_reqs,
diff --git a/fs/nfs/inode.c b/fs/nfs/inode.c
index e4f0dcef8f54..d42dff6d5e98 100644
--- a/fs/nfs/inode.c
+++ b/fs/nfs/inode.c
@@ -556,6 +556,7 @@ EXPORT_SYMBOL_GPL(nfs_setattr);
556 * This is a copy of the common vmtruncate, but with the locking 556 * This is a copy of the common vmtruncate, but with the locking
557 * corrected to take into account the fact that NFS requires 557 * corrected to take into account the fact that NFS requires
558 * inode->i_size to be updated under the inode->i_lock. 558 * inode->i_size to be updated under the inode->i_lock.
559 * Note: must be called with inode->i_lock held!
559 */ 560 */
560static int nfs_vmtruncate(struct inode * inode, loff_t offset) 561static int nfs_vmtruncate(struct inode * inode, loff_t offset)
561{ 562{
@@ -565,14 +566,14 @@ static int nfs_vmtruncate(struct inode * inode, loff_t offset)
565 if (err) 566 if (err)
566 goto out; 567 goto out;
567 568
568 spin_lock(&inode->i_lock);
569 i_size_write(inode, offset); 569 i_size_write(inode, offset);
570 /* Optimisation */ 570 /* Optimisation */
571 if (offset == 0) 571 if (offset == 0)
572 NFS_I(inode)->cache_validity &= ~NFS_INO_INVALID_DATA; 572 NFS_I(inode)->cache_validity &= ~NFS_INO_INVALID_DATA;
573 spin_unlock(&inode->i_lock);
574 573
574 spin_unlock(&inode->i_lock);
575 truncate_pagecache(inode, offset); 575 truncate_pagecache(inode, offset);
576 spin_lock(&inode->i_lock);
576out: 577out:
577 return err; 578 return err;
578} 579}
@@ -585,10 +586,15 @@ out:
585 * Note: we do this in the *proc.c in order to ensure that 586 * Note: we do this in the *proc.c in order to ensure that
586 * it works for things like exclusive creates too. 587 * it works for things like exclusive creates too.
587 */ 588 */
588void nfs_setattr_update_inode(struct inode *inode, struct iattr *attr) 589void nfs_setattr_update_inode(struct inode *inode, struct iattr *attr,
590 struct nfs_fattr *fattr)
589{ 591{
592 /* Barrier: bump the attribute generation count. */
593 nfs_fattr_set_barrier(fattr);
594
595 spin_lock(&inode->i_lock);
596 NFS_I(inode)->attr_gencount = fattr->gencount;
590 if ((attr->ia_valid & (ATTR_MODE|ATTR_UID|ATTR_GID)) != 0) { 597 if ((attr->ia_valid & (ATTR_MODE|ATTR_UID|ATTR_GID)) != 0) {
591 spin_lock(&inode->i_lock);
592 if ((attr->ia_valid & ATTR_MODE) != 0) { 598 if ((attr->ia_valid & ATTR_MODE) != 0) {
593 int mode = attr->ia_mode & S_IALLUGO; 599 int mode = attr->ia_mode & S_IALLUGO;
594 mode |= inode->i_mode & ~S_IALLUGO; 600 mode |= inode->i_mode & ~S_IALLUGO;
@@ -600,12 +606,13 @@ void nfs_setattr_update_inode(struct inode *inode, struct iattr *attr)
600 inode->i_gid = attr->ia_gid; 606 inode->i_gid = attr->ia_gid;
601 nfs_set_cache_invalid(inode, NFS_INO_INVALID_ACCESS 607 nfs_set_cache_invalid(inode, NFS_INO_INVALID_ACCESS
602 | NFS_INO_INVALID_ACL); 608 | NFS_INO_INVALID_ACL);
603 spin_unlock(&inode->i_lock);
604 } 609 }
605 if ((attr->ia_valid & ATTR_SIZE) != 0) { 610 if ((attr->ia_valid & ATTR_SIZE) != 0) {
606 nfs_inc_stats(inode, NFSIOS_SETATTRTRUNC); 611 nfs_inc_stats(inode, NFSIOS_SETATTRTRUNC);
607 nfs_vmtruncate(inode, attr->ia_size); 612 nfs_vmtruncate(inode, attr->ia_size);
608 } 613 }
614 nfs_update_inode(inode, fattr);
615 spin_unlock(&inode->i_lock);
609} 616}
610EXPORT_SYMBOL_GPL(nfs_setattr_update_inode); 617EXPORT_SYMBOL_GPL(nfs_setattr_update_inode);
611 618
@@ -1028,6 +1035,7 @@ static int nfs_invalidate_mapping(struct inode *inode, struct address_space *map
1028 1035
1029 if (mapping->nrpages != 0) { 1036 if (mapping->nrpages != 0) {
1030 if (S_ISREG(inode->i_mode)) { 1037 if (S_ISREG(inode->i_mode)) {
1038 unmap_mapping_range(mapping, 0, 0, 0);
1031 ret = nfs_sync_mapping(mapping); 1039 ret = nfs_sync_mapping(mapping);
1032 if (ret < 0) 1040 if (ret < 0)
1033 return ret; 1041 return ret;
@@ -1060,11 +1068,14 @@ static bool nfs_mapping_need_revalidate_inode(struct inode *inode)
1060} 1068}
1061 1069
1062/** 1070/**
1063 * nfs_revalidate_mapping - Revalidate the pagecache 1071 * __nfs_revalidate_mapping - Revalidate the pagecache
1064 * @inode - pointer to host inode 1072 * @inode - pointer to host inode
1065 * @mapping - pointer to mapping 1073 * @mapping - pointer to mapping
1074 * @may_lock - take inode->i_mutex?
1066 */ 1075 */
1067int nfs_revalidate_mapping(struct inode *inode, struct address_space *mapping) 1076static int __nfs_revalidate_mapping(struct inode *inode,
1077 struct address_space *mapping,
1078 bool may_lock)
1068{ 1079{
1069 struct nfs_inode *nfsi = NFS_I(inode); 1080 struct nfs_inode *nfsi = NFS_I(inode);
1070 unsigned long *bitlock = &nfsi->flags; 1081 unsigned long *bitlock = &nfsi->flags;
@@ -1113,7 +1124,12 @@ int nfs_revalidate_mapping(struct inode *inode, struct address_space *mapping)
1113 nfsi->cache_validity &= ~NFS_INO_INVALID_DATA; 1124 nfsi->cache_validity &= ~NFS_INO_INVALID_DATA;
1114 spin_unlock(&inode->i_lock); 1125 spin_unlock(&inode->i_lock);
1115 trace_nfs_invalidate_mapping_enter(inode); 1126 trace_nfs_invalidate_mapping_enter(inode);
1116 ret = nfs_invalidate_mapping(inode, mapping); 1127 if (may_lock) {
1128 mutex_lock(&inode->i_mutex);
1129 ret = nfs_invalidate_mapping(inode, mapping);
1130 mutex_unlock(&inode->i_mutex);
1131 } else
1132 ret = nfs_invalidate_mapping(inode, mapping);
1117 trace_nfs_invalidate_mapping_exit(inode, ret); 1133 trace_nfs_invalidate_mapping_exit(inode, ret);
1118 1134
1119 clear_bit_unlock(NFS_INO_INVALIDATING, bitlock); 1135 clear_bit_unlock(NFS_INO_INVALIDATING, bitlock);
@@ -1123,6 +1139,29 @@ out:
1123 return ret; 1139 return ret;
1124} 1140}
1125 1141
1142/**
1143 * nfs_revalidate_mapping - Revalidate the pagecache
1144 * @inode - pointer to host inode
1145 * @mapping - pointer to mapping
1146 */
1147int nfs_revalidate_mapping(struct inode *inode, struct address_space *mapping)
1148{
1149 return __nfs_revalidate_mapping(inode, mapping, false);
1150}
1151
1152/**
1153 * nfs_revalidate_mapping_protected - Revalidate the pagecache
1154 * @inode - pointer to host inode
1155 * @mapping - pointer to mapping
1156 *
1157 * Differs from nfs_revalidate_mapping() in that it grabs the inode->i_mutex
1158 * while invalidating the mapping.
1159 */
1160int nfs_revalidate_mapping_protected(struct inode *inode, struct address_space *mapping)
1161{
1162 return __nfs_revalidate_mapping(inode, mapping, true);
1163}
1164
1126static unsigned long nfs_wcc_update_inode(struct inode *inode, struct nfs_fattr *fattr) 1165static unsigned long nfs_wcc_update_inode(struct inode *inode, struct nfs_fattr *fattr)
1127{ 1166{
1128 struct nfs_inode *nfsi = NFS_I(inode); 1167 struct nfs_inode *nfsi = NFS_I(inode);
@@ -1231,13 +1270,6 @@ static int nfs_ctime_need_update(const struct inode *inode, const struct nfs_fat
1231 return timespec_compare(&fattr->ctime, &inode->i_ctime) > 0; 1270 return timespec_compare(&fattr->ctime, &inode->i_ctime) > 0;
1232} 1271}
1233 1272
1234static int nfs_size_need_update(const struct inode *inode, const struct nfs_fattr *fattr)
1235{
1236 if (!(fattr->valid & NFS_ATTR_FATTR_SIZE))
1237 return 0;
1238 return nfs_size_to_loff_t(fattr->size) > i_size_read(inode);
1239}
1240
1241static atomic_long_t nfs_attr_generation_counter; 1273static atomic_long_t nfs_attr_generation_counter;
1242 1274
1243static unsigned long nfs_read_attr_generation_counter(void) 1275static unsigned long nfs_read_attr_generation_counter(void)
@@ -1249,6 +1281,7 @@ unsigned long nfs_inc_attr_generation_counter(void)
1249{ 1281{
1250 return atomic_long_inc_return(&nfs_attr_generation_counter); 1282 return atomic_long_inc_return(&nfs_attr_generation_counter);
1251} 1283}
1284EXPORT_SYMBOL_GPL(nfs_inc_attr_generation_counter);
1252 1285
1253void nfs_fattr_init(struct nfs_fattr *fattr) 1286void nfs_fattr_init(struct nfs_fattr *fattr)
1254{ 1287{
@@ -1260,6 +1293,22 @@ void nfs_fattr_init(struct nfs_fattr *fattr)
1260} 1293}
1261EXPORT_SYMBOL_GPL(nfs_fattr_init); 1294EXPORT_SYMBOL_GPL(nfs_fattr_init);
1262 1295
1296/**
1297 * nfs_fattr_set_barrier
1298 * @fattr: attributes
1299 *
1300 * Used to set a barrier after an attribute was updated. This
1301 * barrier ensures that older attributes from RPC calls that may
1302 * have raced with our update cannot clobber these new values.
1303 * Note that you are still responsible for ensuring that other
1304 * operations which change the attribute on the server do not
1305 * collide.
1306 */
1307void nfs_fattr_set_barrier(struct nfs_fattr *fattr)
1308{
1309 fattr->gencount = nfs_inc_attr_generation_counter();
1310}
1311
1263struct nfs_fattr *nfs_alloc_fattr(void) 1312struct nfs_fattr *nfs_alloc_fattr(void)
1264{ 1313{
1265 struct nfs_fattr *fattr; 1314 struct nfs_fattr *fattr;
@@ -1370,7 +1419,6 @@ static int nfs_inode_attrs_need_update(const struct inode *inode, const struct n
1370 1419
1371 return ((long)fattr->gencount - (long)nfsi->attr_gencount) > 0 || 1420 return ((long)fattr->gencount - (long)nfsi->attr_gencount) > 0 ||
1372 nfs_ctime_need_update(inode, fattr) || 1421 nfs_ctime_need_update(inode, fattr) ||
1373 nfs_size_need_update(inode, fattr) ||
1374 ((long)nfsi->attr_gencount - (long)nfs_read_attr_generation_counter() > 0); 1422 ((long)nfsi->attr_gencount - (long)nfs_read_attr_generation_counter() > 0);
1375} 1423}
1376 1424
@@ -1460,6 +1508,7 @@ int nfs_post_op_update_inode(struct inode *inode, struct nfs_fattr *fattr)
1460 int status; 1508 int status;
1461 1509
1462 spin_lock(&inode->i_lock); 1510 spin_lock(&inode->i_lock);
1511 nfs_fattr_set_barrier(fattr);
1463 status = nfs_post_op_update_inode_locked(inode, fattr); 1512 status = nfs_post_op_update_inode_locked(inode, fattr);
1464 spin_unlock(&inode->i_lock); 1513 spin_unlock(&inode->i_lock);
1465 1514
@@ -1468,7 +1517,7 @@ int nfs_post_op_update_inode(struct inode *inode, struct nfs_fattr *fattr)
1468EXPORT_SYMBOL_GPL(nfs_post_op_update_inode); 1517EXPORT_SYMBOL_GPL(nfs_post_op_update_inode);
1469 1518
1470/** 1519/**
1471 * nfs_post_op_update_inode_force_wcc - try to update the inode attribute cache 1520 * nfs_post_op_update_inode_force_wcc_locked - update the inode attribute cache
1472 * @inode - pointer to inode 1521 * @inode - pointer to inode
1473 * @fattr - updated attributes 1522 * @fattr - updated attributes
1474 * 1523 *
@@ -1478,11 +1527,10 @@ EXPORT_SYMBOL_GPL(nfs_post_op_update_inode);
1478 * 1527 *
1479 * This function is mainly designed to be used by the ->write_done() functions. 1528 * This function is mainly designed to be used by the ->write_done() functions.
1480 */ 1529 */
1481int nfs_post_op_update_inode_force_wcc(struct inode *inode, struct nfs_fattr *fattr) 1530int nfs_post_op_update_inode_force_wcc_locked(struct inode *inode, struct nfs_fattr *fattr)
1482{ 1531{
1483 int status; 1532 int status;
1484 1533
1485 spin_lock(&inode->i_lock);
1486 /* Don't do a WCC update if these attributes are already stale */ 1534 /* Don't do a WCC update if these attributes are already stale */
1487 if ((fattr->valid & NFS_ATTR_FATTR) == 0 || 1535 if ((fattr->valid & NFS_ATTR_FATTR) == 0 ||
1488 !nfs_inode_attrs_need_update(inode, fattr)) { 1536 !nfs_inode_attrs_need_update(inode, fattr)) {
@@ -1514,6 +1562,27 @@ int nfs_post_op_update_inode_force_wcc(struct inode *inode, struct nfs_fattr *fa
1514 } 1562 }
1515out_noforce: 1563out_noforce:
1516 status = nfs_post_op_update_inode_locked(inode, fattr); 1564 status = nfs_post_op_update_inode_locked(inode, fattr);
1565 return status;
1566}
1567
1568/**
1569 * nfs_post_op_update_inode_force_wcc - try to update the inode attribute cache
1570 * @inode - pointer to inode
1571 * @fattr - updated attributes
1572 *
1573 * After an operation that has changed the inode metadata, mark the
1574 * attribute cache as being invalid, then try to update it. Fake up
1575 * weak cache consistency data, if none exist.
1576 *
1577 * This function is mainly designed to be used by the ->write_done() functions.
1578 */
1579int nfs_post_op_update_inode_force_wcc(struct inode *inode, struct nfs_fattr *fattr)
1580{
1581 int status;
1582
1583 spin_lock(&inode->i_lock);
1584 nfs_fattr_set_barrier(fattr);
1585 status = nfs_post_op_update_inode_force_wcc_locked(inode, fattr);
1517 spin_unlock(&inode->i_lock); 1586 spin_unlock(&inode->i_lock);
1518 return status; 1587 return status;
1519} 1588}
@@ -1715,6 +1784,7 @@ static int nfs_update_inode(struct inode *inode, struct nfs_fattr *fattr)
1715 nfs_inc_stats(inode, NFSIOS_ATTRINVALIDATE); 1784 nfs_inc_stats(inode, NFSIOS_ATTRINVALIDATE);
1716 nfsi->attrtimeo = NFS_MINATTRTIMEO(inode); 1785 nfsi->attrtimeo = NFS_MINATTRTIMEO(inode);
1717 nfsi->attrtimeo_timestamp = now; 1786 nfsi->attrtimeo_timestamp = now;
1787 /* Set barrier to be more recent than all outstanding updates */
1718 nfsi->attr_gencount = nfs_inc_attr_generation_counter(); 1788 nfsi->attr_gencount = nfs_inc_attr_generation_counter();
1719 } else { 1789 } else {
1720 if (!time_in_range_open(now, nfsi->attrtimeo_timestamp, nfsi->attrtimeo_timestamp + nfsi->attrtimeo)) { 1790 if (!time_in_range_open(now, nfsi->attrtimeo_timestamp, nfsi->attrtimeo_timestamp + nfsi->attrtimeo)) {
@@ -1722,6 +1792,9 @@ static int nfs_update_inode(struct inode *inode, struct nfs_fattr *fattr)
1722 nfsi->attrtimeo = NFS_MAXATTRTIMEO(inode); 1792 nfsi->attrtimeo = NFS_MAXATTRTIMEO(inode);
1723 nfsi->attrtimeo_timestamp = now; 1793 nfsi->attrtimeo_timestamp = now;
1724 } 1794 }
1795 /* Set the barrier to be more recent than this fattr */
1796 if ((long)fattr->gencount - (long)nfsi->attr_gencount > 0)
1797 nfsi->attr_gencount = fattr->gencount;
1725 } 1798 }
1726 invalid &= ~NFS_INO_INVALID_ATTR; 1799 invalid &= ~NFS_INO_INVALID_ATTR;
1727 /* Don't invalidate the data if we were to blame */ 1800 /* Don't invalidate the data if we were to blame */
@@ -1775,7 +1848,6 @@ static inline void nfs4_init_once(struct nfs_inode *nfsi)
1775#if IS_ENABLED(CONFIG_NFS_V4) 1848#if IS_ENABLED(CONFIG_NFS_V4)
1776 INIT_LIST_HEAD(&nfsi->open_states); 1849 INIT_LIST_HEAD(&nfsi->open_states);
1777 nfsi->delegation = NULL; 1850 nfsi->delegation = NULL;
1778 nfsi->delegation_state = 0;
1779 init_rwsem(&nfsi->rwsem); 1851 init_rwsem(&nfsi->rwsem);
1780 nfsi->layout = NULL; 1852 nfsi->layout = NULL;
1781#endif 1853#endif
diff --git a/fs/nfs/internal.h b/fs/nfs/internal.h
index 212b8c883d22..9e6475bc5ba2 100644
--- a/fs/nfs/internal.h
+++ b/fs/nfs/internal.h
@@ -459,6 +459,7 @@ void nfs_mark_request_commit(struct nfs_page *req,
459 struct nfs_commit_info *cinfo, 459 struct nfs_commit_info *cinfo,
460 u32 ds_commit_idx); 460 u32 ds_commit_idx);
461int nfs_write_need_commit(struct nfs_pgio_header *); 461int nfs_write_need_commit(struct nfs_pgio_header *);
462void nfs_writeback_update_inode(struct nfs_pgio_header *hdr);
462int nfs_generic_commit_list(struct inode *inode, struct list_head *head, 463int nfs_generic_commit_list(struct inode *inode, struct list_head *head,
463 int how, struct nfs_commit_info *cinfo); 464 int how, struct nfs_commit_info *cinfo);
464void nfs_retry_commit(struct list_head *page_list, 465void nfs_retry_commit(struct list_head *page_list,
@@ -598,6 +599,19 @@ void nfs_super_set_maxbytes(struct super_block *sb, __u64 maxfilesize)
598} 599}
599 600
600/* 601/*
602 * Record the page as unstable and mark its inode as dirty.
603 */
604static inline
605void nfs_mark_page_unstable(struct page *page)
606{
607 struct inode *inode = page_file_mapping(page)->host;
608
609 inc_zone_page_state(page, NR_UNSTABLE_NFS);
610 inc_bdi_stat(inode_to_bdi(inode), BDI_RECLAIMABLE);
611 __mark_inode_dirty(inode, I_DIRTY_DATASYNC);
612}
613
614/*
601 * Determine the number of bytes of data the page contains 615 * Determine the number of bytes of data the page contains
602 */ 616 */
603static inline 617static inline
diff --git a/fs/nfs/nfs3proc.c b/fs/nfs/nfs3proc.c
index 78e557c3ab87..1f11d2533ee4 100644
--- a/fs/nfs/nfs3proc.c
+++ b/fs/nfs/nfs3proc.c
@@ -138,7 +138,7 @@ nfs3_proc_setattr(struct dentry *dentry, struct nfs_fattr *fattr,
138 nfs_fattr_init(fattr); 138 nfs_fattr_init(fattr);
139 status = rpc_call_sync(NFS_CLIENT(inode), &msg, 0); 139 status = rpc_call_sync(NFS_CLIENT(inode), &msg, 0);
140 if (status == 0) 140 if (status == 0)
141 nfs_setattr_update_inode(inode, sattr); 141 nfs_setattr_update_inode(inode, sattr, fattr);
142 dprintk("NFS reply setattr: %d\n", status); 142 dprintk("NFS reply setattr: %d\n", status);
143 return status; 143 return status;
144} 144}
@@ -834,7 +834,7 @@ static int nfs3_write_done(struct rpc_task *task, struct nfs_pgio_header *hdr)
834 if (nfs3_async_handle_jukebox(task, inode)) 834 if (nfs3_async_handle_jukebox(task, inode))
835 return -EAGAIN; 835 return -EAGAIN;
836 if (task->tk_status >= 0) 836 if (task->tk_status >= 0)
837 nfs_post_op_update_inode_force_wcc(inode, hdr->res.fattr); 837 nfs_writeback_update_inode(hdr);
838 return 0; 838 return 0;
839} 839}
840 840
diff --git a/fs/nfs/nfs3xdr.c b/fs/nfs/nfs3xdr.c
index 2a932fdc57cb..53852a4bd88b 100644
--- a/fs/nfs/nfs3xdr.c
+++ b/fs/nfs/nfs3xdr.c
@@ -1987,6 +1987,11 @@ int nfs3_decode_dirent(struct xdr_stream *xdr, struct nfs_entry *entry,
1987 if (entry->fattr->valid & NFS_ATTR_FATTR_V3) 1987 if (entry->fattr->valid & NFS_ATTR_FATTR_V3)
1988 entry->d_type = nfs_umode_to_dtype(entry->fattr->mode); 1988 entry->d_type = nfs_umode_to_dtype(entry->fattr->mode);
1989 1989
1990 if (entry->fattr->fileid != entry->ino) {
1991 entry->fattr->mounted_on_fileid = entry->ino;
1992 entry->fattr->valid |= NFS_ATTR_FATTR_MOUNTED_ON_FILEID;
1993 }
1994
1990 /* In fact, a post_op_fh3: */ 1995 /* In fact, a post_op_fh3: */
1991 p = xdr_inline_decode(xdr, 4); 1996 p = xdr_inline_decode(xdr, 4);
1992 if (unlikely(p == NULL)) 1997 if (unlikely(p == NULL))
diff --git a/fs/nfs/nfs4client.c b/fs/nfs/nfs4client.c
index 8646af9b11d2..86d6214ea022 100644
--- a/fs/nfs/nfs4client.c
+++ b/fs/nfs/nfs4client.c
@@ -621,6 +621,9 @@ int nfs41_walk_client_list(struct nfs_client *new,
621 spin_lock(&nn->nfs_client_lock); 621 spin_lock(&nn->nfs_client_lock);
622 list_for_each_entry(pos, &nn->nfs_client_list, cl_share_link) { 622 list_for_each_entry(pos, &nn->nfs_client_list, cl_share_link) {
623 623
624 if (pos == new)
625 goto found;
626
624 if (pos->rpc_ops != new->rpc_ops) 627 if (pos->rpc_ops != new->rpc_ops)
625 continue; 628 continue;
626 629
@@ -639,10 +642,6 @@ int nfs41_walk_client_list(struct nfs_client *new,
639 prev = pos; 642 prev = pos;
640 643
641 status = nfs_wait_client_init_complete(pos); 644 status = nfs_wait_client_init_complete(pos);
642 if (pos->cl_cons_state == NFS_CS_SESSION_INITING) {
643 nfs4_schedule_lease_recovery(pos);
644 status = nfs4_wait_clnt_recover(pos);
645 }
646 spin_lock(&nn->nfs_client_lock); 645 spin_lock(&nn->nfs_client_lock);
647 if (status < 0) 646 if (status < 0)
648 break; 647 break;
@@ -668,7 +667,7 @@ int nfs41_walk_client_list(struct nfs_client *new,
668 */ 667 */
669 if (!nfs4_match_client_owner_id(pos, new)) 668 if (!nfs4_match_client_owner_id(pos, new))
670 continue; 669 continue;
671 670found:
672 atomic_inc(&pos->cl_count); 671 atomic_inc(&pos->cl_count);
673 *result = pos; 672 *result = pos;
674 status = 0; 673 status = 0;
diff --git a/fs/nfs/nfs4proc.c b/fs/nfs/nfs4proc.c
index 2e7c9f7a6f7c..627f37c44456 100644
--- a/fs/nfs/nfs4proc.c
+++ b/fs/nfs/nfs4proc.c
@@ -901,6 +901,7 @@ static void update_changeattr(struct inode *dir, struct nfs4_change_info *cinfo)
901 if (!cinfo->atomic || cinfo->before != dir->i_version) 901 if (!cinfo->atomic || cinfo->before != dir->i_version)
902 nfs_force_lookup_revalidate(dir); 902 nfs_force_lookup_revalidate(dir);
903 dir->i_version = cinfo->after; 903 dir->i_version = cinfo->after;
904 nfsi->attr_gencount = nfs_inc_attr_generation_counter();
904 nfs_fscache_invalidate(dir); 905 nfs_fscache_invalidate(dir);
905 spin_unlock(&dir->i_lock); 906 spin_unlock(&dir->i_lock);
906} 907}
@@ -1552,6 +1553,9 @@ static int nfs4_open_recover_helper(struct nfs4_opendata *opendata, fmode_t fmod
1552 1553
1553 opendata->o_arg.open_flags = 0; 1554 opendata->o_arg.open_flags = 0;
1554 opendata->o_arg.fmode = fmode; 1555 opendata->o_arg.fmode = fmode;
1556 opendata->o_arg.share_access = nfs4_map_atomic_open_share(
1557 NFS_SB(opendata->dentry->d_sb),
1558 fmode, 0);
1555 memset(&opendata->o_res, 0, sizeof(opendata->o_res)); 1559 memset(&opendata->o_res, 0, sizeof(opendata->o_res));
1556 memset(&opendata->c_res, 0, sizeof(opendata->c_res)); 1560 memset(&opendata->c_res, 0, sizeof(opendata->c_res));
1557 nfs4_init_opendata_res(opendata); 1561 nfs4_init_opendata_res(opendata);
@@ -2413,8 +2417,8 @@ static int _nfs4_do_open(struct inode *dir,
2413 opendata->o_res.f_attr, sattr, 2417 opendata->o_res.f_attr, sattr,
2414 state, label, olabel); 2418 state, label, olabel);
2415 if (status == 0) { 2419 if (status == 0) {
2416 nfs_setattr_update_inode(state->inode, sattr); 2420 nfs_setattr_update_inode(state->inode, sattr,
2417 nfs_post_op_update_inode(state->inode, opendata->o_res.f_attr); 2421 opendata->o_res.f_attr);
2418 nfs_setsecurity(state->inode, opendata->o_res.f_attr, olabel); 2422 nfs_setsecurity(state->inode, opendata->o_res.f_attr, olabel);
2419 } 2423 }
2420 } 2424 }
@@ -2651,7 +2655,7 @@ static void nfs4_close_done(struct rpc_task *task, void *data)
2651 case -NFS4ERR_BAD_STATEID: 2655 case -NFS4ERR_BAD_STATEID:
2652 case -NFS4ERR_EXPIRED: 2656 case -NFS4ERR_EXPIRED:
2653 if (!nfs4_stateid_match(&calldata->arg.stateid, 2657 if (!nfs4_stateid_match(&calldata->arg.stateid,
2654 &state->stateid)) { 2658 &state->open_stateid)) {
2655 rpc_restart_call_prepare(task); 2659 rpc_restart_call_prepare(task);
2656 goto out_release; 2660 goto out_release;
2657 } 2661 }
@@ -2687,7 +2691,7 @@ static void nfs4_close_prepare(struct rpc_task *task, void *data)
2687 is_rdwr = test_bit(NFS_O_RDWR_STATE, &state->flags); 2691 is_rdwr = test_bit(NFS_O_RDWR_STATE, &state->flags);
2688 is_rdonly = test_bit(NFS_O_RDONLY_STATE, &state->flags); 2692 is_rdonly = test_bit(NFS_O_RDONLY_STATE, &state->flags);
2689 is_wronly = test_bit(NFS_O_WRONLY_STATE, &state->flags); 2693 is_wronly = test_bit(NFS_O_WRONLY_STATE, &state->flags);
2690 nfs4_stateid_copy(&calldata->arg.stateid, &state->stateid); 2694 nfs4_stateid_copy(&calldata->arg.stateid, &state->open_stateid);
2691 /* Calculate the change in open mode */ 2695 /* Calculate the change in open mode */
2692 calldata->arg.fmode = 0; 2696 calldata->arg.fmode = 0;
2693 if (state->n_rdwr == 0) { 2697 if (state->n_rdwr == 0) {
@@ -3288,7 +3292,7 @@ nfs4_proc_setattr(struct dentry *dentry, struct nfs_fattr *fattr,
3288 3292
3289 status = nfs4_do_setattr(inode, cred, fattr, sattr, state, NULL, label); 3293 status = nfs4_do_setattr(inode, cred, fattr, sattr, state, NULL, label);
3290 if (status == 0) { 3294 if (status == 0) {
3291 nfs_setattr_update_inode(inode, sattr); 3295 nfs_setattr_update_inode(inode, sattr, fattr);
3292 nfs_setsecurity(inode, fattr, label); 3296 nfs_setsecurity(inode, fattr, label);
3293 } 3297 }
3294 nfs4_label_free(label); 3298 nfs4_label_free(label);
@@ -4234,7 +4238,7 @@ static int nfs4_write_done_cb(struct rpc_task *task,
4234 } 4238 }
4235 if (task->tk_status >= 0) { 4239 if (task->tk_status >= 0) {
4236 renew_lease(NFS_SERVER(inode), hdr->timestamp); 4240 renew_lease(NFS_SERVER(inode), hdr->timestamp);
4237 nfs_post_op_update_inode_force_wcc(inode, &hdr->fattr); 4241 nfs_writeback_update_inode(hdr);
4238 } 4242 }
4239 return 0; 4243 return 0;
4240} 4244}
@@ -6648,47 +6652,47 @@ nfs41_same_server_scope(struct nfs41_server_scope *a,
6648int nfs4_proc_bind_conn_to_session(struct nfs_client *clp, struct rpc_cred *cred) 6652int nfs4_proc_bind_conn_to_session(struct nfs_client *clp, struct rpc_cred *cred)
6649{ 6653{
6650 int status; 6654 int status;
6655 struct nfs41_bind_conn_to_session_args args = {
6656 .client = clp,
6657 .dir = NFS4_CDFC4_FORE_OR_BOTH,
6658 };
6651 struct nfs41_bind_conn_to_session_res res; 6659 struct nfs41_bind_conn_to_session_res res;
6652 struct rpc_message msg = { 6660 struct rpc_message msg = {
6653 .rpc_proc = 6661 .rpc_proc =
6654 &nfs4_procedures[NFSPROC4_CLNT_BIND_CONN_TO_SESSION], 6662 &nfs4_procedures[NFSPROC4_CLNT_BIND_CONN_TO_SESSION],
6655 .rpc_argp = clp, 6663 .rpc_argp = &args,
6656 .rpc_resp = &res, 6664 .rpc_resp = &res,
6657 .rpc_cred = cred, 6665 .rpc_cred = cred,
6658 }; 6666 };
6659 6667
6660 dprintk("--> %s\n", __func__); 6668 dprintk("--> %s\n", __func__);
6661 6669
6662 res.session = kzalloc(sizeof(struct nfs4_session), GFP_NOFS); 6670 nfs4_copy_sessionid(&args.sessionid, &clp->cl_session->sess_id);
6663 if (unlikely(res.session == NULL)) { 6671 if (!(clp->cl_session->flags & SESSION4_BACK_CHAN))
6664 status = -ENOMEM; 6672 args.dir = NFS4_CDFC4_FORE;
6665 goto out;
6666 }
6667 6673
6668 status = rpc_call_sync(clp->cl_rpcclient, &msg, RPC_TASK_TIMEOUT); 6674 status = rpc_call_sync(clp->cl_rpcclient, &msg, RPC_TASK_TIMEOUT);
6669 trace_nfs4_bind_conn_to_session(clp, status); 6675 trace_nfs4_bind_conn_to_session(clp, status);
6670 if (status == 0) { 6676 if (status == 0) {
6671 if (memcmp(res.session->sess_id.data, 6677 if (memcmp(res.sessionid.data,
6672 clp->cl_session->sess_id.data, NFS4_MAX_SESSIONID_LEN)) { 6678 clp->cl_session->sess_id.data, NFS4_MAX_SESSIONID_LEN)) {
6673 dprintk("NFS: %s: Session ID mismatch\n", __func__); 6679 dprintk("NFS: %s: Session ID mismatch\n", __func__);
6674 status = -EIO; 6680 status = -EIO;
6675 goto out_session; 6681 goto out;
6676 } 6682 }
6677 if (res.dir != NFS4_CDFS4_BOTH) { 6683 if ((res.dir & args.dir) != res.dir || res.dir == 0) {
6678 dprintk("NFS: %s: Unexpected direction from server\n", 6684 dprintk("NFS: %s: Unexpected direction from server\n",
6679 __func__); 6685 __func__);
6680 status = -EIO; 6686 status = -EIO;
6681 goto out_session; 6687 goto out;
6682 } 6688 }
6683 if (res.use_conn_in_rdma_mode) { 6689 if (res.use_conn_in_rdma_mode != args.use_conn_in_rdma_mode) {
6684 dprintk("NFS: %s: Server returned RDMA mode = true\n", 6690 dprintk("NFS: %s: Server returned RDMA mode = true\n",
6685 __func__); 6691 __func__);
6686 status = -EIO; 6692 status = -EIO;
6687 goto out_session; 6693 goto out;
6688 } 6694 }
6689 } 6695 }
6690out_session:
6691 kfree(res.session);
6692out: 6696out:
6693 dprintk("<-- %s status= %d\n", __func__, status); 6697 dprintk("<-- %s status= %d\n", __func__, status);
6694 return status; 6698 return status;
@@ -6893,9 +6897,13 @@ static int _nfs4_proc_exchange_id(struct nfs_client *clp, struct rpc_cred *cred,
6893 6897
6894 if (status == 0) { 6898 if (status == 0) {
6895 clp->cl_clientid = res.clientid; 6899 clp->cl_clientid = res.clientid;
6896 clp->cl_exchange_flags = (res.flags & ~EXCHGID4_FLAG_CONFIRMED_R); 6900 clp->cl_exchange_flags = res.flags;
6897 if (!(res.flags & EXCHGID4_FLAG_CONFIRMED_R)) 6901 /* Client ID is not confirmed */
6902 if (!(res.flags & EXCHGID4_FLAG_CONFIRMED_R)) {
6903 clear_bit(NFS4_SESSION_ESTABLISHED,
6904 &clp->cl_session->session_state);
6898 clp->cl_seqid = res.seqid; 6905 clp->cl_seqid = res.seqid;
6906 }
6899 6907
6900 kfree(clp->cl_serverowner); 6908 kfree(clp->cl_serverowner);
6901 clp->cl_serverowner = res.server_owner; 6909 clp->cl_serverowner = res.server_owner;
@@ -7166,10 +7174,11 @@ static void nfs4_init_channel_attrs(struct nfs41_create_session_args *args)
7166 args->bc_attrs.max_reqs); 7174 args->bc_attrs.max_reqs);
7167} 7175}
7168 7176
7169static int nfs4_verify_fore_channel_attrs(struct nfs41_create_session_args *args, struct nfs4_session *session) 7177static int nfs4_verify_fore_channel_attrs(struct nfs41_create_session_args *args,
7178 struct nfs41_create_session_res *res)
7170{ 7179{
7171 struct nfs4_channel_attrs *sent = &args->fc_attrs; 7180 struct nfs4_channel_attrs *sent = &args->fc_attrs;
7172 struct nfs4_channel_attrs *rcvd = &session->fc_attrs; 7181 struct nfs4_channel_attrs *rcvd = &res->fc_attrs;
7173 7182
7174 if (rcvd->max_resp_sz > sent->max_resp_sz) 7183 if (rcvd->max_resp_sz > sent->max_resp_sz)
7175 return -EINVAL; 7184 return -EINVAL;
@@ -7188,11 +7197,14 @@ static int nfs4_verify_fore_channel_attrs(struct nfs41_create_session_args *args
7188 return 0; 7197 return 0;
7189} 7198}
7190 7199
7191static int nfs4_verify_back_channel_attrs(struct nfs41_create_session_args *args, struct nfs4_session *session) 7200static int nfs4_verify_back_channel_attrs(struct nfs41_create_session_args *args,
7201 struct nfs41_create_session_res *res)
7192{ 7202{
7193 struct nfs4_channel_attrs *sent = &args->bc_attrs; 7203 struct nfs4_channel_attrs *sent = &args->bc_attrs;
7194 struct nfs4_channel_attrs *rcvd = &session->bc_attrs; 7204 struct nfs4_channel_attrs *rcvd = &res->bc_attrs;
7195 7205
7206 if (!(res->flags & SESSION4_BACK_CHAN))
7207 goto out;
7196 if (rcvd->max_rqst_sz > sent->max_rqst_sz) 7208 if (rcvd->max_rqst_sz > sent->max_rqst_sz)
7197 return -EINVAL; 7209 return -EINVAL;
7198 if (rcvd->max_resp_sz < sent->max_resp_sz) 7210 if (rcvd->max_resp_sz < sent->max_resp_sz)
@@ -7204,18 +7216,33 @@ static int nfs4_verify_back_channel_attrs(struct nfs41_create_session_args *args
7204 return -EINVAL; 7216 return -EINVAL;
7205 if (rcvd->max_reqs != sent->max_reqs) 7217 if (rcvd->max_reqs != sent->max_reqs)
7206 return -EINVAL; 7218 return -EINVAL;
7219out:
7207 return 0; 7220 return 0;
7208} 7221}
7209 7222
7210static int nfs4_verify_channel_attrs(struct nfs41_create_session_args *args, 7223static int nfs4_verify_channel_attrs(struct nfs41_create_session_args *args,
7211 struct nfs4_session *session) 7224 struct nfs41_create_session_res *res)
7212{ 7225{
7213 int ret; 7226 int ret;
7214 7227
7215 ret = nfs4_verify_fore_channel_attrs(args, session); 7228 ret = nfs4_verify_fore_channel_attrs(args, res);
7216 if (ret) 7229 if (ret)
7217 return ret; 7230 return ret;
7218 return nfs4_verify_back_channel_attrs(args, session); 7231 return nfs4_verify_back_channel_attrs(args, res);
7232}
7233
7234static void nfs4_update_session(struct nfs4_session *session,
7235 struct nfs41_create_session_res *res)
7236{
7237 nfs4_copy_sessionid(&session->sess_id, &res->sessionid);
7238 /* Mark client id and session as being confirmed */
7239 session->clp->cl_exchange_flags |= EXCHGID4_FLAG_CONFIRMED_R;
7240 set_bit(NFS4_SESSION_ESTABLISHED, &session->session_state);
7241 session->flags = res->flags;
7242 memcpy(&session->fc_attrs, &res->fc_attrs, sizeof(session->fc_attrs));
7243 if (res->flags & SESSION4_BACK_CHAN)
7244 memcpy(&session->bc_attrs, &res->bc_attrs,
7245 sizeof(session->bc_attrs));
7219} 7246}
7220 7247
7221static int _nfs4_proc_create_session(struct nfs_client *clp, 7248static int _nfs4_proc_create_session(struct nfs_client *clp,
@@ -7224,11 +7251,12 @@ static int _nfs4_proc_create_session(struct nfs_client *clp,
7224 struct nfs4_session *session = clp->cl_session; 7251 struct nfs4_session *session = clp->cl_session;
7225 struct nfs41_create_session_args args = { 7252 struct nfs41_create_session_args args = {
7226 .client = clp, 7253 .client = clp,
7254 .clientid = clp->cl_clientid,
7255 .seqid = clp->cl_seqid,
7227 .cb_program = NFS4_CALLBACK, 7256 .cb_program = NFS4_CALLBACK,
7228 }; 7257 };
7229 struct nfs41_create_session_res res = { 7258 struct nfs41_create_session_res res;
7230 .client = clp, 7259
7231 };
7232 struct rpc_message msg = { 7260 struct rpc_message msg = {
7233 .rpc_proc = &nfs4_procedures[NFSPROC4_CLNT_CREATE_SESSION], 7261 .rpc_proc = &nfs4_procedures[NFSPROC4_CLNT_CREATE_SESSION],
7234 .rpc_argp = &args, 7262 .rpc_argp = &args,
@@ -7245,11 +7273,15 @@ static int _nfs4_proc_create_session(struct nfs_client *clp,
7245 7273
7246 if (!status) { 7274 if (!status) {
7247 /* Verify the session's negotiated channel_attrs values */ 7275 /* Verify the session's negotiated channel_attrs values */
7248 status = nfs4_verify_channel_attrs(&args, session); 7276 status = nfs4_verify_channel_attrs(&args, &res);
7249 /* Increment the clientid slot sequence id */ 7277 /* Increment the clientid slot sequence id */
7250 clp->cl_seqid++; 7278 if (clp->cl_seqid == res.seqid)
7279 clp->cl_seqid++;
7280 if (status)
7281 goto out;
7282 nfs4_update_session(session, &res);
7251 } 7283 }
7252 7284out:
7253 return status; 7285 return status;
7254} 7286}
7255 7287
@@ -7301,8 +7333,8 @@ int nfs4_proc_destroy_session(struct nfs4_session *session,
7301 dprintk("--> nfs4_proc_destroy_session\n"); 7333 dprintk("--> nfs4_proc_destroy_session\n");
7302 7334
7303 /* session is still being setup */ 7335 /* session is still being setup */
7304 if (session->clp->cl_cons_state != NFS_CS_READY) 7336 if (!test_and_clear_bit(NFS4_SESSION_ESTABLISHED, &session->session_state))
7305 return status; 7337 return 0;
7306 7338
7307 status = rpc_call_sync(session->clp->cl_rpcclient, &msg, RPC_TASK_TIMEOUT); 7339 status = rpc_call_sync(session->clp->cl_rpcclient, &msg, RPC_TASK_TIMEOUT);
7308 trace_nfs4_destroy_session(session->clp, status); 7340 trace_nfs4_destroy_session(session->clp, status);
diff --git a/fs/nfs/nfs4session.c b/fs/nfs/nfs4session.c
index e799dc3c3b1d..e23366effcfb 100644
--- a/fs/nfs/nfs4session.c
+++ b/fs/nfs/nfs4session.c
@@ -450,7 +450,7 @@ int nfs4_setup_session_slot_tables(struct nfs4_session *ses)
450 tbl = &ses->fc_slot_table; 450 tbl = &ses->fc_slot_table;
451 tbl->session = ses; 451 tbl->session = ses;
452 status = nfs4_realloc_slot_table(tbl, ses->fc_attrs.max_reqs, 1); 452 status = nfs4_realloc_slot_table(tbl, ses->fc_attrs.max_reqs, 1);
453 if (status) /* -ENOMEM */ 453 if (status || !(ses->flags & SESSION4_BACK_CHAN)) /* -ENOMEM */
454 return status; 454 return status;
455 /* Back channel */ 455 /* Back channel */
456 tbl = &ses->bc_slot_table; 456 tbl = &ses->bc_slot_table;
diff --git a/fs/nfs/nfs4session.h b/fs/nfs/nfs4session.h
index b34ada9bc6a2..e3ea2c5324d6 100644
--- a/fs/nfs/nfs4session.h
+++ b/fs/nfs/nfs4session.h
@@ -70,6 +70,7 @@ struct nfs4_session {
70 70
71enum nfs4_session_state { 71enum nfs4_session_state {
72 NFS4_SESSION_INITING, 72 NFS4_SESSION_INITING,
73 NFS4_SESSION_ESTABLISHED,
73}; 74};
74 75
75extern int nfs4_setup_slot_table(struct nfs4_slot_table *tbl, 76extern int nfs4_setup_slot_table(struct nfs4_slot_table *tbl,
@@ -118,6 +119,12 @@ static inline int nfs4_has_persistent_session(const struct nfs_client *clp)
118 return 0; 119 return 0;
119} 120}
120 121
122static inline void nfs4_copy_sessionid(struct nfs4_sessionid *dst,
123 const struct nfs4_sessionid *src)
124{
125 memcpy(dst->data, src->data, NFS4_MAX_SESSIONID_LEN);
126}
127
121#ifdef CONFIG_CRC32 128#ifdef CONFIG_CRC32
122/* 129/*
123 * nfs_session_id_hash - calculate the crc32 hash for the session id 130 * nfs_session_id_hash - calculate the crc32 hash for the session id
diff --git a/fs/nfs/nfs4state.c b/fs/nfs/nfs4state.c
index 5ad908e9ce9c..f95e3b58bbc3 100644
--- a/fs/nfs/nfs4state.c
+++ b/fs/nfs/nfs4state.c
@@ -346,9 +346,23 @@ int nfs41_discover_server_trunking(struct nfs_client *clp,
346 status = nfs4_proc_exchange_id(clp, cred); 346 status = nfs4_proc_exchange_id(clp, cred);
347 if (status != NFS4_OK) 347 if (status != NFS4_OK)
348 return status; 348 return status;
349 set_bit(NFS4CLNT_LEASE_CONFIRM, &clp->cl_state);
350 349
351 return nfs41_walk_client_list(clp, result, cred); 350 status = nfs41_walk_client_list(clp, result, cred);
351 if (status < 0)
352 return status;
353 if (clp != *result)
354 return 0;
355
356 /* Purge state if the client id was established in a prior instance */
357 if (clp->cl_exchange_flags & EXCHGID4_FLAG_CONFIRMED_R)
358 set_bit(NFS4CLNT_PURGE_STATE, &clp->cl_state);
359 else
360 set_bit(NFS4CLNT_LEASE_CONFIRM, &clp->cl_state);
361 nfs4_schedule_state_manager(clp);
362 status = nfs_wait_client_init_complete(clp);
363 if (status < 0)
364 nfs_put_client(clp);
365 return status;
352} 366}
353 367
354#endif /* CONFIG_NFS_V4_1 */ 368#endif /* CONFIG_NFS_V4_1 */
diff --git a/fs/nfs/nfs4xdr.c b/fs/nfs/nfs4xdr.c
index e23a0a664e12..5c399ec41079 100644
--- a/fs/nfs/nfs4xdr.c
+++ b/fs/nfs/nfs4xdr.c
@@ -1715,17 +1715,17 @@ static void encode_secinfo(struct xdr_stream *xdr, const struct qstr *name, stru
1715#if defined(CONFIG_NFS_V4_1) 1715#if defined(CONFIG_NFS_V4_1)
1716/* NFSv4.1 operations */ 1716/* NFSv4.1 operations */
1717static void encode_bind_conn_to_session(struct xdr_stream *xdr, 1717static void encode_bind_conn_to_session(struct xdr_stream *xdr,
1718 struct nfs4_session *session, 1718 struct nfs41_bind_conn_to_session_args *args,
1719 struct compound_hdr *hdr) 1719 struct compound_hdr *hdr)
1720{ 1720{
1721 __be32 *p; 1721 __be32 *p;
1722 1722
1723 encode_op_hdr(xdr, OP_BIND_CONN_TO_SESSION, 1723 encode_op_hdr(xdr, OP_BIND_CONN_TO_SESSION,
1724 decode_bind_conn_to_session_maxsz, hdr); 1724 decode_bind_conn_to_session_maxsz, hdr);
1725 encode_opaque_fixed(xdr, session->sess_id.data, NFS4_MAX_SESSIONID_LEN); 1725 encode_opaque_fixed(xdr, args->sessionid.data, NFS4_MAX_SESSIONID_LEN);
1726 p = xdr_reserve_space(xdr, 8); 1726 p = xdr_reserve_space(xdr, 8);
1727 *p++ = cpu_to_be32(NFS4_CDFC4_BACK_OR_BOTH); 1727 *p++ = cpu_to_be32(args->dir);
1728 *p = 0; /* use_conn_in_rdma_mode = False */ 1728 *p = (args->use_conn_in_rdma_mode) ? cpu_to_be32(1) : cpu_to_be32(0);
1729} 1729}
1730 1730
1731static void encode_op_map(struct xdr_stream *xdr, struct nfs4_op_map *op_map) 1731static void encode_op_map(struct xdr_stream *xdr, struct nfs4_op_map *op_map)
@@ -1806,8 +1806,8 @@ static void encode_create_session(struct xdr_stream *xdr,
1806 1806
1807 encode_op_hdr(xdr, OP_CREATE_SESSION, decode_create_session_maxsz, hdr); 1807 encode_op_hdr(xdr, OP_CREATE_SESSION, decode_create_session_maxsz, hdr);
1808 p = reserve_space(xdr, 16 + 2*28 + 20 + clnt->cl_nodelen + 12); 1808 p = reserve_space(xdr, 16 + 2*28 + 20 + clnt->cl_nodelen + 12);
1809 p = xdr_encode_hyper(p, clp->cl_clientid); 1809 p = xdr_encode_hyper(p, args->clientid);
1810 *p++ = cpu_to_be32(clp->cl_seqid); /*Sequence id */ 1810 *p++ = cpu_to_be32(args->seqid); /*Sequence id */
1811 *p++ = cpu_to_be32(args->flags); /*flags */ 1811 *p++ = cpu_to_be32(args->flags); /*flags */
1812 1812
1813 /* Fore Channel */ 1813 /* Fore Channel */
@@ -2734,14 +2734,14 @@ static void nfs4_xdr_enc_fsid_present(struct rpc_rqst *req,
2734 */ 2734 */
2735static void nfs4_xdr_enc_bind_conn_to_session(struct rpc_rqst *req, 2735static void nfs4_xdr_enc_bind_conn_to_session(struct rpc_rqst *req,
2736 struct xdr_stream *xdr, 2736 struct xdr_stream *xdr,
2737 struct nfs_client *clp) 2737 struct nfs41_bind_conn_to_session_args *args)
2738{ 2738{
2739 struct compound_hdr hdr = { 2739 struct compound_hdr hdr = {
2740 .minorversion = clp->cl_mvops->minor_version, 2740 .minorversion = args->client->cl_mvops->minor_version,
2741 }; 2741 };
2742 2742
2743 encode_compound_hdr(xdr, req, &hdr); 2743 encode_compound_hdr(xdr, req, &hdr);
2744 encode_bind_conn_to_session(xdr, clp->cl_session, &hdr); 2744 encode_bind_conn_to_session(xdr, args, &hdr);
2745 encode_nops(&hdr); 2745 encode_nops(&hdr);
2746} 2746}
2747 2747
@@ -5613,7 +5613,7 @@ static int decode_bind_conn_to_session(struct xdr_stream *xdr,
5613 5613
5614 status = decode_op_hdr(xdr, OP_BIND_CONN_TO_SESSION); 5614 status = decode_op_hdr(xdr, OP_BIND_CONN_TO_SESSION);
5615 if (!status) 5615 if (!status)
5616 status = decode_sessionid(xdr, &res->session->sess_id); 5616 status = decode_sessionid(xdr, &res->sessionid);
5617 if (unlikely(status)) 5617 if (unlikely(status))
5618 return status; 5618 return status;
5619 5619
@@ -5641,12 +5641,10 @@ static int decode_create_session(struct xdr_stream *xdr,
5641{ 5641{
5642 __be32 *p; 5642 __be32 *p;
5643 int status; 5643 int status;
5644 struct nfs_client *clp = res->client;
5645 struct nfs4_session *session = clp->cl_session;
5646 5644
5647 status = decode_op_hdr(xdr, OP_CREATE_SESSION); 5645 status = decode_op_hdr(xdr, OP_CREATE_SESSION);
5648 if (!status) 5646 if (!status)
5649 status = decode_sessionid(xdr, &session->sess_id); 5647 status = decode_sessionid(xdr, &res->sessionid);
5650 if (unlikely(status)) 5648 if (unlikely(status))
5651 return status; 5649 return status;
5652 5650
@@ -5654,13 +5652,13 @@ static int decode_create_session(struct xdr_stream *xdr,
5654 p = xdr_inline_decode(xdr, 8); 5652 p = xdr_inline_decode(xdr, 8);
5655 if (unlikely(!p)) 5653 if (unlikely(!p))
5656 goto out_overflow; 5654 goto out_overflow;
5657 clp->cl_seqid = be32_to_cpup(p++); 5655 res->seqid = be32_to_cpup(p++);
5658 session->flags = be32_to_cpup(p); 5656 res->flags = be32_to_cpup(p);
5659 5657
5660 /* Channel attributes */ 5658 /* Channel attributes */
5661 status = decode_chan_attrs(xdr, &session->fc_attrs); 5659 status = decode_chan_attrs(xdr, &res->fc_attrs);
5662 if (!status) 5660 if (!status)
5663 status = decode_chan_attrs(xdr, &session->bc_attrs); 5661 status = decode_chan_attrs(xdr, &res->bc_attrs);
5664 return status; 5662 return status;
5665out_overflow: 5663out_overflow:
5666 print_overflow_msg(__func__, xdr); 5664 print_overflow_msg(__func__, xdr);
diff --git a/fs/nfs/pnfs.h b/fs/nfs/pnfs.h
index 797cd6253adf..635f0865671c 100644
--- a/fs/nfs/pnfs.h
+++ b/fs/nfs/pnfs.h
@@ -344,6 +344,10 @@ void nfs4_pnfs_ds_connect(struct nfs_server *mds_srv, struct nfs4_pnfs_ds *ds,
344struct nfs4_pnfs_ds_addr *nfs4_decode_mp_ds_addr(struct net *net, 344struct nfs4_pnfs_ds_addr *nfs4_decode_mp_ds_addr(struct net *net,
345 struct xdr_stream *xdr, 345 struct xdr_stream *xdr,
346 gfp_t gfp_flags); 346 gfp_t gfp_flags);
347void pnfs_layout_mark_request_commit(struct nfs_page *req,
348 struct pnfs_layout_segment *lseg,
349 struct nfs_commit_info *cinfo,
350 u32 ds_commit_idx);
347 351
348static inline bool nfs_have_layout(struct inode *inode) 352static inline bool nfs_have_layout(struct inode *inode)
349{ 353{
diff --git a/fs/nfs/pnfs_nfs.c b/fs/nfs/pnfs_nfs.c
index fdc4f6562bb7..54e36b38fb5f 100644
--- a/fs/nfs/pnfs_nfs.c
+++ b/fs/nfs/pnfs_nfs.c
@@ -838,3 +838,33 @@ out_err:
838 return NULL; 838 return NULL;
839} 839}
840EXPORT_SYMBOL_GPL(nfs4_decode_mp_ds_addr); 840EXPORT_SYMBOL_GPL(nfs4_decode_mp_ds_addr);
841
842void
843pnfs_layout_mark_request_commit(struct nfs_page *req,
844 struct pnfs_layout_segment *lseg,
845 struct nfs_commit_info *cinfo,
846 u32 ds_commit_idx)
847{
848 struct list_head *list;
849 struct pnfs_commit_bucket *buckets;
850
851 spin_lock(cinfo->lock);
852 buckets = cinfo->ds->buckets;
853 list = &buckets[ds_commit_idx].written;
854 if (list_empty(list)) {
855 /* Non-empty buckets hold a reference on the lseg. That ref
856 * is normally transferred to the COMMIT call and released
857 * there. It could also be released if the last req is pulled
858 * off due to a rewrite, in which case it will be done in
859 * pnfs_common_clear_request_commit
860 */
861 WARN_ON_ONCE(buckets[ds_commit_idx].wlseg != NULL);
862 buckets[ds_commit_idx].wlseg = pnfs_get_lseg(lseg);
863 }
864 set_bit(PG_COMMIT_TO_DS, &req->wb_flags);
865 cinfo->ds->nwritten++;
866 spin_unlock(cinfo->lock);
867
868 nfs_request_add_commit_list(req, list, cinfo);
869}
870EXPORT_SYMBOL_GPL(pnfs_layout_mark_request_commit);
diff --git a/fs/nfs/proc.c b/fs/nfs/proc.c
index b09cc23d6f43..c63189acd052 100644
--- a/fs/nfs/proc.c
+++ b/fs/nfs/proc.c
@@ -139,7 +139,7 @@ nfs_proc_setattr(struct dentry *dentry, struct nfs_fattr *fattr,
139 nfs_fattr_init(fattr); 139 nfs_fattr_init(fattr);
140 status = rpc_call_sync(NFS_CLIENT(inode), &msg, 0); 140 status = rpc_call_sync(NFS_CLIENT(inode), &msg, 0);
141 if (status == 0) 141 if (status == 0)
142 nfs_setattr_update_inode(inode, sattr); 142 nfs_setattr_update_inode(inode, sattr, fattr);
143 dprintk("NFS reply setattr: %d\n", status); 143 dprintk("NFS reply setattr: %d\n", status);
144 return status; 144 return status;
145} 145}
@@ -609,10 +609,8 @@ static int nfs_proc_pgio_rpc_prepare(struct rpc_task *task,
609 609
610static int nfs_write_done(struct rpc_task *task, struct nfs_pgio_header *hdr) 610static int nfs_write_done(struct rpc_task *task, struct nfs_pgio_header *hdr)
611{ 611{
612 struct inode *inode = hdr->inode;
613
614 if (task->tk_status >= 0) 612 if (task->tk_status >= 0)
615 nfs_post_op_update_inode_force_wcc(inode, hdr->res.fattr); 613 nfs_writeback_update_inode(hdr);
616 return 0; 614 return 0;
617} 615}
618 616
diff --git a/fs/nfs/write.c b/fs/nfs/write.c
index 88a6d2196ece..849ed784d6ac 100644
--- a/fs/nfs/write.c
+++ b/fs/nfs/write.c
@@ -789,13 +789,8 @@ nfs_request_add_commit_list(struct nfs_page *req, struct list_head *dst,
789 nfs_list_add_request(req, dst); 789 nfs_list_add_request(req, dst);
790 cinfo->mds->ncommit++; 790 cinfo->mds->ncommit++;
791 spin_unlock(cinfo->lock); 791 spin_unlock(cinfo->lock);
792 if (!cinfo->dreq) { 792 if (!cinfo->dreq)
793 inc_zone_page_state(req->wb_page, NR_UNSTABLE_NFS); 793 nfs_mark_page_unstable(req->wb_page);
794 inc_bdi_stat(inode_to_bdi(page_file_mapping(req->wb_page)->host),
795 BDI_RECLAIMABLE);
796 __mark_inode_dirty(req->wb_context->dentry->d_inode,
797 I_DIRTY_DATASYNC);
798 }
799} 794}
800EXPORT_SYMBOL_GPL(nfs_request_add_commit_list); 795EXPORT_SYMBOL_GPL(nfs_request_add_commit_list);
801 796
@@ -1382,6 +1377,36 @@ static int nfs_should_remove_suid(const struct inode *inode)
1382 return 0; 1377 return 0;
1383} 1378}
1384 1379
1380static void nfs_writeback_check_extend(struct nfs_pgio_header *hdr,
1381 struct nfs_fattr *fattr)
1382{
1383 struct nfs_pgio_args *argp = &hdr->args;
1384 struct nfs_pgio_res *resp = &hdr->res;
1385
1386 if (!(fattr->valid & NFS_ATTR_FATTR_SIZE))
1387 return;
1388 if (argp->offset + resp->count != fattr->size)
1389 return;
1390 if (nfs_size_to_loff_t(fattr->size) < i_size_read(hdr->inode))
1391 return;
1392 /* Set attribute barrier */
1393 nfs_fattr_set_barrier(fattr);
1394}
1395
1396void nfs_writeback_update_inode(struct nfs_pgio_header *hdr)
1397{
1398 struct nfs_fattr *fattr = hdr->res.fattr;
1399 struct inode *inode = hdr->inode;
1400
1401 if (fattr == NULL)
1402 return;
1403 spin_lock(&inode->i_lock);
1404 nfs_writeback_check_extend(hdr, fattr);
1405 nfs_post_op_update_inode_force_wcc_locked(inode, fattr);
1406 spin_unlock(&inode->i_lock);
1407}
1408EXPORT_SYMBOL_GPL(nfs_writeback_update_inode);
1409
1385/* 1410/*
1386 * This function is called when the WRITE call is complete. 1411 * This function is called when the WRITE call is complete.
1387 */ 1412 */
@@ -1605,11 +1630,8 @@ void nfs_retry_commit(struct list_head *page_list,
1605 req = nfs_list_entry(page_list->next); 1630 req = nfs_list_entry(page_list->next);
1606 nfs_list_remove_request(req); 1631 nfs_list_remove_request(req);
1607 nfs_mark_request_commit(req, lseg, cinfo, ds_commit_idx); 1632 nfs_mark_request_commit(req, lseg, cinfo, ds_commit_idx);
1608 if (!cinfo->dreq) { 1633 if (!cinfo->dreq)
1609 dec_zone_page_state(req->wb_page, NR_UNSTABLE_NFS); 1634 nfs_clear_page_commit(req->wb_page);
1610 dec_bdi_stat(inode_to_bdi(page_file_mapping(req->wb_page)->host),
1611 BDI_RECLAIMABLE);
1612 }
1613 nfs_unlock_and_release_request(req); 1635 nfs_unlock_and_release_request(req);
1614 } 1636 }
1615} 1637}
diff --git a/fs/nfsd/nfs4layouts.c b/fs/nfsd/nfs4layouts.c
index 3c1bfa155571..1028a0629543 100644
--- a/fs/nfsd/nfs4layouts.c
+++ b/fs/nfsd/nfs4layouts.c
@@ -587,8 +587,6 @@ nfsd4_cb_layout_fail(struct nfs4_layout_stateid *ls)
587 587
588 rpc_ntop((struct sockaddr *)&clp->cl_addr, addr_str, sizeof(addr_str)); 588 rpc_ntop((struct sockaddr *)&clp->cl_addr, addr_str, sizeof(addr_str));
589 589
590 nfsd4_cb_layout_fail(ls);
591
592 printk(KERN_WARNING 590 printk(KERN_WARNING
593 "nfsd: client %s failed to respond to layout recall. " 591 "nfsd: client %s failed to respond to layout recall. "
594 " Fencing..\n", addr_str); 592 " Fencing..\n", addr_str);
diff --git a/fs/nfsd/nfs4recover.c b/fs/nfsd/nfs4recover.c
index cc6a76072009..1c307f02baa8 100644
--- a/fs/nfsd/nfs4recover.c
+++ b/fs/nfsd/nfs4recover.c
@@ -583,7 +583,7 @@ nfs4_reset_recoverydir(char *recdir)
583 if (status) 583 if (status)
584 return status; 584 return status;
585 status = -ENOTDIR; 585 status = -ENOTDIR;
586 if (S_ISDIR(path.dentry->d_inode->i_mode)) { 586 if (d_is_dir(path.dentry)) {
587 strcpy(user_recovery_dirname, recdir); 587 strcpy(user_recovery_dirname, recdir);
588 status = 0; 588 status = 0;
589 } 589 }
@@ -1426,7 +1426,7 @@ nfsd4_client_tracking_init(struct net *net)
1426 nn->client_tracking_ops = &nfsd4_legacy_tracking_ops; 1426 nn->client_tracking_ops = &nfsd4_legacy_tracking_ops;
1427 status = kern_path(nfs4_recoverydir(), LOOKUP_FOLLOW, &path); 1427 status = kern_path(nfs4_recoverydir(), LOOKUP_FOLLOW, &path);
1428 if (!status) { 1428 if (!status) {
1429 status = S_ISDIR(path.dentry->d_inode->i_mode); 1429 status = d_is_dir(path.dentry);
1430 path_put(&path); 1430 path_put(&path);
1431 if (status) 1431 if (status)
1432 goto do_init; 1432 goto do_init;
diff --git a/fs/nfsd/nfs4state.c b/fs/nfsd/nfs4state.c
index f6b2a09f793f..d2f2c37dc2db 100644
--- a/fs/nfsd/nfs4state.c
+++ b/fs/nfsd/nfs4state.c
@@ -1638,7 +1638,7 @@ __destroy_client(struct nfs4_client *clp)
1638 nfs4_put_stid(&dp->dl_stid); 1638 nfs4_put_stid(&dp->dl_stid);
1639 } 1639 }
1640 while (!list_empty(&clp->cl_revoked)) { 1640 while (!list_empty(&clp->cl_revoked)) {
1641 dp = list_entry(reaplist.next, struct nfs4_delegation, dl_recall_lru); 1641 dp = list_entry(clp->cl_revoked.next, struct nfs4_delegation, dl_recall_lru);
1642 list_del_init(&dp->dl_recall_lru); 1642 list_del_init(&dp->dl_recall_lru);
1643 nfs4_put_stid(&dp->dl_stid); 1643 nfs4_put_stid(&dp->dl_stid);
1644 } 1644 }
diff --git a/fs/nfsd/nfsfh.c b/fs/nfsd/nfsfh.c
index 965b478d50fc..e9fa966fc37f 100644
--- a/fs/nfsd/nfsfh.c
+++ b/fs/nfsd/nfsfh.c
@@ -114,8 +114,8 @@ static inline __be32 check_pseudo_root(struct svc_rqst *rqstp,
114 * We're exposing only the directories and symlinks that have to be 114 * We're exposing only the directories and symlinks that have to be
115 * traversed on the way to real exports: 115 * traversed on the way to real exports:
116 */ 116 */
117 if (unlikely(!S_ISDIR(dentry->d_inode->i_mode) && 117 if (unlikely(!d_is_dir(dentry) &&
118 !S_ISLNK(dentry->d_inode->i_mode))) 118 !d_is_symlink(dentry)))
119 return nfserr_stale; 119 return nfserr_stale;
120 /* 120 /*
121 * A pseudoroot export gives permission to access only one 121 * A pseudoroot export gives permission to access only one
@@ -259,7 +259,7 @@ static __be32 nfsd_set_fh_dentry(struct svc_rqst *rqstp, struct svc_fh *fhp)
259 goto out; 259 goto out;
260 } 260 }
261 261
262 if (S_ISDIR(dentry->d_inode->i_mode) && 262 if (d_is_dir(dentry) &&
263 (dentry->d_flags & DCACHE_DISCONNECTED)) { 263 (dentry->d_flags & DCACHE_DISCONNECTED)) {
264 printk("nfsd: find_fh_dentry returned a DISCONNECTED directory: %pd2\n", 264 printk("nfsd: find_fh_dentry returned a DISCONNECTED directory: %pd2\n",
265 dentry); 265 dentry);
@@ -414,7 +414,7 @@ static inline void _fh_update_old(struct dentry *dentry,
414{ 414{
415 fh->ofh_ino = ino_t_to_u32(dentry->d_inode->i_ino); 415 fh->ofh_ino = ino_t_to_u32(dentry->d_inode->i_ino);
416 fh->ofh_generation = dentry->d_inode->i_generation; 416 fh->ofh_generation = dentry->d_inode->i_generation;
417 if (S_ISDIR(dentry->d_inode->i_mode) || 417 if (d_is_dir(dentry) ||
418 (exp->ex_flags & NFSEXP_NOSUBTREECHECK)) 418 (exp->ex_flags & NFSEXP_NOSUBTREECHECK))
419 fh->ofh_dirino = 0; 419 fh->ofh_dirino = 0;
420} 420}
diff --git a/fs/nfsd/vfs.c b/fs/nfsd/vfs.c
index 5685c679dd93..368526582429 100644
--- a/fs/nfsd/vfs.c
+++ b/fs/nfsd/vfs.c
@@ -615,9 +615,9 @@ nfsd_access(struct svc_rqst *rqstp, struct svc_fh *fhp, u32 *access, u32 *suppor
615 export = fhp->fh_export; 615 export = fhp->fh_export;
616 dentry = fhp->fh_dentry; 616 dentry = fhp->fh_dentry;
617 617
618 if (S_ISREG(dentry->d_inode->i_mode)) 618 if (d_is_reg(dentry))
619 map = nfs3_regaccess; 619 map = nfs3_regaccess;
620 else if (S_ISDIR(dentry->d_inode->i_mode)) 620 else if (d_is_dir(dentry))
621 map = nfs3_diraccess; 621 map = nfs3_diraccess;
622 else 622 else
623 map = nfs3_anyaccess; 623 map = nfs3_anyaccess;
@@ -1402,7 +1402,7 @@ do_nfsd_create(struct svc_rqst *rqstp, struct svc_fh *fhp,
1402 1402
1403 switch (createmode) { 1403 switch (createmode) {
1404 case NFS3_CREATE_UNCHECKED: 1404 case NFS3_CREATE_UNCHECKED:
1405 if (! S_ISREG(dchild->d_inode->i_mode)) 1405 if (! d_is_reg(dchild))
1406 goto out; 1406 goto out;
1407 else if (truncp) { 1407 else if (truncp) {
1408 /* in nfsv4, we need to treat this case a little 1408 /* in nfsv4, we need to treat this case a little
@@ -1615,7 +1615,7 @@ nfsd_link(struct svc_rqst *rqstp, struct svc_fh *ffhp,
1615 if (err) 1615 if (err)
1616 goto out; 1616 goto out;
1617 err = nfserr_isdir; 1617 err = nfserr_isdir;
1618 if (S_ISDIR(tfhp->fh_dentry->d_inode->i_mode)) 1618 if (d_is_dir(tfhp->fh_dentry))
1619 goto out; 1619 goto out;
1620 err = nfserr_perm; 1620 err = nfserr_perm;
1621 if (!len) 1621 if (!len)
diff --git a/fs/nilfs2/btree.c b/fs/nilfs2/btree.c
index b2e3ff347620..ecdbae19a766 100644
--- a/fs/nilfs2/btree.c
+++ b/fs/nilfs2/btree.c
@@ -31,6 +31,8 @@
31#include "alloc.h" 31#include "alloc.h"
32#include "dat.h" 32#include "dat.h"
33 33
34static void __nilfs_btree_init(struct nilfs_bmap *bmap);
35
34static struct nilfs_btree_path *nilfs_btree_alloc_path(void) 36static struct nilfs_btree_path *nilfs_btree_alloc_path(void)
35{ 37{
36 struct nilfs_btree_path *path; 38 struct nilfs_btree_path *path;
@@ -368,6 +370,34 @@ static int nilfs_btree_node_broken(const struct nilfs_btree_node *node,
368 return ret; 370 return ret;
369} 371}
370 372
373/**
374 * nilfs_btree_root_broken - verify consistency of btree root node
375 * @node: btree root node to be examined
376 * @ino: inode number
377 *
378 * Return Value: If node is broken, 1 is returned. Otherwise, 0 is returned.
379 */
380static int nilfs_btree_root_broken(const struct nilfs_btree_node *node,
381 unsigned long ino)
382{
383 int level, flags, nchildren;
384 int ret = 0;
385
386 level = nilfs_btree_node_get_level(node);
387 flags = nilfs_btree_node_get_flags(node);
388 nchildren = nilfs_btree_node_get_nchildren(node);
389
390 if (unlikely(level < NILFS_BTREE_LEVEL_NODE_MIN ||
391 level > NILFS_BTREE_LEVEL_MAX ||
392 nchildren < 0 ||
393 nchildren > NILFS_BTREE_ROOT_NCHILDREN_MAX)) {
394 pr_crit("NILFS: bad btree root (inode number=%lu): level = %d, flags = 0x%x, nchildren = %d\n",
395 ino, level, flags, nchildren);
396 ret = 1;
397 }
398 return ret;
399}
400
371int nilfs_btree_broken_node_block(struct buffer_head *bh) 401int nilfs_btree_broken_node_block(struct buffer_head *bh)
372{ 402{
373 int ret; 403 int ret;
@@ -1713,7 +1743,7 @@ nilfs_btree_commit_convert_and_insert(struct nilfs_bmap *btree,
1713 1743
1714 /* convert and insert */ 1744 /* convert and insert */
1715 dat = NILFS_BMAP_USE_VBN(btree) ? nilfs_bmap_get_dat(btree) : NULL; 1745 dat = NILFS_BMAP_USE_VBN(btree) ? nilfs_bmap_get_dat(btree) : NULL;
1716 nilfs_btree_init(btree); 1746 __nilfs_btree_init(btree);
1717 if (nreq != NULL) { 1747 if (nreq != NULL) {
1718 nilfs_bmap_commit_alloc_ptr(btree, dreq, dat); 1748 nilfs_bmap_commit_alloc_ptr(btree, dreq, dat);
1719 nilfs_bmap_commit_alloc_ptr(btree, nreq, dat); 1749 nilfs_bmap_commit_alloc_ptr(btree, nreq, dat);
@@ -2294,12 +2324,23 @@ static const struct nilfs_bmap_operations nilfs_btree_ops_gc = {
2294 .bop_gather_data = NULL, 2324 .bop_gather_data = NULL,
2295}; 2325};
2296 2326
2297int nilfs_btree_init(struct nilfs_bmap *bmap) 2327static void __nilfs_btree_init(struct nilfs_bmap *bmap)
2298{ 2328{
2299 bmap->b_ops = &nilfs_btree_ops; 2329 bmap->b_ops = &nilfs_btree_ops;
2300 bmap->b_nchildren_per_block = 2330 bmap->b_nchildren_per_block =
2301 NILFS_BTREE_NODE_NCHILDREN_MAX(nilfs_btree_node_size(bmap)); 2331 NILFS_BTREE_NODE_NCHILDREN_MAX(nilfs_btree_node_size(bmap));
2302 return 0; 2332}
2333
2334int nilfs_btree_init(struct nilfs_bmap *bmap)
2335{
2336 int ret = 0;
2337
2338 __nilfs_btree_init(bmap);
2339
2340 if (nilfs_btree_root_broken(nilfs_btree_get_root(bmap),
2341 bmap->b_inode->i_ino))
2342 ret = -EIO;
2343 return ret;
2303} 2344}
2304 2345
2305void nilfs_btree_init_gc(struct nilfs_bmap *bmap) 2346void nilfs_btree_init_gc(struct nilfs_bmap *bmap)
diff --git a/fs/nilfs2/segment.c b/fs/nilfs2/segment.c
index 469086b9f99b..0c3f303baf32 100644
--- a/fs/nilfs2/segment.c
+++ b/fs/nilfs2/segment.c
@@ -1907,6 +1907,7 @@ static void nilfs_segctor_drop_written_files(struct nilfs_sc_info *sci,
1907 struct the_nilfs *nilfs) 1907 struct the_nilfs *nilfs)
1908{ 1908{
1909 struct nilfs_inode_info *ii, *n; 1909 struct nilfs_inode_info *ii, *n;
1910 int during_mount = !(sci->sc_super->s_flags & MS_ACTIVE);
1910 int defer_iput = false; 1911 int defer_iput = false;
1911 1912
1912 spin_lock(&nilfs->ns_inode_lock); 1913 spin_lock(&nilfs->ns_inode_lock);
@@ -1919,10 +1920,10 @@ static void nilfs_segctor_drop_written_files(struct nilfs_sc_info *sci,
1919 brelse(ii->i_bh); 1920 brelse(ii->i_bh);
1920 ii->i_bh = NULL; 1921 ii->i_bh = NULL;
1921 list_del_init(&ii->i_dirty); 1922 list_del_init(&ii->i_dirty);
1922 if (!ii->vfs_inode.i_nlink) { 1923 if (!ii->vfs_inode.i_nlink || during_mount) {
1923 /* 1924 /*
1924 * Defer calling iput() to avoid a deadlock 1925 * Defer calling iput() to avoid deadlocks if
1925 * over I_SYNC flag for inodes with i_nlink == 0 1926 * i_nlink == 0 or mount is not yet finished.
1926 */ 1927 */
1927 list_add_tail(&ii->i_dirty, &sci->sc_iput_queue); 1928 list_add_tail(&ii->i_dirty, &sci->sc_iput_queue);
1928 defer_iput = true; 1929 defer_iput = true;
diff --git a/fs/notify/fanotify/fanotify.c b/fs/notify/fanotify/fanotify.c
index 51ceb8107284..d2f97ecca6a5 100644
--- a/fs/notify/fanotify/fanotify.c
+++ b/fs/notify/fanotify/fanotify.c
@@ -115,8 +115,8 @@ static bool fanotify_should_send_event(struct fsnotify_mark *inode_mark,
115 return false; 115 return false;
116 116
117 /* sorry, fanotify only gives a damn about files and dirs */ 117 /* sorry, fanotify only gives a damn about files and dirs */
118 if (!S_ISREG(path->dentry->d_inode->i_mode) && 118 if (!d_is_reg(path->dentry) &&
119 !S_ISDIR(path->dentry->d_inode->i_mode)) 119 !d_can_lookup(path->dentry))
120 return false; 120 return false;
121 121
122 if (inode_mark && vfsmnt_mark) { 122 if (inode_mark && vfsmnt_mark) {
@@ -139,11 +139,12 @@ static bool fanotify_should_send_event(struct fsnotify_mark *inode_mark,
139 BUG(); 139 BUG();
140 } 140 }
141 141
142 if (S_ISDIR(path->dentry->d_inode->i_mode) && 142 if (d_is_dir(path->dentry) &&
143 !(marks_mask & FS_ISDIR & ~marks_ignored_mask)) 143 !(marks_mask & FS_ISDIR & ~marks_ignored_mask))
144 return false; 144 return false;
145 145
146 if (event_mask & marks_mask & ~marks_ignored_mask) 146 if (event_mask & FAN_ALL_OUTGOING_EVENTS & marks_mask &
147 ~marks_ignored_mask)
147 return true; 148 return true;
148 149
149 return false; 150 return false;
diff --git a/fs/ocfs2/ocfs2.h b/fs/ocfs2/ocfs2.h
index 8490c64d34fe..460c6c37e683 100644
--- a/fs/ocfs2/ocfs2.h
+++ b/fs/ocfs2/ocfs2.h
@@ -502,7 +502,7 @@ static inline int ocfs2_writes_unwritten_extents(struct ocfs2_super *osb)
502 502
503static inline int ocfs2_supports_append_dio(struct ocfs2_super *osb) 503static inline int ocfs2_supports_append_dio(struct ocfs2_super *osb)
504{ 504{
505 if (osb->s_feature_ro_compat & OCFS2_FEATURE_RO_COMPAT_APPEND_DIO) 505 if (osb->s_feature_incompat & OCFS2_FEATURE_INCOMPAT_APPEND_DIO)
506 return 1; 506 return 1;
507 return 0; 507 return 0;
508} 508}
diff --git a/fs/ocfs2/ocfs2_fs.h b/fs/ocfs2/ocfs2_fs.h
index 20e37a3ed26f..db64ce2d4667 100644
--- a/fs/ocfs2/ocfs2_fs.h
+++ b/fs/ocfs2/ocfs2_fs.h
@@ -102,11 +102,11 @@
102 | OCFS2_FEATURE_INCOMPAT_INDEXED_DIRS \ 102 | OCFS2_FEATURE_INCOMPAT_INDEXED_DIRS \
103 | OCFS2_FEATURE_INCOMPAT_REFCOUNT_TREE \ 103 | OCFS2_FEATURE_INCOMPAT_REFCOUNT_TREE \
104 | OCFS2_FEATURE_INCOMPAT_DISCONTIG_BG \ 104 | OCFS2_FEATURE_INCOMPAT_DISCONTIG_BG \
105 | OCFS2_FEATURE_INCOMPAT_CLUSTERINFO) 105 | OCFS2_FEATURE_INCOMPAT_CLUSTERINFO \
106 | OCFS2_FEATURE_INCOMPAT_APPEND_DIO)
106#define OCFS2_FEATURE_RO_COMPAT_SUPP (OCFS2_FEATURE_RO_COMPAT_UNWRITTEN \ 107#define OCFS2_FEATURE_RO_COMPAT_SUPP (OCFS2_FEATURE_RO_COMPAT_UNWRITTEN \
107 | OCFS2_FEATURE_RO_COMPAT_USRQUOTA \ 108 | OCFS2_FEATURE_RO_COMPAT_USRQUOTA \
108 | OCFS2_FEATURE_RO_COMPAT_GRPQUOTA \ 109 | OCFS2_FEATURE_RO_COMPAT_GRPQUOTA)
109 | OCFS2_FEATURE_RO_COMPAT_APPEND_DIO)
110 110
111/* 111/*
112 * Heartbeat-only devices are missing journals and other files. The 112 * Heartbeat-only devices are missing journals and other files. The
@@ -179,6 +179,11 @@
179#define OCFS2_FEATURE_INCOMPAT_CLUSTERINFO 0x4000 179#define OCFS2_FEATURE_INCOMPAT_CLUSTERINFO 0x4000
180 180
181/* 181/*
182 * Append Direct IO support
183 */
184#define OCFS2_FEATURE_INCOMPAT_APPEND_DIO 0x8000
185
186/*
182 * backup superblock flag is used to indicate that this volume 187 * backup superblock flag is used to indicate that this volume
183 * has backup superblocks. 188 * has backup superblocks.
184 */ 189 */
@@ -200,10 +205,6 @@
200#define OCFS2_FEATURE_RO_COMPAT_USRQUOTA 0x0002 205#define OCFS2_FEATURE_RO_COMPAT_USRQUOTA 0x0002
201#define OCFS2_FEATURE_RO_COMPAT_GRPQUOTA 0x0004 206#define OCFS2_FEATURE_RO_COMPAT_GRPQUOTA 0x0004
202 207
203/*
204 * Append Direct IO support
205 */
206#define OCFS2_FEATURE_RO_COMPAT_APPEND_DIO 0x0008
207 208
208/* The byte offset of the first backup block will be 1G. 209/* The byte offset of the first backup block will be 1G.
209 * The following will be 4G, 16G, 64G, 256G and 1T. 210 * The following will be 4G, 16G, 64G, 256G and 1T.
diff --git a/fs/overlayfs/copy_up.c b/fs/overlayfs/copy_up.c
index ea10a8719107..24f640441bd9 100644
--- a/fs/overlayfs/copy_up.c
+++ b/fs/overlayfs/copy_up.c
@@ -191,7 +191,6 @@ int ovl_set_attr(struct dentry *upperdentry, struct kstat *stat)
191 ovl_set_timestamps(upperdentry, stat); 191 ovl_set_timestamps(upperdentry, stat);
192 192
193 return err; 193 return err;
194
195} 194}
196 195
197static int ovl_copy_up_locked(struct dentry *workdir, struct dentry *upperdir, 196static int ovl_copy_up_locked(struct dentry *workdir, struct dentry *upperdir,
@@ -385,7 +384,7 @@ int ovl_copy_up(struct dentry *dentry)
385 struct kstat stat; 384 struct kstat stat;
386 enum ovl_path_type type = ovl_path_type(dentry); 385 enum ovl_path_type type = ovl_path_type(dentry);
387 386
388 if (type != OVL_PATH_LOWER) 387 if (OVL_TYPE_UPPER(type))
389 break; 388 break;
390 389
391 next = dget(dentry); 390 next = dget(dentry);
@@ -394,7 +393,7 @@ int ovl_copy_up(struct dentry *dentry)
394 parent = dget_parent(next); 393 parent = dget_parent(next);
395 394
396 type = ovl_path_type(parent); 395 type = ovl_path_type(parent);
397 if (type != OVL_PATH_LOWER) 396 if (OVL_TYPE_UPPER(type))
398 break; 397 break;
399 398
400 dput(next); 399 dput(next);
diff --git a/fs/overlayfs/dir.c b/fs/overlayfs/dir.c
index 8ffc4b980f1b..d139405d2bfa 100644
--- a/fs/overlayfs/dir.c
+++ b/fs/overlayfs/dir.c
@@ -19,7 +19,7 @@ void ovl_cleanup(struct inode *wdir, struct dentry *wdentry)
19 int err; 19 int err;
20 20
21 dget(wdentry); 21 dget(wdentry);
22 if (S_ISDIR(wdentry->d_inode->i_mode)) 22 if (d_is_dir(wdentry))
23 err = ovl_do_rmdir(wdir, wdentry); 23 err = ovl_do_rmdir(wdir, wdentry);
24 else 24 else
25 err = ovl_do_unlink(wdir, wdentry); 25 err = ovl_do_unlink(wdir, wdentry);
@@ -118,14 +118,14 @@ int ovl_create_real(struct inode *dir, struct dentry *newdentry,
118 118
119static int ovl_set_opaque(struct dentry *upperdentry) 119static int ovl_set_opaque(struct dentry *upperdentry)
120{ 120{
121 return ovl_do_setxattr(upperdentry, ovl_opaque_xattr, "y", 1, 0); 121 return ovl_do_setxattr(upperdentry, OVL_XATTR_OPAQUE, "y", 1, 0);
122} 122}
123 123
124static void ovl_remove_opaque(struct dentry *upperdentry) 124static void ovl_remove_opaque(struct dentry *upperdentry)
125{ 125{
126 int err; 126 int err;
127 127
128 err = ovl_do_removexattr(upperdentry, ovl_opaque_xattr); 128 err = ovl_do_removexattr(upperdentry, OVL_XATTR_OPAQUE);
129 if (err) { 129 if (err) {
130 pr_warn("overlayfs: failed to remove opaque from '%s' (%i)\n", 130 pr_warn("overlayfs: failed to remove opaque from '%s' (%i)\n",
131 upperdentry->d_name.name, err); 131 upperdentry->d_name.name, err);
@@ -152,7 +152,7 @@ static int ovl_dir_getattr(struct vfsmount *mnt, struct dentry *dentry,
152 * correct link count. nlink=1 seems to pacify 'find' and 152 * correct link count. nlink=1 seems to pacify 'find' and
153 * other utilities. 153 * other utilities.
154 */ 154 */
155 if (type == OVL_PATH_MERGE) 155 if (OVL_TYPE_MERGE(type))
156 stat->nlink = 1; 156 stat->nlink = 1;
157 157
158 return 0; 158 return 0;
@@ -506,7 +506,7 @@ static int ovl_remove_and_whiteout(struct dentry *dentry, bool is_dir)
506 struct dentry *opaquedir = NULL; 506 struct dentry *opaquedir = NULL;
507 int err; 507 int err;
508 508
509 if (is_dir) { 509 if (is_dir && OVL_TYPE_MERGE_OR_LOWER(ovl_path_type(dentry))) {
510 opaquedir = ovl_check_empty_and_clear(dentry); 510 opaquedir = ovl_check_empty_and_clear(dentry);
511 err = PTR_ERR(opaquedir); 511 err = PTR_ERR(opaquedir);
512 if (IS_ERR(opaquedir)) 512 if (IS_ERR(opaquedir))
@@ -630,7 +630,7 @@ static int ovl_do_remove(struct dentry *dentry, bool is_dir)
630 goto out_drop_write; 630 goto out_drop_write;
631 631
632 type = ovl_path_type(dentry); 632 type = ovl_path_type(dentry);
633 if (type == OVL_PATH_PURE_UPPER) { 633 if (OVL_TYPE_PURE_UPPER(type)) {
634 err = ovl_remove_upper(dentry, is_dir); 634 err = ovl_remove_upper(dentry, is_dir);
635 } else { 635 } else {
636 const struct cred *old_cred; 636 const struct cred *old_cred;
@@ -693,7 +693,7 @@ static int ovl_rename2(struct inode *olddir, struct dentry *old,
693 bool new_create = false; 693 bool new_create = false;
694 bool cleanup_whiteout = false; 694 bool cleanup_whiteout = false;
695 bool overwrite = !(flags & RENAME_EXCHANGE); 695 bool overwrite = !(flags & RENAME_EXCHANGE);
696 bool is_dir = S_ISDIR(old->d_inode->i_mode); 696 bool is_dir = d_is_dir(old);
697 bool new_is_dir = false; 697 bool new_is_dir = false;
698 struct dentry *opaquedir = NULL; 698 struct dentry *opaquedir = NULL;
699 const struct cred *old_cred = NULL; 699 const struct cred *old_cred = NULL;
@@ -712,7 +712,7 @@ static int ovl_rename2(struct inode *olddir, struct dentry *old,
712 /* Don't copy up directory trees */ 712 /* Don't copy up directory trees */
713 old_type = ovl_path_type(old); 713 old_type = ovl_path_type(old);
714 err = -EXDEV; 714 err = -EXDEV;
715 if ((old_type == OVL_PATH_LOWER || old_type == OVL_PATH_MERGE) && is_dir) 715 if (OVL_TYPE_MERGE_OR_LOWER(old_type) && is_dir)
716 goto out; 716 goto out;
717 717
718 if (new->d_inode) { 718 if (new->d_inode) {
@@ -720,30 +720,30 @@ static int ovl_rename2(struct inode *olddir, struct dentry *old,
720 if (err) 720 if (err)
721 goto out; 721 goto out;
722 722
723 if (S_ISDIR(new->d_inode->i_mode)) 723 if (d_is_dir(new))
724 new_is_dir = true; 724 new_is_dir = true;
725 725
726 new_type = ovl_path_type(new); 726 new_type = ovl_path_type(new);
727 err = -EXDEV; 727 err = -EXDEV;
728 if (!overwrite && (new_type == OVL_PATH_LOWER || new_type == OVL_PATH_MERGE) && new_is_dir) 728 if (!overwrite && OVL_TYPE_MERGE_OR_LOWER(new_type) && new_is_dir)
729 goto out; 729 goto out;
730 730
731 err = 0; 731 err = 0;
732 if (new_type == OVL_PATH_LOWER && old_type == OVL_PATH_LOWER) { 732 if (!OVL_TYPE_UPPER(new_type) && !OVL_TYPE_UPPER(old_type)) {
733 if (ovl_dentry_lower(old)->d_inode == 733 if (ovl_dentry_lower(old)->d_inode ==
734 ovl_dentry_lower(new)->d_inode) 734 ovl_dentry_lower(new)->d_inode)
735 goto out; 735 goto out;
736 } 736 }
737 if (new_type != OVL_PATH_LOWER && old_type != OVL_PATH_LOWER) { 737 if (OVL_TYPE_UPPER(new_type) && OVL_TYPE_UPPER(old_type)) {
738 if (ovl_dentry_upper(old)->d_inode == 738 if (ovl_dentry_upper(old)->d_inode ==
739 ovl_dentry_upper(new)->d_inode) 739 ovl_dentry_upper(new)->d_inode)
740 goto out; 740 goto out;
741 } 741 }
742 } else { 742 } else {
743 if (ovl_dentry_is_opaque(new)) 743 if (ovl_dentry_is_opaque(new))
744 new_type = OVL_PATH_UPPER; 744 new_type = __OVL_PATH_UPPER;
745 else 745 else
746 new_type = OVL_PATH_PURE_UPPER; 746 new_type = __OVL_PATH_UPPER | __OVL_PATH_PURE;
747 } 747 }
748 748
749 err = ovl_want_write(old); 749 err = ovl_want_write(old);
@@ -763,8 +763,8 @@ static int ovl_rename2(struct inode *olddir, struct dentry *old,
763 goto out_drop_write; 763 goto out_drop_write;
764 } 764 }
765 765
766 old_opaque = old_type != OVL_PATH_PURE_UPPER; 766 old_opaque = !OVL_TYPE_PURE_UPPER(old_type);
767 new_opaque = new_type != OVL_PATH_PURE_UPPER; 767 new_opaque = !OVL_TYPE_PURE_UPPER(new_type);
768 768
769 if (old_opaque || new_opaque) { 769 if (old_opaque || new_opaque) {
770 err = -ENOMEM; 770 err = -ENOMEM;
@@ -787,7 +787,7 @@ static int ovl_rename2(struct inode *olddir, struct dentry *old,
787 old_cred = override_creds(override_cred); 787 old_cred = override_creds(override_cred);
788 } 788 }
789 789
790 if (overwrite && (new_type == OVL_PATH_LOWER || new_type == OVL_PATH_MERGE) && new_is_dir) { 790 if (overwrite && OVL_TYPE_MERGE_OR_LOWER(new_type) && new_is_dir) {
791 opaquedir = ovl_check_empty_and_clear(new); 791 opaquedir = ovl_check_empty_and_clear(new);
792 err = PTR_ERR(opaquedir); 792 err = PTR_ERR(opaquedir);
793 if (IS_ERR(opaquedir)) { 793 if (IS_ERR(opaquedir)) {
diff --git a/fs/overlayfs/inode.c b/fs/overlayfs/inode.c
index 07d74b24913b..04f124884687 100644
--- a/fs/overlayfs/inode.c
+++ b/fs/overlayfs/inode.c
@@ -205,7 +205,7 @@ static int ovl_readlink(struct dentry *dentry, char __user *buf, int bufsiz)
205 205
206static bool ovl_is_private_xattr(const char *name) 206static bool ovl_is_private_xattr(const char *name)
207{ 207{
208 return strncmp(name, "trusted.overlay.", 14) == 0; 208 return strncmp(name, OVL_XATTR_PRE_NAME, OVL_XATTR_PRE_LEN) == 0;
209} 209}
210 210
211int ovl_setxattr(struct dentry *dentry, const char *name, 211int ovl_setxattr(struct dentry *dentry, const char *name,
@@ -238,7 +238,10 @@ out:
238static bool ovl_need_xattr_filter(struct dentry *dentry, 238static bool ovl_need_xattr_filter(struct dentry *dentry,
239 enum ovl_path_type type) 239 enum ovl_path_type type)
240{ 240{
241 return type == OVL_PATH_UPPER && S_ISDIR(dentry->d_inode->i_mode); 241 if ((type & (__OVL_PATH_PURE | __OVL_PATH_UPPER)) == __OVL_PATH_UPPER)
242 return S_ISDIR(dentry->d_inode->i_mode);
243 else
244 return false;
242} 245}
243 246
244ssize_t ovl_getxattr(struct dentry *dentry, const char *name, 247ssize_t ovl_getxattr(struct dentry *dentry, const char *name,
@@ -299,7 +302,7 @@ int ovl_removexattr(struct dentry *dentry, const char *name)
299 if (ovl_need_xattr_filter(dentry, type) && ovl_is_private_xattr(name)) 302 if (ovl_need_xattr_filter(dentry, type) && ovl_is_private_xattr(name))
300 goto out_drop_write; 303 goto out_drop_write;
301 304
302 if (type == OVL_PATH_LOWER) { 305 if (!OVL_TYPE_UPPER(type)) {
303 err = vfs_getxattr(realpath.dentry, name, NULL, 0); 306 err = vfs_getxattr(realpath.dentry, name, NULL, 0);
304 if (err < 0) 307 if (err < 0)
305 goto out_drop_write; 308 goto out_drop_write;
@@ -321,7 +324,7 @@ out:
321static bool ovl_open_need_copy_up(int flags, enum ovl_path_type type, 324static bool ovl_open_need_copy_up(int flags, enum ovl_path_type type,
322 struct dentry *realdentry) 325 struct dentry *realdentry)
323{ 326{
324 if (type != OVL_PATH_LOWER) 327 if (OVL_TYPE_UPPER(type))
325 return false; 328 return false;
326 329
327 if (special_file(realdentry->d_inode->i_mode)) 330 if (special_file(realdentry->d_inode->i_mode))
@@ -430,5 +433,4 @@ struct inode *ovl_new_inode(struct super_block *sb, umode_t mode,
430 } 433 }
431 434
432 return inode; 435 return inode;
433
434} 436}
diff --git a/fs/overlayfs/overlayfs.h b/fs/overlayfs/overlayfs.h
index 814bed33dd07..17ac5afc9ffb 100644
--- a/fs/overlayfs/overlayfs.h
+++ b/fs/overlayfs/overlayfs.h
@@ -12,13 +12,20 @@
12struct ovl_entry; 12struct ovl_entry;
13 13
14enum ovl_path_type { 14enum ovl_path_type {
15 OVL_PATH_PURE_UPPER, 15 __OVL_PATH_PURE = (1 << 0),
16 OVL_PATH_UPPER, 16 __OVL_PATH_UPPER = (1 << 1),
17 OVL_PATH_MERGE, 17 __OVL_PATH_MERGE = (1 << 2),
18 OVL_PATH_LOWER,
19}; 18};
20 19
21extern const char *ovl_opaque_xattr; 20#define OVL_TYPE_UPPER(type) ((type) & __OVL_PATH_UPPER)
21#define OVL_TYPE_MERGE(type) ((type) & __OVL_PATH_MERGE)
22#define OVL_TYPE_PURE_UPPER(type) ((type) & __OVL_PATH_PURE)
23#define OVL_TYPE_MERGE_OR_LOWER(type) \
24 (OVL_TYPE_MERGE(type) || !OVL_TYPE_UPPER(type))
25
26#define OVL_XATTR_PRE_NAME "trusted.overlay."
27#define OVL_XATTR_PRE_LEN 16
28#define OVL_XATTR_OPAQUE OVL_XATTR_PRE_NAME"opaque"
22 29
23static inline int ovl_do_rmdir(struct inode *dir, struct dentry *dentry) 30static inline int ovl_do_rmdir(struct inode *dir, struct dentry *dentry)
24{ 31{
@@ -130,6 +137,7 @@ void ovl_dentry_version_inc(struct dentry *dentry);
130void ovl_path_upper(struct dentry *dentry, struct path *path); 137void ovl_path_upper(struct dentry *dentry, struct path *path);
131void ovl_path_lower(struct dentry *dentry, struct path *path); 138void ovl_path_lower(struct dentry *dentry, struct path *path);
132enum ovl_path_type ovl_path_real(struct dentry *dentry, struct path *path); 139enum ovl_path_type ovl_path_real(struct dentry *dentry, struct path *path);
140int ovl_path_next(int idx, struct dentry *dentry, struct path *path);
133struct dentry *ovl_dentry_upper(struct dentry *dentry); 141struct dentry *ovl_dentry_upper(struct dentry *dentry);
134struct dentry *ovl_dentry_lower(struct dentry *dentry); 142struct dentry *ovl_dentry_lower(struct dentry *dentry);
135struct dentry *ovl_dentry_real(struct dentry *dentry); 143struct dentry *ovl_dentry_real(struct dentry *dentry);
diff --git a/fs/overlayfs/readdir.c b/fs/overlayfs/readdir.c
index c0205990a9f5..907870e81a72 100644
--- a/fs/overlayfs/readdir.c
+++ b/fs/overlayfs/readdir.c
@@ -24,7 +24,6 @@ struct ovl_cache_entry {
24 struct list_head l_node; 24 struct list_head l_node;
25 struct rb_node node; 25 struct rb_node node;
26 bool is_whiteout; 26 bool is_whiteout;
27 bool is_cursor;
28 char name[]; 27 char name[];
29}; 28};
30 29
@@ -40,6 +39,7 @@ struct ovl_readdir_data {
40 struct rb_root root; 39 struct rb_root root;
41 struct list_head *list; 40 struct list_head *list;
42 struct list_head middle; 41 struct list_head middle;
42 struct dentry *dir;
43 int count; 43 int count;
44 int err; 44 int err;
45}; 45};
@@ -48,7 +48,7 @@ struct ovl_dir_file {
48 bool is_real; 48 bool is_real;
49 bool is_upper; 49 bool is_upper;
50 struct ovl_dir_cache *cache; 50 struct ovl_dir_cache *cache;
51 struct ovl_cache_entry cursor; 51 struct list_head *cursor;
52 struct file *realfile; 52 struct file *realfile;
53 struct file *upperfile; 53 struct file *upperfile;
54}; 54};
@@ -79,23 +79,49 @@ static struct ovl_cache_entry *ovl_cache_entry_find(struct rb_root *root,
79 return NULL; 79 return NULL;
80} 80}
81 81
82static struct ovl_cache_entry *ovl_cache_entry_new(const char *name, int len, 82static struct ovl_cache_entry *ovl_cache_entry_new(struct dentry *dir,
83 const char *name, int len,
83 u64 ino, unsigned int d_type) 84 u64 ino, unsigned int d_type)
84{ 85{
85 struct ovl_cache_entry *p; 86 struct ovl_cache_entry *p;
86 size_t size = offsetof(struct ovl_cache_entry, name[len + 1]); 87 size_t size = offsetof(struct ovl_cache_entry, name[len + 1]);
87 88
88 p = kmalloc(size, GFP_KERNEL); 89 p = kmalloc(size, GFP_KERNEL);
89 if (p) { 90 if (!p)
90 memcpy(p->name, name, len); 91 return NULL;
91 p->name[len] = '\0'; 92
92 p->len = len; 93 memcpy(p->name, name, len);
93 p->type = d_type; 94 p->name[len] = '\0';
94 p->ino = ino; 95 p->len = len;
95 p->is_whiteout = false; 96 p->type = d_type;
96 p->is_cursor = false; 97 p->ino = ino;
97 } 98 p->is_whiteout = false;
99
100 if (d_type == DT_CHR) {
101 struct dentry *dentry;
102 const struct cred *old_cred;
103 struct cred *override_cred;
104
105 override_cred = prepare_creds();
106 if (!override_cred) {
107 kfree(p);
108 return NULL;
109 }
110
111 /*
112 * CAP_DAC_OVERRIDE for lookup
113 */
114 cap_raise(override_cred->cap_effective, CAP_DAC_OVERRIDE);
115 old_cred = override_creds(override_cred);
98 116
117 dentry = lookup_one_len(name, dir, len);
118 if (!IS_ERR(dentry)) {
119 p->is_whiteout = ovl_is_whiteout(dentry);
120 dput(dentry);
121 }
122 revert_creds(old_cred);
123 put_cred(override_cred);
124 }
99 return p; 125 return p;
100} 126}
101 127
@@ -122,7 +148,7 @@ static int ovl_cache_entry_add_rb(struct ovl_readdir_data *rdd,
122 return 0; 148 return 0;
123 } 149 }
124 150
125 p = ovl_cache_entry_new(name, len, ino, d_type); 151 p = ovl_cache_entry_new(rdd->dir, name, len, ino, d_type);
126 if (p == NULL) 152 if (p == NULL)
127 return -ENOMEM; 153 return -ENOMEM;
128 154
@@ -143,7 +169,7 @@ static int ovl_fill_lower(struct ovl_readdir_data *rdd,
143 if (p) { 169 if (p) {
144 list_move_tail(&p->l_node, &rdd->middle); 170 list_move_tail(&p->l_node, &rdd->middle);
145 } else { 171 } else {
146 p = ovl_cache_entry_new(name, namelen, ino, d_type); 172 p = ovl_cache_entry_new(rdd->dir, name, namelen, ino, d_type);
147 if (p == NULL) 173 if (p == NULL)
148 rdd->err = -ENOMEM; 174 rdd->err = -ENOMEM;
149 else 175 else
@@ -168,7 +194,6 @@ static void ovl_cache_put(struct ovl_dir_file *od, struct dentry *dentry)
168{ 194{
169 struct ovl_dir_cache *cache = od->cache; 195 struct ovl_dir_cache *cache = od->cache;
170 196
171 list_del_init(&od->cursor.l_node);
172 WARN_ON(cache->refcount <= 0); 197 WARN_ON(cache->refcount <= 0);
173 cache->refcount--; 198 cache->refcount--;
174 if (!cache->refcount) { 199 if (!cache->refcount) {
@@ -204,6 +229,7 @@ static inline int ovl_dir_read(struct path *realpath,
204 if (IS_ERR(realfile)) 229 if (IS_ERR(realfile))
205 return PTR_ERR(realfile); 230 return PTR_ERR(realfile);
206 231
232 rdd->dir = realpath->dentry;
207 rdd->ctx.pos = 0; 233 rdd->ctx.pos = 0;
208 do { 234 do {
209 rdd->count = 0; 235 rdd->count = 0;
@@ -227,108 +253,58 @@ static void ovl_dir_reset(struct file *file)
227 if (cache && ovl_dentry_version_get(dentry) != cache->version) { 253 if (cache && ovl_dentry_version_get(dentry) != cache->version) {
228 ovl_cache_put(od, dentry); 254 ovl_cache_put(od, dentry);
229 od->cache = NULL; 255 od->cache = NULL;
256 od->cursor = NULL;
230 } 257 }
231 WARN_ON(!od->is_real && type != OVL_PATH_MERGE); 258 WARN_ON(!od->is_real && !OVL_TYPE_MERGE(type));
232 if (od->is_real && type == OVL_PATH_MERGE) 259 if (od->is_real && OVL_TYPE_MERGE(type))
233 od->is_real = false; 260 od->is_real = false;
234} 261}
235 262
236static int ovl_dir_mark_whiteouts(struct dentry *dir,
237 struct ovl_readdir_data *rdd)
238{
239 struct ovl_cache_entry *p;
240 struct dentry *dentry;
241 const struct cred *old_cred;
242 struct cred *override_cred;
243
244 override_cred = prepare_creds();
245 if (!override_cred) {
246 ovl_cache_free(rdd->list);
247 return -ENOMEM;
248 }
249
250 /*
251 * CAP_DAC_OVERRIDE for lookup
252 */
253 cap_raise(override_cred->cap_effective, CAP_DAC_OVERRIDE);
254 old_cred = override_creds(override_cred);
255
256 mutex_lock(&dir->d_inode->i_mutex);
257 list_for_each_entry(p, rdd->list, l_node) {
258 if (p->is_cursor)
259 continue;
260
261 if (p->type != DT_CHR)
262 continue;
263
264 dentry = lookup_one_len(p->name, dir, p->len);
265 if (IS_ERR(dentry))
266 continue;
267
268 p->is_whiteout = ovl_is_whiteout(dentry);
269 dput(dentry);
270 }
271 mutex_unlock(&dir->d_inode->i_mutex);
272
273 revert_creds(old_cred);
274 put_cred(override_cred);
275
276 return 0;
277}
278
279static int ovl_dir_read_merged(struct dentry *dentry, struct list_head *list) 263static int ovl_dir_read_merged(struct dentry *dentry, struct list_head *list)
280{ 264{
281 int err; 265 int err;
282 struct path lowerpath; 266 struct path realpath;
283 struct path upperpath;
284 struct ovl_readdir_data rdd = { 267 struct ovl_readdir_data rdd = {
285 .ctx.actor = ovl_fill_merge, 268 .ctx.actor = ovl_fill_merge,
286 .list = list, 269 .list = list,
287 .root = RB_ROOT, 270 .root = RB_ROOT,
288 .is_merge = false, 271 .is_merge = false,
289 }; 272 };
273 int idx, next;
290 274
291 ovl_path_lower(dentry, &lowerpath); 275 for (idx = 0; idx != -1; idx = next) {
292 ovl_path_upper(dentry, &upperpath); 276 next = ovl_path_next(idx, dentry, &realpath);
293 277
294 if (upperpath.dentry) { 278 if (next != -1) {
295 err = ovl_dir_read(&upperpath, &rdd); 279 err = ovl_dir_read(&realpath, &rdd);
296 if (err)
297 goto out;
298
299 if (lowerpath.dentry) {
300 err = ovl_dir_mark_whiteouts(upperpath.dentry, &rdd);
301 if (err) 280 if (err)
302 goto out; 281 break;
282 } else {
283 /*
284 * Insert lowest layer entries before upper ones, this
285 * allows offsets to be reasonably constant
286 */
287 list_add(&rdd.middle, rdd.list);
288 rdd.is_merge = true;
289 err = ovl_dir_read(&realpath, &rdd);
290 list_del(&rdd.middle);
303 } 291 }
304 } 292 }
305 if (lowerpath.dentry) {
306 /*
307 * Insert lowerpath entries before upperpath ones, this allows
308 * offsets to be reasonably constant
309 */
310 list_add(&rdd.middle, rdd.list);
311 rdd.is_merge = true;
312 err = ovl_dir_read(&lowerpath, &rdd);
313 list_del(&rdd.middle);
314 }
315out:
316 return err; 293 return err;
317} 294}
318 295
319static void ovl_seek_cursor(struct ovl_dir_file *od, loff_t pos) 296static void ovl_seek_cursor(struct ovl_dir_file *od, loff_t pos)
320{ 297{
321 struct ovl_cache_entry *p; 298 struct list_head *p;
322 loff_t off = 0; 299 loff_t off = 0;
323 300
324 list_for_each_entry(p, &od->cache->entries, l_node) { 301 list_for_each(p, &od->cache->entries) {
325 if (p->is_cursor)
326 continue;
327 if (off >= pos) 302 if (off >= pos)
328 break; 303 break;
329 off++; 304 off++;
330 } 305 }
331 list_move_tail(&od->cursor.l_node, &p->l_node); 306 /* Cursor is safe since the cache is stable */
307 od->cursor = p;
332} 308}
333 309
334static struct ovl_dir_cache *ovl_cache_get(struct dentry *dentry) 310static struct ovl_dir_cache *ovl_cache_get(struct dentry *dentry)
@@ -367,6 +343,7 @@ static int ovl_iterate(struct file *file, struct dir_context *ctx)
367{ 343{
368 struct ovl_dir_file *od = file->private_data; 344 struct ovl_dir_file *od = file->private_data;
369 struct dentry *dentry = file->f_path.dentry; 345 struct dentry *dentry = file->f_path.dentry;
346 struct ovl_cache_entry *p;
370 347
371 if (!ctx->pos) 348 if (!ctx->pos)
372 ovl_dir_reset(file); 349 ovl_dir_reset(file);
@@ -385,19 +362,13 @@ static int ovl_iterate(struct file *file, struct dir_context *ctx)
385 ovl_seek_cursor(od, ctx->pos); 362 ovl_seek_cursor(od, ctx->pos);
386 } 363 }
387 364
388 while (od->cursor.l_node.next != &od->cache->entries) { 365 while (od->cursor != &od->cache->entries) {
389 struct ovl_cache_entry *p; 366 p = list_entry(od->cursor, struct ovl_cache_entry, l_node);
390 367 if (!p->is_whiteout)
391 p = list_entry(od->cursor.l_node.next, struct ovl_cache_entry, l_node); 368 if (!dir_emit(ctx, p->name, p->len, p->ino, p->type))
392 /* Skip cursors */ 369 break;
393 if (!p->is_cursor) { 370 od->cursor = p->l_node.next;
394 if (!p->is_whiteout) { 371 ctx->pos++;
395 if (!dir_emit(ctx, p->name, p->len, p->ino, p->type))
396 break;
397 }
398 ctx->pos++;
399 }
400 list_move(&od->cursor.l_node, &p->l_node);
401 } 372 }
402 return 0; 373 return 0;
403} 374}
@@ -452,7 +423,7 @@ static int ovl_dir_fsync(struct file *file, loff_t start, loff_t end,
452 /* 423 /*
453 * Need to check if we started out being a lower dir, but got copied up 424 * Need to check if we started out being a lower dir, but got copied up
454 */ 425 */
455 if (!od->is_upper && ovl_path_type(dentry) != OVL_PATH_LOWER) { 426 if (!od->is_upper && OVL_TYPE_UPPER(ovl_path_type(dentry))) {
456 struct inode *inode = file_inode(file); 427 struct inode *inode = file_inode(file);
457 428
458 realfile = lockless_dereference(od->upperfile); 429 realfile = lockless_dereference(od->upperfile);
@@ -516,11 +487,9 @@ static int ovl_dir_open(struct inode *inode, struct file *file)
516 kfree(od); 487 kfree(od);
517 return PTR_ERR(realfile); 488 return PTR_ERR(realfile);
518 } 489 }
519 INIT_LIST_HEAD(&od->cursor.l_node);
520 od->realfile = realfile; 490 od->realfile = realfile;
521 od->is_real = (type != OVL_PATH_MERGE); 491 od->is_real = !OVL_TYPE_MERGE(type);
522 od->is_upper = (type != OVL_PATH_LOWER); 492 od->is_upper = OVL_TYPE_UPPER(type);
523 od->cursor.is_cursor = true;
524 file->private_data = od; 493 file->private_data = od;
525 494
526 return 0; 495 return 0;
diff --git a/fs/overlayfs/super.c b/fs/overlayfs/super.c
index f16d318b71f8..5f0d1993e6e3 100644
--- a/fs/overlayfs/super.c
+++ b/fs/overlayfs/super.c
@@ -35,7 +35,8 @@ struct ovl_config {
35/* private information held for overlayfs's superblock */ 35/* private information held for overlayfs's superblock */
36struct ovl_fs { 36struct ovl_fs {
37 struct vfsmount *upper_mnt; 37 struct vfsmount *upper_mnt;
38 struct vfsmount *lower_mnt; 38 unsigned numlower;
39 struct vfsmount **lower_mnt;
39 struct dentry *workdir; 40 struct dentry *workdir;
40 long lower_namelen; 41 long lower_namelen;
41 /* pathnames of lower and upper dirs, for show_options */ 42 /* pathnames of lower and upper dirs, for show_options */
@@ -47,7 +48,6 @@ struct ovl_dir_cache;
47/* private information held for every overlayfs dentry */ 48/* private information held for every overlayfs dentry */
48struct ovl_entry { 49struct ovl_entry {
49 struct dentry *__upperdentry; 50 struct dentry *__upperdentry;
50 struct dentry *lowerdentry;
51 struct ovl_dir_cache *cache; 51 struct ovl_dir_cache *cache;
52 union { 52 union {
53 struct { 53 struct {
@@ -56,30 +56,36 @@ struct ovl_entry {
56 }; 56 };
57 struct rcu_head rcu; 57 struct rcu_head rcu;
58 }; 58 };
59 unsigned numlower;
60 struct path lowerstack[];
59}; 61};
60 62
61const char *ovl_opaque_xattr = "trusted.overlay.opaque"; 63#define OVL_MAX_STACK 500
62 64
65static struct dentry *__ovl_dentry_lower(struct ovl_entry *oe)
66{
67 return oe->numlower ? oe->lowerstack[0].dentry : NULL;
68}
63 69
64enum ovl_path_type ovl_path_type(struct dentry *dentry) 70enum ovl_path_type ovl_path_type(struct dentry *dentry)
65{ 71{
66 struct ovl_entry *oe = dentry->d_fsdata; 72 struct ovl_entry *oe = dentry->d_fsdata;
73 enum ovl_path_type type = 0;
67 74
68 if (oe->__upperdentry) { 75 if (oe->__upperdentry) {
69 if (oe->lowerdentry) { 76 type = __OVL_PATH_UPPER;
77
78 if (oe->numlower) {
70 if (S_ISDIR(dentry->d_inode->i_mode)) 79 if (S_ISDIR(dentry->d_inode->i_mode))
71 return OVL_PATH_MERGE; 80 type |= __OVL_PATH_MERGE;
72 else 81 } else if (!oe->opaque) {
73 return OVL_PATH_UPPER; 82 type |= __OVL_PATH_PURE;
74 } else {
75 if (oe->opaque)
76 return OVL_PATH_UPPER;
77 else
78 return OVL_PATH_PURE_UPPER;
79 } 83 }
80 } else { 84 } else {
81 return OVL_PATH_LOWER; 85 if (oe->numlower > 1)
86 type |= __OVL_PATH_MERGE;
82 } 87 }
88 return type;
83} 89}
84 90
85static struct dentry *ovl_upperdentry_dereference(struct ovl_entry *oe) 91static struct dentry *ovl_upperdentry_dereference(struct ovl_entry *oe)
@@ -98,10 +104,9 @@ void ovl_path_upper(struct dentry *dentry, struct path *path)
98 104
99enum ovl_path_type ovl_path_real(struct dentry *dentry, struct path *path) 105enum ovl_path_type ovl_path_real(struct dentry *dentry, struct path *path)
100{ 106{
101
102 enum ovl_path_type type = ovl_path_type(dentry); 107 enum ovl_path_type type = ovl_path_type(dentry);
103 108
104 if (type == OVL_PATH_LOWER) 109 if (!OVL_TYPE_UPPER(type))
105 ovl_path_lower(dentry, path); 110 ovl_path_lower(dentry, path);
106 else 111 else
107 ovl_path_upper(dentry, path); 112 ovl_path_upper(dentry, path);
@@ -120,7 +125,7 @@ struct dentry *ovl_dentry_lower(struct dentry *dentry)
120{ 125{
121 struct ovl_entry *oe = dentry->d_fsdata; 126 struct ovl_entry *oe = dentry->d_fsdata;
122 127
123 return oe->lowerdentry; 128 return __ovl_dentry_lower(oe);
124} 129}
125 130
126struct dentry *ovl_dentry_real(struct dentry *dentry) 131struct dentry *ovl_dentry_real(struct dentry *dentry)
@@ -130,7 +135,7 @@ struct dentry *ovl_dentry_real(struct dentry *dentry)
130 135
131 realdentry = ovl_upperdentry_dereference(oe); 136 realdentry = ovl_upperdentry_dereference(oe);
132 if (!realdentry) 137 if (!realdentry)
133 realdentry = oe->lowerdentry; 138 realdentry = __ovl_dentry_lower(oe);
134 139
135 return realdentry; 140 return realdentry;
136} 141}
@@ -143,7 +148,7 @@ struct dentry *ovl_entry_real(struct ovl_entry *oe, bool *is_upper)
143 if (realdentry) { 148 if (realdentry) {
144 *is_upper = true; 149 *is_upper = true;
145 } else { 150 } else {
146 realdentry = oe->lowerdentry; 151 realdentry = __ovl_dentry_lower(oe);
147 *is_upper = false; 152 *is_upper = false;
148 } 153 }
149 return realdentry; 154 return realdentry;
@@ -165,11 +170,9 @@ void ovl_set_dir_cache(struct dentry *dentry, struct ovl_dir_cache *cache)
165 170
166void ovl_path_lower(struct dentry *dentry, struct path *path) 171void ovl_path_lower(struct dentry *dentry, struct path *path)
167{ 172{
168 struct ovl_fs *ofs = dentry->d_sb->s_fs_info;
169 struct ovl_entry *oe = dentry->d_fsdata; 173 struct ovl_entry *oe = dentry->d_fsdata;
170 174
171 path->mnt = ofs->lower_mnt; 175 *path = oe->numlower ? oe->lowerstack[0] : (struct path) { NULL, NULL };
172 path->dentry = oe->lowerdentry;
173} 176}
174 177
175int ovl_want_write(struct dentry *dentry) 178int ovl_want_write(struct dentry *dentry)
@@ -249,7 +252,7 @@ static bool ovl_is_opaquedir(struct dentry *dentry)
249 if (!S_ISDIR(inode->i_mode) || !inode->i_op->getxattr) 252 if (!S_ISDIR(inode->i_mode) || !inode->i_op->getxattr)
250 return false; 253 return false;
251 254
252 res = inode->i_op->getxattr(dentry, ovl_opaque_xattr, &val, 1); 255 res = inode->i_op->getxattr(dentry, OVL_XATTR_OPAQUE, &val, 1);
253 if (res == 1 && val == 'y') 256 if (res == 1 && val == 'y')
254 return true; 257 return true;
255 258
@@ -261,8 +264,11 @@ static void ovl_dentry_release(struct dentry *dentry)
261 struct ovl_entry *oe = dentry->d_fsdata; 264 struct ovl_entry *oe = dentry->d_fsdata;
262 265
263 if (oe) { 266 if (oe) {
267 unsigned int i;
268
264 dput(oe->__upperdentry); 269 dput(oe->__upperdentry);
265 dput(oe->lowerdentry); 270 for (i = 0; i < oe->numlower; i++)
271 dput(oe->lowerstack[i].dentry);
266 kfree_rcu(oe, rcu); 272 kfree_rcu(oe, rcu);
267 } 273 }
268} 274}
@@ -271,9 +277,15 @@ static const struct dentry_operations ovl_dentry_operations = {
271 .d_release = ovl_dentry_release, 277 .d_release = ovl_dentry_release,
272}; 278};
273 279
274static struct ovl_entry *ovl_alloc_entry(void) 280static struct ovl_entry *ovl_alloc_entry(unsigned int numlower)
275{ 281{
276 return kzalloc(sizeof(struct ovl_entry), GFP_KERNEL); 282 size_t size = offsetof(struct ovl_entry, lowerstack[numlower]);
283 struct ovl_entry *oe = kzalloc(size, GFP_KERNEL);
284
285 if (oe)
286 oe->numlower = numlower;
287
288 return oe;
277} 289}
278 290
279static inline struct dentry *ovl_lookup_real(struct dentry *dir, 291static inline struct dentry *ovl_lookup_real(struct dentry *dir,
@@ -295,82 +307,154 @@ static inline struct dentry *ovl_lookup_real(struct dentry *dir,
295 return dentry; 307 return dentry;
296} 308}
297 309
310/*
311 * Returns next layer in stack starting from top.
312 * Returns -1 if this is the last layer.
313 */
314int ovl_path_next(int idx, struct dentry *dentry, struct path *path)
315{
316 struct ovl_entry *oe = dentry->d_fsdata;
317
318 BUG_ON(idx < 0);
319 if (idx == 0) {
320 ovl_path_upper(dentry, path);
321 if (path->dentry)
322 return oe->numlower ? 1 : -1;
323 idx++;
324 }
325 BUG_ON(idx > oe->numlower);
326 *path = oe->lowerstack[idx - 1];
327
328 return (idx < oe->numlower) ? idx + 1 : -1;
329}
330
298struct dentry *ovl_lookup(struct inode *dir, struct dentry *dentry, 331struct dentry *ovl_lookup(struct inode *dir, struct dentry *dentry,
299 unsigned int flags) 332 unsigned int flags)
300{ 333{
301 struct ovl_entry *oe; 334 struct ovl_entry *oe;
302 struct dentry *upperdir; 335 struct ovl_entry *poe = dentry->d_parent->d_fsdata;
303 struct dentry *lowerdir; 336 struct path *stack = NULL;
304 struct dentry *upperdentry = NULL; 337 struct dentry *upperdir, *upperdentry = NULL;
305 struct dentry *lowerdentry = NULL; 338 unsigned int ctr = 0;
306 struct inode *inode = NULL; 339 struct inode *inode = NULL;
340 bool upperopaque = false;
341 struct dentry *this, *prev = NULL;
342 unsigned int i;
307 int err; 343 int err;
308 344
309 err = -ENOMEM; 345 upperdir = ovl_upperdentry_dereference(poe);
310 oe = ovl_alloc_entry();
311 if (!oe)
312 goto out;
313
314 upperdir = ovl_dentry_upper(dentry->d_parent);
315 lowerdir = ovl_dentry_lower(dentry->d_parent);
316
317 if (upperdir) { 346 if (upperdir) {
318 upperdentry = ovl_lookup_real(upperdir, &dentry->d_name); 347 this = ovl_lookup_real(upperdir, &dentry->d_name);
319 err = PTR_ERR(upperdentry); 348 err = PTR_ERR(this);
320 if (IS_ERR(upperdentry)) 349 if (IS_ERR(this))
321 goto out_put_dir; 350 goto out;
322 351
323 if (lowerdir && upperdentry) { 352 if (this) {
324 if (ovl_is_whiteout(upperdentry)) { 353 if (ovl_is_whiteout(this)) {
325 dput(upperdentry); 354 dput(this);
326 upperdentry = NULL; 355 this = NULL;
327 oe->opaque = true; 356 upperopaque = true;
328 } else if (ovl_is_opaquedir(upperdentry)) { 357 } else if (poe->numlower && ovl_is_opaquedir(this)) {
329 oe->opaque = true; 358 upperopaque = true;
330 } 359 }
331 } 360 }
361 upperdentry = prev = this;
332 } 362 }
333 if (lowerdir && !oe->opaque) { 363
334 lowerdentry = ovl_lookup_real(lowerdir, &dentry->d_name); 364 if (!upperopaque && poe->numlower) {
335 err = PTR_ERR(lowerdentry); 365 err = -ENOMEM;
336 if (IS_ERR(lowerdentry)) 366 stack = kcalloc(poe->numlower, sizeof(struct path), GFP_KERNEL);
337 goto out_dput_upper; 367 if (!stack)
368 goto out_put_upper;
338 } 369 }
339 370
340 if (lowerdentry && upperdentry && 371 for (i = 0; !upperopaque && i < poe->numlower; i++) {
341 (!S_ISDIR(upperdentry->d_inode->i_mode) || 372 bool opaque = false;
342 !S_ISDIR(lowerdentry->d_inode->i_mode))) { 373 struct path lowerpath = poe->lowerstack[i];
343 dput(lowerdentry); 374
344 lowerdentry = NULL; 375 this = ovl_lookup_real(lowerpath.dentry, &dentry->d_name);
345 oe->opaque = true; 376 err = PTR_ERR(this);
377 if (IS_ERR(this)) {
378 /*
379 * If it's positive, then treat ENAMETOOLONG as ENOENT.
380 */
381 if (err == -ENAMETOOLONG && (upperdentry || ctr))
382 continue;
383 goto out_put;
384 }
385 if (!this)
386 continue;
387 if (ovl_is_whiteout(this)) {
388 dput(this);
389 break;
390 }
391 /*
392 * Only makes sense to check opaque dir if this is not the
393 * lowermost layer.
394 */
395 if (i < poe->numlower - 1 && ovl_is_opaquedir(this))
396 opaque = true;
397
398 if (prev && (!S_ISDIR(prev->d_inode->i_mode) ||
399 !S_ISDIR(this->d_inode->i_mode))) {
400 /*
401 * FIXME: check for upper-opaqueness maybe better done
402 * in remove code.
403 */
404 if (prev == upperdentry)
405 upperopaque = true;
406 dput(this);
407 break;
408 }
409 /*
410 * If this is a non-directory then stop here.
411 */
412 if (!S_ISDIR(this->d_inode->i_mode))
413 opaque = true;
414
415 stack[ctr].dentry = this;
416 stack[ctr].mnt = lowerpath.mnt;
417 ctr++;
418 prev = this;
419 if (opaque)
420 break;
346 } 421 }
347 422
348 if (lowerdentry || upperdentry) { 423 oe = ovl_alloc_entry(ctr);
424 err = -ENOMEM;
425 if (!oe)
426 goto out_put;
427
428 if (upperdentry || ctr) {
349 struct dentry *realdentry; 429 struct dentry *realdentry;
350 430
351 realdentry = upperdentry ? upperdentry : lowerdentry; 431 realdentry = upperdentry ? upperdentry : stack[0].dentry;
432
352 err = -ENOMEM; 433 err = -ENOMEM;
353 inode = ovl_new_inode(dentry->d_sb, realdentry->d_inode->i_mode, 434 inode = ovl_new_inode(dentry->d_sb, realdentry->d_inode->i_mode,
354 oe); 435 oe);
355 if (!inode) 436 if (!inode)
356 goto out_dput; 437 goto out_free_oe;
357 ovl_copyattr(realdentry->d_inode, inode); 438 ovl_copyattr(realdentry->d_inode, inode);
358 } 439 }
359 440
441 oe->opaque = upperopaque;
360 oe->__upperdentry = upperdentry; 442 oe->__upperdentry = upperdentry;
361 oe->lowerdentry = lowerdentry; 443 memcpy(oe->lowerstack, stack, sizeof(struct path) * ctr);
362 444 kfree(stack);
363 dentry->d_fsdata = oe; 445 dentry->d_fsdata = oe;
364 d_add(dentry, inode); 446 d_add(dentry, inode);
365 447
366 return NULL; 448 return NULL;
367 449
368out_dput: 450out_free_oe:
369 dput(lowerdentry);
370out_dput_upper:
371 dput(upperdentry);
372out_put_dir:
373 kfree(oe); 451 kfree(oe);
452out_put:
453 for (i = 0; i < ctr; i++)
454 dput(stack[i].dentry);
455 kfree(stack);
456out_put_upper:
457 dput(upperdentry);
374out: 458out:
375 return ERR_PTR(err); 459 return ERR_PTR(err);
376} 460}
@@ -383,10 +467,12 @@ struct file *ovl_path_open(struct path *path, int flags)
383static void ovl_put_super(struct super_block *sb) 467static void ovl_put_super(struct super_block *sb)
384{ 468{
385 struct ovl_fs *ufs = sb->s_fs_info; 469 struct ovl_fs *ufs = sb->s_fs_info;
470 unsigned i;
386 471
387 dput(ufs->workdir); 472 dput(ufs->workdir);
388 mntput(ufs->upper_mnt); 473 mntput(ufs->upper_mnt);
389 mntput(ufs->lower_mnt); 474 for (i = 0; i < ufs->numlower; i++)
475 mntput(ufs->lower_mnt[i]);
390 476
391 kfree(ufs->config.lowerdir); 477 kfree(ufs->config.lowerdir);
392 kfree(ufs->config.upperdir); 478 kfree(ufs->config.upperdir);
@@ -400,7 +486,7 @@ static void ovl_put_super(struct super_block *sb)
400 * @buf: The struct kstatfs to fill in with stats 486 * @buf: The struct kstatfs to fill in with stats
401 * 487 *
402 * Get the filesystem statistics. As writes always target the upper layer 488 * Get the filesystem statistics. As writes always target the upper layer
403 * filesystem pass the statfs to the same filesystem. 489 * filesystem pass the statfs to the upper filesystem (if it exists)
404 */ 490 */
405static int ovl_statfs(struct dentry *dentry, struct kstatfs *buf) 491static int ovl_statfs(struct dentry *dentry, struct kstatfs *buf)
406{ 492{
@@ -409,7 +495,7 @@ static int ovl_statfs(struct dentry *dentry, struct kstatfs *buf)
409 struct path path; 495 struct path path;
410 int err; 496 int err;
411 497
412 ovl_path_upper(root_dentry, &path); 498 ovl_path_real(root_dentry, &path);
413 499
414 err = vfs_statfs(&path, buf); 500 err = vfs_statfs(&path, buf);
415 if (!err) { 501 if (!err) {
@@ -432,8 +518,20 @@ static int ovl_show_options(struct seq_file *m, struct dentry *dentry)
432 struct ovl_fs *ufs = sb->s_fs_info; 518 struct ovl_fs *ufs = sb->s_fs_info;
433 519
434 seq_printf(m, ",lowerdir=%s", ufs->config.lowerdir); 520 seq_printf(m, ",lowerdir=%s", ufs->config.lowerdir);
435 seq_printf(m, ",upperdir=%s", ufs->config.upperdir); 521 if (ufs->config.upperdir) {
436 seq_printf(m, ",workdir=%s", ufs->config.workdir); 522 seq_printf(m, ",upperdir=%s", ufs->config.upperdir);
523 seq_printf(m, ",workdir=%s", ufs->config.workdir);
524 }
525 return 0;
526}
527
528static int ovl_remount(struct super_block *sb, int *flags, char *data)
529{
530 struct ovl_fs *ufs = sb->s_fs_info;
531
532 if (!(*flags & MS_RDONLY) && !ufs->upper_mnt)
533 return -EROFS;
534
437 return 0; 535 return 0;
438} 536}
439 537
@@ -441,6 +539,7 @@ static const struct super_operations ovl_super_operations = {
441 .put_super = ovl_put_super, 539 .put_super = ovl_put_super,
442 .statfs = ovl_statfs, 540 .statfs = ovl_statfs,
443 .show_options = ovl_show_options, 541 .show_options = ovl_show_options,
542 .remount_fs = ovl_remount,
444}; 543};
445 544
446enum { 545enum {
@@ -515,9 +614,19 @@ static int ovl_parse_opt(char *opt, struct ovl_config *config)
515 break; 614 break;
516 615
517 default: 616 default:
617 pr_err("overlayfs: unrecognized mount option \"%s\" or missing value\n", p);
518 return -EINVAL; 618 return -EINVAL;
519 } 619 }
520 } 620 }
621
622 /* Workdir is useless in non-upper mount */
623 if (!config->upperdir && config->workdir) {
624 pr_info("overlayfs: option \"workdir=%s\" is useless in a non-upper mount, ignore\n",
625 config->workdir);
626 kfree(config->workdir);
627 config->workdir = NULL;
628 }
629
521 return 0; 630 return 0;
522} 631}
523 632
@@ -585,24 +694,6 @@ static void ovl_unescape(char *s)
585 } 694 }
586} 695}
587 696
588static int ovl_mount_dir(const char *name, struct path *path)
589{
590 int err;
591 char *tmp = kstrdup(name, GFP_KERNEL);
592
593 if (!tmp)
594 return -ENOMEM;
595
596 ovl_unescape(tmp);
597 err = kern_path(tmp, LOOKUP_FOLLOW, path);
598 if (err) {
599 pr_err("overlayfs: failed to resolve '%s': %i\n", tmp, err);
600 err = -EINVAL;
601 }
602 kfree(tmp);
603 return err;
604}
605
606static bool ovl_is_allowed_fs_type(struct dentry *root) 697static bool ovl_is_allowed_fs_type(struct dentry *root)
607{ 698{
608 const struct dentry_operations *dop = root->d_op; 699 const struct dentry_operations *dop = root->d_op;
@@ -622,6 +713,75 @@ static bool ovl_is_allowed_fs_type(struct dentry *root)
622 return true; 713 return true;
623} 714}
624 715
716static int ovl_mount_dir_noesc(const char *name, struct path *path)
717{
718 int err = -EINVAL;
719
720 if (!*name) {
721 pr_err("overlayfs: empty lowerdir\n");
722 goto out;
723 }
724 err = kern_path(name, LOOKUP_FOLLOW, path);
725 if (err) {
726 pr_err("overlayfs: failed to resolve '%s': %i\n", name, err);
727 goto out;
728 }
729 err = -EINVAL;
730 if (!ovl_is_allowed_fs_type(path->dentry)) {
731 pr_err("overlayfs: filesystem on '%s' not supported\n", name);
732 goto out_put;
733 }
734 if (!S_ISDIR(path->dentry->d_inode->i_mode)) {
735 pr_err("overlayfs: '%s' not a directory\n", name);
736 goto out_put;
737 }
738 return 0;
739
740out_put:
741 path_put(path);
742out:
743 return err;
744}
745
746static int ovl_mount_dir(const char *name, struct path *path)
747{
748 int err = -ENOMEM;
749 char *tmp = kstrdup(name, GFP_KERNEL);
750
751 if (tmp) {
752 ovl_unescape(tmp);
753 err = ovl_mount_dir_noesc(tmp, path);
754 kfree(tmp);
755 }
756 return err;
757}
758
759static int ovl_lower_dir(const char *name, struct path *path, long *namelen,
760 int *stack_depth)
761{
762 int err;
763 struct kstatfs statfs;
764
765 err = ovl_mount_dir_noesc(name, path);
766 if (err)
767 goto out;
768
769 err = vfs_statfs(path, &statfs);
770 if (err) {
771 pr_err("overlayfs: statfs failed on '%s'\n", name);
772 goto out_put;
773 }
774 *namelen = max(*namelen, statfs.f_namelen);
775 *stack_depth = max(*stack_depth, path->mnt->mnt_sb->s_stack_depth);
776
777 return 0;
778
779out_put:
780 path_put(path);
781out:
782 return err;
783}
784
625/* Workdir should not be subdir of upperdir and vice versa */ 785/* Workdir should not be subdir of upperdir and vice versa */
626static bool ovl_workdir_ok(struct dentry *workdir, struct dentry *upperdir) 786static bool ovl_workdir_ok(struct dentry *workdir, struct dentry *upperdir)
627{ 787{
@@ -634,16 +794,39 @@ static bool ovl_workdir_ok(struct dentry *workdir, struct dentry *upperdir)
634 return ok; 794 return ok;
635} 795}
636 796
797static unsigned int ovl_split_lowerdirs(char *str)
798{
799 unsigned int ctr = 1;
800 char *s, *d;
801
802 for (s = d = str;; s++, d++) {
803 if (*s == '\\') {
804 s++;
805 } else if (*s == ':') {
806 *d = '\0';
807 ctr++;
808 continue;
809 }
810 *d = *s;
811 if (!*s)
812 break;
813 }
814 return ctr;
815}
816
637static int ovl_fill_super(struct super_block *sb, void *data, int silent) 817static int ovl_fill_super(struct super_block *sb, void *data, int silent)
638{ 818{
639 struct path lowerpath; 819 struct path upperpath = { NULL, NULL };
640 struct path upperpath; 820 struct path workpath = { NULL, NULL };
641 struct path workpath;
642 struct inode *root_inode;
643 struct dentry *root_dentry; 821 struct dentry *root_dentry;
644 struct ovl_entry *oe; 822 struct ovl_entry *oe;
645 struct ovl_fs *ufs; 823 struct ovl_fs *ufs;
646 struct kstatfs statfs; 824 struct path *stack = NULL;
825 char *lowertmp;
826 char *lower;
827 unsigned int numlower;
828 unsigned int stacklen = 0;
829 unsigned int i;
647 int err; 830 int err;
648 831
649 err = -ENOMEM; 832 err = -ENOMEM;
@@ -655,123 +838,147 @@ static int ovl_fill_super(struct super_block *sb, void *data, int silent)
655 if (err) 838 if (err)
656 goto out_free_config; 839 goto out_free_config;
657 840
658 /* FIXME: workdir is not needed for a R/O mount */
659 err = -EINVAL; 841 err = -EINVAL;
660 if (!ufs->config.upperdir || !ufs->config.lowerdir || 842 if (!ufs->config.lowerdir) {
661 !ufs->config.workdir) { 843 pr_err("overlayfs: missing 'lowerdir'\n");
662 pr_err("overlayfs: missing upperdir or lowerdir or workdir\n");
663 goto out_free_config; 844 goto out_free_config;
664 } 845 }
665 846
666 err = -ENOMEM; 847 sb->s_stack_depth = 0;
667 oe = ovl_alloc_entry(); 848 if (ufs->config.upperdir) {
668 if (oe == NULL) 849 if (!ufs->config.workdir) {
669 goto out_free_config; 850 pr_err("overlayfs: missing 'workdir'\n");
670 851 goto out_free_config;
671 err = ovl_mount_dir(ufs->config.upperdir, &upperpath); 852 }
672 if (err)
673 goto out_free_oe;
674 853
675 err = ovl_mount_dir(ufs->config.lowerdir, &lowerpath); 854 err = ovl_mount_dir(ufs->config.upperdir, &upperpath);
676 if (err) 855 if (err)
677 goto out_put_upperpath; 856 goto out_free_config;
678 857
679 err = ovl_mount_dir(ufs->config.workdir, &workpath); 858 /* Upper fs should not be r/o */
680 if (err) 859 if (upperpath.mnt->mnt_sb->s_flags & MS_RDONLY) {
681 goto out_put_lowerpath; 860 pr_err("overlayfs: upper fs is r/o, try multi-lower layers mount\n");
861 err = -EINVAL;
862 goto out_put_upperpath;
863 }
682 864
683 err = -EINVAL; 865 err = ovl_mount_dir(ufs->config.workdir, &workpath);
684 if (!S_ISDIR(upperpath.dentry->d_inode->i_mode) || 866 if (err)
685 !S_ISDIR(lowerpath.dentry->d_inode->i_mode) || 867 goto out_put_upperpath;
686 !S_ISDIR(workpath.dentry->d_inode->i_mode)) {
687 pr_err("overlayfs: upperdir or lowerdir or workdir not a directory\n");
688 goto out_put_workpath;
689 }
690 868
691 if (upperpath.mnt != workpath.mnt) { 869 err = -EINVAL;
692 pr_err("overlayfs: workdir and upperdir must reside under the same mount\n"); 870 if (upperpath.mnt != workpath.mnt) {
693 goto out_put_workpath; 871 pr_err("overlayfs: workdir and upperdir must reside under the same mount\n");
872 goto out_put_workpath;
873 }
874 if (!ovl_workdir_ok(workpath.dentry, upperpath.dentry)) {
875 pr_err("overlayfs: workdir and upperdir must be separate subtrees\n");
876 goto out_put_workpath;
877 }
878 sb->s_stack_depth = upperpath.mnt->mnt_sb->s_stack_depth;
694 } 879 }
695 if (!ovl_workdir_ok(workpath.dentry, upperpath.dentry)) { 880 err = -ENOMEM;
696 pr_err("overlayfs: workdir and upperdir must be separate subtrees\n"); 881 lowertmp = kstrdup(ufs->config.lowerdir, GFP_KERNEL);
882 if (!lowertmp)
697 goto out_put_workpath; 883 goto out_put_workpath;
698 }
699 884
700 if (!ovl_is_allowed_fs_type(upperpath.dentry)) { 885 err = -EINVAL;
701 pr_err("overlayfs: filesystem of upperdir is not supported\n"); 886 stacklen = ovl_split_lowerdirs(lowertmp);
702 goto out_put_workpath; 887 if (stacklen > OVL_MAX_STACK) {
888 pr_err("overlayfs: too many lower directries, limit is %d\n",
889 OVL_MAX_STACK);
890 goto out_free_lowertmp;
891 } else if (!ufs->config.upperdir && stacklen == 1) {
892 pr_err("overlayfs: at least 2 lowerdir are needed while upperdir nonexistent\n");
893 goto out_free_lowertmp;
703 } 894 }
704 895
705 if (!ovl_is_allowed_fs_type(lowerpath.dentry)) { 896 stack = kcalloc(stacklen, sizeof(struct path), GFP_KERNEL);
706 pr_err("overlayfs: filesystem of lowerdir is not supported\n"); 897 if (!stack)
707 goto out_put_workpath; 898 goto out_free_lowertmp;
708 }
709 899
710 err = vfs_statfs(&lowerpath, &statfs); 900 lower = lowertmp;
711 if (err) { 901 for (numlower = 0; numlower < stacklen; numlower++) {
712 pr_err("overlayfs: statfs failed on lowerpath\n"); 902 err = ovl_lower_dir(lower, &stack[numlower],
713 goto out_put_workpath; 903 &ufs->lower_namelen, &sb->s_stack_depth);
714 } 904 if (err)
715 ufs->lower_namelen = statfs.f_namelen; 905 goto out_put_lowerpath;
716 906
717 sb->s_stack_depth = max(upperpath.mnt->mnt_sb->s_stack_depth, 907 lower = strchr(lower, '\0') + 1;
718 lowerpath.mnt->mnt_sb->s_stack_depth) + 1; 908 }
719 909
720 err = -EINVAL; 910 err = -EINVAL;
911 sb->s_stack_depth++;
721 if (sb->s_stack_depth > FILESYSTEM_MAX_STACK_DEPTH) { 912 if (sb->s_stack_depth > FILESYSTEM_MAX_STACK_DEPTH) {
722 pr_err("overlayfs: maximum fs stacking depth exceeded\n"); 913 pr_err("overlayfs: maximum fs stacking depth exceeded\n");
723 goto out_put_workpath; 914 goto out_put_lowerpath;
724 } 915 }
725 916
726 ufs->upper_mnt = clone_private_mount(&upperpath); 917 if (ufs->config.upperdir) {
727 err = PTR_ERR(ufs->upper_mnt); 918 ufs->upper_mnt = clone_private_mount(&upperpath);
728 if (IS_ERR(ufs->upper_mnt)) { 919 err = PTR_ERR(ufs->upper_mnt);
729 pr_err("overlayfs: failed to clone upperpath\n"); 920 if (IS_ERR(ufs->upper_mnt)) {
730 goto out_put_workpath; 921 pr_err("overlayfs: failed to clone upperpath\n");
731 } 922 goto out_put_lowerpath;
923 }
732 924
733 ufs->lower_mnt = clone_private_mount(&lowerpath); 925 ufs->workdir = ovl_workdir_create(ufs->upper_mnt, workpath.dentry);
734 err = PTR_ERR(ufs->lower_mnt); 926 err = PTR_ERR(ufs->workdir);
735 if (IS_ERR(ufs->lower_mnt)) { 927 if (IS_ERR(ufs->workdir)) {
736 pr_err("overlayfs: failed to clone lowerpath\n"); 928 pr_err("overlayfs: failed to create directory %s/%s\n",
737 goto out_put_upper_mnt; 929 ufs->config.workdir, OVL_WORKDIR_NAME);
930 goto out_put_upper_mnt;
931 }
738 } 932 }
739 933
740 ufs->workdir = ovl_workdir_create(ufs->upper_mnt, workpath.dentry); 934 err = -ENOMEM;
741 err = PTR_ERR(ufs->workdir); 935 ufs->lower_mnt = kcalloc(numlower, sizeof(struct vfsmount *), GFP_KERNEL);
742 if (IS_ERR(ufs->workdir)) { 936 if (ufs->lower_mnt == NULL)
743 pr_err("overlayfs: failed to create directory %s/%s\n", 937 goto out_put_workdir;
744 ufs->config.workdir, OVL_WORKDIR_NAME); 938 for (i = 0; i < numlower; i++) {
745 goto out_put_lower_mnt; 939 struct vfsmount *mnt = clone_private_mount(&stack[i]);
746 }
747 940
748 /* 941 err = PTR_ERR(mnt);
749 * Make lower_mnt R/O. That way fchmod/fchown on lower file 942 if (IS_ERR(mnt)) {
750 * will fail instead of modifying lower fs. 943 pr_err("overlayfs: failed to clone lowerpath\n");
751 */ 944 goto out_put_lower_mnt;
752 ufs->lower_mnt->mnt_flags |= MNT_READONLY; 945 }
946 /*
947 * Make lower_mnt R/O. That way fchmod/fchown on lower file
948 * will fail instead of modifying lower fs.
949 */
950 mnt->mnt_flags |= MNT_READONLY;
951
952 ufs->lower_mnt[ufs->numlower] = mnt;
953 ufs->numlower++;
954 }
753 955
754 /* If the upper fs is r/o, we mark overlayfs r/o too */ 956 /* If the upper fs is nonexistent, we mark overlayfs r/o too */
755 if (ufs->upper_mnt->mnt_sb->s_flags & MS_RDONLY) 957 if (!ufs->upper_mnt)
756 sb->s_flags |= MS_RDONLY; 958 sb->s_flags |= MS_RDONLY;
757 959
758 sb->s_d_op = &ovl_dentry_operations; 960 sb->s_d_op = &ovl_dentry_operations;
759 961
760 err = -ENOMEM; 962 err = -ENOMEM;
761 root_inode = ovl_new_inode(sb, S_IFDIR, oe); 963 oe = ovl_alloc_entry(numlower);
762 if (!root_inode) 964 if (!oe)
763 goto out_put_workdir; 965 goto out_put_lower_mnt;
764 966
765 root_dentry = d_make_root(root_inode); 967 root_dentry = d_make_root(ovl_new_inode(sb, S_IFDIR, oe));
766 if (!root_dentry) 968 if (!root_dentry)
767 goto out_put_workdir; 969 goto out_free_oe;
768 970
769 mntput(upperpath.mnt); 971 mntput(upperpath.mnt);
770 mntput(lowerpath.mnt); 972 for (i = 0; i < numlower; i++)
973 mntput(stack[i].mnt);
771 path_put(&workpath); 974 path_put(&workpath);
975 kfree(lowertmp);
772 976
773 oe->__upperdentry = upperpath.dentry; 977 oe->__upperdentry = upperpath.dentry;
774 oe->lowerdentry = lowerpath.dentry; 978 for (i = 0; i < numlower; i++) {
979 oe->lowerstack[i].dentry = stack[i].dentry;
980 oe->lowerstack[i].mnt = ufs->lower_mnt[i];
981 }
775 982
776 root_dentry->d_fsdata = oe; 983 root_dentry->d_fsdata = oe;
777 984
@@ -782,20 +989,26 @@ static int ovl_fill_super(struct super_block *sb, void *data, int silent)
782 989
783 return 0; 990 return 0;
784 991
992out_free_oe:
993 kfree(oe);
994out_put_lower_mnt:
995 for (i = 0; i < ufs->numlower; i++)
996 mntput(ufs->lower_mnt[i]);
997 kfree(ufs->lower_mnt);
785out_put_workdir: 998out_put_workdir:
786 dput(ufs->workdir); 999 dput(ufs->workdir);
787out_put_lower_mnt:
788 mntput(ufs->lower_mnt);
789out_put_upper_mnt: 1000out_put_upper_mnt:
790 mntput(ufs->upper_mnt); 1001 mntput(ufs->upper_mnt);
1002out_put_lowerpath:
1003 for (i = 0; i < numlower; i++)
1004 path_put(&stack[i]);
1005 kfree(stack);
1006out_free_lowertmp:
1007 kfree(lowertmp);
791out_put_workpath: 1008out_put_workpath:
792 path_put(&workpath); 1009 path_put(&workpath);
793out_put_lowerpath:
794 path_put(&lowerpath);
795out_put_upperpath: 1010out_put_upperpath:
796 path_put(&upperpath); 1011 path_put(&upperpath);
797out_free_oe:
798 kfree(oe);
799out_free_config: 1012out_free_config:
800 kfree(ufs->config.lowerdir); 1013 kfree(ufs->config.lowerdir);
801 kfree(ufs->config.upperdir); 1014 kfree(ufs->config.upperdir);
diff --git a/fs/posix_acl.c b/fs/posix_acl.c
index 0855f772cd41..3a48bb789c9f 100644
--- a/fs/posix_acl.c
+++ b/fs/posix_acl.c
@@ -564,13 +564,11 @@ posix_acl_create(struct inode *dir, umode_t *mode,
564 564
565 *acl = posix_acl_clone(p, GFP_NOFS); 565 *acl = posix_acl_clone(p, GFP_NOFS);
566 if (!*acl) 566 if (!*acl)
567 return -ENOMEM; 567 goto no_mem;
568 568
569 ret = posix_acl_create_masq(*acl, mode); 569 ret = posix_acl_create_masq(*acl, mode);
570 if (ret < 0) { 570 if (ret < 0)
571 posix_acl_release(*acl); 571 goto no_mem_clone;
572 return -ENOMEM;
573 }
574 572
575 if (ret == 0) { 573 if (ret == 0) {
576 posix_acl_release(*acl); 574 posix_acl_release(*acl);
@@ -591,6 +589,12 @@ no_acl:
591 *default_acl = NULL; 589 *default_acl = NULL;
592 *acl = NULL; 590 *acl = NULL;
593 return 0; 591 return 0;
592
593no_mem_clone:
594 posix_acl_release(*acl);
595no_mem:
596 posix_acl_release(p);
597 return -ENOMEM;
594} 598}
595EXPORT_SYMBOL_GPL(posix_acl_create); 599EXPORT_SYMBOL_GPL(posix_acl_create);
596 600
@@ -772,7 +776,7 @@ posix_acl_xattr_get(struct dentry *dentry, const char *name,
772 776
773 if (!IS_POSIXACL(dentry->d_inode)) 777 if (!IS_POSIXACL(dentry->d_inode))
774 return -EOPNOTSUPP; 778 return -EOPNOTSUPP;
775 if (S_ISLNK(dentry->d_inode->i_mode)) 779 if (d_is_symlink(dentry))
776 return -EOPNOTSUPP; 780 return -EOPNOTSUPP;
777 781
778 acl = get_acl(dentry->d_inode, type); 782 acl = get_acl(dentry->d_inode, type);
@@ -832,7 +836,7 @@ posix_acl_xattr_list(struct dentry *dentry, char *list, size_t list_size,
832 836
833 if (!IS_POSIXACL(dentry->d_inode)) 837 if (!IS_POSIXACL(dentry->d_inode))
834 return -EOPNOTSUPP; 838 return -EOPNOTSUPP;
835 if (S_ISLNK(dentry->d_inode->i_mode)) 839 if (d_is_symlink(dentry))
836 return -EOPNOTSUPP; 840 return -EOPNOTSUPP;
837 841
838 if (type == ACL_TYPE_ACCESS) 842 if (type == ACL_TYPE_ACCESS)
diff --git a/fs/proc/generic.c b/fs/proc/generic.c
index 3309f59d421b..be65b2082135 100644
--- a/fs/proc/generic.c
+++ b/fs/proc/generic.c
@@ -19,7 +19,6 @@
19#include <linux/mount.h> 19#include <linux/mount.h>
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/idr.h> 21#include <linux/idr.h>
22#include <linux/namei.h>
23#include <linux/bitops.h> 22#include <linux/bitops.h>
24#include <linux/spinlock.h> 23#include <linux/spinlock.h>
25#include <linux/completion.h> 24#include <linux/completion.h>
@@ -223,17 +222,6 @@ void proc_free_inum(unsigned int inum)
223 spin_unlock_irqrestore(&proc_inum_lock, flags); 222 spin_unlock_irqrestore(&proc_inum_lock, flags);
224} 223}
225 224
226static void *proc_follow_link(struct dentry *dentry, struct nameidata *nd)
227{
228 nd_set_link(nd, __PDE_DATA(dentry->d_inode));
229 return NULL;
230}
231
232static const struct inode_operations proc_link_inode_operations = {
233 .readlink = generic_readlink,
234 .follow_link = proc_follow_link,
235};
236
237/* 225/*
238 * Don't create negative dentries here, return -ENOENT by hand 226 * Don't create negative dentries here, return -ENOENT by hand
239 * instead. 227 * instead.
diff --git a/fs/proc/inode.c b/fs/proc/inode.c
index 13a50a32652d..7697b6621cfd 100644
--- a/fs/proc/inode.c
+++ b/fs/proc/inode.c
@@ -23,6 +23,7 @@
23#include <linux/slab.h> 23#include <linux/slab.h>
24#include <linux/mount.h> 24#include <linux/mount.h>
25#include <linux/magic.h> 25#include <linux/magic.h>
26#include <linux/namei.h>
26 27
27#include <asm/uaccess.h> 28#include <asm/uaccess.h>
28 29
@@ -393,6 +394,26 @@ static const struct file_operations proc_reg_file_ops_no_compat = {
393}; 394};
394#endif 395#endif
395 396
397static void *proc_follow_link(struct dentry *dentry, struct nameidata *nd)
398{
399 struct proc_dir_entry *pde = PDE(dentry->d_inode);
400 if (unlikely(!use_pde(pde)))
401 return ERR_PTR(-EINVAL);
402 nd_set_link(nd, pde->data);
403 return pde;
404}
405
406static void proc_put_link(struct dentry *dentry, struct nameidata *nd, void *p)
407{
408 unuse_pde(p);
409}
410
411const struct inode_operations proc_link_inode_operations = {
412 .readlink = generic_readlink,
413 .follow_link = proc_follow_link,
414 .put_link = proc_put_link,
415};
416
396struct inode *proc_get_inode(struct super_block *sb, struct proc_dir_entry *de) 417struct inode *proc_get_inode(struct super_block *sb, struct proc_dir_entry *de)
397{ 418{
398 struct inode *inode = new_inode_pseudo(sb); 419 struct inode *inode = new_inode_pseudo(sb);
diff --git a/fs/proc/internal.h b/fs/proc/internal.h
index 6fcdba573e0f..c835b94c0cd3 100644
--- a/fs/proc/internal.h
+++ b/fs/proc/internal.h
@@ -200,6 +200,7 @@ struct pde_opener {
200 int closing; 200 int closing;
201 struct completion *c; 201 struct completion *c;
202}; 202};
203extern const struct inode_operations proc_link_inode_operations;
203 204
204extern const struct inode_operations proc_pid_link_inode_operations; 205extern const struct inode_operations proc_pid_link_inode_operations;
205 206
diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c
index 956b75d61809..6dee68d013ff 100644
--- a/fs/proc/task_mmu.c
+++ b/fs/proc/task_mmu.c
@@ -1325,6 +1325,9 @@ out:
1325 1325
1326static int pagemap_open(struct inode *inode, struct file *file) 1326static int pagemap_open(struct inode *inode, struct file *file)
1327{ 1327{
1328 /* do not disclose physical addresses: attack vector */
1329 if (!capable(CAP_SYS_ADMIN))
1330 return -EPERM;
1328 pr_warn_once("Bits 55-60 of /proc/PID/pagemap entries are about " 1331 pr_warn_once("Bits 55-60 of /proc/PID/pagemap entries are about "
1329 "to stop being page-shift some time soon. See the " 1332 "to stop being page-shift some time soon. See the "
1330 "linux/Documentation/vm/pagemap.txt for details.\n"); 1333 "linux/Documentation/vm/pagemap.txt for details.\n");
diff --git a/fs/reiserfs/xattr.c b/fs/reiserfs/xattr.c
index 04b06146bae2..4e781e697c90 100644
--- a/fs/reiserfs/xattr.c
+++ b/fs/reiserfs/xattr.c
@@ -266,7 +266,7 @@ static int reiserfs_for_each_xattr(struct inode *inode,
266 for (i = 0; !err && i < buf.count && buf.dentries[i]; i++) { 266 for (i = 0; !err && i < buf.count && buf.dentries[i]; i++) {
267 struct dentry *dentry = buf.dentries[i]; 267 struct dentry *dentry = buf.dentries[i];
268 268
269 if (!S_ISDIR(dentry->d_inode->i_mode)) 269 if (!d_is_dir(dentry))
270 err = action(dentry, data); 270 err = action(dentry, data);
271 271
272 dput(dentry); 272 dput(dentry);
@@ -322,7 +322,7 @@ static int delete_one_xattr(struct dentry *dentry, void *data)
322 struct inode *dir = dentry->d_parent->d_inode; 322 struct inode *dir = dentry->d_parent->d_inode;
323 323
324 /* This is the xattr dir, handle specially. */ 324 /* This is the xattr dir, handle specially. */
325 if (S_ISDIR(dentry->d_inode->i_mode)) 325 if (d_is_dir(dentry))
326 return xattr_rmdir(dir, dentry); 326 return xattr_rmdir(dir, dentry);
327 327
328 return xattr_unlink(dir, dentry); 328 return xattr_unlink(dir, dentry);
diff --git a/fs/super.c b/fs/super.c
index 65a53efc1cf4..2b7dc90ccdbb 100644
--- a/fs/super.c
+++ b/fs/super.c
@@ -71,7 +71,7 @@ static unsigned long super_cache_scan(struct shrinker *shrink,
71 if (!(sc->gfp_mask & __GFP_FS)) 71 if (!(sc->gfp_mask & __GFP_FS))
72 return SHRINK_STOP; 72 return SHRINK_STOP;
73 73
74 if (!grab_super_passive(sb)) 74 if (!trylock_super(sb))
75 return SHRINK_STOP; 75 return SHRINK_STOP;
76 76
77 if (sb->s_op->nr_cached_objects) 77 if (sb->s_op->nr_cached_objects)
@@ -105,7 +105,7 @@ static unsigned long super_cache_scan(struct shrinker *shrink,
105 freed += sb->s_op->free_cached_objects(sb, sc); 105 freed += sb->s_op->free_cached_objects(sb, sc);
106 } 106 }
107 107
108 drop_super(sb); 108 up_read(&sb->s_umount);
109 return freed; 109 return freed;
110} 110}
111 111
@@ -118,7 +118,7 @@ static unsigned long super_cache_count(struct shrinker *shrink,
118 sb = container_of(shrink, struct super_block, s_shrink); 118 sb = container_of(shrink, struct super_block, s_shrink);
119 119
120 /* 120 /*
121 * Don't call grab_super_passive as it is a potential 121 * Don't call trylock_super as it is a potential
122 * scalability bottleneck. The counts could get updated 122 * scalability bottleneck. The counts could get updated
123 * between super_cache_count and super_cache_scan anyway. 123 * between super_cache_count and super_cache_scan anyway.
124 * Call to super_cache_count with shrinker_rwsem held 124 * Call to super_cache_count with shrinker_rwsem held
@@ -348,35 +348,31 @@ static int grab_super(struct super_block *s) __releases(sb_lock)
348} 348}
349 349
350/* 350/*
351 * grab_super_passive - acquire a passive reference 351 * trylock_super - try to grab ->s_umount shared
352 * @sb: reference we are trying to grab 352 * @sb: reference we are trying to grab
353 * 353 *
354 * Tries to acquire a passive reference. This is used in places where we 354 * Try to prevent fs shutdown. This is used in places where we
355 * cannot take an active reference but we need to ensure that the 355 * cannot take an active reference but we need to ensure that the
356 * superblock does not go away while we are working on it. It returns 356 * filesystem is not shut down while we are working on it. It returns
357 * false if a reference was not gained, and returns true with the s_umount 357 * false if we cannot acquire s_umount or if we lose the race and
358 * lock held in read mode if a reference is gained. On successful return, 358 * filesystem already got into shutdown, and returns true with the s_umount
359 * the caller must drop the s_umount lock and the passive reference when 359 * lock held in read mode in case of success. On successful return,
360 * done. 360 * the caller must drop the s_umount lock when done.
361 *
362 * Note that unlike get_super() et.al. this one does *not* bump ->s_count.
363 * The reason why it's safe is that we are OK with doing trylock instead
364 * of down_read(). There's a couple of places that are OK with that, but
365 * it's very much not a general-purpose interface.
361 */ 366 */
362bool grab_super_passive(struct super_block *sb) 367bool trylock_super(struct super_block *sb)
363{ 368{
364 spin_lock(&sb_lock);
365 if (hlist_unhashed(&sb->s_instances)) {
366 spin_unlock(&sb_lock);
367 return false;
368 }
369
370 sb->s_count++;
371 spin_unlock(&sb_lock);
372
373 if (down_read_trylock(&sb->s_umount)) { 369 if (down_read_trylock(&sb->s_umount)) {
374 if (sb->s_root && (sb->s_flags & MS_BORN)) 370 if (!hlist_unhashed(&sb->s_instances) &&
371 sb->s_root && (sb->s_flags & MS_BORN))
375 return true; 372 return true;
376 up_read(&sb->s_umount); 373 up_read(&sb->s_umount);
377 } 374 }
378 375
379 put_super(sb);
380 return false; 376 return false;
381} 377}
382 378
diff --git a/fs/xfs/Makefile b/fs/xfs/Makefile
index d61799949580..df6828570e87 100644
--- a/fs/xfs/Makefile
+++ b/fs/xfs/Makefile
@@ -121,3 +121,4 @@ xfs-$(CONFIG_XFS_POSIX_ACL) += xfs_acl.o
121xfs-$(CONFIG_PROC_FS) += xfs_stats.o 121xfs-$(CONFIG_PROC_FS) += xfs_stats.o
122xfs-$(CONFIG_SYSCTL) += xfs_sysctl.o 122xfs-$(CONFIG_SYSCTL) += xfs_sysctl.o
123xfs-$(CONFIG_COMPAT) += xfs_ioctl32.o 123xfs-$(CONFIG_COMPAT) += xfs_ioctl32.o
124xfs-$(CONFIG_NFSD_PNFS) += xfs_pnfs.o
diff --git a/fs/xfs/xfs_export.c b/fs/xfs/xfs_export.c
index 5eb4a14e0a0f..b97359ba2648 100644
--- a/fs/xfs/xfs_export.c
+++ b/fs/xfs/xfs_export.c
@@ -30,6 +30,7 @@
30#include "xfs_trace.h" 30#include "xfs_trace.h"
31#include "xfs_icache.h" 31#include "xfs_icache.h"
32#include "xfs_log.h" 32#include "xfs_log.h"
33#include "xfs_pnfs.h"
33 34
34/* 35/*
35 * Note that we only accept fileids which are long enough rather than allow 36 * Note that we only accept fileids which are long enough rather than allow
@@ -245,4 +246,9 @@ const struct export_operations xfs_export_operations = {
245 .fh_to_parent = xfs_fs_fh_to_parent, 246 .fh_to_parent = xfs_fs_fh_to_parent,
246 .get_parent = xfs_fs_get_parent, 247 .get_parent = xfs_fs_get_parent,
247 .commit_metadata = xfs_fs_nfs_commit_metadata, 248 .commit_metadata = xfs_fs_nfs_commit_metadata,
249#ifdef CONFIG_NFSD_PNFS
250 .get_uuid = xfs_fs_get_uuid,
251 .map_blocks = xfs_fs_map_blocks,
252 .commit_blocks = xfs_fs_commit_blocks,
253#endif
248}; 254};
diff --git a/fs/xfs/xfs_file.c b/fs/xfs/xfs_file.c
index 1cdba95c78cb..a2e1cb8a568b 100644
--- a/fs/xfs/xfs_file.c
+++ b/fs/xfs/xfs_file.c
@@ -36,6 +36,7 @@
36#include "xfs_trace.h" 36#include "xfs_trace.h"
37#include "xfs_log.h" 37#include "xfs_log.h"
38#include "xfs_icache.h" 38#include "xfs_icache.h"
39#include "xfs_pnfs.h"
39 40
40#include <linux/aio.h> 41#include <linux/aio.h>
41#include <linux/dcache.h> 42#include <linux/dcache.h>
@@ -396,7 +397,8 @@ STATIC int /* error (positive) */
396xfs_zero_last_block( 397xfs_zero_last_block(
397 struct xfs_inode *ip, 398 struct xfs_inode *ip,
398 xfs_fsize_t offset, 399 xfs_fsize_t offset,
399 xfs_fsize_t isize) 400 xfs_fsize_t isize,
401 bool *did_zeroing)
400{ 402{
401 struct xfs_mount *mp = ip->i_mount; 403 struct xfs_mount *mp = ip->i_mount;
402 xfs_fileoff_t last_fsb = XFS_B_TO_FSBT(mp, isize); 404 xfs_fileoff_t last_fsb = XFS_B_TO_FSBT(mp, isize);
@@ -424,6 +426,7 @@ xfs_zero_last_block(
424 zero_len = mp->m_sb.sb_blocksize - zero_offset; 426 zero_len = mp->m_sb.sb_blocksize - zero_offset;
425 if (isize + zero_len > offset) 427 if (isize + zero_len > offset)
426 zero_len = offset - isize; 428 zero_len = offset - isize;
429 *did_zeroing = true;
427 return xfs_iozero(ip, isize, zero_len); 430 return xfs_iozero(ip, isize, zero_len);
428} 431}
429 432
@@ -442,7 +445,8 @@ int /* error (positive) */
442xfs_zero_eof( 445xfs_zero_eof(
443 struct xfs_inode *ip, 446 struct xfs_inode *ip,
444 xfs_off_t offset, /* starting I/O offset */ 447 xfs_off_t offset, /* starting I/O offset */
445 xfs_fsize_t isize) /* current inode size */ 448 xfs_fsize_t isize, /* current inode size */
449 bool *did_zeroing)
446{ 450{
447 struct xfs_mount *mp = ip->i_mount; 451 struct xfs_mount *mp = ip->i_mount;
448 xfs_fileoff_t start_zero_fsb; 452 xfs_fileoff_t start_zero_fsb;
@@ -464,7 +468,7 @@ xfs_zero_eof(
464 * We only zero a part of that block so it is handled specially. 468 * We only zero a part of that block so it is handled specially.
465 */ 469 */
466 if (XFS_B_FSB_OFFSET(mp, isize) != 0) { 470 if (XFS_B_FSB_OFFSET(mp, isize) != 0) {
467 error = xfs_zero_last_block(ip, offset, isize); 471 error = xfs_zero_last_block(ip, offset, isize, did_zeroing);
468 if (error) 472 if (error)
469 return error; 473 return error;
470 } 474 }
@@ -524,6 +528,7 @@ xfs_zero_eof(
524 if (error) 528 if (error)
525 return error; 529 return error;
526 530
531 *did_zeroing = true;
527 start_zero_fsb = imap.br_startoff + imap.br_blockcount; 532 start_zero_fsb = imap.br_startoff + imap.br_blockcount;
528 ASSERT(start_zero_fsb <= (end_zero_fsb + 1)); 533 ASSERT(start_zero_fsb <= (end_zero_fsb + 1));
529 } 534 }
@@ -554,6 +559,10 @@ restart:
554 if (error) 559 if (error)
555 return error; 560 return error;
556 561
562 error = xfs_break_layouts(inode, iolock);
563 if (error)
564 return error;
565
557 /* 566 /*
558 * If the offset is beyond the size of the file, we need to zero any 567 * If the offset is beyond the size of the file, we need to zero any
559 * blocks that fall between the existing EOF and the start of this 568 * blocks that fall between the existing EOF and the start of this
@@ -562,13 +571,15 @@ restart:
562 * having to redo all checks before. 571 * having to redo all checks before.
563 */ 572 */
564 if (*pos > i_size_read(inode)) { 573 if (*pos > i_size_read(inode)) {
574 bool zero = false;
575
565 if (*iolock == XFS_IOLOCK_SHARED) { 576 if (*iolock == XFS_IOLOCK_SHARED) {
566 xfs_rw_iunlock(ip, *iolock); 577 xfs_rw_iunlock(ip, *iolock);
567 *iolock = XFS_IOLOCK_EXCL; 578 *iolock = XFS_IOLOCK_EXCL;
568 xfs_rw_ilock(ip, *iolock); 579 xfs_rw_ilock(ip, *iolock);
569 goto restart; 580 goto restart;
570 } 581 }
571 error = xfs_zero_eof(ip, *pos, i_size_read(inode)); 582 error = xfs_zero_eof(ip, *pos, i_size_read(inode), &zero);
572 if (error) 583 if (error)
573 return error; 584 return error;
574 } 585 }
@@ -822,6 +833,7 @@ xfs_file_fallocate(
822 struct xfs_inode *ip = XFS_I(inode); 833 struct xfs_inode *ip = XFS_I(inode);
823 long error; 834 long error;
824 enum xfs_prealloc_flags flags = 0; 835 enum xfs_prealloc_flags flags = 0;
836 uint iolock = XFS_IOLOCK_EXCL;
825 loff_t new_size = 0; 837 loff_t new_size = 0;
826 838
827 if (!S_ISREG(inode->i_mode)) 839 if (!S_ISREG(inode->i_mode))
@@ -830,7 +842,11 @@ xfs_file_fallocate(
830 FALLOC_FL_COLLAPSE_RANGE | FALLOC_FL_ZERO_RANGE)) 842 FALLOC_FL_COLLAPSE_RANGE | FALLOC_FL_ZERO_RANGE))
831 return -EOPNOTSUPP; 843 return -EOPNOTSUPP;
832 844
833 xfs_ilock(ip, XFS_IOLOCK_EXCL); 845 xfs_ilock(ip, iolock);
846 error = xfs_break_layouts(inode, &iolock);
847 if (error)
848 goto out_unlock;
849
834 if (mode & FALLOC_FL_PUNCH_HOLE) { 850 if (mode & FALLOC_FL_PUNCH_HOLE) {
835 error = xfs_free_file_space(ip, offset, len); 851 error = xfs_free_file_space(ip, offset, len);
836 if (error) 852 if (error)
@@ -894,7 +910,7 @@ xfs_file_fallocate(
894 } 910 }
895 911
896out_unlock: 912out_unlock:
897 xfs_iunlock(ip, XFS_IOLOCK_EXCL); 913 xfs_iunlock(ip, iolock);
898 return error; 914 return error;
899} 915}
900 916
diff --git a/fs/xfs/xfs_fsops.c b/fs/xfs/xfs_fsops.c
index fba6532efba4..74efe5b760dc 100644
--- a/fs/xfs/xfs_fsops.c
+++ b/fs/xfs/xfs_fsops.c
@@ -602,6 +602,12 @@ xfs_growfs_data(
602 if (!mutex_trylock(&mp->m_growlock)) 602 if (!mutex_trylock(&mp->m_growlock))
603 return -EWOULDBLOCK; 603 return -EWOULDBLOCK;
604 error = xfs_growfs_data_private(mp, in); 604 error = xfs_growfs_data_private(mp, in);
605 /*
606 * Increment the generation unconditionally, the error could be from
607 * updating the secondary superblocks, in which case the new size
608 * is live already.
609 */
610 mp->m_generation++;
605 mutex_unlock(&mp->m_growlock); 611 mutex_unlock(&mp->m_growlock);
606 return error; 612 return error;
607} 613}
diff --git a/fs/xfs/xfs_inode.c b/fs/xfs/xfs_inode.c
index daafa1f6d260..6163767aa856 100644
--- a/fs/xfs/xfs_inode.c
+++ b/fs/xfs/xfs_inode.c
@@ -2867,6 +2867,10 @@ xfs_rename(
2867 * Handle RENAME_EXCHANGE flags 2867 * Handle RENAME_EXCHANGE flags
2868 */ 2868 */
2869 if (flags & RENAME_EXCHANGE) { 2869 if (flags & RENAME_EXCHANGE) {
2870 if (target_ip == NULL) {
2871 error = -EINVAL;
2872 goto error_return;
2873 }
2870 error = xfs_cross_rename(tp, src_dp, src_name, src_ip, 2874 error = xfs_cross_rename(tp, src_dp, src_name, src_ip,
2871 target_dp, target_name, target_ip, 2875 target_dp, target_name, target_ip,
2872 &free_list, &first_block, spaceres); 2876 &free_list, &first_block, spaceres);
diff --git a/fs/xfs/xfs_inode.h b/fs/xfs/xfs_inode.h
index 86cd6b39bed7..a1cd55f3f351 100644
--- a/fs/xfs/xfs_inode.h
+++ b/fs/xfs/xfs_inode.h
@@ -384,10 +384,11 @@ enum xfs_prealloc_flags {
384 XFS_PREALLOC_INVISIBLE = (1 << 4), 384 XFS_PREALLOC_INVISIBLE = (1 << 4),
385}; 385};
386 386
387int xfs_update_prealloc_flags(struct xfs_inode *, 387int xfs_update_prealloc_flags(struct xfs_inode *ip,
388 enum xfs_prealloc_flags); 388 enum xfs_prealloc_flags flags);
389int xfs_zero_eof(struct xfs_inode *, xfs_off_t, xfs_fsize_t); 389int xfs_zero_eof(struct xfs_inode *ip, xfs_off_t offset,
390int xfs_iozero(struct xfs_inode *, loff_t, size_t); 390 xfs_fsize_t isize, bool *did_zeroing);
391int xfs_iozero(struct xfs_inode *ip, loff_t pos, size_t count);
391 392
392 393
393#define IHOLD(ip) \ 394#define IHOLD(ip) \
diff --git a/fs/xfs/xfs_ioctl.c b/fs/xfs/xfs_ioctl.c
index f7afb86c9148..ac4feae45eb3 100644
--- a/fs/xfs/xfs_ioctl.c
+++ b/fs/xfs/xfs_ioctl.c
@@ -39,6 +39,7 @@
39#include "xfs_icache.h" 39#include "xfs_icache.h"
40#include "xfs_symlink.h" 40#include "xfs_symlink.h"
41#include "xfs_trans.h" 41#include "xfs_trans.h"
42#include "xfs_pnfs.h"
42 43
43#include <linux/capability.h> 44#include <linux/capability.h>
44#include <linux/dcache.h> 45#include <linux/dcache.h>
@@ -286,7 +287,7 @@ xfs_readlink_by_handle(
286 return PTR_ERR(dentry); 287 return PTR_ERR(dentry);
287 288
288 /* Restrict this handle operation to symlinks only. */ 289 /* Restrict this handle operation to symlinks only. */
289 if (!S_ISLNK(dentry->d_inode->i_mode)) { 290 if (!d_is_symlink(dentry)) {
290 error = -EINVAL; 291 error = -EINVAL;
291 goto out_dput; 292 goto out_dput;
292 } 293 }
@@ -608,6 +609,7 @@ xfs_ioc_space(
608{ 609{
609 struct iattr iattr; 610 struct iattr iattr;
610 enum xfs_prealloc_flags flags = 0; 611 enum xfs_prealloc_flags flags = 0;
612 uint iolock = XFS_IOLOCK_EXCL;
611 int error; 613 int error;
612 614
613 /* 615 /*
@@ -636,7 +638,10 @@ xfs_ioc_space(
636 if (error) 638 if (error)
637 return error; 639 return error;
638 640
639 xfs_ilock(ip, XFS_IOLOCK_EXCL); 641 xfs_ilock(ip, iolock);
642 error = xfs_break_layouts(inode, &iolock);
643 if (error)
644 goto out_unlock;
640 645
641 switch (bf->l_whence) { 646 switch (bf->l_whence) {
642 case 0: /*SEEK_SET*/ 647 case 0: /*SEEK_SET*/
@@ -725,7 +730,7 @@ xfs_ioc_space(
725 error = xfs_update_prealloc_flags(ip, flags); 730 error = xfs_update_prealloc_flags(ip, flags);
726 731
727out_unlock: 732out_unlock:
728 xfs_iunlock(ip, XFS_IOLOCK_EXCL); 733 xfs_iunlock(ip, iolock);
729 mnt_drop_write_file(filp); 734 mnt_drop_write_file(filp);
730 return error; 735 return error;
731} 736}
diff --git a/fs/xfs/xfs_iops.c b/fs/xfs/xfs_iops.c
index ce80eeb8faa4..e53a90331422 100644
--- a/fs/xfs/xfs_iops.c
+++ b/fs/xfs/xfs_iops.c
@@ -37,6 +37,7 @@
37#include "xfs_da_btree.h" 37#include "xfs_da_btree.h"
38#include "xfs_dir2.h" 38#include "xfs_dir2.h"
39#include "xfs_trans_space.h" 39#include "xfs_trans_space.h"
40#include "xfs_pnfs.h"
40 41
41#include <linux/capability.h> 42#include <linux/capability.h>
42#include <linux/xattr.h> 43#include <linux/xattr.h>
@@ -505,7 +506,7 @@ xfs_setattr_mode(
505 inode->i_mode |= mode & ~S_IFMT; 506 inode->i_mode |= mode & ~S_IFMT;
506} 507}
507 508
508static void 509void
509xfs_setattr_time( 510xfs_setattr_time(
510 struct xfs_inode *ip, 511 struct xfs_inode *ip,
511 struct iattr *iattr) 512 struct iattr *iattr)
@@ -750,6 +751,7 @@ xfs_setattr_size(
750 int error; 751 int error;
751 uint lock_flags = 0; 752 uint lock_flags = 0;
752 uint commit_flags = 0; 753 uint commit_flags = 0;
754 bool did_zeroing = false;
753 755
754 trace_xfs_setattr(ip); 756 trace_xfs_setattr(ip);
755 757
@@ -793,20 +795,16 @@ xfs_setattr_size(
793 return error; 795 return error;
794 796
795 /* 797 /*
796 * Now we can make the changes. Before we join the inode to the 798 * File data changes must be complete before we start the transaction to
797 * transaction, take care of the part of the truncation that must be 799 * modify the inode. This needs to be done before joining the inode to
798 * done without the inode lock. This needs to be done before joining 800 * the transaction because the inode cannot be unlocked once it is a
799 * the inode to the transaction, because the inode cannot be unlocked 801 * part of the transaction.
800 * once it is a part of the transaction. 802 *
803 * Start with zeroing any data block beyond EOF that we may expose on
804 * file extension.
801 */ 805 */
802 if (newsize > oldsize) { 806 if (newsize > oldsize) {
803 /* 807 error = xfs_zero_eof(ip, newsize, oldsize, &did_zeroing);
804 * Do the first part of growing a file: zero any data in the
805 * last block that is beyond the old EOF. We need to do this
806 * before the inode is joined to the transaction to modify
807 * i_size.
808 */
809 error = xfs_zero_eof(ip, newsize, oldsize);
810 if (error) 808 if (error)
811 return error; 809 return error;
812 } 810 }
@@ -816,23 +814,18 @@ xfs_setattr_size(
816 * any previous writes that are beyond the on disk EOF and the new 814 * any previous writes that are beyond the on disk EOF and the new
817 * EOF that have not been written out need to be written here. If we 815 * EOF that have not been written out need to be written here. If we
818 * do not write the data out, we expose ourselves to the null files 816 * do not write the data out, we expose ourselves to the null files
819 * problem. 817 * problem. Note that this includes any block zeroing we did above;
820 * 818 * otherwise those blocks may not be zeroed after a crash.
821 * Only flush from the on disk size to the smaller of the in memory
822 * file size or the new size as that's the range we really care about
823 * here and prevents waiting for other data not within the range we
824 * care about here.
825 */ 819 */
826 if (oldsize != ip->i_d.di_size && newsize > ip->i_d.di_size) { 820 if (newsize > ip->i_d.di_size &&
821 (oldsize != ip->i_d.di_size || did_zeroing)) {
827 error = filemap_write_and_wait_range(VFS_I(ip)->i_mapping, 822 error = filemap_write_and_wait_range(VFS_I(ip)->i_mapping,
828 ip->i_d.di_size, newsize); 823 ip->i_d.di_size, newsize);
829 if (error) 824 if (error)
830 return error; 825 return error;
831 } 826 }
832 827
833 /* 828 /* Now wait for all direct I/O to complete. */
834 * Wait for all direct I/O to complete.
835 */
836 inode_dio_wait(inode); 829 inode_dio_wait(inode);
837 830
838 /* 831 /*
@@ -979,9 +972,13 @@ xfs_vn_setattr(
979 int error; 972 int error;
980 973
981 if (iattr->ia_valid & ATTR_SIZE) { 974 if (iattr->ia_valid & ATTR_SIZE) {
982 xfs_ilock(ip, XFS_IOLOCK_EXCL); 975 uint iolock = XFS_IOLOCK_EXCL;
983 error = xfs_setattr_size(ip, iattr); 976
984 xfs_iunlock(ip, XFS_IOLOCK_EXCL); 977 xfs_ilock(ip, iolock);
978 error = xfs_break_layouts(dentry->d_inode, &iolock);
979 if (!error)
980 error = xfs_setattr_size(ip, iattr);
981 xfs_iunlock(ip, iolock);
985 } else { 982 } else {
986 error = xfs_setattr_nonsize(ip, iattr, 0); 983 error = xfs_setattr_nonsize(ip, iattr, 0);
987 } 984 }
diff --git a/fs/xfs/xfs_iops.h b/fs/xfs/xfs_iops.h
index 1c34e4335920..ea7a98e9cb70 100644
--- a/fs/xfs/xfs_iops.h
+++ b/fs/xfs/xfs_iops.h
@@ -32,6 +32,7 @@ extern void xfs_setup_inode(struct xfs_inode *);
32 */ 32 */
33#define XFS_ATTR_NOACL 0x01 /* Don't call posix_acl_chmod */ 33#define XFS_ATTR_NOACL 0x01 /* Don't call posix_acl_chmod */
34 34
35extern void xfs_setattr_time(struct xfs_inode *ip, struct iattr *iattr);
35extern int xfs_setattr_nonsize(struct xfs_inode *ip, struct iattr *vap, 36extern int xfs_setattr_nonsize(struct xfs_inode *ip, struct iattr *vap,
36 int flags); 37 int flags);
37extern int xfs_setattr_size(struct xfs_inode *ip, struct iattr *vap); 38extern int xfs_setattr_size(struct xfs_inode *ip, struct iattr *vap);
diff --git a/fs/xfs/xfs_mount.h b/fs/xfs/xfs_mount.h
index a5b2ff822653..0d8abd6364d9 100644
--- a/fs/xfs/xfs_mount.h
+++ b/fs/xfs/xfs_mount.h
@@ -174,6 +174,17 @@ typedef struct xfs_mount {
174 struct workqueue_struct *m_reclaim_workqueue; 174 struct workqueue_struct *m_reclaim_workqueue;
175 struct workqueue_struct *m_log_workqueue; 175 struct workqueue_struct *m_log_workqueue;
176 struct workqueue_struct *m_eofblocks_workqueue; 176 struct workqueue_struct *m_eofblocks_workqueue;
177
178 /*
179 * Generation of the filesysyem layout. This is incremented by each
180 * growfs, and used by the pNFS server to ensure the client updates
181 * its view of the block device once it gets a layout that might
182 * reference the newly added blocks. Does not need to be persistent
183 * as long as we only allow file system size increments, but if we
184 * ever support shrinks it would have to be persisted in addition
185 * to various other kinds of pain inflicted on the pNFS server.
186 */
187 __uint32_t m_generation;
177} xfs_mount_t; 188} xfs_mount_t;
178 189
179/* 190/*
diff --git a/fs/xfs/xfs_pnfs.c b/fs/xfs/xfs_pnfs.c
new file mode 100644
index 000000000000..365dd57ea760
--- /dev/null
+++ b/fs/xfs/xfs_pnfs.c
@@ -0,0 +1,324 @@
1/*
2 * Copyright (c) 2014 Christoph Hellwig.
3 */
4#include "xfs.h"
5#include "xfs_format.h"
6#include "xfs_log_format.h"
7#include "xfs_trans_resv.h"
8#include "xfs_sb.h"
9#include "xfs_mount.h"
10#include "xfs_inode.h"
11#include "xfs_trans.h"
12#include "xfs_log.h"
13#include "xfs_bmap.h"
14#include "xfs_bmap_util.h"
15#include "xfs_error.h"
16#include "xfs_iomap.h"
17#include "xfs_shared.h"
18#include "xfs_bit.h"
19#include "xfs_pnfs.h"
20
21/*
22 * Ensure that we do not have any outstanding pNFS layouts that can be used by
23 * clients to directly read from or write to this inode. This must be called
24 * before every operation that can remove blocks from the extent map.
25 * Additionally we call it during the write operation, where aren't concerned
26 * about exposing unallocated blocks but just want to provide basic
27 * synchronization between a local writer and pNFS clients. mmap writes would
28 * also benefit from this sort of synchronization, but due to the tricky locking
29 * rules in the page fault path we don't bother.
30 */
31int
32xfs_break_layouts(
33 struct inode *inode,
34 uint *iolock)
35{
36 struct xfs_inode *ip = XFS_I(inode);
37 int error;
38
39 ASSERT(xfs_isilocked(ip, XFS_IOLOCK_SHARED|XFS_IOLOCK_EXCL));
40
41 while ((error = break_layout(inode, false) == -EWOULDBLOCK)) {
42 xfs_iunlock(ip, *iolock);
43 error = break_layout(inode, true);
44 *iolock = XFS_IOLOCK_EXCL;
45 xfs_ilock(ip, *iolock);
46 }
47
48 return error;
49}
50
51/*
52 * Get a unique ID including its location so that the client can identify
53 * the exported device.
54 */
55int
56xfs_fs_get_uuid(
57 struct super_block *sb,
58 u8 *buf,
59 u32 *len,
60 u64 *offset)
61{
62 struct xfs_mount *mp = XFS_M(sb);
63
64 printk_once(KERN_NOTICE
65"XFS (%s): using experimental pNFS feature, use at your own risk!\n",
66 mp->m_fsname);
67
68 if (*len < sizeof(uuid_t))
69 return -EINVAL;
70
71 memcpy(buf, &mp->m_sb.sb_uuid, sizeof(uuid_t));
72 *len = sizeof(uuid_t);
73 *offset = offsetof(struct xfs_dsb, sb_uuid);
74 return 0;
75}
76
77static void
78xfs_bmbt_to_iomap(
79 struct xfs_inode *ip,
80 struct iomap *iomap,
81 struct xfs_bmbt_irec *imap)
82{
83 struct xfs_mount *mp = ip->i_mount;
84
85 if (imap->br_startblock == HOLESTARTBLOCK) {
86 iomap->blkno = IOMAP_NULL_BLOCK;
87 iomap->type = IOMAP_HOLE;
88 } else if (imap->br_startblock == DELAYSTARTBLOCK) {
89 iomap->blkno = IOMAP_NULL_BLOCK;
90 iomap->type = IOMAP_DELALLOC;
91 } else {
92 iomap->blkno =
93 XFS_FSB_TO_DADDR(ip->i_mount, imap->br_startblock);
94 if (imap->br_state == XFS_EXT_UNWRITTEN)
95 iomap->type = IOMAP_UNWRITTEN;
96 else
97 iomap->type = IOMAP_MAPPED;
98 }
99 iomap->offset = XFS_FSB_TO_B(mp, imap->br_startoff);
100 iomap->length = XFS_FSB_TO_B(mp, imap->br_blockcount);
101}
102
103/*
104 * Get a layout for the pNFS client.
105 */
106int
107xfs_fs_map_blocks(
108 struct inode *inode,
109 loff_t offset,
110 u64 length,
111 struct iomap *iomap,
112 bool write,
113 u32 *device_generation)
114{
115 struct xfs_inode *ip = XFS_I(inode);
116 struct xfs_mount *mp = ip->i_mount;
117 struct xfs_bmbt_irec imap;
118 xfs_fileoff_t offset_fsb, end_fsb;
119 loff_t limit;
120 int bmapi_flags = XFS_BMAPI_ENTIRE;
121 int nimaps = 1;
122 uint lock_flags;
123 int error = 0;
124
125 if (XFS_FORCED_SHUTDOWN(mp))
126 return -EIO;
127
128 /*
129 * We can't export inodes residing on the realtime device. The realtime
130 * device doesn't have a UUID to identify it, so the client has no way
131 * to find it.
132 */
133 if (XFS_IS_REALTIME_INODE(ip))
134 return -ENXIO;
135
136 /*
137 * Lock out any other I/O before we flush and invalidate the pagecache,
138 * and then hand out a layout to the remote system. This is very
139 * similar to direct I/O, except that the synchronization is much more
140 * complicated. See the comment near xfs_break_layouts for a detailed
141 * explanation.
142 */
143 xfs_ilock(ip, XFS_IOLOCK_EXCL);
144
145 error = -EINVAL;
146 limit = mp->m_super->s_maxbytes;
147 if (!write)
148 limit = max(limit, round_up(i_size_read(inode),
149 inode->i_sb->s_blocksize));
150 if (offset > limit)
151 goto out_unlock;
152 if (offset > limit - length)
153 length = limit - offset;
154
155 error = filemap_write_and_wait(inode->i_mapping);
156 if (error)
157 goto out_unlock;
158 error = invalidate_inode_pages2(inode->i_mapping);
159 if (WARN_ON_ONCE(error))
160 return error;
161
162 end_fsb = XFS_B_TO_FSB(mp, (xfs_ufsize_t)offset + length);
163 offset_fsb = XFS_B_TO_FSBT(mp, offset);
164
165 lock_flags = xfs_ilock_data_map_shared(ip);
166 error = xfs_bmapi_read(ip, offset_fsb, end_fsb - offset_fsb,
167 &imap, &nimaps, bmapi_flags);
168 xfs_iunlock(ip, lock_flags);
169
170 if (error)
171 goto out_unlock;
172
173 if (write) {
174 enum xfs_prealloc_flags flags = 0;
175
176 ASSERT(imap.br_startblock != DELAYSTARTBLOCK);
177
178 if (!nimaps || imap.br_startblock == HOLESTARTBLOCK) {
179 error = xfs_iomap_write_direct(ip, offset, length,
180 &imap, nimaps);
181 if (error)
182 goto out_unlock;
183
184 /*
185 * Ensure the next transaction is committed
186 * synchronously so that the blocks allocated and
187 * handed out to the client are guaranteed to be
188 * present even after a server crash.
189 */
190 flags |= XFS_PREALLOC_SET | XFS_PREALLOC_SYNC;
191 }
192
193 error = xfs_update_prealloc_flags(ip, flags);
194 if (error)
195 goto out_unlock;
196 }
197 xfs_iunlock(ip, XFS_IOLOCK_EXCL);
198
199 xfs_bmbt_to_iomap(ip, iomap, &imap);
200 *device_generation = mp->m_generation;
201 return error;
202out_unlock:
203 xfs_iunlock(ip, XFS_IOLOCK_EXCL);
204 return error;
205}
206
207/*
208 * Ensure the size update falls into a valid allocated block.
209 */
210static int
211xfs_pnfs_validate_isize(
212 struct xfs_inode *ip,
213 xfs_off_t isize)
214{
215 struct xfs_bmbt_irec imap;
216 int nimaps = 1;
217 int error = 0;
218
219 xfs_ilock(ip, XFS_ILOCK_SHARED);
220 error = xfs_bmapi_read(ip, XFS_B_TO_FSBT(ip->i_mount, isize - 1), 1,
221 &imap, &nimaps, 0);
222 xfs_iunlock(ip, XFS_ILOCK_SHARED);
223 if (error)
224 return error;
225
226 if (imap.br_startblock == HOLESTARTBLOCK ||
227 imap.br_startblock == DELAYSTARTBLOCK ||
228 imap.br_state == XFS_EXT_UNWRITTEN)
229 return -EIO;
230 return 0;
231}
232
233/*
234 * Make sure the blocks described by maps are stable on disk. This includes
235 * converting any unwritten extents, flushing the disk cache and updating the
236 * time stamps.
237 *
238 * Note that we rely on the caller to always send us a timestamp update so that
239 * we always commit a transaction here. If that stops being true we will have
240 * to manually flush the cache here similar to what the fsync code path does
241 * for datasyncs on files that have no dirty metadata.
242 */
243int
244xfs_fs_commit_blocks(
245 struct inode *inode,
246 struct iomap *maps,
247 int nr_maps,
248 struct iattr *iattr)
249{
250 struct xfs_inode *ip = XFS_I(inode);
251 struct xfs_mount *mp = ip->i_mount;
252 struct xfs_trans *tp;
253 bool update_isize = false;
254 int error, i;
255 loff_t size;
256
257 ASSERT(iattr->ia_valid & (ATTR_ATIME|ATTR_CTIME|ATTR_MTIME));
258
259 xfs_ilock(ip, XFS_IOLOCK_EXCL);
260
261 size = i_size_read(inode);
262 if ((iattr->ia_valid & ATTR_SIZE) && iattr->ia_size > size) {
263 update_isize = true;
264 size = iattr->ia_size;
265 }
266
267 for (i = 0; i < nr_maps; i++) {
268 u64 start, length, end;
269
270 start = maps[i].offset;
271 if (start > size)
272 continue;
273
274 end = start + maps[i].length;
275 if (end > size)
276 end = size;
277
278 length = end - start;
279 if (!length)
280 continue;
281
282 /*
283 * Make sure reads through the pagecache see the new data.
284 */
285 error = invalidate_inode_pages2_range(inode->i_mapping,
286 start >> PAGE_CACHE_SHIFT,
287 (end - 1) >> PAGE_CACHE_SHIFT);
288 WARN_ON_ONCE(error);
289
290 error = xfs_iomap_write_unwritten(ip, start, length);
291 if (error)
292 goto out_drop_iolock;
293 }
294
295 if (update_isize) {
296 error = xfs_pnfs_validate_isize(ip, size);
297 if (error)
298 goto out_drop_iolock;
299 }
300
301 tp = xfs_trans_alloc(mp, XFS_TRANS_SETATTR_NOT_SIZE);
302 error = xfs_trans_reserve(tp, &M_RES(mp)->tr_ichange, 0, 0);
303 if (error) {
304 xfs_trans_cancel(tp, 0);
305 goto out_drop_iolock;
306 }
307
308 xfs_ilock(ip, XFS_ILOCK_EXCL);
309 xfs_trans_ijoin(tp, ip, XFS_ILOCK_EXCL);
310 xfs_trans_log_inode(tp, ip, XFS_ILOG_CORE);
311
312 xfs_setattr_time(ip, iattr);
313 if (update_isize) {
314 i_size_write(inode, iattr->ia_size);
315 ip->i_d.di_size = iattr->ia_size;
316 }
317
318 xfs_trans_set_sync(tp);
319 error = xfs_trans_commit(tp, 0);
320
321out_drop_iolock:
322 xfs_iunlock(ip, XFS_IOLOCK_EXCL);
323 return error;
324}
diff --git a/fs/xfs/xfs_pnfs.h b/fs/xfs/xfs_pnfs.h
new file mode 100644
index 000000000000..b7fbfce660f6
--- /dev/null
+++ b/fs/xfs/xfs_pnfs.h
@@ -0,0 +1,18 @@
1#ifndef _XFS_PNFS_H
2#define _XFS_PNFS_H 1
3
4#ifdef CONFIG_NFSD_PNFS
5int xfs_fs_get_uuid(struct super_block *sb, u8 *buf, u32 *len, u64 *offset);
6int xfs_fs_map_blocks(struct inode *inode, loff_t offset, u64 length,
7 struct iomap *iomap, bool write, u32 *device_generation);
8int xfs_fs_commit_blocks(struct inode *inode, struct iomap *maps, int nr_maps,
9 struct iattr *iattr);
10
11int xfs_break_layouts(struct inode *inode, uint *iolock);
12#else
13static inline int xfs_break_layouts(struct inode *inode, uint *iolock)
14{
15 return 0;
16}
17#endif /* CONFIG_NFSD_PNFS */
18#endif /* _XFS_PNFS_H */
diff --git a/fs/xfs/xfs_qm.c b/fs/xfs/xfs_qm.c
index 53cc2aaf8d2b..fbbb9e62e274 100644
--- a/fs/xfs/xfs_qm.c
+++ b/fs/xfs/xfs_qm.c
@@ -836,6 +836,11 @@ xfs_qm_reset_dqcounts(
836 */ 836 */
837 xfs_dqcheck(mp, ddq, id+j, type, XFS_QMOPT_DQREPAIR, 837 xfs_dqcheck(mp, ddq, id+j, type, XFS_QMOPT_DQREPAIR,
838 "xfs_quotacheck"); 838 "xfs_quotacheck");
839 /*
840 * Reset type in case we are reusing group quota file for
841 * project quotas or vice versa
842 */
843 ddq->d_flags = type;
839 ddq->d_bcount = 0; 844 ddq->d_bcount = 0;
840 ddq->d_icount = 0; 845 ddq->d_icount = 0;
841 ddq->d_rtbcount = 0; 846 ddq->d_rtbcount = 0;
diff --git a/include/drm/drm_mm.h b/include/drm/drm_mm.h
index a24addfdfcec..0de6290df4da 100644
--- a/include/drm/drm_mm.h
+++ b/include/drm/drm_mm.h
@@ -68,8 +68,8 @@ struct drm_mm_node {
68 unsigned scanned_preceeds_hole : 1; 68 unsigned scanned_preceeds_hole : 1;
69 unsigned allocated : 1; 69 unsigned allocated : 1;
70 unsigned long color; 70 unsigned long color;
71 unsigned long start; 71 u64 start;
72 unsigned long size; 72 u64 size;
73 struct drm_mm *mm; 73 struct drm_mm *mm;
74}; 74};
75 75
@@ -82,16 +82,16 @@ struct drm_mm {
82 unsigned int scan_check_range : 1; 82 unsigned int scan_check_range : 1;
83 unsigned scan_alignment; 83 unsigned scan_alignment;
84 unsigned long scan_color; 84 unsigned long scan_color;
85 unsigned long scan_size; 85 u64 scan_size;
86 unsigned long scan_hit_start; 86 u64 scan_hit_start;
87 unsigned long scan_hit_end; 87 u64 scan_hit_end;
88 unsigned scanned_blocks; 88 unsigned scanned_blocks;
89 unsigned long scan_start; 89 u64 scan_start;
90 unsigned long scan_end; 90 u64 scan_end;
91 struct drm_mm_node *prev_scanned_node; 91 struct drm_mm_node *prev_scanned_node;
92 92
93 void (*color_adjust)(struct drm_mm_node *node, unsigned long color, 93 void (*color_adjust)(struct drm_mm_node *node, unsigned long color,
94 unsigned long *start, unsigned long *end); 94 u64 *start, u64 *end);
95}; 95};
96 96
97/** 97/**
@@ -124,7 +124,7 @@ static inline bool drm_mm_initialized(struct drm_mm *mm)
124 return mm->hole_stack.next; 124 return mm->hole_stack.next;
125} 125}
126 126
127static inline unsigned long __drm_mm_hole_node_start(struct drm_mm_node *hole_node) 127static inline u64 __drm_mm_hole_node_start(struct drm_mm_node *hole_node)
128{ 128{
129 return hole_node->start + hole_node->size; 129 return hole_node->start + hole_node->size;
130} 130}
@@ -140,13 +140,13 @@ static inline unsigned long __drm_mm_hole_node_start(struct drm_mm_node *hole_no
140 * Returns: 140 * Returns:
141 * Start of the subsequent hole. 141 * Start of the subsequent hole.
142 */ 142 */
143static inline unsigned long drm_mm_hole_node_start(struct drm_mm_node *hole_node) 143static inline u64 drm_mm_hole_node_start(struct drm_mm_node *hole_node)
144{ 144{
145 BUG_ON(!hole_node->hole_follows); 145 BUG_ON(!hole_node->hole_follows);
146 return __drm_mm_hole_node_start(hole_node); 146 return __drm_mm_hole_node_start(hole_node);
147} 147}
148 148
149static inline unsigned long __drm_mm_hole_node_end(struct drm_mm_node *hole_node) 149static inline u64 __drm_mm_hole_node_end(struct drm_mm_node *hole_node)
150{ 150{
151 return list_entry(hole_node->node_list.next, 151 return list_entry(hole_node->node_list.next,
152 struct drm_mm_node, node_list)->start; 152 struct drm_mm_node, node_list)->start;
@@ -163,7 +163,7 @@ static inline unsigned long __drm_mm_hole_node_end(struct drm_mm_node *hole_node
163 * Returns: 163 * Returns:
164 * End of the subsequent hole. 164 * End of the subsequent hole.
165 */ 165 */
166static inline unsigned long drm_mm_hole_node_end(struct drm_mm_node *hole_node) 166static inline u64 drm_mm_hole_node_end(struct drm_mm_node *hole_node)
167{ 167{
168 return __drm_mm_hole_node_end(hole_node); 168 return __drm_mm_hole_node_end(hole_node);
169} 169}
@@ -222,7 +222,7 @@ int drm_mm_reserve_node(struct drm_mm *mm, struct drm_mm_node *node);
222 222
223int drm_mm_insert_node_generic(struct drm_mm *mm, 223int drm_mm_insert_node_generic(struct drm_mm *mm,
224 struct drm_mm_node *node, 224 struct drm_mm_node *node,
225 unsigned long size, 225 u64 size,
226 unsigned alignment, 226 unsigned alignment,
227 unsigned long color, 227 unsigned long color,
228 enum drm_mm_search_flags sflags, 228 enum drm_mm_search_flags sflags,
@@ -245,7 +245,7 @@ int drm_mm_insert_node_generic(struct drm_mm *mm,
245 */ 245 */
246static inline int drm_mm_insert_node(struct drm_mm *mm, 246static inline int drm_mm_insert_node(struct drm_mm *mm,
247 struct drm_mm_node *node, 247 struct drm_mm_node *node,
248 unsigned long size, 248 u64 size,
249 unsigned alignment, 249 unsigned alignment,
250 enum drm_mm_search_flags flags) 250 enum drm_mm_search_flags flags)
251{ 251{
@@ -255,11 +255,11 @@ static inline int drm_mm_insert_node(struct drm_mm *mm,
255 255
256int drm_mm_insert_node_in_range_generic(struct drm_mm *mm, 256int drm_mm_insert_node_in_range_generic(struct drm_mm *mm,
257 struct drm_mm_node *node, 257 struct drm_mm_node *node,
258 unsigned long size, 258 u64 size,
259 unsigned alignment, 259 unsigned alignment,
260 unsigned long color, 260 unsigned long color,
261 unsigned long start, 261 u64 start,
262 unsigned long end, 262 u64 end,
263 enum drm_mm_search_flags sflags, 263 enum drm_mm_search_flags sflags,
264 enum drm_mm_allocator_flags aflags); 264 enum drm_mm_allocator_flags aflags);
265/** 265/**
@@ -282,10 +282,10 @@ int drm_mm_insert_node_in_range_generic(struct drm_mm *mm,
282 */ 282 */
283static inline int drm_mm_insert_node_in_range(struct drm_mm *mm, 283static inline int drm_mm_insert_node_in_range(struct drm_mm *mm,
284 struct drm_mm_node *node, 284 struct drm_mm_node *node,
285 unsigned long size, 285 u64 size,
286 unsigned alignment, 286 unsigned alignment,
287 unsigned long start, 287 u64 start,
288 unsigned long end, 288 u64 end,
289 enum drm_mm_search_flags flags) 289 enum drm_mm_search_flags flags)
290{ 290{
291 return drm_mm_insert_node_in_range_generic(mm, node, size, alignment, 291 return drm_mm_insert_node_in_range_generic(mm, node, size, alignment,
@@ -296,21 +296,21 @@ static inline int drm_mm_insert_node_in_range(struct drm_mm *mm,
296void drm_mm_remove_node(struct drm_mm_node *node); 296void drm_mm_remove_node(struct drm_mm_node *node);
297void drm_mm_replace_node(struct drm_mm_node *old, struct drm_mm_node *new); 297void drm_mm_replace_node(struct drm_mm_node *old, struct drm_mm_node *new);
298void drm_mm_init(struct drm_mm *mm, 298void drm_mm_init(struct drm_mm *mm,
299 unsigned long start, 299 u64 start,
300 unsigned long size); 300 u64 size);
301void drm_mm_takedown(struct drm_mm *mm); 301void drm_mm_takedown(struct drm_mm *mm);
302bool drm_mm_clean(struct drm_mm *mm); 302bool drm_mm_clean(struct drm_mm *mm);
303 303
304void drm_mm_init_scan(struct drm_mm *mm, 304void drm_mm_init_scan(struct drm_mm *mm,
305 unsigned long size, 305 u64 size,
306 unsigned alignment, 306 unsigned alignment,
307 unsigned long color); 307 unsigned long color);
308void drm_mm_init_scan_with_range(struct drm_mm *mm, 308void drm_mm_init_scan_with_range(struct drm_mm *mm,
309 unsigned long size, 309 u64 size,
310 unsigned alignment, 310 unsigned alignment,
311 unsigned long color, 311 unsigned long color,
312 unsigned long start, 312 u64 start,
313 unsigned long end); 313 u64 end);
314bool drm_mm_scan_add_block(struct drm_mm_node *node); 314bool drm_mm_scan_add_block(struct drm_mm_node *node);
315bool drm_mm_scan_remove_block(struct drm_mm_node *node); 315bool drm_mm_scan_remove_block(struct drm_mm_node *node);
316 316
diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
index 180ad0e6de21..d016dc57f007 100644
--- a/include/drm/i915_pciids.h
+++ b/include/drm/i915_pciids.h
@@ -214,9 +214,9 @@
214 INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info) 214 INTEL_VGA_DEVICE((((gt) - 1) << 4) | (id), info)
215 215
216#define _INTEL_BDW_M_IDS(gt, info) \ 216#define _INTEL_BDW_M_IDS(gt, info) \
217 _INTEL_BDW_M(gt, 0x1602, info), /* ULT */ \ 217 _INTEL_BDW_M(gt, 0x1602, info), /* Halo */ \
218 _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \ 218 _INTEL_BDW_M(gt, 0x1606, info), /* ULT */ \
219 _INTEL_BDW_M(gt, 0x160B, info), /* Iris */ \ 219 _INTEL_BDW_M(gt, 0x160B, info), /* ULT */ \
220 _INTEL_BDW_M(gt, 0x160E, info) /* ULX */ 220 _INTEL_BDW_M(gt, 0x160E, info) /* ULX */
221 221
222#define _INTEL_BDW_D_IDS(gt, info) \ 222#define _INTEL_BDW_D_IDS(gt, info) \
diff --git a/include/drm/ttm/ttm_bo_api.h b/include/drm/ttm/ttm_bo_api.h
index 0ccf7f267ff9..c768ddfbe53c 100644
--- a/include/drm/ttm/ttm_bo_api.h
+++ b/include/drm/ttm/ttm_bo_api.h
@@ -249,7 +249,7 @@ struct ttm_buffer_object {
249 * either of these locks held. 249 * either of these locks held.
250 */ 250 */
251 251
252 unsigned long offset; 252 uint64_t offset; /* GPU address space is independent of CPU word size */
253 uint32_t cur_placement; 253 uint32_t cur_placement;
254 254
255 struct sg_table *sg; 255 struct sg_table *sg;
diff --git a/include/drm/ttm/ttm_bo_driver.h b/include/drm/ttm/ttm_bo_driver.h
index 142d752fc450..813042cede57 100644
--- a/include/drm/ttm/ttm_bo_driver.h
+++ b/include/drm/ttm/ttm_bo_driver.h
@@ -277,7 +277,7 @@ struct ttm_mem_type_manager {
277 bool has_type; 277 bool has_type;
278 bool use_type; 278 bool use_type;
279 uint32_t flags; 279 uint32_t flags;
280 unsigned long gpu_offset; 280 uint64_t gpu_offset; /* GPU address space is independent of CPU word size */
281 uint64_t size; 281 uint64_t size;
282 uint32_t available_caching; 282 uint32_t available_caching;
283 uint32_t default_caching; 283 uint32_t default_caching;
diff --git a/include/dt-bindings/clock/alphascale,asm9260.h b/include/dt-bindings/clock/alphascale,asm9260.h
new file mode 100644
index 000000000000..04e8db27daf0
--- /dev/null
+++ b/include/dt-bindings/clock/alphascale,asm9260.h
@@ -0,0 +1,97 @@
1/*
2 * Copyright 2014 Oleksij Rempel <linux@rempel-privat.de>
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef _DT_BINDINGS_CLK_ASM9260_H
15#define _DT_BINDINGS_CLK_ASM9260_H
16
17/* ahb gate */
18#define CLKID_AHB_ROM 0
19#define CLKID_AHB_RAM 1
20#define CLKID_AHB_GPIO 2
21#define CLKID_AHB_MAC 3
22#define CLKID_AHB_EMI 4
23#define CLKID_AHB_USB0 5
24#define CLKID_AHB_USB1 6
25#define CLKID_AHB_DMA0 7
26#define CLKID_AHB_DMA1 8
27#define CLKID_AHB_UART0 9
28#define CLKID_AHB_UART1 10
29#define CLKID_AHB_UART2 11
30#define CLKID_AHB_UART3 12
31#define CLKID_AHB_UART4 13
32#define CLKID_AHB_UART5 14
33#define CLKID_AHB_UART6 15
34#define CLKID_AHB_UART7 16
35#define CLKID_AHB_UART8 17
36#define CLKID_AHB_UART9 18
37#define CLKID_AHB_I2S0 19
38#define CLKID_AHB_I2C0 20
39#define CLKID_AHB_I2C1 21
40#define CLKID_AHB_SSP0 22
41#define CLKID_AHB_IOCONFIG 23
42#define CLKID_AHB_WDT 24
43#define CLKID_AHB_CAN0 25
44#define CLKID_AHB_CAN1 26
45#define CLKID_AHB_MPWM 27
46#define CLKID_AHB_SPI0 28
47#define CLKID_AHB_SPI1 29
48#define CLKID_AHB_QEI 30
49#define CLKID_AHB_QUADSPI0 31
50#define CLKID_AHB_CAMIF 32
51#define CLKID_AHB_LCDIF 33
52#define CLKID_AHB_TIMER0 34
53#define CLKID_AHB_TIMER1 35
54#define CLKID_AHB_TIMER2 36
55#define CLKID_AHB_TIMER3 37
56#define CLKID_AHB_IRQ 38
57#define CLKID_AHB_RTC 39
58#define CLKID_AHB_NAND 40
59#define CLKID_AHB_ADC0 41
60#define CLKID_AHB_LED 42
61#define CLKID_AHB_DAC0 43
62#define CLKID_AHB_LCD 44
63#define CLKID_AHB_I2S1 45
64#define CLKID_AHB_MAC1 46
65
66/* devider */
67#define CLKID_SYS_CPU 47
68#define CLKID_SYS_AHB 48
69#define CLKID_SYS_I2S0M 49
70#define CLKID_SYS_I2S0S 50
71#define CLKID_SYS_I2S1M 51
72#define CLKID_SYS_I2S1S 52
73#define CLKID_SYS_UART0 53
74#define CLKID_SYS_UART1 54
75#define CLKID_SYS_UART2 55
76#define CLKID_SYS_UART3 56
77#define CLKID_SYS_UART4 56
78#define CLKID_SYS_UART5 57
79#define CLKID_SYS_UART6 58
80#define CLKID_SYS_UART7 59
81#define CLKID_SYS_UART8 60
82#define CLKID_SYS_UART9 61
83#define CLKID_SYS_SPI0 62
84#define CLKID_SYS_SPI1 63
85#define CLKID_SYS_QUADSPI 64
86#define CLKID_SYS_SSP0 65
87#define CLKID_SYS_NAND 66
88#define CLKID_SYS_TRACE 67
89#define CLKID_SYS_CAMM 68
90#define CLKID_SYS_WDT 69
91#define CLKID_SYS_CLKOUT 70
92#define CLKID_SYS_MAC 71
93#define CLKID_SYS_LCD 72
94#define CLKID_SYS_ADCANA 73
95
96#define MAX_CLKS 74
97#endif
diff --git a/include/dt-bindings/clock/exynos4.h b/include/dt-bindings/clock/exynos4.h
index 34fe28c622d0..c4b1676ea674 100644
--- a/include/dt-bindings/clock/exynos4.h
+++ b/include/dt-bindings/clock/exynos4.h
@@ -262,8 +262,13 @@
262#define CLK_DIV_MCUISP1 453 /* Exynos4x12 only */ 262#define CLK_DIV_MCUISP1 453 /* Exynos4x12 only */
263#define CLK_DIV_ACLK200 454 /* Exynos4x12 only */ 263#define CLK_DIV_ACLK200 454 /* Exynos4x12 only */
264#define CLK_DIV_ACLK400_MCUISP 455 /* Exynos4x12 only */ 264#define CLK_DIV_ACLK400_MCUISP 455 /* Exynos4x12 only */
265#define CLK_DIV_ACP 456
266#define CLK_DIV_DMC 457
267#define CLK_DIV_C2C 458 /* Exynos4x12 only */
268#define CLK_DIV_GDL 459
269#define CLK_DIV_GDR 460
265 270
266/* must be greater than maximal clock id */ 271/* must be greater than maximal clock id */
267#define CLK_NR_CLKS 456 272#define CLK_NR_CLKS 461
268 273
269#endif /* _DT_BINDINGS_CLOCK_EXYNOS_4_H */ 274#endif /* _DT_BINDINGS_CLOCK_EXYNOS_4_H */
diff --git a/include/dt-bindings/clock/exynos7-clk.h b/include/dt-bindings/clock/exynos7-clk.h
index 8e4681b07ae7..e33c75a3c09d 100644
--- a/include/dt-bindings/clock/exynos7-clk.h
+++ b/include/dt-bindings/clock/exynos7-clk.h
@@ -17,7 +17,11 @@
17#define DOUT_SCLK_CC_PLL 4 17#define DOUT_SCLK_CC_PLL 4
18#define DOUT_SCLK_MFC_PLL 5 18#define DOUT_SCLK_MFC_PLL 5
19#define DOUT_ACLK_CCORE_133 6 19#define DOUT_ACLK_CCORE_133 6
20#define TOPC_NR_CLK 7 20#define DOUT_ACLK_MSCL_532 7
21#define ACLK_MSCL_532 8
22#define DOUT_SCLK_AUD_PLL 9
23#define FOUT_AUD_PLL 10
24#define TOPC_NR_CLK 11
21 25
22/* TOP0 */ 26/* TOP0 */
23#define DOUT_ACLK_PERIC1 1 27#define DOUT_ACLK_PERIC1 1
@@ -26,7 +30,15 @@
26#define CLK_SCLK_UART1 4 30#define CLK_SCLK_UART1 4
27#define CLK_SCLK_UART2 5 31#define CLK_SCLK_UART2 5
28#define CLK_SCLK_UART3 6 32#define CLK_SCLK_UART3 6
29#define TOP0_NR_CLK 7 33#define CLK_SCLK_SPI0 7
34#define CLK_SCLK_SPI1 8
35#define CLK_SCLK_SPI2 9
36#define CLK_SCLK_SPI3 10
37#define CLK_SCLK_SPI4 11
38#define CLK_SCLK_SPDIF 12
39#define CLK_SCLK_PCM1 13
40#define CLK_SCLK_I2S1 14
41#define TOP0_NR_CLK 15
30 42
31/* TOP1 */ 43/* TOP1 */
32#define DOUT_ACLK_FSYS1_200 1 44#define DOUT_ACLK_FSYS1_200 1
@@ -70,7 +82,23 @@
70#define PCLK_HSI2C6 9 82#define PCLK_HSI2C6 9
71#define PCLK_HSI2C7 10 83#define PCLK_HSI2C7 10
72#define PCLK_HSI2C8 11 84#define PCLK_HSI2C8 11
73#define PERIC1_NR_CLK 12 85#define PCLK_SPI0 12
86#define PCLK_SPI1 13
87#define PCLK_SPI2 14
88#define PCLK_SPI3 15
89#define PCLK_SPI4 16
90#define SCLK_SPI0 17
91#define SCLK_SPI1 18
92#define SCLK_SPI2 19
93#define SCLK_SPI3 20
94#define SCLK_SPI4 21
95#define PCLK_I2S1 22
96#define PCLK_PCM1 23
97#define PCLK_SPDIF 24
98#define SCLK_I2S1 25
99#define SCLK_PCM1 26
100#define SCLK_SPDIF 27
101#define PERIC1_NR_CLK 28
74 102
75/* PERIS */ 103/* PERIS */
76#define PCLK_CHIPID 1 104#define PCLK_CHIPID 1
@@ -82,11 +110,63 @@
82 110
83/* FSYS0 */ 111/* FSYS0 */
84#define ACLK_MMC2 1 112#define ACLK_MMC2 1
85#define FSYS0_NR_CLK 2 113#define ACLK_AXIUS_USBDRD30X_FSYS0X 2
114#define ACLK_USBDRD300 3
115#define SCLK_USBDRD300_SUSPENDCLK 4
116#define SCLK_USBDRD300_REFCLK 5
117#define PHYCLK_USBDRD300_UDRD30_PIPE_PCLK_USER 6
118#define PHYCLK_USBDRD300_UDRD30_PHYCLK_USER 7
119#define OSCCLK_PHY_CLKOUT_USB30_PHY 8
120#define ACLK_PDMA0 9
121#define ACLK_PDMA1 10
122#define FSYS0_NR_CLK 11
86 123
87/* FSYS1 */ 124/* FSYS1 */
88#define ACLK_MMC1 1 125#define ACLK_MMC1 1
89#define ACLK_MMC0 2 126#define ACLK_MMC0 2
90#define FSYS1_NR_CLK 3 127#define FSYS1_NR_CLK 3
91 128
129/* MSCL */
130#define USERMUX_ACLK_MSCL_532 1
131#define DOUT_PCLK_MSCL 2
132#define ACLK_MSCL_0 3
133#define ACLK_MSCL_1 4
134#define ACLK_JPEG 5
135#define ACLK_G2D 6
136#define ACLK_LH_ASYNC_SI_MSCL_0 7
137#define ACLK_LH_ASYNC_SI_MSCL_1 8
138#define ACLK_AXI2ACEL_BRIDGE 9
139#define ACLK_XIU_MSCLX_0 10
140#define ACLK_XIU_MSCLX_1 11
141#define ACLK_QE_MSCL_0 12
142#define ACLK_QE_MSCL_1 13
143#define ACLK_QE_JPEG 14
144#define ACLK_QE_G2D 15
145#define ACLK_PPMU_MSCL_0 16
146#define ACLK_PPMU_MSCL_1 17
147#define ACLK_MSCLNP_133 18
148#define ACLK_AHB2APB_MSCL0P 19
149#define ACLK_AHB2APB_MSCL1P 20
150
151#define PCLK_MSCL_0 21
152#define PCLK_MSCL_1 22
153#define PCLK_JPEG 23
154#define PCLK_G2D 24
155#define PCLK_QE_MSCL_0 25
156#define PCLK_QE_MSCL_1 26
157#define PCLK_QE_JPEG 27
158#define PCLK_QE_G2D 28
159#define PCLK_PPMU_MSCL_0 29
160#define PCLK_PPMU_MSCL_1 30
161#define PCLK_AXI2ACEL_BRIDGE 31
162#define PCLK_PMU_MSCL 32
163#define MSCL_NR_CLK 33
164
165/* AUD */
166#define SCLK_I2S 1
167#define SCLK_PCM 2
168#define PCLK_I2S 3
169#define PCLK_PCM 4
170#define ACLK_ADMA 5
171#define AUD_NR_CLK 6
92#endif /* _DT_BINDINGS_CLOCK_EXYNOS7_H */ 172#endif /* _DT_BINDINGS_CLOCK_EXYNOS7_H */
diff --git a/include/dt-bindings/clock/qcom,gcc-ipq806x.h b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
index b857cadb0bd4..04fb29ae30e6 100644
--- a/include/dt-bindings/clock/qcom,gcc-ipq806x.h
+++ b/include/dt-bindings/clock/qcom,gcc-ipq806x.h
@@ -238,7 +238,6 @@
238#define PLL0_VOTE 221 238#define PLL0_VOTE 221
239#define PLL3 222 239#define PLL3 222
240#define PLL3_VOTE 223 240#define PLL3_VOTE 223
241#define PLL4 224
242#define PLL4_VOTE 225 241#define PLL4_VOTE 225
243#define PLL8 226 242#define PLL8 226
244#define PLL8_VOTE 227 243#define PLL8_VOTE 227
diff --git a/include/dt-bindings/clock/qcom,lcc-ipq806x.h b/include/dt-bindings/clock/qcom,lcc-ipq806x.h
new file mode 100644
index 000000000000..4e944b85c56d
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,lcc-ipq806x.h
@@ -0,0 +1,30 @@
1/*
2 * Copyright (c) 2014, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef _DT_BINDINGS_CLK_LCC_IPQ806X_H
15#define _DT_BINDINGS_CLK_LCC_IPQ806X_H
16
17#define PLL4 0
18#define MI2S_OSR_SRC 1
19#define MI2S_OSR_CLK 2
20#define MI2S_DIV_CLK 3
21#define MI2S_BIT_DIV_CLK 4
22#define MI2S_BIT_CLK 5
23#define PCM_SRC 6
24#define PCM_CLK_OUT 7
25#define PCM_CLK 8
26#define SPDIF_SRC 9
27#define SPDIF_CLK 10
28#define AHBIX_CLK 11
29
30#endif
diff --git a/include/dt-bindings/clock/qcom,lcc-msm8960.h b/include/dt-bindings/clock/qcom,lcc-msm8960.h
new file mode 100644
index 000000000000..4fb2aa64d9fe
--- /dev/null
+++ b/include/dt-bindings/clock/qcom,lcc-msm8960.h
@@ -0,0 +1,50 @@
1/*
2 * Copyright (c) 2014, The Linux Foundation. All rights reserved.
3 *
4 * This software is licensed under the terms of the GNU General Public
5 * License version 2, as published by the Free Software Foundation, and
6 * may be copied, distributed, and modified under those terms.
7 *
8 * This program is distributed in the hope that it will be useful,
9 * but WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
11 * GNU General Public License for more details.
12 */
13
14#ifndef _DT_BINDINGS_CLK_LCC_MSM8960_H
15#define _DT_BINDINGS_CLK_LCC_MSM8960_H
16
17#define PLL4 0
18#define MI2S_OSR_SRC 1
19#define MI2S_OSR_CLK 2
20#define MI2S_DIV_CLK 3
21#define MI2S_BIT_DIV_CLK 4
22#define MI2S_BIT_CLK 5
23#define PCM_SRC 6
24#define PCM_CLK_OUT 7
25#define PCM_CLK 8
26#define SLIMBUS_SRC 9
27#define AUDIO_SLIMBUS_CLK 10
28#define SPS_SLIMBUS_CLK 11
29#define CODEC_I2S_MIC_OSR_SRC 12
30#define CODEC_I2S_MIC_OSR_CLK 13
31#define CODEC_I2S_MIC_DIV_CLK 14
32#define CODEC_I2S_MIC_BIT_DIV_CLK 15
33#define CODEC_I2S_MIC_BIT_CLK 16
34#define SPARE_I2S_MIC_OSR_SRC 17
35#define SPARE_I2S_MIC_OSR_CLK 18
36#define SPARE_I2S_MIC_DIV_CLK 19
37#define SPARE_I2S_MIC_BIT_DIV_CLK 20
38#define SPARE_I2S_MIC_BIT_CLK 21
39#define CODEC_I2S_SPKR_OSR_SRC 22
40#define CODEC_I2S_SPKR_OSR_CLK 23
41#define CODEC_I2S_SPKR_DIV_CLK 24
42#define CODEC_I2S_SPKR_BIT_DIV_CLK 25
43#define CODEC_I2S_SPKR_BIT_CLK 26
44#define SPARE_I2S_SPKR_OSR_SRC 27
45#define SPARE_I2S_SPKR_OSR_CLK 28
46#define SPARE_I2S_SPKR_DIV_CLK 29
47#define SPARE_I2S_SPKR_BIT_DIV_CLK 30
48#define SPARE_I2S_SPKR_BIT_CLK 31
49
50#endif
diff --git a/include/dt-bindings/clock/tegra124-car-common.h b/include/dt-bindings/clock/tegra124-car-common.h
new file mode 100644
index 000000000000..ae2eb17a1658
--- /dev/null
+++ b/include/dt-bindings/clock/tegra124-car-common.h
@@ -0,0 +1,345 @@
1/*
2 * This header provides constants for binding nvidia,tegra124-car or
3 * nvidia,tegra132-car.
4 *
5 * The first 192 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB
6 * registers. These IDs often match those in the CAR's RST_DEVICES registers,
7 * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In
8 * this case, those clocks are assigned IDs above 185 in order to highlight
9 * this issue. Implementations that interpret these clock IDs as bit values
10 * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to
11 * explicitly handle these special cases.
12 *
13 * The balance of the clocks controlled by the CAR are assigned IDs of 185 and
14 * above.
15 */
16
17#ifndef _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H
18#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H
19
20/* 0 */
21/* 1 */
22/* 2 */
23#define TEGRA124_CLK_ISPB 3
24#define TEGRA124_CLK_RTC 4
25#define TEGRA124_CLK_TIMER 5
26#define TEGRA124_CLK_UARTA 6
27/* 7 (register bit affects uartb and vfir) */
28/* 8 */
29#define TEGRA124_CLK_SDMMC2 9
30/* 10 (register bit affects spdif_in and spdif_out) */
31#define TEGRA124_CLK_I2S1 11
32#define TEGRA124_CLK_I2C1 12
33/* 13 */
34#define TEGRA124_CLK_SDMMC1 14
35#define TEGRA124_CLK_SDMMC4 15
36/* 16 */
37#define TEGRA124_CLK_PWM 17
38#define TEGRA124_CLK_I2S2 18
39/* 20 (register bit affects vi and vi_sensor) */
40/* 21 */
41#define TEGRA124_CLK_USBD 22
42#define TEGRA124_CLK_ISP 23
43/* 26 */
44/* 25 */
45#define TEGRA124_CLK_DISP2 26
46#define TEGRA124_CLK_DISP1 27
47#define TEGRA124_CLK_HOST1X 28
48#define TEGRA124_CLK_VCP 29
49#define TEGRA124_CLK_I2S0 30
50/* 31 */
51
52#define TEGRA124_CLK_MC 32
53/* 33 */
54#define TEGRA124_CLK_APBDMA 34
55/* 35 */
56#define TEGRA124_CLK_KBC 36
57/* 37 */
58/* 38 */
59/* 39 (register bit affects fuse and fuse_burn) */
60#define TEGRA124_CLK_KFUSE 40
61#define TEGRA124_CLK_SBC1 41
62#define TEGRA124_CLK_NOR 42
63/* 43 */
64#define TEGRA124_CLK_SBC2 44
65/* 45 */
66#define TEGRA124_CLK_SBC3 46
67#define TEGRA124_CLK_I2C5 47
68#define TEGRA124_CLK_DSIA 48
69/* 49 */
70#define TEGRA124_CLK_MIPI 50
71#define TEGRA124_CLK_HDMI 51
72#define TEGRA124_CLK_CSI 52
73/* 53 */
74#define TEGRA124_CLK_I2C2 54
75#define TEGRA124_CLK_UARTC 55
76#define TEGRA124_CLK_MIPI_CAL 56
77#define TEGRA124_CLK_EMC 57
78#define TEGRA124_CLK_USB2 58
79#define TEGRA124_CLK_USB3 59
80/* 60 */
81#define TEGRA124_CLK_VDE 61
82#define TEGRA124_CLK_BSEA 62
83#define TEGRA124_CLK_BSEV 63
84
85/* 64 */
86#define TEGRA124_CLK_UARTD 65
87/* 66 */
88#define TEGRA124_CLK_I2C3 67
89#define TEGRA124_CLK_SBC4 68
90#define TEGRA124_CLK_SDMMC3 69
91#define TEGRA124_CLK_PCIE 70
92#define TEGRA124_CLK_OWR 71
93#define TEGRA124_CLK_AFI 72
94#define TEGRA124_CLK_CSITE 73
95/* 74 */
96/* 75 */
97#define TEGRA124_CLK_LA 76
98#define TEGRA124_CLK_TRACE 77
99#define TEGRA124_CLK_SOC_THERM 78
100#define TEGRA124_CLK_DTV 79
101/* 80 */
102#define TEGRA124_CLK_I2CSLOW 81
103#define TEGRA124_CLK_DSIB 82
104#define TEGRA124_CLK_TSEC 83
105/* 84 */
106/* 85 */
107/* 86 */
108/* 87 */
109/* 88 */
110#define TEGRA124_CLK_XUSB_HOST 89
111/* 90 */
112#define TEGRA124_CLK_MSENC 91
113#define TEGRA124_CLK_CSUS 92
114/* 93 */
115/* 94 */
116/* 95 (bit affects xusb_dev and xusb_dev_src) */
117
118/* 96 */
119/* 97 */
120/* 98 */
121#define TEGRA124_CLK_MSELECT 99
122#define TEGRA124_CLK_TSENSOR 100
123#define TEGRA124_CLK_I2S3 101
124#define TEGRA124_CLK_I2S4 102
125#define TEGRA124_CLK_I2C4 103
126#define TEGRA124_CLK_SBC5 104
127#define TEGRA124_CLK_SBC6 105
128#define TEGRA124_CLK_D_AUDIO 106
129#define TEGRA124_CLK_APBIF 107
130#define TEGRA124_CLK_DAM0 108
131#define TEGRA124_CLK_DAM1 109
132#define TEGRA124_CLK_DAM2 110
133#define TEGRA124_CLK_HDA2CODEC_2X 111
134/* 112 */
135#define TEGRA124_CLK_AUDIO0_2X 113
136#define TEGRA124_CLK_AUDIO1_2X 114
137#define TEGRA124_CLK_AUDIO2_2X 115
138#define TEGRA124_CLK_AUDIO3_2X 116
139#define TEGRA124_CLK_AUDIO4_2X 117
140#define TEGRA124_CLK_SPDIF_2X 118
141#define TEGRA124_CLK_ACTMON 119
142#define TEGRA124_CLK_EXTERN1 120
143#define TEGRA124_CLK_EXTERN2 121
144#define TEGRA124_CLK_EXTERN3 122
145#define TEGRA124_CLK_SATA_OOB 123
146#define TEGRA124_CLK_SATA 124
147#define TEGRA124_CLK_HDA 125
148/* 126 */
149#define TEGRA124_CLK_SE 127
150
151#define TEGRA124_CLK_HDA2HDMI 128
152#define TEGRA124_CLK_SATA_COLD 129
153/* 130 */
154/* 131 */
155/* 132 */
156/* 133 */
157/* 134 */
158/* 135 */
159/* 136 */
160/* 137 */
161/* 138 */
162/* 139 */
163/* 140 */
164/* 141 */
165/* 142 */
166/* 143 (bit affects xusb_falcon_src, xusb_fs_src, */
167/* xusb_host_src and xusb_ss_src) */
168#define TEGRA124_CLK_CILAB 144
169#define TEGRA124_CLK_CILCD 145
170#define TEGRA124_CLK_CILE 146
171#define TEGRA124_CLK_DSIALP 147
172#define TEGRA124_CLK_DSIBLP 148
173#define TEGRA124_CLK_ENTROPY 149
174#define TEGRA124_CLK_DDS 150
175/* 151 */
176#define TEGRA124_CLK_DP2 152
177#define TEGRA124_CLK_AMX 153
178#define TEGRA124_CLK_ADX 154
179/* 155 (bit affects dfll_ref and dfll_soc) */
180#define TEGRA124_CLK_XUSB_SS 156
181/* 157 */
182/* 158 */
183/* 159 */
184
185/* 160 */
186/* 161 */
187/* 162 */
188/* 163 */
189/* 164 */
190/* 165 */
191#define TEGRA124_CLK_I2C6 166
192/* 167 */
193/* 168 */
194/* 169 */
195/* 170 */
196#define TEGRA124_CLK_VIM2_CLK 171
197/* 172 */
198/* 173 */
199/* 174 */
200/* 175 */
201#define TEGRA124_CLK_HDMI_AUDIO 176
202#define TEGRA124_CLK_CLK72MHZ 177
203#define TEGRA124_CLK_VIC03 178
204/* 179 */
205#define TEGRA124_CLK_ADX1 180
206#define TEGRA124_CLK_DPAUX 181
207#define TEGRA124_CLK_SOR0 182
208/* 183 */
209#define TEGRA124_CLK_GPU 184
210#define TEGRA124_CLK_AMX1 185
211/* 186 */
212/* 187 */
213/* 188 */
214/* 189 */
215/* 190 */
216/* 191 */
217#define TEGRA124_CLK_UARTB 192
218#define TEGRA124_CLK_VFIR 193
219#define TEGRA124_CLK_SPDIF_IN 194
220#define TEGRA124_CLK_SPDIF_OUT 195
221#define TEGRA124_CLK_VI 196
222#define TEGRA124_CLK_VI_SENSOR 197
223#define TEGRA124_CLK_FUSE 198
224#define TEGRA124_CLK_FUSE_BURN 199
225#define TEGRA124_CLK_CLK_32K 200
226#define TEGRA124_CLK_CLK_M 201
227#define TEGRA124_CLK_CLK_M_DIV2 202
228#define TEGRA124_CLK_CLK_M_DIV4 203
229#define TEGRA124_CLK_PLL_REF 204
230#define TEGRA124_CLK_PLL_C 205
231#define TEGRA124_CLK_PLL_C_OUT1 206
232#define TEGRA124_CLK_PLL_C2 207
233#define TEGRA124_CLK_PLL_C3 208
234#define TEGRA124_CLK_PLL_M 209
235#define TEGRA124_CLK_PLL_M_OUT1 210
236#define TEGRA124_CLK_PLL_P 211
237#define TEGRA124_CLK_PLL_P_OUT1 212
238#define TEGRA124_CLK_PLL_P_OUT2 213
239#define TEGRA124_CLK_PLL_P_OUT3 214
240#define TEGRA124_CLK_PLL_P_OUT4 215
241#define TEGRA124_CLK_PLL_A 216
242#define TEGRA124_CLK_PLL_A_OUT0 217
243#define TEGRA124_CLK_PLL_D 218
244#define TEGRA124_CLK_PLL_D_OUT0 219
245#define TEGRA124_CLK_PLL_D2 220
246#define TEGRA124_CLK_PLL_D2_OUT0 221
247#define TEGRA124_CLK_PLL_U 222
248#define TEGRA124_CLK_PLL_U_480M 223
249
250#define TEGRA124_CLK_PLL_U_60M 224
251#define TEGRA124_CLK_PLL_U_48M 225
252#define TEGRA124_CLK_PLL_U_12M 226
253/* 227 */
254/* 228 */
255#define TEGRA124_CLK_PLL_RE_VCO 229
256#define TEGRA124_CLK_PLL_RE_OUT 230
257#define TEGRA124_CLK_PLL_E 231
258#define TEGRA124_CLK_SPDIF_IN_SYNC 232
259#define TEGRA124_CLK_I2S0_SYNC 233
260#define TEGRA124_CLK_I2S1_SYNC 234
261#define TEGRA124_CLK_I2S2_SYNC 235
262#define TEGRA124_CLK_I2S3_SYNC 236
263#define TEGRA124_CLK_I2S4_SYNC 237
264#define TEGRA124_CLK_VIMCLK_SYNC 238
265#define TEGRA124_CLK_AUDIO0 239
266#define TEGRA124_CLK_AUDIO1 240
267#define TEGRA124_CLK_AUDIO2 241
268#define TEGRA124_CLK_AUDIO3 242
269#define TEGRA124_CLK_AUDIO4 243
270#define TEGRA124_CLK_SPDIF 244
271#define TEGRA124_CLK_CLK_OUT_1 245
272#define TEGRA124_CLK_CLK_OUT_2 246
273#define TEGRA124_CLK_CLK_OUT_3 247
274#define TEGRA124_CLK_BLINK 248
275/* 249 */
276/* 250 */
277/* 251 */
278#define TEGRA124_CLK_XUSB_HOST_SRC 252
279#define TEGRA124_CLK_XUSB_FALCON_SRC 253
280#define TEGRA124_CLK_XUSB_FS_SRC 254
281#define TEGRA124_CLK_XUSB_SS_SRC 255
282
283#define TEGRA124_CLK_XUSB_DEV_SRC 256
284#define TEGRA124_CLK_XUSB_DEV 257
285#define TEGRA124_CLK_XUSB_HS_SRC 258
286#define TEGRA124_CLK_SCLK 259
287#define TEGRA124_CLK_HCLK 260
288#define TEGRA124_CLK_PCLK 261
289/* 262 */
290/* 263 */
291#define TEGRA124_CLK_DFLL_REF 264
292#define TEGRA124_CLK_DFLL_SOC 265
293#define TEGRA124_CLK_VI_SENSOR2 266
294#define TEGRA124_CLK_PLL_P_OUT5 267
295#define TEGRA124_CLK_CML0 268
296#define TEGRA124_CLK_CML1 269
297#define TEGRA124_CLK_PLL_C4 270
298#define TEGRA124_CLK_PLL_DP 271
299#define TEGRA124_CLK_PLL_E_MUX 272
300#define TEGRA124_CLK_PLLD_DSI 273
301/* 274 */
302/* 275 */
303/* 276 */
304/* 277 */
305/* 278 */
306/* 279 */
307/* 280 */
308/* 281 */
309/* 282 */
310/* 283 */
311/* 284 */
312/* 285 */
313/* 286 */
314/* 287 */
315
316/* 288 */
317/* 289 */
318/* 290 */
319/* 291 */
320/* 292 */
321/* 293 */
322/* 294 */
323/* 295 */
324/* 296 */
325/* 297 */
326/* 298 */
327/* 299 */
328#define TEGRA124_CLK_AUDIO0_MUX 300
329#define TEGRA124_CLK_AUDIO1_MUX 301
330#define TEGRA124_CLK_AUDIO2_MUX 302
331#define TEGRA124_CLK_AUDIO3_MUX 303
332#define TEGRA124_CLK_AUDIO4_MUX 304
333#define TEGRA124_CLK_SPDIF_MUX 305
334#define TEGRA124_CLK_CLK_OUT_1_MUX 306
335#define TEGRA124_CLK_CLK_OUT_2_MUX 307
336#define TEGRA124_CLK_CLK_OUT_3_MUX 308
337/* 309 */
338/* 310 */
339#define TEGRA124_CLK_SOR0_LVDS 311
340#define TEGRA124_CLK_XUSB_SS_DIV2 312
341
342#define TEGRA124_CLK_PLL_M_UD 313
343#define TEGRA124_CLK_PLL_C_UD 314
344
345#endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_COMMON_H */
diff --git a/include/dt-bindings/clock/tegra124-car.h b/include/dt-bindings/clock/tegra124-car.h
index af9bc9a3ddbc..2860737f0443 100644
--- a/include/dt-bindings/clock/tegra124-car.h
+++ b/include/dt-bindings/clock/tegra124-car.h
@@ -1,346 +1,19 @@
1/* 1/*
2 * This header provides constants for binding nvidia,tegra124-car. 2 * This header provides Tegra124-specific constants for binding
3 * 3 * nvidia,tegra124-car.
4 * The first 192 clocks are numbered to match the bits in the CAR's CLK_OUT_ENB
5 * registers. These IDs often match those in the CAR's RST_DEVICES registers,
6 * but not in all cases. Some bits in CLK_OUT_ENB affect multiple clocks. In
7 * this case, those clocks are assigned IDs above 185 in order to highlight
8 * this issue. Implementations that interpret these clock IDs as bit values
9 * within the CLK_OUT_ENB or RST_DEVICES registers should be careful to
10 * explicitly handle these special cases.
11 *
12 * The balance of the clocks controlled by the CAR are assigned IDs of 185 and
13 * above.
14 */ 4 */
15 5
6#include <dt-bindings/clock/tegra124-car-common.h>
7
16#ifndef _DT_BINDINGS_CLOCK_TEGRA124_CAR_H 8#ifndef _DT_BINDINGS_CLOCK_TEGRA124_CAR_H
17#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H 9#define _DT_BINDINGS_CLOCK_TEGRA124_CAR_H
18 10
19/* 0 */ 11#define TEGRA124_CLK_PLL_X 227
20/* 1 */ 12#define TEGRA124_CLK_PLL_X_OUT0 228
21/* 2 */
22#define TEGRA124_CLK_ISPB 3
23#define TEGRA124_CLK_RTC 4
24#define TEGRA124_CLK_TIMER 5
25#define TEGRA124_CLK_UARTA 6
26/* 7 (register bit affects uartb and vfir) */
27/* 8 */
28#define TEGRA124_CLK_SDMMC2 9
29/* 10 (register bit affects spdif_in and spdif_out) */
30#define TEGRA124_CLK_I2S1 11
31#define TEGRA124_CLK_I2C1 12
32/* 13 */
33#define TEGRA124_CLK_SDMMC1 14
34#define TEGRA124_CLK_SDMMC4 15
35/* 16 */
36#define TEGRA124_CLK_PWM 17
37#define TEGRA124_CLK_I2S2 18
38/* 20 (register bit affects vi and vi_sensor) */
39/* 21 */
40#define TEGRA124_CLK_USBD 22
41#define TEGRA124_CLK_ISP 23
42/* 26 */
43/* 25 */
44#define TEGRA124_CLK_DISP2 26
45#define TEGRA124_CLK_DISP1 27
46#define TEGRA124_CLK_HOST1X 28
47#define TEGRA124_CLK_VCP 29
48#define TEGRA124_CLK_I2S0 30
49/* 31 */
50
51#define TEGRA124_CLK_MC 32
52/* 33 */
53#define TEGRA124_CLK_APBDMA 34
54/* 35 */
55#define TEGRA124_CLK_KBC 36
56/* 37 */
57/* 38 */
58/* 39 (register bit affects fuse and fuse_burn) */
59#define TEGRA124_CLK_KFUSE 40
60#define TEGRA124_CLK_SBC1 41
61#define TEGRA124_CLK_NOR 42
62/* 43 */
63#define TEGRA124_CLK_SBC2 44
64/* 45 */
65#define TEGRA124_CLK_SBC3 46
66#define TEGRA124_CLK_I2C5 47
67#define TEGRA124_CLK_DSIA 48
68/* 49 */
69#define TEGRA124_CLK_MIPI 50
70#define TEGRA124_CLK_HDMI 51
71#define TEGRA124_CLK_CSI 52
72/* 53 */
73#define TEGRA124_CLK_I2C2 54
74#define TEGRA124_CLK_UARTC 55
75#define TEGRA124_CLK_MIPI_CAL 56
76#define TEGRA124_CLK_EMC 57
77#define TEGRA124_CLK_USB2 58
78#define TEGRA124_CLK_USB3 59
79/* 60 */
80#define TEGRA124_CLK_VDE 61
81#define TEGRA124_CLK_BSEA 62
82#define TEGRA124_CLK_BSEV 63
83
84/* 64 */
85#define TEGRA124_CLK_UARTD 65
86/* 66 */
87#define TEGRA124_CLK_I2C3 67
88#define TEGRA124_CLK_SBC4 68
89#define TEGRA124_CLK_SDMMC3 69
90#define TEGRA124_CLK_PCIE 70
91#define TEGRA124_CLK_OWR 71
92#define TEGRA124_CLK_AFI 72
93#define TEGRA124_CLK_CSITE 73
94/* 74 */
95/* 75 */
96#define TEGRA124_CLK_LA 76
97#define TEGRA124_CLK_TRACE 77
98#define TEGRA124_CLK_SOC_THERM 78
99#define TEGRA124_CLK_DTV 79
100/* 80 */
101#define TEGRA124_CLK_I2CSLOW 81
102#define TEGRA124_CLK_DSIB 82
103#define TEGRA124_CLK_TSEC 83
104/* 84 */
105/* 85 */
106/* 86 */
107/* 87 */
108/* 88 */
109#define TEGRA124_CLK_XUSB_HOST 89
110/* 90 */
111#define TEGRA124_CLK_MSENC 91
112#define TEGRA124_CLK_CSUS 92
113/* 93 */
114/* 94 */
115/* 95 (bit affects xusb_dev and xusb_dev_src) */
116
117/* 96 */
118/* 97 */
119/* 98 */
120#define TEGRA124_CLK_MSELECT 99
121#define TEGRA124_CLK_TSENSOR 100
122#define TEGRA124_CLK_I2S3 101
123#define TEGRA124_CLK_I2S4 102
124#define TEGRA124_CLK_I2C4 103
125#define TEGRA124_CLK_SBC5 104
126#define TEGRA124_CLK_SBC6 105
127#define TEGRA124_CLK_D_AUDIO 106
128#define TEGRA124_CLK_APBIF 107
129#define TEGRA124_CLK_DAM0 108
130#define TEGRA124_CLK_DAM1 109
131#define TEGRA124_CLK_DAM2 110
132#define TEGRA124_CLK_HDA2CODEC_2X 111
133/* 112 */
134#define TEGRA124_CLK_AUDIO0_2X 113
135#define TEGRA124_CLK_AUDIO1_2X 114
136#define TEGRA124_CLK_AUDIO2_2X 115
137#define TEGRA124_CLK_AUDIO3_2X 116
138#define TEGRA124_CLK_AUDIO4_2X 117
139#define TEGRA124_CLK_SPDIF_2X 118
140#define TEGRA124_CLK_ACTMON 119
141#define TEGRA124_CLK_EXTERN1 120
142#define TEGRA124_CLK_EXTERN2 121
143#define TEGRA124_CLK_EXTERN3 122
144#define TEGRA124_CLK_SATA_OOB 123
145#define TEGRA124_CLK_SATA 124
146#define TEGRA124_CLK_HDA 125
147/* 126 */
148#define TEGRA124_CLK_SE 127
149
150#define TEGRA124_CLK_HDA2HDMI 128
151#define TEGRA124_CLK_SATA_COLD 129
152/* 130 */
153/* 131 */
154/* 132 */
155/* 133 */
156/* 134 */
157/* 135 */
158/* 136 */
159/* 137 */
160/* 138 */
161/* 139 */
162/* 140 */
163/* 141 */
164/* 142 */
165/* 143 (bit affects xusb_falcon_src, xusb_fs_src, */
166/* xusb_host_src and xusb_ss_src) */
167#define TEGRA124_CLK_CILAB 144
168#define TEGRA124_CLK_CILCD 145
169#define TEGRA124_CLK_CILE 146
170#define TEGRA124_CLK_DSIALP 147
171#define TEGRA124_CLK_DSIBLP 148
172#define TEGRA124_CLK_ENTROPY 149
173#define TEGRA124_CLK_DDS 150
174/* 151 */
175#define TEGRA124_CLK_DP2 152
176#define TEGRA124_CLK_AMX 153
177#define TEGRA124_CLK_ADX 154
178/* 155 (bit affects dfll_ref and dfll_soc) */
179#define TEGRA124_CLK_XUSB_SS 156
180/* 157 */
181/* 158 */
182/* 159 */
183
184/* 160 */
185/* 161 */
186/* 162 */
187/* 163 */
188/* 164 */
189/* 165 */
190#define TEGRA124_CLK_I2C6 166
191/* 167 */
192/* 168 */
193/* 169 */
194/* 170 */
195#define TEGRA124_CLK_VIM2_CLK 171
196/* 172 */
197/* 173 */
198/* 174 */
199/* 175 */
200#define TEGRA124_CLK_HDMI_AUDIO 176
201#define TEGRA124_CLK_CLK72MHZ 177
202#define TEGRA124_CLK_VIC03 178
203/* 179 */
204#define TEGRA124_CLK_ADX1 180
205#define TEGRA124_CLK_DPAUX 181
206#define TEGRA124_CLK_SOR0 182
207/* 183 */
208#define TEGRA124_CLK_GPU 184
209#define TEGRA124_CLK_AMX1 185
210/* 186 */
211/* 187 */
212/* 188 */
213/* 189 */
214/* 190 */
215/* 191 */
216#define TEGRA124_CLK_UARTB 192
217#define TEGRA124_CLK_VFIR 193
218#define TEGRA124_CLK_SPDIF_IN 194
219#define TEGRA124_CLK_SPDIF_OUT 195
220#define TEGRA124_CLK_VI 196
221#define TEGRA124_CLK_VI_SENSOR 197
222#define TEGRA124_CLK_FUSE 198
223#define TEGRA124_CLK_FUSE_BURN 199
224#define TEGRA124_CLK_CLK_32K 200
225#define TEGRA124_CLK_CLK_M 201
226#define TEGRA124_CLK_CLK_M_DIV2 202
227#define TEGRA124_CLK_CLK_M_DIV4 203
228#define TEGRA124_CLK_PLL_REF 204
229#define TEGRA124_CLK_PLL_C 205
230#define TEGRA124_CLK_PLL_C_OUT1 206
231#define TEGRA124_CLK_PLL_C2 207
232#define TEGRA124_CLK_PLL_C3 208
233#define TEGRA124_CLK_PLL_M 209
234#define TEGRA124_CLK_PLL_M_OUT1 210
235#define TEGRA124_CLK_PLL_P 211
236#define TEGRA124_CLK_PLL_P_OUT1 212
237#define TEGRA124_CLK_PLL_P_OUT2 213
238#define TEGRA124_CLK_PLL_P_OUT3 214
239#define TEGRA124_CLK_PLL_P_OUT4 215
240#define TEGRA124_CLK_PLL_A 216
241#define TEGRA124_CLK_PLL_A_OUT0 217
242#define TEGRA124_CLK_PLL_D 218
243#define TEGRA124_CLK_PLL_D_OUT0 219
244#define TEGRA124_CLK_PLL_D2 220
245#define TEGRA124_CLK_PLL_D2_OUT0 221
246#define TEGRA124_CLK_PLL_U 222
247#define TEGRA124_CLK_PLL_U_480M 223
248
249#define TEGRA124_CLK_PLL_U_60M 224
250#define TEGRA124_CLK_PLL_U_48M 225
251#define TEGRA124_CLK_PLL_U_12M 226
252#define TEGRA124_CLK_PLL_X 227
253#define TEGRA124_CLK_PLL_X_OUT0 228
254#define TEGRA124_CLK_PLL_RE_VCO 229
255#define TEGRA124_CLK_PLL_RE_OUT 230
256#define TEGRA124_CLK_PLL_E 231
257#define TEGRA124_CLK_SPDIF_IN_SYNC 232
258#define TEGRA124_CLK_I2S0_SYNC 233
259#define TEGRA124_CLK_I2S1_SYNC 234
260#define TEGRA124_CLK_I2S2_SYNC 235
261#define TEGRA124_CLK_I2S3_SYNC 236
262#define TEGRA124_CLK_I2S4_SYNC 237
263#define TEGRA124_CLK_VIMCLK_SYNC 238
264#define TEGRA124_CLK_AUDIO0 239
265#define TEGRA124_CLK_AUDIO1 240
266#define TEGRA124_CLK_AUDIO2 241
267#define TEGRA124_CLK_AUDIO3 242
268#define TEGRA124_CLK_AUDIO4 243
269#define TEGRA124_CLK_SPDIF 244
270#define TEGRA124_CLK_CLK_OUT_1 245
271#define TEGRA124_CLK_CLK_OUT_2 246
272#define TEGRA124_CLK_CLK_OUT_3 247
273#define TEGRA124_CLK_BLINK 248
274/* 249 */
275/* 250 */
276/* 251 */
277#define TEGRA124_CLK_XUSB_HOST_SRC 252
278#define TEGRA124_CLK_XUSB_FALCON_SRC 253
279#define TEGRA124_CLK_XUSB_FS_SRC 254
280#define TEGRA124_CLK_XUSB_SS_SRC 255
281
282#define TEGRA124_CLK_XUSB_DEV_SRC 256
283#define TEGRA124_CLK_XUSB_DEV 257
284#define TEGRA124_CLK_XUSB_HS_SRC 258
285#define TEGRA124_CLK_SCLK 259
286#define TEGRA124_CLK_HCLK 260
287#define TEGRA124_CLK_PCLK 261
288#define TEGRA124_CLK_CCLK_G 262
289#define TEGRA124_CLK_CCLK_LP 263
290#define TEGRA124_CLK_DFLL_REF 264
291#define TEGRA124_CLK_DFLL_SOC 265
292#define TEGRA124_CLK_VI_SENSOR2 266
293#define TEGRA124_CLK_PLL_P_OUT5 267
294#define TEGRA124_CLK_CML0 268
295#define TEGRA124_CLK_CML1 269
296#define TEGRA124_CLK_PLL_C4 270
297#define TEGRA124_CLK_PLL_DP 271
298#define TEGRA124_CLK_PLL_E_MUX 272
299/* 273 */
300/* 274 */
301/* 275 */
302/* 276 */
303/* 277 */
304/* 278 */
305/* 279 */
306/* 280 */
307/* 281 */
308/* 282 */
309/* 283 */
310/* 284 */
311/* 285 */
312/* 286 */
313/* 287 */
314
315/* 288 */
316/* 289 */
317/* 290 */
318/* 291 */
319/* 292 */
320/* 293 */
321/* 294 */
322/* 295 */
323/* 296 */
324/* 297 */
325/* 298 */
326/* 299 */
327#define TEGRA124_CLK_AUDIO0_MUX 300
328#define TEGRA124_CLK_AUDIO1_MUX 301
329#define TEGRA124_CLK_AUDIO2_MUX 302
330#define TEGRA124_CLK_AUDIO3_MUX 303
331#define TEGRA124_CLK_AUDIO4_MUX 304
332#define TEGRA124_CLK_SPDIF_MUX 305
333#define TEGRA124_CLK_CLK_OUT_1_MUX 306
334#define TEGRA124_CLK_CLK_OUT_2_MUX 307
335#define TEGRA124_CLK_CLK_OUT_3_MUX 308
336#define TEGRA124_CLK_DSIA_MUX 309
337#define TEGRA124_CLK_DSIB_MUX 310
338#define TEGRA124_CLK_SOR0_LVDS 311
339#define TEGRA124_CLK_XUSB_SS_DIV2 312
340 13
341#define TEGRA124_CLK_PLL_M_UD 313 14#define TEGRA124_CLK_CCLK_G 262
342#define TEGRA124_CLK_PLL_C_UD 314 15#define TEGRA124_CLK_CCLK_LP 263
343 16
344#define TEGRA124_CLK_CLK_MAX 315 17#define TEGRA124_CLK_CLK_MAX 315
345 18
346#endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */ 19#endif /* _DT_BINDINGS_CLOCK_TEGRA124_CAR_H */
diff --git a/include/dt-bindings/pinctrl/am33xx.h b/include/dt-bindings/pinctrl/am33xx.h
index 2fbc804e1a45..226f77246a70 100644
--- a/include/dt-bindings/pinctrl/am33xx.h
+++ b/include/dt-bindings/pinctrl/am33xx.h
@@ -13,7 +13,8 @@
13 13
14#define PULL_DISABLE (1 << 3) 14#define PULL_DISABLE (1 << 3)
15#define INPUT_EN (1 << 5) 15#define INPUT_EN (1 << 5)
16#define SLEWCTRL_FAST (1 << 6) 16#define SLEWCTRL_SLOW (1 << 6)
17#define SLEWCTRL_FAST 0
17 18
18/* update macro depending on INPUT_EN and PULL_ENA */ 19/* update macro depending on INPUT_EN and PULL_ENA */
19#undef PIN_OUTPUT 20#undef PIN_OUTPUT
diff --git a/include/dt-bindings/pinctrl/am43xx.h b/include/dt-bindings/pinctrl/am43xx.h
index 9c2e4f82381e..5f4d01898c9c 100644
--- a/include/dt-bindings/pinctrl/am43xx.h
+++ b/include/dt-bindings/pinctrl/am43xx.h
@@ -18,7 +18,8 @@
18#define PULL_DISABLE (1 << 16) 18#define PULL_DISABLE (1 << 16)
19#define PULL_UP (1 << 17) 19#define PULL_UP (1 << 17)
20#define INPUT_EN (1 << 18) 20#define INPUT_EN (1 << 18)
21#define SLEWCTRL_FAST (1 << 19) 21#define SLEWCTRL_SLOW (1 << 19)
22#define SLEWCTRL_FAST 0
22#define DS0_PULL_UP_DOWN_EN (1 << 27) 23#define DS0_PULL_UP_DOWN_EN (1 << 27)
23 24
24#define PIN_OUTPUT (PULL_DISABLE) 25#define PIN_OUTPUT (PULL_DISABLE)
diff --git a/include/kvm/arm_vgic.h b/include/kvm/arm_vgic.h
index 7c55dd5dd2c9..66203b268984 100644
--- a/include/kvm/arm_vgic.h
+++ b/include/kvm/arm_vgic.h
@@ -114,6 +114,7 @@ struct vgic_ops {
114 void (*sync_lr_elrsr)(struct kvm_vcpu *, int, struct vgic_lr); 114 void (*sync_lr_elrsr)(struct kvm_vcpu *, int, struct vgic_lr);
115 u64 (*get_elrsr)(const struct kvm_vcpu *vcpu); 115 u64 (*get_elrsr)(const struct kvm_vcpu *vcpu);
116 u64 (*get_eisr)(const struct kvm_vcpu *vcpu); 116 u64 (*get_eisr)(const struct kvm_vcpu *vcpu);
117 void (*clear_eisr)(struct kvm_vcpu *vcpu);
117 u32 (*get_interrupt_status)(const struct kvm_vcpu *vcpu); 118 u32 (*get_interrupt_status)(const struct kvm_vcpu *vcpu);
118 void (*enable_underflow)(struct kvm_vcpu *vcpu); 119 void (*enable_underflow)(struct kvm_vcpu *vcpu);
119 void (*disable_underflow)(struct kvm_vcpu *vcpu); 120 void (*disable_underflow)(struct kvm_vcpu *vcpu);
diff --git a/include/linux/clk-private.h b/include/linux/clk-private.h
deleted file mode 100644
index 0ca5f6046920..000000000000
--- a/include/linux/clk-private.h
+++ /dev/null
@@ -1,220 +0,0 @@
1/*
2 * linux/include/linux/clk-private.h
3 *
4 * Copyright (c) 2010-2011 Jeremy Kerr <jeremy.kerr@canonical.com>
5 * Copyright (C) 2011-2012 Linaro Ltd <mturquette@linaro.org>
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
10 */
11#ifndef __LINUX_CLK_PRIVATE_H
12#define __LINUX_CLK_PRIVATE_H
13
14#include <linux/clk-provider.h>
15#include <linux/kref.h>
16#include <linux/list.h>
17
18/*
19 * WARNING: Do not include clk-private.h from any file that implements struct
20 * clk_ops. Doing so is a layering violation!
21 *
22 * This header exists only to allow for statically initialized clock data. Any
23 * static clock data must be defined in a separate file from the logic that
24 * implements the clock operations for that same data.
25 */
26
27#ifdef CONFIG_COMMON_CLK
28
29struct module;
30
31struct clk {
32 const char *name;
33 const struct clk_ops *ops;
34 struct clk_hw *hw;
35 struct module *owner;
36 struct clk *parent;
37 const char **parent_names;
38 struct clk **parents;
39 u8 num_parents;
40 u8 new_parent_index;
41 unsigned long rate;
42 unsigned long new_rate;
43 struct clk *new_parent;
44 struct clk *new_child;
45 unsigned long flags;
46 unsigned int enable_count;
47 unsigned int prepare_count;
48 unsigned long accuracy;
49 int phase;
50 struct hlist_head children;
51 struct hlist_node child_node;
52 struct hlist_node debug_node;
53 unsigned int notifier_count;
54#ifdef CONFIG_DEBUG_FS
55 struct dentry *dentry;
56#endif
57 struct kref ref;
58};
59
60/*
61 * DOC: Basic clock implementations common to many platforms
62 *
63 * Each basic clock hardware type is comprised of a structure describing the
64 * clock hardware, implementations of the relevant callbacks in struct clk_ops,
65 * unique flags for that hardware type, a registration function and an
66 * alternative macro for static initialization
67 */
68
69#define DEFINE_CLK(_name, _ops, _flags, _parent_names, \
70 _parents) \
71 static struct clk _name = { \
72 .name = #_name, \
73 .ops = &_ops, \
74 .hw = &_name##_hw.hw, \
75 .parent_names = _parent_names, \
76 .num_parents = ARRAY_SIZE(_parent_names), \
77 .parents = _parents, \
78 .flags = _flags | CLK_IS_BASIC, \
79 }
80
81#define DEFINE_CLK_FIXED_RATE(_name, _flags, _rate, \
82 _fixed_rate_flags) \
83 static struct clk _name; \
84 static const char *_name##_parent_names[] = {}; \
85 static struct clk_fixed_rate _name##_hw = { \
86 .hw = { \
87 .clk = &_name, \
88 }, \
89 .fixed_rate = _rate, \
90 .flags = _fixed_rate_flags, \
91 }; \
92 DEFINE_CLK(_name, clk_fixed_rate_ops, _flags, \
93 _name##_parent_names, NULL);
94
95#define DEFINE_CLK_GATE(_name, _parent_name, _parent_ptr, \
96 _flags, _reg, _bit_idx, \
97 _gate_flags, _lock) \
98 static struct clk _name; \
99 static const char *_name##_parent_names[] = { \
100 _parent_name, \
101 }; \
102 static struct clk *_name##_parents[] = { \
103 _parent_ptr, \
104 }; \
105 static struct clk_gate _name##_hw = { \
106 .hw = { \
107 .clk = &_name, \
108 }, \
109 .reg = _reg, \
110 .bit_idx = _bit_idx, \
111 .flags = _gate_flags, \
112 .lock = _lock, \
113 }; \
114 DEFINE_CLK(_name, clk_gate_ops, _flags, \
115 _name##_parent_names, _name##_parents);
116
117#define _DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
118 _flags, _reg, _shift, _width, \
119 _divider_flags, _table, _lock) \
120 static struct clk _name; \
121 static const char *_name##_parent_names[] = { \
122 _parent_name, \
123 }; \
124 static struct clk *_name##_parents[] = { \
125 _parent_ptr, \
126 }; \
127 static struct clk_divider _name##_hw = { \
128 .hw = { \
129 .clk = &_name, \
130 }, \
131 .reg = _reg, \
132 .shift = _shift, \
133 .width = _width, \
134 .flags = _divider_flags, \
135 .table = _table, \
136 .lock = _lock, \
137 }; \
138 DEFINE_CLK(_name, clk_divider_ops, _flags, \
139 _name##_parent_names, _name##_parents);
140
141#define DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
142 _flags, _reg, _shift, _width, \
143 _divider_flags, _lock) \
144 _DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
145 _flags, _reg, _shift, _width, \
146 _divider_flags, NULL, _lock)
147
148#define DEFINE_CLK_DIVIDER_TABLE(_name, _parent_name, \
149 _parent_ptr, _flags, _reg, \
150 _shift, _width, _divider_flags, \
151 _table, _lock) \
152 _DEFINE_CLK_DIVIDER(_name, _parent_name, _parent_ptr, \
153 _flags, _reg, _shift, _width, \
154 _divider_flags, _table, _lock) \
155
156#define DEFINE_CLK_MUX(_name, _parent_names, _parents, _flags, \
157 _reg, _shift, _width, \
158 _mux_flags, _lock) \
159 static struct clk _name; \
160 static struct clk_mux _name##_hw = { \
161 .hw = { \
162 .clk = &_name, \
163 }, \
164 .reg = _reg, \
165 .shift = _shift, \
166 .mask = BIT(_width) - 1, \
167 .flags = _mux_flags, \
168 .lock = _lock, \
169 }; \
170 DEFINE_CLK(_name, clk_mux_ops, _flags, _parent_names, \
171 _parents);
172
173#define DEFINE_CLK_FIXED_FACTOR(_name, _parent_name, \
174 _parent_ptr, _flags, \
175 _mult, _div) \
176 static struct clk _name; \
177 static const char *_name##_parent_names[] = { \
178 _parent_name, \
179 }; \
180 static struct clk *_name##_parents[] = { \
181 _parent_ptr, \
182 }; \
183 static struct clk_fixed_factor _name##_hw = { \
184 .hw = { \
185 .clk = &_name, \
186 }, \
187 .mult = _mult, \
188 .div = _div, \
189 }; \
190 DEFINE_CLK(_name, clk_fixed_factor_ops, _flags, \
191 _name##_parent_names, _name##_parents);
192
193/**
194 * __clk_init - initialize the data structures in a struct clk
195 * @dev: device initializing this clk, placeholder for now
196 * @clk: clk being initialized
197 *
198 * Initializes the lists in struct clk, queries the hardware for the
199 * parent and rate and sets them both.
200 *
201 * Any struct clk passed into __clk_init must have the following members
202 * populated:
203 * .name
204 * .ops
205 * .hw
206 * .parent_names
207 * .num_parents
208 * .flags
209 *
210 * It is not necessary to call clk_register if __clk_init is used directly with
211 * statically initialized clock data.
212 *
213 * Returns 0 on success, otherwise an error code.
214 */
215int __clk_init(struct device *dev, struct clk *clk);
216
217struct clk *__clk_register(struct device *dev, struct clk_hw *hw);
218
219#endif /* CONFIG_COMMON_CLK */
220#endif /* CLK_PRIVATE_H */
diff --git a/include/linux/clk-provider.h b/include/linux/clk-provider.h
index d936409520f8..5591ea71a8d1 100644
--- a/include/linux/clk-provider.h
+++ b/include/linux/clk-provider.h
@@ -33,6 +33,7 @@
33#define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */ 33#define CLK_GET_ACCURACY_NOCACHE BIT(8) /* do not use the cached clk accuracy */
34 34
35struct clk_hw; 35struct clk_hw;
36struct clk_core;
36struct dentry; 37struct dentry;
37 38
38/** 39/**
@@ -174,9 +175,12 @@ struct clk_ops {
174 unsigned long parent_rate); 175 unsigned long parent_rate);
175 long (*round_rate)(struct clk_hw *hw, unsigned long rate, 176 long (*round_rate)(struct clk_hw *hw, unsigned long rate,
176 unsigned long *parent_rate); 177 unsigned long *parent_rate);
177 long (*determine_rate)(struct clk_hw *hw, unsigned long rate, 178 long (*determine_rate)(struct clk_hw *hw,
178 unsigned long *best_parent_rate, 179 unsigned long rate,
179 struct clk_hw **best_parent_hw); 180 unsigned long min_rate,
181 unsigned long max_rate,
182 unsigned long *best_parent_rate,
183 struct clk_hw **best_parent_hw);
180 int (*set_parent)(struct clk_hw *hw, u8 index); 184 int (*set_parent)(struct clk_hw *hw, u8 index);
181 u8 (*get_parent)(struct clk_hw *hw); 185 u8 (*get_parent)(struct clk_hw *hw);
182 int (*set_rate)(struct clk_hw *hw, unsigned long rate, 186 int (*set_rate)(struct clk_hw *hw, unsigned long rate,
@@ -216,13 +220,17 @@ struct clk_init_data {
216 * clk_foo and then referenced by the struct clk instance that uses struct 220 * clk_foo and then referenced by the struct clk instance that uses struct
217 * clk_foo's clk_ops 221 * clk_foo's clk_ops
218 * 222 *
219 * @clk: pointer to the struct clk instance that points back to this struct 223 * @core: pointer to the struct clk_core instance that points back to this
220 * clk_hw instance 224 * struct clk_hw instance
225 *
226 * @clk: pointer to the per-user struct clk instance that can be used to call
227 * into the clk API
221 * 228 *
222 * @init: pointer to struct clk_init_data that contains the init data shared 229 * @init: pointer to struct clk_init_data that contains the init data shared
223 * with the common clock framework. 230 * with the common clock framework.
224 */ 231 */
225struct clk_hw { 232struct clk_hw {
233 struct clk_core *core;
226 struct clk *clk; 234 struct clk *clk;
227 const struct clk_init_data *init; 235 const struct clk_init_data *init;
228}; 236};
@@ -294,6 +302,7 @@ struct clk *clk_register_gate(struct device *dev, const char *name,
294 const char *parent_name, unsigned long flags, 302 const char *parent_name, unsigned long flags,
295 void __iomem *reg, u8 bit_idx, 303 void __iomem *reg, u8 bit_idx,
296 u8 clk_gate_flags, spinlock_t *lock); 304 u8 clk_gate_flags, spinlock_t *lock);
305void clk_unregister_gate(struct clk *clk);
297 306
298struct clk_div_table { 307struct clk_div_table {
299 unsigned int val; 308 unsigned int val;
@@ -352,6 +361,17 @@ struct clk_divider {
352#define CLK_DIVIDER_READ_ONLY BIT(5) 361#define CLK_DIVIDER_READ_ONLY BIT(5)
353 362
354extern const struct clk_ops clk_divider_ops; 363extern const struct clk_ops clk_divider_ops;
364
365unsigned long divider_recalc_rate(struct clk_hw *hw, unsigned long parent_rate,
366 unsigned int val, const struct clk_div_table *table,
367 unsigned long flags);
368long divider_round_rate(struct clk_hw *hw, unsigned long rate,
369 unsigned long *prate, const struct clk_div_table *table,
370 u8 width, unsigned long flags);
371int divider_get_val(unsigned long rate, unsigned long parent_rate,
372 const struct clk_div_table *table, u8 width,
373 unsigned long flags);
374
355struct clk *clk_register_divider(struct device *dev, const char *name, 375struct clk *clk_register_divider(struct device *dev, const char *name,
356 const char *parent_name, unsigned long flags, 376 const char *parent_name, unsigned long flags,
357 void __iomem *reg, u8 shift, u8 width, 377 void __iomem *reg, u8 shift, u8 width,
@@ -361,6 +381,7 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
361 void __iomem *reg, u8 shift, u8 width, 381 void __iomem *reg, u8 shift, u8 width,
362 u8 clk_divider_flags, const struct clk_div_table *table, 382 u8 clk_divider_flags, const struct clk_div_table *table,
363 spinlock_t *lock); 383 spinlock_t *lock);
384void clk_unregister_divider(struct clk *clk);
364 385
365/** 386/**
366 * struct clk_mux - multiplexer clock 387 * struct clk_mux - multiplexer clock
@@ -382,6 +403,8 @@ struct clk *clk_register_divider_table(struct device *dev, const char *name,
382 * register, and mask of mux bits are in higher 16-bit of this register. 403 * register, and mask of mux bits are in higher 16-bit of this register.
383 * While setting the mux bits, higher 16-bit should also be updated to 404 * While setting the mux bits, higher 16-bit should also be updated to
384 * indicate changing mux bits. 405 * indicate changing mux bits.
406 * CLK_MUX_ROUND_CLOSEST - Use the parent rate that is closest to the desired
407 * frequency.
385 */ 408 */
386struct clk_mux { 409struct clk_mux {
387 struct clk_hw hw; 410 struct clk_hw hw;
@@ -396,7 +419,8 @@ struct clk_mux {
396#define CLK_MUX_INDEX_ONE BIT(0) 419#define CLK_MUX_INDEX_ONE BIT(0)
397#define CLK_MUX_INDEX_BIT BIT(1) 420#define CLK_MUX_INDEX_BIT BIT(1)
398#define CLK_MUX_HIWORD_MASK BIT(2) 421#define CLK_MUX_HIWORD_MASK BIT(2)
399#define CLK_MUX_READ_ONLY BIT(3) /* mux setting cannot be changed */ 422#define CLK_MUX_READ_ONLY BIT(3) /* mux can't be changed */
423#define CLK_MUX_ROUND_CLOSEST BIT(4)
400 424
401extern const struct clk_ops clk_mux_ops; 425extern const struct clk_ops clk_mux_ops;
402extern const struct clk_ops clk_mux_ro_ops; 426extern const struct clk_ops clk_mux_ro_ops;
@@ -411,6 +435,8 @@ struct clk *clk_register_mux_table(struct device *dev, const char *name,
411 void __iomem *reg, u8 shift, u32 mask, 435 void __iomem *reg, u8 shift, u32 mask,
412 u8 clk_mux_flags, u32 *table, spinlock_t *lock); 436 u8 clk_mux_flags, u32 *table, spinlock_t *lock);
413 437
438void clk_unregister_mux(struct clk *clk);
439
414void of_fixed_factor_clk_setup(struct device_node *node); 440void of_fixed_factor_clk_setup(struct device_node *node);
415 441
416/** 442/**
@@ -550,15 +576,29 @@ bool __clk_is_prepared(struct clk *clk);
550bool __clk_is_enabled(struct clk *clk); 576bool __clk_is_enabled(struct clk *clk);
551struct clk *__clk_lookup(const char *name); 577struct clk *__clk_lookup(const char *name);
552long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate, 578long __clk_mux_determine_rate(struct clk_hw *hw, unsigned long rate,
579 unsigned long min_rate,
580 unsigned long max_rate,
553 unsigned long *best_parent_rate, 581 unsigned long *best_parent_rate,
554 struct clk_hw **best_parent_p); 582 struct clk_hw **best_parent_p);
583unsigned long __clk_determine_rate(struct clk_hw *core,
584 unsigned long rate,
585 unsigned long min_rate,
586 unsigned long max_rate);
587long __clk_mux_determine_rate_closest(struct clk_hw *hw, unsigned long rate,
588 unsigned long min_rate,
589 unsigned long max_rate,
590 unsigned long *best_parent_rate,
591 struct clk_hw **best_parent_p);
592
593static inline void __clk_hw_set_clk(struct clk_hw *dst, struct clk_hw *src)
594{
595 dst->clk = src->clk;
596 dst->core = src->core;
597}
555 598
556/* 599/*
557 * FIXME clock api without lock protection 600 * FIXME clock api without lock protection
558 */ 601 */
559int __clk_prepare(struct clk *clk);
560void __clk_unprepare(struct clk *clk);
561void __clk_reparent(struct clk *clk, struct clk *new_parent);
562unsigned long __clk_round_rate(struct clk *clk, unsigned long rate); 602unsigned long __clk_round_rate(struct clk *clk, unsigned long rate);
563 603
564struct of_device_id; 604struct of_device_id;
diff --git a/include/linux/clk.h b/include/linux/clk.h
index c7f258a81761..68c16a6bedb3 100644
--- a/include/linux/clk.h
+++ b/include/linux/clk.h
@@ -125,6 +125,19 @@ int clk_set_phase(struct clk *clk, int degrees);
125 */ 125 */
126int clk_get_phase(struct clk *clk); 126int clk_get_phase(struct clk *clk);
127 127
128/**
129 * clk_is_match - check if two clk's point to the same hardware clock
130 * @p: clk compared against q
131 * @q: clk compared against p
132 *
133 * Returns true if the two struct clk pointers both point to the same hardware
134 * clock node. Put differently, returns true if struct clk *p and struct clk *q
135 * share the same struct clk_core object.
136 *
137 * Returns false otherwise. Note that two NULL clks are treated as matching.
138 */
139bool clk_is_match(const struct clk *p, const struct clk *q);
140
128#else 141#else
129 142
130static inline long clk_get_accuracy(struct clk *clk) 143static inline long clk_get_accuracy(struct clk *clk)
@@ -142,6 +155,11 @@ static inline long clk_get_phase(struct clk *clk)
142 return -ENOTSUPP; 155 return -ENOTSUPP;
143} 156}
144 157
158static inline bool clk_is_match(const struct clk *p, const struct clk *q)
159{
160 return p == q;
161}
162
145#endif 163#endif
146 164
147/** 165/**
@@ -302,6 +320,46 @@ long clk_round_rate(struct clk *clk, unsigned long rate);
302int clk_set_rate(struct clk *clk, unsigned long rate); 320int clk_set_rate(struct clk *clk, unsigned long rate);
303 321
304/** 322/**
323 * clk_has_parent - check if a clock is a possible parent for another
324 * @clk: clock source
325 * @parent: parent clock source
326 *
327 * This function can be used in drivers that need to check that a clock can be
328 * the parent of another without actually changing the parent.
329 *
330 * Returns true if @parent is a possible parent for @clk, false otherwise.
331 */
332bool clk_has_parent(struct clk *clk, struct clk *parent);
333
334/**
335 * clk_set_rate_range - set a rate range for a clock source
336 * @clk: clock source
337 * @min: desired minimum clock rate in Hz, inclusive
338 * @max: desired maximum clock rate in Hz, inclusive
339 *
340 * Returns success (0) or negative errno.
341 */
342int clk_set_rate_range(struct clk *clk, unsigned long min, unsigned long max);
343
344/**
345 * clk_set_min_rate - set a minimum clock rate for a clock source
346 * @clk: clock source
347 * @rate: desired minimum clock rate in Hz, inclusive
348 *
349 * Returns success (0) or negative errno.
350 */
351int clk_set_min_rate(struct clk *clk, unsigned long rate);
352
353/**
354 * clk_set_max_rate - set a maximum clock rate for a clock source
355 * @clk: clock source
356 * @rate: desired maximum clock rate in Hz, inclusive
357 *
358 * Returns success (0) or negative errno.
359 */
360int clk_set_max_rate(struct clk *clk, unsigned long rate);
361
362/**
305 * clk_set_parent - set the parent clock source for this clock 363 * clk_set_parent - set the parent clock source for this clock
306 * @clk: clock source 364 * @clk: clock source
307 * @parent: parent clock source 365 * @parent: parent clock source
@@ -374,6 +432,11 @@ static inline long clk_round_rate(struct clk *clk, unsigned long rate)
374 return 0; 432 return 0;
375} 433}
376 434
435static inline bool clk_has_parent(struct clk *clk, struct clk *parent)
436{
437 return true;
438}
439
377static inline int clk_set_parent(struct clk *clk, struct clk *parent) 440static inline int clk_set_parent(struct clk *clk, struct clk *parent)
378{ 441{
379 return 0; 442 return 0;
diff --git a/include/linux/clk/sunxi.h b/include/linux/clk/sunxi.h
deleted file mode 100644
index aed28c4451d9..000000000000
--- a/include/linux/clk/sunxi.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * Copyright 2013 - Hans de Goede <hdegoede@redhat.com>
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License as published by
6 * the Free Software Foundation; either version 2 of the License, or
7 * (at your option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
13 */
14
15#ifndef __LINUX_CLK_SUNXI_H_
16#define __LINUX_CLK_SUNXI_H_
17
18#include <linux/clk.h>
19
20void clk_sunxi_mmc_phase_control(struct clk *clk, u8 sample, u8 output);
21
22#endif
diff --git a/include/linux/clk/tegra.h b/include/linux/clk/tegra.h
index 3ca9fca827a2..19c4208f4752 100644
--- a/include/linux/clk/tegra.h
+++ b/include/linux/clk/tegra.h
@@ -120,6 +120,4 @@ static inline void tegra_cpu_clock_resume(void)
120} 120}
121#endif 121#endif
122 122
123void tegra_clocks_apply_init_table(void);
124
125#endif /* __LINUX_CLK_TEGRA_H_ */ 123#endif /* __LINUX_CLK_TEGRA_H_ */
diff --git a/include/linux/clk/ti.h b/include/linux/clk/ti.h
index 55ef529a0dbf..67844003493d 100644
--- a/include/linux/clk/ti.h
+++ b/include/linux/clk/ti.h
@@ -15,6 +15,7 @@
15#ifndef __LINUX_CLK_TI_H__ 15#ifndef __LINUX_CLK_TI_H__
16#define __LINUX_CLK_TI_H__ 16#define __LINUX_CLK_TI_H__
17 17
18#include <linux/clk-provider.h>
18#include <linux/clkdev.h> 19#include <linux/clkdev.h>
19 20
20/** 21/**
@@ -217,6 +218,13 @@ struct ti_dt_clk {
217/* Maximum number of clock memmaps */ 218/* Maximum number of clock memmaps */
218#define CLK_MAX_MEMMAPS 4 219#define CLK_MAX_MEMMAPS 4
219 220
221/* Static memmap indices */
222enum {
223 TI_CLKM_CM = 0,
224 TI_CLKM_PRM,
225 TI_CLKM_SCRM,
226};
227
220typedef void (*ti_of_clk_init_cb_t)(struct clk_hw *, struct device_node *); 228typedef void (*ti_of_clk_init_cb_t)(struct clk_hw *, struct device_node *);
221 229
222/** 230/**
@@ -263,6 +271,8 @@ int omap3_noncore_dpll_set_rate_and_parent(struct clk_hw *hw,
263 u8 index); 271 u8 index);
264long omap3_noncore_dpll_determine_rate(struct clk_hw *hw, 272long omap3_noncore_dpll_determine_rate(struct clk_hw *hw,
265 unsigned long rate, 273 unsigned long rate,
274 unsigned long min_rate,
275 unsigned long max_rate,
266 unsigned long *best_parent_rate, 276 unsigned long *best_parent_rate,
267 struct clk_hw **best_parent_clk); 277 struct clk_hw **best_parent_clk);
268unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw, 278unsigned long omap4_dpll_regm4xen_recalc(struct clk_hw *hw,
@@ -272,6 +282,8 @@ long omap4_dpll_regm4xen_round_rate(struct clk_hw *hw,
272 unsigned long *parent_rate); 282 unsigned long *parent_rate);
273long omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw, 283long omap4_dpll_regm4xen_determine_rate(struct clk_hw *hw,
274 unsigned long rate, 284 unsigned long rate,
285 unsigned long min_rate,
286 unsigned long max_rate,
275 unsigned long *best_parent_rate, 287 unsigned long *best_parent_rate,
276 struct clk_hw **best_parent_clk); 288 struct clk_hw **best_parent_clk);
277u8 omap2_init_dpll_parent(struct clk_hw *hw); 289u8 omap2_init_dpll_parent(struct clk_hw *hw);
@@ -348,4 +360,17 @@ extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_ssi_wait;
348extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_dss_usbhost_wait; 360extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_dss_usbhost_wait;
349extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_hsotgusb_wait; 361extern const struct clk_hw_omap_ops clkhwops_omap3430es2_iclk_hsotgusb_wait;
350 362
363#ifdef CONFIG_ATAGS
364int omap3430_clk_legacy_init(void);
365int omap3430es1_clk_legacy_init(void);
366int omap36xx_clk_legacy_init(void);
367int am35xx_clk_legacy_init(void);
368#else
369static inline int omap3430_clk_legacy_init(void) { return -ENXIO; }
370static inline int omap3430es1_clk_legacy_init(void) { return -ENXIO; }
371static inline int omap36xx_clk_legacy_init(void) { return -ENXIO; }
372static inline int am35xx_clk_legacy_init(void) { return -ENXIO; }
373#endif
374
375
351#endif 376#endif
diff --git a/include/linux/compiler.h b/include/linux/compiler.h
index d1ec10a940ff..1b45e4a0519b 100644
--- a/include/linux/compiler.h
+++ b/include/linux/compiler.h
@@ -202,7 +202,7 @@ static __always_inline void data_access_exceeds_word_size(void)
202{ 202{
203} 203}
204 204
205static __always_inline void __read_once_size(volatile void *p, void *res, int size) 205static __always_inline void __read_once_size(const volatile void *p, void *res, int size)
206{ 206{
207 switch (size) { 207 switch (size) {
208 case 1: *(__u8 *)res = *(volatile __u8 *)p; break; 208 case 1: *(__u8 *)res = *(volatile __u8 *)p; break;
@@ -259,10 +259,10 @@ static __always_inline void __write_once_size(volatile void *p, void *res, int s
259 */ 259 */
260 260
261#define READ_ONCE(x) \ 261#define READ_ONCE(x) \
262 ({ typeof(x) __val; __read_once_size(&x, &__val, sizeof(__val)); __val; }) 262 ({ union { typeof(x) __val; char __c[1]; } __u; __read_once_size(&(x), __u.__c, sizeof(x)); __u.__val; })
263 263
264#define WRITE_ONCE(x, val) \ 264#define WRITE_ONCE(x, val) \
265 ({ typeof(x) __val; __val = val; __write_once_size(&x, &__val, sizeof(__val)); __val; }) 265 ({ typeof(x) __val = (val); __write_once_size(&(x), &__val, sizeof(__val)); __val; })
266 266
267#endif /* __KERNEL__ */ 267#endif /* __KERNEL__ */
268 268
diff --git a/include/linux/cpuidle.h b/include/linux/cpuidle.h
index f551a9299ac9..306178d7309f 100644
--- a/include/linux/cpuidle.h
+++ b/include/linux/cpuidle.h
@@ -126,6 +126,8 @@ struct cpuidle_driver {
126 126
127#ifdef CONFIG_CPU_IDLE 127#ifdef CONFIG_CPU_IDLE
128extern void disable_cpuidle(void); 128extern void disable_cpuidle(void);
129extern bool cpuidle_not_available(struct cpuidle_driver *drv,
130 struct cpuidle_device *dev);
129 131
130extern int cpuidle_select(struct cpuidle_driver *drv, 132extern int cpuidle_select(struct cpuidle_driver *drv,
131 struct cpuidle_device *dev); 133 struct cpuidle_device *dev);
@@ -150,11 +152,17 @@ extern void cpuidle_resume(void);
150extern int cpuidle_enable_device(struct cpuidle_device *dev); 152extern int cpuidle_enable_device(struct cpuidle_device *dev);
151extern void cpuidle_disable_device(struct cpuidle_device *dev); 153extern void cpuidle_disable_device(struct cpuidle_device *dev);
152extern int cpuidle_play_dead(void); 154extern int cpuidle_play_dead(void);
153extern void cpuidle_enter_freeze(void); 155extern int cpuidle_find_deepest_state(struct cpuidle_driver *drv,
156 struct cpuidle_device *dev);
157extern int cpuidle_enter_freeze(struct cpuidle_driver *drv,
158 struct cpuidle_device *dev);
154 159
155extern struct cpuidle_driver *cpuidle_get_cpu_driver(struct cpuidle_device *dev); 160extern struct cpuidle_driver *cpuidle_get_cpu_driver(struct cpuidle_device *dev);
156#else 161#else
157static inline void disable_cpuidle(void) { } 162static inline void disable_cpuidle(void) { }
163static inline bool cpuidle_not_available(struct cpuidle_driver *drv,
164 struct cpuidle_device *dev)
165{return true; }
158static inline int cpuidle_select(struct cpuidle_driver *drv, 166static inline int cpuidle_select(struct cpuidle_driver *drv,
159 struct cpuidle_device *dev) 167 struct cpuidle_device *dev)
160{return -ENODEV; } 168{return -ENODEV; }
@@ -183,7 +191,12 @@ static inline int cpuidle_enable_device(struct cpuidle_device *dev)
183{return -ENODEV; } 191{return -ENODEV; }
184static inline void cpuidle_disable_device(struct cpuidle_device *dev) { } 192static inline void cpuidle_disable_device(struct cpuidle_device *dev) { }
185static inline int cpuidle_play_dead(void) {return -ENODEV; } 193static inline int cpuidle_play_dead(void) {return -ENODEV; }
186static inline void cpuidle_enter_freeze(void) { } 194static inline int cpuidle_find_deepest_state(struct cpuidle_driver *drv,
195 struct cpuidle_device *dev)
196{return -ENODEV; }
197static inline int cpuidle_enter_freeze(struct cpuidle_driver *drv,
198 struct cpuidle_device *dev)
199{return -ENODEV; }
187static inline struct cpuidle_driver *cpuidle_get_cpu_driver( 200static inline struct cpuidle_driver *cpuidle_get_cpu_driver(
188 struct cpuidle_device *dev) {return NULL; } 201 struct cpuidle_device *dev) {return NULL; }
189#endif 202#endif
diff --git a/include/linux/dcache.h b/include/linux/dcache.h
index 92c08cf7670e..d8358799c594 100644
--- a/include/linux/dcache.h
+++ b/include/linux/dcache.h
@@ -215,13 +215,16 @@ struct dentry_operations {
215#define DCACHE_LRU_LIST 0x00080000 215#define DCACHE_LRU_LIST 0x00080000
216 216
217#define DCACHE_ENTRY_TYPE 0x00700000 217#define DCACHE_ENTRY_TYPE 0x00700000
218#define DCACHE_MISS_TYPE 0x00000000 /* Negative dentry */ 218#define DCACHE_MISS_TYPE 0x00000000 /* Negative dentry (maybe fallthru to nowhere) */
219#define DCACHE_DIRECTORY_TYPE 0x00100000 /* Normal directory */ 219#define DCACHE_WHITEOUT_TYPE 0x00100000 /* Whiteout dentry (stop pathwalk) */
220#define DCACHE_AUTODIR_TYPE 0x00200000 /* Lookupless directory (presumed automount) */ 220#define DCACHE_DIRECTORY_TYPE 0x00200000 /* Normal directory */
221#define DCACHE_SYMLINK_TYPE 0x00300000 /* Symlink */ 221#define DCACHE_AUTODIR_TYPE 0x00300000 /* Lookupless directory (presumed automount) */
222#define DCACHE_FILE_TYPE 0x00400000 /* Other file type */ 222#define DCACHE_REGULAR_TYPE 0x00400000 /* Regular file type (or fallthru to such) */
223#define DCACHE_SPECIAL_TYPE 0x00500000 /* Other file type (or fallthru to such) */
224#define DCACHE_SYMLINK_TYPE 0x00600000 /* Symlink (or fallthru to such) */
223 225
224#define DCACHE_MAY_FREE 0x00800000 226#define DCACHE_MAY_FREE 0x00800000
227#define DCACHE_FALLTHRU 0x01000000 /* Fall through to lower layer */
225 228
226extern seqlock_t rename_lock; 229extern seqlock_t rename_lock;
227 230
@@ -423,6 +426,16 @@ static inline unsigned __d_entry_type(const struct dentry *dentry)
423 return dentry->d_flags & DCACHE_ENTRY_TYPE; 426 return dentry->d_flags & DCACHE_ENTRY_TYPE;
424} 427}
425 428
429static inline bool d_is_miss(const struct dentry *dentry)
430{
431 return __d_entry_type(dentry) == DCACHE_MISS_TYPE;
432}
433
434static inline bool d_is_whiteout(const struct dentry *dentry)
435{
436 return __d_entry_type(dentry) == DCACHE_WHITEOUT_TYPE;
437}
438
426static inline bool d_can_lookup(const struct dentry *dentry) 439static inline bool d_can_lookup(const struct dentry *dentry)
427{ 440{
428 return __d_entry_type(dentry) == DCACHE_DIRECTORY_TYPE; 441 return __d_entry_type(dentry) == DCACHE_DIRECTORY_TYPE;
@@ -443,14 +456,25 @@ static inline bool d_is_symlink(const struct dentry *dentry)
443 return __d_entry_type(dentry) == DCACHE_SYMLINK_TYPE; 456 return __d_entry_type(dentry) == DCACHE_SYMLINK_TYPE;
444} 457}
445 458
459static inline bool d_is_reg(const struct dentry *dentry)
460{
461 return __d_entry_type(dentry) == DCACHE_REGULAR_TYPE;
462}
463
464static inline bool d_is_special(const struct dentry *dentry)
465{
466 return __d_entry_type(dentry) == DCACHE_SPECIAL_TYPE;
467}
468
446static inline bool d_is_file(const struct dentry *dentry) 469static inline bool d_is_file(const struct dentry *dentry)
447{ 470{
448 return __d_entry_type(dentry) == DCACHE_FILE_TYPE; 471 return d_is_reg(dentry) || d_is_special(dentry);
449} 472}
450 473
451static inline bool d_is_negative(const struct dentry *dentry) 474static inline bool d_is_negative(const struct dentry *dentry)
452{ 475{
453 return __d_entry_type(dentry) == DCACHE_MISS_TYPE; 476 // TODO: check d_is_whiteout(dentry) also.
477 return d_is_miss(dentry);
454} 478}
455 479
456static inline bool d_is_positive(const struct dentry *dentry) 480static inline bool d_is_positive(const struct dentry *dentry)
@@ -458,10 +482,75 @@ static inline bool d_is_positive(const struct dentry *dentry)
458 return !d_is_negative(dentry); 482 return !d_is_negative(dentry);
459} 483}
460 484
485extern void d_set_fallthru(struct dentry *dentry);
486
487static inline bool d_is_fallthru(const struct dentry *dentry)
488{
489 return dentry->d_flags & DCACHE_FALLTHRU;
490}
491
492
461extern int sysctl_vfs_cache_pressure; 493extern int sysctl_vfs_cache_pressure;
462 494
463static inline unsigned long vfs_pressure_ratio(unsigned long val) 495static inline unsigned long vfs_pressure_ratio(unsigned long val)
464{ 496{
465 return mult_frac(val, sysctl_vfs_cache_pressure, 100); 497 return mult_frac(val, sysctl_vfs_cache_pressure, 100);
466} 498}
499
500/**
501 * d_inode - Get the actual inode of this dentry
502 * @dentry: The dentry to query
503 *
504 * This is the helper normal filesystems should use to get at their own inodes
505 * in their own dentries and ignore the layering superimposed upon them.
506 */
507static inline struct inode *d_inode(const struct dentry *dentry)
508{
509 return dentry->d_inode;
510}
511
512/**
513 * d_inode_rcu - Get the actual inode of this dentry with ACCESS_ONCE()
514 * @dentry: The dentry to query
515 *
516 * This is the helper normal filesystems should use to get at their own inodes
517 * in their own dentries and ignore the layering superimposed upon them.
518 */
519static inline struct inode *d_inode_rcu(const struct dentry *dentry)
520{
521 return ACCESS_ONCE(dentry->d_inode);
522}
523
524/**
525 * d_backing_inode - Get upper or lower inode we should be using
526 * @upper: The upper layer
527 *
528 * This is the helper that should be used to get at the inode that will be used
529 * if this dentry were to be opened as a file. The inode may be on the upper
530 * dentry or it may be on a lower dentry pinned by the upper.
531 *
532 * Normal filesystems should not use this to access their own inodes.
533 */
534static inline struct inode *d_backing_inode(const struct dentry *upper)
535{
536 struct inode *inode = upper->d_inode;
537
538 return inode;
539}
540
541/**
542 * d_backing_dentry - Get upper or lower dentry we should be using
543 * @upper: The upper layer
544 *
545 * This is the helper that should be used to get the dentry of the inode that
546 * will be used if this dentry were opened as a file. It may be the upper
547 * dentry or it may be a lower dentry pinned by the upper.
548 *
549 * Normal filesystems should not use this to access their own dentries.
550 */
551static inline struct dentry *d_backing_dentry(struct dentry *upper)
552{
553 return upper;
554}
555
467#endif /* __LINUX_DCACHE_H */ 556#endif /* __LINUX_DCACHE_H */
diff --git a/include/linux/device-mapper.h b/include/linux/device-mapper.h
index 2646aed1d3fe..fd23978d93fe 100644
--- a/include/linux/device-mapper.h
+++ b/include/linux/device-mapper.h
@@ -375,6 +375,7 @@ int dm_create(int minor, struct mapped_device **md);
375 */ 375 */
376struct mapped_device *dm_get_md(dev_t dev); 376struct mapped_device *dm_get_md(dev_t dev);
377void dm_get(struct mapped_device *md); 377void dm_get(struct mapped_device *md);
378int dm_hold(struct mapped_device *md);
378void dm_put(struct mapped_device *md); 379void dm_put(struct mapped_device *md);
379 380
380/* 381/*
diff --git a/include/linux/hid-sensor-hub.h b/include/linux/hid-sensor-hub.h
index 51f7ccadf923..4173a8fdad9e 100644
--- a/include/linux/hid-sensor-hub.h
+++ b/include/linux/hid-sensor-hub.h
@@ -33,6 +33,8 @@
33 * @units: Measurment unit for this attribute. 33 * @units: Measurment unit for this attribute.
34 * @unit_expo: Exponent used in the data. 34 * @unit_expo: Exponent used in the data.
35 * @size: Size in bytes for data size. 35 * @size: Size in bytes for data size.
36 * @logical_minimum: Logical minimum value for this attribute.
37 * @logical_maximum: Logical maximum value for this attribute.
36 */ 38 */
37struct hid_sensor_hub_attribute_info { 39struct hid_sensor_hub_attribute_info {
38 u32 usage_id; 40 u32 usage_id;
@@ -146,6 +148,7 @@ int sensor_hub_input_get_attribute_info(struct hid_sensor_hub_device *hsdev,
146 148
147/** 149/**
148* sensor_hub_input_attr_get_raw_value() - Synchronous read request 150* sensor_hub_input_attr_get_raw_value() - Synchronous read request
151* @hsdev: Hub device instance.
149* @usage_id: Attribute usage id of parent physical device as per spec 152* @usage_id: Attribute usage id of parent physical device as per spec
150* @attr_usage_id: Attribute usage id as per spec 153* @attr_usage_id: Attribute usage id as per spec
151* @report_id: Report id to look for 154* @report_id: Report id to look for
@@ -160,6 +163,7 @@ int sensor_hub_input_attr_get_raw_value(struct hid_sensor_hub_device *hsdev,
160 u32 attr_usage_id, u32 report_id); 163 u32 attr_usage_id, u32 report_id);
161/** 164/**
162* sensor_hub_set_feature() - Feature set request 165* sensor_hub_set_feature() - Feature set request
166* @hsdev: Hub device instance.
163* @report_id: Report id to look for 167* @report_id: Report id to look for
164* @field_index: Field index inside a report 168* @field_index: Field index inside a report
165* @value: Value to set 169* @value: Value to set
@@ -172,6 +176,7 @@ int sensor_hub_set_feature(struct hid_sensor_hub_device *hsdev, u32 report_id,
172 176
173/** 177/**
174* sensor_hub_get_feature() - Feature get request 178* sensor_hub_get_feature() - Feature get request
179* @hsdev: Hub device instance.
175* @report_id: Report id to look for 180* @report_id: Report id to look for
176* @field_index: Field index inside a report 181* @field_index: Field index inside a report
177* @value: Place holder for return value 182* @value: Place holder for return value
diff --git a/include/linux/i2c.h b/include/linux/i2c.h
index 7c7695940ddd..f17da50402a4 100644
--- a/include/linux/i2c.h
+++ b/include/linux/i2c.h
@@ -130,8 +130,6 @@ extern s32 i2c_smbus_write_i2c_block_data(const struct i2c_client *client,
130 * @probe: Callback for device binding 130 * @probe: Callback for device binding
131 * @remove: Callback for device unbinding 131 * @remove: Callback for device unbinding
132 * @shutdown: Callback for device shutdown 132 * @shutdown: Callback for device shutdown
133 * @suspend: Callback for device suspend
134 * @resume: Callback for device resume
135 * @alert: Alert callback, for example for the SMBus alert protocol 133 * @alert: Alert callback, for example for the SMBus alert protocol
136 * @command: Callback for bus-wide signaling (optional) 134 * @command: Callback for bus-wide signaling (optional)
137 * @driver: Device driver model driver 135 * @driver: Device driver model driver
@@ -174,8 +172,6 @@ struct i2c_driver {
174 172
175 /* driver model interfaces that don't relate to enumeration */ 173 /* driver model interfaces that don't relate to enumeration */
176 void (*shutdown)(struct i2c_client *); 174 void (*shutdown)(struct i2c_client *);
177 int (*suspend)(struct i2c_client *, pm_message_t mesg);
178 int (*resume)(struct i2c_client *);
179 175
180 /* Alert callback, for example for the SMBus alert protocol. 176 /* Alert callback, for example for the SMBus alert protocol.
181 * The format and meaning of the data value depends on the protocol. 177 * The format and meaning of the data value depends on the protocol.
diff --git a/include/linux/interrupt.h b/include/linux/interrupt.h
index d9b05b5bf8c7..2e88580194f0 100644
--- a/include/linux/interrupt.h
+++ b/include/linux/interrupt.h
@@ -52,11 +52,17 @@
52 * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished. 52 * IRQF_ONESHOT - Interrupt is not reenabled after the hardirq handler finished.
53 * Used by threaded interrupts which need to keep the 53 * Used by threaded interrupts which need to keep the
54 * irq line disabled until the threaded handler has been run. 54 * irq line disabled until the threaded handler has been run.
55 * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend 55 * IRQF_NO_SUSPEND - Do not disable this IRQ during suspend. Does not guarantee
56 * that this interrupt will wake the system from a suspended
57 * state. See Documentation/power/suspend-and-interrupts.txt
56 * IRQF_FORCE_RESUME - Force enable it on resume even if IRQF_NO_SUSPEND is set 58 * IRQF_FORCE_RESUME - Force enable it on resume even if IRQF_NO_SUSPEND is set
57 * IRQF_NO_THREAD - Interrupt cannot be threaded 59 * IRQF_NO_THREAD - Interrupt cannot be threaded
58 * IRQF_EARLY_RESUME - Resume IRQ early during syscore instead of at device 60 * IRQF_EARLY_RESUME - Resume IRQ early during syscore instead of at device
59 * resume time. 61 * resume time.
62 * IRQF_COND_SUSPEND - If the IRQ is shared with a NO_SUSPEND user, execute this
63 * interrupt handler after suspending interrupts. For system
64 * wakeup devices users need to implement wakeup detection in
65 * their interrupt handlers.
60 */ 66 */
61#define IRQF_DISABLED 0x00000020 67#define IRQF_DISABLED 0x00000020
62#define IRQF_SHARED 0x00000080 68#define IRQF_SHARED 0x00000080
@@ -70,6 +76,7 @@
70#define IRQF_FORCE_RESUME 0x00008000 76#define IRQF_FORCE_RESUME 0x00008000
71#define IRQF_NO_THREAD 0x00010000 77#define IRQF_NO_THREAD 0x00010000
72#define IRQF_EARLY_RESUME 0x00020000 78#define IRQF_EARLY_RESUME 0x00020000
79#define IRQF_COND_SUSPEND 0x00040000
73 80
74#define IRQF_TIMER (__IRQF_TIMER | IRQF_NO_SUSPEND | IRQF_NO_THREAD) 81#define IRQF_TIMER (__IRQF_TIMER | IRQF_NO_SUSPEND | IRQF_NO_THREAD)
75 82
diff --git a/include/linux/irqchip/arm-gic-v3.h b/include/linux/irqchip/arm-gic-v3.h
index 800544bc7bfd..781974afff9f 100644
--- a/include/linux/irqchip/arm-gic-v3.h
+++ b/include/linux/irqchip/arm-gic-v3.h
@@ -166,6 +166,11 @@
166 166
167#define GITS_TRANSLATER 0x10040 167#define GITS_TRANSLATER 0x10040
168 168
169#define GITS_CTLR_ENABLE (1U << 0)
170#define GITS_CTLR_QUIESCENT (1U << 31)
171
172#define GITS_TYPER_DEVBITS_SHIFT 13
173#define GITS_TYPER_DEVBITS(r) ((((r) >> GITS_TYPER_DEVBITS_SHIFT) & 0x1f) + 1)
169#define GITS_TYPER_PTA (1UL << 19) 174#define GITS_TYPER_PTA (1UL << 19)
170 175
171#define GITS_CBASER_VALID (1UL << 63) 176#define GITS_CBASER_VALID (1UL << 63)
diff --git a/include/linux/irqchip/mips-gic.h b/include/linux/irqchip/mips-gic.h
index 420f77b34d02..e6a6aac451db 100644
--- a/include/linux/irqchip/mips-gic.h
+++ b/include/linux/irqchip/mips-gic.h
@@ -243,7 +243,6 @@ extern void gic_write_cpu_compare(cycle_t cnt, int cpu);
243extern void gic_send_ipi(unsigned int intr); 243extern void gic_send_ipi(unsigned int intr);
244extern unsigned int plat_ipi_call_int_xlate(unsigned int); 244extern unsigned int plat_ipi_call_int_xlate(unsigned int);
245extern unsigned int plat_ipi_resched_int_xlate(unsigned int); 245extern unsigned int plat_ipi_resched_int_xlate(unsigned int);
246extern unsigned int gic_get_timer_pending(void);
247extern int gic_get_c0_compare_int(void); 246extern int gic_get_c0_compare_int(void);
248extern int gic_get_c0_perfcount_int(void); 247extern int gic_get_c0_perfcount_int(void);
249#endif /* __LINUX_IRQCHIP_MIPS_GIC_H */ 248#endif /* __LINUX_IRQCHIP_MIPS_GIC_H */
diff --git a/include/linux/irqdesc.h b/include/linux/irqdesc.h
index faf433af425e..dd1109fb241e 100644
--- a/include/linux/irqdesc.h
+++ b/include/linux/irqdesc.h
@@ -78,6 +78,7 @@ struct irq_desc {
78#ifdef CONFIG_PM_SLEEP 78#ifdef CONFIG_PM_SLEEP
79 unsigned int nr_actions; 79 unsigned int nr_actions;
80 unsigned int no_suspend_depth; 80 unsigned int no_suspend_depth;
81 unsigned int cond_suspend_depth;
81 unsigned int force_resume_depth; 82 unsigned int force_resume_depth;
82#endif 83#endif
83#ifdef CONFIG_PROC_FS 84#ifdef CONFIG_PROC_FS
diff --git a/include/linux/kasan.h b/include/linux/kasan.h
index 72ba725ddf9c..5bb074431eb0 100644
--- a/include/linux/kasan.h
+++ b/include/linux/kasan.h
@@ -5,6 +5,7 @@
5 5
6struct kmem_cache; 6struct kmem_cache;
7struct page; 7struct page;
8struct vm_struct;
8 9
9#ifdef CONFIG_KASAN 10#ifdef CONFIG_KASAN
10 11
@@ -49,15 +50,11 @@ void kasan_krealloc(const void *object, size_t new_size);
49void kasan_slab_alloc(struct kmem_cache *s, void *object); 50void kasan_slab_alloc(struct kmem_cache *s, void *object);
50void kasan_slab_free(struct kmem_cache *s, void *object); 51void kasan_slab_free(struct kmem_cache *s, void *object);
51 52
52#define MODULE_ALIGN (PAGE_SIZE << KASAN_SHADOW_SCALE_SHIFT)
53
54int kasan_module_alloc(void *addr, size_t size); 53int kasan_module_alloc(void *addr, size_t size);
55void kasan_module_free(void *addr); 54void kasan_free_shadow(const struct vm_struct *vm);
56 55
57#else /* CONFIG_KASAN */ 56#else /* CONFIG_KASAN */
58 57
59#define MODULE_ALIGN 1
60
61static inline void kasan_unpoison_shadow(const void *address, size_t size) {} 58static inline void kasan_unpoison_shadow(const void *address, size_t size) {}
62 59
63static inline void kasan_enable_current(void) {} 60static inline void kasan_enable_current(void) {}
@@ -82,7 +79,7 @@ static inline void kasan_slab_alloc(struct kmem_cache *s, void *object) {}
82static inline void kasan_slab_free(struct kmem_cache *s, void *object) {} 79static inline void kasan_slab_free(struct kmem_cache *s, void *object) {}
83 80
84static inline int kasan_module_alloc(void *addr, size_t size) { return 0; } 81static inline int kasan_module_alloc(void *addr, size_t size) { return 0; }
85static inline void kasan_module_free(void *addr) {} 82static inline void kasan_free_shadow(const struct vm_struct *vm) {}
86 83
87#endif /* CONFIG_KASAN */ 84#endif /* CONFIG_KASAN */
88 85
diff --git a/include/linux/kdb.h b/include/linux/kdb.h
index 75ae2e2631fc..a19bcf9e762e 100644
--- a/include/linux/kdb.h
+++ b/include/linux/kdb.h
@@ -156,8 +156,14 @@ typedef enum {
156 KDB_REASON_SYSTEM_NMI, /* In NMI due to SYSTEM cmd; regs valid */ 156 KDB_REASON_SYSTEM_NMI, /* In NMI due to SYSTEM cmd; regs valid */
157} kdb_reason_t; 157} kdb_reason_t;
158 158
159enum kdb_msgsrc {
160 KDB_MSGSRC_INTERNAL, /* direct call to kdb_printf() */
161 KDB_MSGSRC_PRINTK, /* trapped from printk() */
162};
163
159extern int kdb_trap_printk; 164extern int kdb_trap_printk;
160extern __printf(1, 0) int vkdb_printf(const char *fmt, va_list args); 165extern __printf(2, 0) int vkdb_printf(enum kdb_msgsrc src, const char *fmt,
166 va_list args);
161extern __printf(1, 2) int kdb_printf(const char *, ...); 167extern __printf(1, 2) int kdb_printf(const char *, ...);
162typedef __printf(1, 2) int (*kdb_printf_t)(const char *, ...); 168typedef __printf(1, 2) int (*kdb_printf_t)(const char *, ...);
163 169
diff --git a/include/linux/mlx4/qp.h b/include/linux/mlx4/qp.h
index 2bbc62aa818a..551f85456c11 100644
--- a/include/linux/mlx4/qp.h
+++ b/include/linux/mlx4/qp.h
@@ -427,7 +427,7 @@ struct mlx4_wqe_inline_seg {
427 427
428enum mlx4_update_qp_attr { 428enum mlx4_update_qp_attr {
429 MLX4_UPDATE_QP_SMAC = 1 << 0, 429 MLX4_UPDATE_QP_SMAC = 1 << 0,
430 MLX4_UPDATE_QP_VSD = 1 << 2, 430 MLX4_UPDATE_QP_VSD = 1 << 1,
431 MLX4_UPDATE_QP_SUPPORTED_ATTRS = (1 << 2) - 1 431 MLX4_UPDATE_QP_SUPPORTED_ATTRS = (1 << 2) - 1
432}; 432};
433 433
diff --git a/include/linux/module.h b/include/linux/module.h
index 42999fe2dbd0..b03485bcb82a 100644
--- a/include/linux/module.h
+++ b/include/linux/module.h
@@ -344,6 +344,10 @@ struct module {
344 unsigned long *ftrace_callsites; 344 unsigned long *ftrace_callsites;
345#endif 345#endif
346 346
347#ifdef CONFIG_LIVEPATCH
348 bool klp_alive;
349#endif
350
347#ifdef CONFIG_MODULE_UNLOAD 351#ifdef CONFIG_MODULE_UNLOAD
348 /* What modules depend on me? */ 352 /* What modules depend on me? */
349 struct list_head source_list; 353 struct list_head source_list;
diff --git a/include/linux/moduleloader.h b/include/linux/moduleloader.h
index f7556261fe3c..4d0cb9bba93e 100644
--- a/include/linux/moduleloader.h
+++ b/include/linux/moduleloader.h
@@ -84,4 +84,12 @@ void module_arch_cleanup(struct module *mod);
84 84
85/* Any cleanup before freeing mod->module_init */ 85/* Any cleanup before freeing mod->module_init */
86void module_arch_freeing_init(struct module *mod); 86void module_arch_freeing_init(struct module *mod);
87
88#ifdef CONFIG_KASAN
89#include <linux/kasan.h>
90#define MODULE_ALIGN (PAGE_SIZE << KASAN_SHADOW_SCALE_SHIFT)
91#else
92#define MODULE_ALIGN PAGE_SIZE
93#endif
94
87#endif 95#endif
diff --git a/include/linux/netdevice.h b/include/linux/netdevice.h
index 5897b4ea5a3f..dcf6ec27739b 100644
--- a/include/linux/netdevice.h
+++ b/include/linux/netdevice.h
@@ -965,9 +965,12 @@ typedef u16 (*select_queue_fallback_t)(struct net_device *dev,
965 * Used to add FDB entries to dump requests. Implementers should add 965 * Used to add FDB entries to dump requests. Implementers should add
966 * entries to skb and update idx with the number of entries. 966 * entries to skb and update idx with the number of entries.
967 * 967 *
968 * int (*ndo_bridge_setlink)(struct net_device *dev, struct nlmsghdr *nlh) 968 * int (*ndo_bridge_setlink)(struct net_device *dev, struct nlmsghdr *nlh,
969 * u16 flags)
969 * int (*ndo_bridge_getlink)(struct sk_buff *skb, u32 pid, u32 seq, 970 * int (*ndo_bridge_getlink)(struct sk_buff *skb, u32 pid, u32 seq,
970 * struct net_device *dev, u32 filter_mask) 971 * struct net_device *dev, u32 filter_mask)
972 * int (*ndo_bridge_dellink)(struct net_device *dev, struct nlmsghdr *nlh,
973 * u16 flags);
971 * 974 *
972 * int (*ndo_change_carrier)(struct net_device *dev, bool new_carrier); 975 * int (*ndo_change_carrier)(struct net_device *dev, bool new_carrier);
973 * Called to change device carrier. Soft-devices (like dummy, team, etc) 976 * Called to change device carrier. Soft-devices (like dummy, team, etc)
@@ -2342,6 +2345,7 @@ struct gro_remcsum {
2342 2345
2343static inline void skb_gro_remcsum_init(struct gro_remcsum *grc) 2346static inline void skb_gro_remcsum_init(struct gro_remcsum *grc)
2344{ 2347{
2348 grc->offset = 0;
2345 grc->delta = 0; 2349 grc->delta = 0;
2346} 2350}
2347 2351
diff --git a/include/linux/nfs_fs.h b/include/linux/nfs_fs.h
index 6d627b92df53..b01ccf371fdc 100644
--- a/include/linux/nfs_fs.h
+++ b/include/linux/nfs_fs.h
@@ -180,7 +180,6 @@ struct nfs_inode {
180 /* NFSv4 state */ 180 /* NFSv4 state */
181 struct list_head open_states; 181 struct list_head open_states;
182 struct nfs_delegation __rcu *delegation; 182 struct nfs_delegation __rcu *delegation;
183 fmode_t delegation_state;
184 struct rw_semaphore rwsem; 183 struct rw_semaphore rwsem;
185 184
186 /* pNFS layout information */ 185 /* pNFS layout information */
@@ -344,6 +343,7 @@ extern struct inode *nfs_fhget(struct super_block *, struct nfs_fh *,
344extern int nfs_refresh_inode(struct inode *, struct nfs_fattr *); 343extern int nfs_refresh_inode(struct inode *, struct nfs_fattr *);
345extern int nfs_post_op_update_inode(struct inode *inode, struct nfs_fattr *fattr); 344extern int nfs_post_op_update_inode(struct inode *inode, struct nfs_fattr *fattr);
346extern int nfs_post_op_update_inode_force_wcc(struct inode *inode, struct nfs_fattr *fattr); 345extern int nfs_post_op_update_inode_force_wcc(struct inode *inode, struct nfs_fattr *fattr);
346extern int nfs_post_op_update_inode_force_wcc_locked(struct inode *inode, struct nfs_fattr *fattr);
347extern int nfs_getattr(struct vfsmount *, struct dentry *, struct kstat *); 347extern int nfs_getattr(struct vfsmount *, struct dentry *, struct kstat *);
348extern void nfs_access_add_cache(struct inode *, struct nfs_access_entry *); 348extern void nfs_access_add_cache(struct inode *, struct nfs_access_entry *);
349extern void nfs_access_set_mask(struct nfs_access_entry *, u32); 349extern void nfs_access_set_mask(struct nfs_access_entry *, u32);
@@ -356,8 +356,9 @@ extern int nfs_revalidate_inode(struct nfs_server *server, struct inode *inode);
356extern int nfs_revalidate_inode_rcu(struct nfs_server *server, struct inode *inode); 356extern int nfs_revalidate_inode_rcu(struct nfs_server *server, struct inode *inode);
357extern int __nfs_revalidate_inode(struct nfs_server *, struct inode *); 357extern int __nfs_revalidate_inode(struct nfs_server *, struct inode *);
358extern int nfs_revalidate_mapping(struct inode *inode, struct address_space *mapping); 358extern int nfs_revalidate_mapping(struct inode *inode, struct address_space *mapping);
359extern int nfs_revalidate_mapping_protected(struct inode *inode, struct address_space *mapping);
359extern int nfs_setattr(struct dentry *, struct iattr *); 360extern int nfs_setattr(struct dentry *, struct iattr *);
360extern void nfs_setattr_update_inode(struct inode *inode, struct iattr *attr); 361extern void nfs_setattr_update_inode(struct inode *inode, struct iattr *attr, struct nfs_fattr *);
361extern void nfs_setsecurity(struct inode *inode, struct nfs_fattr *fattr, 362extern void nfs_setsecurity(struct inode *inode, struct nfs_fattr *fattr,
362 struct nfs4_label *label); 363 struct nfs4_label *label);
363extern struct nfs_open_context *get_nfs_open_context(struct nfs_open_context *ctx); 364extern struct nfs_open_context *get_nfs_open_context(struct nfs_open_context *ctx);
@@ -370,6 +371,7 @@ extern struct nfs_lock_context *nfs_get_lock_context(struct nfs_open_context *ct
370extern void nfs_put_lock_context(struct nfs_lock_context *l_ctx); 371extern void nfs_put_lock_context(struct nfs_lock_context *l_ctx);
371extern u64 nfs_compat_user_ino64(u64 fileid); 372extern u64 nfs_compat_user_ino64(u64 fileid);
372extern void nfs_fattr_init(struct nfs_fattr *fattr); 373extern void nfs_fattr_init(struct nfs_fattr *fattr);
374extern void nfs_fattr_set_barrier(struct nfs_fattr *fattr);
373extern unsigned long nfs_inc_attr_generation_counter(void); 375extern unsigned long nfs_inc_attr_generation_counter(void);
374 376
375extern struct nfs_fattr *nfs_alloc_fattr(void); 377extern struct nfs_fattr *nfs_alloc_fattr(void);
diff --git a/include/linux/nfs_xdr.h b/include/linux/nfs_xdr.h
index 38d96ba935c2..4cb3eaa89cf7 100644
--- a/include/linux/nfs_xdr.h
+++ b/include/linux/nfs_xdr.h
@@ -1167,8 +1167,15 @@ struct nfs41_impl_id {
1167 struct nfstime4 date; 1167 struct nfstime4 date;
1168}; 1168};
1169 1169
1170struct nfs41_bind_conn_to_session_args {
1171 struct nfs_client *client;
1172 struct nfs4_sessionid sessionid;
1173 u32 dir;
1174 bool use_conn_in_rdma_mode;
1175};
1176
1170struct nfs41_bind_conn_to_session_res { 1177struct nfs41_bind_conn_to_session_res {
1171 struct nfs4_session *session; 1178 struct nfs4_sessionid sessionid;
1172 u32 dir; 1179 u32 dir;
1173 bool use_conn_in_rdma_mode; 1180 bool use_conn_in_rdma_mode;
1174}; 1181};
@@ -1185,6 +1192,8 @@ struct nfs41_exchange_id_res {
1185 1192
1186struct nfs41_create_session_args { 1193struct nfs41_create_session_args {
1187 struct nfs_client *client; 1194 struct nfs_client *client;
1195 u64 clientid;
1196 uint32_t seqid;
1188 uint32_t flags; 1197 uint32_t flags;
1189 uint32_t cb_program; 1198 uint32_t cb_program;
1190 struct nfs4_channel_attrs fc_attrs; /* Fore Channel */ 1199 struct nfs4_channel_attrs fc_attrs; /* Fore Channel */
@@ -1192,7 +1201,11 @@ struct nfs41_create_session_args {
1192}; 1201};
1193 1202
1194struct nfs41_create_session_res { 1203struct nfs41_create_session_res {
1195 struct nfs_client *client; 1204 struct nfs4_sessionid sessionid;
1205 uint32_t seqid;
1206 uint32_t flags;
1207 struct nfs4_channel_attrs fc_attrs; /* Fore Channel */
1208 struct nfs4_channel_attrs bc_attrs; /* Back Channel */
1196}; 1209};
1197 1210
1198struct nfs41_reclaim_complete_args { 1211struct nfs41_reclaim_complete_args {
@@ -1351,7 +1364,7 @@ struct nfs_commit_completion_ops {
1351}; 1364};
1352 1365
1353struct nfs_commit_info { 1366struct nfs_commit_info {
1354 spinlock_t *lock; 1367 spinlock_t *lock; /* inode->i_lock */
1355 struct nfs_mds_commit_info *mds; 1368 struct nfs_mds_commit_info *mds;
1356 struct pnfs_ds_commit_info *ds; 1369 struct pnfs_ds_commit_info *ds;
1357 struct nfs_direct_req *dreq; /* O_DIRECT request */ 1370 struct nfs_direct_req *dreq; /* O_DIRECT request */
diff --git a/include/linux/nvme.h b/include/linux/nvme.h
index 19a5d4b23209..0adad4a5419b 100644
--- a/include/linux/nvme.h
+++ b/include/linux/nvme.h
@@ -17,7 +17,6 @@
17 17
18#include <uapi/linux/nvme.h> 18#include <uapi/linux/nvme.h>
19#include <linux/pci.h> 19#include <linux/pci.h>
20#include <linux/miscdevice.h>
21#include <linux/kref.h> 20#include <linux/kref.h>
22#include <linux/blk-mq.h> 21#include <linux/blk-mq.h>
23 22
@@ -62,8 +61,6 @@ enum {
62 NVME_CSTS_SHST_MASK = 3 << 2, 61 NVME_CSTS_SHST_MASK = 3 << 2,
63}; 62};
64 63
65#define NVME_VS(major, minor) (major << 16 | minor)
66
67extern unsigned char nvme_io_timeout; 64extern unsigned char nvme_io_timeout;
68#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ) 65#define NVME_IO_TIMEOUT (nvme_io_timeout * HZ)
69 66
@@ -91,9 +88,10 @@ struct nvme_dev {
91 struct nvme_bar __iomem *bar; 88 struct nvme_bar __iomem *bar;
92 struct list_head namespaces; 89 struct list_head namespaces;
93 struct kref kref; 90 struct kref kref;
94 struct miscdevice miscdev; 91 struct device *device;
95 work_func_t reset_workfn; 92 work_func_t reset_workfn;
96 struct work_struct reset_work; 93 struct work_struct reset_work;
94 struct work_struct probe_work;
97 char name[12]; 95 char name[12];
98 char serial[20]; 96 char serial[20];
99 char model[40]; 97 char model[40];
@@ -105,7 +103,6 @@ struct nvme_dev {
105 u16 abort_limit; 103 u16 abort_limit;
106 u8 event_limit; 104 u8 event_limit;
107 u8 vwc; 105 u8 vwc;
108 u8 initialized;
109}; 106};
110 107
111/* 108/*
@@ -121,6 +118,7 @@ struct nvme_ns {
121 unsigned ns_id; 118 unsigned ns_id;
122 int lba_shift; 119 int lba_shift;
123 int ms; 120 int ms;
121 int pi_type;
124 u64 mode_select_num_blocks; 122 u64 mode_select_num_blocks;
125 u32 mode_select_block_len; 123 u32 mode_select_block_len;
126}; 124};
@@ -138,6 +136,7 @@ struct nvme_iod {
138 int nents; /* Used in scatterlist */ 136 int nents; /* Used in scatterlist */
139 int length; /* Of data, in bytes */ 137 int length; /* Of data, in bytes */
140 dma_addr_t first_dma; 138 dma_addr_t first_dma;
139 struct scatterlist meta_sg[1]; /* metadata requires single contiguous buffer */
141 struct scatterlist sg[0]; 140 struct scatterlist sg[0];
142}; 141};
143 142
diff --git a/include/linux/of_platform.h b/include/linux/of_platform.h
index 8a860f096c35..611a691145c4 100644
--- a/include/linux/of_platform.h
+++ b/include/linux/of_platform.h
@@ -84,7 +84,7 @@ static inline int of_platform_populate(struct device_node *root,
84static inline void of_platform_depopulate(struct device *parent) { } 84static inline void of_platform_depopulate(struct device *parent) { }
85#endif 85#endif
86 86
87#ifdef CONFIG_OF_DYNAMIC 87#if defined(CONFIG_OF_DYNAMIC) && defined(CONFIG_OF_ADDRESS)
88extern void of_platform_register_reconfig_notifier(void); 88extern void of_platform_register_reconfig_notifier(void);
89#else 89#else
90static inline void of_platform_register_reconfig_notifier(void) { } 90static inline void of_platform_register_reconfig_notifier(void) { }
diff --git a/include/linux/pinctrl/consumer.h b/include/linux/pinctrl/consumer.h
index 72c0415d6c21..18eccefea06e 100644
--- a/include/linux/pinctrl/consumer.h
+++ b/include/linux/pinctrl/consumer.h
@@ -82,7 +82,7 @@ static inline int pinctrl_gpio_direction_output(unsigned gpio)
82 82
83static inline struct pinctrl * __must_check pinctrl_get(struct device *dev) 83static inline struct pinctrl * __must_check pinctrl_get(struct device *dev)
84{ 84{
85 return ERR_PTR(-ENOSYS); 85 return NULL;
86} 86}
87 87
88static inline void pinctrl_put(struct pinctrl *p) 88static inline void pinctrl_put(struct pinctrl *p)
@@ -93,7 +93,7 @@ static inline struct pinctrl_state * __must_check pinctrl_lookup_state(
93 struct pinctrl *p, 93 struct pinctrl *p,
94 const char *name) 94 const char *name)
95{ 95{
96 return ERR_PTR(-ENOSYS); 96 return NULL;
97} 97}
98 98
99static inline int pinctrl_select_state(struct pinctrl *p, 99static inline int pinctrl_select_state(struct pinctrl *p,
@@ -104,7 +104,7 @@ static inline int pinctrl_select_state(struct pinctrl *p,
104 104
105static inline struct pinctrl * __must_check devm_pinctrl_get(struct device *dev) 105static inline struct pinctrl * __must_check devm_pinctrl_get(struct device *dev)
106{ 106{
107 return ERR_PTR(-ENOSYS); 107 return NULL;
108} 108}
109 109
110static inline void devm_pinctrl_put(struct pinctrl *p) 110static inline void devm_pinctrl_put(struct pinctrl *p)
diff --git a/arch/blackfin/include/asm/bfin_rotary.h b/include/linux/platform_data/bfin_rotary.h
index 8895a750c70c..98829370fee2 100644
--- a/arch/blackfin/include/asm/bfin_rotary.h
+++ b/include/linux/platform_data/bfin_rotary.h
@@ -40,6 +40,7 @@ struct bfin_rotary_platform_data {
40 unsigned short debounce; /* 0..17 */ 40 unsigned short debounce; /* 0..17 */
41 unsigned short mode; 41 unsigned short mode;
42 unsigned short pm_wakeup; 42 unsigned short pm_wakeup;
43 unsigned short *pin_list;
43}; 44};
44 45
45/* CNT_CONFIG bitmasks */ 46/* CNT_CONFIG bitmasks */
diff --git a/include/linux/rhashtable.h b/include/linux/rhashtable.h
index 58851275fed9..d438eeb08bff 100644
--- a/include/linux/rhashtable.h
+++ b/include/linux/rhashtable.h
@@ -54,10 +54,11 @@ struct rhash_head {
54 * @buckets: size * hash buckets 54 * @buckets: size * hash buckets
55 */ 55 */
56struct bucket_table { 56struct bucket_table {
57 size_t size; 57 size_t size;
58 unsigned int locks_mask; 58 unsigned int locks_mask;
59 spinlock_t *locks; 59 spinlock_t *locks;
60 struct rhash_head __rcu *buckets[]; 60
61 struct rhash_head __rcu *buckets[] ____cacheline_aligned_in_smp;
61}; 62};
62 63
63typedef u32 (*rht_hashfn_t)(const void *data, u32 len, u32 seed); 64typedef u32 (*rht_hashfn_t)(const void *data, u32 len, u32 seed);
@@ -78,12 +79,6 @@ struct rhashtable;
78 * @locks_mul: Number of bucket locks to allocate per cpu (default: 128) 79 * @locks_mul: Number of bucket locks to allocate per cpu (default: 128)
79 * @hashfn: Function to hash key 80 * @hashfn: Function to hash key
80 * @obj_hashfn: Function to hash object 81 * @obj_hashfn: Function to hash object
81 * @grow_decision: If defined, may return true if table should expand
82 * @shrink_decision: If defined, may return true if table should shrink
83 *
84 * Note: when implementing the grow and shrink decision function, min/max
85 * shift must be enforced, otherwise, resizing watermarks they set may be
86 * useless.
87 */ 82 */
88struct rhashtable_params { 83struct rhashtable_params {
89 size_t nelem_hint; 84 size_t nelem_hint;
@@ -97,10 +92,6 @@ struct rhashtable_params {
97 size_t locks_mul; 92 size_t locks_mul;
98 rht_hashfn_t hashfn; 93 rht_hashfn_t hashfn;
99 rht_obj_hashfn_t obj_hashfn; 94 rht_obj_hashfn_t obj_hashfn;
100 bool (*grow_decision)(const struct rhashtable *ht,
101 size_t new_size);
102 bool (*shrink_decision)(const struct rhashtable *ht,
103 size_t new_size);
104}; 95};
105 96
106/** 97/**
@@ -192,9 +183,6 @@ int rhashtable_init(struct rhashtable *ht, struct rhashtable_params *params);
192void rhashtable_insert(struct rhashtable *ht, struct rhash_head *node); 183void rhashtable_insert(struct rhashtable *ht, struct rhash_head *node);
193bool rhashtable_remove(struct rhashtable *ht, struct rhash_head *node); 184bool rhashtable_remove(struct rhashtable *ht, struct rhash_head *node);
194 185
195bool rht_grow_above_75(const struct rhashtable *ht, size_t new_size);
196bool rht_shrink_below_30(const struct rhashtable *ht, size_t new_size);
197
198int rhashtable_expand(struct rhashtable *ht); 186int rhashtable_expand(struct rhashtable *ht);
199int rhashtable_shrink(struct rhashtable *ht); 187int rhashtable_shrink(struct rhashtable *ht);
200 188
diff --git a/include/linux/sched.h b/include/linux/sched.h
index 41c60e5302d7..6d77432e14ff 100644
--- a/include/linux/sched.h
+++ b/include/linux/sched.h
@@ -363,9 +363,6 @@ extern void show_regs(struct pt_regs *);
363 */ 363 */
364extern void show_stack(struct task_struct *task, unsigned long *sp); 364extern void show_stack(struct task_struct *task, unsigned long *sp);
365 365
366void io_schedule(void);
367long io_schedule_timeout(long timeout);
368
369extern void cpu_init (void); 366extern void cpu_init (void);
370extern void trap_init(void); 367extern void trap_init(void);
371extern void update_process_times(int user); 368extern void update_process_times(int user);
@@ -422,6 +419,13 @@ extern signed long schedule_timeout_uninterruptible(signed long timeout);
422asmlinkage void schedule(void); 419asmlinkage void schedule(void);
423extern void schedule_preempt_disabled(void); 420extern void schedule_preempt_disabled(void);
424 421
422extern long io_schedule_timeout(long timeout);
423
424static inline void io_schedule(void)
425{
426 io_schedule_timeout(MAX_SCHEDULE_TIMEOUT);
427}
428
425struct nsproxy; 429struct nsproxy;
426struct user_namespace; 430struct user_namespace;
427 431
diff --git a/include/linux/serial_core.h b/include/linux/serial_core.h
index baf3e1d08416..d10965f0d8a4 100644
--- a/include/linux/serial_core.h
+++ b/include/linux/serial_core.h
@@ -143,13 +143,13 @@ struct uart_port {
143 unsigned char iotype; /* io access style */ 143 unsigned char iotype; /* io access style */
144 unsigned char unused1; 144 unsigned char unused1;
145 145
146#define UPIO_PORT (0) /* 8b I/O port access */ 146#define UPIO_PORT (SERIAL_IO_PORT) /* 8b I/O port access */
147#define UPIO_HUB6 (1) /* Hub6 ISA card */ 147#define UPIO_HUB6 (SERIAL_IO_HUB6) /* Hub6 ISA card */
148#define UPIO_MEM (2) /* 8b MMIO access */ 148#define UPIO_MEM (SERIAL_IO_MEM) /* 8b MMIO access */
149#define UPIO_MEM32 (3) /* 32b little endian */ 149#define UPIO_MEM32 (SERIAL_IO_MEM32) /* 32b little endian */
150#define UPIO_MEM32BE (4) /* 32b big endian */ 150#define UPIO_AU (SERIAL_IO_AU) /* Au1x00 and RT288x type IO */
151#define UPIO_AU (5) /* Au1x00 and RT288x type IO */ 151#define UPIO_TSI (SERIAL_IO_TSI) /* Tsi108/109 type IO */
152#define UPIO_TSI (6) /* Tsi108/109 type IO */ 152#define UPIO_MEM32BE (SERIAL_IO_MEM32BE) /* 32b big endian */
153 153
154 unsigned int read_status_mask; /* driver specific */ 154 unsigned int read_status_mask; /* driver specific */
155 unsigned int ignore_status_mask; /* driver specific */ 155 unsigned int ignore_status_mask; /* driver specific */
diff --git a/include/linux/skbuff.h b/include/linux/skbuff.h
index 30007afe70b3..f54d6659713a 100644
--- a/include/linux/skbuff.h
+++ b/include/linux/skbuff.h
@@ -948,6 +948,13 @@ static inline void skb_copy_hash(struct sk_buff *to, const struct sk_buff *from)
948 to->l4_hash = from->l4_hash; 948 to->l4_hash = from->l4_hash;
949}; 949};
950 950
951static inline void skb_sender_cpu_clear(struct sk_buff *skb)
952{
953#ifdef CONFIG_XPS
954 skb->sender_cpu = 0;
955#endif
956}
957
951#ifdef NET_SKBUFF_DATA_USES_OFFSET 958#ifdef NET_SKBUFF_DATA_USES_OFFSET
952static inline unsigned char *skb_end_pointer(const struct sk_buff *skb) 959static inline unsigned char *skb_end_pointer(const struct sk_buff *skb)
953{ 960{
diff --git a/include/linux/spi/spi.h b/include/linux/spi/spi.h
index ed9489d893a4..856d34dde79b 100644
--- a/include/linux/spi/spi.h
+++ b/include/linux/spi/spi.h
@@ -649,7 +649,7 @@ struct spi_transfer {
649 * sequence completes. On some systems, many such sequences can execute as 649 * sequence completes. On some systems, many such sequences can execute as
650 * as single programmed DMA transfer. On all systems, these messages are 650 * as single programmed DMA transfer. On all systems, these messages are
651 * queued, and might complete after transactions to other devices. Messages 651 * queued, and might complete after transactions to other devices. Messages
652 * sent to a given spi_device are alway executed in FIFO order. 652 * sent to a given spi_device are always executed in FIFO order.
653 * 653 *
654 * The code that submits an spi_message (and its spi_transfers) 654 * The code that submits an spi_message (and its spi_transfers)
655 * to the lower layers is responsible for managing its memory. 655 * to the lower layers is responsible for managing its memory.
diff --git a/include/linux/sunrpc/metrics.h b/include/linux/sunrpc/metrics.h
index 7e61a17030a4..694eecb2f1b5 100644
--- a/include/linux/sunrpc/metrics.h
+++ b/include/linux/sunrpc/metrics.h
@@ -89,8 +89,11 @@ void rpc_free_iostats(struct rpc_iostats *);
89static inline struct rpc_iostats *rpc_alloc_iostats(struct rpc_clnt *clnt) { return NULL; } 89static inline struct rpc_iostats *rpc_alloc_iostats(struct rpc_clnt *clnt) { return NULL; }
90static inline void rpc_count_iostats(const struct rpc_task *task, 90static inline void rpc_count_iostats(const struct rpc_task *task,
91 struct rpc_iostats *stats) {} 91 struct rpc_iostats *stats) {}
92static inline void rpc_count_iostats_metrics(const struct rpc_task *, 92static inline void rpc_count_iostats_metrics(const struct rpc_task *task,
93 struct rpc_iostats *) {} 93 struct rpc_iostats *stats)
94{
95}
96
94static inline void rpc_print_iostats(struct seq_file *seq, struct rpc_clnt *clnt) {} 97static inline void rpc_print_iostats(struct seq_file *seq, struct rpc_clnt *clnt) {}
95static inline void rpc_free_iostats(struct rpc_iostats *stats) {} 98static inline void rpc_free_iostats(struct rpc_iostats *stats) {}
96 99
diff --git a/include/linux/thermal.h b/include/linux/thermal.h
index fc52e307efab..5eac316490ea 100644
--- a/include/linux/thermal.h
+++ b/include/linux/thermal.h
@@ -314,6 +314,8 @@ void thermal_zone_of_sensor_unregister(struct device *dev,
314} 314}
315 315
316#endif 316#endif
317
318#if IS_ENABLED(CONFIG_THERMAL)
317struct thermal_zone_device *thermal_zone_device_register(const char *, int, int, 319struct thermal_zone_device *thermal_zone_device_register(const char *, int, int,
318 void *, struct thermal_zone_device_ops *, 320 void *, struct thermal_zone_device_ops *,
319 const struct thermal_zone_params *, int, int); 321 const struct thermal_zone_params *, int, int);
@@ -340,8 +342,58 @@ struct thermal_instance *get_thermal_instance(struct thermal_zone_device *,
340 struct thermal_cooling_device *, int); 342 struct thermal_cooling_device *, int);
341void thermal_cdev_update(struct thermal_cooling_device *); 343void thermal_cdev_update(struct thermal_cooling_device *);
342void thermal_notify_framework(struct thermal_zone_device *, int); 344void thermal_notify_framework(struct thermal_zone_device *, int);
343 345#else
344#ifdef CONFIG_NET 346static inline struct thermal_zone_device *thermal_zone_device_register(
347 const char *type, int trips, int mask, void *devdata,
348 struct thermal_zone_device_ops *ops,
349 const struct thermal_zone_params *tzp,
350 int passive_delay, int polling_delay)
351{ return ERR_PTR(-ENODEV); }
352static inline void thermal_zone_device_unregister(
353 struct thermal_zone_device *tz)
354{ }
355static inline int thermal_zone_bind_cooling_device(
356 struct thermal_zone_device *tz, int trip,
357 struct thermal_cooling_device *cdev,
358 unsigned long upper, unsigned long lower)
359{ return -ENODEV; }
360static inline int thermal_zone_unbind_cooling_device(
361 struct thermal_zone_device *tz, int trip,
362 struct thermal_cooling_device *cdev)
363{ return -ENODEV; }
364static inline void thermal_zone_device_update(struct thermal_zone_device *tz)
365{ }
366static inline struct thermal_cooling_device *
367thermal_cooling_device_register(char *type, void *devdata,
368 const struct thermal_cooling_device_ops *ops)
369{ return ERR_PTR(-ENODEV); }
370static inline struct thermal_cooling_device *
371thermal_of_cooling_device_register(struct device_node *np,
372 char *type, void *devdata, const struct thermal_cooling_device_ops *ops)
373{ return ERR_PTR(-ENODEV); }
374static inline void thermal_cooling_device_unregister(
375 struct thermal_cooling_device *cdev)
376{ }
377static inline struct thermal_zone_device *thermal_zone_get_zone_by_name(
378 const char *name)
379{ return ERR_PTR(-ENODEV); }
380static inline int thermal_zone_get_temp(
381 struct thermal_zone_device *tz, unsigned long *temp)
382{ return -ENODEV; }
383static inline int get_tz_trend(struct thermal_zone_device *tz, int trip)
384{ return -ENODEV; }
385static inline struct thermal_instance *
386get_thermal_instance(struct thermal_zone_device *tz,
387 struct thermal_cooling_device *cdev, int trip)
388{ return ERR_PTR(-ENODEV); }
389static inline void thermal_cdev_update(struct thermal_cooling_device *cdev)
390{ }
391static inline void thermal_notify_framework(struct thermal_zone_device *tz,
392 int trip)
393{ }
394#endif /* CONFIG_THERMAL */
395
396#if defined(CONFIG_NET) && IS_ENABLED(CONFIG_THERMAL)
345extern int thermal_generate_netlink_event(struct thermal_zone_device *tz, 397extern int thermal_generate_netlink_event(struct thermal_zone_device *tz,
346 enum events event); 398 enum events event);
347#else 399#else
diff --git a/include/linux/uio.h b/include/linux/uio.h
index 07a022641996..71880299ed48 100644
--- a/include/linux/uio.h
+++ b/include/linux/uio.h
@@ -98,6 +98,8 @@ ssize_t iov_iter_get_pages_alloc(struct iov_iter *i, struct page ***pages,
98 size_t maxsize, size_t *start); 98 size_t maxsize, size_t *start);
99int iov_iter_npages(const struct iov_iter *i, int maxpages); 99int iov_iter_npages(const struct iov_iter *i, int maxpages);
100 100
101const void *dup_iter(struct iov_iter *new, struct iov_iter *old, gfp_t flags);
102
101static inline size_t iov_iter_count(struct iov_iter *i) 103static inline size_t iov_iter_count(struct iov_iter *i)
102{ 104{
103 return i->count; 105 return i->count;
diff --git a/include/linux/usb/serial.h b/include/linux/usb/serial.h
index 9bb547c7bce7..704a1ab8240c 100644
--- a/include/linux/usb/serial.h
+++ b/include/linux/usb/serial.h
@@ -190,8 +190,7 @@ static inline void usb_set_serial_data(struct usb_serial *serial, void *data)
190 * @num_ports: the number of different ports this device will have. 190 * @num_ports: the number of different ports this device will have.
191 * @bulk_in_size: minimum number of bytes to allocate for bulk-in buffer 191 * @bulk_in_size: minimum number of bytes to allocate for bulk-in buffer
192 * (0 = end-point size) 192 * (0 = end-point size)
193 * @bulk_out_size: minimum number of bytes to allocate for bulk-out buffer 193 * @bulk_out_size: bytes to allocate for bulk-out buffer (0 = end-point size)
194 * (0 = end-point size)
195 * @calc_num_ports: pointer to a function to determine how many ports this 194 * @calc_num_ports: pointer to a function to determine how many ports this
196 * device has dynamically. It will be called after the probe() 195 * device has dynamically. It will be called after the probe()
197 * callback is called, but before attach() 196 * callback is called, but before attach()
diff --git a/include/linux/vfio.h b/include/linux/vfio.h
index d3204115f15d..2d67b8998fd8 100644
--- a/include/linux/vfio.h
+++ b/include/linux/vfio.h
@@ -26,6 +26,7 @@
26 * @ioctl: Perform ioctl(2) on device file descriptor, supporting VFIO_DEVICE_* 26 * @ioctl: Perform ioctl(2) on device file descriptor, supporting VFIO_DEVICE_*
27 * operations documented below 27 * operations documented below
28 * @mmap: Perform mmap(2) on a region of the device file descriptor 28 * @mmap: Perform mmap(2) on a region of the device file descriptor
29 * @request: Request for the bus driver to release the device
29 */ 30 */
30struct vfio_device_ops { 31struct vfio_device_ops {
31 char *name; 32 char *name;
@@ -38,6 +39,7 @@ struct vfio_device_ops {
38 long (*ioctl)(void *device_data, unsigned int cmd, 39 long (*ioctl)(void *device_data, unsigned int cmd,
39 unsigned long arg); 40 unsigned long arg);
40 int (*mmap)(void *device_data, struct vm_area_struct *vma); 41 int (*mmap)(void *device_data, struct vm_area_struct *vma);
42 void (*request)(void *device_data, unsigned int count);
41}; 43};
42 44
43extern int vfio_add_group_dev(struct device *dev, 45extern int vfio_add_group_dev(struct device *dev,
diff --git a/include/linux/vmalloc.h b/include/linux/vmalloc.h
index 7d7acb35603d..0ec598381f97 100644
--- a/include/linux/vmalloc.h
+++ b/include/linux/vmalloc.h
@@ -17,6 +17,7 @@ struct vm_area_struct; /* vma defining user mapping in mm_types.h */
17#define VM_VPAGES 0x00000010 /* buffer for pages was vmalloc'ed */ 17#define VM_VPAGES 0x00000010 /* buffer for pages was vmalloc'ed */
18#define VM_UNINITIALIZED 0x00000020 /* vm_struct is not fully initialized */ 18#define VM_UNINITIALIZED 0x00000020 /* vm_struct is not fully initialized */
19#define VM_NO_GUARD 0x00000040 /* don't add guard page */ 19#define VM_NO_GUARD 0x00000040 /* don't add guard page */
20#define VM_KASAN 0x00000080 /* has allocated kasan shadow memory */
20/* bits [20..32] reserved for arch specific ioremap internals */ 21/* bits [20..32] reserved for arch specific ioremap internals */
21 22
22/* 23/*
diff --git a/include/linux/workqueue.h b/include/linux/workqueue.h
index 74db135f9957..f597846ff605 100644
--- a/include/linux/workqueue.h
+++ b/include/linux/workqueue.h
@@ -70,7 +70,8 @@ enum {
70 /* data contains off-queue information when !WORK_STRUCT_PWQ */ 70 /* data contains off-queue information when !WORK_STRUCT_PWQ */
71 WORK_OFFQ_FLAG_BASE = WORK_STRUCT_COLOR_SHIFT, 71 WORK_OFFQ_FLAG_BASE = WORK_STRUCT_COLOR_SHIFT,
72 72
73 WORK_OFFQ_CANCELING = (1 << WORK_OFFQ_FLAG_BASE), 73 __WORK_OFFQ_CANCELING = WORK_OFFQ_FLAG_BASE,
74 WORK_OFFQ_CANCELING = (1 << __WORK_OFFQ_CANCELING),
74 75
75 /* 76 /*
76 * When a work item is off queue, its high bits point to the last 77 * When a work item is off queue, its high bits point to the last
diff --git a/include/net/caif/cfpkt.h b/include/net/caif/cfpkt.h
index 1c1ad46250d5..fe328c52c46b 100644
--- a/include/net/caif/cfpkt.h
+++ b/include/net/caif/cfpkt.h
@@ -171,7 +171,7 @@ struct cfpkt *cfpkt_split(struct cfpkt *pkt, u16 pos);
171 * @return Checksum of buffer. 171 * @return Checksum of buffer.
172 */ 172 */
173 173
174u16 cfpkt_iterate(struct cfpkt *pkt, 174int cfpkt_iterate(struct cfpkt *pkt,
175 u16 (*iter_func)(u16 chks, void *buf, u16 len), 175 u16 (*iter_func)(u16 chks, void *buf, u16 len),
176 u16 data); 176 u16 data);
177 177
diff --git a/include/net/dst.h b/include/net/dst.h
index a8ae4e760778..0fb99a26e973 100644
--- a/include/net/dst.h
+++ b/include/net/dst.h
@@ -481,6 +481,7 @@ void dst_init(void);
481enum { 481enum {
482 XFRM_LOOKUP_ICMP = 1 << 0, 482 XFRM_LOOKUP_ICMP = 1 << 0,
483 XFRM_LOOKUP_QUEUE = 1 << 1, 483 XFRM_LOOKUP_QUEUE = 1 << 1,
484 XFRM_LOOKUP_KEEP_DST_REF = 1 << 2,
484}; 485};
485 486
486struct flowi; 487struct flowi;
diff --git a/include/net/netfilter/nf_tables.h b/include/net/netfilter/nf_tables.h
index 9eaaa7884586..decb9a095ae7 100644
--- a/include/net/netfilter/nf_tables.h
+++ b/include/net/netfilter/nf_tables.h
@@ -119,6 +119,22 @@ int nft_validate_data_load(const struct nft_ctx *ctx, enum nft_registers reg,
119 const struct nft_data *data, 119 const struct nft_data *data,
120 enum nft_data_types type); 120 enum nft_data_types type);
121 121
122
123/**
124 * struct nft_userdata - user defined data associated with an object
125 *
126 * @len: length of the data
127 * @data: content
128 *
129 * The presence of user data is indicated in an object specific fashion,
130 * so a length of zero can't occur and the value "len" indicates data
131 * of length len + 1.
132 */
133struct nft_userdata {
134 u8 len;
135 unsigned char data[0];
136};
137
122/** 138/**
123 * struct nft_set_elem - generic representation of set elements 139 * struct nft_set_elem - generic representation of set elements
124 * 140 *
@@ -380,7 +396,7 @@ static inline void *nft_expr_priv(const struct nft_expr *expr)
380 * @handle: rule handle 396 * @handle: rule handle
381 * @genmask: generation mask 397 * @genmask: generation mask
382 * @dlen: length of expression data 398 * @dlen: length of expression data
383 * @ulen: length of user data (used for comments) 399 * @udata: user data is appended to the rule
384 * @data: expression data 400 * @data: expression data
385 */ 401 */
386struct nft_rule { 402struct nft_rule {
@@ -388,7 +404,7 @@ struct nft_rule {
388 u64 handle:42, 404 u64 handle:42,
389 genmask:2, 405 genmask:2,
390 dlen:12, 406 dlen:12,
391 ulen:8; 407 udata:1;
392 unsigned char data[] 408 unsigned char data[]
393 __attribute__((aligned(__alignof__(struct nft_expr)))); 409 __attribute__((aligned(__alignof__(struct nft_expr))));
394}; 410};
@@ -476,7 +492,7 @@ static inline struct nft_expr *nft_expr_last(const struct nft_rule *rule)
476 return (struct nft_expr *)&rule->data[rule->dlen]; 492 return (struct nft_expr *)&rule->data[rule->dlen];
477} 493}
478 494
479static inline void *nft_userdata(const struct nft_rule *rule) 495static inline struct nft_userdata *nft_userdata(const struct nft_rule *rule)
480{ 496{
481 return (void *)&rule->data[rule->dlen]; 497 return (void *)&rule->data[rule->dlen];
482} 498}
diff --git a/include/net/vxlan.h b/include/net/vxlan.h
index eabd3a038674..c73e7abbbaa5 100644
--- a/include/net/vxlan.h
+++ b/include/net/vxlan.h
@@ -91,6 +91,7 @@ struct vxlanhdr {
91 91
92#define VXLAN_N_VID (1u << 24) 92#define VXLAN_N_VID (1u << 24)
93#define VXLAN_VID_MASK (VXLAN_N_VID - 1) 93#define VXLAN_VID_MASK (VXLAN_N_VID - 1)
94#define VXLAN_VNI_MASK (VXLAN_VID_MASK << 8)
94#define VXLAN_HLEN (sizeof(struct udphdr) + sizeof(struct vxlanhdr)) 95#define VXLAN_HLEN (sizeof(struct udphdr) + sizeof(struct vxlanhdr))
95 96
96struct vxlan_metadata { 97struct vxlan_metadata {
diff --git a/include/soc/at91/at91sam9_ddrsdr.h b/include/soc/at91/at91sam9_ddrsdr.h
index 0210797abf2e..dc10c52e0e91 100644
--- a/include/soc/at91/at91sam9_ddrsdr.h
+++ b/include/soc/at91/at91sam9_ddrsdr.h
@@ -92,7 +92,7 @@
92#define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */ 92#define AT91_DDRSDRC_UPD_MR (3 << 20) /* Update load mode register and extended mode register */
93 93
94#define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */ 94#define AT91_DDRSDRC_MDR 0x20 /* Memory Device Register */
95#define AT91_DDRSDRC_MD (3 << 0) /* Memory Device Type */ 95#define AT91_DDRSDRC_MD (7 << 0) /* Memory Device Type */
96#define AT91_DDRSDRC_MD_SDR 0 96#define AT91_DDRSDRC_MD_SDR 0
97#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1 97#define AT91_DDRSDRC_MD_LOW_POWER_SDR 1
98#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3 98#define AT91_DDRSDRC_MD_LOW_POWER_DDR 3
diff --git a/drivers/target/iscsi/iscsi_target_core.h b/include/target/iscsi/iscsi_target_core.h
index cbcff38ac9b7..d3583d3ee193 100644
--- a/drivers/target/iscsi/iscsi_target_core.h
+++ b/include/target/iscsi/iscsi_target_core.h
@@ -880,4 +880,18 @@ struct iscsit_global {
880 struct iscsi_portal_group *discovery_tpg; 880 struct iscsi_portal_group *discovery_tpg;
881}; 881};
882 882
883static inline u32 session_get_next_ttt(struct iscsi_session *session)
884{
885 u32 ttt;
886
887 spin_lock_bh(&session->ttt_lock);
888 ttt = session->targ_xfer_tag++;
889 if (ttt == 0xFFFFFFFF)
890 ttt = session->targ_xfer_tag++;
891 spin_unlock_bh(&session->ttt_lock);
892
893 return ttt;
894}
895
896extern struct iscsi_cmd *iscsit_find_cmd_from_itt(struct iscsi_conn *, itt_t);
883#endif /* ISCSI_TARGET_CORE_H */ 897#endif /* ISCSI_TARGET_CORE_H */
diff --git a/drivers/target/iscsi/iscsi_target_stat.h b/include/target/iscsi/iscsi_target_stat.h
index 3ff76b4faad3..3ff76b4faad3 100644
--- a/drivers/target/iscsi/iscsi_target_stat.h
+++ b/include/target/iscsi/iscsi_target_stat.h
diff --git a/include/target/iscsi/iscsi_transport.h b/include/target/iscsi/iscsi_transport.h
index daef9daa500c..e6bb166f12c2 100644
--- a/include/target/iscsi/iscsi_transport.h
+++ b/include/target/iscsi/iscsi_transport.h
@@ -1,6 +1,6 @@
1#include <linux/module.h> 1#include <linux/module.h>
2#include <linux/list.h> 2#include <linux/list.h>
3#include "../../../drivers/target/iscsi/iscsi_target_core.h" 3#include "iscsi_target_core.h"
4 4
5struct iscsit_transport { 5struct iscsit_transport {
6#define ISCSIT_TRANSPORT_NAME 16 6#define ISCSIT_TRANSPORT_NAME 16
diff --git a/include/target/target_core_backend.h b/include/target/target_core_backend.h
index db81c65b8f48..d61be7297b2c 100644
--- a/include/target/target_core_backend.h
+++ b/include/target/target_core_backend.h
@@ -111,6 +111,7 @@ void array_free(void *array, int n);
111void target_core_setup_sub_cits(struct se_subsystem_api *); 111void target_core_setup_sub_cits(struct se_subsystem_api *);
112 112
113/* attribute helpers from target_core_device.c for backend drivers */ 113/* attribute helpers from target_core_device.c for backend drivers */
114bool se_dev_check_wce(struct se_device *);
114int se_dev_set_max_unmap_lba_count(struct se_device *, u32); 115int se_dev_set_max_unmap_lba_count(struct se_device *, u32);
115int se_dev_set_max_unmap_block_desc_count(struct se_device *, u32); 116int se_dev_set_max_unmap_block_desc_count(struct se_device *, u32);
116int se_dev_set_unmap_granularity(struct se_device *, u32); 117int se_dev_set_unmap_granularity(struct se_device *, u32);
diff --git a/include/target/target_core_base.h b/include/target/target_core_base.h
index 4a8795a87b9e..672150b6aaf5 100644
--- a/include/target/target_core_base.h
+++ b/include/target/target_core_base.h
@@ -407,7 +407,7 @@ struct t10_reservation {
407 /* Activate Persistence across Target Power Loss enabled 407 /* Activate Persistence across Target Power Loss enabled
408 * for SCSI device */ 408 * for SCSI device */
409 int pr_aptpl_active; 409 int pr_aptpl_active;
410#define PR_APTPL_BUF_LEN 8192 410#define PR_APTPL_BUF_LEN 262144
411 u32 pr_generation; 411 u32 pr_generation;
412 spinlock_t registration_lock; 412 spinlock_t registration_lock;
413 spinlock_t aptpl_reg_lock; 413 spinlock_t aptpl_reg_lock;
diff --git a/include/uapi/linux/nvme.h b/include/uapi/linux/nvme.h
index 26386cf3db44..aef9a81b2d75 100644
--- a/include/uapi/linux/nvme.h
+++ b/include/uapi/linux/nvme.h
@@ -115,7 +115,13 @@ struct nvme_id_ns {
115 __le16 nawun; 115 __le16 nawun;
116 __le16 nawupf; 116 __le16 nawupf;
117 __le16 nacwu; 117 __le16 nacwu;
118 __u8 rsvd40[80]; 118 __le16 nabsn;
119 __le16 nabo;
120 __le16 nabspf;
121 __u16 rsvd46;
122 __le64 nvmcap[2];
123 __u8 rsvd64[40];
124 __u8 nguid[16];
119 __u8 eui64[8]; 125 __u8 eui64[8];
120 struct nvme_lbaf lbaf[16]; 126 struct nvme_lbaf lbaf[16];
121 __u8 rsvd192[192]; 127 __u8 rsvd192[192];
@@ -124,10 +130,22 @@ struct nvme_id_ns {
124 130
125enum { 131enum {
126 NVME_NS_FEAT_THIN = 1 << 0, 132 NVME_NS_FEAT_THIN = 1 << 0,
133 NVME_NS_FLBAS_LBA_MASK = 0xf,
134 NVME_NS_FLBAS_META_EXT = 0x10,
127 NVME_LBAF_RP_BEST = 0, 135 NVME_LBAF_RP_BEST = 0,
128 NVME_LBAF_RP_BETTER = 1, 136 NVME_LBAF_RP_BETTER = 1,
129 NVME_LBAF_RP_GOOD = 2, 137 NVME_LBAF_RP_GOOD = 2,
130 NVME_LBAF_RP_DEGRADED = 3, 138 NVME_LBAF_RP_DEGRADED = 3,
139 NVME_NS_DPC_PI_LAST = 1 << 4,
140 NVME_NS_DPC_PI_FIRST = 1 << 3,
141 NVME_NS_DPC_PI_TYPE3 = 1 << 2,
142 NVME_NS_DPC_PI_TYPE2 = 1 << 1,
143 NVME_NS_DPC_PI_TYPE1 = 1 << 0,
144 NVME_NS_DPS_PI_FIRST = 1 << 3,
145 NVME_NS_DPS_PI_MASK = 0x7,
146 NVME_NS_DPS_PI_TYPE1 = 1,
147 NVME_NS_DPS_PI_TYPE2 = 2,
148 NVME_NS_DPS_PI_TYPE3 = 3,
131}; 149};
132 150
133struct nvme_smart_log { 151struct nvme_smart_log {
@@ -261,6 +279,10 @@ enum {
261 NVME_RW_DSM_LATENCY_LOW = 3 << 4, 279 NVME_RW_DSM_LATENCY_LOW = 3 << 4,
262 NVME_RW_DSM_SEQ_REQ = 1 << 6, 280 NVME_RW_DSM_SEQ_REQ = 1 << 6,
263 NVME_RW_DSM_COMPRESSED = 1 << 7, 281 NVME_RW_DSM_COMPRESSED = 1 << 7,
282 NVME_RW_PRINFO_PRCHK_REF = 1 << 10,
283 NVME_RW_PRINFO_PRCHK_APP = 1 << 11,
284 NVME_RW_PRINFO_PRCHK_GUARD = 1 << 12,
285 NVME_RW_PRINFO_PRACT = 1 << 13,
264}; 286};
265 287
266struct nvme_dsm_cmd { 288struct nvme_dsm_cmd {
@@ -549,6 +571,8 @@ struct nvme_passthru_cmd {
549 __u32 result; 571 __u32 result;
550}; 572};
551 573
574#define NVME_VS(major, minor) (((major) << 16) | ((minor) << 8))
575
552#define nvme_admin_cmd nvme_passthru_cmd 576#define nvme_admin_cmd nvme_passthru_cmd
553 577
554#define NVME_IOCTL_ID _IO('N', 0x40) 578#define NVME_IOCTL_ID _IO('N', 0x40)
diff --git a/include/uapi/linux/prctl.h b/include/uapi/linux/prctl.h
index 89f63503f903..31891d9535e2 100644
--- a/include/uapi/linux/prctl.h
+++ b/include/uapi/linux/prctl.h
@@ -185,4 +185,9 @@ struct prctl_mm_map {
185#define PR_MPX_ENABLE_MANAGEMENT 43 185#define PR_MPX_ENABLE_MANAGEMENT 43
186#define PR_MPX_DISABLE_MANAGEMENT 44 186#define PR_MPX_DISABLE_MANAGEMENT 44
187 187
188#define PR_SET_FP_MODE 45
189#define PR_GET_FP_MODE 46
190# define PR_FP_MODE_FR (1 << 0) /* 64b FP registers */
191# define PR_FP_MODE_FRE (1 << 1) /* 32b compatibility */
192
188#endif /* _LINUX_PRCTL_H */ 193#endif /* _LINUX_PRCTL_H */
diff --git a/include/uapi/linux/serial.h b/include/uapi/linux/serial.h
index 5e0d0ed61cf3..25331f9faa76 100644
--- a/include/uapi/linux/serial.h
+++ b/include/uapi/linux/serial.h
@@ -65,6 +65,10 @@ struct serial_struct {
65#define SERIAL_IO_PORT 0 65#define SERIAL_IO_PORT 0
66#define SERIAL_IO_HUB6 1 66#define SERIAL_IO_HUB6 1
67#define SERIAL_IO_MEM 2 67#define SERIAL_IO_MEM 2
68#define SERIAL_IO_MEM32 3
69#define SERIAL_IO_AU 4
70#define SERIAL_IO_TSI 5
71#define SERIAL_IO_MEM32BE 6
68 72
69#define UART_CLEAR_FIFO 0x01 73#define UART_CLEAR_FIFO 0x01
70#define UART_USE_FIFO 0x02 74#define UART_USE_FIFO 0x02
diff --git a/include/uapi/linux/tc_act/Kbuild b/include/uapi/linux/tc_act/Kbuild
index 19d5219b0b99..242cf0c6e33d 100644
--- a/include/uapi/linux/tc_act/Kbuild
+++ b/include/uapi/linux/tc_act/Kbuild
@@ -9,3 +9,4 @@ header-y += tc_pedit.h
9header-y += tc_skbedit.h 9header-y += tc_skbedit.h
10header-y += tc_vlan.h 10header-y += tc_vlan.h
11header-y += tc_bpf.h 11header-y += tc_bpf.h
12header-y += tc_connmark.h
diff --git a/include/uapi/linux/vfio.h b/include/uapi/linux/vfio.h
index 29715d27548f..82889c30f4f5 100644
--- a/include/uapi/linux/vfio.h
+++ b/include/uapi/linux/vfio.h
@@ -333,6 +333,7 @@ enum {
333 VFIO_PCI_MSI_IRQ_INDEX, 333 VFIO_PCI_MSI_IRQ_INDEX,
334 VFIO_PCI_MSIX_IRQ_INDEX, 334 VFIO_PCI_MSIX_IRQ_INDEX,
335 VFIO_PCI_ERR_IRQ_INDEX, 335 VFIO_PCI_ERR_IRQ_INDEX,
336 VFIO_PCI_REQ_IRQ_INDEX,
336 VFIO_PCI_NUM_IRQS 337 VFIO_PCI_NUM_IRQS
337}; 338};
338 339
diff --git a/include/uapi/linux/virtio_blk.h b/include/uapi/linux/virtio_blk.h
index 3c53eec4ae22..19c66fcbab8a 100644
--- a/include/uapi/linux/virtio_blk.h
+++ b/include/uapi/linux/virtio_blk.h
@@ -60,7 +60,7 @@ struct virtio_blk_config {
60 __u32 size_max; 60 __u32 size_max;
61 /* The maximum number of segments (if VIRTIO_BLK_F_SEG_MAX) */ 61 /* The maximum number of segments (if VIRTIO_BLK_F_SEG_MAX) */
62 __u32 seg_max; 62 __u32 seg_max;
63 /* geometry the device (if VIRTIO_BLK_F_GEOMETRY) */ 63 /* geometry of the device (if VIRTIO_BLK_F_GEOMETRY) */
64 struct virtio_blk_geometry { 64 struct virtio_blk_geometry {
65 __u16 cylinders; 65 __u16 cylinders;
66 __u8 heads; 66 __u8 heads;
@@ -119,7 +119,11 @@ struct virtio_blk_config {
119#define VIRTIO_BLK_T_BARRIER 0x80000000 119#define VIRTIO_BLK_T_BARRIER 0x80000000
120#endif /* !VIRTIO_BLK_NO_LEGACY */ 120#endif /* !VIRTIO_BLK_NO_LEGACY */
121 121
122/* This is the first element of the read scatter-gather list. */ 122/*
123 * This comes first in the read scatter-gather list.
124 * For legacy virtio, if VIRTIO_F_ANY_LAYOUT is not negotiated,
125 * this is the first element of the read scatter-gather list.
126 */
123struct virtio_blk_outhdr { 127struct virtio_blk_outhdr {
124 /* VIRTIO_BLK_T* */ 128 /* VIRTIO_BLK_T* */
125 __virtio32 type; 129 __virtio32 type;
diff --git a/include/uapi/linux/virtio_scsi.h b/include/uapi/linux/virtio_scsi.h
index 42b9370771b0..cc18ef8825c0 100644
--- a/include/uapi/linux/virtio_scsi.h
+++ b/include/uapi/linux/virtio_scsi.h
@@ -29,8 +29,16 @@
29 29
30#include <linux/virtio_types.h> 30#include <linux/virtio_types.h>
31 31
32#define VIRTIO_SCSI_CDB_SIZE 32 32/* Default values of the CDB and sense data size configuration fields */
33#define VIRTIO_SCSI_SENSE_SIZE 96 33#define VIRTIO_SCSI_CDB_DEFAULT_SIZE 32
34#define VIRTIO_SCSI_SENSE_DEFAULT_SIZE 96
35
36#ifndef VIRTIO_SCSI_CDB_SIZE
37#define VIRTIO_SCSI_CDB_SIZE VIRTIO_SCSI_CDB_DEFAULT_SIZE
38#endif
39#ifndef VIRTIO_SCSI_SENSE_SIZE
40#define VIRTIO_SCSI_SENSE_SIZE VIRTIO_SCSI_SENSE_DEFAULT_SIZE
41#endif
34 42
35/* SCSI command request, followed by data-out */ 43/* SCSI command request, followed by data-out */
36struct virtio_scsi_cmd_req { 44struct virtio_scsi_cmd_req {
diff --git a/include/uapi/rdma/ib_user_verbs.h b/include/uapi/rdma/ib_user_verbs.h
index 867cc5084afb..b513e662d8e4 100644
--- a/include/uapi/rdma/ib_user_verbs.h
+++ b/include/uapi/rdma/ib_user_verbs.h
@@ -90,6 +90,7 @@ enum {
90}; 90};
91 91
92enum { 92enum {
93 IB_USER_VERBS_EX_CMD_QUERY_DEVICE = IB_USER_VERBS_CMD_QUERY_DEVICE,
93 IB_USER_VERBS_EX_CMD_CREATE_FLOW = IB_USER_VERBS_CMD_THRESHOLD, 94 IB_USER_VERBS_EX_CMD_CREATE_FLOW = IB_USER_VERBS_CMD_THRESHOLD,
94 IB_USER_VERBS_EX_CMD_DESTROY_FLOW, 95 IB_USER_VERBS_EX_CMD_DESTROY_FLOW,
95}; 96};
@@ -201,6 +202,28 @@ struct ib_uverbs_query_device_resp {
201 __u8 reserved[4]; 202 __u8 reserved[4];
202}; 203};
203 204
205struct ib_uverbs_ex_query_device {
206 __u32 comp_mask;
207 __u32 reserved;
208};
209
210struct ib_uverbs_odp_caps {
211 __u64 general_caps;
212 struct {
213 __u32 rc_odp_caps;
214 __u32 uc_odp_caps;
215 __u32 ud_odp_caps;
216 } per_transport_caps;
217 __u32 reserved;
218};
219
220struct ib_uverbs_ex_query_device_resp {
221 struct ib_uverbs_query_device_resp base;
222 __u32 comp_mask;
223 __u32 response_length;
224 struct ib_uverbs_odp_caps odp_caps;
225};
226
204struct ib_uverbs_query_port { 227struct ib_uverbs_query_port {
205 __u64 response; 228 __u64 response;
206 __u8 port_num; 229 __u8 port_num;
diff --git a/include/video/omapdss.h b/include/video/omapdss.h
index 60de61fea8e3..c8ed15daad02 100644
--- a/include/video/omapdss.h
+++ b/include/video/omapdss.h
@@ -689,6 +689,7 @@ struct omapdss_dsi_ops {
689}; 689};
690 690
691struct omap_dss_device { 691struct omap_dss_device {
692 struct kobject kobj;
692 struct device *dev; 693 struct device *dev;
693 694
694 struct module *owner; 695 struct module *owner;
diff --git a/include/xen/xen-ops.h b/include/xen/xen-ops.h
index 7491ee5d8164..83338210ee04 100644
--- a/include/xen/xen-ops.h
+++ b/include/xen/xen-ops.h
@@ -46,4 +46,30 @@ static inline efi_system_table_t __init *xen_efi_probe(void)
46} 46}
47#endif 47#endif
48 48
49#ifdef CONFIG_PREEMPT
50
51static inline void xen_preemptible_hcall_begin(void)
52{
53}
54
55static inline void xen_preemptible_hcall_end(void)
56{
57}
58
59#else
60
61DECLARE_PER_CPU(bool, xen_in_preemptible_hcall);
62
63static inline void xen_preemptible_hcall_begin(void)
64{
65 __this_cpu_write(xen_in_preemptible_hcall, true);
66}
67
68static inline void xen_preemptible_hcall_end(void)
69{
70 __this_cpu_write(xen_in_preemptible_hcall, false);
71}
72
73#endif /* CONFIG_PREEMPT */
74
49#endif /* INCLUDE_XEN_OPS_H */ 75#endif /* INCLUDE_XEN_OPS_H */
diff --git a/include/xen/xenbus.h b/include/xen/xenbus.h
index b78f21caf55a..b0f1c9e5d687 100644
--- a/include/xen/xenbus.h
+++ b/include/xen/xenbus.h
@@ -114,9 +114,9 @@ int __must_check __xenbus_register_backend(struct xenbus_driver *drv,
114 const char *mod_name); 114 const char *mod_name);
115 115
116#define xenbus_register_frontend(drv) \ 116#define xenbus_register_frontend(drv) \
117 __xenbus_register_frontend(drv, THIS_MODULE, KBUILD_MODNAME); 117 __xenbus_register_frontend(drv, THIS_MODULE, KBUILD_MODNAME)
118#define xenbus_register_backend(drv) \ 118#define xenbus_register_backend(drv) \
119 __xenbus_register_backend(drv, THIS_MODULE, KBUILD_MODNAME); 119 __xenbus_register_backend(drv, THIS_MODULE, KBUILD_MODNAME)
120 120
121void xenbus_unregister_driver(struct xenbus_driver *drv); 121void xenbus_unregister_driver(struct xenbus_driver *drv);
122 122
diff --git a/kernel/cpuset.c b/kernel/cpuset.c
index 1d1fe9361d29..fc7f4748d34a 100644
--- a/kernel/cpuset.c
+++ b/kernel/cpuset.c
@@ -548,9 +548,6 @@ static void update_domain_attr_tree(struct sched_domain_attr *dattr,
548 548
549 rcu_read_lock(); 549 rcu_read_lock();
550 cpuset_for_each_descendant_pre(cp, pos_css, root_cs) { 550 cpuset_for_each_descendant_pre(cp, pos_css, root_cs) {
551 if (cp == root_cs)
552 continue;
553
554 /* skip the whole subtree if @cp doesn't have any CPU */ 551 /* skip the whole subtree if @cp doesn't have any CPU */
555 if (cpumask_empty(cp->cpus_allowed)) { 552 if (cpumask_empty(cp->cpus_allowed)) {
556 pos_css = css_rightmost_descendant(pos_css); 553 pos_css = css_rightmost_descendant(pos_css);
@@ -873,7 +870,7 @@ static void update_cpumasks_hier(struct cpuset *cs, struct cpumask *new_cpus)
873 * If it becomes empty, inherit the effective mask of the 870 * If it becomes empty, inherit the effective mask of the
874 * parent, which is guaranteed to have some CPUs. 871 * parent, which is guaranteed to have some CPUs.
875 */ 872 */
876 if (cpumask_empty(new_cpus)) 873 if (cgroup_on_dfl(cp->css.cgroup) && cpumask_empty(new_cpus))
877 cpumask_copy(new_cpus, parent->effective_cpus); 874 cpumask_copy(new_cpus, parent->effective_cpus);
878 875
879 /* Skip the whole subtree if the cpumask remains the same. */ 876 /* Skip the whole subtree if the cpumask remains the same. */
@@ -1129,7 +1126,7 @@ static void update_nodemasks_hier(struct cpuset *cs, nodemask_t *new_mems)
1129 * If it becomes empty, inherit the effective mask of the 1126 * If it becomes empty, inherit the effective mask of the
1130 * parent, which is guaranteed to have some MEMs. 1127 * parent, which is guaranteed to have some MEMs.
1131 */ 1128 */
1132 if (nodes_empty(*new_mems)) 1129 if (cgroup_on_dfl(cp->css.cgroup) && nodes_empty(*new_mems))
1133 *new_mems = parent->effective_mems; 1130 *new_mems = parent->effective_mems;
1134 1131
1135 /* Skip the whole subtree if the nodemask remains the same. */ 1132 /* Skip the whole subtree if the nodemask remains the same. */
@@ -1979,7 +1976,9 @@ static int cpuset_css_online(struct cgroup_subsys_state *css)
1979 1976
1980 spin_lock_irq(&callback_lock); 1977 spin_lock_irq(&callback_lock);
1981 cs->mems_allowed = parent->mems_allowed; 1978 cs->mems_allowed = parent->mems_allowed;
1979 cs->effective_mems = parent->mems_allowed;
1982 cpumask_copy(cs->cpus_allowed, parent->cpus_allowed); 1980 cpumask_copy(cs->cpus_allowed, parent->cpus_allowed);
1981 cpumask_copy(cs->effective_cpus, parent->cpus_allowed);
1983 spin_unlock_irq(&callback_lock); 1982 spin_unlock_irq(&callback_lock);
1984out_unlock: 1983out_unlock:
1985 mutex_unlock(&cpuset_mutex); 1984 mutex_unlock(&cpuset_mutex);
diff --git a/kernel/debug/debug_core.c b/kernel/debug/debug_core.c
index 07ce18ca71e0..0874e2edd275 100644
--- a/kernel/debug/debug_core.c
+++ b/kernel/debug/debug_core.c
@@ -604,7 +604,7 @@ return_normal:
604 online_cpus) 604 online_cpus)
605 cpu_relax(); 605 cpu_relax();
606 if (!time_left) 606 if (!time_left)
607 pr_crit("KGDB: Timed out waiting for secondary CPUs.\n"); 607 pr_crit("Timed out waiting for secondary CPUs.\n");
608 608
609 /* 609 /*
610 * At this point the primary processor is completely 610 * At this point the primary processor is completely
@@ -696,6 +696,14 @@ kgdb_handle_exception(int evector, int signo, int ecode, struct pt_regs *regs)
696 696
697 if (arch_kgdb_ops.enable_nmi) 697 if (arch_kgdb_ops.enable_nmi)
698 arch_kgdb_ops.enable_nmi(0); 698 arch_kgdb_ops.enable_nmi(0);
699 /*
700 * Avoid entering the debugger if we were triggered due to an oops
701 * but panic_timeout indicates the system should automatically
702 * reboot on panic. We don't want to get stuck waiting for input
703 * on such systems, especially if its "just" an oops.
704 */
705 if (signo != SIGTRAP && panic_timeout)
706 return 1;
699 707
700 memset(ks, 0, sizeof(struct kgdb_state)); 708 memset(ks, 0, sizeof(struct kgdb_state));
701 ks->cpu = raw_smp_processor_id(); 709 ks->cpu = raw_smp_processor_id();
@@ -828,6 +836,15 @@ static int kgdb_panic_event(struct notifier_block *self,
828 unsigned long val, 836 unsigned long val,
829 void *data) 837 void *data)
830{ 838{
839 /*
840 * Avoid entering the debugger if we were triggered due to a panic
841 * We don't want to get stuck waiting for input from user in such case.
842 * panic_timeout indicates the system should automatically
843 * reboot on panic.
844 */
845 if (panic_timeout)
846 return NOTIFY_DONE;
847
831 if (dbg_kdb_mode) 848 if (dbg_kdb_mode)
832 kdb_printf("PANIC: %s\n", (char *)data); 849 kdb_printf("PANIC: %s\n", (char *)data);
833 kgdb_breakpoint(); 850 kgdb_breakpoint();
diff --git a/kernel/debug/kdb/kdb_io.c b/kernel/debug/kdb/kdb_io.c
index 7c70812caea5..fc1ef736253c 100644
--- a/kernel/debug/kdb/kdb_io.c
+++ b/kernel/debug/kdb/kdb_io.c
@@ -439,7 +439,7 @@ poll_again:
439 * substituted for %d, %x or %o in the prompt. 439 * substituted for %d, %x or %o in the prompt.
440 */ 440 */
441 441
442char *kdb_getstr(char *buffer, size_t bufsize, char *prompt) 442char *kdb_getstr(char *buffer, size_t bufsize, const char *prompt)
443{ 443{
444 if (prompt && kdb_prompt_str != prompt) 444 if (prompt && kdb_prompt_str != prompt)
445 strncpy(kdb_prompt_str, prompt, CMD_BUFLEN); 445 strncpy(kdb_prompt_str, prompt, CMD_BUFLEN);
@@ -548,7 +548,7 @@ static int kdb_search_string(char *searched, char *searchfor)
548 return 0; 548 return 0;
549} 549}
550 550
551int vkdb_printf(const char *fmt, va_list ap) 551int vkdb_printf(enum kdb_msgsrc src, const char *fmt, va_list ap)
552{ 552{
553 int diag; 553 int diag;
554 int linecount; 554 int linecount;
@@ -680,6 +680,12 @@ int vkdb_printf(const char *fmt, va_list ap)
680 size_avail = sizeof(kdb_buffer) - len; 680 size_avail = sizeof(kdb_buffer) - len;
681 goto kdb_print_out; 681 goto kdb_print_out;
682 } 682 }
683 if (kdb_grepping_flag >= KDB_GREPPING_FLAG_SEARCH)
684 /*
685 * This was a interactive search (using '/' at more
686 * prompt) and it has completed. Clear the flag.
687 */
688 kdb_grepping_flag = 0;
683 /* 689 /*
684 * at this point the string is a full line and 690 * at this point the string is a full line and
685 * should be printed, up to the null. 691 * should be printed, up to the null.
@@ -691,19 +697,20 @@ kdb_printit:
691 * Write to all consoles. 697 * Write to all consoles.
692 */ 698 */
693 retlen = strlen(kdb_buffer); 699 retlen = strlen(kdb_buffer);
700 cp = (char *) printk_skip_level(kdb_buffer);
694 if (!dbg_kdb_mode && kgdb_connected) { 701 if (!dbg_kdb_mode && kgdb_connected) {
695 gdbstub_msg_write(kdb_buffer, retlen); 702 gdbstub_msg_write(cp, retlen - (cp - kdb_buffer));
696 } else { 703 } else {
697 if (dbg_io_ops && !dbg_io_ops->is_console) { 704 if (dbg_io_ops && !dbg_io_ops->is_console) {
698 len = retlen; 705 len = retlen - (cp - kdb_buffer);
699 cp = kdb_buffer; 706 cp2 = cp;
700 while (len--) { 707 while (len--) {
701 dbg_io_ops->write_char(*cp); 708 dbg_io_ops->write_char(*cp2);
702 cp++; 709 cp2++;
703 } 710 }
704 } 711 }
705 while (c) { 712 while (c) {
706 c->write(c, kdb_buffer, retlen); 713 c->write(c, cp, retlen - (cp - kdb_buffer));
707 touch_nmi_watchdog(); 714 touch_nmi_watchdog();
708 c = c->next; 715 c = c->next;
709 } 716 }
@@ -711,7 +718,10 @@ kdb_printit:
711 if (logging) { 718 if (logging) {
712 saved_loglevel = console_loglevel; 719 saved_loglevel = console_loglevel;
713 console_loglevel = CONSOLE_LOGLEVEL_SILENT; 720 console_loglevel = CONSOLE_LOGLEVEL_SILENT;
714 printk(KERN_INFO "%s", kdb_buffer); 721 if (printk_get_level(kdb_buffer) || src == KDB_MSGSRC_PRINTK)
722 printk("%s", kdb_buffer);
723 else
724 pr_info("%s", kdb_buffer);
715 } 725 }
716 726
717 if (KDB_STATE(PAGER)) { 727 if (KDB_STATE(PAGER)) {
@@ -794,11 +804,23 @@ kdb_printit:
794 kdb_nextline = linecount - 1; 804 kdb_nextline = linecount - 1;
795 kdb_printf("\r"); 805 kdb_printf("\r");
796 suspend_grep = 1; /* for this recursion */ 806 suspend_grep = 1; /* for this recursion */
807 } else if (buf1[0] == '/' && !kdb_grepping_flag) {
808 kdb_printf("\r");
809 kdb_getstr(kdb_grep_string, KDB_GREP_STRLEN,
810 kdbgetenv("SEARCHPROMPT") ?: "search> ");
811 *strchrnul(kdb_grep_string, '\n') = '\0';
812 kdb_grepping_flag += KDB_GREPPING_FLAG_SEARCH;
813 suspend_grep = 1; /* for this recursion */
797 } else if (buf1[0] && buf1[0] != '\n') { 814 } else if (buf1[0] && buf1[0] != '\n') {
798 /* user hit something other than enter */ 815 /* user hit something other than enter */
799 suspend_grep = 1; /* for this recursion */ 816 suspend_grep = 1; /* for this recursion */
800 kdb_printf("\nOnly 'q' or 'Q' are processed at more " 817 if (buf1[0] != '/')
801 "prompt, input ignored\n"); 818 kdb_printf(
819 "\nOnly 'q', 'Q' or '/' are processed at "
820 "more prompt, input ignored\n");
821 else
822 kdb_printf("\n'/' cannot be used during | "
823 "grep filtering, input ignored\n");
802 } else if (kdb_grepping_flag) { 824 } else if (kdb_grepping_flag) {
803 /* user hit enter */ 825 /* user hit enter */
804 suspend_grep = 1; /* for this recursion */ 826 suspend_grep = 1; /* for this recursion */
@@ -844,7 +866,7 @@ int kdb_printf(const char *fmt, ...)
844 int r; 866 int r;
845 867
846 va_start(ap, fmt); 868 va_start(ap, fmt);
847 r = vkdb_printf(fmt, ap); 869 r = vkdb_printf(KDB_MSGSRC_INTERNAL, fmt, ap);
848 va_end(ap); 870 va_end(ap);
849 871
850 return r; 872 return r;
diff --git a/kernel/debug/kdb/kdb_main.c b/kernel/debug/kdb/kdb_main.c
index 7b40c5f07dce..4121345498e0 100644
--- a/kernel/debug/kdb/kdb_main.c
+++ b/kernel/debug/kdb/kdb_main.c
@@ -50,8 +50,7 @@
50static int kdb_cmd_enabled = CONFIG_KDB_DEFAULT_ENABLE; 50static int kdb_cmd_enabled = CONFIG_KDB_DEFAULT_ENABLE;
51module_param_named(cmd_enable, kdb_cmd_enabled, int, 0600); 51module_param_named(cmd_enable, kdb_cmd_enabled, int, 0600);
52 52
53#define GREP_LEN 256 53char kdb_grep_string[KDB_GREP_STRLEN];
54char kdb_grep_string[GREP_LEN];
55int kdb_grepping_flag; 54int kdb_grepping_flag;
56EXPORT_SYMBOL(kdb_grepping_flag); 55EXPORT_SYMBOL(kdb_grepping_flag);
57int kdb_grep_leading; 56int kdb_grep_leading;
@@ -870,7 +869,7 @@ static void parse_grep(const char *str)
870 len = strlen(cp); 869 len = strlen(cp);
871 if (!len) 870 if (!len)
872 return; 871 return;
873 if (len >= GREP_LEN) { 872 if (len >= KDB_GREP_STRLEN) {
874 kdb_printf("search string too long\n"); 873 kdb_printf("search string too long\n");
875 return; 874 return;
876 } 875 }
@@ -915,13 +914,12 @@ int kdb_parse(const char *cmdstr)
915 char *cp; 914 char *cp;
916 char *cpp, quoted; 915 char *cpp, quoted;
917 kdbtab_t *tp; 916 kdbtab_t *tp;
918 int i, escaped, ignore_errors = 0, check_grep; 917 int i, escaped, ignore_errors = 0, check_grep = 0;
919 918
920 /* 919 /*
921 * First tokenize the command string. 920 * First tokenize the command string.
922 */ 921 */
923 cp = (char *)cmdstr; 922 cp = (char *)cmdstr;
924 kdb_grepping_flag = check_grep = 0;
925 923
926 if (KDB_FLAG(CMD_INTERRUPT)) { 924 if (KDB_FLAG(CMD_INTERRUPT)) {
927 /* Previous command was interrupted, newline must not 925 /* Previous command was interrupted, newline must not
@@ -1247,7 +1245,6 @@ static int kdb_local(kdb_reason_t reason, int error, struct pt_regs *regs,
1247 kdb_printf("due to NonMaskable Interrupt @ " 1245 kdb_printf("due to NonMaskable Interrupt @ "
1248 kdb_machreg_fmt "\n", 1246 kdb_machreg_fmt "\n",
1249 instruction_pointer(regs)); 1247 instruction_pointer(regs));
1250 kdb_dumpregs(regs);
1251 break; 1248 break;
1252 case KDB_REASON_SSTEP: 1249 case KDB_REASON_SSTEP:
1253 case KDB_REASON_BREAK: 1250 case KDB_REASON_BREAK:
@@ -1281,6 +1278,9 @@ static int kdb_local(kdb_reason_t reason, int error, struct pt_regs *regs,
1281 */ 1278 */
1282 kdb_nextline = 1; 1279 kdb_nextline = 1;
1283 KDB_STATE_CLEAR(SUPPRESS); 1280 KDB_STATE_CLEAR(SUPPRESS);
1281 kdb_grepping_flag = 0;
1282 /* ensure the old search does not leak into '/' commands */
1283 kdb_grep_string[0] = '\0';
1284 1284
1285 cmdbuf = cmd_cur; 1285 cmdbuf = cmd_cur;
1286 *cmdbuf = '\0'; 1286 *cmdbuf = '\0';
@@ -2256,7 +2256,7 @@ static int kdb_cpu(int argc, const char **argv)
2256 /* 2256 /*
2257 * Validate cpunum 2257 * Validate cpunum
2258 */ 2258 */
2259 if ((cpunum > NR_CPUS) || !kgdb_info[cpunum].enter_kgdb) 2259 if ((cpunum >= CONFIG_NR_CPUS) || !kgdb_info[cpunum].enter_kgdb)
2260 return KDB_BADCPUNUM; 2260 return KDB_BADCPUNUM;
2261 2261
2262 dbg_switch_cpu = cpunum; 2262 dbg_switch_cpu = cpunum;
@@ -2583,7 +2583,7 @@ static int kdb_summary(int argc, const char **argv)
2583#define K(x) ((x) << (PAGE_SHIFT - 10)) 2583#define K(x) ((x) << (PAGE_SHIFT - 10))
2584 kdb_printf("\nMemTotal: %8lu kB\nMemFree: %8lu kB\n" 2584 kdb_printf("\nMemTotal: %8lu kB\nMemFree: %8lu kB\n"
2585 "Buffers: %8lu kB\n", 2585 "Buffers: %8lu kB\n",
2586 val.totalram, val.freeram, val.bufferram); 2586 K(val.totalram), K(val.freeram), K(val.bufferram));
2587 return 0; 2587 return 0;
2588} 2588}
2589 2589
diff --git a/kernel/debug/kdb/kdb_private.h b/kernel/debug/kdb/kdb_private.h
index eaacd1693954..75014d7f4568 100644
--- a/kernel/debug/kdb/kdb_private.h
+++ b/kernel/debug/kdb/kdb_private.h
@@ -196,7 +196,9 @@ extern int kdb_main_loop(kdb_reason_t, kdb_reason_t,
196 196
197/* Miscellaneous functions and data areas */ 197/* Miscellaneous functions and data areas */
198extern int kdb_grepping_flag; 198extern int kdb_grepping_flag;
199#define KDB_GREPPING_FLAG_SEARCH 0x8000
199extern char kdb_grep_string[]; 200extern char kdb_grep_string[];
201#define KDB_GREP_STRLEN 256
200extern int kdb_grep_leading; 202extern int kdb_grep_leading;
201extern int kdb_grep_trailing; 203extern int kdb_grep_trailing;
202extern char *kdb_cmds[]; 204extern char *kdb_cmds[];
@@ -209,7 +211,7 @@ extern void kdb_ps1(const struct task_struct *p);
209extern void kdb_print_nameval(const char *name, unsigned long val); 211extern void kdb_print_nameval(const char *name, unsigned long val);
210extern void kdb_send_sig_info(struct task_struct *p, struct siginfo *info); 212extern void kdb_send_sig_info(struct task_struct *p, struct siginfo *info);
211extern void kdb_meminfo_proc_show(void); 213extern void kdb_meminfo_proc_show(void);
212extern char *kdb_getstr(char *, size_t, char *); 214extern char *kdb_getstr(char *, size_t, const char *);
213extern void kdb_gdb_state_pass(char *buf); 215extern void kdb_gdb_state_pass(char *buf);
214 216
215/* Defines for kdb_symbol_print */ 217/* Defines for kdb_symbol_print */
diff --git a/kernel/events/core.c b/kernel/events/core.c
index f04daabfd1cf..453ef61311d4 100644
--- a/kernel/events/core.c
+++ b/kernel/events/core.c
@@ -3591,7 +3591,7 @@ static void put_event(struct perf_event *event)
3591 ctx = perf_event_ctx_lock_nested(event, SINGLE_DEPTH_NESTING); 3591 ctx = perf_event_ctx_lock_nested(event, SINGLE_DEPTH_NESTING);
3592 WARN_ON_ONCE(ctx->parent_ctx); 3592 WARN_ON_ONCE(ctx->parent_ctx);
3593 perf_remove_from_context(event, true); 3593 perf_remove_from_context(event, true);
3594 mutex_unlock(&ctx->mutex); 3594 perf_event_ctx_unlock(event, ctx);
3595 3595
3596 _free_event(event); 3596 _free_event(event);
3597} 3597}
diff --git a/kernel/irq/manage.c b/kernel/irq/manage.c
index 196a06fbc122..886d09e691d5 100644
--- a/kernel/irq/manage.c
+++ b/kernel/irq/manage.c
@@ -1474,8 +1474,13 @@ int request_threaded_irq(unsigned int irq, irq_handler_t handler,
1474 * otherwise we'll have trouble later trying to figure out 1474 * otherwise we'll have trouble later trying to figure out
1475 * which interrupt is which (messes up the interrupt freeing 1475 * which interrupt is which (messes up the interrupt freeing
1476 * logic etc). 1476 * logic etc).
1477 *
1478 * Also IRQF_COND_SUSPEND only makes sense for shared interrupts and
1479 * it cannot be set along with IRQF_NO_SUSPEND.
1477 */ 1480 */
1478 if ((irqflags & IRQF_SHARED) && !dev_id) 1481 if (((irqflags & IRQF_SHARED) && !dev_id) ||
1482 (!(irqflags & IRQF_SHARED) && (irqflags & IRQF_COND_SUSPEND)) ||
1483 ((irqflags & IRQF_NO_SUSPEND) && (irqflags & IRQF_COND_SUSPEND)))
1479 return -EINVAL; 1484 return -EINVAL;
1480 1485
1481 desc = irq_to_desc(irq); 1486 desc = irq_to_desc(irq);
diff --git a/kernel/irq/pm.c b/kernel/irq/pm.c
index 3ca532592704..5204a6d1b985 100644
--- a/kernel/irq/pm.c
+++ b/kernel/irq/pm.c
@@ -43,9 +43,12 @@ void irq_pm_install_action(struct irq_desc *desc, struct irqaction *action)
43 43
44 if (action->flags & IRQF_NO_SUSPEND) 44 if (action->flags & IRQF_NO_SUSPEND)
45 desc->no_suspend_depth++; 45 desc->no_suspend_depth++;
46 else if (action->flags & IRQF_COND_SUSPEND)
47 desc->cond_suspend_depth++;
46 48
47 WARN_ON_ONCE(desc->no_suspend_depth && 49 WARN_ON_ONCE(desc->no_suspend_depth &&
48 desc->no_suspend_depth != desc->nr_actions); 50 (desc->no_suspend_depth +
51 desc->cond_suspend_depth) != desc->nr_actions);
49} 52}
50 53
51/* 54/*
@@ -61,6 +64,8 @@ void irq_pm_remove_action(struct irq_desc *desc, struct irqaction *action)
61 64
62 if (action->flags & IRQF_NO_SUSPEND) 65 if (action->flags & IRQF_NO_SUSPEND)
63 desc->no_suspend_depth--; 66 desc->no_suspend_depth--;
67 else if (action->flags & IRQF_COND_SUSPEND)
68 desc->cond_suspend_depth--;
64} 69}
65 70
66static bool suspend_device_irq(struct irq_desc *desc, int irq) 71static bool suspend_device_irq(struct irq_desc *desc, int irq)
diff --git a/kernel/livepatch/core.c b/kernel/livepatch/core.c
index ff7f47d026ac..3f9f1d6b4c2e 100644
--- a/kernel/livepatch/core.c
+++ b/kernel/livepatch/core.c
@@ -89,16 +89,28 @@ static bool klp_is_object_loaded(struct klp_object *obj)
89/* sets obj->mod if object is not vmlinux and module is found */ 89/* sets obj->mod if object is not vmlinux and module is found */
90static void klp_find_object_module(struct klp_object *obj) 90static void klp_find_object_module(struct klp_object *obj)
91{ 91{
92 struct module *mod;
93
92 if (!klp_is_module(obj)) 94 if (!klp_is_module(obj))
93 return; 95 return;
94 96
95 mutex_lock(&module_mutex); 97 mutex_lock(&module_mutex);
96 /* 98 /*
97 * We don't need to take a reference on the module here because we have 99 * We do not want to block removal of patched modules and therefore
98 * the klp_mutex, which is also taken by the module notifier. This 100 * we do not take a reference here. The patches are removed by
99 * prevents any module from unloading until we release the klp_mutex. 101 * a going module handler instead.
102 */
103 mod = find_module(obj->name);
104 /*
105 * Do not mess work of the module coming and going notifiers.
106 * Note that the patch might still be needed before the going handler
107 * is called. Module functions can be called even in the GOING state
108 * until mod->exit() finishes. This is especially important for
109 * patches that modify semantic of the functions.
100 */ 110 */
101 obj->mod = find_module(obj->name); 111 if (mod && mod->klp_alive)
112 obj->mod = mod;
113
102 mutex_unlock(&module_mutex); 114 mutex_unlock(&module_mutex);
103} 115}
104 116
@@ -248,11 +260,12 @@ static int klp_find_external_symbol(struct module *pmod, const char *name,
248 /* first, check if it's an exported symbol */ 260 /* first, check if it's an exported symbol */
249 preempt_disable(); 261 preempt_disable();
250 sym = find_symbol(name, NULL, NULL, true, true); 262 sym = find_symbol(name, NULL, NULL, true, true);
251 preempt_enable();
252 if (sym) { 263 if (sym) {
253 *addr = sym->value; 264 *addr = sym->value;
265 preempt_enable();
254 return 0; 266 return 0;
255 } 267 }
268 preempt_enable();
256 269
257 /* otherwise check if it's in another .o within the patch module */ 270 /* otherwise check if it's in another .o within the patch module */
258 return klp_find_object_symbol(pmod->name, name, addr); 271 return klp_find_object_symbol(pmod->name, name, addr);
@@ -314,12 +327,12 @@ static void notrace klp_ftrace_handler(unsigned long ip,
314 rcu_read_lock(); 327 rcu_read_lock();
315 func = list_first_or_null_rcu(&ops->func_stack, struct klp_func, 328 func = list_first_or_null_rcu(&ops->func_stack, struct klp_func,
316 stack_node); 329 stack_node);
317 rcu_read_unlock();
318
319 if (WARN_ON_ONCE(!func)) 330 if (WARN_ON_ONCE(!func))
320 return; 331 goto unlock;
321 332
322 klp_arch_set_pc(regs, (unsigned long)func->new_func); 333 klp_arch_set_pc(regs, (unsigned long)func->new_func);
334unlock:
335 rcu_read_unlock();
323} 336}
324 337
325static int klp_disable_func(struct klp_func *func) 338static int klp_disable_func(struct klp_func *func)
@@ -731,7 +744,7 @@ static int klp_init_func(struct klp_object *obj, struct klp_func *func)
731 func->state = KLP_DISABLED; 744 func->state = KLP_DISABLED;
732 745
733 return kobject_init_and_add(&func->kobj, &klp_ktype_func, 746 return kobject_init_and_add(&func->kobj, &klp_ktype_func,
734 obj->kobj, func->old_name); 747 obj->kobj, "%s", func->old_name);
735} 748}
736 749
737/* parts of the initialization that is done only when the object is loaded */ 750/* parts of the initialization that is done only when the object is loaded */
@@ -766,6 +779,7 @@ static int klp_init_object(struct klp_patch *patch, struct klp_object *obj)
766 return -EINVAL; 779 return -EINVAL;
767 780
768 obj->state = KLP_DISABLED; 781 obj->state = KLP_DISABLED;
782 obj->mod = NULL;
769 783
770 klp_find_object_module(obj); 784 klp_find_object_module(obj);
771 785
@@ -807,7 +821,7 @@ static int klp_init_patch(struct klp_patch *patch)
807 patch->state = KLP_DISABLED; 821 patch->state = KLP_DISABLED;
808 822
809 ret = kobject_init_and_add(&patch->kobj, &klp_ktype_patch, 823 ret = kobject_init_and_add(&patch->kobj, &klp_ktype_patch,
810 klp_root_kobj, patch->mod->name); 824 klp_root_kobj, "%s", patch->mod->name);
811 if (ret) 825 if (ret)
812 goto unlock; 826 goto unlock;
813 827
@@ -960,6 +974,15 @@ static int klp_module_notify(struct notifier_block *nb, unsigned long action,
960 974
961 mutex_lock(&klp_mutex); 975 mutex_lock(&klp_mutex);
962 976
977 /*
978 * Each module has to know that the notifier has been called.
979 * We never know what module will get patched by a new patch.
980 */
981 if (action == MODULE_STATE_COMING)
982 mod->klp_alive = true;
983 else /* MODULE_STATE_GOING */
984 mod->klp_alive = false;
985
963 list_for_each_entry(patch, &klp_patches, list) { 986 list_for_each_entry(patch, &klp_patches, list) {
964 for (obj = patch->objs; obj->funcs; obj++) { 987 for (obj = patch->objs; obj->funcs; obj++) {
965 if (!klp_is_module(obj) || strcmp(obj->name, mod->name)) 988 if (!klp_is_module(obj) || strcmp(obj->name, mod->name))
diff --git a/kernel/locking/rtmutex.c b/kernel/locking/rtmutex.c
index 3059bc2f022d..6357265a31ad 100644
--- a/kernel/locking/rtmutex.c
+++ b/kernel/locking/rtmutex.c
@@ -1193,7 +1193,9 @@ rt_mutex_slowlock(struct rt_mutex *lock, int state,
1193 ret = __rt_mutex_slowlock(lock, state, timeout, &waiter); 1193 ret = __rt_mutex_slowlock(lock, state, timeout, &waiter);
1194 1194
1195 if (unlikely(ret)) { 1195 if (unlikely(ret)) {
1196 remove_waiter(lock, &waiter); 1196 __set_current_state(TASK_RUNNING);
1197 if (rt_mutex_has_waiters(lock))
1198 remove_waiter(lock, &waiter);
1197 rt_mutex_handle_deadlock(ret, chwalk, &waiter); 1199 rt_mutex_handle_deadlock(ret, chwalk, &waiter);
1198 } 1200 }
1199 1201
diff --git a/kernel/module.c b/kernel/module.c
index b34813f725e9..b3d634ed06c9 100644
--- a/kernel/module.c
+++ b/kernel/module.c
@@ -56,7 +56,6 @@
56#include <linux/async.h> 56#include <linux/async.h>
57#include <linux/percpu.h> 57#include <linux/percpu.h>
58#include <linux/kmemleak.h> 58#include <linux/kmemleak.h>
59#include <linux/kasan.h>
60#include <linux/jump_label.h> 59#include <linux/jump_label.h>
61#include <linux/pfn.h> 60#include <linux/pfn.h>
62#include <linux/bsearch.h> 61#include <linux/bsearch.h>
@@ -1814,7 +1813,6 @@ static void unset_module_init_ro_nx(struct module *mod) { }
1814void __weak module_memfree(void *module_region) 1813void __weak module_memfree(void *module_region)
1815{ 1814{
1816 vfree(module_region); 1815 vfree(module_region);
1817 kasan_module_free(module_region);
1818} 1816}
1819 1817
1820void __weak module_arch_cleanup(struct module *mod) 1818void __weak module_arch_cleanup(struct module *mod)
@@ -2313,11 +2311,13 @@ static void layout_symtab(struct module *mod, struct load_info *info)
2313 info->symoffs = ALIGN(mod->core_size, symsect->sh_addralign ?: 1); 2311 info->symoffs = ALIGN(mod->core_size, symsect->sh_addralign ?: 1);
2314 info->stroffs = mod->core_size = info->symoffs + ndst * sizeof(Elf_Sym); 2312 info->stroffs = mod->core_size = info->symoffs + ndst * sizeof(Elf_Sym);
2315 mod->core_size += strtab_size; 2313 mod->core_size += strtab_size;
2314 mod->core_size = debug_align(mod->core_size);
2316 2315
2317 /* Put string table section at end of init part of module. */ 2316 /* Put string table section at end of init part of module. */
2318 strsect->sh_flags |= SHF_ALLOC; 2317 strsect->sh_flags |= SHF_ALLOC;
2319 strsect->sh_entsize = get_offset(mod, &mod->init_size, strsect, 2318 strsect->sh_entsize = get_offset(mod, &mod->init_size, strsect,
2320 info->index.str) | INIT_OFFSET_MASK; 2319 info->index.str) | INIT_OFFSET_MASK;
2320 mod->init_size = debug_align(mod->init_size);
2321 pr_debug("\t%s\n", info->secstrings + strsect->sh_name); 2321 pr_debug("\t%s\n", info->secstrings + strsect->sh_name);
2322} 2322}
2323 2323
diff --git a/kernel/printk/console_cmdline.h b/kernel/printk/console_cmdline.h
index cbd69d842341..2ca4a8b5fe57 100644
--- a/kernel/printk/console_cmdline.h
+++ b/kernel/printk/console_cmdline.h
@@ -3,7 +3,7 @@
3 3
4struct console_cmdline 4struct console_cmdline
5{ 5{
6 char name[8]; /* Name of the driver */ 6 char name[16]; /* Name of the driver */
7 int index; /* Minor dev. to use */ 7 int index; /* Minor dev. to use */
8 char *options; /* Options for the driver */ 8 char *options; /* Options for the driver */
9#ifdef CONFIG_A11Y_BRAILLE_CONSOLE 9#ifdef CONFIG_A11Y_BRAILLE_CONSOLE
diff --git a/kernel/printk/printk.c b/kernel/printk/printk.c
index c06df7de0963..bb0635bd74f2 100644
--- a/kernel/printk/printk.c
+++ b/kernel/printk/printk.c
@@ -1811,7 +1811,7 @@ int vprintk_default(const char *fmt, va_list args)
1811 1811
1812#ifdef CONFIG_KGDB_KDB 1812#ifdef CONFIG_KGDB_KDB
1813 if (unlikely(kdb_trap_printk)) { 1813 if (unlikely(kdb_trap_printk)) {
1814 r = vkdb_printf(fmt, args); 1814 r = vkdb_printf(KDB_MSGSRC_PRINTK, fmt, args);
1815 return r; 1815 return r;
1816 } 1816 }
1817#endif 1817#endif
@@ -2464,6 +2464,7 @@ void register_console(struct console *newcon)
2464 for (i = 0, c = console_cmdline; 2464 for (i = 0, c = console_cmdline;
2465 i < MAX_CMDLINECONSOLES && c->name[0]; 2465 i < MAX_CMDLINECONSOLES && c->name[0];
2466 i++, c++) { 2466 i++, c++) {
2467 BUILD_BUG_ON(sizeof(c->name) != sizeof(newcon->name));
2467 if (strcmp(c->name, newcon->name) != 0) 2468 if (strcmp(c->name, newcon->name) != 0)
2468 continue; 2469 continue;
2469 if (newcon->index >= 0 && 2470 if (newcon->index >= 0 &&
diff --git a/kernel/rcu/tree_plugin.h b/kernel/rcu/tree_plugin.h
index 0d7bbe3095ad..0a571e9a0f1d 100644
--- a/kernel/rcu/tree_plugin.h
+++ b/kernel/rcu/tree_plugin.h
@@ -326,6 +326,7 @@ void rcu_read_unlock_special(struct task_struct *t)
326 special = t->rcu_read_unlock_special; 326 special = t->rcu_read_unlock_special;
327 if (special.b.need_qs) { 327 if (special.b.need_qs) {
328 rcu_preempt_qs(); 328 rcu_preempt_qs();
329 t->rcu_read_unlock_special.b.need_qs = false;
329 if (!t->rcu_read_unlock_special.s) { 330 if (!t->rcu_read_unlock_special.s) {
330 local_irq_restore(flags); 331 local_irq_restore(flags);
331 return; 332 return;
diff --git a/kernel/sched/auto_group.c b/kernel/sched/auto_group.c
index 8a2e230fb86a..eae160dd669d 100644
--- a/kernel/sched/auto_group.c
+++ b/kernel/sched/auto_group.c
@@ -87,8 +87,7 @@ static inline struct autogroup *autogroup_create(void)
87 * so we don't have to move tasks around upon policy change, 87 * so we don't have to move tasks around upon policy change,
88 * or flail around trying to allocate bandwidth on the fly. 88 * or flail around trying to allocate bandwidth on the fly.
89 * A bandwidth exception in __sched_setscheduler() allows 89 * A bandwidth exception in __sched_setscheduler() allows
90 * the policy change to proceed. Thereafter, task_group() 90 * the policy change to proceed.
91 * returns &root_task_group, so zero bandwidth is required.
92 */ 91 */
93 free_rt_sched_group(tg); 92 free_rt_sched_group(tg);
94 tg->rt_se = root_task_group.rt_se; 93 tg->rt_se = root_task_group.rt_se;
@@ -115,9 +114,6 @@ bool task_wants_autogroup(struct task_struct *p, struct task_group *tg)
115 if (tg != &root_task_group) 114 if (tg != &root_task_group)
116 return false; 115 return false;
117 116
118 if (p->sched_class != &fair_sched_class)
119 return false;
120
121 /* 117 /*
122 * We can only assume the task group can't go away on us if 118 * We can only assume the task group can't go away on us if
123 * autogroup_move_group() can see us on ->thread_group list. 119 * autogroup_move_group() can see us on ->thread_group list.
diff --git a/kernel/sched/completion.c b/kernel/sched/completion.c
index 7052d3fd4e7b..8d0f35debf35 100644
--- a/kernel/sched/completion.c
+++ b/kernel/sched/completion.c
@@ -274,7 +274,7 @@ bool try_wait_for_completion(struct completion *x)
274 * first without taking the lock so we can 274 * first without taking the lock so we can
275 * return early in the blocking case. 275 * return early in the blocking case.
276 */ 276 */
277 if (!ACCESS_ONCE(x->done)) 277 if (!READ_ONCE(x->done))
278 return 0; 278 return 0;
279 279
280 spin_lock_irqsave(&x->wait.lock, flags); 280 spin_lock_irqsave(&x->wait.lock, flags);
@@ -297,6 +297,21 @@ EXPORT_SYMBOL(try_wait_for_completion);
297 */ 297 */
298bool completion_done(struct completion *x) 298bool completion_done(struct completion *x)
299{ 299{
300 return !!ACCESS_ONCE(x->done); 300 if (!READ_ONCE(x->done))
301 return false;
302
303 /*
304 * If ->done, we need to wait for complete() to release ->wait.lock
305 * otherwise we can end up freeing the completion before complete()
306 * is done referencing it.
307 *
308 * The RMB pairs with complete()'s RELEASE of ->wait.lock and orders
309 * the loads of ->done and ->wait.lock such that we cannot observe
310 * the lock before complete() acquires it while observing the ->done
311 * after it's acquired the lock.
312 */
313 smp_rmb();
314 spin_unlock_wait(&x->wait.lock);
315 return true;
301} 316}
302EXPORT_SYMBOL(completion_done); 317EXPORT_SYMBOL(completion_done);
diff --git a/kernel/sched/core.c b/kernel/sched/core.c
index 13049aac05a6..f0f831e8a345 100644
--- a/kernel/sched/core.c
+++ b/kernel/sched/core.c
@@ -307,66 +307,6 @@ __read_mostly int scheduler_running;
307int sysctl_sched_rt_runtime = 950000; 307int sysctl_sched_rt_runtime = 950000;
308 308
309/* 309/*
310 * __task_rq_lock - lock the rq @p resides on.
311 */
312static inline struct rq *__task_rq_lock(struct task_struct *p)
313 __acquires(rq->lock)
314{
315 struct rq *rq;
316
317 lockdep_assert_held(&p->pi_lock);
318
319 for (;;) {
320 rq = task_rq(p);
321 raw_spin_lock(&rq->lock);
322 if (likely(rq == task_rq(p) && !task_on_rq_migrating(p)))
323 return rq;
324 raw_spin_unlock(&rq->lock);
325
326 while (unlikely(task_on_rq_migrating(p)))
327 cpu_relax();
328 }
329}
330
331/*
332 * task_rq_lock - lock p->pi_lock and lock the rq @p resides on.
333 */
334static struct rq *task_rq_lock(struct task_struct *p, unsigned long *flags)
335 __acquires(p->pi_lock)
336 __acquires(rq->lock)
337{
338 struct rq *rq;
339
340 for (;;) {
341 raw_spin_lock_irqsave(&p->pi_lock, *flags);
342 rq = task_rq(p);
343 raw_spin_lock(&rq->lock);
344 if (likely(rq == task_rq(p) && !task_on_rq_migrating(p)))
345 return rq;
346 raw_spin_unlock(&rq->lock);
347 raw_spin_unlock_irqrestore(&p->pi_lock, *flags);
348
349 while (unlikely(task_on_rq_migrating(p)))
350 cpu_relax();
351 }
352}
353
354static void __task_rq_unlock(struct rq *rq)
355 __releases(rq->lock)
356{
357 raw_spin_unlock(&rq->lock);
358}
359
360static inline void
361task_rq_unlock(struct rq *rq, struct task_struct *p, unsigned long *flags)
362 __releases(rq->lock)
363 __releases(p->pi_lock)
364{
365 raw_spin_unlock(&rq->lock);
366 raw_spin_unlock_irqrestore(&p->pi_lock, *flags);
367}
368
369/*
370 * this_rq_lock - lock this runqueue and disable interrupts. 310 * this_rq_lock - lock this runqueue and disable interrupts.
371 */ 311 */
372static struct rq *this_rq_lock(void) 312static struct rq *this_rq_lock(void)
@@ -2899,7 +2839,7 @@ void __sched schedule_preempt_disabled(void)
2899 preempt_disable(); 2839 preempt_disable();
2900} 2840}
2901 2841
2902static void preempt_schedule_common(void) 2842static void __sched notrace preempt_schedule_common(void)
2903{ 2843{
2904 do { 2844 do {
2905 __preempt_count_add(PREEMPT_ACTIVE); 2845 __preempt_count_add(PREEMPT_ACTIVE);
@@ -4418,36 +4358,29 @@ EXPORT_SYMBOL_GPL(yield_to);
4418 * This task is about to go to sleep on IO. Increment rq->nr_iowait so 4358 * This task is about to go to sleep on IO. Increment rq->nr_iowait so
4419 * that process accounting knows that this is a task in IO wait state. 4359 * that process accounting knows that this is a task in IO wait state.
4420 */ 4360 */
4421void __sched io_schedule(void)
4422{
4423 struct rq *rq = raw_rq();
4424
4425 delayacct_blkio_start();
4426 atomic_inc(&rq->nr_iowait);
4427 blk_flush_plug(current);
4428 current->in_iowait = 1;
4429 schedule();
4430 current->in_iowait = 0;
4431 atomic_dec(&rq->nr_iowait);
4432 delayacct_blkio_end();
4433}
4434EXPORT_SYMBOL(io_schedule);
4435
4436long __sched io_schedule_timeout(long timeout) 4361long __sched io_schedule_timeout(long timeout)
4437{ 4362{
4438 struct rq *rq = raw_rq(); 4363 int old_iowait = current->in_iowait;
4364 struct rq *rq;
4439 long ret; 4365 long ret;
4440 4366
4367 current->in_iowait = 1;
4368 if (old_iowait)
4369 blk_schedule_flush_plug(current);
4370 else
4371 blk_flush_plug(current);
4372
4441 delayacct_blkio_start(); 4373 delayacct_blkio_start();
4374 rq = raw_rq();
4442 atomic_inc(&rq->nr_iowait); 4375 atomic_inc(&rq->nr_iowait);
4443 blk_flush_plug(current);
4444 current->in_iowait = 1;
4445 ret = schedule_timeout(timeout); 4376 ret = schedule_timeout(timeout);
4446 current->in_iowait = 0; 4377 current->in_iowait = old_iowait;
4447 atomic_dec(&rq->nr_iowait); 4378 atomic_dec(&rq->nr_iowait);
4448 delayacct_blkio_end(); 4379 delayacct_blkio_end();
4380
4449 return ret; 4381 return ret;
4450} 4382}
4383EXPORT_SYMBOL(io_schedule_timeout);
4451 4384
4452/** 4385/**
4453 * sys_sched_get_priority_max - return maximum RT priority. 4386 * sys_sched_get_priority_max - return maximum RT priority.
@@ -7642,6 +7575,12 @@ static inline int tg_has_rt_tasks(struct task_group *tg)
7642{ 7575{
7643 struct task_struct *g, *p; 7576 struct task_struct *g, *p;
7644 7577
7578 /*
7579 * Autogroups do not have RT tasks; see autogroup_create().
7580 */
7581 if (task_group_is_autogroup(tg))
7582 return 0;
7583
7645 for_each_process_thread(g, p) { 7584 for_each_process_thread(g, p) {
7646 if (rt_task(p) && task_group(p) == tg) 7585 if (rt_task(p) && task_group(p) == tg)
7647 return 1; 7586 return 1;
@@ -7734,6 +7673,17 @@ static int tg_set_rt_bandwidth(struct task_group *tg,
7734{ 7673{
7735 int i, err = 0; 7674 int i, err = 0;
7736 7675
7676 /*
7677 * Disallowing the root group RT runtime is BAD, it would disallow the
7678 * kernel creating (and or operating) RT threads.
7679 */
7680 if (tg == &root_task_group && rt_runtime == 0)
7681 return -EINVAL;
7682
7683 /* No period doesn't make any sense. */
7684 if (rt_period == 0)
7685 return -EINVAL;
7686
7737 mutex_lock(&rt_constraints_mutex); 7687 mutex_lock(&rt_constraints_mutex);
7738 read_lock(&tasklist_lock); 7688 read_lock(&tasklist_lock);
7739 err = __rt_schedulable(tg, rt_period, rt_runtime); 7689 err = __rt_schedulable(tg, rt_period, rt_runtime);
@@ -7790,9 +7740,6 @@ static int sched_group_set_rt_period(struct task_group *tg, long rt_period_us)
7790 rt_period = (u64)rt_period_us * NSEC_PER_USEC; 7740 rt_period = (u64)rt_period_us * NSEC_PER_USEC;
7791 rt_runtime = tg->rt_bandwidth.rt_runtime; 7741 rt_runtime = tg->rt_bandwidth.rt_runtime;
7792 7742
7793 if (rt_period == 0)
7794 return -EINVAL;
7795
7796 return tg_set_rt_bandwidth(tg, rt_period, rt_runtime); 7743 return tg_set_rt_bandwidth(tg, rt_period, rt_runtime);
7797} 7744}
7798 7745
diff --git a/kernel/sched/deadline.c b/kernel/sched/deadline.c
index a027799ae130..3fa8fa6d9403 100644
--- a/kernel/sched/deadline.c
+++ b/kernel/sched/deadline.c
@@ -511,16 +511,10 @@ static enum hrtimer_restart dl_task_timer(struct hrtimer *timer)
511 struct sched_dl_entity, 511 struct sched_dl_entity,
512 dl_timer); 512 dl_timer);
513 struct task_struct *p = dl_task_of(dl_se); 513 struct task_struct *p = dl_task_of(dl_se);
514 unsigned long flags;
514 struct rq *rq; 515 struct rq *rq;
515again:
516 rq = task_rq(p);
517 raw_spin_lock(&rq->lock);
518 516
519 if (rq != task_rq(p)) { 517 rq = task_rq_lock(current, &flags);
520 /* Task was moved, retrying. */
521 raw_spin_unlock(&rq->lock);
522 goto again;
523 }
524 518
525 /* 519 /*
526 * We need to take care of several possible races here: 520 * We need to take care of several possible races here:
@@ -541,6 +535,26 @@ again:
541 535
542 sched_clock_tick(); 536 sched_clock_tick();
543 update_rq_clock(rq); 537 update_rq_clock(rq);
538
539 /*
540 * If the throttle happened during sched-out; like:
541 *
542 * schedule()
543 * deactivate_task()
544 * dequeue_task_dl()
545 * update_curr_dl()
546 * start_dl_timer()
547 * __dequeue_task_dl()
548 * prev->on_rq = 0;
549 *
550 * We can be both throttled and !queued. Replenish the counter
551 * but do not enqueue -- wait for our wakeup to do that.
552 */
553 if (!task_on_rq_queued(p)) {
554 replenish_dl_entity(dl_se, dl_se);
555 goto unlock;
556 }
557
544 enqueue_task_dl(rq, p, ENQUEUE_REPLENISH); 558 enqueue_task_dl(rq, p, ENQUEUE_REPLENISH);
545 if (dl_task(rq->curr)) 559 if (dl_task(rq->curr))
546 check_preempt_curr_dl(rq, p, 0); 560 check_preempt_curr_dl(rq, p, 0);
@@ -555,7 +569,7 @@ again:
555 push_dl_task(rq); 569 push_dl_task(rq);
556#endif 570#endif
557unlock: 571unlock:
558 raw_spin_unlock(&rq->lock); 572 task_rq_unlock(rq, current, &flags);
559 573
560 return HRTIMER_NORESTART; 574 return HRTIMER_NORESTART;
561} 575}
@@ -898,6 +912,7 @@ static void yield_task_dl(struct rq *rq)
898 rq->curr->dl.dl_yielded = 1; 912 rq->curr->dl.dl_yielded = 1;
899 p->dl.runtime = 0; 913 p->dl.runtime = 0;
900 } 914 }
915 update_rq_clock(rq);
901 update_curr_dl(rq); 916 update_curr_dl(rq);
902} 917}
903 918
diff --git a/kernel/sched/idle.c b/kernel/sched/idle.c
index 94b2d7b88a27..80014a178342 100644
--- a/kernel/sched/idle.c
+++ b/kernel/sched/idle.c
@@ -82,6 +82,7 @@ static void cpuidle_idle_call(void)
82 struct cpuidle_driver *drv = cpuidle_get_cpu_driver(dev); 82 struct cpuidle_driver *drv = cpuidle_get_cpu_driver(dev);
83 int next_state, entered_state; 83 int next_state, entered_state;
84 unsigned int broadcast; 84 unsigned int broadcast;
85 bool reflect;
85 86
86 /* 87 /*
87 * Check if the idle task must be rescheduled. If it is the 88 * Check if the idle task must be rescheduled. If it is the
@@ -105,6 +106,9 @@ static void cpuidle_idle_call(void)
105 */ 106 */
106 rcu_idle_enter(); 107 rcu_idle_enter();
107 108
109 if (cpuidle_not_available(drv, dev))
110 goto use_default;
111
108 /* 112 /*
109 * Suspend-to-idle ("freeze") is a system state in which all user space 113 * Suspend-to-idle ("freeze") is a system state in which all user space
110 * has been frozen, all I/O devices have been suspended and the only 114 * has been frozen, all I/O devices have been suspended and the only
@@ -115,30 +119,24 @@ static void cpuidle_idle_call(void)
115 * until a proper wakeup interrupt happens. 119 * until a proper wakeup interrupt happens.
116 */ 120 */
117 if (idle_should_freeze()) { 121 if (idle_should_freeze()) {
118 cpuidle_enter_freeze(); 122 entered_state = cpuidle_enter_freeze(drv, dev);
119 local_irq_enable(); 123 if (entered_state >= 0) {
120 goto exit_idle; 124 local_irq_enable();
121 } 125 goto exit_idle;
126 }
122 127
123 /* 128 reflect = false;
124 * Ask the cpuidle framework to choose a convenient idle state. 129 next_state = cpuidle_find_deepest_state(drv, dev);
125 * Fall back to the default arch idle method on errors. 130 } else {
126 */ 131 reflect = true;
127 next_state = cpuidle_select(drv, dev);
128 if (next_state < 0) {
129use_default:
130 /* 132 /*
131 * We can't use the cpuidle framework, let's use the default 133 * Ask the cpuidle framework to choose a convenient idle state.
132 * idle routine.
133 */ 134 */
134 if (current_clr_polling_and_test()) 135 next_state = cpuidle_select(drv, dev);
135 local_irq_enable();
136 else
137 arch_cpu_idle();
138
139 goto exit_idle;
140 } 136 }
141 137 /* Fall back to the default arch idle method on errors. */
138 if (next_state < 0)
139 goto use_default;
142 140
143 /* 141 /*
144 * The idle task must be scheduled, it is pointless to 142 * The idle task must be scheduled, it is pointless to
@@ -183,7 +181,8 @@ use_default:
183 /* 181 /*
184 * Give the governor an opportunity to reflect on the outcome 182 * Give the governor an opportunity to reflect on the outcome
185 */ 183 */
186 cpuidle_reflect(dev, entered_state); 184 if (reflect)
185 cpuidle_reflect(dev, entered_state);
187 186
188exit_idle: 187exit_idle:
189 __current_set_polling(); 188 __current_set_polling();
@@ -196,6 +195,19 @@ exit_idle:
196 195
197 rcu_idle_exit(); 196 rcu_idle_exit();
198 start_critical_timings(); 197 start_critical_timings();
198 return;
199
200use_default:
201 /*
202 * We can't use the cpuidle framework, let's use the default
203 * idle routine.
204 */
205 if (current_clr_polling_and_test())
206 local_irq_enable();
207 else
208 arch_cpu_idle();
209
210 goto exit_idle;
199} 211}
200 212
201/* 213/*
diff --git a/kernel/sched/sched.h b/kernel/sched/sched.h
index 0870db23d79c..dc0f435a2779 100644
--- a/kernel/sched/sched.h
+++ b/kernel/sched/sched.h
@@ -1380,6 +1380,82 @@ static inline void sched_avg_update(struct rq *rq) { }
1380 1380
1381extern void start_bandwidth_timer(struct hrtimer *period_timer, ktime_t period); 1381extern void start_bandwidth_timer(struct hrtimer *period_timer, ktime_t period);
1382 1382
1383/*
1384 * __task_rq_lock - lock the rq @p resides on.
1385 */
1386static inline struct rq *__task_rq_lock(struct task_struct *p)
1387 __acquires(rq->lock)
1388{
1389 struct rq *rq;
1390
1391 lockdep_assert_held(&p->pi_lock);
1392
1393 for (;;) {
1394 rq = task_rq(p);
1395 raw_spin_lock(&rq->lock);
1396 if (likely(rq == task_rq(p) && !task_on_rq_migrating(p)))
1397 return rq;
1398 raw_spin_unlock(&rq->lock);
1399
1400 while (unlikely(task_on_rq_migrating(p)))
1401 cpu_relax();
1402 }
1403}
1404
1405/*
1406 * task_rq_lock - lock p->pi_lock and lock the rq @p resides on.
1407 */
1408static inline struct rq *task_rq_lock(struct task_struct *p, unsigned long *flags)
1409 __acquires(p->pi_lock)
1410 __acquires(rq->lock)
1411{
1412 struct rq *rq;
1413
1414 for (;;) {
1415 raw_spin_lock_irqsave(&p->pi_lock, *flags);
1416 rq = task_rq(p);
1417 raw_spin_lock(&rq->lock);
1418 /*
1419 * move_queued_task() task_rq_lock()
1420 *
1421 * ACQUIRE (rq->lock)
1422 * [S] ->on_rq = MIGRATING [L] rq = task_rq()
1423 * WMB (__set_task_cpu()) ACQUIRE (rq->lock);
1424 * [S] ->cpu = new_cpu [L] task_rq()
1425 * [L] ->on_rq
1426 * RELEASE (rq->lock)
1427 *
1428 * If we observe the old cpu in task_rq_lock, the acquire of
1429 * the old rq->lock will fully serialize against the stores.
1430 *
1431 * If we observe the new cpu in task_rq_lock, the acquire will
1432 * pair with the WMB to ensure we must then also see migrating.
1433 */
1434 if (likely(rq == task_rq(p) && !task_on_rq_migrating(p)))
1435 return rq;
1436 raw_spin_unlock(&rq->lock);
1437 raw_spin_unlock_irqrestore(&p->pi_lock, *flags);
1438
1439 while (unlikely(task_on_rq_migrating(p)))
1440 cpu_relax();
1441 }
1442}
1443
1444static inline void __task_rq_unlock(struct rq *rq)
1445 __releases(rq->lock)
1446{
1447 raw_spin_unlock(&rq->lock);
1448}
1449
1450static inline void
1451task_rq_unlock(struct rq *rq, struct task_struct *p, unsigned long *flags)
1452 __releases(rq->lock)
1453 __releases(p->pi_lock)
1454{
1455 raw_spin_unlock(&rq->lock);
1456 raw_spin_unlock_irqrestore(&p->pi_lock, *flags);
1457}
1458
1383#ifdef CONFIG_SMP 1459#ifdef CONFIG_SMP
1384#ifdef CONFIG_PREEMPT 1460#ifdef CONFIG_PREEMPT
1385 1461
diff --git a/kernel/sys.c b/kernel/sys.c
index ea9c88109894..a03d9cd23ed7 100644
--- a/kernel/sys.c
+++ b/kernel/sys.c
@@ -97,6 +97,12 @@
97#ifndef MPX_DISABLE_MANAGEMENT 97#ifndef MPX_DISABLE_MANAGEMENT
98# define MPX_DISABLE_MANAGEMENT(a) (-EINVAL) 98# define MPX_DISABLE_MANAGEMENT(a) (-EINVAL)
99#endif 99#endif
100#ifndef GET_FP_MODE
101# define GET_FP_MODE(a) (-EINVAL)
102#endif
103#ifndef SET_FP_MODE
104# define SET_FP_MODE(a,b) (-EINVAL)
105#endif
100 106
101/* 107/*
102 * this is where the system-wide overflow UID and GID are defined, for 108 * this is where the system-wide overflow UID and GID are defined, for
@@ -1102,6 +1108,7 @@ DECLARE_RWSEM(uts_sem);
1102/* 1108/*
1103 * Work around broken programs that cannot handle "Linux 3.0". 1109 * Work around broken programs that cannot handle "Linux 3.0".
1104 * Instead we map 3.x to 2.6.40+x, so e.g. 3.0 would be 2.6.40 1110 * Instead we map 3.x to 2.6.40+x, so e.g. 3.0 would be 2.6.40
1111 * And we map 4.x to 2.6.60+x, so 4.0 would be 2.6.60.
1105 */ 1112 */
1106static int override_release(char __user *release, size_t len) 1113static int override_release(char __user *release, size_t len)
1107{ 1114{
@@ -1121,7 +1128,7 @@ static int override_release(char __user *release, size_t len)
1121 break; 1128 break;
1122 rest++; 1129 rest++;
1123 } 1130 }
1124 v = ((LINUX_VERSION_CODE >> 8) & 0xff) + 40; 1131 v = ((LINUX_VERSION_CODE >> 8) & 0xff) + 60;
1125 copy = clamp_t(size_t, len, 1, sizeof(buf)); 1132 copy = clamp_t(size_t, len, 1, sizeof(buf));
1126 copy = scnprintf(buf, copy, "2.6.%u%s", v, rest); 1133 copy = scnprintf(buf, copy, "2.6.%u%s", v, rest);
1127 ret = copy_to_user(release, buf, copy + 1); 1134 ret = copy_to_user(release, buf, copy + 1);
@@ -2219,6 +2226,12 @@ SYSCALL_DEFINE5(prctl, int, option, unsigned long, arg2, unsigned long, arg3,
2219 return -EINVAL; 2226 return -EINVAL;
2220 error = MPX_DISABLE_MANAGEMENT(me); 2227 error = MPX_DISABLE_MANAGEMENT(me);
2221 break; 2228 break;
2229 case PR_SET_FP_MODE:
2230 error = SET_FP_MODE(me, arg2);
2231 break;
2232 case PR_GET_FP_MODE:
2233 error = GET_FP_MODE(me);
2234 break;
2222 default: 2235 default:
2223 error = -EINVAL; 2236 error = -EINVAL;
2224 break; 2237 break;
diff --git a/kernel/time/ntp.c b/kernel/time/ntp.c
index 4b585e0fdd22..0f60b08a4f07 100644
--- a/kernel/time/ntp.c
+++ b/kernel/time/ntp.c
@@ -633,10 +633,14 @@ int ntp_validate_timex(struct timex *txc)
633 if ((txc->modes & ADJ_SETOFFSET) && (!capable(CAP_SYS_TIME))) 633 if ((txc->modes & ADJ_SETOFFSET) && (!capable(CAP_SYS_TIME)))
634 return -EPERM; 634 return -EPERM;
635 635
636 if (txc->modes & ADJ_FREQUENCY) { 636 /*
637 if (LONG_MIN / PPM_SCALE > txc->freq) 637 * Check for potential multiplication overflows that can
638 * only happen on 64-bit systems:
639 */
640 if ((txc->modes & ADJ_FREQUENCY) && (BITS_PER_LONG == 64)) {
641 if (LLONG_MIN / PPM_SCALE > txc->freq)
638 return -EINVAL; 642 return -EINVAL;
639 if (LONG_MAX / PPM_SCALE < txc->freq) 643 if (LLONG_MAX / PPM_SCALE < txc->freq)
640 return -EINVAL; 644 return -EINVAL;
641 } 645 }
642 646
diff --git a/kernel/trace/ftrace.c b/kernel/trace/ftrace.c
index 45e5cb143d17..4f228024055b 100644
--- a/kernel/trace/ftrace.c
+++ b/kernel/trace/ftrace.c
@@ -1059,6 +1059,12 @@ static __init void ftrace_profile_debugfs(struct dentry *d_tracer)
1059 1059
1060static struct pid * const ftrace_swapper_pid = &init_struct_pid; 1060static struct pid * const ftrace_swapper_pid = &init_struct_pid;
1061 1061
1062#ifdef CONFIG_FUNCTION_GRAPH_TRACER
1063static int ftrace_graph_active;
1064#else
1065# define ftrace_graph_active 0
1066#endif
1067
1062#ifdef CONFIG_DYNAMIC_FTRACE 1068#ifdef CONFIG_DYNAMIC_FTRACE
1063 1069
1064static struct ftrace_ops *removed_ops; 1070static struct ftrace_ops *removed_ops;
@@ -2041,8 +2047,12 @@ static int ftrace_check_record(struct dyn_ftrace *rec, int enable, int update)
2041 if (!ftrace_rec_count(rec)) 2047 if (!ftrace_rec_count(rec))
2042 rec->flags = 0; 2048 rec->flags = 0;
2043 else 2049 else
2044 /* Just disable the record (keep REGS state) */ 2050 /*
2045 rec->flags &= ~FTRACE_FL_ENABLED; 2051 * Just disable the record, but keep the ops TRAMP
2052 * and REGS states. The _EN flags must be disabled though.
2053 */
2054 rec->flags &= ~(FTRACE_FL_ENABLED | FTRACE_FL_TRAMP_EN |
2055 FTRACE_FL_REGS_EN);
2046 } 2056 }
2047 2057
2048 return FTRACE_UPDATE_MAKE_NOP; 2058 return FTRACE_UPDATE_MAKE_NOP;
@@ -2688,24 +2698,36 @@ static int ftrace_shutdown(struct ftrace_ops *ops, int command)
2688 2698
2689static void ftrace_startup_sysctl(void) 2699static void ftrace_startup_sysctl(void)
2690{ 2700{
2701 int command;
2702
2691 if (unlikely(ftrace_disabled)) 2703 if (unlikely(ftrace_disabled))
2692 return; 2704 return;
2693 2705
2694 /* Force update next time */ 2706 /* Force update next time */
2695 saved_ftrace_func = NULL; 2707 saved_ftrace_func = NULL;
2696 /* ftrace_start_up is true if we want ftrace running */ 2708 /* ftrace_start_up is true if we want ftrace running */
2697 if (ftrace_start_up) 2709 if (ftrace_start_up) {
2698 ftrace_run_update_code(FTRACE_UPDATE_CALLS); 2710 command = FTRACE_UPDATE_CALLS;
2711 if (ftrace_graph_active)
2712 command |= FTRACE_START_FUNC_RET;
2713 ftrace_startup_enable(command);
2714 }
2699} 2715}
2700 2716
2701static void ftrace_shutdown_sysctl(void) 2717static void ftrace_shutdown_sysctl(void)
2702{ 2718{
2719 int command;
2720
2703 if (unlikely(ftrace_disabled)) 2721 if (unlikely(ftrace_disabled))
2704 return; 2722 return;
2705 2723
2706 /* ftrace_start_up is true if ftrace is running */ 2724 /* ftrace_start_up is true if ftrace is running */
2707 if (ftrace_start_up) 2725 if (ftrace_start_up) {
2708 ftrace_run_update_code(FTRACE_DISABLE_CALLS); 2726 command = FTRACE_DISABLE_CALLS;
2727 if (ftrace_graph_active)
2728 command |= FTRACE_STOP_FUNC_RET;
2729 ftrace_run_update_code(command);
2730 }
2709} 2731}
2710 2732
2711static cycle_t ftrace_update_time; 2733static cycle_t ftrace_update_time;
@@ -5558,12 +5580,12 @@ ftrace_enable_sysctl(struct ctl_table *table, int write,
5558 5580
5559 if (ftrace_enabled) { 5581 if (ftrace_enabled) {
5560 5582
5561 ftrace_startup_sysctl();
5562
5563 /* we are starting ftrace again */ 5583 /* we are starting ftrace again */
5564 if (ftrace_ops_list != &ftrace_list_end) 5584 if (ftrace_ops_list != &ftrace_list_end)
5565 update_ftrace_function(); 5585 update_ftrace_function();
5566 5586
5587 ftrace_startup_sysctl();
5588
5567 } else { 5589 } else {
5568 /* stopping ftrace calls (just send to ftrace_stub) */ 5590 /* stopping ftrace calls (just send to ftrace_stub) */
5569 ftrace_trace_function = ftrace_stub; 5591 ftrace_trace_function = ftrace_stub;
@@ -5590,8 +5612,6 @@ static struct ftrace_ops graph_ops = {
5590 ASSIGN_OPS_HASH(graph_ops, &global_ops.local_hash) 5612 ASSIGN_OPS_HASH(graph_ops, &global_ops.local_hash)
5591}; 5613};
5592 5614
5593static int ftrace_graph_active;
5594
5595int ftrace_graph_entry_stub(struct ftrace_graph_ent *trace) 5615int ftrace_graph_entry_stub(struct ftrace_graph_ent *trace)
5596{ 5616{
5597 return 0; 5617 return 0;
diff --git a/kernel/workqueue.c b/kernel/workqueue.c
index f28849394791..41ff75b478c6 100644
--- a/kernel/workqueue.c
+++ b/kernel/workqueue.c
@@ -2728,19 +2728,57 @@ bool flush_work(struct work_struct *work)
2728} 2728}
2729EXPORT_SYMBOL_GPL(flush_work); 2729EXPORT_SYMBOL_GPL(flush_work);
2730 2730
2731struct cwt_wait {
2732 wait_queue_t wait;
2733 struct work_struct *work;
2734};
2735
2736static int cwt_wakefn(wait_queue_t *wait, unsigned mode, int sync, void *key)
2737{
2738 struct cwt_wait *cwait = container_of(wait, struct cwt_wait, wait);
2739
2740 if (cwait->work != key)
2741 return 0;
2742 return autoremove_wake_function(wait, mode, sync, key);
2743}
2744
2731static bool __cancel_work_timer(struct work_struct *work, bool is_dwork) 2745static bool __cancel_work_timer(struct work_struct *work, bool is_dwork)
2732{ 2746{
2747 static DECLARE_WAIT_QUEUE_HEAD(cancel_waitq);
2733 unsigned long flags; 2748 unsigned long flags;
2734 int ret; 2749 int ret;
2735 2750
2736 do { 2751 do {
2737 ret = try_to_grab_pending(work, is_dwork, &flags); 2752 ret = try_to_grab_pending(work, is_dwork, &flags);
2738 /* 2753 /*
2739 * If someone else is canceling, wait for the same event it 2754 * If someone else is already canceling, wait for it to
2740 * would be waiting for before retrying. 2755 * finish. flush_work() doesn't work for PREEMPT_NONE
2756 * because we may get scheduled between @work's completion
2757 * and the other canceling task resuming and clearing
2758 * CANCELING - flush_work() will return false immediately
2759 * as @work is no longer busy, try_to_grab_pending() will
2760 * return -ENOENT as @work is still being canceled and the
2761 * other canceling task won't be able to clear CANCELING as
2762 * we're hogging the CPU.
2763 *
2764 * Let's wait for completion using a waitqueue. As this
2765 * may lead to the thundering herd problem, use a custom
2766 * wake function which matches @work along with exclusive
2767 * wait and wakeup.
2741 */ 2768 */
2742 if (unlikely(ret == -ENOENT)) 2769 if (unlikely(ret == -ENOENT)) {
2743 flush_work(work); 2770 struct cwt_wait cwait;
2771
2772 init_wait(&cwait.wait);
2773 cwait.wait.func = cwt_wakefn;
2774 cwait.work = work;
2775
2776 prepare_to_wait_exclusive(&cancel_waitq, &cwait.wait,
2777 TASK_UNINTERRUPTIBLE);
2778 if (work_is_canceling(work))
2779 schedule();
2780 finish_wait(&cancel_waitq, &cwait.wait);
2781 }
2744 } while (unlikely(ret < 0)); 2782 } while (unlikely(ret < 0));
2745 2783
2746 /* tell other tasks trying to grab @work to back off */ 2784 /* tell other tasks trying to grab @work to back off */
@@ -2749,6 +2787,16 @@ static bool __cancel_work_timer(struct work_struct *work, bool is_dwork)
2749 2787
2750 flush_work(work); 2788 flush_work(work);
2751 clear_work_data(work); 2789 clear_work_data(work);
2790
2791 /*
2792 * Paired with prepare_to_wait() above so that either
2793 * waitqueue_active() is visible here or !work_is_canceling() is
2794 * visible there.
2795 */
2796 smp_mb();
2797 if (waitqueue_active(&cancel_waitq))
2798 __wake_up(&cancel_waitq, TASK_NORMAL, 1, work);
2799
2752 return ret; 2800 return ret;
2753} 2801}
2754 2802
diff --git a/lib/Makefile b/lib/Makefile
index 87eb3bffc283..58f74d2dd396 100644
--- a/lib/Makefile
+++ b/lib/Makefile
@@ -24,7 +24,7 @@ obj-y += lockref.o
24 24
25obj-y += bcd.o div64.o sort.o parser.o halfmd4.o debug_locks.o random32.o \ 25obj-y += bcd.o div64.o sort.o parser.o halfmd4.o debug_locks.o random32.o \
26 bust_spinlocks.o kasprintf.o bitmap.o scatterlist.o \ 26 bust_spinlocks.o kasprintf.o bitmap.o scatterlist.o \
27 gcd.o lcm.o list_sort.o uuid.o flex_array.o clz_ctz.o \ 27 gcd.o lcm.o list_sort.o uuid.o flex_array.o iov_iter.o clz_ctz.o \
28 bsearch.o find_last_bit.o find_next_bit.o llist.o memweight.o kfifo.o \ 28 bsearch.o find_last_bit.o find_next_bit.o llist.o memweight.o kfifo.o \
29 percpu-refcount.o percpu_ida.o rhashtable.o reciprocal_div.o 29 percpu-refcount.o percpu_ida.o rhashtable.o reciprocal_div.o
30obj-y += string_helpers.o 30obj-y += string_helpers.o
diff --git a/mm/iov_iter.c b/lib/iov_iter.c
index 827732047da1..9d96e283520c 100644
--- a/mm/iov_iter.c
+++ b/lib/iov_iter.c
@@ -751,3 +751,18 @@ int iov_iter_npages(const struct iov_iter *i, int maxpages)
751 return npages; 751 return npages;
752} 752}
753EXPORT_SYMBOL(iov_iter_npages); 753EXPORT_SYMBOL(iov_iter_npages);
754
755const void *dup_iter(struct iov_iter *new, struct iov_iter *old, gfp_t flags)
756{
757 *new = *old;
758 if (new->type & ITER_BVEC)
759 return new->bvec = kmemdup(new->bvec,
760 new->nr_segs * sizeof(struct bio_vec),
761 flags);
762 else
763 /* iovec and kvec have identical layout */
764 return new->iov = kmemdup(new->iov,
765 new->nr_segs * sizeof(struct iovec),
766 flags);
767}
768EXPORT_SYMBOL(dup_iter);
diff --git a/lib/lz4/lz4_decompress.c b/lib/lz4/lz4_decompress.c
index 7a85967060a5..f0f5c5c3de12 100644
--- a/lib/lz4/lz4_decompress.c
+++ b/lib/lz4/lz4_decompress.c
@@ -139,6 +139,9 @@ static int lz4_uncompress(const char *source, char *dest, int osize)
139 /* Error: request to write beyond destination buffer */ 139 /* Error: request to write beyond destination buffer */
140 if (cpy > oend) 140 if (cpy > oend)
141 goto _output_error; 141 goto _output_error;
142 if ((ref + COPYLENGTH) > oend ||
143 (op + COPYLENGTH) > oend)
144 goto _output_error;
142 LZ4_SECURECOPY(ref, op, (oend - COPYLENGTH)); 145 LZ4_SECURECOPY(ref, op, (oend - COPYLENGTH));
143 while (op < cpy) 146 while (op < cpy)
144 *op++ = *ref++; 147 *op++ = *ref++;
diff --git a/lib/rhashtable.c b/lib/rhashtable.c
index 9cc4c4a90d00..b5344ef4c684 100644
--- a/lib/rhashtable.c
+++ b/lib/rhashtable.c
@@ -17,6 +17,7 @@
17#include <linux/kernel.h> 17#include <linux/kernel.h>
18#include <linux/init.h> 18#include <linux/init.h>
19#include <linux/log2.h> 19#include <linux/log2.h>
20#include <linux/sched.h>
20#include <linux/slab.h> 21#include <linux/slab.h>
21#include <linux/vmalloc.h> 22#include <linux/vmalloc.h>
22#include <linux/mm.h> 23#include <linux/mm.h>
@@ -217,15 +218,15 @@ static void bucket_table_free(const struct bucket_table *tbl)
217static struct bucket_table *bucket_table_alloc(struct rhashtable *ht, 218static struct bucket_table *bucket_table_alloc(struct rhashtable *ht,
218 size_t nbuckets) 219 size_t nbuckets)
219{ 220{
220 struct bucket_table *tbl; 221 struct bucket_table *tbl = NULL;
221 size_t size; 222 size_t size;
222 int i; 223 int i;
223 224
224 size = sizeof(*tbl) + nbuckets * sizeof(tbl->buckets[0]); 225 size = sizeof(*tbl) + nbuckets * sizeof(tbl->buckets[0]);
225 tbl = kzalloc(size, GFP_KERNEL | __GFP_NOWARN); 226 if (size <= (PAGE_SIZE << PAGE_ALLOC_COSTLY_ORDER))
227 tbl = kzalloc(size, GFP_KERNEL | __GFP_NOWARN | __GFP_NORETRY);
226 if (tbl == NULL) 228 if (tbl == NULL)
227 tbl = vzalloc(size); 229 tbl = vzalloc(size);
228
229 if (tbl == NULL) 230 if (tbl == NULL)
230 return NULL; 231 return NULL;
231 232
@@ -247,26 +248,24 @@ static struct bucket_table *bucket_table_alloc(struct rhashtable *ht,
247 * @ht: hash table 248 * @ht: hash table
248 * @new_size: new table size 249 * @new_size: new table size
249 */ 250 */
250bool rht_grow_above_75(const struct rhashtable *ht, size_t new_size) 251static bool rht_grow_above_75(const struct rhashtable *ht, size_t new_size)
251{ 252{
252 /* Expand table when exceeding 75% load */ 253 /* Expand table when exceeding 75% load */
253 return atomic_read(&ht->nelems) > (new_size / 4 * 3) && 254 return atomic_read(&ht->nelems) > (new_size / 4 * 3) &&
254 (ht->p.max_shift && atomic_read(&ht->shift) < ht->p.max_shift); 255 (!ht->p.max_shift || atomic_read(&ht->shift) < ht->p.max_shift);
255} 256}
256EXPORT_SYMBOL_GPL(rht_grow_above_75);
257 257
258/** 258/**
259 * rht_shrink_below_30 - returns true if nelems < 0.3 * table-size 259 * rht_shrink_below_30 - returns true if nelems < 0.3 * table-size
260 * @ht: hash table 260 * @ht: hash table
261 * @new_size: new table size 261 * @new_size: new table size
262 */ 262 */
263bool rht_shrink_below_30(const struct rhashtable *ht, size_t new_size) 263static bool rht_shrink_below_30(const struct rhashtable *ht, size_t new_size)
264{ 264{
265 /* Shrink table beneath 30% load */ 265 /* Shrink table beneath 30% load */
266 return atomic_read(&ht->nelems) < (new_size * 3 / 10) && 266 return atomic_read(&ht->nelems) < (new_size * 3 / 10) &&
267 (atomic_read(&ht->shift) > ht->p.min_shift); 267 (atomic_read(&ht->shift) > ht->p.min_shift);
268} 268}
269EXPORT_SYMBOL_GPL(rht_shrink_below_30);
270 269
271static void lock_buckets(struct bucket_table *new_tbl, 270static void lock_buckets(struct bucket_table *new_tbl,
272 struct bucket_table *old_tbl, unsigned int hash) 271 struct bucket_table *old_tbl, unsigned int hash)
@@ -414,6 +413,7 @@ int rhashtable_expand(struct rhashtable *ht)
414 } 413 }
415 } 414 }
416 unlock_buckets(new_tbl, old_tbl, new_hash); 415 unlock_buckets(new_tbl, old_tbl, new_hash);
416 cond_resched();
417 } 417 }
418 418
419 /* Unzip interleaved hash chains */ 419 /* Unzip interleaved hash chains */
@@ -437,6 +437,7 @@ int rhashtable_expand(struct rhashtable *ht)
437 complete = false; 437 complete = false;
438 438
439 unlock_buckets(new_tbl, old_tbl, old_hash); 439 unlock_buckets(new_tbl, old_tbl, old_hash);
440 cond_resched();
440 } 441 }
441 } 442 }
442 443
@@ -495,6 +496,7 @@ int rhashtable_shrink(struct rhashtable *ht)
495 tbl->buckets[new_hash + new_tbl->size]); 496 tbl->buckets[new_hash + new_tbl->size]);
496 497
497 unlock_buckets(new_tbl, tbl, new_hash); 498 unlock_buckets(new_tbl, tbl, new_hash);
499 cond_resched();
498 } 500 }
499 501
500 /* Publish the new, valid hash table */ 502 /* Publish the new, valid hash table */
@@ -528,31 +530,19 @@ static void rht_deferred_worker(struct work_struct *work)
528 list_for_each_entry(walker, &ht->walkers, list) 530 list_for_each_entry(walker, &ht->walkers, list)
529 walker->resize = true; 531 walker->resize = true;
530 532
531 if (ht->p.grow_decision && ht->p.grow_decision(ht, tbl->size)) 533 if (rht_grow_above_75(ht, tbl->size))
532 rhashtable_expand(ht); 534 rhashtable_expand(ht);
533 else if (ht->p.shrink_decision && ht->p.shrink_decision(ht, tbl->size)) 535 else if (rht_shrink_below_30(ht, tbl->size))
534 rhashtable_shrink(ht); 536 rhashtable_shrink(ht);
535
536unlock: 537unlock:
537 mutex_unlock(&ht->mutex); 538 mutex_unlock(&ht->mutex);
538} 539}
539 540
540static void rhashtable_wakeup_worker(struct rhashtable *ht)
541{
542 struct bucket_table *tbl = rht_dereference_rcu(ht->tbl, ht);
543 struct bucket_table *new_tbl = rht_dereference_rcu(ht->future_tbl, ht);
544 size_t size = tbl->size;
545
546 /* Only adjust the table if no resizing is currently in progress. */
547 if (tbl == new_tbl &&
548 ((ht->p.grow_decision && ht->p.grow_decision(ht, size)) ||
549 (ht->p.shrink_decision && ht->p.shrink_decision(ht, size))))
550 schedule_work(&ht->run_work);
551}
552
553static void __rhashtable_insert(struct rhashtable *ht, struct rhash_head *obj, 541static void __rhashtable_insert(struct rhashtable *ht, struct rhash_head *obj,
554 struct bucket_table *tbl, u32 hash) 542 struct bucket_table *tbl,
543 const struct bucket_table *old_tbl, u32 hash)
555{ 544{
545 bool no_resize_running = tbl == old_tbl;
556 struct rhash_head *head; 546 struct rhash_head *head;
557 547
558 hash = rht_bucket_index(tbl, hash); 548 hash = rht_bucket_index(tbl, hash);
@@ -568,8 +558,8 @@ static void __rhashtable_insert(struct rhashtable *ht, struct rhash_head *obj,
568 rcu_assign_pointer(tbl->buckets[hash], obj); 558 rcu_assign_pointer(tbl->buckets[hash], obj);
569 559
570 atomic_inc(&ht->nelems); 560 atomic_inc(&ht->nelems);
571 561 if (no_resize_running && rht_grow_above_75(ht, tbl->size))
572 rhashtable_wakeup_worker(ht); 562 schedule_work(&ht->run_work);
573} 563}
574 564
575/** 565/**
@@ -599,7 +589,7 @@ void rhashtable_insert(struct rhashtable *ht, struct rhash_head *obj)
599 hash = obj_raw_hashfn(ht, rht_obj(ht, obj)); 589 hash = obj_raw_hashfn(ht, rht_obj(ht, obj));
600 590
601 lock_buckets(tbl, old_tbl, hash); 591 lock_buckets(tbl, old_tbl, hash);
602 __rhashtable_insert(ht, obj, tbl, hash); 592 __rhashtable_insert(ht, obj, tbl, old_tbl, hash);
603 unlock_buckets(tbl, old_tbl, hash); 593 unlock_buckets(tbl, old_tbl, hash);
604 594
605 rcu_read_unlock(); 595 rcu_read_unlock();
@@ -681,8 +671,11 @@ found:
681 unlock_buckets(new_tbl, old_tbl, new_hash); 671 unlock_buckets(new_tbl, old_tbl, new_hash);
682 672
683 if (ret) { 673 if (ret) {
674 bool no_resize_running = new_tbl == old_tbl;
675
684 atomic_dec(&ht->nelems); 676 atomic_dec(&ht->nelems);
685 rhashtable_wakeup_worker(ht); 677 if (no_resize_running && rht_shrink_below_30(ht, new_tbl->size))
678 schedule_work(&ht->run_work);
686 } 679 }
687 680
688 rcu_read_unlock(); 681 rcu_read_unlock();
@@ -852,7 +845,7 @@ bool rhashtable_lookup_compare_insert(struct rhashtable *ht,
852 goto exit; 845 goto exit;
853 } 846 }
854 847
855 __rhashtable_insert(ht, obj, new_tbl, new_hash); 848 __rhashtable_insert(ht, obj, new_tbl, old_tbl, new_hash);
856 849
857exit: 850exit:
858 unlock_buckets(new_tbl, old_tbl, new_hash); 851 unlock_buckets(new_tbl, old_tbl, new_hash);
@@ -894,6 +887,9 @@ int rhashtable_walk_init(struct rhashtable *ht, struct rhashtable_iter *iter)
894 if (!iter->walker) 887 if (!iter->walker)
895 return -ENOMEM; 888 return -ENOMEM;
896 889
890 INIT_LIST_HEAD(&iter->walker->list);
891 iter->walker->resize = false;
892
897 mutex_lock(&ht->mutex); 893 mutex_lock(&ht->mutex);
898 list_add(&iter->walker->list, &ht->walkers); 894 list_add(&iter->walker->list, &ht->walkers);
899 mutex_unlock(&ht->mutex); 895 mutex_unlock(&ht->mutex);
@@ -1111,8 +1107,7 @@ int rhashtable_init(struct rhashtable *ht, struct rhashtable_params *params)
1111 if (!ht->p.hash_rnd) 1107 if (!ht->p.hash_rnd)
1112 get_random_bytes(&ht->p.hash_rnd, sizeof(ht->p.hash_rnd)); 1108 get_random_bytes(&ht->p.hash_rnd, sizeof(ht->p.hash_rnd));
1113 1109
1114 if (ht->p.grow_decision || ht->p.shrink_decision) 1110 INIT_WORK(&ht->run_work, rht_deferred_worker);
1115 INIT_WORK(&ht->run_work, rht_deferred_worker);
1116 1111
1117 return 0; 1112 return 0;
1118} 1113}
@@ -1130,8 +1125,7 @@ void rhashtable_destroy(struct rhashtable *ht)
1130{ 1125{
1131 ht->being_destroyed = true; 1126 ht->being_destroyed = true;
1132 1127
1133 if (ht->p.grow_decision || ht->p.shrink_decision) 1128 cancel_work_sync(&ht->run_work);
1134 cancel_work_sync(&ht->run_work);
1135 1129
1136 mutex_lock(&ht->mutex); 1130 mutex_lock(&ht->mutex);
1137 bucket_table_free(rht_dereference(ht->tbl, ht)); 1131 bucket_table_free(rht_dereference(ht->tbl, ht));
diff --git a/lib/seq_buf.c b/lib/seq_buf.c
index 88c0854bd752..5c94e1012a91 100644
--- a/lib/seq_buf.c
+++ b/lib/seq_buf.c
@@ -61,7 +61,7 @@ int seq_buf_vprintf(struct seq_buf *s, const char *fmt, va_list args)
61 61
62 if (s->len < s->size) { 62 if (s->len < s->size) {
63 len = vsnprintf(s->buffer + s->len, s->size - s->len, fmt, args); 63 len = vsnprintf(s->buffer + s->len, s->size - s->len, fmt, args);
64 if (seq_buf_can_fit(s, len)) { 64 if (s->len + len < s->size) {
65 s->len += len; 65 s->len += len;
66 return 0; 66 return 0;
67 } 67 }
@@ -118,7 +118,7 @@ int seq_buf_bprintf(struct seq_buf *s, const char *fmt, const u32 *binary)
118 118
119 if (s->len < s->size) { 119 if (s->len < s->size) {
120 ret = bstr_printf(s->buffer + s->len, len, fmt, binary); 120 ret = bstr_printf(s->buffer + s->len, len, fmt, binary);
121 if (seq_buf_can_fit(s, ret)) { 121 if (s->len + ret < s->size) {
122 s->len += ret; 122 s->len += ret;
123 return 0; 123 return 0;
124 } 124 }
diff --git a/lib/test_rhashtable.c b/lib/test_rhashtable.c
index 1dfeba73fc74..67c7593d1dd6 100644
--- a/lib/test_rhashtable.c
+++ b/lib/test_rhashtable.c
@@ -191,18 +191,18 @@ error:
191 return err; 191 return err;
192} 192}
193 193
194static struct rhashtable ht;
195
194static int __init test_rht_init(void) 196static int __init test_rht_init(void)
195{ 197{
196 struct rhashtable ht;
197 struct rhashtable_params params = { 198 struct rhashtable_params params = {
198 .nelem_hint = TEST_HT_SIZE, 199 .nelem_hint = TEST_HT_SIZE,
199 .head_offset = offsetof(struct test_obj, node), 200 .head_offset = offsetof(struct test_obj, node),
200 .key_offset = offsetof(struct test_obj, value), 201 .key_offset = offsetof(struct test_obj, value),
201 .key_len = sizeof(int), 202 .key_len = sizeof(int),
202 .hashfn = jhash, 203 .hashfn = jhash,
204 .max_shift = 1, /* we expand/shrink manually here */
203 .nulls_base = (3U << RHT_BASE_SHIFT), 205 .nulls_base = (3U << RHT_BASE_SHIFT),
204 .grow_decision = rht_grow_above_75,
205 .shrink_decision = rht_shrink_below_30,
206 }; 206 };
207 int err; 207 int err;
208 208
@@ -222,6 +222,11 @@ static int __init test_rht_init(void)
222 return err; 222 return err;
223} 223}
224 224
225static void __exit test_rht_exit(void)
226{
227}
228
225module_init(test_rht_init); 229module_init(test_rht_init);
230module_exit(test_rht_exit);
226 231
227MODULE_LICENSE("GPL v2"); 232MODULE_LICENSE("GPL v2");
diff --git a/mm/Makefile b/mm/Makefile
index 3c1caa2693bd..15dbe9903c27 100644
--- a/mm/Makefile
+++ b/mm/Makefile
@@ -21,7 +21,7 @@ obj-y := filemap.o mempool.o oom_kill.o \
21 mm_init.o mmu_context.o percpu.o slab_common.o \ 21 mm_init.o mmu_context.o percpu.o slab_common.o \
22 compaction.o vmacache.o \ 22 compaction.o vmacache.o \
23 interval_tree.o list_lru.o workingset.o \ 23 interval_tree.o list_lru.o workingset.o \
24 iov_iter.o debug.o $(mmu-y) 24 debug.o $(mmu-y)
25 25
26obj-y += init-mm.o 26obj-y += init-mm.o
27 27
diff --git a/mm/cma.c b/mm/cma.c
index 75016fd1de90..68ecb7a42983 100644
--- a/mm/cma.c
+++ b/mm/cma.c
@@ -64,15 +64,17 @@ static unsigned long cma_bitmap_aligned_mask(struct cma *cma, int align_order)
64 return (1UL << (align_order - cma->order_per_bit)) - 1; 64 return (1UL << (align_order - cma->order_per_bit)) - 1;
65} 65}
66 66
67/*
68 * Find a PFN aligned to the specified order and return an offset represented in
69 * order_per_bits.
70 */
67static unsigned long cma_bitmap_aligned_offset(struct cma *cma, int align_order) 71static unsigned long cma_bitmap_aligned_offset(struct cma *cma, int align_order)
68{ 72{
69 unsigned int alignment;
70
71 if (align_order <= cma->order_per_bit) 73 if (align_order <= cma->order_per_bit)
72 return 0; 74 return 0;
73 alignment = 1UL << (align_order - cma->order_per_bit); 75
74 return ALIGN(cma->base_pfn, alignment) - 76 return (ALIGN(cma->base_pfn, (1UL << align_order))
75 (cma->base_pfn >> cma->order_per_bit); 77 - cma->base_pfn) >> cma->order_per_bit;
76} 78}
77 79
78static unsigned long cma_bitmap_maxno(struct cma *cma) 80static unsigned long cma_bitmap_maxno(struct cma *cma)
diff --git a/mm/huge_memory.c b/mm/huge_memory.c
index fc00c8cb5a82..626e93db28ba 100644
--- a/mm/huge_memory.c
+++ b/mm/huge_memory.c
@@ -1295,8 +1295,13 @@ int do_huge_pmd_numa_page(struct mm_struct *mm, struct vm_area_struct *vma,
1295 * Avoid grouping on DSO/COW pages in specific and RO pages 1295 * Avoid grouping on DSO/COW pages in specific and RO pages
1296 * in general, RO pages shouldn't hurt as much anyway since 1296 * in general, RO pages shouldn't hurt as much anyway since
1297 * they can be in shared cache state. 1297 * they can be in shared cache state.
1298 *
1299 * FIXME! This checks "pmd_dirty()" as an approximation of
1300 * "is this a read-only page", since checking "pmd_write()"
1301 * is even more broken. We haven't actually turned this into
1302 * a writable page, so pmd_write() will always be false.
1298 */ 1303 */
1299 if (!pmd_write(pmd)) 1304 if (!pmd_dirty(pmd))
1300 flags |= TNF_NO_GROUP; 1305 flags |= TNF_NO_GROUP;
1301 1306
1302 /* 1307 /*
@@ -1482,6 +1487,7 @@ int change_huge_pmd(struct vm_area_struct *vma, pmd_t *pmd,
1482 1487
1483 if (__pmd_trans_huge_lock(pmd, vma, &ptl) == 1) { 1488 if (__pmd_trans_huge_lock(pmd, vma, &ptl) == 1) {
1484 pmd_t entry; 1489 pmd_t entry;
1490 ret = 1;
1485 1491
1486 /* 1492 /*
1487 * Avoid trapping faults against the zero page. The read-only 1493 * Avoid trapping faults against the zero page. The read-only
@@ -1490,11 +1496,10 @@ int change_huge_pmd(struct vm_area_struct *vma, pmd_t *pmd,
1490 */ 1496 */
1491 if (prot_numa && is_huge_zero_pmd(*pmd)) { 1497 if (prot_numa && is_huge_zero_pmd(*pmd)) {
1492 spin_unlock(ptl); 1498 spin_unlock(ptl);
1493 return 0; 1499 return ret;
1494 } 1500 }
1495 1501
1496 if (!prot_numa || !pmd_protnone(*pmd)) { 1502 if (!prot_numa || !pmd_protnone(*pmd)) {
1497 ret = 1;
1498 entry = pmdp_get_and_clear_notify(mm, addr, pmd); 1503 entry = pmdp_get_and_clear_notify(mm, addr, pmd);
1499 entry = pmd_modify(entry, newprot); 1504 entry = pmd_modify(entry, newprot);
1500 ret = HPAGE_PMD_NR; 1505 ret = HPAGE_PMD_NR;
diff --git a/mm/hugetlb.c b/mm/hugetlb.c
index 0a9ac6c26832..c41b2a0ee273 100644
--- a/mm/hugetlb.c
+++ b/mm/hugetlb.c
@@ -917,7 +917,6 @@ static void prep_compound_gigantic_page(struct page *page, unsigned long order)
917 __SetPageHead(page); 917 __SetPageHead(page);
918 __ClearPageReserved(page); 918 __ClearPageReserved(page);
919 for (i = 1; i < nr_pages; i++, p = mem_map_next(p, page, i)) { 919 for (i = 1; i < nr_pages; i++, p = mem_map_next(p, page, i)) {
920 __SetPageTail(p);
921 /* 920 /*
922 * For gigantic hugepages allocated through bootmem at 921 * For gigantic hugepages allocated through bootmem at
923 * boot, it's safer to be consistent with the not-gigantic 922 * boot, it's safer to be consistent with the not-gigantic
@@ -933,6 +932,9 @@ static void prep_compound_gigantic_page(struct page *page, unsigned long order)
933 __ClearPageReserved(p); 932 __ClearPageReserved(p);
934 set_page_count(p, 0); 933 set_page_count(p, 0);
935 p->first_page = page; 934 p->first_page = page;
935 /* Make sure p->first_page is always valid for PageTail() */
936 smp_wmb();
937 __SetPageTail(p);
936 } 938 }
937} 939}
938 940
diff --git a/mm/kasan/kasan.c b/mm/kasan/kasan.c
index 78fee632a7ee..936d81661c47 100644
--- a/mm/kasan/kasan.c
+++ b/mm/kasan/kasan.c
@@ -29,6 +29,7 @@
29#include <linux/stacktrace.h> 29#include <linux/stacktrace.h>
30#include <linux/string.h> 30#include <linux/string.h>
31#include <linux/types.h> 31#include <linux/types.h>
32#include <linux/vmalloc.h>
32#include <linux/kasan.h> 33#include <linux/kasan.h>
33 34
34#include "kasan.h" 35#include "kasan.h"
@@ -414,12 +415,19 @@ int kasan_module_alloc(void *addr, size_t size)
414 GFP_KERNEL | __GFP_HIGHMEM | __GFP_ZERO, 415 GFP_KERNEL | __GFP_HIGHMEM | __GFP_ZERO,
415 PAGE_KERNEL, VM_NO_GUARD, NUMA_NO_NODE, 416 PAGE_KERNEL, VM_NO_GUARD, NUMA_NO_NODE,
416 __builtin_return_address(0)); 417 __builtin_return_address(0));
417 return ret ? 0 : -ENOMEM; 418
419 if (ret) {
420 find_vm_area(addr)->flags |= VM_KASAN;
421 return 0;
422 }
423
424 return -ENOMEM;
418} 425}
419 426
420void kasan_module_free(void *addr) 427void kasan_free_shadow(const struct vm_struct *vm)
421{ 428{
422 vfree(kasan_mem_to_shadow(addr)); 429 if (vm->flags & VM_KASAN)
430 vfree(kasan_mem_to_shadow(vm->addr));
423} 431}
424 432
425static void register_global(struct kasan_global *global) 433static void register_global(struct kasan_global *global)
diff --git a/mm/memcontrol.c b/mm/memcontrol.c
index d18d3a6e7337..b34ef4a32a3b 100644
--- a/mm/memcontrol.c
+++ b/mm/memcontrol.c
@@ -5232,7 +5232,9 @@ static void mem_cgroup_bind(struct cgroup_subsys_state *root_css)
5232 * on for the root memcg is enough. 5232 * on for the root memcg is enough.
5233 */ 5233 */
5234 if (cgroup_on_dfl(root_css->cgroup)) 5234 if (cgroup_on_dfl(root_css->cgroup))
5235 mem_cgroup_from_css(root_css)->use_hierarchy = true; 5235 root_mem_cgroup->use_hierarchy = true;
5236 else
5237 root_mem_cgroup->use_hierarchy = false;
5236} 5238}
5237 5239
5238static u64 memory_current_read(struct cgroup_subsys_state *css, 5240static u64 memory_current_read(struct cgroup_subsys_state *css,
@@ -5247,7 +5249,7 @@ static int memory_low_show(struct seq_file *m, void *v)
5247 unsigned long low = ACCESS_ONCE(memcg->low); 5249 unsigned long low = ACCESS_ONCE(memcg->low);
5248 5250
5249 if (low == PAGE_COUNTER_MAX) 5251 if (low == PAGE_COUNTER_MAX)
5250 seq_puts(m, "infinity\n"); 5252 seq_puts(m, "max\n");
5251 else 5253 else
5252 seq_printf(m, "%llu\n", (u64)low * PAGE_SIZE); 5254 seq_printf(m, "%llu\n", (u64)low * PAGE_SIZE);
5253 5255
@@ -5262,7 +5264,7 @@ static ssize_t memory_low_write(struct kernfs_open_file *of,
5262 int err; 5264 int err;
5263 5265
5264 buf = strstrip(buf); 5266 buf = strstrip(buf);
5265 err = page_counter_memparse(buf, "infinity", &low); 5267 err = page_counter_memparse(buf, "max", &low);
5266 if (err) 5268 if (err)
5267 return err; 5269 return err;
5268 5270
@@ -5277,7 +5279,7 @@ static int memory_high_show(struct seq_file *m, void *v)
5277 unsigned long high = ACCESS_ONCE(memcg->high); 5279 unsigned long high = ACCESS_ONCE(memcg->high);
5278 5280
5279 if (high == PAGE_COUNTER_MAX) 5281 if (high == PAGE_COUNTER_MAX)
5280 seq_puts(m, "infinity\n"); 5282 seq_puts(m, "max\n");
5281 else 5283 else
5282 seq_printf(m, "%llu\n", (u64)high * PAGE_SIZE); 5284 seq_printf(m, "%llu\n", (u64)high * PAGE_SIZE);
5283 5285
@@ -5292,7 +5294,7 @@ static ssize_t memory_high_write(struct kernfs_open_file *of,
5292 int err; 5294 int err;
5293 5295
5294 buf = strstrip(buf); 5296 buf = strstrip(buf);
5295 err = page_counter_memparse(buf, "infinity", &high); 5297 err = page_counter_memparse(buf, "max", &high);
5296 if (err) 5298 if (err)
5297 return err; 5299 return err;
5298 5300
@@ -5307,7 +5309,7 @@ static int memory_max_show(struct seq_file *m, void *v)
5307 unsigned long max = ACCESS_ONCE(memcg->memory.limit); 5309 unsigned long max = ACCESS_ONCE(memcg->memory.limit);
5308 5310
5309 if (max == PAGE_COUNTER_MAX) 5311 if (max == PAGE_COUNTER_MAX)
5310 seq_puts(m, "infinity\n"); 5312 seq_puts(m, "max\n");
5311 else 5313 else
5312 seq_printf(m, "%llu\n", (u64)max * PAGE_SIZE); 5314 seq_printf(m, "%llu\n", (u64)max * PAGE_SIZE);
5313 5315
@@ -5322,7 +5324,7 @@ static ssize_t memory_max_write(struct kernfs_open_file *of,
5322 int err; 5324 int err;
5323 5325
5324 buf = strstrip(buf); 5326 buf = strstrip(buf);
5325 err = page_counter_memparse(buf, "infinity", &max); 5327 err = page_counter_memparse(buf, "max", &max);
5326 if (err) 5328 if (err)
5327 return err; 5329 return err;
5328 5330
@@ -5426,7 +5428,7 @@ bool mem_cgroup_low(struct mem_cgroup *root, struct mem_cgroup *memcg)
5426 if (memcg == root_mem_cgroup) 5428 if (memcg == root_mem_cgroup)
5427 return false; 5429 return false;
5428 5430
5429 if (page_counter_read(&memcg->memory) > memcg->low) 5431 if (page_counter_read(&memcg->memory) >= memcg->low)
5430 return false; 5432 return false;
5431 5433
5432 while (memcg != root) { 5434 while (memcg != root) {
@@ -5435,7 +5437,7 @@ bool mem_cgroup_low(struct mem_cgroup *root, struct mem_cgroup *memcg)
5435 if (memcg == root_mem_cgroup) 5437 if (memcg == root_mem_cgroup)
5436 break; 5438 break;
5437 5439
5438 if (page_counter_read(&memcg->memory) > memcg->low) 5440 if (page_counter_read(&memcg->memory) >= memcg->low)
5439 return false; 5441 return false;
5440 } 5442 }
5441 return true; 5443 return true;
diff --git a/mm/memory.c b/mm/memory.c
index 8068893697bb..411144f977b1 100644
--- a/mm/memory.c
+++ b/mm/memory.c
@@ -3072,8 +3072,13 @@ static int do_numa_page(struct mm_struct *mm, struct vm_area_struct *vma,
3072 * Avoid grouping on DSO/COW pages in specific and RO pages 3072 * Avoid grouping on DSO/COW pages in specific and RO pages
3073 * in general, RO pages shouldn't hurt as much anyway since 3073 * in general, RO pages shouldn't hurt as much anyway since
3074 * they can be in shared cache state. 3074 * they can be in shared cache state.
3075 *
3076 * FIXME! This checks "pmd_dirty()" as an approximation of
3077 * "is this a read-only page", since checking "pmd_write()"
3078 * is even more broken. We haven't actually turned this into
3079 * a writable page, so pmd_write() will always be false.
3075 */ 3080 */
3076 if (!pte_write(pte)) 3081 if (!pte_dirty(pte))
3077 flags |= TNF_NO_GROUP; 3082 flags |= TNF_NO_GROUP;
3078 3083
3079 /* 3084 /*
diff --git a/mm/mlock.c b/mm/mlock.c
index 73cf0987088c..8a54cd214925 100644
--- a/mm/mlock.c
+++ b/mm/mlock.c
@@ -26,10 +26,10 @@
26 26
27int can_do_mlock(void) 27int can_do_mlock(void)
28{ 28{
29 if (capable(CAP_IPC_LOCK))
30 return 1;
31 if (rlimit(RLIMIT_MEMLOCK) != 0) 29 if (rlimit(RLIMIT_MEMLOCK) != 0)
32 return 1; 30 return 1;
31 if (capable(CAP_IPC_LOCK))
32 return 1;
33 return 0; 33 return 0;
34} 34}
35EXPORT_SYMBOL(can_do_mlock); 35EXPORT_SYMBOL(can_do_mlock);
diff --git a/mm/nommu.c b/mm/nommu.c
index 7296360fc057..3fba2dc97c44 100644
--- a/mm/nommu.c
+++ b/mm/nommu.c
@@ -62,6 +62,7 @@ void *high_memory;
62EXPORT_SYMBOL(high_memory); 62EXPORT_SYMBOL(high_memory);
63struct page *mem_map; 63struct page *mem_map;
64unsigned long max_mapnr; 64unsigned long max_mapnr;
65EXPORT_SYMBOL(max_mapnr);
65unsigned long highest_memmap_pfn; 66unsigned long highest_memmap_pfn;
66struct percpu_counter vm_committed_as; 67struct percpu_counter vm_committed_as;
67int sysctl_overcommit_memory = OVERCOMMIT_GUESS; /* heuristic overcommit */ 68int sysctl_overcommit_memory = OVERCOMMIT_GUESS; /* heuristic overcommit */
@@ -1213,11 +1214,9 @@ static int do_mmap_private(struct vm_area_struct *vma,
1213 if (sysctl_nr_trim_pages && total - point >= sysctl_nr_trim_pages) { 1214 if (sysctl_nr_trim_pages && total - point >= sysctl_nr_trim_pages) {
1214 total = point; 1215 total = point;
1215 kdebug("try to alloc exact %lu pages", total); 1216 kdebug("try to alloc exact %lu pages", total);
1216 base = alloc_pages_exact(len, GFP_KERNEL);
1217 } else {
1218 base = (void *)__get_free_pages(GFP_KERNEL, order);
1219 } 1217 }
1220 1218
1219 base = alloc_pages_exact(total << PAGE_SHIFT, GFP_KERNEL);
1221 if (!base) 1220 if (!base)
1222 goto enomem; 1221 goto enomem;
1223 1222
diff --git a/mm/page_alloc.c b/mm/page_alloc.c
index a47f0b229a1a..40e29429e7b0 100644
--- a/mm/page_alloc.c
+++ b/mm/page_alloc.c
@@ -2353,8 +2353,15 @@ __alloc_pages_may_oom(gfp_t gfp_mask, unsigned int order,
2353 if (ac->high_zoneidx < ZONE_NORMAL) 2353 if (ac->high_zoneidx < ZONE_NORMAL)
2354 goto out; 2354 goto out;
2355 /* The OOM killer does not compensate for light reclaim */ 2355 /* The OOM killer does not compensate for light reclaim */
2356 if (!(gfp_mask & __GFP_FS)) 2356 if (!(gfp_mask & __GFP_FS)) {
2357 /*
2358 * XXX: Page reclaim didn't yield anything,
2359 * and the OOM killer can't be invoked, but
2360 * keep looping as per should_alloc_retry().
2361 */
2362 *did_some_progress = 1;
2357 goto out; 2363 goto out;
2364 }
2358 /* 2365 /*
2359 * GFP_THISNODE contains __GFP_NORETRY and we never hit this. 2366 * GFP_THISNODE contains __GFP_NORETRY and we never hit this.
2360 * Sanity check for bare calls of __GFP_THISNODE, not real OOM. 2367 * Sanity check for bare calls of __GFP_THISNODE, not real OOM.
@@ -2366,7 +2373,8 @@ __alloc_pages_may_oom(gfp_t gfp_mask, unsigned int order,
2366 goto out; 2373 goto out;
2367 } 2374 }
2368 /* Exhausted what can be done so it's blamo time */ 2375 /* Exhausted what can be done so it's blamo time */
2369 if (out_of_memory(ac->zonelist, gfp_mask, order, ac->nodemask, false)) 2376 if (out_of_memory(ac->zonelist, gfp_mask, order, ac->nodemask, false)
2377 || WARN_ON_ONCE(gfp_mask & __GFP_NOFAIL))
2370 *did_some_progress = 1; 2378 *did_some_progress = 1;
2371out: 2379out:
2372 oom_zonelist_unlock(ac->zonelist, gfp_mask); 2380 oom_zonelist_unlock(ac->zonelist, gfp_mask);
diff --git a/mm/shmem.c b/mm/shmem.c
index a63031fa3e0c..cf2d0ca010bc 100644
--- a/mm/shmem.c
+++ b/mm/shmem.c
@@ -1455,6 +1455,9 @@ static struct inode *shmem_get_inode(struct super_block *sb, const struct inode
1455 1455
1456bool shmem_mapping(struct address_space *mapping) 1456bool shmem_mapping(struct address_space *mapping)
1457{ 1457{
1458 if (!mapping->host)
1459 return false;
1460
1458 return mapping->host->i_sb->s_op == &shmem_ops; 1461 return mapping->host->i_sb->s_op == &shmem_ops;
1459} 1462}
1460 1463
@@ -2319,8 +2322,8 @@ static int shmem_rmdir(struct inode *dir, struct dentry *dentry)
2319 2322
2320static int shmem_exchange(struct inode *old_dir, struct dentry *old_dentry, struct inode *new_dir, struct dentry *new_dentry) 2323static int shmem_exchange(struct inode *old_dir, struct dentry *old_dentry, struct inode *new_dir, struct dentry *new_dentry)
2321{ 2324{
2322 bool old_is_dir = S_ISDIR(old_dentry->d_inode->i_mode); 2325 bool old_is_dir = d_is_dir(old_dentry);
2323 bool new_is_dir = S_ISDIR(new_dentry->d_inode->i_mode); 2326 bool new_is_dir = d_is_dir(new_dentry);
2324 2327
2325 if (old_dir != new_dir && old_is_dir != new_is_dir) { 2328 if (old_dir != new_dir && old_is_dir != new_is_dir) {
2326 if (old_is_dir) { 2329 if (old_is_dir) {
diff --git a/mm/vmalloc.c b/mm/vmalloc.c
index 35b25e1340ca..49abccf29a29 100644
--- a/mm/vmalloc.c
+++ b/mm/vmalloc.c
@@ -1418,6 +1418,7 @@ struct vm_struct *remove_vm_area(const void *addr)
1418 spin_unlock(&vmap_area_lock); 1418 spin_unlock(&vmap_area_lock);
1419 1419
1420 vmap_debug_free_range(va->va_start, va->va_end); 1420 vmap_debug_free_range(va->va_start, va->va_end);
1421 kasan_free_shadow(vm);
1421 free_unmap_vmap_area(va); 1422 free_unmap_vmap_area(va);
1422 vm->size -= PAGE_SIZE; 1423 vm->size -= PAGE_SIZE;
1423 1424
diff --git a/net/9p/trans_virtio.c b/net/9p/trans_virtio.c
index d8e376a5f0f1..36a1a739ad68 100644
--- a/net/9p/trans_virtio.c
+++ b/net/9p/trans_virtio.c
@@ -658,14 +658,30 @@ p9_virtio_create(struct p9_client *client, const char *devname, char *args)
658static void p9_virtio_remove(struct virtio_device *vdev) 658static void p9_virtio_remove(struct virtio_device *vdev)
659{ 659{
660 struct virtio_chan *chan = vdev->priv; 660 struct virtio_chan *chan = vdev->priv;
661 661 unsigned long warning_time;
662 if (chan->inuse)
663 p9_virtio_close(chan->client);
664 vdev->config->del_vqs(vdev);
665 662
666 mutex_lock(&virtio_9p_lock); 663 mutex_lock(&virtio_9p_lock);
664
665 /* Remove self from list so we don't get new users. */
667 list_del(&chan->chan_list); 666 list_del(&chan->chan_list);
667 warning_time = jiffies;
668
669 /* Wait for existing users to close. */
670 while (chan->inuse) {
671 mutex_unlock(&virtio_9p_lock);
672 msleep(250);
673 if (time_after(jiffies, warning_time + 10 * HZ)) {
674 dev_emerg(&vdev->dev,
675 "p9_virtio_remove: waiting for device in use.\n");
676 warning_time = jiffies;
677 }
678 mutex_lock(&virtio_9p_lock);
679 }
680
668 mutex_unlock(&virtio_9p_lock); 681 mutex_unlock(&virtio_9p_lock);
682
683 vdev->config->del_vqs(vdev);
684
669 sysfs_remove_file(&(vdev->dev.kobj), &dev_attr_mount_tag.attr); 685 sysfs_remove_file(&(vdev->dev.kobj), &dev_attr_mount_tag.attr);
670 kobject_uevent(&(vdev->dev.kobj), KOBJ_CHANGE); 686 kobject_uevent(&(vdev->dev.kobj), KOBJ_CHANGE);
671 kfree(chan->tag); 687 kfree(chan->tag);
diff --git a/net/bridge/br.c b/net/bridge/br.c
index fb57ab6b24f9..02c24cf63c34 100644
--- a/net/bridge/br.c
+++ b/net/bridge/br.c
@@ -190,6 +190,8 @@ static int __init br_init(void)
190{ 190{
191 int err; 191 int err;
192 192
193 BUILD_BUG_ON(sizeof(struct br_input_skb_cb) > FIELD_SIZEOF(struct sk_buff, cb));
194
193 err = stp_proto_register(&br_stp_proto); 195 err = stp_proto_register(&br_stp_proto);
194 if (err < 0) { 196 if (err < 0) {
195 pr_err("bridge: can't register sap for STP\n"); 197 pr_err("bridge: can't register sap for STP\n");
diff --git a/net/bridge/br_if.c b/net/bridge/br_if.c
index b087d278c679..1849d96b3c91 100644
--- a/net/bridge/br_if.c
+++ b/net/bridge/br_if.c
@@ -563,6 +563,8 @@ int br_del_if(struct net_bridge *br, struct net_device *dev)
563 */ 563 */
564 del_nbp(p); 564 del_nbp(p);
565 565
566 dev_set_mtu(br->dev, br_min_mtu(br));
567
566 spin_lock_bh(&br->lock); 568 spin_lock_bh(&br->lock);
567 changed_addr = br_stp_recalculate_bridge_id(br); 569 changed_addr = br_stp_recalculate_bridge_id(br);
568 spin_unlock_bh(&br->lock); 570 spin_unlock_bh(&br->lock);
diff --git a/net/caif/caif_socket.c b/net/caif/caif_socket.c
index 769b185fefbd..a6e2da0bc718 100644
--- a/net/caif/caif_socket.c
+++ b/net/caif/caif_socket.c
@@ -281,7 +281,7 @@ static int caif_seqpkt_recvmsg(struct kiocb *iocb, struct socket *sock,
281 int copylen; 281 int copylen;
282 282
283 ret = -EOPNOTSUPP; 283 ret = -EOPNOTSUPP;
284 if (m->msg_flags&MSG_OOB) 284 if (flags & MSG_OOB)
285 goto read_error; 285 goto read_error;
286 286
287 skb = skb_recv_datagram(sk, flags, 0 , &ret); 287 skb = skb_recv_datagram(sk, flags, 0 , &ret);
diff --git a/net/caif/cffrml.c b/net/caif/cffrml.c
index 8bc7caa28e64..434ba8557826 100644
--- a/net/caif/cffrml.c
+++ b/net/caif/cffrml.c
@@ -84,7 +84,7 @@ static int cffrml_receive(struct cflayer *layr, struct cfpkt *pkt)
84 u16 tmp; 84 u16 tmp;
85 u16 len; 85 u16 len;
86 u16 hdrchks; 86 u16 hdrchks;
87 u16 pktchks; 87 int pktchks;
88 struct cffrml *this; 88 struct cffrml *this;
89 this = container_obj(layr); 89 this = container_obj(layr);
90 90
diff --git a/net/caif/cfpkt_skbuff.c b/net/caif/cfpkt_skbuff.c
index 1be0b521ac49..f6c3b2137eea 100644
--- a/net/caif/cfpkt_skbuff.c
+++ b/net/caif/cfpkt_skbuff.c
@@ -255,9 +255,9 @@ inline u16 cfpkt_getlen(struct cfpkt *pkt)
255 return skb->len; 255 return skb->len;
256} 256}
257 257
258inline u16 cfpkt_iterate(struct cfpkt *pkt, 258int cfpkt_iterate(struct cfpkt *pkt,
259 u16 (*iter_func)(u16, void *, u16), 259 u16 (*iter_func)(u16, void *, u16),
260 u16 data) 260 u16 data)
261{ 261{
262 /* 262 /*
263 * Don't care about the performance hit of linearizing, 263 * Don't care about the performance hit of linearizing,
diff --git a/net/can/af_can.c b/net/can/af_can.c
index 66e08040ced7..32d710eaf1fc 100644
--- a/net/can/af_can.c
+++ b/net/can/af_can.c
@@ -259,6 +259,9 @@ int can_send(struct sk_buff *skb, int loop)
259 goto inval_skb; 259 goto inval_skb;
260 } 260 }
261 261
262 skb->ip_summed = CHECKSUM_UNNECESSARY;
263
264 skb_reset_mac_header(skb);
262 skb_reset_network_header(skb); 265 skb_reset_network_header(skb);
263 skb_reset_transport_header(skb); 266 skb_reset_transport_header(skb);
264 267
diff --git a/net/compat.c b/net/compat.c
index 3236b4167a32..94d3d5e97883 100644
--- a/net/compat.c
+++ b/net/compat.c
@@ -711,24 +711,18 @@ static unsigned char nas[21] = {
711 711
712COMPAT_SYSCALL_DEFINE3(sendmsg, int, fd, struct compat_msghdr __user *, msg, unsigned int, flags) 712COMPAT_SYSCALL_DEFINE3(sendmsg, int, fd, struct compat_msghdr __user *, msg, unsigned int, flags)
713{ 713{
714 if (flags & MSG_CMSG_COMPAT)
715 return -EINVAL;
716 return __sys_sendmsg(fd, (struct user_msghdr __user *)msg, flags | MSG_CMSG_COMPAT); 714 return __sys_sendmsg(fd, (struct user_msghdr __user *)msg, flags | MSG_CMSG_COMPAT);
717} 715}
718 716
719COMPAT_SYSCALL_DEFINE4(sendmmsg, int, fd, struct compat_mmsghdr __user *, mmsg, 717COMPAT_SYSCALL_DEFINE4(sendmmsg, int, fd, struct compat_mmsghdr __user *, mmsg,
720 unsigned int, vlen, unsigned int, flags) 718 unsigned int, vlen, unsigned int, flags)
721{ 719{
722 if (flags & MSG_CMSG_COMPAT)
723 return -EINVAL;
724 return __sys_sendmmsg(fd, (struct mmsghdr __user *)mmsg, vlen, 720 return __sys_sendmmsg(fd, (struct mmsghdr __user *)mmsg, vlen,
725 flags | MSG_CMSG_COMPAT); 721 flags | MSG_CMSG_COMPAT);
726} 722}
727 723
728COMPAT_SYSCALL_DEFINE3(recvmsg, int, fd, struct compat_msghdr __user *, msg, unsigned int, flags) 724COMPAT_SYSCALL_DEFINE3(recvmsg, int, fd, struct compat_msghdr __user *, msg, unsigned int, flags)
729{ 725{
730 if (flags & MSG_CMSG_COMPAT)
731 return -EINVAL;
732 return __sys_recvmsg(fd, (struct user_msghdr __user *)msg, flags | MSG_CMSG_COMPAT); 726 return __sys_recvmsg(fd, (struct user_msghdr __user *)msg, flags | MSG_CMSG_COMPAT);
733} 727}
734 728
@@ -751,9 +745,6 @@ COMPAT_SYSCALL_DEFINE5(recvmmsg, int, fd, struct compat_mmsghdr __user *, mmsg,
751 int datagrams; 745 int datagrams;
752 struct timespec ktspec; 746 struct timespec ktspec;
753 747
754 if (flags & MSG_CMSG_COMPAT)
755 return -EINVAL;
756
757 if (timeout == NULL) 748 if (timeout == NULL)
758 return __sys_recvmmsg(fd, (struct mmsghdr __user *)mmsg, vlen, 749 return __sys_recvmmsg(fd, (struct mmsghdr __user *)mmsg, vlen,
759 flags | MSG_CMSG_COMPAT, NULL); 750 flags | MSG_CMSG_COMPAT, NULL);
diff --git a/net/core/dev.c b/net/core/dev.c
index 8f9710c62e20..962ee9d71964 100644
--- a/net/core/dev.c
+++ b/net/core/dev.c
@@ -946,7 +946,7 @@ bool dev_valid_name(const char *name)
946 return false; 946 return false;
947 947
948 while (*name) { 948 while (*name) {
949 if (*name == '/' || isspace(*name)) 949 if (*name == '/' || *name == ':' || isspace(*name))
950 return false; 950 return false;
951 name++; 951 name++;
952 } 952 }
diff --git a/net/core/ethtool.c b/net/core/ethtool.c
index 91f74f3eb204..aa378ecef186 100644
--- a/net/core/ethtool.c
+++ b/net/core/ethtool.c
@@ -98,6 +98,7 @@ static const char netdev_features_strings[NETDEV_FEATURE_COUNT][ETH_GSTRING_LEN]
98 [NETIF_F_RXALL_BIT] = "rx-all", 98 [NETIF_F_RXALL_BIT] = "rx-all",
99 [NETIF_F_HW_L2FW_DOFFLOAD_BIT] = "l2-fwd-offload", 99 [NETIF_F_HW_L2FW_DOFFLOAD_BIT] = "l2-fwd-offload",
100 [NETIF_F_BUSY_POLL_BIT] = "busy-poll", 100 [NETIF_F_BUSY_POLL_BIT] = "busy-poll",
101 [NETIF_F_HW_SWITCH_OFFLOAD_BIT] = "hw-switch-offload",
101}; 102};
102 103
103static const char 104static const char
diff --git a/net/core/gen_stats.c b/net/core/gen_stats.c
index 0c08062d1796..1e2f46a69d50 100644
--- a/net/core/gen_stats.c
+++ b/net/core/gen_stats.c
@@ -32,6 +32,9 @@ gnet_stats_copy(struct gnet_dump *d, int type, void *buf, int size)
32 return 0; 32 return 0;
33 33
34nla_put_failure: 34nla_put_failure:
35 kfree(d->xstats);
36 d->xstats = NULL;
37 d->xstats_len = 0;
35 spin_unlock_bh(d->lock); 38 spin_unlock_bh(d->lock);
36 return -1; 39 return -1;
37} 40}
@@ -305,7 +308,9 @@ int
305gnet_stats_copy_app(struct gnet_dump *d, void *st, int len) 308gnet_stats_copy_app(struct gnet_dump *d, void *st, int len)
306{ 309{
307 if (d->compat_xstats) { 310 if (d->compat_xstats) {
308 d->xstats = st; 311 d->xstats = kmemdup(st, len, GFP_ATOMIC);
312 if (!d->xstats)
313 goto err_out;
309 d->xstats_len = len; 314 d->xstats_len = len;
310 } 315 }
311 316
@@ -313,6 +318,11 @@ gnet_stats_copy_app(struct gnet_dump *d, void *st, int len)
313 return gnet_stats_copy(d, TCA_STATS_APP, st, len); 318 return gnet_stats_copy(d, TCA_STATS_APP, st, len);
314 319
315 return 0; 320 return 0;
321
322err_out:
323 d->xstats_len = 0;
324 spin_unlock_bh(d->lock);
325 return -1;
316} 326}
317EXPORT_SYMBOL(gnet_stats_copy_app); 327EXPORT_SYMBOL(gnet_stats_copy_app);
318 328
@@ -345,6 +355,9 @@ gnet_stats_finish_copy(struct gnet_dump *d)
345 return -1; 355 return -1;
346 } 356 }
347 357
358 kfree(d->xstats);
359 d->xstats = NULL;
360 d->xstats_len = 0;
348 spin_unlock_bh(d->lock); 361 spin_unlock_bh(d->lock);
349 return 0; 362 return 0;
350} 363}
diff --git a/net/core/pktgen.c b/net/core/pktgen.c
index b4899f5b7388..508155b283dd 100644
--- a/net/core/pktgen.c
+++ b/net/core/pktgen.c
@@ -1134,6 +1134,9 @@ static ssize_t pktgen_if_write(struct file *file,
1134 return len; 1134 return len;
1135 1135
1136 i += len; 1136 i += len;
1137 if ((value > 1) &&
1138 (!(pkt_dev->odev->priv_flags & IFF_TX_SKB_SHARING)))
1139 return -ENOTSUPP;
1137 pkt_dev->burst = value < 1 ? 1 : value; 1140 pkt_dev->burst = value < 1 ? 1 : value;
1138 sprintf(pg_result, "OK: burst=%d", pkt_dev->burst); 1141 sprintf(pg_result, "OK: burst=%d", pkt_dev->burst);
1139 return count; 1142 return count;
diff --git a/net/core/rtnetlink.c b/net/core/rtnetlink.c
index ab293a3066b3..ee0608bb3bc0 100644
--- a/net/core/rtnetlink.c
+++ b/net/core/rtnetlink.c
@@ -1300,7 +1300,6 @@ static int rtnl_dump_ifinfo(struct sk_buff *skb, struct netlink_callback *cb)
1300 s_h = cb->args[0]; 1300 s_h = cb->args[0];
1301 s_idx = cb->args[1]; 1301 s_idx = cb->args[1];
1302 1302
1303 rcu_read_lock();
1304 cb->seq = net->dev_base_seq; 1303 cb->seq = net->dev_base_seq;
1305 1304
1306 /* A hack to preserve kernel<->userspace interface. 1305 /* A hack to preserve kernel<->userspace interface.
@@ -1322,7 +1321,7 @@ static int rtnl_dump_ifinfo(struct sk_buff *skb, struct netlink_callback *cb)
1322 for (h = s_h; h < NETDEV_HASHENTRIES; h++, s_idx = 0) { 1321 for (h = s_h; h < NETDEV_HASHENTRIES; h++, s_idx = 0) {
1323 idx = 0; 1322 idx = 0;
1324 head = &net->dev_index_head[h]; 1323 head = &net->dev_index_head[h];
1325 hlist_for_each_entry_rcu(dev, head, index_hlist) { 1324 hlist_for_each_entry(dev, head, index_hlist) {
1326 if (idx < s_idx) 1325 if (idx < s_idx)
1327 goto cont; 1326 goto cont;
1328 err = rtnl_fill_ifinfo(skb, dev, RTM_NEWLINK, 1327 err = rtnl_fill_ifinfo(skb, dev, RTM_NEWLINK,
@@ -1344,7 +1343,6 @@ cont:
1344 } 1343 }
1345 } 1344 }
1346out: 1345out:
1347 rcu_read_unlock();
1348 cb->args[1] = idx; 1346 cb->args[1] = idx;
1349 cb->args[0] = h; 1347 cb->args[0] = h;
1350 1348
@@ -2012,8 +2010,8 @@ replay:
2012 } 2010 }
2013 2011
2014 if (1) { 2012 if (1) {
2015 struct nlattr *attr[ops ? ops->maxtype + 1 : 0]; 2013 struct nlattr *attr[ops ? ops->maxtype + 1 : 1];
2016 struct nlattr *slave_attr[m_ops ? m_ops->slave_maxtype + 1 : 0]; 2014 struct nlattr *slave_attr[m_ops ? m_ops->slave_maxtype + 1 : 1];
2017 struct nlattr **data = NULL; 2015 struct nlattr **data = NULL;
2018 struct nlattr **slave_data = NULL; 2016 struct nlattr **slave_data = NULL;
2019 struct net *dest_net, *link_net = NULL; 2017 struct net *dest_net, *link_net = NULL;
@@ -2122,6 +2120,10 @@ replay:
2122 if (IS_ERR(dest_net)) 2120 if (IS_ERR(dest_net))
2123 return PTR_ERR(dest_net); 2121 return PTR_ERR(dest_net);
2124 2122
2123 err = -EPERM;
2124 if (!netlink_ns_capable(skb, dest_net->user_ns, CAP_NET_ADMIN))
2125 goto out;
2126
2125 if (tb[IFLA_LINK_NETNSID]) { 2127 if (tb[IFLA_LINK_NETNSID]) {
2126 int id = nla_get_s32(tb[IFLA_LINK_NETNSID]); 2128 int id = nla_get_s32(tb[IFLA_LINK_NETNSID]);
2127 2129
@@ -2130,6 +2132,9 @@ replay:
2130 err = -EINVAL; 2132 err = -EINVAL;
2131 goto out; 2133 goto out;
2132 } 2134 }
2135 err = -EPERM;
2136 if (!netlink_ns_capable(skb, link_net->user_ns, CAP_NET_ADMIN))
2137 goto out;
2133 } 2138 }
2134 2139
2135 dev = rtnl_create_link(link_net ? : dest_net, ifname, 2140 dev = rtnl_create_link(link_net ? : dest_net, ifname,
@@ -2161,28 +2166,28 @@ replay:
2161 } 2166 }
2162 } 2167 }
2163 err = rtnl_configure_link(dev, ifm); 2168 err = rtnl_configure_link(dev, ifm);
2164 if (err < 0) { 2169 if (err < 0)
2165 if (ops->newlink) { 2170 goto out_unregister;
2166 LIST_HEAD(list_kill);
2167
2168 ops->dellink(dev, &list_kill);
2169 unregister_netdevice_many(&list_kill);
2170 } else {
2171 unregister_netdevice(dev);
2172 }
2173 goto out;
2174 }
2175
2176 if (link_net) { 2171 if (link_net) {
2177 err = dev_change_net_namespace(dev, dest_net, ifname); 2172 err = dev_change_net_namespace(dev, dest_net, ifname);
2178 if (err < 0) 2173 if (err < 0)
2179 unregister_netdevice(dev); 2174 goto out_unregister;
2180 } 2175 }
2181out: 2176out:
2182 if (link_net) 2177 if (link_net)
2183 put_net(link_net); 2178 put_net(link_net);
2184 put_net(dest_net); 2179 put_net(dest_net);
2185 return err; 2180 return err;
2181out_unregister:
2182 if (ops->newlink) {
2183 LIST_HEAD(list_kill);
2184
2185 ops->dellink(dev, &list_kill);
2186 unregister_netdevice_many(&list_kill);
2187 } else {
2188 unregister_netdevice(dev);
2189 }
2190 goto out;
2186 } 2191 }
2187} 2192}
2188 2193
diff --git a/net/core/skbuff.c b/net/core/skbuff.c
index 88c613eab142..8e4ac97c8477 100644
--- a/net/core/skbuff.c
+++ b/net/core/skbuff.c
@@ -3621,13 +3621,14 @@ struct sk_buff *sock_dequeue_err_skb(struct sock *sk)
3621{ 3621{
3622 struct sk_buff_head *q = &sk->sk_error_queue; 3622 struct sk_buff_head *q = &sk->sk_error_queue;
3623 struct sk_buff *skb, *skb_next; 3623 struct sk_buff *skb, *skb_next;
3624 unsigned long flags;
3624 int err = 0; 3625 int err = 0;
3625 3626
3626 spin_lock_bh(&q->lock); 3627 spin_lock_irqsave(&q->lock, flags);
3627 skb = __skb_dequeue(q); 3628 skb = __skb_dequeue(q);
3628 if (skb && (skb_next = skb_peek(q))) 3629 if (skb && (skb_next = skb_peek(q)))
3629 err = SKB_EXT_ERR(skb_next)->ee.ee_errno; 3630 err = SKB_EXT_ERR(skb_next)->ee.ee_errno;
3630 spin_unlock_bh(&q->lock); 3631 spin_unlock_irqrestore(&q->lock, flags);
3631 3632
3632 sk->sk_err = err; 3633 sk->sk_err = err;
3633 if (err) 3634 if (err)
@@ -3732,9 +3733,13 @@ void __skb_tstamp_tx(struct sk_buff *orig_skb,
3732 struct sock *sk, int tstype) 3733 struct sock *sk, int tstype)
3733{ 3734{
3734 struct sk_buff *skb; 3735 struct sk_buff *skb;
3735 bool tsonly = sk->sk_tsflags & SOF_TIMESTAMPING_OPT_TSONLY; 3736 bool tsonly;
3737
3738 if (!sk)
3739 return;
3736 3740
3737 if (!sk || !skb_may_tx_timestamp(sk, tsonly)) 3741 tsonly = sk->sk_tsflags & SOF_TIMESTAMPING_OPT_TSONLY;
3742 if (!skb_may_tx_timestamp(sk, tsonly))
3738 return; 3743 return;
3739 3744
3740 if (tsonly) 3745 if (tsonly)
@@ -4172,7 +4177,7 @@ void skb_scrub_packet(struct sk_buff *skb, bool xnet)
4172 skb->ignore_df = 0; 4177 skb->ignore_df = 0;
4173 skb_dst_drop(skb); 4178 skb_dst_drop(skb);
4174 skb->mark = 0; 4179 skb->mark = 0;
4175 skb->sender_cpu = 0; 4180 skb_sender_cpu_clear(skb);
4176 skb_init_secmark(skb); 4181 skb_init_secmark(skb);
4177 secpath_reset(skb); 4182 secpath_reset(skb);
4178 nf_reset(skb); 4183 nf_reset(skb);
diff --git a/net/core/sock.c b/net/core/sock.c
index 93c8b20c91e4..78e89eb7eb70 100644
--- a/net/core/sock.c
+++ b/net/core/sock.c
@@ -1655,6 +1655,10 @@ void sock_rfree(struct sk_buff *skb)
1655} 1655}
1656EXPORT_SYMBOL(sock_rfree); 1656EXPORT_SYMBOL(sock_rfree);
1657 1657
1658/*
1659 * Buffer destructor for skbs that are not used directly in read or write
1660 * path, e.g. for error handler skbs. Automatically called from kfree_skb.
1661 */
1658void sock_efree(struct sk_buff *skb) 1662void sock_efree(struct sk_buff *skb)
1659{ 1663{
1660 sock_put(skb->sk); 1664 sock_put(skb->sk);
diff --git a/net/core/sysctl_net_core.c b/net/core/sysctl_net_core.c
index 433424804284..8ce351ffceb1 100644
--- a/net/core/sysctl_net_core.c
+++ b/net/core/sysctl_net_core.c
@@ -25,6 +25,8 @@
25static int zero = 0; 25static int zero = 0;
26static int one = 1; 26static int one = 1;
27static int ushort_max = USHRT_MAX; 27static int ushort_max = USHRT_MAX;
28static int min_sndbuf = SOCK_MIN_SNDBUF;
29static int min_rcvbuf = SOCK_MIN_RCVBUF;
28 30
29static int net_msg_warn; /* Unused, but still a sysctl */ 31static int net_msg_warn; /* Unused, but still a sysctl */
30 32
@@ -237,7 +239,7 @@ static struct ctl_table net_core_table[] = {
237 .maxlen = sizeof(int), 239 .maxlen = sizeof(int),
238 .mode = 0644, 240 .mode = 0644,
239 .proc_handler = proc_dointvec_minmax, 241 .proc_handler = proc_dointvec_minmax,
240 .extra1 = &one, 242 .extra1 = &min_sndbuf,
241 }, 243 },
242 { 244 {
243 .procname = "rmem_max", 245 .procname = "rmem_max",
@@ -245,7 +247,7 @@ static struct ctl_table net_core_table[] = {
245 .maxlen = sizeof(int), 247 .maxlen = sizeof(int),
246 .mode = 0644, 248 .mode = 0644,
247 .proc_handler = proc_dointvec_minmax, 249 .proc_handler = proc_dointvec_minmax,
248 .extra1 = &one, 250 .extra1 = &min_rcvbuf,
249 }, 251 },
250 { 252 {
251 .procname = "wmem_default", 253 .procname = "wmem_default",
@@ -253,7 +255,7 @@ static struct ctl_table net_core_table[] = {
253 .maxlen = sizeof(int), 255 .maxlen = sizeof(int),
254 .mode = 0644, 256 .mode = 0644,
255 .proc_handler = proc_dointvec_minmax, 257 .proc_handler = proc_dointvec_minmax,
256 .extra1 = &one, 258 .extra1 = &min_sndbuf,
257 }, 259 },
258 { 260 {
259 .procname = "rmem_default", 261 .procname = "rmem_default",
@@ -261,7 +263,7 @@ static struct ctl_table net_core_table[] = {
261 .maxlen = sizeof(int), 263 .maxlen = sizeof(int),
262 .mode = 0644, 264 .mode = 0644,
263 .proc_handler = proc_dointvec_minmax, 265 .proc_handler = proc_dointvec_minmax,
264 .extra1 = &one, 266 .extra1 = &min_rcvbuf,
265 }, 267 },
266 { 268 {
267 .procname = "dev_weight", 269 .procname = "dev_weight",
diff --git a/net/decnet/dn_route.c b/net/decnet/dn_route.c
index 1d7c1256e845..3b81092771f8 100644
--- a/net/decnet/dn_route.c
+++ b/net/decnet/dn_route.c
@@ -1062,7 +1062,7 @@ source_ok:
1062 if (decnet_debug_level & 16) 1062 if (decnet_debug_level & 16)
1063 printk(KERN_DEBUG 1063 printk(KERN_DEBUG
1064 "dn_route_output_slow: initial checks complete." 1064 "dn_route_output_slow: initial checks complete."
1065 " dst=%o4x src=%04x oif=%d try_hard=%d\n", 1065 " dst=%04x src=%04x oif=%d try_hard=%d\n",
1066 le16_to_cpu(fld.daddr), le16_to_cpu(fld.saddr), 1066 le16_to_cpu(fld.daddr), le16_to_cpu(fld.saddr),
1067 fld.flowidn_oif, try_hard); 1067 fld.flowidn_oif, try_hard);
1068 1068
diff --git a/net/hsr/hsr_device.c b/net/hsr/hsr_device.c
index a138d75751df..44d27469ae55 100644
--- a/net/hsr/hsr_device.c
+++ b/net/hsr/hsr_device.c
@@ -359,8 +359,11 @@ static void hsr_dev_destroy(struct net_device *hsr_dev)
359 struct hsr_port *port; 359 struct hsr_port *port;
360 360
361 hsr = netdev_priv(hsr_dev); 361 hsr = netdev_priv(hsr_dev);
362
363 rtnl_lock();
362 hsr_for_each_port(hsr, port) 364 hsr_for_each_port(hsr, port)
363 hsr_del_port(port); 365 hsr_del_port(port);
366 rtnl_unlock();
364 367
365 del_timer_sync(&hsr->prune_timer); 368 del_timer_sync(&hsr->prune_timer);
366 del_timer_sync(&hsr->announce_timer); 369 del_timer_sync(&hsr->announce_timer);
diff --git a/net/hsr/hsr_main.c b/net/hsr/hsr_main.c
index 779d28b65417..cd37d0011b42 100644
--- a/net/hsr/hsr_main.c
+++ b/net/hsr/hsr_main.c
@@ -36,6 +36,10 @@ static int hsr_netdev_notify(struct notifier_block *nb, unsigned long event,
36 return NOTIFY_DONE; /* Not an HSR device */ 36 return NOTIFY_DONE; /* Not an HSR device */
37 hsr = netdev_priv(dev); 37 hsr = netdev_priv(dev);
38 port = hsr_port_get_hsr(hsr, HSR_PT_MASTER); 38 port = hsr_port_get_hsr(hsr, HSR_PT_MASTER);
39 if (port == NULL) {
40 /* Resend of notification concerning removed device? */
41 return NOTIFY_DONE;
42 }
39 } else { 43 } else {
40 hsr = port->hsr; 44 hsr = port->hsr;
41 } 45 }
diff --git a/net/hsr/hsr_slave.c b/net/hsr/hsr_slave.c
index a348dcbcd683..7d37366cc695 100644
--- a/net/hsr/hsr_slave.c
+++ b/net/hsr/hsr_slave.c
@@ -181,8 +181,10 @@ void hsr_del_port(struct hsr_port *port)
181 list_del_rcu(&port->port_list); 181 list_del_rcu(&port->port_list);
182 182
183 if (port != master) { 183 if (port != master) {
184 netdev_update_features(master->dev); 184 if (master != NULL) {
185 dev_set_mtu(master->dev, hsr_get_max_mtu(hsr)); 185 netdev_update_features(master->dev);
186 dev_set_mtu(master->dev, hsr_get_max_mtu(hsr));
187 }
186 netdev_rx_handler_unregister(port->dev); 188 netdev_rx_handler_unregister(port->dev);
187 dev_set_promiscuity(port->dev, -1); 189 dev_set_promiscuity(port->dev, -1);
188 } 190 }
@@ -192,5 +194,7 @@ void hsr_del_port(struct hsr_port *port)
192 */ 194 */
193 195
194 synchronize_rcu(); 196 synchronize_rcu();
195 dev_put(port->dev); 197
198 if (port != master)
199 dev_put(port->dev);
196} 200}
diff --git a/net/ipv4/inet_connection_sock.c b/net/ipv4/inet_connection_sock.c
index 14d02ea905b6..3e44b9b0b78e 100644
--- a/net/ipv4/inet_connection_sock.c
+++ b/net/ipv4/inet_connection_sock.c
@@ -268,6 +268,7 @@ static int inet_csk_wait_for_connect(struct sock *sk, long timeo)
268 release_sock(sk); 268 release_sock(sk);
269 if (reqsk_queue_empty(&icsk->icsk_accept_queue)) 269 if (reqsk_queue_empty(&icsk->icsk_accept_queue))
270 timeo = schedule_timeout(timeo); 270 timeo = schedule_timeout(timeo);
271 sched_annotate_sleep();
271 lock_sock(sk); 272 lock_sock(sk);
272 err = 0; 273 err = 0;
273 if (!reqsk_queue_empty(&icsk->icsk_accept_queue)) 274 if (!reqsk_queue_empty(&icsk->icsk_accept_queue))
diff --git a/net/ipv4/inet_diag.c b/net/ipv4/inet_diag.c
index 81751f12645f..592aff37366b 100644
--- a/net/ipv4/inet_diag.c
+++ b/net/ipv4/inet_diag.c
@@ -71,6 +71,20 @@ static inline void inet_diag_unlock_handler(
71 mutex_unlock(&inet_diag_table_mutex); 71 mutex_unlock(&inet_diag_table_mutex);
72} 72}
73 73
74static size_t inet_sk_attr_size(void)
75{
76 return nla_total_size(sizeof(struct tcp_info))
77 + nla_total_size(1) /* INET_DIAG_SHUTDOWN */
78 + nla_total_size(1) /* INET_DIAG_TOS */
79 + nla_total_size(1) /* INET_DIAG_TCLASS */
80 + nla_total_size(sizeof(struct inet_diag_meminfo))
81 + nla_total_size(sizeof(struct inet_diag_msg))
82 + nla_total_size(SK_MEMINFO_VARS * sizeof(u32))
83 + nla_total_size(TCP_CA_NAME_MAX)
84 + nla_total_size(sizeof(struct tcpvegas_info))
85 + 64;
86}
87
74int inet_sk_diag_fill(struct sock *sk, struct inet_connection_sock *icsk, 88int inet_sk_diag_fill(struct sock *sk, struct inet_connection_sock *icsk,
75 struct sk_buff *skb, struct inet_diag_req_v2 *req, 89 struct sk_buff *skb, struct inet_diag_req_v2 *req,
76 struct user_namespace *user_ns, 90 struct user_namespace *user_ns,
@@ -326,9 +340,7 @@ int inet_diag_dump_one_icsk(struct inet_hashinfo *hashinfo, struct sk_buff *in_s
326 if (err) 340 if (err)
327 goto out; 341 goto out;
328 342
329 rep = nlmsg_new(sizeof(struct inet_diag_msg) + 343 rep = nlmsg_new(inet_sk_attr_size(), GFP_KERNEL);
330 sizeof(struct inet_diag_meminfo) +
331 sizeof(struct tcp_info) + 64, GFP_KERNEL);
332 if (!rep) { 344 if (!rep) {
333 err = -ENOMEM; 345 err = -ENOMEM;
334 goto out; 346 goto out;
diff --git a/net/ipv4/ip_forward.c b/net/ipv4/ip_forward.c
index 787b3c294ce6..d9bc28ac5d1b 100644
--- a/net/ipv4/ip_forward.c
+++ b/net/ipv4/ip_forward.c
@@ -67,6 +67,7 @@ static int ip_forward_finish(struct sk_buff *skb)
67 if (unlikely(opt->optlen)) 67 if (unlikely(opt->optlen))
68 ip_forward_options(skb); 68 ip_forward_options(skb);
69 69
70 skb_sender_cpu_clear(skb);
70 return dst_output(skb); 71 return dst_output(skb);
71} 72}
72 73
diff --git a/net/ipv4/ip_fragment.c b/net/ipv4/ip_fragment.c
index e5b6d0ddcb58..145a50c4d566 100644
--- a/net/ipv4/ip_fragment.c
+++ b/net/ipv4/ip_fragment.c
@@ -659,27 +659,30 @@ EXPORT_SYMBOL(ip_defrag);
659struct sk_buff *ip_check_defrag(struct sk_buff *skb, u32 user) 659struct sk_buff *ip_check_defrag(struct sk_buff *skb, u32 user)
660{ 660{
661 struct iphdr iph; 661 struct iphdr iph;
662 int netoff;
662 u32 len; 663 u32 len;
663 664
664 if (skb->protocol != htons(ETH_P_IP)) 665 if (skb->protocol != htons(ETH_P_IP))
665 return skb; 666 return skb;
666 667
667 if (!skb_copy_bits(skb, 0, &iph, sizeof(iph))) 668 netoff = skb_network_offset(skb);
669
670 if (skb_copy_bits(skb, netoff, &iph, sizeof(iph)) < 0)
668 return skb; 671 return skb;
669 672
670 if (iph.ihl < 5 || iph.version != 4) 673 if (iph.ihl < 5 || iph.version != 4)
671 return skb; 674 return skb;
672 675
673 len = ntohs(iph.tot_len); 676 len = ntohs(iph.tot_len);
674 if (skb->len < len || len < (iph.ihl * 4)) 677 if (skb->len < netoff + len || len < (iph.ihl * 4))
675 return skb; 678 return skb;
676 679
677 if (ip_is_fragment(&iph)) { 680 if (ip_is_fragment(&iph)) {
678 skb = skb_share_check(skb, GFP_ATOMIC); 681 skb = skb_share_check(skb, GFP_ATOMIC);
679 if (skb) { 682 if (skb) {
680 if (!pskb_may_pull(skb, iph.ihl*4)) 683 if (!pskb_may_pull(skb, netoff + iph.ihl * 4))
681 return skb; 684 return skb;
682 if (pskb_trim_rcsum(skb, len)) 685 if (pskb_trim_rcsum(skb, netoff + len))
683 return skb; 686 return skb;
684 memset(IPCB(skb), 0, sizeof(struct inet_skb_parm)); 687 memset(IPCB(skb), 0, sizeof(struct inet_skb_parm));
685 if (ip_defrag(skb, user)) 688 if (ip_defrag(skb, user))
diff --git a/net/ipv4/ip_output.c b/net/ipv4/ip_output.c
index d68199d9b2b0..a7aea2048a0d 100644
--- a/net/ipv4/ip_output.c
+++ b/net/ipv4/ip_output.c
@@ -888,7 +888,8 @@ static int __ip_append_data(struct sock *sk,
888 cork->length += length; 888 cork->length += length;
889 if (((length > mtu) || (skb && skb_is_gso(skb))) && 889 if (((length > mtu) || (skb && skb_is_gso(skb))) &&
890 (sk->sk_protocol == IPPROTO_UDP) && 890 (sk->sk_protocol == IPPROTO_UDP) &&
891 (rt->dst.dev->features & NETIF_F_UFO) && !rt->dst.header_len) { 891 (rt->dst.dev->features & NETIF_F_UFO) && !rt->dst.header_len &&
892 (sk->sk_type == SOCK_DGRAM)) {
892 err = ip_ufo_append_data(sk, queue, getfrag, from, length, 893 err = ip_ufo_append_data(sk, queue, getfrag, from, length,
893 hh_len, fragheaderlen, transhdrlen, 894 hh_len, fragheaderlen, transhdrlen,
894 maxfraglen, flags); 895 maxfraglen, flags);
diff --git a/net/ipv4/ip_sockglue.c b/net/ipv4/ip_sockglue.c
index 31d8c71986b4..5cd99271d3a6 100644
--- a/net/ipv4/ip_sockglue.c
+++ b/net/ipv4/ip_sockglue.c
@@ -432,17 +432,32 @@ void ip_local_error(struct sock *sk, int err, __be32 daddr, __be16 port, u32 inf
432 kfree_skb(skb); 432 kfree_skb(skb);
433} 433}
434 434
435static bool ipv4_pktinfo_prepare_errqueue(const struct sock *sk, 435/* IPv4 supports cmsg on all imcp errors and some timestamps
436 const struct sk_buff *skb, 436 *
437 int ee_origin) 437 * Timestamp code paths do not initialize the fields expected by cmsg:
438 * the PKTINFO fields in skb->cb[]. Fill those in here.
439 */
440static bool ipv4_datagram_support_cmsg(const struct sock *sk,
441 struct sk_buff *skb,
442 int ee_origin)
438{ 443{
439 struct in_pktinfo *info = PKTINFO_SKB_CB(skb); 444 struct in_pktinfo *info;
445
446 if (ee_origin == SO_EE_ORIGIN_ICMP)
447 return true;
440 448
441 if ((ee_origin != SO_EE_ORIGIN_TIMESTAMPING) || 449 if (ee_origin == SO_EE_ORIGIN_LOCAL)
442 (!(sk->sk_tsflags & SOF_TIMESTAMPING_OPT_CMSG)) || 450 return false;
451
452 /* Support IP_PKTINFO on tstamp packets if requested, to correlate
453 * timestamp with egress dev. Not possible for packets without dev
454 * or without payload (SOF_TIMESTAMPING_OPT_TSONLY).
455 */
456 if ((!(sk->sk_tsflags & SOF_TIMESTAMPING_OPT_CMSG)) ||
443 (!skb->dev)) 457 (!skb->dev))
444 return false; 458 return false;
445 459
460 info = PKTINFO_SKB_CB(skb);
446 info->ipi_spec_dst.s_addr = ip_hdr(skb)->saddr; 461 info->ipi_spec_dst.s_addr = ip_hdr(skb)->saddr;
447 info->ipi_ifindex = skb->dev->ifindex; 462 info->ipi_ifindex = skb->dev->ifindex;
448 return true; 463 return true;
@@ -483,7 +498,7 @@ int ip_recv_error(struct sock *sk, struct msghdr *msg, int len, int *addr_len)
483 498
484 serr = SKB_EXT_ERR(skb); 499 serr = SKB_EXT_ERR(skb);
485 500
486 if (sin && skb->len) { 501 if (sin && serr->port) {
487 sin->sin_family = AF_INET; 502 sin->sin_family = AF_INET;
488 sin->sin_addr.s_addr = *(__be32 *)(skb_network_header(skb) + 503 sin->sin_addr.s_addr = *(__be32 *)(skb_network_header(skb) +
489 serr->addr_offset); 504 serr->addr_offset);
@@ -496,9 +511,7 @@ int ip_recv_error(struct sock *sk, struct msghdr *msg, int len, int *addr_len)
496 sin = &errhdr.offender; 511 sin = &errhdr.offender;
497 memset(sin, 0, sizeof(*sin)); 512 memset(sin, 0, sizeof(*sin));
498 513
499 if (skb->len && 514 if (ipv4_datagram_support_cmsg(sk, skb, serr->ee.ee_origin)) {
500 (serr->ee.ee_origin == SO_EE_ORIGIN_ICMP ||
501 ipv4_pktinfo_prepare_errqueue(sk, skb, serr->ee.ee_origin))) {
502 sin->sin_family = AF_INET; 515 sin->sin_family = AF_INET;
503 sin->sin_addr.s_addr = ip_hdr(skb)->saddr; 516 sin->sin_addr.s_addr = ip_hdr(skb)->saddr;
504 if (inet_sk(sk)->cmsg_flags) 517 if (inet_sk(sk)->cmsg_flags)
diff --git a/net/ipv4/ping.c b/net/ipv4/ping.c
index e9f66e1cda50..208d5439e59b 100644
--- a/net/ipv4/ping.c
+++ b/net/ipv4/ping.c
@@ -259,6 +259,9 @@ int ping_init_sock(struct sock *sk)
259 kgid_t low, high; 259 kgid_t low, high;
260 int ret = 0; 260 int ret = 0;
261 261
262 if (sk->sk_family == AF_INET6)
263 sk->sk_ipv6only = 1;
264
262 inet_get_ping_group_range_net(net, &low, &high); 265 inet_get_ping_group_range_net(net, &low, &high);
263 if (gid_lte(low, group) && gid_lte(group, high)) 266 if (gid_lte(low, group) && gid_lte(group, high))
264 return 0; 267 return 0;
@@ -305,6 +308,11 @@ static int ping_check_bind_addr(struct sock *sk, struct inet_sock *isk,
305 if (addr_len < sizeof(*addr)) 308 if (addr_len < sizeof(*addr))
306 return -EINVAL; 309 return -EINVAL;
307 310
311 if (addr->sin_family != AF_INET &&
312 !(addr->sin_family == AF_UNSPEC &&
313 addr->sin_addr.s_addr == htonl(INADDR_ANY)))
314 return -EAFNOSUPPORT;
315
308 pr_debug("ping_check_bind_addr(sk=%p,addr=%pI4,port=%d)\n", 316 pr_debug("ping_check_bind_addr(sk=%p,addr=%pI4,port=%d)\n",
309 sk, &addr->sin_addr.s_addr, ntohs(addr->sin_port)); 317 sk, &addr->sin_addr.s_addr, ntohs(addr->sin_port));
310 318
@@ -330,7 +338,7 @@ static int ping_check_bind_addr(struct sock *sk, struct inet_sock *isk,
330 return -EINVAL; 338 return -EINVAL;
331 339
332 if (addr->sin6_family != AF_INET6) 340 if (addr->sin6_family != AF_INET6)
333 return -EINVAL; 341 return -EAFNOSUPPORT;
334 342
335 pr_debug("ping_check_bind_addr(sk=%p,addr=%pI6c,port=%d)\n", 343 pr_debug("ping_check_bind_addr(sk=%p,addr=%pI6c,port=%d)\n",
336 sk, addr->sin6_addr.s6_addr, ntohs(addr->sin6_port)); 344 sk, addr->sin6_addr.s6_addr, ntohs(addr->sin6_port));
@@ -716,7 +724,7 @@ static int ping_v4_sendmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *m
716 if (msg->msg_namelen < sizeof(*usin)) 724 if (msg->msg_namelen < sizeof(*usin))
717 return -EINVAL; 725 return -EINVAL;
718 if (usin->sin_family != AF_INET) 726 if (usin->sin_family != AF_INET)
719 return -EINVAL; 727 return -EAFNOSUPPORT;
720 daddr = usin->sin_addr.s_addr; 728 daddr = usin->sin_addr.s_addr;
721 /* no remote port */ 729 /* no remote port */
722 } else { 730 } else {
diff --git a/net/ipv4/tcp.c b/net/ipv4/tcp.c
index 9d72a0fcd928..995a2259bcfc 100644
--- a/net/ipv4/tcp.c
+++ b/net/ipv4/tcp.c
@@ -835,17 +835,13 @@ static unsigned int tcp_xmit_size_goal(struct sock *sk, u32 mss_now,
835 int large_allowed) 835 int large_allowed)
836{ 836{
837 struct tcp_sock *tp = tcp_sk(sk); 837 struct tcp_sock *tp = tcp_sk(sk);
838 u32 new_size_goal, size_goal, hlen; 838 u32 new_size_goal, size_goal;
839 839
840 if (!large_allowed || !sk_can_gso(sk)) 840 if (!large_allowed || !sk_can_gso(sk))
841 return mss_now; 841 return mss_now;
842 842
843 /* Maybe we should/could use sk->sk_prot->max_header here ? */ 843 /* Note : tcp_tso_autosize() will eventually split this later */
844 hlen = inet_csk(sk)->icsk_af_ops->net_header_len + 844 new_size_goal = sk->sk_gso_max_size - 1 - MAX_TCP_HEADER;
845 inet_csk(sk)->icsk_ext_hdr_len +
846 tp->tcp_header_len;
847
848 new_size_goal = sk->sk_gso_max_size - 1 - hlen;
849 new_size_goal = tcp_bound_to_half_wnd(tp, new_size_goal); 845 new_size_goal = tcp_bound_to_half_wnd(tp, new_size_goal);
850 846
851 /* We try hard to avoid divides here */ 847 /* We try hard to avoid divides here */
diff --git a/net/ipv4/tcp_cong.c b/net/ipv4/tcp_cong.c
index d694088214cd..62856e185a93 100644
--- a/net/ipv4/tcp_cong.c
+++ b/net/ipv4/tcp_cong.c
@@ -378,6 +378,12 @@ EXPORT_SYMBOL_GPL(tcp_slow_start);
378 */ 378 */
379void tcp_cong_avoid_ai(struct tcp_sock *tp, u32 w, u32 acked) 379void tcp_cong_avoid_ai(struct tcp_sock *tp, u32 w, u32 acked)
380{ 380{
381 /* If credits accumulated at a higher w, apply them gently now. */
382 if (tp->snd_cwnd_cnt >= w) {
383 tp->snd_cwnd_cnt = 0;
384 tp->snd_cwnd++;
385 }
386
381 tp->snd_cwnd_cnt += acked; 387 tp->snd_cwnd_cnt += acked;
382 if (tp->snd_cwnd_cnt >= w) { 388 if (tp->snd_cwnd_cnt >= w) {
383 u32 delta = tp->snd_cwnd_cnt / w; 389 u32 delta = tp->snd_cwnd_cnt / w;
diff --git a/net/ipv4/tcp_cubic.c b/net/ipv4/tcp_cubic.c
index 4b276d1ed980..06d3d665a9fd 100644
--- a/net/ipv4/tcp_cubic.c
+++ b/net/ipv4/tcp_cubic.c
@@ -306,8 +306,10 @@ tcp_friendliness:
306 } 306 }
307 } 307 }
308 308
309 if (ca->cnt == 0) /* cannot be zero */ 309 /* The maximum rate of cwnd increase CUBIC allows is 1 packet per
310 ca->cnt = 1; 310 * 2 packets ACKed, meaning cwnd grows at 1.5x per RTT.
311 */
312 ca->cnt = max(ca->cnt, 2U);
311} 313}
312 314
313static void bictcp_cong_avoid(struct sock *sk, u32 ack, u32 acked) 315static void bictcp_cong_avoid(struct sock *sk, u32 ack, u32 acked)
diff --git a/net/ipv4/tcp_input.c b/net/ipv4/tcp_input.c
index 8fdd27b17306..fb4cf8b8e121 100644
--- a/net/ipv4/tcp_input.c
+++ b/net/ipv4/tcp_input.c
@@ -4770,7 +4770,7 @@ static bool tcp_should_expand_sndbuf(const struct sock *sk)
4770 return false; 4770 return false;
4771 4771
4772 /* If we filled the congestion window, do not expand. */ 4772 /* If we filled the congestion window, do not expand. */
4773 if (tp->packets_out >= tp->snd_cwnd) 4773 if (tcp_packets_in_flight(tp) >= tp->snd_cwnd)
4774 return false; 4774 return false;
4775 4775
4776 return true; 4776 return true;
diff --git a/net/ipv4/xfrm4_output.c b/net/ipv4/xfrm4_output.c
index d5f6bd9a210a..dab73813cb92 100644
--- a/net/ipv4/xfrm4_output.c
+++ b/net/ipv4/xfrm4_output.c
@@ -63,6 +63,7 @@ int xfrm4_prepare_output(struct xfrm_state *x, struct sk_buff *skb)
63 return err; 63 return err;
64 64
65 IPCB(skb)->flags |= IPSKB_XFRM_TUNNEL_SIZE; 65 IPCB(skb)->flags |= IPSKB_XFRM_TUNNEL_SIZE;
66 skb->protocol = htons(ETH_P_IP);
66 67
67 return x->outer_mode->output2(x, skb); 68 return x->outer_mode->output2(x, skb);
68} 69}
@@ -71,7 +72,6 @@ EXPORT_SYMBOL(xfrm4_prepare_output);
71int xfrm4_output_finish(struct sk_buff *skb) 72int xfrm4_output_finish(struct sk_buff *skb)
72{ 73{
73 memset(IPCB(skb), 0, sizeof(*IPCB(skb))); 74 memset(IPCB(skb), 0, sizeof(*IPCB(skb)));
74 skb->protocol = htons(ETH_P_IP);
75 75
76#ifdef CONFIG_NETFILTER 76#ifdef CONFIG_NETFILTER
77 IPCB(skb)->flags |= IPSKB_XFRM_TRANSFORMED; 77 IPCB(skb)->flags |= IPSKB_XFRM_TRANSFORMED;
diff --git a/net/ipv6/addrconf.c b/net/ipv6/addrconf.c
index 98e4a63d72bb..b6030025f411 100644
--- a/net/ipv6/addrconf.c
+++ b/net/ipv6/addrconf.c
@@ -4903,6 +4903,21 @@ int addrconf_sysctl_forward(struct ctl_table *ctl, int write,
4903 return ret; 4903 return ret;
4904} 4904}
4905 4905
4906static
4907int addrconf_sysctl_mtu(struct ctl_table *ctl, int write,
4908 void __user *buffer, size_t *lenp, loff_t *ppos)
4909{
4910 struct inet6_dev *idev = ctl->extra1;
4911 int min_mtu = IPV6_MIN_MTU;
4912 struct ctl_table lctl;
4913
4914 lctl = *ctl;
4915 lctl.extra1 = &min_mtu;
4916 lctl.extra2 = idev ? &idev->dev->mtu : NULL;
4917
4918 return proc_dointvec_minmax(&lctl, write, buffer, lenp, ppos);
4919}
4920
4906static void dev_disable_change(struct inet6_dev *idev) 4921static void dev_disable_change(struct inet6_dev *idev)
4907{ 4922{
4908 struct netdev_notifier_info info; 4923 struct netdev_notifier_info info;
@@ -5054,7 +5069,7 @@ static struct addrconf_sysctl_table
5054 .data = &ipv6_devconf.mtu6, 5069 .data = &ipv6_devconf.mtu6,
5055 .maxlen = sizeof(int), 5070 .maxlen = sizeof(int),
5056 .mode = 0644, 5071 .mode = 0644,
5057 .proc_handler = proc_dointvec, 5072 .proc_handler = addrconf_sysctl_mtu,
5058 }, 5073 },
5059 { 5074 {
5060 .procname = "accept_ra", 5075 .procname = "accept_ra",
diff --git a/net/ipv6/datagram.c b/net/ipv6/datagram.c
index c215be70cac0..ace8daca5c83 100644
--- a/net/ipv6/datagram.c
+++ b/net/ipv6/datagram.c
@@ -325,14 +325,34 @@ void ipv6_local_rxpmtu(struct sock *sk, struct flowi6 *fl6, u32 mtu)
325 kfree_skb(skb); 325 kfree_skb(skb);
326} 326}
327 327
328static void ip6_datagram_prepare_pktinfo_errqueue(struct sk_buff *skb) 328/* IPv6 supports cmsg on all origins aside from SO_EE_ORIGIN_LOCAL.
329 *
330 * At one point, excluding local errors was a quick test to identify icmp/icmp6
331 * errors. This is no longer true, but the test remained, so the v6 stack,
332 * unlike v4, also honors cmsg requests on all wifi and timestamp errors.
333 *
334 * Timestamp code paths do not initialize the fields expected by cmsg:
335 * the PKTINFO fields in skb->cb[]. Fill those in here.
336 */
337static bool ip6_datagram_support_cmsg(struct sk_buff *skb,
338 struct sock_exterr_skb *serr)
329{ 339{
330 int ifindex = skb->dev ? skb->dev->ifindex : -1; 340 if (serr->ee.ee_origin == SO_EE_ORIGIN_ICMP ||
341 serr->ee.ee_origin == SO_EE_ORIGIN_ICMP6)
342 return true;
343
344 if (serr->ee.ee_origin == SO_EE_ORIGIN_LOCAL)
345 return false;
346
347 if (!skb->dev)
348 return false;
331 349
332 if (skb->protocol == htons(ETH_P_IPV6)) 350 if (skb->protocol == htons(ETH_P_IPV6))
333 IP6CB(skb)->iif = ifindex; 351 IP6CB(skb)->iif = skb->dev->ifindex;
334 else 352 else
335 PKTINFO_SKB_CB(skb)->ipi_ifindex = ifindex; 353 PKTINFO_SKB_CB(skb)->ipi_ifindex = skb->dev->ifindex;
354
355 return true;
336} 356}
337 357
338/* 358/*
@@ -369,7 +389,7 @@ int ipv6_recv_error(struct sock *sk, struct msghdr *msg, int len, int *addr_len)
369 389
370 serr = SKB_EXT_ERR(skb); 390 serr = SKB_EXT_ERR(skb);
371 391
372 if (sin && skb->len) { 392 if (sin && serr->port) {
373 const unsigned char *nh = skb_network_header(skb); 393 const unsigned char *nh = skb_network_header(skb);
374 sin->sin6_family = AF_INET6; 394 sin->sin6_family = AF_INET6;
375 sin->sin6_flowinfo = 0; 395 sin->sin6_flowinfo = 0;
@@ -394,14 +414,11 @@ int ipv6_recv_error(struct sock *sk, struct msghdr *msg, int len, int *addr_len)
394 memcpy(&errhdr.ee, &serr->ee, sizeof(struct sock_extended_err)); 414 memcpy(&errhdr.ee, &serr->ee, sizeof(struct sock_extended_err));
395 sin = &errhdr.offender; 415 sin = &errhdr.offender;
396 memset(sin, 0, sizeof(*sin)); 416 memset(sin, 0, sizeof(*sin));
397 if (serr->ee.ee_origin != SO_EE_ORIGIN_LOCAL && skb->len) { 417
418 if (ip6_datagram_support_cmsg(skb, serr)) {
398 sin->sin6_family = AF_INET6; 419 sin->sin6_family = AF_INET6;
399 if (np->rxopt.all) { 420 if (np->rxopt.all)
400 if (serr->ee.ee_origin != SO_EE_ORIGIN_ICMP &&
401 serr->ee.ee_origin != SO_EE_ORIGIN_ICMP6)
402 ip6_datagram_prepare_pktinfo_errqueue(skb);
403 ip6_datagram_recv_common_ctl(sk, msg, skb); 421 ip6_datagram_recv_common_ctl(sk, msg, skb);
404 }
405 if (skb->protocol == htons(ETH_P_IPV6)) { 422 if (skb->protocol == htons(ETH_P_IPV6)) {
406 sin->sin6_addr = ipv6_hdr(skb)->saddr; 423 sin->sin6_addr = ipv6_hdr(skb)->saddr;
407 if (np->rxopt.all) 424 if (np->rxopt.all)
diff --git a/net/ipv6/ip6_output.c b/net/ipv6/ip6_output.c
index 7deebf102cba..7e80b61b51ff 100644
--- a/net/ipv6/ip6_output.c
+++ b/net/ipv6/ip6_output.c
@@ -318,6 +318,7 @@ static int ip6_forward_proxy_check(struct sk_buff *skb)
318 318
319static inline int ip6_forward_finish(struct sk_buff *skb) 319static inline int ip6_forward_finish(struct sk_buff *skb)
320{ 320{
321 skb_sender_cpu_clear(skb);
321 return dst_output(skb); 322 return dst_output(skb);
322} 323}
323 324
@@ -1298,7 +1299,8 @@ emsgsize:
1298 if (((length > mtu) || 1299 if (((length > mtu) ||
1299 (skb && skb_is_gso(skb))) && 1300 (skb && skb_is_gso(skb))) &&
1300 (sk->sk_protocol == IPPROTO_UDP) && 1301 (sk->sk_protocol == IPPROTO_UDP) &&
1301 (rt->dst.dev->features & NETIF_F_UFO)) { 1302 (rt->dst.dev->features & NETIF_F_UFO) &&
1303 (sk->sk_type == SOCK_DGRAM)) {
1302 err = ip6_ufo_append_data(sk, queue, getfrag, from, length, 1304 err = ip6_ufo_append_data(sk, queue, getfrag, from, length,
1303 hh_len, fragheaderlen, 1305 hh_len, fragheaderlen,
1304 transhdrlen, mtu, flags, rt); 1306 transhdrlen, mtu, flags, rt);
diff --git a/net/ipv6/ip6_tunnel.c b/net/ipv6/ip6_tunnel.c
index 266a264ec212..ddd94eca19b3 100644
--- a/net/ipv6/ip6_tunnel.c
+++ b/net/ipv6/ip6_tunnel.c
@@ -314,7 +314,7 @@ out:
314 * Create tunnel matching given parameters. 314 * Create tunnel matching given parameters.
315 * 315 *
316 * Return: 316 * Return:
317 * created tunnel or NULL 317 * created tunnel or error pointer
318 **/ 318 **/
319 319
320static struct ip6_tnl *ip6_tnl_create(struct net *net, struct __ip6_tnl_parm *p) 320static struct ip6_tnl *ip6_tnl_create(struct net *net, struct __ip6_tnl_parm *p)
@@ -322,7 +322,7 @@ static struct ip6_tnl *ip6_tnl_create(struct net *net, struct __ip6_tnl_parm *p)
322 struct net_device *dev; 322 struct net_device *dev;
323 struct ip6_tnl *t; 323 struct ip6_tnl *t;
324 char name[IFNAMSIZ]; 324 char name[IFNAMSIZ];
325 int err; 325 int err = -ENOMEM;
326 326
327 if (p->name[0]) 327 if (p->name[0])
328 strlcpy(name, p->name, IFNAMSIZ); 328 strlcpy(name, p->name, IFNAMSIZ);
@@ -348,7 +348,7 @@ static struct ip6_tnl *ip6_tnl_create(struct net *net, struct __ip6_tnl_parm *p)
348failed_free: 348failed_free:
349 ip6_dev_free(dev); 349 ip6_dev_free(dev);
350failed: 350failed:
351 return NULL; 351 return ERR_PTR(err);
352} 352}
353 353
354/** 354/**
@@ -362,7 +362,7 @@ failed:
362 * tunnel device is created and registered for use. 362 * tunnel device is created and registered for use.
363 * 363 *
364 * Return: 364 * Return:
365 * matching tunnel or NULL 365 * matching tunnel or error pointer
366 **/ 366 **/
367 367
368static struct ip6_tnl *ip6_tnl_locate(struct net *net, 368static struct ip6_tnl *ip6_tnl_locate(struct net *net,
@@ -380,13 +380,13 @@ static struct ip6_tnl *ip6_tnl_locate(struct net *net,
380 if (ipv6_addr_equal(local, &t->parms.laddr) && 380 if (ipv6_addr_equal(local, &t->parms.laddr) &&
381 ipv6_addr_equal(remote, &t->parms.raddr)) { 381 ipv6_addr_equal(remote, &t->parms.raddr)) {
382 if (create) 382 if (create)
383 return NULL; 383 return ERR_PTR(-EEXIST);
384 384
385 return t; 385 return t;
386 } 386 }
387 } 387 }
388 if (!create) 388 if (!create)
389 return NULL; 389 return ERR_PTR(-ENODEV);
390 return ip6_tnl_create(net, p); 390 return ip6_tnl_create(net, p);
391} 391}
392 392
@@ -1420,7 +1420,7 @@ ip6_tnl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1420 } 1420 }
1421 ip6_tnl_parm_from_user(&p1, &p); 1421 ip6_tnl_parm_from_user(&p1, &p);
1422 t = ip6_tnl_locate(net, &p1, 0); 1422 t = ip6_tnl_locate(net, &p1, 0);
1423 if (t == NULL) 1423 if (IS_ERR(t))
1424 t = netdev_priv(dev); 1424 t = netdev_priv(dev);
1425 } else { 1425 } else {
1426 memset(&p, 0, sizeof(p)); 1426 memset(&p, 0, sizeof(p));
@@ -1445,7 +1445,7 @@ ip6_tnl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1445 ip6_tnl_parm_from_user(&p1, &p); 1445 ip6_tnl_parm_from_user(&p1, &p);
1446 t = ip6_tnl_locate(net, &p1, cmd == SIOCADDTUNNEL); 1446 t = ip6_tnl_locate(net, &p1, cmd == SIOCADDTUNNEL);
1447 if (cmd == SIOCCHGTUNNEL) { 1447 if (cmd == SIOCCHGTUNNEL) {
1448 if (t != NULL) { 1448 if (!IS_ERR(t)) {
1449 if (t->dev != dev) { 1449 if (t->dev != dev) {
1450 err = -EEXIST; 1450 err = -EEXIST;
1451 break; 1451 break;
@@ -1457,14 +1457,15 @@ ip6_tnl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1457 else 1457 else
1458 err = ip6_tnl_update(t, &p1); 1458 err = ip6_tnl_update(t, &p1);
1459 } 1459 }
1460 if (t) { 1460 if (!IS_ERR(t)) {
1461 err = 0; 1461 err = 0;
1462 ip6_tnl_parm_to_user(&p, &t->parms); 1462 ip6_tnl_parm_to_user(&p, &t->parms);
1463 if (copy_to_user(ifr->ifr_ifru.ifru_data, &p, sizeof(p))) 1463 if (copy_to_user(ifr->ifr_ifru.ifru_data, &p, sizeof(p)))
1464 err = -EFAULT; 1464 err = -EFAULT;
1465 1465
1466 } else 1466 } else {
1467 err = (cmd == SIOCADDTUNNEL ? -ENOBUFS : -ENOENT); 1467 err = PTR_ERR(t);
1468 }
1468 break; 1469 break;
1469 case SIOCDELTUNNEL: 1470 case SIOCDELTUNNEL:
1470 err = -EPERM; 1471 err = -EPERM;
@@ -1478,7 +1479,7 @@ ip6_tnl_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
1478 err = -ENOENT; 1479 err = -ENOENT;
1479 ip6_tnl_parm_from_user(&p1, &p); 1480 ip6_tnl_parm_from_user(&p1, &p);
1480 t = ip6_tnl_locate(net, &p1, 0); 1481 t = ip6_tnl_locate(net, &p1, 0);
1481 if (t == NULL) 1482 if (IS_ERR(t))
1482 break; 1483 break;
1483 err = -EPERM; 1484 err = -EPERM;
1484 if (t->dev == ip6n->fb_tnl_dev) 1485 if (t->dev == ip6n->fb_tnl_dev)
@@ -1672,12 +1673,13 @@ static int ip6_tnl_newlink(struct net *src_net, struct net_device *dev,
1672 struct nlattr *tb[], struct nlattr *data[]) 1673 struct nlattr *tb[], struct nlattr *data[])
1673{ 1674{
1674 struct net *net = dev_net(dev); 1675 struct net *net = dev_net(dev);
1675 struct ip6_tnl *nt; 1676 struct ip6_tnl *nt, *t;
1676 1677
1677 nt = netdev_priv(dev); 1678 nt = netdev_priv(dev);
1678 ip6_tnl_netlink_parms(data, &nt->parms); 1679 ip6_tnl_netlink_parms(data, &nt->parms);
1679 1680
1680 if (ip6_tnl_locate(net, &nt->parms, 0)) 1681 t = ip6_tnl_locate(net, &nt->parms, 0);
1682 if (!IS_ERR(t))
1681 return -EEXIST; 1683 return -EEXIST;
1682 1684
1683 return ip6_tnl_create2(dev); 1685 return ip6_tnl_create2(dev);
@@ -1697,8 +1699,7 @@ static int ip6_tnl_changelink(struct net_device *dev, struct nlattr *tb[],
1697 ip6_tnl_netlink_parms(data, &p); 1699 ip6_tnl_netlink_parms(data, &p);
1698 1700
1699 t = ip6_tnl_locate(net, &p, 0); 1701 t = ip6_tnl_locate(net, &p, 0);
1700 1702 if (!IS_ERR(t)) {
1701 if (t) {
1702 if (t->dev != dev) 1703 if (t->dev != dev)
1703 return -EEXIST; 1704 return -EEXIST;
1704 } else 1705 } else
diff --git a/net/ipv6/ping.c b/net/ipv6/ping.c
index bd46f736f61d..a2dfff6ff227 100644
--- a/net/ipv6/ping.c
+++ b/net/ipv6/ping.c
@@ -102,9 +102,10 @@ int ping_v6_sendmsg(struct kiocb *iocb, struct sock *sk, struct msghdr *msg,
102 102
103 if (msg->msg_name) { 103 if (msg->msg_name) {
104 DECLARE_SOCKADDR(struct sockaddr_in6 *, u, msg->msg_name); 104 DECLARE_SOCKADDR(struct sockaddr_in6 *, u, msg->msg_name);
105 if (msg->msg_namelen < sizeof(struct sockaddr_in6) || 105 if (msg->msg_namelen < sizeof(*u))
106 u->sin6_family != AF_INET6) {
107 return -EINVAL; 106 return -EINVAL;
107 if (u->sin6_family != AF_INET6) {
108 return -EAFNOSUPPORT;
108 } 109 }
109 if (sk->sk_bound_dev_if && 110 if (sk->sk_bound_dev_if &&
110 sk->sk_bound_dev_if != u->sin6_scope_id) { 111 sk->sk_bound_dev_if != u->sin6_scope_id) {
diff --git a/net/ipv6/xfrm6_output.c b/net/ipv6/xfrm6_output.c
index ca3f29b98ae5..010f8bd2d577 100644
--- a/net/ipv6/xfrm6_output.c
+++ b/net/ipv6/xfrm6_output.c
@@ -114,6 +114,7 @@ int xfrm6_prepare_output(struct xfrm_state *x, struct sk_buff *skb)
114 return err; 114 return err;
115 115
116 skb->ignore_df = 1; 116 skb->ignore_df = 1;
117 skb->protocol = htons(ETH_P_IPV6);
117 118
118 return x->outer_mode->output2(x, skb); 119 return x->outer_mode->output2(x, skb);
119} 120}
@@ -122,7 +123,6 @@ EXPORT_SYMBOL(xfrm6_prepare_output);
122int xfrm6_output_finish(struct sk_buff *skb) 123int xfrm6_output_finish(struct sk_buff *skb)
123{ 124{
124 memset(IP6CB(skb), 0, sizeof(*IP6CB(skb))); 125 memset(IP6CB(skb), 0, sizeof(*IP6CB(skb)));
125 skb->protocol = htons(ETH_P_IPV6);
126 126
127#ifdef CONFIG_NETFILTER 127#ifdef CONFIG_NETFILTER
128 IP6CB(skb)->flags |= IP6SKB_XFRM_TRANSFORMED; 128 IP6CB(skb)->flags |= IP6SKB_XFRM_TRANSFORMED;
diff --git a/net/ipv6/xfrm6_policy.c b/net/ipv6/xfrm6_policy.c
index 48bf5a06847b..8d2d01b4800a 100644
--- a/net/ipv6/xfrm6_policy.c
+++ b/net/ipv6/xfrm6_policy.c
@@ -200,6 +200,7 @@ _decode_session6(struct sk_buff *skb, struct flowi *fl, int reverse)
200 200
201#if IS_ENABLED(CONFIG_IPV6_MIP6) 201#if IS_ENABLED(CONFIG_IPV6_MIP6)
202 case IPPROTO_MH: 202 case IPPROTO_MH:
203 offset += ipv6_optlen(exthdr);
203 if (!onlyproto && pskb_may_pull(skb, nh + offset + 3 - skb->data)) { 204 if (!onlyproto && pskb_may_pull(skb, nh + offset + 3 - skb->data)) {
204 struct ip6_mh *mh; 205 struct ip6_mh *mh;
205 206
diff --git a/net/irda/ircomm/ircomm_tty.c b/net/irda/ircomm/ircomm_tty.c
index 40695b9751c1..683346d2d633 100644
--- a/net/irda/ircomm/ircomm_tty.c
+++ b/net/irda/ircomm/ircomm_tty.c
@@ -798,7 +798,9 @@ static void ircomm_tty_wait_until_sent(struct tty_struct *tty, int timeout)
798 orig_jiffies = jiffies; 798 orig_jiffies = jiffies;
799 799
800 /* Set poll time to 200 ms */ 800 /* Set poll time to 200 ms */
801 poll_time = IRDA_MIN(timeout, msecs_to_jiffies(200)); 801 poll_time = msecs_to_jiffies(200);
802 if (timeout)
803 poll_time = min_t(unsigned long, timeout, poll_time);
802 804
803 spin_lock_irqsave(&self->spinlock, flags); 805 spin_lock_irqsave(&self->spinlock, flags);
804 while (self->tx_skb && self->tx_skb->len) { 806 while (self->tx_skb && self->tx_skb->len) {
@@ -811,7 +813,7 @@ static void ircomm_tty_wait_until_sent(struct tty_struct *tty, int timeout)
811 break; 813 break;
812 } 814 }
813 spin_unlock_irqrestore(&self->spinlock, flags); 815 spin_unlock_irqrestore(&self->spinlock, flags);
814 current->state = TASK_RUNNING; 816 __set_current_state(TASK_RUNNING);
815} 817}
816 818
817/* 819/*
diff --git a/net/irda/irnet/irnet_ppp.c b/net/irda/irnet/irnet_ppp.c
index 3c83a1e5ab03..1215693fdd22 100644
--- a/net/irda/irnet/irnet_ppp.c
+++ b/net/irda/irnet/irnet_ppp.c
@@ -305,7 +305,7 @@ irnet_ctrl_read(irnet_socket * ap,
305 305
306 /* Put ourselves on the wait queue to be woken up */ 306 /* Put ourselves on the wait queue to be woken up */
307 add_wait_queue(&irnet_events.rwait, &wait); 307 add_wait_queue(&irnet_events.rwait, &wait);
308 current->state = TASK_INTERRUPTIBLE; 308 set_current_state(TASK_INTERRUPTIBLE);
309 for(;;) 309 for(;;)
310 { 310 {
311 /* If there is unread events */ 311 /* If there is unread events */
@@ -321,7 +321,7 @@ irnet_ctrl_read(irnet_socket * ap,
321 /* Yield and wait to be woken up */ 321 /* Yield and wait to be woken up */
322 schedule(); 322 schedule();
323 } 323 }
324 current->state = TASK_RUNNING; 324 __set_current_state(TASK_RUNNING);
325 remove_wait_queue(&irnet_events.rwait, &wait); 325 remove_wait_queue(&irnet_events.rwait, &wait);
326 326
327 /* Did we got it ? */ 327 /* Did we got it ? */
diff --git a/net/mac80211/chan.c b/net/mac80211/chan.c
index ff0d2db09df9..5bcd4e5589d3 100644
--- a/net/mac80211/chan.c
+++ b/net/mac80211/chan.c
@@ -1508,6 +1508,8 @@ static void __ieee80211_vif_release_channel(struct ieee80211_sub_if_data *sdata)
1508 if (ieee80211_chanctx_refcount(local, ctx) == 0) 1508 if (ieee80211_chanctx_refcount(local, ctx) == 0)
1509 ieee80211_free_chanctx(local, ctx); 1509 ieee80211_free_chanctx(local, ctx);
1510 1510
1511 sdata->radar_required = false;
1512
1511 /* Unreserving may ready an in-place reservation. */ 1513 /* Unreserving may ready an in-place reservation. */
1512 if (use_reserved_switch) 1514 if (use_reserved_switch)
1513 ieee80211_vif_use_reserved_switch(local); 1515 ieee80211_vif_use_reserved_switch(local);
@@ -1566,6 +1568,9 @@ int ieee80211_vif_use_channel(struct ieee80211_sub_if_data *sdata,
1566 ieee80211_recalc_smps_chanctx(local, ctx); 1568 ieee80211_recalc_smps_chanctx(local, ctx);
1567 ieee80211_recalc_radar_chanctx(local, ctx); 1569 ieee80211_recalc_radar_chanctx(local, ctx);
1568 out: 1570 out:
1571 if (ret)
1572 sdata->radar_required = false;
1573
1569 mutex_unlock(&local->chanctx_mtx); 1574 mutex_unlock(&local->chanctx_mtx);
1570 return ret; 1575 return ret;
1571} 1576}
diff --git a/net/mac80211/ieee80211_i.h b/net/mac80211/ieee80211_i.h
index 3afe36824703..8d53d65bd2ab 100644
--- a/net/mac80211/ieee80211_i.h
+++ b/net/mac80211/ieee80211_i.h
@@ -58,13 +58,24 @@ struct ieee80211_local;
58#define IEEE80211_UNSET_POWER_LEVEL INT_MIN 58#define IEEE80211_UNSET_POWER_LEVEL INT_MIN
59 59
60/* 60/*
61 * Some APs experience problems when working with U-APSD. Decrease the 61 * Some APs experience problems when working with U-APSD. Decreasing the
62 * probability of that happening by using legacy mode for all ACs but VO. 62 * probability of that happening by using legacy mode for all ACs but VO isn't
63 * The AP that caused us trouble was a Cisco 4410N. It ignores our 63 * enough.
64 * setting, and always treats non-VO ACs as legacy. 64 *
65 * Cisco 4410N originally forced us to enable VO by default only because it
66 * treated non-VO ACs as legacy.
67 *
68 * However some APs (notably Netgear R7000) silently reclassify packets to
69 * different ACs. Since u-APSD ACs require trigger frames for frame retrieval
70 * clients would never see some frames (e.g. ARP responses) or would fetch them
71 * accidentally after a long time.
72 *
73 * It makes little sense to enable u-APSD queues by default because it needs
74 * userspace applications to be aware of it to actually take advantage of the
75 * possible additional powersavings. Implicitly depending on driver autotrigger
76 * frame support doesn't make much sense.
65 */ 77 */
66#define IEEE80211_DEFAULT_UAPSD_QUEUES \ 78#define IEEE80211_DEFAULT_UAPSD_QUEUES 0
67 IEEE80211_WMM_IE_STA_QOSINFO_AC_VO
68 79
69#define IEEE80211_DEFAULT_MAX_SP_LEN \ 80#define IEEE80211_DEFAULT_MAX_SP_LEN \
70 IEEE80211_WMM_IE_STA_QOSINFO_SP_ALL 81 IEEE80211_WMM_IE_STA_QOSINFO_SP_ALL
@@ -453,6 +464,7 @@ struct ieee80211_if_managed {
453 unsigned int flags; 464 unsigned int flags;
454 465
455 bool csa_waiting_bcn; 466 bool csa_waiting_bcn;
467 bool csa_ignored_same_chan;
456 468
457 bool beacon_crc_valid; 469 bool beacon_crc_valid;
458 u32 beacon_crc; 470 u32 beacon_crc;
diff --git a/net/mac80211/mlme.c b/net/mac80211/mlme.c
index 10ac6324c1d0..142f66aece18 100644
--- a/net/mac80211/mlme.c
+++ b/net/mac80211/mlme.c
@@ -1150,6 +1150,17 @@ ieee80211_sta_process_chanswitch(struct ieee80211_sub_if_data *sdata,
1150 return; 1150 return;
1151 } 1151 }
1152 1152
1153 if (cfg80211_chandef_identical(&csa_ie.chandef,
1154 &sdata->vif.bss_conf.chandef)) {
1155 if (ifmgd->csa_ignored_same_chan)
1156 return;
1157 sdata_info(sdata,
1158 "AP %pM tries to chanswitch to same channel, ignore\n",
1159 ifmgd->associated->bssid);
1160 ifmgd->csa_ignored_same_chan = true;
1161 return;
1162 }
1163
1153 mutex_lock(&local->mtx); 1164 mutex_lock(&local->mtx);
1154 mutex_lock(&local->chanctx_mtx); 1165 mutex_lock(&local->chanctx_mtx);
1155 conf = rcu_dereference_protected(sdata->vif.chanctx_conf, 1166 conf = rcu_dereference_protected(sdata->vif.chanctx_conf,
@@ -1210,6 +1221,7 @@ ieee80211_sta_process_chanswitch(struct ieee80211_sub_if_data *sdata,
1210 sdata->vif.csa_active = true; 1221 sdata->vif.csa_active = true;
1211 sdata->csa_chandef = csa_ie.chandef; 1222 sdata->csa_chandef = csa_ie.chandef;
1212 sdata->csa_block_tx = csa_ie.mode; 1223 sdata->csa_block_tx = csa_ie.mode;
1224 ifmgd->csa_ignored_same_chan = false;
1213 1225
1214 if (sdata->csa_block_tx) 1226 if (sdata->csa_block_tx)
1215 ieee80211_stop_vif_queues(local, sdata, 1227 ieee80211_stop_vif_queues(local, sdata,
@@ -2090,6 +2102,7 @@ static void ieee80211_set_disassoc(struct ieee80211_sub_if_data *sdata,
2090 2102
2091 sdata->vif.csa_active = false; 2103 sdata->vif.csa_active = false;
2092 ifmgd->csa_waiting_bcn = false; 2104 ifmgd->csa_waiting_bcn = false;
2105 ifmgd->csa_ignored_same_chan = false;
2093 if (sdata->csa_block_tx) { 2106 if (sdata->csa_block_tx) {
2094 ieee80211_wake_vif_queues(local, sdata, 2107 ieee80211_wake_vif_queues(local, sdata,
2095 IEEE80211_QUEUE_STOP_REASON_CSA); 2108 IEEE80211_QUEUE_STOP_REASON_CSA);
@@ -3204,7 +3217,8 @@ static const u64 care_about_ies =
3204 (1ULL << WLAN_EID_CHANNEL_SWITCH) | 3217 (1ULL << WLAN_EID_CHANNEL_SWITCH) |
3205 (1ULL << WLAN_EID_PWR_CONSTRAINT) | 3218 (1ULL << WLAN_EID_PWR_CONSTRAINT) |
3206 (1ULL << WLAN_EID_HT_CAPABILITY) | 3219 (1ULL << WLAN_EID_HT_CAPABILITY) |
3207 (1ULL << WLAN_EID_HT_OPERATION); 3220 (1ULL << WLAN_EID_HT_OPERATION) |
3221 (1ULL << WLAN_EID_EXT_CHANSWITCH_ANN);
3208 3222
3209static void ieee80211_rx_mgmt_beacon(struct ieee80211_sub_if_data *sdata, 3223static void ieee80211_rx_mgmt_beacon(struct ieee80211_sub_if_data *sdata,
3210 struct ieee80211_mgmt *mgmt, size_t len, 3224 struct ieee80211_mgmt *mgmt, size_t len,
diff --git a/net/mac80211/rc80211_minstrel.c b/net/mac80211/rc80211_minstrel.c
index 7c86a002df95..ef6e8a6c4253 100644
--- a/net/mac80211/rc80211_minstrel.c
+++ b/net/mac80211/rc80211_minstrel.c
@@ -373,7 +373,7 @@ minstrel_get_rate(void *priv, struct ieee80211_sta *sta,
373 rate++; 373 rate++;
374 mi->sample_deferred++; 374 mi->sample_deferred++;
375 } else { 375 } else {
376 if (!msr->sample_limit != 0) 376 if (!msr->sample_limit)
377 return; 377 return;
378 378
379 mi->sample_packets++; 379 mi->sample_packets++;
diff --git a/net/mac80211/rx.c b/net/mac80211/rx.c
index 1101563357ea..944bdc04e913 100644
--- a/net/mac80211/rx.c
+++ b/net/mac80211/rx.c
@@ -2214,6 +2214,9 @@ ieee80211_rx_h_mesh_fwding(struct ieee80211_rx_data *rx)
2214 hdr = (struct ieee80211_hdr *) skb->data; 2214 hdr = (struct ieee80211_hdr *) skb->data;
2215 mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen); 2215 mesh_hdr = (struct ieee80211s_hdr *) (skb->data + hdrlen);
2216 2216
2217 if (ieee80211_drop_unencrypted(rx, hdr->frame_control))
2218 return RX_DROP_MONITOR;
2219
2217 /* frame is in RMC, don't forward */ 2220 /* frame is in RMC, don't forward */
2218 if (ieee80211_is_data(hdr->frame_control) && 2221 if (ieee80211_is_data(hdr->frame_control) &&
2219 is_multicast_ether_addr(hdr->addr1) && 2222 is_multicast_ether_addr(hdr->addr1) &&
diff --git a/net/mac80211/tx.c b/net/mac80211/tx.c
index 88a18ffe2975..07bd8db00af8 100644
--- a/net/mac80211/tx.c
+++ b/net/mac80211/tx.c
@@ -566,6 +566,7 @@ ieee80211_tx_h_check_control_port_protocol(struct ieee80211_tx_data *tx)
566 if (tx->sdata->control_port_no_encrypt) 566 if (tx->sdata->control_port_no_encrypt)
567 info->flags |= IEEE80211_TX_INTFL_DONT_ENCRYPT; 567 info->flags |= IEEE80211_TX_INTFL_DONT_ENCRYPT;
568 info->control.flags |= IEEE80211_TX_CTRL_PORT_CTRL_PROTO; 568 info->control.flags |= IEEE80211_TX_CTRL_PORT_CTRL_PROTO;
569 info->flags |= IEEE80211_TX_CTL_USE_MINRATE;
569 } 570 }
570 571
571 return TX_CONTINUE; 572 return TX_CONTINUE;
diff --git a/net/mac80211/util.c b/net/mac80211/util.c
index 8428f4a95479..747bdcf72e92 100644
--- a/net/mac80211/util.c
+++ b/net/mac80211/util.c
@@ -3178,7 +3178,7 @@ int ieee80211_check_combinations(struct ieee80211_sub_if_data *sdata,
3178 wdev_iter = &sdata_iter->wdev; 3178 wdev_iter = &sdata_iter->wdev;
3179 3179
3180 if (sdata_iter == sdata || 3180 if (sdata_iter == sdata ||
3181 rcu_access_pointer(sdata_iter->vif.chanctx_conf) == NULL || 3181 !ieee80211_sdata_running(sdata_iter) ||
3182 local->hw.wiphy->software_iftypes & BIT(wdev_iter->iftype)) 3182 local->hw.wiphy->software_iftypes & BIT(wdev_iter->iftype))
3183 continue; 3183 continue;
3184 3184
diff --git a/net/netfilter/ipvs/ip_vs_ctl.c b/net/netfilter/ipvs/ip_vs_ctl.c
index e55759056361..ed99448671c3 100644
--- a/net/netfilter/ipvs/ip_vs_ctl.c
+++ b/net/netfilter/ipvs/ip_vs_ctl.c
@@ -3402,7 +3402,7 @@ static int ip_vs_genl_set_cmd(struct sk_buff *skb, struct genl_info *info)
3402 if (udest.af == 0) 3402 if (udest.af == 0)
3403 udest.af = svc->af; 3403 udest.af = svc->af;
3404 3404
3405 if (udest.af != svc->af) { 3405 if (udest.af != svc->af && cmd != IPVS_CMD_DEL_DEST) {
3406 /* The synchronization protocol is incompatible 3406 /* The synchronization protocol is incompatible
3407 * with mixed family services 3407 * with mixed family services
3408 */ 3408 */
diff --git a/net/netfilter/ipvs/ip_vs_sync.c b/net/netfilter/ipvs/ip_vs_sync.c
index c47ffd7a0a70..d93ceeb3ef04 100644
--- a/net/netfilter/ipvs/ip_vs_sync.c
+++ b/net/netfilter/ipvs/ip_vs_sync.c
@@ -896,6 +896,8 @@ static void ip_vs_proc_conn(struct net *net, struct ip_vs_conn_param *param,
896 IP_VS_DBG(2, "BACKUP, add new conn. failed\n"); 896 IP_VS_DBG(2, "BACKUP, add new conn. failed\n");
897 return; 897 return;
898 } 898 }
899 if (!(flags & IP_VS_CONN_F_TEMPLATE))
900 kfree(param->pe_data);
899 } 901 }
900 902
901 if (opt) 903 if (opt)
@@ -1169,6 +1171,7 @@ static inline int ip_vs_proc_sync_conn(struct net *net, __u8 *p, __u8 *msg_end)
1169 (opt_flags & IPVS_OPT_F_SEQ_DATA ? &opt : NULL) 1171 (opt_flags & IPVS_OPT_F_SEQ_DATA ? &opt : NULL)
1170 ); 1172 );
1171#endif 1173#endif
1174 ip_vs_pe_put(param.pe);
1172 return 0; 1175 return 0;
1173 /* Error exit */ 1176 /* Error exit */
1174out: 1177out:
diff --git a/net/netfilter/nf_tables_api.c b/net/netfilter/nf_tables_api.c
index 199fd0f27b0e..6ab777912237 100644
--- a/net/netfilter/nf_tables_api.c
+++ b/net/netfilter/nf_tables_api.c
@@ -227,7 +227,7 @@ nft_rule_deactivate_next(struct net *net, struct nft_rule *rule)
227 227
228static inline void nft_rule_clear(struct net *net, struct nft_rule *rule) 228static inline void nft_rule_clear(struct net *net, struct nft_rule *rule)
229{ 229{
230 rule->genmask = 0; 230 rule->genmask &= ~(1 << gencursor_next(net));
231} 231}
232 232
233static int 233static int
@@ -1711,9 +1711,12 @@ static int nf_tables_fill_rule_info(struct sk_buff *skb, struct net *net,
1711 } 1711 }
1712 nla_nest_end(skb, list); 1712 nla_nest_end(skb, list);
1713 1713
1714 if (rule->ulen && 1714 if (rule->udata) {
1715 nla_put(skb, NFTA_RULE_USERDATA, rule->ulen, nft_userdata(rule))) 1715 struct nft_userdata *udata = nft_userdata(rule);
1716 goto nla_put_failure; 1716 if (nla_put(skb, NFTA_RULE_USERDATA, udata->len + 1,
1717 udata->data) < 0)
1718 goto nla_put_failure;
1719 }
1717 1720
1718 nlmsg_end(skb, nlh); 1721 nlmsg_end(skb, nlh);
1719 return 0; 1722 return 0;
@@ -1896,11 +1899,12 @@ static int nf_tables_newrule(struct sock *nlsk, struct sk_buff *skb,
1896 struct nft_table *table; 1899 struct nft_table *table;
1897 struct nft_chain *chain; 1900 struct nft_chain *chain;
1898 struct nft_rule *rule, *old_rule = NULL; 1901 struct nft_rule *rule, *old_rule = NULL;
1902 struct nft_userdata *udata;
1899 struct nft_trans *trans = NULL; 1903 struct nft_trans *trans = NULL;
1900 struct nft_expr *expr; 1904 struct nft_expr *expr;
1901 struct nft_ctx ctx; 1905 struct nft_ctx ctx;
1902 struct nlattr *tmp; 1906 struct nlattr *tmp;
1903 unsigned int size, i, n, ulen = 0; 1907 unsigned int size, i, n, ulen = 0, usize = 0;
1904 int err, rem; 1908 int err, rem;
1905 bool create; 1909 bool create;
1906 u64 handle, pos_handle; 1910 u64 handle, pos_handle;
@@ -1968,12 +1972,19 @@ static int nf_tables_newrule(struct sock *nlsk, struct sk_buff *skb,
1968 n++; 1972 n++;
1969 } 1973 }
1970 } 1974 }
1975 /* Check for overflow of dlen field */
1976 err = -EFBIG;
1977 if (size >= 1 << 12)
1978 goto err1;
1971 1979
1972 if (nla[NFTA_RULE_USERDATA]) 1980 if (nla[NFTA_RULE_USERDATA]) {
1973 ulen = nla_len(nla[NFTA_RULE_USERDATA]); 1981 ulen = nla_len(nla[NFTA_RULE_USERDATA]);
1982 if (ulen > 0)
1983 usize = sizeof(struct nft_userdata) + ulen;
1984 }
1974 1985
1975 err = -ENOMEM; 1986 err = -ENOMEM;
1976 rule = kzalloc(sizeof(*rule) + size + ulen, GFP_KERNEL); 1987 rule = kzalloc(sizeof(*rule) + size + usize, GFP_KERNEL);
1977 if (rule == NULL) 1988 if (rule == NULL)
1978 goto err1; 1989 goto err1;
1979 1990
@@ -1981,10 +1992,13 @@ static int nf_tables_newrule(struct sock *nlsk, struct sk_buff *skb,
1981 1992
1982 rule->handle = handle; 1993 rule->handle = handle;
1983 rule->dlen = size; 1994 rule->dlen = size;
1984 rule->ulen = ulen; 1995 rule->udata = ulen ? 1 : 0;
1985 1996
1986 if (ulen) 1997 if (ulen) {
1987 nla_memcpy(nft_userdata(rule), nla[NFTA_RULE_USERDATA], ulen); 1998 udata = nft_userdata(rule);
1999 udata->len = ulen - 1;
2000 nla_memcpy(udata->data, nla[NFTA_RULE_USERDATA], ulen);
2001 }
1988 2002
1989 expr = nft_expr_first(rule); 2003 expr = nft_expr_first(rule);
1990 for (i = 0; i < n; i++) { 2004 for (i = 0; i < n; i++) {
@@ -2031,12 +2045,6 @@ static int nf_tables_newrule(struct sock *nlsk, struct sk_buff *skb,
2031 2045
2032err3: 2046err3:
2033 list_del_rcu(&rule->list); 2047 list_del_rcu(&rule->list);
2034 if (trans) {
2035 list_del_rcu(&nft_trans_rule(trans)->list);
2036 nft_rule_clear(net, nft_trans_rule(trans));
2037 nft_trans_destroy(trans);
2038 chain->use++;
2039 }
2040err2: 2048err2:
2041 nf_tables_rule_destroy(&ctx, rule); 2049 nf_tables_rule_destroy(&ctx, rule);
2042err1: 2050err1:
@@ -3612,12 +3620,11 @@ static int nf_tables_commit(struct sk_buff *skb)
3612 &te->elem, 3620 &te->elem,
3613 NFT_MSG_DELSETELEM, 0); 3621 NFT_MSG_DELSETELEM, 0);
3614 te->set->ops->get(te->set, &te->elem); 3622 te->set->ops->get(te->set, &te->elem);
3615 te->set->ops->remove(te->set, &te->elem);
3616 nft_data_uninit(&te->elem.key, NFT_DATA_VALUE); 3623 nft_data_uninit(&te->elem.key, NFT_DATA_VALUE);
3617 if (te->elem.flags & NFT_SET_MAP) { 3624 if (te->set->flags & NFT_SET_MAP &&
3618 nft_data_uninit(&te->elem.data, 3625 !(te->elem.flags & NFT_SET_ELEM_INTERVAL_END))
3619 te->set->dtype); 3626 nft_data_uninit(&te->elem.data, te->set->dtype);
3620 } 3627 te->set->ops->remove(te->set, &te->elem);
3621 nft_trans_destroy(trans); 3628 nft_trans_destroy(trans);
3622 break; 3629 break;
3623 } 3630 }
@@ -3658,7 +3665,7 @@ static int nf_tables_abort(struct sk_buff *skb)
3658{ 3665{
3659 struct net *net = sock_net(skb->sk); 3666 struct net *net = sock_net(skb->sk);
3660 struct nft_trans *trans, *next; 3667 struct nft_trans *trans, *next;
3661 struct nft_set *set; 3668 struct nft_trans_elem *te;
3662 3669
3663 list_for_each_entry_safe(trans, next, &net->nft.commit_list, list) { 3670 list_for_each_entry_safe(trans, next, &net->nft.commit_list, list) {
3664 switch (trans->msg_type) { 3671 switch (trans->msg_type) {
@@ -3719,9 +3726,13 @@ static int nf_tables_abort(struct sk_buff *skb)
3719 break; 3726 break;
3720 case NFT_MSG_NEWSETELEM: 3727 case NFT_MSG_NEWSETELEM:
3721 nft_trans_elem_set(trans)->nelems--; 3728 nft_trans_elem_set(trans)->nelems--;
3722 set = nft_trans_elem_set(trans); 3729 te = (struct nft_trans_elem *)trans->data;
3723 set->ops->get(set, &nft_trans_elem(trans)); 3730 te->set->ops->get(te->set, &te->elem);
3724 set->ops->remove(set, &nft_trans_elem(trans)); 3731 nft_data_uninit(&te->elem.key, NFT_DATA_VALUE);
3732 if (te->set->flags & NFT_SET_MAP &&
3733 !(te->elem.flags & NFT_SET_ELEM_INTERVAL_END))
3734 nft_data_uninit(&te->elem.data, te->set->dtype);
3735 te->set->ops->remove(te->set, &te->elem);
3725 nft_trans_destroy(trans); 3736 nft_trans_destroy(trans);
3726 break; 3737 break;
3727 case NFT_MSG_DELSETELEM: 3738 case NFT_MSG_DELSETELEM:
diff --git a/net/netfilter/nft_compat.c b/net/netfilter/nft_compat.c
index c598f74063a1..213584cf04b3 100644
--- a/net/netfilter/nft_compat.c
+++ b/net/netfilter/nft_compat.c
@@ -123,7 +123,7 @@ static void
123nft_target_set_tgchk_param(struct xt_tgchk_param *par, 123nft_target_set_tgchk_param(struct xt_tgchk_param *par,
124 const struct nft_ctx *ctx, 124 const struct nft_ctx *ctx,
125 struct xt_target *target, void *info, 125 struct xt_target *target, void *info,
126 union nft_entry *entry, u8 proto, bool inv) 126 union nft_entry *entry, u16 proto, bool inv)
127{ 127{
128 par->net = ctx->net; 128 par->net = ctx->net;
129 par->table = ctx->table->name; 129 par->table = ctx->table->name;
@@ -137,7 +137,7 @@ nft_target_set_tgchk_param(struct xt_tgchk_param *par,
137 entry->e6.ipv6.invflags = inv ? IP6T_INV_PROTO : 0; 137 entry->e6.ipv6.invflags = inv ? IP6T_INV_PROTO : 0;
138 break; 138 break;
139 case NFPROTO_BRIDGE: 139 case NFPROTO_BRIDGE:
140 entry->ebt.ethproto = proto; 140 entry->ebt.ethproto = (__force __be16)proto;
141 entry->ebt.invflags = inv ? EBT_IPROTO : 0; 141 entry->ebt.invflags = inv ? EBT_IPROTO : 0;
142 break; 142 break;
143 } 143 }
@@ -171,7 +171,7 @@ static const struct nla_policy nft_rule_compat_policy[NFTA_RULE_COMPAT_MAX + 1]
171 [NFTA_RULE_COMPAT_FLAGS] = { .type = NLA_U32 }, 171 [NFTA_RULE_COMPAT_FLAGS] = { .type = NLA_U32 },
172}; 172};
173 173
174static int nft_parse_compat(const struct nlattr *attr, u8 *proto, bool *inv) 174static int nft_parse_compat(const struct nlattr *attr, u16 *proto, bool *inv)
175{ 175{
176 struct nlattr *tb[NFTA_RULE_COMPAT_MAX+1]; 176 struct nlattr *tb[NFTA_RULE_COMPAT_MAX+1];
177 u32 flags; 177 u32 flags;
@@ -203,7 +203,7 @@ nft_target_init(const struct nft_ctx *ctx, const struct nft_expr *expr,
203 struct xt_target *target = expr->ops->data; 203 struct xt_target *target = expr->ops->data;
204 struct xt_tgchk_param par; 204 struct xt_tgchk_param par;
205 size_t size = XT_ALIGN(nla_len(tb[NFTA_TARGET_INFO])); 205 size_t size = XT_ALIGN(nla_len(tb[NFTA_TARGET_INFO]));
206 u8 proto = 0; 206 u16 proto = 0;
207 bool inv = false; 207 bool inv = false;
208 union nft_entry e = {}; 208 union nft_entry e = {};
209 int ret; 209 int ret;
@@ -334,7 +334,7 @@ static const struct nla_policy nft_match_policy[NFTA_MATCH_MAX + 1] = {
334static void 334static void
335nft_match_set_mtchk_param(struct xt_mtchk_param *par, const struct nft_ctx *ctx, 335nft_match_set_mtchk_param(struct xt_mtchk_param *par, const struct nft_ctx *ctx,
336 struct xt_match *match, void *info, 336 struct xt_match *match, void *info,
337 union nft_entry *entry, u8 proto, bool inv) 337 union nft_entry *entry, u16 proto, bool inv)
338{ 338{
339 par->net = ctx->net; 339 par->net = ctx->net;
340 par->table = ctx->table->name; 340 par->table = ctx->table->name;
@@ -348,7 +348,7 @@ nft_match_set_mtchk_param(struct xt_mtchk_param *par, const struct nft_ctx *ctx,
348 entry->e6.ipv6.invflags = inv ? IP6T_INV_PROTO : 0; 348 entry->e6.ipv6.invflags = inv ? IP6T_INV_PROTO : 0;
349 break; 349 break;
350 case NFPROTO_BRIDGE: 350 case NFPROTO_BRIDGE:
351 entry->ebt.ethproto = proto; 351 entry->ebt.ethproto = (__force __be16)proto;
352 entry->ebt.invflags = inv ? EBT_IPROTO : 0; 352 entry->ebt.invflags = inv ? EBT_IPROTO : 0;
353 break; 353 break;
354 } 354 }
@@ -385,7 +385,7 @@ nft_match_init(const struct nft_ctx *ctx, const struct nft_expr *expr,
385 struct xt_match *match = expr->ops->data; 385 struct xt_match *match = expr->ops->data;
386 struct xt_mtchk_param par; 386 struct xt_mtchk_param par;
387 size_t size = XT_ALIGN(nla_len(tb[NFTA_MATCH_INFO])); 387 size_t size = XT_ALIGN(nla_len(tb[NFTA_MATCH_INFO]));
388 u8 proto = 0; 388 u16 proto = 0;
389 bool inv = false; 389 bool inv = false;
390 union nft_entry e = {}; 390 union nft_entry e = {};
391 int ret; 391 int ret;
@@ -625,8 +625,12 @@ nft_match_select_ops(const struct nft_ctx *ctx,
625 struct xt_match *match = nft_match->ops.data; 625 struct xt_match *match = nft_match->ops.data;
626 626
627 if (strcmp(match->name, mt_name) == 0 && 627 if (strcmp(match->name, mt_name) == 0 &&
628 match->revision == rev && match->family == family) 628 match->revision == rev && match->family == family) {
629 if (!try_module_get(match->me))
630 return ERR_PTR(-ENOENT);
631
629 return &nft_match->ops; 632 return &nft_match->ops;
633 }
630 } 634 }
631 635
632 match = xt_request_find_match(family, mt_name, rev); 636 match = xt_request_find_match(family, mt_name, rev);
@@ -695,8 +699,12 @@ nft_target_select_ops(const struct nft_ctx *ctx,
695 struct xt_target *target = nft_target->ops.data; 699 struct xt_target *target = nft_target->ops.data;
696 700
697 if (strcmp(target->name, tg_name) == 0 && 701 if (strcmp(target->name, tg_name) == 0 &&
698 target->revision == rev && target->family == family) 702 target->revision == rev && target->family == family) {
703 if (!try_module_get(target->me))
704 return ERR_PTR(-ENOENT);
705
699 return &nft_target->ops; 706 return &nft_target->ops;
707 }
700 } 708 }
701 709
702 target = xt_request_find_target(family, tg_name, rev); 710 target = xt_request_find_target(family, tg_name, rev);
diff --git a/net/netfilter/nft_hash.c b/net/netfilter/nft_hash.c
index 61e6c407476a..c82df0a48fcd 100644
--- a/net/netfilter/nft_hash.c
+++ b/net/netfilter/nft_hash.c
@@ -192,8 +192,6 @@ static int nft_hash_init(const struct nft_set *set,
192 .key_offset = offsetof(struct nft_hash_elem, key), 192 .key_offset = offsetof(struct nft_hash_elem, key),
193 .key_len = set->klen, 193 .key_len = set->klen,
194 .hashfn = jhash, 194 .hashfn = jhash,
195 .grow_decision = rht_grow_above_75,
196 .shrink_decision = rht_shrink_below_30,
197 }; 195 };
198 196
199 return rhashtable_init(priv, &params); 197 return rhashtable_init(priv, &params);
diff --git a/net/netfilter/xt_recent.c b/net/netfilter/xt_recent.c
index 30dbe34915ae..45e1b30e4fb2 100644
--- a/net/netfilter/xt_recent.c
+++ b/net/netfilter/xt_recent.c
@@ -378,12 +378,11 @@ static int recent_mt_check(const struct xt_mtchk_param *par,
378 mutex_lock(&recent_mutex); 378 mutex_lock(&recent_mutex);
379 t = recent_table_lookup(recent_net, info->name); 379 t = recent_table_lookup(recent_net, info->name);
380 if (t != NULL) { 380 if (t != NULL) {
381 if (info->hit_count > t->nstamps_max_mask) { 381 if (nstamp_mask > t->nstamps_max_mask) {
382 pr_info("hitcount (%u) is larger than packets to be remembered (%u) for table %s\n", 382 spin_lock_bh(&recent_lock);
383 info->hit_count, t->nstamps_max_mask + 1, 383 recent_table_flush(t);
384 info->name); 384 t->nstamps_max_mask = nstamp_mask;
385 ret = -EINVAL; 385 spin_unlock_bh(&recent_lock);
386 goto out;
387 } 386 }
388 387
389 t->refcnt++; 388 t->refcnt++;
diff --git a/net/netfilter/xt_socket.c b/net/netfilter/xt_socket.c
index 1ba67931eb1b..13332dbf291d 100644
--- a/net/netfilter/xt_socket.c
+++ b/net/netfilter/xt_socket.c
@@ -243,12 +243,13 @@ static int
243extract_icmp6_fields(const struct sk_buff *skb, 243extract_icmp6_fields(const struct sk_buff *skb,
244 unsigned int outside_hdrlen, 244 unsigned int outside_hdrlen,
245 int *protocol, 245 int *protocol,
246 struct in6_addr **raddr, 246 const struct in6_addr **raddr,
247 struct in6_addr **laddr, 247 const struct in6_addr **laddr,
248 __be16 *rport, 248 __be16 *rport,
249 __be16 *lport) 249 __be16 *lport,
250 struct ipv6hdr *ipv6_var)
250{ 251{
251 struct ipv6hdr *inside_iph, _inside_iph; 252 const struct ipv6hdr *inside_iph;
252 struct icmp6hdr *icmph, _icmph; 253 struct icmp6hdr *icmph, _icmph;
253 __be16 *ports, _ports[2]; 254 __be16 *ports, _ports[2];
254 u8 inside_nexthdr; 255 u8 inside_nexthdr;
@@ -263,12 +264,14 @@ extract_icmp6_fields(const struct sk_buff *skb,
263 if (icmph->icmp6_type & ICMPV6_INFOMSG_MASK) 264 if (icmph->icmp6_type & ICMPV6_INFOMSG_MASK)
264 return 1; 265 return 1;
265 266
266 inside_iph = skb_header_pointer(skb, outside_hdrlen + sizeof(_icmph), sizeof(_inside_iph), &_inside_iph); 267 inside_iph = skb_header_pointer(skb, outside_hdrlen + sizeof(_icmph),
268 sizeof(*ipv6_var), ipv6_var);
267 if (inside_iph == NULL) 269 if (inside_iph == NULL)
268 return 1; 270 return 1;
269 inside_nexthdr = inside_iph->nexthdr; 271 inside_nexthdr = inside_iph->nexthdr;
270 272
271 inside_hdrlen = ipv6_skip_exthdr(skb, outside_hdrlen + sizeof(_icmph) + sizeof(_inside_iph), 273 inside_hdrlen = ipv6_skip_exthdr(skb, outside_hdrlen + sizeof(_icmph) +
274 sizeof(*ipv6_var),
272 &inside_nexthdr, &inside_fragoff); 275 &inside_nexthdr, &inside_fragoff);
273 if (inside_hdrlen < 0) 276 if (inside_hdrlen < 0)
274 return 1; /* hjm: Packet has no/incomplete transport layer headers. */ 277 return 1; /* hjm: Packet has no/incomplete transport layer headers. */
@@ -315,10 +318,10 @@ xt_socket_get_sock_v6(struct net *net, const u8 protocol,
315static bool 318static bool
316socket_mt6_v1_v2(const struct sk_buff *skb, struct xt_action_param *par) 319socket_mt6_v1_v2(const struct sk_buff *skb, struct xt_action_param *par)
317{ 320{
318 struct ipv6hdr *iph = ipv6_hdr(skb); 321 struct ipv6hdr ipv6_var, *iph = ipv6_hdr(skb);
319 struct udphdr _hdr, *hp = NULL; 322 struct udphdr _hdr, *hp = NULL;
320 struct sock *sk = skb->sk; 323 struct sock *sk = skb->sk;
321 struct in6_addr *daddr = NULL, *saddr = NULL; 324 const struct in6_addr *daddr = NULL, *saddr = NULL;
322 __be16 uninitialized_var(dport), uninitialized_var(sport); 325 __be16 uninitialized_var(dport), uninitialized_var(sport);
323 int thoff = 0, uninitialized_var(tproto); 326 int thoff = 0, uninitialized_var(tproto);
324 const struct xt_socket_mtinfo1 *info = (struct xt_socket_mtinfo1 *) par->matchinfo; 327 const struct xt_socket_mtinfo1 *info = (struct xt_socket_mtinfo1 *) par->matchinfo;
@@ -342,7 +345,7 @@ socket_mt6_v1_v2(const struct sk_buff *skb, struct xt_action_param *par)
342 345
343 } else if (tproto == IPPROTO_ICMPV6) { 346 } else if (tproto == IPPROTO_ICMPV6) {
344 if (extract_icmp6_fields(skb, thoff, &tproto, &saddr, &daddr, 347 if (extract_icmp6_fields(skb, thoff, &tproto, &saddr, &daddr,
345 &sport, &dport)) 348 &sport, &dport, &ipv6_var))
346 return false; 349 return false;
347 } else { 350 } else {
348 return false; 351 return false;
diff --git a/net/netlink/af_netlink.c b/net/netlink/af_netlink.c
index 2702673f0f23..05919bf3f670 100644
--- a/net/netlink/af_netlink.c
+++ b/net/netlink/af_netlink.c
@@ -3126,8 +3126,6 @@ static int __init netlink_proto_init(void)
3126 .key_len = sizeof(u32), /* portid */ 3126 .key_len = sizeof(u32), /* portid */
3127 .hashfn = jhash, 3127 .hashfn = jhash,
3128 .max_shift = 16, /* 64K */ 3128 .max_shift = 16, /* 64K */
3129 .grow_decision = rht_grow_above_75,
3130 .shrink_decision = rht_shrink_below_30,
3131 }; 3129 };
3132 3130
3133 if (err != 0) 3131 if (err != 0)
diff --git a/net/openvswitch/datapath.c b/net/openvswitch/datapath.c
index ae5e77cdc0ca..5bae7243c577 100644
--- a/net/openvswitch/datapath.c
+++ b/net/openvswitch/datapath.c
@@ -2194,14 +2194,55 @@ static int __net_init ovs_init_net(struct net *net)
2194 return 0; 2194 return 0;
2195} 2195}
2196 2196
2197static void __net_exit ovs_exit_net(struct net *net) 2197static void __net_exit list_vports_from_net(struct net *net, struct net *dnet,
2198 struct list_head *head)
2198{ 2199{
2199 struct datapath *dp, *dp_next;
2200 struct ovs_net *ovs_net = net_generic(net, ovs_net_id); 2200 struct ovs_net *ovs_net = net_generic(net, ovs_net_id);
2201 struct datapath *dp;
2202
2203 list_for_each_entry(dp, &ovs_net->dps, list_node) {
2204 int i;
2205
2206 for (i = 0; i < DP_VPORT_HASH_BUCKETS; i++) {
2207 struct vport *vport;
2208
2209 hlist_for_each_entry(vport, &dp->ports[i], dp_hash_node) {
2210 struct netdev_vport *netdev_vport;
2211
2212 if (vport->ops->type != OVS_VPORT_TYPE_INTERNAL)
2213 continue;
2214
2215 netdev_vport = netdev_vport_priv(vport);
2216 if (dev_net(netdev_vport->dev) == dnet)
2217 list_add(&vport->detach_list, head);
2218 }
2219 }
2220 }
2221}
2222
2223static void __net_exit ovs_exit_net(struct net *dnet)
2224{
2225 struct datapath *dp, *dp_next;
2226 struct ovs_net *ovs_net = net_generic(dnet, ovs_net_id);
2227 struct vport *vport, *vport_next;
2228 struct net *net;
2229 LIST_HEAD(head);
2201 2230
2202 ovs_lock(); 2231 ovs_lock();
2203 list_for_each_entry_safe(dp, dp_next, &ovs_net->dps, list_node) 2232 list_for_each_entry_safe(dp, dp_next, &ovs_net->dps, list_node)
2204 __dp_destroy(dp); 2233 __dp_destroy(dp);
2234
2235 rtnl_lock();
2236 for_each_net(net)
2237 list_vports_from_net(net, dnet, &head);
2238 rtnl_unlock();
2239
2240 /* Detach all vports from given namespace. */
2241 list_for_each_entry_safe(vport, vport_next, &head, detach_list) {
2242 list_del(&vport->detach_list);
2243 ovs_dp_detach_port(vport);
2244 }
2245
2205 ovs_unlock(); 2246 ovs_unlock();
2206 2247
2207 cancel_work_sync(&ovs_net->dp_notify_work); 2248 cancel_work_sync(&ovs_net->dp_notify_work);
diff --git a/net/openvswitch/flow_netlink.c b/net/openvswitch/flow_netlink.c
index 216f20b90aa5..22b18c145c92 100644
--- a/net/openvswitch/flow_netlink.c
+++ b/net/openvswitch/flow_netlink.c
@@ -2253,14 +2253,20 @@ static int masked_set_action_to_set_action_attr(const struct nlattr *a,
2253 struct sk_buff *skb) 2253 struct sk_buff *skb)
2254{ 2254{
2255 const struct nlattr *ovs_key = nla_data(a); 2255 const struct nlattr *ovs_key = nla_data(a);
2256 struct nlattr *nla;
2256 size_t key_len = nla_len(ovs_key) / 2; 2257 size_t key_len = nla_len(ovs_key) / 2;
2257 2258
2258 /* Revert the conversion we did from a non-masked set action to 2259 /* Revert the conversion we did from a non-masked set action to
2259 * masked set action. 2260 * masked set action.
2260 */ 2261 */
2261 if (nla_put(skb, OVS_ACTION_ATTR_SET, nla_len(a) - key_len, ovs_key)) 2262 nla = nla_nest_start(skb, OVS_ACTION_ATTR_SET);
2263 if (!nla)
2262 return -EMSGSIZE; 2264 return -EMSGSIZE;
2263 2265
2266 if (nla_put(skb, nla_type(ovs_key), key_len, nla_data(ovs_key)))
2267 return -EMSGSIZE;
2268
2269 nla_nest_end(skb, nla);
2264 return 0; 2270 return 0;
2265} 2271}
2266 2272
diff --git a/net/openvswitch/vport.h b/net/openvswitch/vport.h
index f8ae295fb001..bc85331a6c60 100644
--- a/net/openvswitch/vport.h
+++ b/net/openvswitch/vport.h
@@ -103,6 +103,7 @@ struct vport_portids {
103 * @ops: Class structure. 103 * @ops: Class structure.
104 * @percpu_stats: Points to per-CPU statistics used and maintained by vport 104 * @percpu_stats: Points to per-CPU statistics used and maintained by vport
105 * @err_stats: Points to error statistics used and maintained by vport 105 * @err_stats: Points to error statistics used and maintained by vport
106 * @detach_list: list used for detaching vport in net-exit call.
106 */ 107 */
107struct vport { 108struct vport {
108 struct rcu_head rcu; 109 struct rcu_head rcu;
@@ -117,6 +118,7 @@ struct vport {
117 struct pcpu_sw_netstats __percpu *percpu_stats; 118 struct pcpu_sw_netstats __percpu *percpu_stats;
118 119
119 struct vport_err_stats err_stats; 120 struct vport_err_stats err_stats;
121 struct list_head detach_list;
120}; 122};
121 123
122/** 124/**
diff --git a/net/packet/af_packet.c b/net/packet/af_packet.c
index 9c28cec1a083..f8db7064d81c 100644
--- a/net/packet/af_packet.c
+++ b/net/packet/af_packet.c
@@ -698,6 +698,10 @@ static void prb_retire_rx_blk_timer_expired(unsigned long data)
698 698
699 if (pkc->last_kactive_blk_num == pkc->kactive_blk_num) { 699 if (pkc->last_kactive_blk_num == pkc->kactive_blk_num) {
700 if (!frozen) { 700 if (!frozen) {
701 if (!BLOCK_NUM_PKTS(pbd)) {
702 /* An empty block. Just refresh the timer. */
703 goto refresh_timer;
704 }
701 prb_retire_current_block(pkc, po, TP_STATUS_BLK_TMO); 705 prb_retire_current_block(pkc, po, TP_STATUS_BLK_TMO);
702 if (!prb_dispatch_next_block(pkc, po)) 706 if (!prb_dispatch_next_block(pkc, po))
703 goto refresh_timer; 707 goto refresh_timer;
@@ -798,7 +802,11 @@ static void prb_close_block(struct tpacket_kbdq_core *pkc1,
798 h1->ts_last_pkt.ts_sec = last_pkt->tp_sec; 802 h1->ts_last_pkt.ts_sec = last_pkt->tp_sec;
799 h1->ts_last_pkt.ts_nsec = last_pkt->tp_nsec; 803 h1->ts_last_pkt.ts_nsec = last_pkt->tp_nsec;
800 } else { 804 } else {
801 /* Ok, we tmo'd - so get the current time */ 805 /* Ok, we tmo'd - so get the current time.
806 *
807 * It shouldn't really happen as we don't close empty
808 * blocks. See prb_retire_rx_blk_timer_expired().
809 */
802 struct timespec ts; 810 struct timespec ts;
803 getnstimeofday(&ts); 811 getnstimeofday(&ts);
804 h1->ts_last_pkt.ts_sec = ts.tv_sec; 812 h1->ts_last_pkt.ts_sec = ts.tv_sec;
@@ -1349,14 +1357,14 @@ static int packet_rcv_fanout(struct sk_buff *skb, struct net_device *dev,
1349 return 0; 1357 return 0;
1350 } 1358 }
1351 1359
1360 if (fanout_has_flag(f, PACKET_FANOUT_FLAG_DEFRAG)) {
1361 skb = ip_check_defrag(skb, IP_DEFRAG_AF_PACKET);
1362 if (!skb)
1363 return 0;
1364 }
1352 switch (f->type) { 1365 switch (f->type) {
1353 case PACKET_FANOUT_HASH: 1366 case PACKET_FANOUT_HASH:
1354 default: 1367 default:
1355 if (fanout_has_flag(f, PACKET_FANOUT_FLAG_DEFRAG)) {
1356 skb = ip_check_defrag(skb, IP_DEFRAG_AF_PACKET);
1357 if (!skb)
1358 return 0;
1359 }
1360 idx = fanout_demux_hash(f, skb, num); 1368 idx = fanout_demux_hash(f, skb, num);
1361 break; 1369 break;
1362 case PACKET_FANOUT_LB: 1370 case PACKET_FANOUT_LB:
@@ -3115,11 +3123,18 @@ static int packet_dev_mc(struct net_device *dev, struct packet_mclist *i,
3115 return 0; 3123 return 0;
3116} 3124}
3117 3125
3118static void packet_dev_mclist(struct net_device *dev, struct packet_mclist *i, int what) 3126static void packet_dev_mclist_delete(struct net_device *dev,
3127 struct packet_mclist **mlp)
3119{ 3128{
3120 for ( ; i; i = i->next) { 3129 struct packet_mclist *ml;
3121 if (i->ifindex == dev->ifindex) 3130
3122 packet_dev_mc(dev, i, what); 3131 while ((ml = *mlp) != NULL) {
3132 if (ml->ifindex == dev->ifindex) {
3133 packet_dev_mc(dev, ml, -1);
3134 *mlp = ml->next;
3135 kfree(ml);
3136 } else
3137 mlp = &ml->next;
3123 } 3138 }
3124} 3139}
3125 3140
@@ -3196,12 +3211,11 @@ static int packet_mc_drop(struct sock *sk, struct packet_mreq_max *mreq)
3196 packet_dev_mc(dev, ml, -1); 3211 packet_dev_mc(dev, ml, -1);
3197 kfree(ml); 3212 kfree(ml);
3198 } 3213 }
3199 rtnl_unlock(); 3214 break;
3200 return 0;
3201 } 3215 }
3202 } 3216 }
3203 rtnl_unlock(); 3217 rtnl_unlock();
3204 return -EADDRNOTAVAIL; 3218 return 0;
3205} 3219}
3206 3220
3207static void packet_flush_mclist(struct sock *sk) 3221static void packet_flush_mclist(struct sock *sk)
@@ -3551,7 +3565,7 @@ static int packet_notifier(struct notifier_block *this,
3551 switch (msg) { 3565 switch (msg) {
3552 case NETDEV_UNREGISTER: 3566 case NETDEV_UNREGISTER:
3553 if (po->mclist) 3567 if (po->mclist)
3554 packet_dev_mclist(dev, po->mclist, -1); 3568 packet_dev_mclist_delete(dev, &po->mclist);
3555 /* fallthrough */ 3569 /* fallthrough */
3556 3570
3557 case NETDEV_DOWN: 3571 case NETDEV_DOWN:
diff --git a/net/rds/iw_rdma.c b/net/rds/iw_rdma.c
index a817705ce2d0..dba8d0864f18 100644
--- a/net/rds/iw_rdma.c
+++ b/net/rds/iw_rdma.c
@@ -88,7 +88,9 @@ static unsigned int rds_iw_unmap_fastreg_list(struct rds_iw_mr_pool *pool,
88 int *unpinned); 88 int *unpinned);
89static void rds_iw_destroy_fastreg(struct rds_iw_mr_pool *pool, struct rds_iw_mr *ibmr); 89static void rds_iw_destroy_fastreg(struct rds_iw_mr_pool *pool, struct rds_iw_mr *ibmr);
90 90
91static int rds_iw_get_device(struct rds_sock *rs, struct rds_iw_device **rds_iwdev, struct rdma_cm_id **cm_id) 91static int rds_iw_get_device(struct sockaddr_in *src, struct sockaddr_in *dst,
92 struct rds_iw_device **rds_iwdev,
93 struct rdma_cm_id **cm_id)
92{ 94{
93 struct rds_iw_device *iwdev; 95 struct rds_iw_device *iwdev;
94 struct rds_iw_cm_id *i_cm_id; 96 struct rds_iw_cm_id *i_cm_id;
@@ -112,15 +114,15 @@ static int rds_iw_get_device(struct rds_sock *rs, struct rds_iw_device **rds_iwd
112 src_addr->sin_port, 114 src_addr->sin_port,
113 dst_addr->sin_addr.s_addr, 115 dst_addr->sin_addr.s_addr,
114 dst_addr->sin_port, 116 dst_addr->sin_port,
115 rs->rs_bound_addr, 117 src->sin_addr.s_addr,
116 rs->rs_bound_port, 118 src->sin_port,
117 rs->rs_conn_addr, 119 dst->sin_addr.s_addr,
118 rs->rs_conn_port); 120 dst->sin_port);
119#ifdef WORKING_TUPLE_DETECTION 121#ifdef WORKING_TUPLE_DETECTION
120 if (src_addr->sin_addr.s_addr == rs->rs_bound_addr && 122 if (src_addr->sin_addr.s_addr == src->sin_addr.s_addr &&
121 src_addr->sin_port == rs->rs_bound_port && 123 src_addr->sin_port == src->sin_port &&
122 dst_addr->sin_addr.s_addr == rs->rs_conn_addr && 124 dst_addr->sin_addr.s_addr == dst->sin_addr.s_addr &&
123 dst_addr->sin_port == rs->rs_conn_port) { 125 dst_addr->sin_port == dst->sin_port) {
124#else 126#else
125 /* FIXME - needs to compare the local and remote 127 /* FIXME - needs to compare the local and remote
126 * ipaddr/port tuple, but the ipaddr is the only 128 * ipaddr/port tuple, but the ipaddr is the only
@@ -128,7 +130,7 @@ static int rds_iw_get_device(struct rds_sock *rs, struct rds_iw_device **rds_iwd
128 * zero'ed. It doesn't appear to be properly populated 130 * zero'ed. It doesn't appear to be properly populated
129 * during connection setup... 131 * during connection setup...
130 */ 132 */
131 if (src_addr->sin_addr.s_addr == rs->rs_bound_addr) { 133 if (src_addr->sin_addr.s_addr == src->sin_addr.s_addr) {
132#endif 134#endif
133 spin_unlock_irq(&iwdev->spinlock); 135 spin_unlock_irq(&iwdev->spinlock);
134 *rds_iwdev = iwdev; 136 *rds_iwdev = iwdev;
@@ -180,19 +182,13 @@ int rds_iw_update_cm_id(struct rds_iw_device *rds_iwdev, struct rdma_cm_id *cm_i
180{ 182{
181 struct sockaddr_in *src_addr, *dst_addr; 183 struct sockaddr_in *src_addr, *dst_addr;
182 struct rds_iw_device *rds_iwdev_old; 184 struct rds_iw_device *rds_iwdev_old;
183 struct rds_sock rs;
184 struct rdma_cm_id *pcm_id; 185 struct rdma_cm_id *pcm_id;
185 int rc; 186 int rc;
186 187
187 src_addr = (struct sockaddr_in *)&cm_id->route.addr.src_addr; 188 src_addr = (struct sockaddr_in *)&cm_id->route.addr.src_addr;
188 dst_addr = (struct sockaddr_in *)&cm_id->route.addr.dst_addr; 189 dst_addr = (struct sockaddr_in *)&cm_id->route.addr.dst_addr;
189 190
190 rs.rs_bound_addr = src_addr->sin_addr.s_addr; 191 rc = rds_iw_get_device(src_addr, dst_addr, &rds_iwdev_old, &pcm_id);
191 rs.rs_bound_port = src_addr->sin_port;
192 rs.rs_conn_addr = dst_addr->sin_addr.s_addr;
193 rs.rs_conn_port = dst_addr->sin_port;
194
195 rc = rds_iw_get_device(&rs, &rds_iwdev_old, &pcm_id);
196 if (rc) 192 if (rc)
197 rds_iw_remove_cm_id(rds_iwdev, cm_id); 193 rds_iw_remove_cm_id(rds_iwdev, cm_id);
198 194
@@ -598,9 +594,17 @@ void *rds_iw_get_mr(struct scatterlist *sg, unsigned long nents,
598 struct rds_iw_device *rds_iwdev; 594 struct rds_iw_device *rds_iwdev;
599 struct rds_iw_mr *ibmr = NULL; 595 struct rds_iw_mr *ibmr = NULL;
600 struct rdma_cm_id *cm_id; 596 struct rdma_cm_id *cm_id;
597 struct sockaddr_in src = {
598 .sin_addr.s_addr = rs->rs_bound_addr,
599 .sin_port = rs->rs_bound_port,
600 };
601 struct sockaddr_in dst = {
602 .sin_addr.s_addr = rs->rs_conn_addr,
603 .sin_port = rs->rs_conn_port,
604 };
601 int ret; 605 int ret;
602 606
603 ret = rds_iw_get_device(rs, &rds_iwdev, &cm_id); 607 ret = rds_iw_get_device(&src, &dst, &rds_iwdev, &cm_id);
604 if (ret || !cm_id) { 608 if (ret || !cm_id) {
605 ret = -ENODEV; 609 ret = -ENODEV;
606 goto out; 610 goto out;
diff --git a/net/rxrpc/ar-ack.c b/net/rxrpc/ar-ack.c
index c6be17a959a6..e0547f521f20 100644
--- a/net/rxrpc/ar-ack.c
+++ b/net/rxrpc/ar-ack.c
@@ -218,7 +218,8 @@ static void rxrpc_resend(struct rxrpc_call *call)
218 struct rxrpc_header *hdr; 218 struct rxrpc_header *hdr;
219 struct sk_buff *txb; 219 struct sk_buff *txb;
220 unsigned long *p_txb, resend_at; 220 unsigned long *p_txb, resend_at;
221 int loop, stop; 221 bool stop;
222 int loop;
222 u8 resend; 223 u8 resend;
223 224
224 _enter("{%d,%d,%d,%d},", 225 _enter("{%d,%d,%d,%d},",
@@ -226,7 +227,7 @@ static void rxrpc_resend(struct rxrpc_call *call)
226 atomic_read(&call->sequence), 227 atomic_read(&call->sequence),
227 CIRC_CNT(call->acks_head, call->acks_tail, call->acks_winsz)); 228 CIRC_CNT(call->acks_head, call->acks_tail, call->acks_winsz));
228 229
229 stop = 0; 230 stop = false;
230 resend = 0; 231 resend = 0;
231 resend_at = 0; 232 resend_at = 0;
232 233
@@ -255,11 +256,11 @@ static void rxrpc_resend(struct rxrpc_call *call)
255 _proto("Tx DATA %%%u { #%d }", 256 _proto("Tx DATA %%%u { #%d }",
256 ntohl(sp->hdr.serial), ntohl(sp->hdr.seq)); 257 ntohl(sp->hdr.serial), ntohl(sp->hdr.seq));
257 if (rxrpc_send_packet(call->conn->trans, txb) < 0) { 258 if (rxrpc_send_packet(call->conn->trans, txb) < 0) {
258 stop = 0; 259 stop = true;
259 sp->resend_at = jiffies + 3; 260 sp->resend_at = jiffies + 3;
260 } else { 261 } else {
261 sp->resend_at = 262 sp->resend_at =
262 jiffies + rxrpc_resend_timeout * HZ; 263 jiffies + rxrpc_resend_timeout;
263 } 264 }
264 } 265 }
265 266
diff --git a/net/rxrpc/ar-error.c b/net/rxrpc/ar-error.c
index 5394b6be46ec..0610efa83d72 100644
--- a/net/rxrpc/ar-error.c
+++ b/net/rxrpc/ar-error.c
@@ -42,7 +42,8 @@ void rxrpc_UDP_error_report(struct sock *sk)
42 _leave("UDP socket errqueue empty"); 42 _leave("UDP socket errqueue empty");
43 return; 43 return;
44 } 44 }
45 if (!skb->len) { 45 serr = SKB_EXT_ERR(skb);
46 if (!skb->len && serr->ee.ee_origin == SO_EE_ORIGIN_TIMESTAMPING) {
46 _leave("UDP empty message"); 47 _leave("UDP empty message");
47 kfree_skb(skb); 48 kfree_skb(skb);
48 return; 49 return;
@@ -50,7 +51,6 @@ void rxrpc_UDP_error_report(struct sock *sk)
50 51
51 rxrpc_new_skb(skb); 52 rxrpc_new_skb(skb);
52 53
53 serr = SKB_EXT_ERR(skb);
54 addr = *(__be32 *)(skb_network_header(skb) + serr->addr_offset); 54 addr = *(__be32 *)(skb_network_header(skb) + serr->addr_offset);
55 port = serr->port; 55 port = serr->port;
56 56
diff --git a/net/rxrpc/ar-recvmsg.c b/net/rxrpc/ar-recvmsg.c
index 4575485ad1b4..19a560626dc4 100644
--- a/net/rxrpc/ar-recvmsg.c
+++ b/net/rxrpc/ar-recvmsg.c
@@ -87,7 +87,7 @@ int rxrpc_recvmsg(struct kiocb *iocb, struct socket *sock,
87 if (!skb) { 87 if (!skb) {
88 /* nothing remains on the queue */ 88 /* nothing remains on the queue */
89 if (copied && 89 if (copied &&
90 (msg->msg_flags & MSG_PEEK || timeo == 0)) 90 (flags & MSG_PEEK || timeo == 0))
91 goto out; 91 goto out;
92 92
93 /* wait for a message to turn up */ 93 /* wait for a message to turn up */
diff --git a/net/sched/act_bpf.c b/net/sched/act_bpf.c
index 82c5d7fc1988..5f6288fa3f12 100644
--- a/net/sched/act_bpf.c
+++ b/net/sched/act_bpf.c
@@ -25,21 +25,41 @@ static int tcf_bpf(struct sk_buff *skb, const struct tc_action *a,
25 struct tcf_result *res) 25 struct tcf_result *res)
26{ 26{
27 struct tcf_bpf *b = a->priv; 27 struct tcf_bpf *b = a->priv;
28 int action; 28 int action, filter_res;
29 int filter_res;
30 29
31 spin_lock(&b->tcf_lock); 30 spin_lock(&b->tcf_lock);
31
32 b->tcf_tm.lastuse = jiffies; 32 b->tcf_tm.lastuse = jiffies;
33 bstats_update(&b->tcf_bstats, skb); 33 bstats_update(&b->tcf_bstats, skb);
34 action = b->tcf_action;
35 34
36 filter_res = BPF_PROG_RUN(b->filter, skb); 35 filter_res = BPF_PROG_RUN(b->filter, skb);
37 if (filter_res == 0) { 36
38 /* Return code 0 from the BPF program 37 /* A BPF program may overwrite the default action opcode.
39 * is being interpreted as a drop here. 38 * Similarly as in cls_bpf, if filter_res == -1 we use the
40 */ 39 * default action specified from tc.
41 action = TC_ACT_SHOT; 40 *
41 * In case a different well-known TC_ACT opcode has been
42 * returned, it will overwrite the default one.
43 *
44 * For everything else that is unkown, TC_ACT_UNSPEC is
45 * returned.
46 */
47 switch (filter_res) {
48 case TC_ACT_PIPE:
49 case TC_ACT_RECLASSIFY:
50 case TC_ACT_OK:
51 action = filter_res;
52 break;
53 case TC_ACT_SHOT:
54 action = filter_res;
42 b->tcf_qstats.drops++; 55 b->tcf_qstats.drops++;
56 break;
57 case TC_ACT_UNSPEC:
58 action = b->tcf_action;
59 break;
60 default:
61 action = TC_ACT_UNSPEC;
62 break;
43 } 63 }
44 64
45 spin_unlock(&b->tcf_lock); 65 spin_unlock(&b->tcf_lock);
diff --git a/net/sched/cls_u32.c b/net/sched/cls_u32.c
index 09487afbfd51..95fdf4e40051 100644
--- a/net/sched/cls_u32.c
+++ b/net/sched/cls_u32.c
@@ -78,8 +78,11 @@ struct tc_u_hnode {
78 struct tc_u_common *tp_c; 78 struct tc_u_common *tp_c;
79 int refcnt; 79 int refcnt;
80 unsigned int divisor; 80 unsigned int divisor;
81 struct tc_u_knode __rcu *ht[1];
82 struct rcu_head rcu; 81 struct rcu_head rcu;
82 /* The 'ht' field MUST be the last field in structure to allow for
83 * more entries allocated at end of structure.
84 */
85 struct tc_u_knode __rcu *ht[1];
83}; 86};
84 87
85struct tc_u_common { 88struct tc_u_common {
diff --git a/net/sched/ematch.c b/net/sched/ematch.c
index 6742200b1307..fbb7ebfc58c6 100644
--- a/net/sched/ematch.c
+++ b/net/sched/ematch.c
@@ -228,6 +228,7 @@ static int tcf_em_validate(struct tcf_proto *tp,
228 * to replay the request. 228 * to replay the request.
229 */ 229 */
230 module_put(em->ops->owner); 230 module_put(em->ops->owner);
231 em->ops = NULL;
231 err = -EAGAIN; 232 err = -EAGAIN;
232 } 233 }
233#endif 234#endif
diff --git a/net/sunrpc/auth_gss/gss_rpc_upcall.c b/net/sunrpc/auth_gss/gss_rpc_upcall.c
index abbb7dcd1689..59eeed43eda2 100644
--- a/net/sunrpc/auth_gss/gss_rpc_upcall.c
+++ b/net/sunrpc/auth_gss/gss_rpc_upcall.c
@@ -217,6 +217,8 @@ static void gssp_free_receive_pages(struct gssx_arg_accept_sec_context *arg)
217 217
218 for (i = 0; i < arg->npages && arg->pages[i]; i++) 218 for (i = 0; i < arg->npages && arg->pages[i]; i++)
219 __free_page(arg->pages[i]); 219 __free_page(arg->pages[i]);
220
221 kfree(arg->pages);
220} 222}
221 223
222static int gssp_alloc_receive_pages(struct gssx_arg_accept_sec_context *arg) 224static int gssp_alloc_receive_pages(struct gssx_arg_accept_sec_context *arg)
diff --git a/net/sunrpc/auth_gss/svcauth_gss.c b/net/sunrpc/auth_gss/svcauth_gss.c
index 224a82f24d3c..1095be9c80ab 100644
--- a/net/sunrpc/auth_gss/svcauth_gss.c
+++ b/net/sunrpc/auth_gss/svcauth_gss.c
@@ -463,6 +463,8 @@ static int rsc_parse(struct cache_detail *cd,
463 /* number of additional gid's */ 463 /* number of additional gid's */
464 if (get_int(&mesg, &N)) 464 if (get_int(&mesg, &N))
465 goto out; 465 goto out;
466 if (N < 0 || N > NGROUPS_MAX)
467 goto out;
466 status = -ENOMEM; 468 status = -ENOMEM;
467 rsci.cred.cr_group_info = groups_alloc(N); 469 rsci.cred.cr_group_info = groups_alloc(N);
468 if (rsci.cred.cr_group_info == NULL) 470 if (rsci.cred.cr_group_info == NULL)
diff --git a/net/sunrpc/backchannel_rqst.c b/net/sunrpc/backchannel_rqst.c
index 651f49ab601f..9dd0ea8db463 100644
--- a/net/sunrpc/backchannel_rqst.c
+++ b/net/sunrpc/backchannel_rqst.c
@@ -309,12 +309,15 @@ void xprt_complete_bc_request(struct rpc_rqst *req, uint32_t copied)
309 struct rpc_xprt *xprt = req->rq_xprt; 309 struct rpc_xprt *xprt = req->rq_xprt;
310 struct svc_serv *bc_serv = xprt->bc_serv; 310 struct svc_serv *bc_serv = xprt->bc_serv;
311 311
312 spin_lock(&xprt->bc_pa_lock);
313 list_del(&req->rq_bc_pa_list);
314 spin_unlock(&xprt->bc_pa_lock);
315
312 req->rq_private_buf.len = copied; 316 req->rq_private_buf.len = copied;
313 set_bit(RPC_BC_PA_IN_USE, &req->rq_bc_pa_state); 317 set_bit(RPC_BC_PA_IN_USE, &req->rq_bc_pa_state);
314 318
315 dprintk("RPC: add callback request to list\n"); 319 dprintk("RPC: add callback request to list\n");
316 spin_lock(&bc_serv->sv_cb_lock); 320 spin_lock(&bc_serv->sv_cb_lock);
317 list_del(&req->rq_bc_pa_list);
318 list_add(&req->rq_bc_list, &bc_serv->sv_cb_list); 321 list_add(&req->rq_bc_list, &bc_serv->sv_cb_list);
319 wake_up(&bc_serv->sv_cb_waitq); 322 wake_up(&bc_serv->sv_cb_waitq);
320 spin_unlock(&bc_serv->sv_cb_lock); 323 spin_unlock(&bc_serv->sv_cb_lock);
diff --git a/net/sunrpc/cache.c b/net/sunrpc/cache.c
index 33fb105d4352..5199bb1a017e 100644
--- a/net/sunrpc/cache.c
+++ b/net/sunrpc/cache.c
@@ -921,7 +921,7 @@ static unsigned int cache_poll(struct file *filp, poll_table *wait,
921 poll_wait(filp, &queue_wait, wait); 921 poll_wait(filp, &queue_wait, wait);
922 922
923 /* alway allow write */ 923 /* alway allow write */
924 mask = POLL_OUT | POLLWRNORM; 924 mask = POLLOUT | POLLWRNORM;
925 925
926 if (!rp) 926 if (!rp)
927 return mask; 927 return mask;
diff --git a/net/sunrpc/xprtrdma/rpc_rdma.c b/net/sunrpc/xprtrdma/rpc_rdma.c
index 7e9acd9361c5..91ffde82fa0c 100644
--- a/net/sunrpc/xprtrdma/rpc_rdma.c
+++ b/net/sunrpc/xprtrdma/rpc_rdma.c
@@ -738,8 +738,9 @@ rpcrdma_reply_handler(struct rpcrdma_rep *rep)
738 struct rpc_xprt *xprt = rep->rr_xprt; 738 struct rpc_xprt *xprt = rep->rr_xprt;
739 struct rpcrdma_xprt *r_xprt = rpcx_to_rdmax(xprt); 739 struct rpcrdma_xprt *r_xprt = rpcx_to_rdmax(xprt);
740 __be32 *iptr; 740 __be32 *iptr;
741 int credits, rdmalen, status; 741 int rdmalen, status;
742 unsigned long cwnd; 742 unsigned long cwnd;
743 u32 credits;
743 744
744 /* Check status. If bad, signal disconnect and return rep to pool */ 745 /* Check status. If bad, signal disconnect and return rep to pool */
745 if (rep->rr_len == ~0U) { 746 if (rep->rr_len == ~0U) {
diff --git a/net/sunrpc/xprtrdma/xprt_rdma.h b/net/sunrpc/xprtrdma/xprt_rdma.h
index d1b70397c60f..0a16fb6f0885 100644
--- a/net/sunrpc/xprtrdma/xprt_rdma.h
+++ b/net/sunrpc/xprtrdma/xprt_rdma.h
@@ -285,7 +285,7 @@ rpcr_to_rdmar(struct rpc_rqst *rqst)
285 */ 285 */
286struct rpcrdma_buffer { 286struct rpcrdma_buffer {
287 spinlock_t rb_lock; /* protects indexes */ 287 spinlock_t rb_lock; /* protects indexes */
288 int rb_max_requests;/* client max requests */ 288 u32 rb_max_requests;/* client max requests */
289 struct list_head rb_mws; /* optional memory windows/fmrs/frmrs */ 289 struct list_head rb_mws; /* optional memory windows/fmrs/frmrs */
290 struct list_head rb_all; 290 struct list_head rb_all;
291 int rb_send_index; 291 int rb_send_index;
diff --git a/net/tipc/link.c b/net/tipc/link.c
index a4cf364316de..14f09b3cb87c 100644
--- a/net/tipc/link.c
+++ b/net/tipc/link.c
@@ -464,10 +464,11 @@ void tipc_link_reset(struct tipc_link *l_ptr)
464 /* Clean up all queues, except inputq: */ 464 /* Clean up all queues, except inputq: */
465 __skb_queue_purge(&l_ptr->outqueue); 465 __skb_queue_purge(&l_ptr->outqueue);
466 __skb_queue_purge(&l_ptr->deferred_queue); 466 __skb_queue_purge(&l_ptr->deferred_queue);
467 skb_queue_splice_init(&l_ptr->wakeupq, &l_ptr->inputq); 467 if (!owner->inputq)
468 if (!skb_queue_empty(&l_ptr->inputq)) 468 owner->inputq = &l_ptr->inputq;
469 skb_queue_splice_init(&l_ptr->wakeupq, owner->inputq);
470 if (!skb_queue_empty(owner->inputq))
469 owner->action_flags |= TIPC_MSG_EVT; 471 owner->action_flags |= TIPC_MSG_EVT;
470 owner->inputq = &l_ptr->inputq;
471 l_ptr->next_out = NULL; 472 l_ptr->next_out = NULL;
472 l_ptr->unacked_window = 0; 473 l_ptr->unacked_window = 0;
473 l_ptr->checkpoint = 1; 474 l_ptr->checkpoint = 1;
diff --git a/net/tipc/socket.c b/net/tipc/socket.c
index f73e975af80b..b4d4467d0bb0 100644
--- a/net/tipc/socket.c
+++ b/net/tipc/socket.c
@@ -2364,8 +2364,6 @@ int tipc_sk_rht_init(struct net *net)
2364 .hashfn = jhash, 2364 .hashfn = jhash,
2365 .max_shift = 20, /* 1M */ 2365 .max_shift = 20, /* 1M */
2366 .min_shift = 8, /* 256 */ 2366 .min_shift = 8, /* 256 */
2367 .grow_decision = rht_grow_above_75,
2368 .shrink_decision = rht_shrink_below_30,
2369 }; 2367 };
2370 2368
2371 return rhashtable_init(&tn->sk_rht, &rht_params); 2369 return rhashtable_init(&tn->sk_rht, &rht_params);
diff --git a/net/wireless/core.c b/net/wireless/core.c
index 3af0ecf1cc16..2a0bbd22854b 100644
--- a/net/wireless/core.c
+++ b/net/wireless/core.c
@@ -1199,6 +1199,7 @@ out_fail_wq:
1199 regulatory_exit(); 1199 regulatory_exit();
1200out_fail_reg: 1200out_fail_reg:
1201 debugfs_remove(ieee80211_debugfs_dir); 1201 debugfs_remove(ieee80211_debugfs_dir);
1202 nl80211_exit();
1202out_fail_nl80211: 1203out_fail_nl80211:
1203 unregister_netdevice_notifier(&cfg80211_netdev_notifier); 1204 unregister_netdevice_notifier(&cfg80211_netdev_notifier);
1204out_fail_notifier: 1205out_fail_notifier:
diff --git a/net/wireless/nl80211.c b/net/wireless/nl80211.c
index d78fd8b54515..b6f84f6a2a09 100644
--- a/net/wireless/nl80211.c
+++ b/net/wireless/nl80211.c
@@ -2654,10 +2654,6 @@ static int nl80211_new_interface(struct sk_buff *skb, struct genl_info *info)
2654 return err; 2654 return err;
2655 } 2655 }
2656 2656
2657 msg = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL);
2658 if (!msg)
2659 return -ENOMEM;
2660
2661 err = parse_monitor_flags(type == NL80211_IFTYPE_MONITOR ? 2657 err = parse_monitor_flags(type == NL80211_IFTYPE_MONITOR ?
2662 info->attrs[NL80211_ATTR_MNTR_FLAGS] : NULL, 2658 info->attrs[NL80211_ATTR_MNTR_FLAGS] : NULL,
2663 &flags); 2659 &flags);
@@ -2666,6 +2662,10 @@ static int nl80211_new_interface(struct sk_buff *skb, struct genl_info *info)
2666 !(rdev->wiphy.features & NL80211_FEATURE_ACTIVE_MONITOR)) 2662 !(rdev->wiphy.features & NL80211_FEATURE_ACTIVE_MONITOR))
2667 return -EOPNOTSUPP; 2663 return -EOPNOTSUPP;
2668 2664
2665 msg = nlmsg_new(NLMSG_DEFAULT_SIZE, GFP_KERNEL);
2666 if (!msg)
2667 return -ENOMEM;
2668
2669 wdev = rdev_add_virtual_intf(rdev, 2669 wdev = rdev_add_virtual_intf(rdev,
2670 nla_data(info->attrs[NL80211_ATTR_IFNAME]), 2670 nla_data(info->attrs[NL80211_ATTR_IFNAME]),
2671 type, err ? NULL : &flags, &params); 2671 type, err ? NULL : &flags, &params);
@@ -4400,6 +4400,16 @@ static int nl80211_new_station(struct sk_buff *skb, struct genl_info *info)
4400 if (parse_station_flags(info, dev->ieee80211_ptr->iftype, &params)) 4400 if (parse_station_flags(info, dev->ieee80211_ptr->iftype, &params))
4401 return -EINVAL; 4401 return -EINVAL;
4402 4402
4403 /* HT/VHT requires QoS, but if we don't have that just ignore HT/VHT
4404 * as userspace might just pass through the capabilities from the IEs
4405 * directly, rather than enforcing this restriction and returning an
4406 * error in this case.
4407 */
4408 if (!(params.sta_flags_set & BIT(NL80211_STA_FLAG_WME))) {
4409 params.ht_capa = NULL;
4410 params.vht_capa = NULL;
4411 }
4412
4403 /* When you run into this, adjust the code below for the new flag */ 4413 /* When you run into this, adjust the code below for the new flag */
4404 BUILD_BUG_ON(NL80211_STA_FLAG_MAX != 7); 4414 BUILD_BUG_ON(NL80211_STA_FLAG_MAX != 7);
4405 4415
@@ -12528,9 +12538,7 @@ static int cfg80211_net_detect_results(struct sk_buff *msg,
12528 } 12538 }
12529 12539
12530 for (j = 0; j < match->n_channels; j++) { 12540 for (j = 0; j < match->n_channels; j++) {
12531 if (nla_put_u32(msg, 12541 if (nla_put_u32(msg, j, match->channels[j])) {
12532 NL80211_ATTR_WIPHY_FREQ,
12533 match->channels[j])) {
12534 nla_nest_cancel(msg, nl_freqs); 12542 nla_nest_cancel(msg, nl_freqs);
12535 nla_nest_cancel(msg, nl_match); 12543 nla_nest_cancel(msg, nl_match);
12536 goto out; 12544 goto out;
diff --git a/net/wireless/reg.c b/net/wireless/reg.c
index b586d0dcb09e..48dfc7b4e981 100644
--- a/net/wireless/reg.c
+++ b/net/wireless/reg.c
@@ -228,7 +228,7 @@ static DECLARE_DELAYED_WORK(reg_timeout, reg_timeout_work);
228 228
229/* We keep a static world regulatory domain in case of the absence of CRDA */ 229/* We keep a static world regulatory domain in case of the absence of CRDA */
230static const struct ieee80211_regdomain world_regdom = { 230static const struct ieee80211_regdomain world_regdom = {
231 .n_reg_rules = 6, 231 .n_reg_rules = 8,
232 .alpha2 = "00", 232 .alpha2 = "00",
233 .reg_rules = { 233 .reg_rules = {
234 /* IEEE 802.11b/g, channels 1..11 */ 234 /* IEEE 802.11b/g, channels 1..11 */
diff --git a/net/xfrm/xfrm_policy.c b/net/xfrm/xfrm_policy.c
index cee479bc655c..638af0655aaf 100644
--- a/net/xfrm/xfrm_policy.c
+++ b/net/xfrm/xfrm_policy.c
@@ -2269,11 +2269,9 @@ struct dst_entry *xfrm_lookup(struct net *net, struct dst_entry *dst_orig,
2269 * have the xfrm_state's. We need to wait for KM to 2269 * have the xfrm_state's. We need to wait for KM to
2270 * negotiate new SA's or bail out with error.*/ 2270 * negotiate new SA's or bail out with error.*/
2271 if (net->xfrm.sysctl_larval_drop) { 2271 if (net->xfrm.sysctl_larval_drop) {
2272 dst_release(dst);
2273 xfrm_pols_put(pols, drop_pols);
2274 XFRM_INC_STATS(net, LINUX_MIB_XFRMOUTNOSTATES); 2272 XFRM_INC_STATS(net, LINUX_MIB_XFRMOUTNOSTATES);
2275 2273 err = -EREMOTE;
2276 return ERR_PTR(-EREMOTE); 2274 goto error;
2277 } 2275 }
2278 2276
2279 err = -EAGAIN; 2277 err = -EAGAIN;
@@ -2324,7 +2322,8 @@ nopol:
2324error: 2322error:
2325 dst_release(dst); 2323 dst_release(dst);
2326dropdst: 2324dropdst:
2327 dst_release(dst_orig); 2325 if (!(flags & XFRM_LOOKUP_KEEP_DST_REF))
2326 dst_release(dst_orig);
2328 xfrm_pols_put(pols, drop_pols); 2327 xfrm_pols_put(pols, drop_pols);
2329 return ERR_PTR(err); 2328 return ERR_PTR(err);
2330} 2329}
@@ -2338,7 +2337,8 @@ struct dst_entry *xfrm_lookup_route(struct net *net, struct dst_entry *dst_orig,
2338 struct sock *sk, int flags) 2337 struct sock *sk, int flags)
2339{ 2338{
2340 struct dst_entry *dst = xfrm_lookup(net, dst_orig, fl, sk, 2339 struct dst_entry *dst = xfrm_lookup(net, dst_orig, fl, sk,
2341 flags | XFRM_LOOKUP_QUEUE); 2340 flags | XFRM_LOOKUP_QUEUE |
2341 XFRM_LOOKUP_KEEP_DST_REF);
2342 2342
2343 if (IS_ERR(dst) && PTR_ERR(dst) == -EREMOTE) 2343 if (IS_ERR(dst) && PTR_ERR(dst) == -EREMOTE)
2344 return make_blackhole(net, dst_orig->ops->family, dst_orig); 2344 return make_blackhole(net, dst_orig->ops->family, dst_orig);
diff --git a/scripts/gdb/linux/__init__.py b/scripts/gdb/linux/__init__.py
new file mode 100644
index 000000000000..4680fb176337
--- /dev/null
+++ b/scripts/gdb/linux/__init__.py
@@ -0,0 +1 @@
# nothing to do for the initialization of this package
diff --git a/security/apparmor/include/apparmor.h b/security/apparmor/include/apparmor.h
index 97130f88838b..e4ea62663866 100644
--- a/security/apparmor/include/apparmor.h
+++ b/security/apparmor/include/apparmor.h
@@ -112,9 +112,9 @@ static inline unsigned int aa_dfa_null_transition(struct aa_dfa *dfa,
112 return aa_dfa_next(dfa, start, 0); 112 return aa_dfa_next(dfa, start, 0);
113} 113}
114 114
115static inline bool mediated_filesystem(struct inode *inode) 115static inline bool mediated_filesystem(struct dentry *dentry)
116{ 116{
117 return !(inode->i_sb->s_flags & MS_NOUSER); 117 return !(dentry->d_sb->s_flags & MS_NOUSER);
118} 118}
119 119
120#endif /* __APPARMOR_H */ 120#endif /* __APPARMOR_H */
diff --git a/security/apparmor/lsm.c b/security/apparmor/lsm.c
index 65ca451a764d..107db88b1d5f 100644
--- a/security/apparmor/lsm.c
+++ b/security/apparmor/lsm.c
@@ -226,7 +226,7 @@ static int common_perm_rm(int op, struct path *dir,
226 struct inode *inode = dentry->d_inode; 226 struct inode *inode = dentry->d_inode;
227 struct path_cond cond = { }; 227 struct path_cond cond = { };
228 228
229 if (!inode || !dir->mnt || !mediated_filesystem(inode)) 229 if (!inode || !dir->mnt || !mediated_filesystem(dentry))
230 return 0; 230 return 0;
231 231
232 cond.uid = inode->i_uid; 232 cond.uid = inode->i_uid;
@@ -250,7 +250,7 @@ static int common_perm_create(int op, struct path *dir, struct dentry *dentry,
250{ 250{
251 struct path_cond cond = { current_fsuid(), mode }; 251 struct path_cond cond = { current_fsuid(), mode };
252 252
253 if (!dir->mnt || !mediated_filesystem(dir->dentry->d_inode)) 253 if (!dir->mnt || !mediated_filesystem(dir->dentry))
254 return 0; 254 return 0;
255 255
256 return common_perm_dir_dentry(op, dir, dentry, mask, &cond); 256 return common_perm_dir_dentry(op, dir, dentry, mask, &cond);
@@ -285,7 +285,7 @@ static int apparmor_path_truncate(struct path *path)
285 path->dentry->d_inode->i_mode 285 path->dentry->d_inode->i_mode
286 }; 286 };
287 287
288 if (!path->mnt || !mediated_filesystem(path->dentry->d_inode)) 288 if (!path->mnt || !mediated_filesystem(path->dentry))
289 return 0; 289 return 0;
290 290
291 return common_perm(OP_TRUNC, path, MAY_WRITE | AA_MAY_META_WRITE, 291 return common_perm(OP_TRUNC, path, MAY_WRITE | AA_MAY_META_WRITE,
@@ -305,7 +305,7 @@ static int apparmor_path_link(struct dentry *old_dentry, struct path *new_dir,
305 struct aa_profile *profile; 305 struct aa_profile *profile;
306 int error = 0; 306 int error = 0;
307 307
308 if (!mediated_filesystem(old_dentry->d_inode)) 308 if (!mediated_filesystem(old_dentry))
309 return 0; 309 return 0;
310 310
311 profile = aa_current_profile(); 311 profile = aa_current_profile();
@@ -320,7 +320,7 @@ static int apparmor_path_rename(struct path *old_dir, struct dentry *old_dentry,
320 struct aa_profile *profile; 320 struct aa_profile *profile;
321 int error = 0; 321 int error = 0;
322 322
323 if (!mediated_filesystem(old_dentry->d_inode)) 323 if (!mediated_filesystem(old_dentry))
324 return 0; 324 return 0;
325 325
326 profile = aa_current_profile(); 326 profile = aa_current_profile();
@@ -346,7 +346,7 @@ static int apparmor_path_rename(struct path *old_dir, struct dentry *old_dentry,
346 346
347static int apparmor_path_chmod(struct path *path, umode_t mode) 347static int apparmor_path_chmod(struct path *path, umode_t mode)
348{ 348{
349 if (!mediated_filesystem(path->dentry->d_inode)) 349 if (!mediated_filesystem(path->dentry))
350 return 0; 350 return 0;
351 351
352 return common_perm_mnt_dentry(OP_CHMOD, path->mnt, path->dentry, AA_MAY_CHMOD); 352 return common_perm_mnt_dentry(OP_CHMOD, path->mnt, path->dentry, AA_MAY_CHMOD);
@@ -358,7 +358,7 @@ static int apparmor_path_chown(struct path *path, kuid_t uid, kgid_t gid)
358 path->dentry->d_inode->i_mode 358 path->dentry->d_inode->i_mode
359 }; 359 };
360 360
361 if (!mediated_filesystem(path->dentry->d_inode)) 361 if (!mediated_filesystem(path->dentry))
362 return 0; 362 return 0;
363 363
364 return common_perm(OP_CHOWN, path, AA_MAY_CHOWN, &cond); 364 return common_perm(OP_CHOWN, path, AA_MAY_CHOWN, &cond);
@@ -366,7 +366,7 @@ static int apparmor_path_chown(struct path *path, kuid_t uid, kgid_t gid)
366 366
367static int apparmor_inode_getattr(struct vfsmount *mnt, struct dentry *dentry) 367static int apparmor_inode_getattr(struct vfsmount *mnt, struct dentry *dentry)
368{ 368{
369 if (!mediated_filesystem(dentry->d_inode)) 369 if (!mediated_filesystem(dentry))
370 return 0; 370 return 0;
371 371
372 return common_perm_mnt_dentry(OP_GETATTR, mnt, dentry, 372 return common_perm_mnt_dentry(OP_GETATTR, mnt, dentry,
@@ -379,7 +379,7 @@ static int apparmor_file_open(struct file *file, const struct cred *cred)
379 struct aa_profile *profile; 379 struct aa_profile *profile;
380 int error = 0; 380 int error = 0;
381 381
382 if (!mediated_filesystem(file_inode(file))) 382 if (!mediated_filesystem(file->f_path.dentry))
383 return 0; 383 return 0;
384 384
385 /* If in exec, permission is handled by bprm hooks. 385 /* If in exec, permission is handled by bprm hooks.
@@ -432,7 +432,7 @@ static int common_file_perm(int op, struct file *file, u32 mask)
432 BUG_ON(!fprofile); 432 BUG_ON(!fprofile);
433 433
434 if (!file->f_path.mnt || 434 if (!file->f_path.mnt ||
435 !mediated_filesystem(file_inode(file))) 435 !mediated_filesystem(file->f_path.dentry))
436 return 0; 436 return 0;
437 437
438 profile = __aa_current_profile(); 438 profile = __aa_current_profile();
diff --git a/security/apparmor/path.c b/security/apparmor/path.c
index 35b394a75d76..71e0e3a15b9d 100644
--- a/security/apparmor/path.c
+++ b/security/apparmor/path.c
@@ -114,7 +114,7 @@ static int d_namespace_path(struct path *path, char *buf, int buflen,
114 * security_path hooks as a deleted dentry except without an inode 114 * security_path hooks as a deleted dentry except without an inode
115 * allocated. 115 * allocated.
116 */ 116 */
117 if (d_unlinked(path->dentry) && path->dentry->d_inode && 117 if (d_unlinked(path->dentry) && d_is_positive(path->dentry) &&
118 !(flags & PATH_MEDIATE_DELETED)) { 118 !(flags & PATH_MEDIATE_DELETED)) {
119 error = -ENOENT; 119 error = -ENOENT;
120 goto out; 120 goto out;
diff --git a/security/inode.c b/security/inode.c
index 8e7ca62078ab..131a3c49f766 100644
--- a/security/inode.c
+++ b/security/inode.c
@@ -203,7 +203,7 @@ void securityfs_remove(struct dentry *dentry)
203 mutex_lock(&parent->d_inode->i_mutex); 203 mutex_lock(&parent->d_inode->i_mutex);
204 if (positive(dentry)) { 204 if (positive(dentry)) {
205 if (dentry->d_inode) { 205 if (dentry->d_inode) {
206 if (S_ISDIR(dentry->d_inode->i_mode)) 206 if (d_is_dir(dentry))
207 simple_rmdir(parent->d_inode, dentry); 207 simple_rmdir(parent->d_inode, dentry);
208 else 208 else
209 simple_unlink(parent->d_inode, dentry); 209 simple_unlink(parent->d_inode, dentry);
diff --git a/security/selinux/hooks.c b/security/selinux/hooks.c
index 29c39e0b03ed..4d1a54190388 100644
--- a/security/selinux/hooks.c
+++ b/security/selinux/hooks.c
@@ -1799,7 +1799,7 @@ static inline int may_rename(struct inode *old_dir,
1799 1799
1800 old_dsec = old_dir->i_security; 1800 old_dsec = old_dir->i_security;
1801 old_isec = old_dentry->d_inode->i_security; 1801 old_isec = old_dentry->d_inode->i_security;
1802 old_is_dir = S_ISDIR(old_dentry->d_inode->i_mode); 1802 old_is_dir = d_is_dir(old_dentry);
1803 new_dsec = new_dir->i_security; 1803 new_dsec = new_dir->i_security;
1804 1804
1805 ad.type = LSM_AUDIT_DATA_DENTRY; 1805 ad.type = LSM_AUDIT_DATA_DENTRY;
@@ -1822,14 +1822,14 @@ static inline int may_rename(struct inode *old_dir,
1822 1822
1823 ad.u.dentry = new_dentry; 1823 ad.u.dentry = new_dentry;
1824 av = DIR__ADD_NAME | DIR__SEARCH; 1824 av = DIR__ADD_NAME | DIR__SEARCH;
1825 if (new_dentry->d_inode) 1825 if (d_is_positive(new_dentry))
1826 av |= DIR__REMOVE_NAME; 1826 av |= DIR__REMOVE_NAME;
1827 rc = avc_has_perm(sid, new_dsec->sid, SECCLASS_DIR, av, &ad); 1827 rc = avc_has_perm(sid, new_dsec->sid, SECCLASS_DIR, av, &ad);
1828 if (rc) 1828 if (rc)
1829 return rc; 1829 return rc;
1830 if (new_dentry->d_inode) { 1830 if (d_is_positive(new_dentry)) {
1831 new_isec = new_dentry->d_inode->i_security; 1831 new_isec = new_dentry->d_inode->i_security;
1832 new_is_dir = S_ISDIR(new_dentry->d_inode->i_mode); 1832 new_is_dir = d_is_dir(new_dentry);
1833 rc = avc_has_perm(sid, new_isec->sid, 1833 rc = avc_has_perm(sid, new_isec->sid,
1834 new_isec->sclass, 1834 new_isec->sclass,
1835 (new_is_dir ? DIR__RMDIR : FILE__UNLINK), &ad); 1835 (new_is_dir ? DIR__RMDIR : FILE__UNLINK), &ad);
diff --git a/security/smack/smack_lsm.c b/security/smack/smack_lsm.c
index ed94f6f836e7..c934311812f1 100644
--- a/security/smack/smack_lsm.c
+++ b/security/smack/smack_lsm.c
@@ -855,7 +855,7 @@ static int smack_inode_link(struct dentry *old_dentry, struct inode *dir,
855 rc = smk_curacc(isp, MAY_WRITE, &ad); 855 rc = smk_curacc(isp, MAY_WRITE, &ad);
856 rc = smk_bu_inode(old_dentry->d_inode, MAY_WRITE, rc); 856 rc = smk_bu_inode(old_dentry->d_inode, MAY_WRITE, rc);
857 857
858 if (rc == 0 && new_dentry->d_inode != NULL) { 858 if (rc == 0 && d_is_positive(new_dentry)) {
859 isp = smk_of_inode(new_dentry->d_inode); 859 isp = smk_of_inode(new_dentry->d_inode);
860 smk_ad_setfield_u_fs_path_dentry(&ad, new_dentry); 860 smk_ad_setfield_u_fs_path_dentry(&ad, new_dentry);
861 rc = smk_curacc(isp, MAY_WRITE, &ad); 861 rc = smk_curacc(isp, MAY_WRITE, &ad);
@@ -961,7 +961,7 @@ static int smack_inode_rename(struct inode *old_inode,
961 rc = smk_curacc(isp, MAY_READWRITE, &ad); 961 rc = smk_curacc(isp, MAY_READWRITE, &ad);
962 rc = smk_bu_inode(old_dentry->d_inode, MAY_READWRITE, rc); 962 rc = smk_bu_inode(old_dentry->d_inode, MAY_READWRITE, rc);
963 963
964 if (rc == 0 && new_dentry->d_inode != NULL) { 964 if (rc == 0 && d_is_positive(new_dentry)) {
965 isp = smk_of_inode(new_dentry->d_inode); 965 isp = smk_of_inode(new_dentry->d_inode);
966 smk_ad_setfield_u_fs_path_dentry(&ad, new_dentry); 966 smk_ad_setfield_u_fs_path_dentry(&ad, new_dentry);
967 rc = smk_curacc(isp, MAY_READWRITE, &ad); 967 rc = smk_curacc(isp, MAY_READWRITE, &ad);
diff --git a/security/tomoyo/file.c b/security/tomoyo/file.c
index 400390790745..c151a1869597 100644
--- a/security/tomoyo/file.c
+++ b/security/tomoyo/file.c
@@ -905,11 +905,9 @@ int tomoyo_path2_perm(const u8 operation, struct path *path1,
905 !tomoyo_get_realpath(&buf2, path2)) 905 !tomoyo_get_realpath(&buf2, path2))
906 goto out; 906 goto out;
907 switch (operation) { 907 switch (operation) {
908 struct dentry *dentry;
909 case TOMOYO_TYPE_RENAME: 908 case TOMOYO_TYPE_RENAME:
910 case TOMOYO_TYPE_LINK: 909 case TOMOYO_TYPE_LINK:
911 dentry = path1->dentry; 910 if (!d_is_dir(path1->dentry))
912 if (!dentry->d_inode || !S_ISDIR(dentry->d_inode->i_mode))
913 break; 911 break;
914 /* fall through */ 912 /* fall through */
915 case TOMOYO_TYPE_PIVOT_ROOT: 913 case TOMOYO_TYPE_PIVOT_ROOT:
diff --git a/sound/core/control.c b/sound/core/control.c
index 35324a8e83c8..eeb691d1911f 100644
--- a/sound/core/control.c
+++ b/sound/core/control.c
@@ -1170,6 +1170,10 @@ static int snd_ctl_elem_add(struct snd_ctl_file *file,
1170 1170
1171 if (info->count < 1) 1171 if (info->count < 1)
1172 return -EINVAL; 1172 return -EINVAL;
1173 if (!*info->id.name)
1174 return -EINVAL;
1175 if (strnlen(info->id.name, sizeof(info->id.name)) >= sizeof(info->id.name))
1176 return -EINVAL;
1173 access = info->access == 0 ? SNDRV_CTL_ELEM_ACCESS_READWRITE : 1177 access = info->access == 0 ? SNDRV_CTL_ELEM_ACCESS_READWRITE :
1174 (info->access & (SNDRV_CTL_ELEM_ACCESS_READWRITE| 1178 (info->access & (SNDRV_CTL_ELEM_ACCESS_READWRITE|
1175 SNDRV_CTL_ELEM_ACCESS_INACTIVE| 1179 SNDRV_CTL_ELEM_ACCESS_INACTIVE|
diff --git a/sound/core/pcm_native.c b/sound/core/pcm_native.c
index b03a638b420c..279e24f61305 100644
--- a/sound/core/pcm_native.c
+++ b/sound/core/pcm_native.c
@@ -1552,6 +1552,8 @@ static int snd_pcm_do_drain_init(struct snd_pcm_substream *substream, int state)
1552 if (! snd_pcm_playback_empty(substream)) { 1552 if (! snd_pcm_playback_empty(substream)) {
1553 snd_pcm_do_start(substream, SNDRV_PCM_STATE_DRAINING); 1553 snd_pcm_do_start(substream, SNDRV_PCM_STATE_DRAINING);
1554 snd_pcm_post_start(substream, SNDRV_PCM_STATE_DRAINING); 1554 snd_pcm_post_start(substream, SNDRV_PCM_STATE_DRAINING);
1555 } else {
1556 runtime->status->state = SNDRV_PCM_STATE_SETUP;
1555 } 1557 }
1556 break; 1558 break;
1557 case SNDRV_PCM_STATE_RUNNING: 1559 case SNDRV_PCM_STATE_RUNNING:
diff --git a/sound/core/seq/seq_midi_emul.c b/sound/core/seq/seq_midi_emul.c
index 9b6470cdcf24..7ba937399ac7 100644
--- a/sound/core/seq/seq_midi_emul.c
+++ b/sound/core/seq/seq_midi_emul.c
@@ -269,6 +269,9 @@ do_control(struct snd_midi_op *ops, void *drv, struct snd_midi_channel_set *chse
269{ 269{
270 int i; 270 int i;
271 271
272 if (control >= ARRAY_SIZE(chan->control))
273 return;
274
272 /* Switches */ 275 /* Switches */
273 if ((control >=64 && control <=69) || (control >= 80 && control <= 83)) { 276 if ((control >=64 && control <=69) || (control >= 80 && control <= 83)) {
274 /* These are all switches; either off or on so set to 0 or 127 */ 277 /* These are all switches; either off or on so set to 0 or 127 */
diff --git a/sound/drivers/opl3/opl3_midi.c b/sound/drivers/opl3/opl3_midi.c
index f62780ed64ad..7821b07415a7 100644
--- a/sound/drivers/opl3/opl3_midi.c
+++ b/sound/drivers/opl3/opl3_midi.c
@@ -105,6 +105,8 @@ static void snd_opl3_calc_pitch(unsigned char *fnum, unsigned char *blocknum,
105 int pitchbend = chan->midi_pitchbend; 105 int pitchbend = chan->midi_pitchbend;
106 int segment; 106 int segment;
107 107
108 if (pitchbend < -0x2000)
109 pitchbend = -0x2000;
108 if (pitchbend > 0x1FFF) 110 if (pitchbend > 0x1FFF)
109 pitchbend = 0x1FFF; 111 pitchbend = 0x1FFF;
110 112
diff --git a/sound/firewire/amdtp.c b/sound/firewire/amdtp.c
index 0d580186ef1a..5cc356db5351 100644
--- a/sound/firewire/amdtp.c
+++ b/sound/firewire/amdtp.c
@@ -33,7 +33,7 @@
33 */ 33 */
34#define MAX_MIDI_RX_BLOCKS 8 34#define MAX_MIDI_RX_BLOCKS 8
35 35
36#define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 µs */ 36#define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 microseconds */
37 37
38/* isochronous header parameters */ 38/* isochronous header parameters */
39#define ISO_DATA_LENGTH_SHIFT 16 39#define ISO_DATA_LENGTH_SHIFT 16
@@ -78,7 +78,7 @@ static void pcm_period_tasklet(unsigned long data);
78int amdtp_stream_init(struct amdtp_stream *s, struct fw_unit *unit, 78int amdtp_stream_init(struct amdtp_stream *s, struct fw_unit *unit,
79 enum amdtp_stream_direction dir, enum cip_flags flags) 79 enum amdtp_stream_direction dir, enum cip_flags flags)
80{ 80{
81 s->unit = fw_unit_get(unit); 81 s->unit = unit;
82 s->direction = dir; 82 s->direction = dir;
83 s->flags = flags; 83 s->flags = flags;
84 s->context = ERR_PTR(-1); 84 s->context = ERR_PTR(-1);
@@ -102,7 +102,6 @@ void amdtp_stream_destroy(struct amdtp_stream *s)
102{ 102{
103 WARN_ON(amdtp_stream_running(s)); 103 WARN_ON(amdtp_stream_running(s));
104 mutex_destroy(&s->mutex); 104 mutex_destroy(&s->mutex);
105 fw_unit_put(s->unit);
106} 105}
107EXPORT_SYMBOL(amdtp_stream_destroy); 106EXPORT_SYMBOL(amdtp_stream_destroy);
108 107
diff --git a/sound/firewire/bebob/bebob.c b/sound/firewire/bebob/bebob.c
index fc19c99654aa..611b7dae7ee5 100644
--- a/sound/firewire/bebob/bebob.c
+++ b/sound/firewire/bebob/bebob.c
@@ -116,11 +116,22 @@ end:
116 return err; 116 return err;
117} 117}
118 118
119/*
120 * This module releases the FireWire unit data after all ALSA character devices
121 * are released by applications. This is for releasing stream data or finishing
122 * transactions safely. Thus at returning from .remove(), this module still keep
123 * references for the unit.
124 */
119static void 125static void
120bebob_card_free(struct snd_card *card) 126bebob_card_free(struct snd_card *card)
121{ 127{
122 struct snd_bebob *bebob = card->private_data; 128 struct snd_bebob *bebob = card->private_data;
123 129
130 snd_bebob_stream_destroy_duplex(bebob);
131 fw_unit_put(bebob->unit);
132
133 kfree(bebob->maudio_special_quirk);
134
124 if (bebob->card_index >= 0) { 135 if (bebob->card_index >= 0) {
125 mutex_lock(&devices_mutex); 136 mutex_lock(&devices_mutex);
126 clear_bit(bebob->card_index, devices_used); 137 clear_bit(bebob->card_index, devices_used);
@@ -205,7 +216,7 @@ bebob_probe(struct fw_unit *unit,
205 card->private_free = bebob_card_free; 216 card->private_free = bebob_card_free;
206 217
207 bebob->card = card; 218 bebob->card = card;
208 bebob->unit = unit; 219 bebob->unit = fw_unit_get(unit);
209 bebob->spec = spec; 220 bebob->spec = spec;
210 mutex_init(&bebob->mutex); 221 mutex_init(&bebob->mutex);
211 spin_lock_init(&bebob->lock); 222 spin_lock_init(&bebob->lock);
@@ -306,10 +317,11 @@ static void bebob_remove(struct fw_unit *unit)
306 if (bebob == NULL) 317 if (bebob == NULL)
307 return; 318 return;
308 319
309 kfree(bebob->maudio_special_quirk); 320 /* Awake bus-reset waiters. */
321 if (!completion_done(&bebob->bus_reset))
322 complete_all(&bebob->bus_reset);
310 323
311 snd_bebob_stream_destroy_duplex(bebob); 324 /* No need to wait for releasing card object in this context. */
312 snd_card_disconnect(bebob->card);
313 snd_card_free_when_closed(bebob->card); 325 snd_card_free_when_closed(bebob->card);
314} 326}
315 327
diff --git a/sound/firewire/bebob/bebob_stream.c b/sound/firewire/bebob/bebob_stream.c
index 0ebcabfdc7ce..98e4fc8121a1 100644
--- a/sound/firewire/bebob/bebob_stream.c
+++ b/sound/firewire/bebob/bebob_stream.c
@@ -410,8 +410,6 @@ break_both_connections(struct snd_bebob *bebob)
410static void 410static void
411destroy_both_connections(struct snd_bebob *bebob) 411destroy_both_connections(struct snd_bebob *bebob)
412{ 412{
413 break_both_connections(bebob);
414
415 cmp_connection_destroy(&bebob->in_conn); 413 cmp_connection_destroy(&bebob->in_conn);
416 cmp_connection_destroy(&bebob->out_conn); 414 cmp_connection_destroy(&bebob->out_conn);
417} 415}
@@ -712,22 +710,16 @@ void snd_bebob_stream_update_duplex(struct snd_bebob *bebob)
712 mutex_unlock(&bebob->mutex); 710 mutex_unlock(&bebob->mutex);
713} 711}
714 712
713/*
714 * This function should be called before starting streams or after stopping
715 * streams.
716 */
715void snd_bebob_stream_destroy_duplex(struct snd_bebob *bebob) 717void snd_bebob_stream_destroy_duplex(struct snd_bebob *bebob)
716{ 718{
717 mutex_lock(&bebob->mutex);
718
719 amdtp_stream_pcm_abort(&bebob->rx_stream);
720 amdtp_stream_pcm_abort(&bebob->tx_stream);
721
722 amdtp_stream_stop(&bebob->rx_stream);
723 amdtp_stream_stop(&bebob->tx_stream);
724
725 amdtp_stream_destroy(&bebob->rx_stream); 719 amdtp_stream_destroy(&bebob->rx_stream);
726 amdtp_stream_destroy(&bebob->tx_stream); 720 amdtp_stream_destroy(&bebob->tx_stream);
727 721
728 destroy_both_connections(bebob); 722 destroy_both_connections(bebob);
729
730 mutex_unlock(&bebob->mutex);
731} 723}
732 724
733/* 725/*
diff --git a/sound/firewire/dice/dice-stream.c b/sound/firewire/dice/dice-stream.c
index fa9cf761b610..07dbd01d7a6b 100644
--- a/sound/firewire/dice/dice-stream.c
+++ b/sound/firewire/dice/dice-stream.c
@@ -311,14 +311,21 @@ end:
311 return err; 311 return err;
312} 312}
313 313
314/*
315 * This function should be called before starting streams or after stopping
316 * streams.
317 */
314static void destroy_stream(struct snd_dice *dice, struct amdtp_stream *stream) 318static void destroy_stream(struct snd_dice *dice, struct amdtp_stream *stream)
315{ 319{
316 amdtp_stream_destroy(stream); 320 struct fw_iso_resources *resources;
317 321
318 if (stream == &dice->tx_stream) 322 if (stream == &dice->tx_stream)
319 fw_iso_resources_destroy(&dice->tx_resources); 323 resources = &dice->tx_resources;
320 else 324 else
321 fw_iso_resources_destroy(&dice->rx_resources); 325 resources = &dice->rx_resources;
326
327 amdtp_stream_destroy(stream);
328 fw_iso_resources_destroy(resources);
322} 329}
323 330
324int snd_dice_stream_init_duplex(struct snd_dice *dice) 331int snd_dice_stream_init_duplex(struct snd_dice *dice)
@@ -332,6 +339,8 @@ int snd_dice_stream_init_duplex(struct snd_dice *dice)
332 goto end; 339 goto end;
333 340
334 err = init_stream(dice, &dice->rx_stream); 341 err = init_stream(dice, &dice->rx_stream);
342 if (err < 0)
343 destroy_stream(dice, &dice->tx_stream);
335end: 344end:
336 return err; 345 return err;
337} 346}
@@ -340,10 +349,7 @@ void snd_dice_stream_destroy_duplex(struct snd_dice *dice)
340{ 349{
341 snd_dice_transaction_clear_enable(dice); 350 snd_dice_transaction_clear_enable(dice);
342 351
343 stop_stream(dice, &dice->tx_stream);
344 destroy_stream(dice, &dice->tx_stream); 352 destroy_stream(dice, &dice->tx_stream);
345
346 stop_stream(dice, &dice->rx_stream);
347 destroy_stream(dice, &dice->rx_stream); 353 destroy_stream(dice, &dice->rx_stream);
348 354
349 dice->substreams_counter = 0; 355 dice->substreams_counter = 0;
diff --git a/sound/firewire/dice/dice.c b/sound/firewire/dice/dice.c
index 90d8f40ff727..70a111d7f428 100644
--- a/sound/firewire/dice/dice.c
+++ b/sound/firewire/dice/dice.c
@@ -226,11 +226,20 @@ static void dice_card_strings(struct snd_dice *dice)
226 strcpy(card->mixername, "DICE"); 226 strcpy(card->mixername, "DICE");
227} 227}
228 228
229/*
230 * This module releases the FireWire unit data after all ALSA character devices
231 * are released by applications. This is for releasing stream data or finishing
232 * transactions safely. Thus at returning from .remove(), this module still keep
233 * references for the unit.
234 */
229static void dice_card_free(struct snd_card *card) 235static void dice_card_free(struct snd_card *card)
230{ 236{
231 struct snd_dice *dice = card->private_data; 237 struct snd_dice *dice = card->private_data;
232 238
239 snd_dice_stream_destroy_duplex(dice);
233 snd_dice_transaction_destroy(dice); 240 snd_dice_transaction_destroy(dice);
241 fw_unit_put(dice->unit);
242
234 mutex_destroy(&dice->mutex); 243 mutex_destroy(&dice->mutex);
235} 244}
236 245
@@ -251,7 +260,7 @@ static int dice_probe(struct fw_unit *unit, const struct ieee1394_device_id *id)
251 260
252 dice = card->private_data; 261 dice = card->private_data;
253 dice->card = card; 262 dice->card = card;
254 dice->unit = unit; 263 dice->unit = fw_unit_get(unit);
255 card->private_free = dice_card_free; 264 card->private_free = dice_card_free;
256 265
257 spin_lock_init(&dice->lock); 266 spin_lock_init(&dice->lock);
@@ -305,10 +314,7 @@ static void dice_remove(struct fw_unit *unit)
305{ 314{
306 struct snd_dice *dice = dev_get_drvdata(&unit->device); 315 struct snd_dice *dice = dev_get_drvdata(&unit->device);
307 316
308 snd_card_disconnect(dice->card); 317 /* No need to wait for releasing card object in this context. */
309
310 snd_dice_stream_destroy_duplex(dice);
311
312 snd_card_free_when_closed(dice->card); 318 snd_card_free_when_closed(dice->card);
313} 319}
314 320
diff --git a/sound/firewire/fireworks/fireworks.c b/sound/firewire/fireworks/fireworks.c
index 3e2ed8e82cbc..2682e7e3e5c9 100644
--- a/sound/firewire/fireworks/fireworks.c
+++ b/sound/firewire/fireworks/fireworks.c
@@ -173,11 +173,23 @@ end:
173 return err; 173 return err;
174} 174}
175 175
176/*
177 * This module releases the FireWire unit data after all ALSA character devices
178 * are released by applications. This is for releasing stream data or finishing
179 * transactions safely. Thus at returning from .remove(), this module still keep
180 * references for the unit.
181 */
176static void 182static void
177efw_card_free(struct snd_card *card) 183efw_card_free(struct snd_card *card)
178{ 184{
179 struct snd_efw *efw = card->private_data; 185 struct snd_efw *efw = card->private_data;
180 186
187 snd_efw_stream_destroy_duplex(efw);
188 snd_efw_transaction_remove_instance(efw);
189 fw_unit_put(efw->unit);
190
191 kfree(efw->resp_buf);
192
181 if (efw->card_index >= 0) { 193 if (efw->card_index >= 0) {
182 mutex_lock(&devices_mutex); 194 mutex_lock(&devices_mutex);
183 clear_bit(efw->card_index, devices_used); 195 clear_bit(efw->card_index, devices_used);
@@ -185,7 +197,6 @@ efw_card_free(struct snd_card *card)
185 } 197 }
186 198
187 mutex_destroy(&efw->mutex); 199 mutex_destroy(&efw->mutex);
188 kfree(efw->resp_buf);
189} 200}
190 201
191static int 202static int
@@ -218,7 +229,7 @@ efw_probe(struct fw_unit *unit,
218 card->private_free = efw_card_free; 229 card->private_free = efw_card_free;
219 230
220 efw->card = card; 231 efw->card = card;
221 efw->unit = unit; 232 efw->unit = fw_unit_get(unit);
222 mutex_init(&efw->mutex); 233 mutex_init(&efw->mutex);
223 spin_lock_init(&efw->lock); 234 spin_lock_init(&efw->lock);
224 init_waitqueue_head(&efw->hwdep_wait); 235 init_waitqueue_head(&efw->hwdep_wait);
@@ -289,10 +300,7 @@ static void efw_remove(struct fw_unit *unit)
289{ 300{
290 struct snd_efw *efw = dev_get_drvdata(&unit->device); 301 struct snd_efw *efw = dev_get_drvdata(&unit->device);
291 302
292 snd_efw_stream_destroy_duplex(efw); 303 /* No need to wait for releasing card object in this context. */
293 snd_efw_transaction_remove_instance(efw);
294
295 snd_card_disconnect(efw->card);
296 snd_card_free_when_closed(efw->card); 304 snd_card_free_when_closed(efw->card);
297} 305}
298 306
diff --git a/sound/firewire/fireworks/fireworks_stream.c b/sound/firewire/fireworks/fireworks_stream.c
index 4f440e163667..c55db1bddc80 100644
--- a/sound/firewire/fireworks/fireworks_stream.c
+++ b/sound/firewire/fireworks/fireworks_stream.c
@@ -100,17 +100,22 @@ end:
100 return err; 100 return err;
101} 101}
102 102
103/*
104 * This function should be called before starting the stream or after stopping
105 * the streams.
106 */
103static void 107static void
104destroy_stream(struct snd_efw *efw, struct amdtp_stream *stream) 108destroy_stream(struct snd_efw *efw, struct amdtp_stream *stream)
105{ 109{
106 stop_stream(efw, stream); 110 struct cmp_connection *conn;
107
108 amdtp_stream_destroy(stream);
109 111
110 if (stream == &efw->tx_stream) 112 if (stream == &efw->tx_stream)
111 cmp_connection_destroy(&efw->out_conn); 113 conn = &efw->out_conn;
112 else 114 else
113 cmp_connection_destroy(&efw->in_conn); 115 conn = &efw->in_conn;
116
117 amdtp_stream_destroy(stream);
118 cmp_connection_destroy(&efw->out_conn);
114} 119}
115 120
116static int 121static int
@@ -319,12 +324,8 @@ void snd_efw_stream_update_duplex(struct snd_efw *efw)
319 324
320void snd_efw_stream_destroy_duplex(struct snd_efw *efw) 325void snd_efw_stream_destroy_duplex(struct snd_efw *efw)
321{ 326{
322 mutex_lock(&efw->mutex);
323
324 destroy_stream(efw, &efw->rx_stream); 327 destroy_stream(efw, &efw->rx_stream);
325 destroy_stream(efw, &efw->tx_stream); 328 destroy_stream(efw, &efw->tx_stream);
326
327 mutex_unlock(&efw->mutex);
328} 329}
329 330
330void snd_efw_stream_lock_changed(struct snd_efw *efw) 331void snd_efw_stream_lock_changed(struct snd_efw *efw)
diff --git a/sound/firewire/iso-resources.c b/sound/firewire/iso-resources.c
index 5f17b77ee152..f0e4d502d604 100644
--- a/sound/firewire/iso-resources.c
+++ b/sound/firewire/iso-resources.c
@@ -26,7 +26,7 @@
26int fw_iso_resources_init(struct fw_iso_resources *r, struct fw_unit *unit) 26int fw_iso_resources_init(struct fw_iso_resources *r, struct fw_unit *unit)
27{ 27{
28 r->channels_mask = ~0uLL; 28 r->channels_mask = ~0uLL;
29 r->unit = fw_unit_get(unit); 29 r->unit = unit;
30 mutex_init(&r->mutex); 30 mutex_init(&r->mutex);
31 r->allocated = false; 31 r->allocated = false;
32 32
@@ -42,7 +42,6 @@ void fw_iso_resources_destroy(struct fw_iso_resources *r)
42{ 42{
43 WARN_ON(r->allocated); 43 WARN_ON(r->allocated);
44 mutex_destroy(&r->mutex); 44 mutex_destroy(&r->mutex);
45 fw_unit_put(r->unit);
46} 45}
47EXPORT_SYMBOL(fw_iso_resources_destroy); 46EXPORT_SYMBOL(fw_iso_resources_destroy);
48 47
diff --git a/sound/firewire/oxfw/oxfw-stream.c b/sound/firewire/oxfw/oxfw-stream.c
index bda845afb470..e6757cd85724 100644
--- a/sound/firewire/oxfw/oxfw-stream.c
+++ b/sound/firewire/oxfw/oxfw-stream.c
@@ -171,9 +171,10 @@ static int start_stream(struct snd_oxfw *oxfw, struct amdtp_stream *stream,
171 } 171 }
172 172
173 /* Wait first packet */ 173 /* Wait first packet */
174 err = amdtp_stream_wait_callback(stream, CALLBACK_TIMEOUT); 174 if (!amdtp_stream_wait_callback(stream, CALLBACK_TIMEOUT)) {
175 if (err < 0)
176 stop_stream(oxfw, stream); 175 stop_stream(oxfw, stream);
176 err = -ETIMEDOUT;
177 }
177end: 178end:
178 return err; 179 return err;
179} 180}
@@ -337,6 +338,10 @@ void snd_oxfw_stream_stop_simplex(struct snd_oxfw *oxfw,
337 stop_stream(oxfw, stream); 338 stop_stream(oxfw, stream);
338} 339}
339 340
341/*
342 * This function should be called before starting the stream or after stopping
343 * the streams.
344 */
340void snd_oxfw_stream_destroy_simplex(struct snd_oxfw *oxfw, 345void snd_oxfw_stream_destroy_simplex(struct snd_oxfw *oxfw,
341 struct amdtp_stream *stream) 346 struct amdtp_stream *stream)
342{ 347{
@@ -347,8 +352,6 @@ void snd_oxfw_stream_destroy_simplex(struct snd_oxfw *oxfw,
347 else 352 else
348 conn = &oxfw->in_conn; 353 conn = &oxfw->in_conn;
349 354
350 stop_stream(oxfw, stream);
351
352 amdtp_stream_destroy(stream); 355 amdtp_stream_destroy(stream);
353 cmp_connection_destroy(conn); 356 cmp_connection_destroy(conn);
354} 357}
diff --git a/sound/firewire/oxfw/oxfw.c b/sound/firewire/oxfw/oxfw.c
index 60e5cad0531a..8c6ce019f437 100644
--- a/sound/firewire/oxfw/oxfw.c
+++ b/sound/firewire/oxfw/oxfw.c
@@ -104,11 +104,23 @@ end:
104 return err; 104 return err;
105} 105}
106 106
107/*
108 * This module releases the FireWire unit data after all ALSA character devices
109 * are released by applications. This is for releasing stream data or finishing
110 * transactions safely. Thus at returning from .remove(), this module still keep
111 * references for the unit.
112 */
107static void oxfw_card_free(struct snd_card *card) 113static void oxfw_card_free(struct snd_card *card)
108{ 114{
109 struct snd_oxfw *oxfw = card->private_data; 115 struct snd_oxfw *oxfw = card->private_data;
110 unsigned int i; 116 unsigned int i;
111 117
118 snd_oxfw_stream_destroy_simplex(oxfw, &oxfw->rx_stream);
119 if (oxfw->has_output)
120 snd_oxfw_stream_destroy_simplex(oxfw, &oxfw->tx_stream);
121
122 fw_unit_put(oxfw->unit);
123
112 for (i = 0; i < SND_OXFW_STREAM_FORMAT_ENTRIES; i++) { 124 for (i = 0; i < SND_OXFW_STREAM_FORMAT_ENTRIES; i++) {
113 kfree(oxfw->tx_stream_formats[i]); 125 kfree(oxfw->tx_stream_formats[i]);
114 kfree(oxfw->rx_stream_formats[i]); 126 kfree(oxfw->rx_stream_formats[i]);
@@ -136,7 +148,7 @@ static int oxfw_probe(struct fw_unit *unit,
136 oxfw = card->private_data; 148 oxfw = card->private_data;
137 oxfw->card = card; 149 oxfw->card = card;
138 mutex_init(&oxfw->mutex); 150 mutex_init(&oxfw->mutex);
139 oxfw->unit = unit; 151 oxfw->unit = fw_unit_get(unit);
140 oxfw->device_info = (const struct device_info *)id->driver_data; 152 oxfw->device_info = (const struct device_info *)id->driver_data;
141 spin_lock_init(&oxfw->lock); 153 spin_lock_init(&oxfw->lock);
142 init_waitqueue_head(&oxfw->hwdep_wait); 154 init_waitqueue_head(&oxfw->hwdep_wait);
@@ -212,12 +224,7 @@ static void oxfw_remove(struct fw_unit *unit)
212{ 224{
213 struct snd_oxfw *oxfw = dev_get_drvdata(&unit->device); 225 struct snd_oxfw *oxfw = dev_get_drvdata(&unit->device);
214 226
215 snd_card_disconnect(oxfw->card); 227 /* No need to wait for releasing card object in this context. */
216
217 snd_oxfw_stream_destroy_simplex(oxfw, &oxfw->rx_stream);
218 if (oxfw->has_output)
219 snd_oxfw_stream_destroy_simplex(oxfw, &oxfw->tx_stream);
220
221 snd_card_free_when_closed(oxfw->card); 228 snd_card_free_when_closed(oxfw->card);
222} 229}
223 230
diff --git a/sound/isa/msnd/msnd_pinnacle_mixer.c b/sound/isa/msnd/msnd_pinnacle_mixer.c
index 17e49a071af4..b408540798c1 100644
--- a/sound/isa/msnd/msnd_pinnacle_mixer.c
+++ b/sound/isa/msnd/msnd_pinnacle_mixer.c
@@ -306,11 +306,12 @@ int snd_msndmix_new(struct snd_card *card)
306 spin_lock_init(&chip->mixer_lock); 306 spin_lock_init(&chip->mixer_lock);
307 strcpy(card->mixername, "MSND Pinnacle Mixer"); 307 strcpy(card->mixername, "MSND Pinnacle Mixer");
308 308
309 for (idx = 0; idx < ARRAY_SIZE(snd_msnd_controls); idx++) 309 for (idx = 0; idx < ARRAY_SIZE(snd_msnd_controls); idx++) {
310 err = snd_ctl_add(card, 310 err = snd_ctl_add(card,
311 snd_ctl_new1(snd_msnd_controls + idx, chip)); 311 snd_ctl_new1(snd_msnd_controls + idx, chip));
312 if (err < 0) 312 if (err < 0)
313 return err; 313 return err;
314 }
314 315
315 return 0; 316 return 0;
316} 317}
diff --git a/sound/pci/hda/hda_controller.c b/sound/pci/hda/hda_controller.c
index dfcb5e929f9f..17c2637d842c 100644
--- a/sound/pci/hda/hda_controller.c
+++ b/sound/pci/hda/hda_controller.c
@@ -961,7 +961,6 @@ static int azx_alloc_cmd_io(struct azx *chip)
961 dev_err(chip->card->dev, "cannot allocate CORB/RIRB\n"); 961 dev_err(chip->card->dev, "cannot allocate CORB/RIRB\n");
962 return err; 962 return err;
963} 963}
964EXPORT_SYMBOL_GPL(azx_alloc_cmd_io);
965 964
966static void azx_init_cmd_io(struct azx *chip) 965static void azx_init_cmd_io(struct azx *chip)
967{ 966{
@@ -1026,7 +1025,6 @@ static void azx_init_cmd_io(struct azx *chip)
1026 azx_writeb(chip, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN); 1025 azx_writeb(chip, RIRBCTL, AZX_RBCTL_DMA_EN | AZX_RBCTL_IRQ_EN);
1027 spin_unlock_irq(&chip->reg_lock); 1026 spin_unlock_irq(&chip->reg_lock);
1028} 1027}
1029EXPORT_SYMBOL_GPL(azx_init_cmd_io);
1030 1028
1031static void azx_free_cmd_io(struct azx *chip) 1029static void azx_free_cmd_io(struct azx *chip)
1032{ 1030{
@@ -1036,7 +1034,6 @@ static void azx_free_cmd_io(struct azx *chip)
1036 azx_writeb(chip, CORBCTL, 0); 1034 azx_writeb(chip, CORBCTL, 0);
1037 spin_unlock_irq(&chip->reg_lock); 1035 spin_unlock_irq(&chip->reg_lock);
1038} 1036}
1039EXPORT_SYMBOL_GPL(azx_free_cmd_io);
1040 1037
1041static unsigned int azx_command_addr(u32 cmd) 1038static unsigned int azx_command_addr(u32 cmd)
1042{ 1039{
@@ -1167,7 +1164,7 @@ static unsigned int azx_rirb_get_response(struct hda_bus *bus,
1167 } 1164 }
1168 } 1165 }
1169 1166
1170 if (!bus->no_response_fallback) 1167 if (bus->no_response_fallback)
1171 return -1; 1168 return -1;
1172 1169
1173 if (!chip->polling_mode && chip->poll_count < 2) { 1170 if (!chip->polling_mode && chip->poll_count < 2) {
@@ -1316,7 +1313,6 @@ static int azx_send_cmd(struct hda_bus *bus, unsigned int val)
1316 else 1313 else
1317 return azx_corb_send_cmd(bus, val); 1314 return azx_corb_send_cmd(bus, val);
1318} 1315}
1319EXPORT_SYMBOL_GPL(azx_send_cmd);
1320 1316
1321/* get a response */ 1317/* get a response */
1322static unsigned int azx_get_response(struct hda_bus *bus, 1318static unsigned int azx_get_response(struct hda_bus *bus,
@@ -1330,7 +1326,6 @@ static unsigned int azx_get_response(struct hda_bus *bus,
1330 else 1326 else
1331 return azx_rirb_get_response(bus, addr); 1327 return azx_rirb_get_response(bus, addr);
1332} 1328}
1333EXPORT_SYMBOL_GPL(azx_get_response);
1334 1329
1335#ifdef CONFIG_SND_HDA_DSP_LOADER 1330#ifdef CONFIG_SND_HDA_DSP_LOADER
1336/* 1331/*
diff --git a/sound/pci/hda/hda_generic.c b/sound/pci/hda/hda_generic.c
index b680b4ec6331..8ec5289f8e05 100644
--- a/sound/pci/hda/hda_generic.c
+++ b/sound/pci/hda/hda_generic.c
@@ -687,12 +687,45 @@ static int get_amp_val_to_activate(struct hda_codec *codec, hda_nid_t nid,
687 return val; 687 return val;
688} 688}
689 689
690/* is this a stereo widget or a stereo-to-mono mix? */
691static bool is_stereo_amps(struct hda_codec *codec, hda_nid_t nid, int dir)
692{
693 unsigned int wcaps = get_wcaps(codec, nid);
694 hda_nid_t conn;
695
696 if (wcaps & AC_WCAP_STEREO)
697 return true;
698 if (dir != HDA_INPUT || get_wcaps_type(wcaps) != AC_WID_AUD_MIX)
699 return false;
700 if (snd_hda_get_num_conns(codec, nid) != 1)
701 return false;
702 if (snd_hda_get_connections(codec, nid, &conn, 1) < 0)
703 return false;
704 return !!(get_wcaps(codec, conn) & AC_WCAP_STEREO);
705}
706
690/* initialize the amp value (only at the first time) */ 707/* initialize the amp value (only at the first time) */
691static void init_amp(struct hda_codec *codec, hda_nid_t nid, int dir, int idx) 708static void init_amp(struct hda_codec *codec, hda_nid_t nid, int dir, int idx)
692{ 709{
693 unsigned int caps = query_amp_caps(codec, nid, dir); 710 unsigned int caps = query_amp_caps(codec, nid, dir);
694 int val = get_amp_val_to_activate(codec, nid, dir, caps, false); 711 int val = get_amp_val_to_activate(codec, nid, dir, caps, false);
695 snd_hda_codec_amp_init_stereo(codec, nid, dir, idx, 0xff, val); 712
713 if (is_stereo_amps(codec, nid, dir))
714 snd_hda_codec_amp_init_stereo(codec, nid, dir, idx, 0xff, val);
715 else
716 snd_hda_codec_amp_init(codec, nid, 0, dir, idx, 0xff, val);
717}
718
719/* update the amp, doing in stereo or mono depending on NID */
720static int update_amp(struct hda_codec *codec, hda_nid_t nid, int dir, int idx,
721 unsigned int mask, unsigned int val)
722{
723 if (is_stereo_amps(codec, nid, dir))
724 return snd_hda_codec_amp_stereo(codec, nid, dir, idx,
725 mask, val);
726 else
727 return snd_hda_codec_amp_update(codec, nid, 0, dir, idx,
728 mask, val);
696} 729}
697 730
698/* calculate amp value mask we can modify; 731/* calculate amp value mask we can modify;
@@ -732,7 +765,7 @@ static void activate_amp(struct hda_codec *codec, hda_nid_t nid, int dir,
732 return; 765 return;
733 766
734 val &= mask; 767 val &= mask;
735 snd_hda_codec_amp_stereo(codec, nid, dir, idx, mask, val); 768 update_amp(codec, nid, dir, idx, mask, val);
736} 769}
737 770
738static void activate_amp_out(struct hda_codec *codec, struct nid_path *path, 771static void activate_amp_out(struct hda_codec *codec, struct nid_path *path,
@@ -4424,13 +4457,11 @@ static void mute_all_mixer_nid(struct hda_codec *codec, hda_nid_t mix)
4424 has_amp = nid_has_mute(codec, mix, HDA_INPUT); 4457 has_amp = nid_has_mute(codec, mix, HDA_INPUT);
4425 for (i = 0; i < nums; i++) { 4458 for (i = 0; i < nums; i++) {
4426 if (has_amp) 4459 if (has_amp)
4427 snd_hda_codec_amp_stereo(codec, mix, 4460 update_amp(codec, mix, HDA_INPUT, i,
4428 HDA_INPUT, i, 4461 0xff, HDA_AMP_MUTE);
4429 0xff, HDA_AMP_MUTE);
4430 else if (nid_has_volume(codec, conn[i], HDA_OUTPUT)) 4462 else if (nid_has_volume(codec, conn[i], HDA_OUTPUT))
4431 snd_hda_codec_amp_stereo(codec, conn[i], 4463 update_amp(codec, conn[i], HDA_OUTPUT, 0,
4432 HDA_OUTPUT, 0, 4464 0xff, HDA_AMP_MUTE);
4433 0xff, HDA_AMP_MUTE);
4434 } 4465 }
4435} 4466}
4436 4467
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c
index 36d2f20db7a4..4ca3d5d02436 100644
--- a/sound/pci/hda/hda_intel.c
+++ b/sound/pci/hda/hda_intel.c
@@ -1966,7 +1966,7 @@ static const struct pci_device_id azx_ids[] = {
1966 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM }, 1966 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1967 /* Panther Point */ 1967 /* Panther Point */
1968 { PCI_DEVICE(0x8086, 0x1e20), 1968 { PCI_DEVICE(0x8086, 0x1e20),
1969 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, 1969 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH_NOPM },
1970 /* Lynx Point */ 1970 /* Lynx Point */
1971 { PCI_DEVICE(0x8086, 0x8c20), 1971 { PCI_DEVICE(0x8086, 0x8c20),
1972 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH }, 1972 .driver_data = AZX_DRIVER_PCH | AZX_DCAPS_INTEL_PCH },
diff --git a/sound/pci/hda/hda_proc.c b/sound/pci/hda/hda_proc.c
index ce5a6da83419..05e19f78b4cb 100644
--- a/sound/pci/hda/hda_proc.c
+++ b/sound/pci/hda/hda_proc.c
@@ -134,13 +134,38 @@ static void print_amp_caps(struct snd_info_buffer *buffer,
134 (caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT); 134 (caps & AC_AMPCAP_MUTE) >> AC_AMPCAP_MUTE_SHIFT);
135} 135}
136 136
137/* is this a stereo widget or a stereo-to-mono mix? */
138static bool is_stereo_amps(struct hda_codec *codec, hda_nid_t nid,
139 int dir, unsigned int wcaps, int indices)
140{
141 hda_nid_t conn;
142
143 if (wcaps & AC_WCAP_STEREO)
144 return true;
145 /* check for a stereo-to-mono mix; it must be:
146 * only a single connection, only for input, and only a mixer widget
147 */
148 if (indices != 1 || dir != HDA_INPUT ||
149 get_wcaps_type(wcaps) != AC_WID_AUD_MIX)
150 return false;
151
152 if (snd_hda_get_raw_connections(codec, nid, &conn, 1) < 0)
153 return false;
154 /* the connection source is a stereo? */
155 wcaps = snd_hda_param_read(codec, conn, AC_PAR_AUDIO_WIDGET_CAP);
156 return !!(wcaps & AC_WCAP_STEREO);
157}
158
137static void print_amp_vals(struct snd_info_buffer *buffer, 159static void print_amp_vals(struct snd_info_buffer *buffer,
138 struct hda_codec *codec, hda_nid_t nid, 160 struct hda_codec *codec, hda_nid_t nid,
139 int dir, int stereo, int indices) 161 int dir, unsigned int wcaps, int indices)
140{ 162{
141 unsigned int val; 163 unsigned int val;
164 bool stereo;
142 int i; 165 int i;
143 166
167 stereo = is_stereo_amps(codec, nid, dir, wcaps, indices);
168
144 dir = dir == HDA_OUTPUT ? AC_AMP_GET_OUTPUT : AC_AMP_GET_INPUT; 169 dir = dir == HDA_OUTPUT ? AC_AMP_GET_OUTPUT : AC_AMP_GET_INPUT;
145 for (i = 0; i < indices; i++) { 170 for (i = 0; i < indices; i++) {
146 snd_iprintf(buffer, " ["); 171 snd_iprintf(buffer, " [");
@@ -757,12 +782,10 @@ static void print_codec_info(struct snd_info_entry *entry,
757 (codec->single_adc_amp && 782 (codec->single_adc_amp &&
758 wid_type == AC_WID_AUD_IN)) 783 wid_type == AC_WID_AUD_IN))
759 print_amp_vals(buffer, codec, nid, HDA_INPUT, 784 print_amp_vals(buffer, codec, nid, HDA_INPUT,
760 wid_caps & AC_WCAP_STEREO, 785 wid_caps, 1);
761 1);
762 else 786 else
763 print_amp_vals(buffer, codec, nid, HDA_INPUT, 787 print_amp_vals(buffer, codec, nid, HDA_INPUT,
764 wid_caps & AC_WCAP_STEREO, 788 wid_caps, conn_len);
765 conn_len);
766 } 789 }
767 if (wid_caps & AC_WCAP_OUT_AMP) { 790 if (wid_caps & AC_WCAP_OUT_AMP) {
768 snd_iprintf(buffer, " Amp-Out caps: "); 791 snd_iprintf(buffer, " Amp-Out caps: ");
@@ -771,11 +794,10 @@ static void print_codec_info(struct snd_info_entry *entry,
771 if (wid_type == AC_WID_PIN && 794 if (wid_type == AC_WID_PIN &&
772 codec->pin_amp_workaround) 795 codec->pin_amp_workaround)
773 print_amp_vals(buffer, codec, nid, HDA_OUTPUT, 796 print_amp_vals(buffer, codec, nid, HDA_OUTPUT,
774 wid_caps & AC_WCAP_STEREO, 797 wid_caps, conn_len);
775 conn_len);
776 else 798 else
777 print_amp_vals(buffer, codec, nid, HDA_OUTPUT, 799 print_amp_vals(buffer, codec, nid, HDA_OUTPUT,
778 wid_caps & AC_WCAP_STEREO, 1); 800 wid_caps, 1);
779 } 801 }
780 802
781 switch (wid_type) { 803 switch (wid_type) {
diff --git a/sound/pci/hda/hda_tegra.c b/sound/pci/hda/hda_tegra.c
index 227990bc02e3..375e94f4cf52 100644
--- a/sound/pci/hda/hda_tegra.c
+++ b/sound/pci/hda/hda_tegra.c
@@ -329,8 +329,8 @@ static int hda_tegra_init_chip(struct azx *chip, struct platform_device *pdev)
329 329
330 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 330 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
331 hda->regs = devm_ioremap_resource(dev, res); 331 hda->regs = devm_ioremap_resource(dev, res);
332 if (IS_ERR(chip->remap_addr)) 332 if (IS_ERR(hda->regs))
333 return PTR_ERR(chip->remap_addr); 333 return PTR_ERR(hda->regs);
334 334
335 chip->remap_addr = hda->regs + HDA_BAR0; 335 chip->remap_addr = hda->regs + HDA_BAR0;
336 chip->addr = res->start + HDA_BAR0; 336 chip->addr = res->start + HDA_BAR0;
diff --git a/sound/pci/hda/patch_cirrus.c b/sound/pci/hda/patch_cirrus.c
index 1589c9bcce3e..dd2b3d92071f 100644
--- a/sound/pci/hda/patch_cirrus.c
+++ b/sound/pci/hda/patch_cirrus.c
@@ -393,6 +393,7 @@ static const struct snd_pci_quirk cs420x_fixup_tbl[] = {
393 SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81), 393 SND_PCI_QUIRK(0x106b, 0x1c00, "MacBookPro 8,1", CS420X_MBP81),
394 SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122), 394 SND_PCI_QUIRK(0x106b, 0x2000, "iMac 12,2", CS420X_IMAC27_122),
395 SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101), 395 SND_PCI_QUIRK(0x106b, 0x2800, "MacBookPro 10,1", CS420X_MBP101),
396 SND_PCI_QUIRK(0x106b, 0x5600, "MacBookAir 5,2", CS420X_MBP81),
396 SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42), 397 SND_PCI_QUIRK(0x106b, 0x5b00, "MacBookAir 4,2", CS420X_MBA42),
397 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE), 398 SND_PCI_QUIRK_VENDOR(0x106b, "Apple", CS420X_APPLE),
398 {} /* terminator */ 399 {} /* terminator */
@@ -584,6 +585,7 @@ static int patch_cs420x(struct hda_codec *codec)
584 return -ENOMEM; 585 return -ENOMEM;
585 586
586 spec->gen.automute_hook = cs_automute; 587 spec->gen.automute_hook = cs_automute;
588 codec->single_adc_amp = 1;
587 589
588 snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl, 590 snd_hda_pick_fixup(codec, cs420x_models, cs420x_fixup_tbl,
589 cs420x_fixups); 591 cs420x_fixups);
diff --git a/sound/pci/hda/patch_conexant.c b/sound/pci/hda/patch_conexant.c
index fd3ed18670e9..da67ea8645a6 100644
--- a/sound/pci/hda/patch_conexant.c
+++ b/sound/pci/hda/patch_conexant.c
@@ -223,6 +223,7 @@ enum {
223 CXT_PINCFG_LENOVO_TP410, 223 CXT_PINCFG_LENOVO_TP410,
224 CXT_PINCFG_LEMOTE_A1004, 224 CXT_PINCFG_LEMOTE_A1004,
225 CXT_PINCFG_LEMOTE_A1205, 225 CXT_PINCFG_LEMOTE_A1205,
226 CXT_PINCFG_COMPAQ_CQ60,
226 CXT_FIXUP_STEREO_DMIC, 227 CXT_FIXUP_STEREO_DMIC,
227 CXT_FIXUP_INC_MIC_BOOST, 228 CXT_FIXUP_INC_MIC_BOOST,
228 CXT_FIXUP_HEADPHONE_MIC_PIN, 229 CXT_FIXUP_HEADPHONE_MIC_PIN,
@@ -660,6 +661,15 @@ static const struct hda_fixup cxt_fixups[] = {
660 .type = HDA_FIXUP_PINS, 661 .type = HDA_FIXUP_PINS,
661 .v.pins = cxt_pincfg_lemote, 662 .v.pins = cxt_pincfg_lemote,
662 }, 663 },
664 [CXT_PINCFG_COMPAQ_CQ60] = {
665 .type = HDA_FIXUP_PINS,
666 .v.pins = (const struct hda_pintbl[]) {
667 /* 0x17 was falsely set up as a mic, it should 0x1d */
668 { 0x17, 0x400001f0 },
669 { 0x1d, 0x97a70120 },
670 { }
671 }
672 },
663 [CXT_FIXUP_STEREO_DMIC] = { 673 [CXT_FIXUP_STEREO_DMIC] = {
664 .type = HDA_FIXUP_FUNC, 674 .type = HDA_FIXUP_FUNC,
665 .v.func = cxt_fixup_stereo_dmic, 675 .v.func = cxt_fixup_stereo_dmic,
@@ -769,6 +779,7 @@ static const struct hda_model_fixup cxt5047_fixup_models[] = {
769}; 779};
770 780
771static const struct snd_pci_quirk cxt5051_fixups[] = { 781static const struct snd_pci_quirk cxt5051_fixups[] = {
782 SND_PCI_QUIRK(0x103c, 0x360b, "Compaq CQ60", CXT_PINCFG_COMPAQ_CQ60),
772 SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo X200", CXT_PINCFG_LENOVO_X200), 783 SND_PCI_QUIRK(0x17aa, 0x20f2, "Lenovo X200", CXT_PINCFG_LENOVO_X200),
773 {} 784 {}
774}; 785};
diff --git a/sound/pci/hda/patch_realtek.c b/sound/pci/hda/patch_realtek.c
index ddb93083a2af..526398a4a442 100644
--- a/sound/pci/hda/patch_realtek.c
+++ b/sound/pci/hda/patch_realtek.c
@@ -4937,6 +4937,7 @@ static const struct snd_pci_quirk alc269_fixup_tbl[] = {
4937 SND_PCI_QUIRK(0x103c, 0x218b, "HP", ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED), 4937 SND_PCI_QUIRK(0x103c, 0x218b, "HP", ALC269_FIXUP_LIMIT_INT_MIC_BOOST_MUTE_LED),
4938 SND_PCI_QUIRK(0x103c, 0x225f, "HP", ALC280_FIXUP_HP_GPIO2_MIC_HOTKEY), 4938 SND_PCI_QUIRK(0x103c, 0x225f, "HP", ALC280_FIXUP_HP_GPIO2_MIC_HOTKEY),
4939 /* ALC282 */ 4939 /* ALC282 */
4940 SND_PCI_QUIRK(0x103c, 0x21f9, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
4940 SND_PCI_QUIRK(0x103c, 0x2210, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), 4941 SND_PCI_QUIRK(0x103c, 0x2210, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
4941 SND_PCI_QUIRK(0x103c, 0x2214, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1), 4942 SND_PCI_QUIRK(0x103c, 0x2214, "HP", ALC269_FIXUP_HP_MUTE_LED_MIC1),
4942 SND_PCI_QUIRK(0x103c, 0x2236, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED), 4943 SND_PCI_QUIRK(0x103c, 0x2236, "HP", ALC269_FIXUP_HP_LINE1_MIC1_LED),
@@ -5208,6 +5209,13 @@ static const struct snd_hda_pin_quirk alc269_pin_fixup_tbl[] = {
5208 {0x17, 0x40000000}, 5209 {0x17, 0x40000000},
5209 {0x1d, 0x40700001}, 5210 {0x1d, 0x40700001},
5210 {0x21, 0x02211040}), 5211 {0x21, 0x02211040}),
5212 SND_HDA_PIN_QUIRK(0x10ec0255, 0x1028, "Dell", ALC255_FIXUP_DELL1_MIC_NO_PRESENCE,
5213 ALC255_STANDARD_PINS,
5214 {0x12, 0x90a60170},
5215 {0x14, 0x90170140},
5216 {0x17, 0x40000000},
5217 {0x1d, 0x40700001},
5218 {0x21, 0x02211050}),
5211 SND_HDA_PIN_QUIRK(0x10ec0280, 0x103c, "HP", ALC280_FIXUP_HP_GPIO4, 5219 SND_HDA_PIN_QUIRK(0x10ec0280, 0x103c, "HP", ALC280_FIXUP_HP_GPIO4,
5212 {0x12, 0x90a60130}, 5220 {0x12, 0x90a60130},
5213 {0x13, 0x40000000}, 5221 {0x13, 0x40000000},
diff --git a/sound/pci/hda/patch_sigmatel.c b/sound/pci/hda/patch_sigmatel.c
index 6d36c5b78805..87eff3173ce9 100644
--- a/sound/pci/hda/patch_sigmatel.c
+++ b/sound/pci/hda/patch_sigmatel.c
@@ -79,6 +79,7 @@ enum {
79 STAC_ALIENWARE_M17X, 79 STAC_ALIENWARE_M17X,
80 STAC_92HD89XX_HP_FRONT_JACK, 80 STAC_92HD89XX_HP_FRONT_JACK,
81 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK, 81 STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK,
82 STAC_92HD73XX_ASUS_MOBO,
82 STAC_92HD73XX_MODELS 83 STAC_92HD73XX_MODELS
83}; 84};
84 85
@@ -1911,7 +1912,18 @@ static const struct hda_fixup stac92hd73xx_fixups[] = {
1911 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = { 1912 [STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK] = {
1912 .type = HDA_FIXUP_PINS, 1913 .type = HDA_FIXUP_PINS,
1913 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs, 1914 .v.pins = stac92hd89xx_hp_z1_g2_right_mic_jack_pin_configs,
1914 } 1915 },
1916 [STAC_92HD73XX_ASUS_MOBO] = {
1917 .type = HDA_FIXUP_PINS,
1918 .v.pins = (const struct hda_pintbl[]) {
1919 /* enable 5.1 and SPDIF out */
1920 { 0x0c, 0x01014411 },
1921 { 0x0d, 0x01014410 },
1922 { 0x0e, 0x01014412 },
1923 { 0x22, 0x014b1180 },
1924 { }
1925 }
1926 },
1915}; 1927};
1916 1928
1917static const struct hda_model_fixup stac92hd73xx_models[] = { 1929static const struct hda_model_fixup stac92hd73xx_models[] = {
@@ -1923,6 +1935,7 @@ static const struct hda_model_fixup stac92hd73xx_models[] = {
1923 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" }, 1935 { .id = STAC_DELL_M6_BOTH, .name = "dell-m6" },
1924 { .id = STAC_DELL_EQ, .name = "dell-eq" }, 1936 { .id = STAC_DELL_EQ, .name = "dell-eq" },
1925 { .id = STAC_ALIENWARE_M17X, .name = "alienware" }, 1937 { .id = STAC_ALIENWARE_M17X, .name = "alienware" },
1938 { .id = STAC_92HD73XX_ASUS_MOBO, .name = "asus-mobo" },
1926 {} 1939 {}
1927}; 1940};
1928 1941
@@ -1975,6 +1988,8 @@ static const struct snd_pci_quirk stac92hd73xx_fixup_tbl[] = {
1975 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK), 1988 "HP Z1 G2", STAC_92HD89XX_HP_Z1_G2_RIGHT_MIC_JACK),
1976 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17, 1989 SND_PCI_QUIRK(PCI_VENDOR_ID_HP, 0x2b17,
1977 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK), 1990 "unknown HP", STAC_92HD89XX_HP_FRONT_JACK),
1991 SND_PCI_QUIRK(PCI_VENDOR_ID_ASUSTEK, 0x83f8, "ASUS AT4NM10",
1992 STAC_92HD73XX_ASUS_MOBO),
1978 {} /* terminator */ 1993 {} /* terminator */
1979}; 1994};
1980 1995
diff --git a/sound/pci/rme9652/hdspm.c b/sound/pci/rme9652/hdspm.c
index 2c363fdca9fd..ca67f896d117 100644
--- a/sound/pci/rme9652/hdspm.c
+++ b/sound/pci/rme9652/hdspm.c
@@ -6082,6 +6082,9 @@ static int snd_hdspm_playback_open(struct snd_pcm_substream *substream)
6082 snd_pcm_hw_constraint_minmax(runtime, 6082 snd_pcm_hw_constraint_minmax(runtime,
6083 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 6083 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
6084 64, 8192); 6084 64, 8192);
6085 snd_pcm_hw_constraint_minmax(runtime,
6086 SNDRV_PCM_HW_PARAM_PERIODS,
6087 2, 2);
6085 break; 6088 break;
6086 } 6089 }
6087 6090
@@ -6156,6 +6159,9 @@ static int snd_hdspm_capture_open(struct snd_pcm_substream *substream)
6156 snd_pcm_hw_constraint_minmax(runtime, 6159 snd_pcm_hw_constraint_minmax(runtime,
6157 SNDRV_PCM_HW_PARAM_PERIOD_SIZE, 6160 SNDRV_PCM_HW_PARAM_PERIOD_SIZE,
6158 64, 8192); 6161 64, 8192);
6162 snd_pcm_hw_constraint_minmax(runtime,
6163 SNDRV_PCM_HW_PARAM_PERIODS,
6164 2, 2);
6159 break; 6165 break;
6160 } 6166 }
6161 6167
diff --git a/sound/soc/atmel/sam9g20_wm8731.c b/sound/soc/atmel/sam9g20_wm8731.c
index f5ad214663f9..8de836165cf2 100644
--- a/sound/soc/atmel/sam9g20_wm8731.c
+++ b/sound/soc/atmel/sam9g20_wm8731.c
@@ -46,8 +46,6 @@
46#include <sound/pcm_params.h> 46#include <sound/pcm_params.h>
47#include <sound/soc.h> 47#include <sound/soc.h>
48 48
49#include <asm/mach-types.h>
50
51#include "../codecs/wm8731.h" 49#include "../codecs/wm8731.h"
52#include "atmel-pcm.h" 50#include "atmel-pcm.h"
53#include "atmel_ssc_dai.h" 51#include "atmel_ssc_dai.h"
@@ -171,9 +169,7 @@ static int at91sam9g20ek_audio_probe(struct platform_device *pdev)
171 int ret; 169 int ret;
172 170
173 if (!np) { 171 if (!np) {
174 if (!(machine_is_at91sam9g20ek() || 172 return -ENODEV;
175 machine_is_at91sam9g20ek_2mmc()))
176 return -ENODEV;
177 } 173 }
178 174
179 ret = atmel_ssc_set_audio(0); 175 ret = atmel_ssc_set_audio(0);
@@ -210,39 +206,37 @@ static int at91sam9g20ek_audio_probe(struct platform_device *pdev)
210 card->dev = &pdev->dev; 206 card->dev = &pdev->dev;
211 207
212 /* Parse device node info */ 208 /* Parse device node info */
213 if (np) { 209 ret = snd_soc_of_parse_card_name(card, "atmel,model");
214 ret = snd_soc_of_parse_card_name(card, "atmel,model"); 210 if (ret)
215 if (ret) 211 goto err;
216 goto err; 212
217 213 ret = snd_soc_of_parse_audio_routing(card,
218 ret = snd_soc_of_parse_audio_routing(card, 214 "atmel,audio-routing");
219 "atmel,audio-routing"); 215 if (ret)
220 if (ret) 216 goto err;
221 goto err; 217
222 218 /* Parse codec info */
223 /* Parse codec info */ 219 at91sam9g20ek_dai.codec_name = NULL;
224 at91sam9g20ek_dai.codec_name = NULL; 220 codec_np = of_parse_phandle(np, "atmel,audio-codec", 0);
225 codec_np = of_parse_phandle(np, "atmel,audio-codec", 0); 221 if (!codec_np) {
226 if (!codec_np) { 222 dev_err(&pdev->dev, "codec info missing\n");
227 dev_err(&pdev->dev, "codec info missing\n"); 223 return -EINVAL;
228 return -EINVAL; 224 }
229 } 225 at91sam9g20ek_dai.codec_of_node = codec_np;
230 at91sam9g20ek_dai.codec_of_node = codec_np; 226
231 227 /* Parse dai and platform info */
232 /* Parse dai and platform info */ 228 at91sam9g20ek_dai.cpu_dai_name = NULL;
233 at91sam9g20ek_dai.cpu_dai_name = NULL; 229 at91sam9g20ek_dai.platform_name = NULL;
234 at91sam9g20ek_dai.platform_name = NULL; 230 cpu_np = of_parse_phandle(np, "atmel,ssc-controller", 0);
235 cpu_np = of_parse_phandle(np, "atmel,ssc-controller", 0); 231 if (!cpu_np) {
236 if (!cpu_np) { 232 dev_err(&pdev->dev, "dai and pcm info missing\n");
237 dev_err(&pdev->dev, "dai and pcm info missing\n"); 233 return -EINVAL;
238 return -EINVAL;
239 }
240 at91sam9g20ek_dai.cpu_of_node = cpu_np;
241 at91sam9g20ek_dai.platform_of_node = cpu_np;
242
243 of_node_put(codec_np);
244 of_node_put(cpu_np);
245 } 234 }
235 at91sam9g20ek_dai.cpu_of_node = cpu_np;
236 at91sam9g20ek_dai.platform_of_node = cpu_np;
237
238 of_node_put(codec_np);
239 of_node_put(cpu_np);
246 240
247 ret = snd_soc_register_card(card); 241 ret = snd_soc_register_card(card);
248 if (ret) { 242 if (ret) {
diff --git a/sound/soc/cirrus/Kconfig b/sound/soc/cirrus/Kconfig
index 7b7fbcd49e5e..c7cd60f009e9 100644
--- a/sound/soc/cirrus/Kconfig
+++ b/sound/soc/cirrus/Kconfig
@@ -16,7 +16,7 @@ config SND_EP93XX_SOC_AC97
16 16
17config SND_EP93XX_SOC_SNAPPERCL15 17config SND_EP93XX_SOC_SNAPPERCL15
18 tristate "SoC Audio support for Bluewater Systems Snapper CL15 module" 18 tristate "SoC Audio support for Bluewater Systems Snapper CL15 module"
19 depends on SND_EP93XX_SOC && MACH_SNAPPER_CL15 19 depends on SND_EP93XX_SOC && MACH_SNAPPER_CL15 && I2C
20 select SND_EP93XX_SOC_I2S 20 select SND_EP93XX_SOC_I2S
21 select SND_SOC_TLV320AIC23_I2C 21 select SND_SOC_TLV320AIC23_I2C
22 help 22 help
diff --git a/sound/soc/codecs/Kconfig b/sound/soc/codecs/Kconfig
index 064e6c18e109..ea9f0e31f9d4 100644
--- a/sound/soc/codecs/Kconfig
+++ b/sound/soc/codecs/Kconfig
@@ -69,7 +69,7 @@ config SND_SOC_ALL_CODECS
69 select SND_SOC_MAX98088 if I2C 69 select SND_SOC_MAX98088 if I2C
70 select SND_SOC_MAX98090 if I2C 70 select SND_SOC_MAX98090 if I2C
71 select SND_SOC_MAX98095 if I2C 71 select SND_SOC_MAX98095 if I2C
72 select SND_SOC_MAX98357A 72 select SND_SOC_MAX98357A if GPIOLIB
73 select SND_SOC_MAX9850 if I2C 73 select SND_SOC_MAX9850 if I2C
74 select SND_SOC_MAX9768 if I2C 74 select SND_SOC_MAX9768 if I2C
75 select SND_SOC_MAX9877 if I2C 75 select SND_SOC_MAX9877 if I2C
diff --git a/sound/soc/codecs/adav80x.c b/sound/soc/codecs/adav80x.c
index b67480f1b1aa..4373ada95648 100644
--- a/sound/soc/codecs/adav80x.c
+++ b/sound/soc/codecs/adav80x.c
@@ -317,7 +317,7 @@ static int adav80x_put_deemph(struct snd_kcontrol *kcontrol,
317{ 317{
318 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 318 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
319 struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); 319 struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec);
320 unsigned int deemph = ucontrol->value.enumerated.item[0]; 320 unsigned int deemph = ucontrol->value.integer.value[0];
321 321
322 if (deemph > 1) 322 if (deemph > 1)
323 return -EINVAL; 323 return -EINVAL;
@@ -333,7 +333,7 @@ static int adav80x_get_deemph(struct snd_kcontrol *kcontrol,
333 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 333 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
334 struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec); 334 struct adav80x *adav80x = snd_soc_codec_get_drvdata(codec);
335 335
336 ucontrol->value.enumerated.item[0] = adav80x->deemph; 336 ucontrol->value.integer.value[0] = adav80x->deemph;
337 return 0; 337 return 0;
338}; 338};
339 339
diff --git a/sound/soc/codecs/ak4641.c b/sound/soc/codecs/ak4641.c
index 70861c7b1631..81b54a270bd8 100644
--- a/sound/soc/codecs/ak4641.c
+++ b/sound/soc/codecs/ak4641.c
@@ -76,7 +76,7 @@ static int ak4641_put_deemph(struct snd_kcontrol *kcontrol,
76{ 76{
77 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 77 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
78 struct ak4641_priv *ak4641 = snd_soc_codec_get_drvdata(codec); 78 struct ak4641_priv *ak4641 = snd_soc_codec_get_drvdata(codec);
79 int deemph = ucontrol->value.enumerated.item[0]; 79 int deemph = ucontrol->value.integer.value[0];
80 80
81 if (deemph > 1) 81 if (deemph > 1)
82 return -EINVAL; 82 return -EINVAL;
@@ -92,7 +92,7 @@ static int ak4641_get_deemph(struct snd_kcontrol *kcontrol,
92 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 92 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
93 struct ak4641_priv *ak4641 = snd_soc_codec_get_drvdata(codec); 93 struct ak4641_priv *ak4641 = snd_soc_codec_get_drvdata(codec);
94 94
95 ucontrol->value.enumerated.item[0] = ak4641->deemph; 95 ucontrol->value.integer.value[0] = ak4641->deemph;
96 return 0; 96 return 0;
97}; 97};
98 98
diff --git a/sound/soc/codecs/ak4671.c b/sound/soc/codecs/ak4671.c
index 632e89f793a7..2a58b1dccd2f 100644
--- a/sound/soc/codecs/ak4671.c
+++ b/sound/soc/codecs/ak4671.c
@@ -343,25 +343,25 @@ static const struct snd_soc_dapm_widget ak4671_dapm_widgets[] = {
343}; 343};
344 344
345static const struct snd_soc_dapm_route ak4671_intercon[] = { 345static const struct snd_soc_dapm_route ak4671_intercon[] = {
346 {"DAC Left", "NULL", "PMPLL"}, 346 {"DAC Left", NULL, "PMPLL"},
347 {"DAC Right", "NULL", "PMPLL"}, 347 {"DAC Right", NULL, "PMPLL"},
348 {"ADC Left", "NULL", "PMPLL"}, 348 {"ADC Left", NULL, "PMPLL"},
349 {"ADC Right", "NULL", "PMPLL"}, 349 {"ADC Right", NULL, "PMPLL"},
350 350
351 /* Outputs */ 351 /* Outputs */
352 {"LOUT1", "NULL", "LOUT1 Mixer"}, 352 {"LOUT1", NULL, "LOUT1 Mixer"},
353 {"ROUT1", "NULL", "ROUT1 Mixer"}, 353 {"ROUT1", NULL, "ROUT1 Mixer"},
354 {"LOUT2", "NULL", "LOUT2 Mix Amp"}, 354 {"LOUT2", NULL, "LOUT2 Mix Amp"},
355 {"ROUT2", "NULL", "ROUT2 Mix Amp"}, 355 {"ROUT2", NULL, "ROUT2 Mix Amp"},
356 {"LOUT3", "NULL", "LOUT3 Mixer"}, 356 {"LOUT3", NULL, "LOUT3 Mixer"},
357 {"ROUT3", "NULL", "ROUT3 Mixer"}, 357 {"ROUT3", NULL, "ROUT3 Mixer"},
358 358
359 {"LOUT1 Mixer", "DACL", "DAC Left"}, 359 {"LOUT1 Mixer", "DACL", "DAC Left"},
360 {"ROUT1 Mixer", "DACR", "DAC Right"}, 360 {"ROUT1 Mixer", "DACR", "DAC Right"},
361 {"LOUT2 Mixer", "DACHL", "DAC Left"}, 361 {"LOUT2 Mixer", "DACHL", "DAC Left"},
362 {"ROUT2 Mixer", "DACHR", "DAC Right"}, 362 {"ROUT2 Mixer", "DACHR", "DAC Right"},
363 {"LOUT2 Mix Amp", "NULL", "LOUT2 Mixer"}, 363 {"LOUT2 Mix Amp", NULL, "LOUT2 Mixer"},
364 {"ROUT2 Mix Amp", "NULL", "ROUT2 Mixer"}, 364 {"ROUT2 Mix Amp", NULL, "ROUT2 Mixer"},
365 {"LOUT3 Mixer", "DACSL", "DAC Left"}, 365 {"LOUT3 Mixer", "DACSL", "DAC Left"},
366 {"ROUT3 Mixer", "DACSR", "DAC Right"}, 366 {"ROUT3 Mixer", "DACSR", "DAC Right"},
367 367
@@ -381,18 +381,18 @@ static const struct snd_soc_dapm_route ak4671_intercon[] = {
381 {"LIN2", NULL, "Mic Bias"}, 381 {"LIN2", NULL, "Mic Bias"},
382 {"RIN2", NULL, "Mic Bias"}, 382 {"RIN2", NULL, "Mic Bias"},
383 383
384 {"ADC Left", "NULL", "LIN MUX"}, 384 {"ADC Left", NULL, "LIN MUX"},
385 {"ADC Right", "NULL", "RIN MUX"}, 385 {"ADC Right", NULL, "RIN MUX"},
386 386
387 /* Analog Loops */ 387 /* Analog Loops */
388 {"LIN1 Mixing Circuit", "NULL", "LIN1"}, 388 {"LIN1 Mixing Circuit", NULL, "LIN1"},
389 {"RIN1 Mixing Circuit", "NULL", "RIN1"}, 389 {"RIN1 Mixing Circuit", NULL, "RIN1"},
390 {"LIN2 Mixing Circuit", "NULL", "LIN2"}, 390 {"LIN2 Mixing Circuit", NULL, "LIN2"},
391 {"RIN2 Mixing Circuit", "NULL", "RIN2"}, 391 {"RIN2 Mixing Circuit", NULL, "RIN2"},
392 {"LIN3 Mixing Circuit", "NULL", "LIN3"}, 392 {"LIN3 Mixing Circuit", NULL, "LIN3"},
393 {"RIN3 Mixing Circuit", "NULL", "RIN3"}, 393 {"RIN3 Mixing Circuit", NULL, "RIN3"},
394 {"LIN4 Mixing Circuit", "NULL", "LIN4"}, 394 {"LIN4 Mixing Circuit", NULL, "LIN4"},
395 {"RIN4 Mixing Circuit", "NULL", "RIN4"}, 395 {"RIN4 Mixing Circuit", NULL, "RIN4"},
396 396
397 {"LOUT1 Mixer", "LINL1", "LIN1 Mixing Circuit"}, 397 {"LOUT1 Mixer", "LINL1", "LIN1 Mixing Circuit"},
398 {"ROUT1 Mixer", "RINR1", "RIN1 Mixing Circuit"}, 398 {"ROUT1 Mixer", "RINR1", "RIN1 Mixing Circuit"},
diff --git a/sound/soc/codecs/cs4271.c b/sound/soc/codecs/cs4271.c
index 79a4efcb894c..7d3a6accaf9a 100644
--- a/sound/soc/codecs/cs4271.c
+++ b/sound/soc/codecs/cs4271.c
@@ -286,7 +286,7 @@ static int cs4271_get_deemph(struct snd_kcontrol *kcontrol,
286 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 286 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
287 struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 287 struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec);
288 288
289 ucontrol->value.enumerated.item[0] = cs4271->deemph; 289 ucontrol->value.integer.value[0] = cs4271->deemph;
290 return 0; 290 return 0;
291} 291}
292 292
@@ -296,7 +296,7 @@ static int cs4271_put_deemph(struct snd_kcontrol *kcontrol,
296 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 296 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
297 struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec); 297 struct cs4271_private *cs4271 = snd_soc_codec_get_drvdata(codec);
298 298
299 cs4271->deemph = ucontrol->value.enumerated.item[0]; 299 cs4271->deemph = ucontrol->value.integer.value[0];
300 return cs4271_set_deemph(codec); 300 return cs4271_set_deemph(codec);
301} 301}
302 302
diff --git a/sound/soc/codecs/da732x.c b/sound/soc/codecs/da732x.c
index ffe96175a8a5..911c26c705fc 100644
--- a/sound/soc/codecs/da732x.c
+++ b/sound/soc/codecs/da732x.c
@@ -876,11 +876,11 @@ static const struct snd_soc_dapm_widget da732x_dapm_widgets[] = {
876 876
877static const struct snd_soc_dapm_route da732x_dapm_routes[] = { 877static const struct snd_soc_dapm_route da732x_dapm_routes[] = {
878 /* Inputs */ 878 /* Inputs */
879 {"AUX1L PGA", "NULL", "AUX1L"}, 879 {"AUX1L PGA", NULL, "AUX1L"},
880 {"AUX1R PGA", "NULL", "AUX1R"}, 880 {"AUX1R PGA", NULL, "AUX1R"},
881 {"MIC1 PGA", NULL, "MIC1"}, 881 {"MIC1 PGA", NULL, "MIC1"},
882 {"MIC2 PGA", "NULL", "MIC2"}, 882 {"MIC2 PGA", NULL, "MIC2"},
883 {"MIC3 PGA", "NULL", "MIC3"}, 883 {"MIC3 PGA", NULL, "MIC3"},
884 884
885 /* Capture Path */ 885 /* Capture Path */
886 {"ADC1 Left MUX", "MIC1", "MIC1 PGA"}, 886 {"ADC1 Left MUX", "MIC1", "MIC1 PGA"},
diff --git a/sound/soc/codecs/es8328.c b/sound/soc/codecs/es8328.c
index f27325155ace..c5f35a07e8e4 100644
--- a/sound/soc/codecs/es8328.c
+++ b/sound/soc/codecs/es8328.c
@@ -120,7 +120,7 @@ static int es8328_get_deemph(struct snd_kcontrol *kcontrol,
120 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 120 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
121 struct es8328_priv *es8328 = snd_soc_codec_get_drvdata(codec); 121 struct es8328_priv *es8328 = snd_soc_codec_get_drvdata(codec);
122 122
123 ucontrol->value.enumerated.item[0] = es8328->deemph; 123 ucontrol->value.integer.value[0] = es8328->deemph;
124 return 0; 124 return 0;
125} 125}
126 126
@@ -129,7 +129,7 @@ static int es8328_put_deemph(struct snd_kcontrol *kcontrol,
129{ 129{
130 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 130 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
131 struct es8328_priv *es8328 = snd_soc_codec_get_drvdata(codec); 131 struct es8328_priv *es8328 = snd_soc_codec_get_drvdata(codec);
132 int deemph = ucontrol->value.enumerated.item[0]; 132 int deemph = ucontrol->value.integer.value[0];
133 int ret; 133 int ret;
134 134
135 if (deemph > 1) 135 if (deemph > 1)
diff --git a/sound/soc/codecs/max98357a.c b/sound/soc/codecs/max98357a.c
index 1806333ea29e..e9e6efbc21dd 100644
--- a/sound/soc/codecs/max98357a.c
+++ b/sound/soc/codecs/max98357a.c
@@ -12,9 +12,19 @@
12 * max98357a.c -- MAX98357A ALSA SoC Codec driver 12 * max98357a.c -- MAX98357A ALSA SoC Codec driver
13 */ 13 */
14 14
15#include <linux/module.h> 15#include <linux/device.h>
16#include <linux/err.h>
16#include <linux/gpio.h> 17#include <linux/gpio.h>
18#include <linux/gpio/consumer.h>
19#include <linux/kernel.h>
20#include <linux/mod_devicetable.h>
21#include <linux/module.h>
22#include <linux/of.h>
23#include <linux/platform_device.h>
24#include <sound/pcm.h>
17#include <sound/soc.h> 25#include <sound/soc.h>
26#include <sound/soc-dai.h>
27#include <sound/soc-dapm.h>
18 28
19#define DRV_NAME "max98357a" 29#define DRV_NAME "max98357a"
20 30
diff --git a/sound/soc/codecs/pcm1681.c b/sound/soc/codecs/pcm1681.c
index a722a023c262..477e13d30971 100644
--- a/sound/soc/codecs/pcm1681.c
+++ b/sound/soc/codecs/pcm1681.c
@@ -118,7 +118,7 @@ static int pcm1681_get_deemph(struct snd_kcontrol *kcontrol,
118 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 118 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
119 struct pcm1681_private *priv = snd_soc_codec_get_drvdata(codec); 119 struct pcm1681_private *priv = snd_soc_codec_get_drvdata(codec);
120 120
121 ucontrol->value.enumerated.item[0] = priv->deemph; 121 ucontrol->value.integer.value[0] = priv->deemph;
122 122
123 return 0; 123 return 0;
124} 124}
@@ -129,7 +129,7 @@ static int pcm1681_put_deemph(struct snd_kcontrol *kcontrol,
129 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 129 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
130 struct pcm1681_private *priv = snd_soc_codec_get_drvdata(codec); 130 struct pcm1681_private *priv = snd_soc_codec_get_drvdata(codec);
131 131
132 priv->deemph = ucontrol->value.enumerated.item[0]; 132 priv->deemph = ucontrol->value.integer.value[0];
133 133
134 return pcm1681_set_deemph(codec); 134 return pcm1681_set_deemph(codec);
135} 135}
diff --git a/sound/soc/codecs/rt286.c b/sound/soc/codecs/rt286.c
index f374840a5a7c..9b541e52da8c 100644
--- a/sound/soc/codecs/rt286.c
+++ b/sound/soc/codecs/rt286.c
@@ -1198,7 +1198,7 @@ static struct dmi_system_id dmi_dell_dino[] = {
1198 .ident = "Dell Dino", 1198 .ident = "Dell Dino",
1199 .matches = { 1199 .matches = {
1200 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."), 1200 DMI_MATCH(DMI_SYS_VENDOR, "Dell Inc."),
1201 DMI_MATCH(DMI_BOARD_NAME, "0144P8") 1201 DMI_MATCH(DMI_PRODUCT_NAME, "XPS 13 9343")
1202 } 1202 }
1203 }, 1203 },
1204 { } 1204 { }
diff --git a/sound/soc/codecs/rt5670.c b/sound/soc/codecs/rt5670.c
index e1a4a45c57e2..fd102613d20d 100644
--- a/sound/soc/codecs/rt5670.c
+++ b/sound/soc/codecs/rt5670.c
@@ -225,7 +225,6 @@ static bool rt5670_volatile_register(struct device *dev, unsigned int reg)
225 case RT5670_ADC_EQ_CTRL1: 225 case RT5670_ADC_EQ_CTRL1:
226 case RT5670_EQ_CTRL1: 226 case RT5670_EQ_CTRL1:
227 case RT5670_ALC_CTRL_1: 227 case RT5670_ALC_CTRL_1:
228 case RT5670_IRQ_CTRL1:
229 case RT5670_IRQ_CTRL2: 228 case RT5670_IRQ_CTRL2:
230 case RT5670_INT_IRQ_ST: 229 case RT5670_INT_IRQ_ST:
231 case RT5670_IL_CMD: 230 case RT5670_IL_CMD:
@@ -2703,6 +2702,12 @@ static int rt5670_i2c_probe(struct i2c_client *i2c,
2703 2702
2704 regmap_write(rt5670->regmap, RT5670_RESET, 0); 2703 regmap_write(rt5670->regmap, RT5670_RESET, 0);
2705 2704
2705 regmap_read(rt5670->regmap, RT5670_VENDOR_ID, &val);
2706 if (val >= 4)
2707 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0980);
2708 else
2709 regmap_write(rt5670->regmap, RT5670_GPIO_CTRL3, 0x0d00);
2710
2706 ret = regmap_register_patch(rt5670->regmap, init_list, 2711 ret = regmap_register_patch(rt5670->regmap, init_list,
2707 ARRAY_SIZE(init_list)); 2712 ARRAY_SIZE(init_list));
2708 if (ret != 0) 2713 if (ret != 0)
diff --git a/sound/soc/codecs/rt5677.c b/sound/soc/codecs/rt5677.c
index 5d0bb8748dd1..fb9c20eace3f 100644
--- a/sound/soc/codecs/rt5677.c
+++ b/sound/soc/codecs/rt5677.c
@@ -3284,8 +3284,8 @@ static const struct snd_soc_dapm_route rt5677_dapm_routes[] = {
3284 { "IB45 Bypass Mux", "Bypass", "IB45 Mux" }, 3284 { "IB45 Bypass Mux", "Bypass", "IB45 Mux" },
3285 { "IB45 Bypass Mux", "Pass SRC", "IB45 Mux" }, 3285 { "IB45 Bypass Mux", "Pass SRC", "IB45 Mux" },
3286 3286
3287 { "IB6 Mux", "IF1 DAC 6", "IF1 DAC6" }, 3287 { "IB6 Mux", "IF1 DAC 6", "IF1 DAC6 Mux" },
3288 { "IB6 Mux", "IF2 DAC 6", "IF2 DAC6" }, 3288 { "IB6 Mux", "IF2 DAC 6", "IF2 DAC6 Mux" },
3289 { "IB6 Mux", "SLB DAC 6", "SLB DAC6" }, 3289 { "IB6 Mux", "SLB DAC 6", "SLB DAC6" },
3290 { "IB6 Mux", "STO4 ADC MIX L", "Stereo4 ADC MIXL" }, 3290 { "IB6 Mux", "STO4 ADC MIX L", "Stereo4 ADC MIXL" },
3291 { "IB6 Mux", "IF4 DAC L", "IF4 DAC L" }, 3291 { "IB6 Mux", "IF4 DAC L", "IF4 DAC L" },
@@ -3293,8 +3293,8 @@ static const struct snd_soc_dapm_route rt5677_dapm_routes[] = {
3293 { "IB6 Mux", "STO2 ADC MIX L", "Stereo2 ADC MIXL" }, 3293 { "IB6 Mux", "STO2 ADC MIX L", "Stereo2 ADC MIXL" },
3294 { "IB6 Mux", "STO3 ADC MIX L", "Stereo3 ADC MIXL" }, 3294 { "IB6 Mux", "STO3 ADC MIX L", "Stereo3 ADC MIXL" },
3295 3295
3296 { "IB7 Mux", "IF1 DAC 7", "IF1 DAC7" }, 3296 { "IB7 Mux", "IF1 DAC 7", "IF1 DAC7 Mux" },
3297 { "IB7 Mux", "IF2 DAC 7", "IF2 DAC7" }, 3297 { "IB7 Mux", "IF2 DAC 7", "IF2 DAC7 Mux" },
3298 { "IB7 Mux", "SLB DAC 7", "SLB DAC7" }, 3298 { "IB7 Mux", "SLB DAC 7", "SLB DAC7" },
3299 { "IB7 Mux", "STO4 ADC MIX R", "Stereo4 ADC MIXR" }, 3299 { "IB7 Mux", "STO4 ADC MIX R", "Stereo4 ADC MIXR" },
3300 { "IB7 Mux", "IF4 DAC R", "IF4 DAC R" }, 3300 { "IB7 Mux", "IF4 DAC R", "IF4 DAC R" },
@@ -3635,15 +3635,15 @@ static const struct snd_soc_dapm_route rt5677_dapm_routes[] = {
3635 { "DAC1 FS", NULL, "DAC1 MIXL" }, 3635 { "DAC1 FS", NULL, "DAC1 MIXL" },
3636 { "DAC1 FS", NULL, "DAC1 MIXR" }, 3636 { "DAC1 FS", NULL, "DAC1 MIXR" },
3637 3637
3638 { "DAC2 L Mux", "IF1 DAC 2", "IF1 DAC2" }, 3638 { "DAC2 L Mux", "IF1 DAC 2", "IF1 DAC2 Mux" },
3639 { "DAC2 L Mux", "IF2 DAC 2", "IF2 DAC2" }, 3639 { "DAC2 L Mux", "IF2 DAC 2", "IF2 DAC2 Mux" },
3640 { "DAC2 L Mux", "IF3 DAC L", "IF3 DAC L" }, 3640 { "DAC2 L Mux", "IF3 DAC L", "IF3 DAC L" },
3641 { "DAC2 L Mux", "IF4 DAC L", "IF4 DAC L" }, 3641 { "DAC2 L Mux", "IF4 DAC L", "IF4 DAC L" },
3642 { "DAC2 L Mux", "SLB DAC 2", "SLB DAC2" }, 3642 { "DAC2 L Mux", "SLB DAC 2", "SLB DAC2" },
3643 { "DAC2 L Mux", "OB 2", "OutBound2" }, 3643 { "DAC2 L Mux", "OB 2", "OutBound2" },
3644 3644
3645 { "DAC2 R Mux", "IF1 DAC 3", "IF1 DAC3" }, 3645 { "DAC2 R Mux", "IF1 DAC 3", "IF1 DAC3 Mux" },
3646 { "DAC2 R Mux", "IF2 DAC 3", "IF2 DAC3" }, 3646 { "DAC2 R Mux", "IF2 DAC 3", "IF2 DAC3 Mux" },
3647 { "DAC2 R Mux", "IF3 DAC R", "IF3 DAC R" }, 3647 { "DAC2 R Mux", "IF3 DAC R", "IF3 DAC R" },
3648 { "DAC2 R Mux", "IF4 DAC R", "IF4 DAC R" }, 3648 { "DAC2 R Mux", "IF4 DAC R", "IF4 DAC R" },
3649 { "DAC2 R Mux", "SLB DAC 3", "SLB DAC3" }, 3649 { "DAC2 R Mux", "SLB DAC 3", "SLB DAC3" },
@@ -3651,29 +3651,29 @@ static const struct snd_soc_dapm_route rt5677_dapm_routes[] = {
3651 { "DAC2 R Mux", "Haptic Generator", "Haptic Generator" }, 3651 { "DAC2 R Mux", "Haptic Generator", "Haptic Generator" },
3652 { "DAC2 R Mux", "VAD ADC", "VAD ADC Mux" }, 3652 { "DAC2 R Mux", "VAD ADC", "VAD ADC Mux" },
3653 3653
3654 { "DAC3 L Mux", "IF1 DAC 4", "IF1 DAC4" }, 3654 { "DAC3 L Mux", "IF1 DAC 4", "IF1 DAC4 Mux" },
3655 { "DAC3 L Mux", "IF2 DAC 4", "IF2 DAC4" }, 3655 { "DAC3 L Mux", "IF2 DAC 4", "IF2 DAC4 Mux" },
3656 { "DAC3 L Mux", "IF3 DAC L", "IF3 DAC L" }, 3656 { "DAC3 L Mux", "IF3 DAC L", "IF3 DAC L" },
3657 { "DAC3 L Mux", "IF4 DAC L", "IF4 DAC L" }, 3657 { "DAC3 L Mux", "IF4 DAC L", "IF4 DAC L" },
3658 { "DAC3 L Mux", "SLB DAC 4", "SLB DAC4" }, 3658 { "DAC3 L Mux", "SLB DAC 4", "SLB DAC4" },
3659 { "DAC3 L Mux", "OB 4", "OutBound4" }, 3659 { "DAC3 L Mux", "OB 4", "OutBound4" },
3660 3660
3661 { "DAC3 R Mux", "IF1 DAC 5", "IF1 DAC4" }, 3661 { "DAC3 R Mux", "IF1 DAC 5", "IF1 DAC5 Mux" },
3662 { "DAC3 R Mux", "IF2 DAC 5", "IF2 DAC4" }, 3662 { "DAC3 R Mux", "IF2 DAC 5", "IF2 DAC5 Mux" },
3663 { "DAC3 R Mux", "IF3 DAC R", "IF3 DAC R" }, 3663 { "DAC3 R Mux", "IF3 DAC R", "IF3 DAC R" },
3664 { "DAC3 R Mux", "IF4 DAC R", "IF4 DAC R" }, 3664 { "DAC3 R Mux", "IF4 DAC R", "IF4 DAC R" },
3665 { "DAC3 R Mux", "SLB DAC 5", "SLB DAC5" }, 3665 { "DAC3 R Mux", "SLB DAC 5", "SLB DAC5" },
3666 { "DAC3 R Mux", "OB 5", "OutBound5" }, 3666 { "DAC3 R Mux", "OB 5", "OutBound5" },
3667 3667
3668 { "DAC4 L Mux", "IF1 DAC 6", "IF1 DAC6" }, 3668 { "DAC4 L Mux", "IF1 DAC 6", "IF1 DAC6 Mux" },
3669 { "DAC4 L Mux", "IF2 DAC 6", "IF2 DAC6" }, 3669 { "DAC4 L Mux", "IF2 DAC 6", "IF2 DAC6 Mux" },
3670 { "DAC4 L Mux", "IF3 DAC L", "IF3 DAC L" }, 3670 { "DAC4 L Mux", "IF3 DAC L", "IF3 DAC L" },
3671 { "DAC4 L Mux", "IF4 DAC L", "IF4 DAC L" }, 3671 { "DAC4 L Mux", "IF4 DAC L", "IF4 DAC L" },
3672 { "DAC4 L Mux", "SLB DAC 6", "SLB DAC6" }, 3672 { "DAC4 L Mux", "SLB DAC 6", "SLB DAC6" },
3673 { "DAC4 L Mux", "OB 6", "OutBound6" }, 3673 { "DAC4 L Mux", "OB 6", "OutBound6" },
3674 3674
3675 { "DAC4 R Mux", "IF1 DAC 7", "IF1 DAC7" }, 3675 { "DAC4 R Mux", "IF1 DAC 7", "IF1 DAC7 Mux" },
3676 { "DAC4 R Mux", "IF2 DAC 7", "IF2 DAC7" }, 3676 { "DAC4 R Mux", "IF2 DAC 7", "IF2 DAC7 Mux" },
3677 { "DAC4 R Mux", "IF3 DAC R", "IF3 DAC R" }, 3677 { "DAC4 R Mux", "IF3 DAC R", "IF3 DAC R" },
3678 { "DAC4 R Mux", "IF4 DAC R", "IF4 DAC R" }, 3678 { "DAC4 R Mux", "IF4 DAC R", "IF4 DAC R" },
3679 { "DAC4 R Mux", "SLB DAC 7", "SLB DAC7" }, 3679 { "DAC4 R Mux", "SLB DAC 7", "SLB DAC7" },
diff --git a/sound/soc/codecs/sgtl5000.c b/sound/soc/codecs/sgtl5000.c
index e182e6569bbd..3593a1496056 100644
--- a/sound/soc/codecs/sgtl5000.c
+++ b/sound/soc/codecs/sgtl5000.c
@@ -1151,13 +1151,7 @@ static int sgtl5000_set_power_regs(struct snd_soc_codec *codec)
1151 /* Enable VDDC charge pump */ 1151 /* Enable VDDC charge pump */
1152 ana_pwr |= SGTL5000_VDDC_CHRGPMP_POWERUP; 1152 ana_pwr |= SGTL5000_VDDC_CHRGPMP_POWERUP;
1153 } else if (vddio >= 3100 && vdda >= 3100) { 1153 } else if (vddio >= 3100 && vdda >= 3100) {
1154 /* 1154 ana_pwr &= ~SGTL5000_VDDC_CHRGPMP_POWERUP;
1155 * if vddio and vddd > 3.1v,
1156 * charge pump should be clean before set ana_pwr
1157 */
1158 snd_soc_update_bits(codec, SGTL5000_CHIP_ANA_POWER,
1159 SGTL5000_VDDC_CHRGPMP_POWERUP, 0);
1160
1161 /* VDDC use VDDIO rail */ 1155 /* VDDC use VDDIO rail */
1162 lreg_ctrl |= SGTL5000_VDDC_ASSN_OVRD; 1156 lreg_ctrl |= SGTL5000_VDDC_ASSN_OVRD;
1163 lreg_ctrl |= SGTL5000_VDDC_MAN_ASSN_VDDIO << 1157 lreg_ctrl |= SGTL5000_VDDC_MAN_ASSN_VDDIO <<
diff --git a/sound/soc/codecs/sn95031.c b/sound/soc/codecs/sn95031.c
index 47b257e41809..82095d6cd070 100644
--- a/sound/soc/codecs/sn95031.c
+++ b/sound/soc/codecs/sn95031.c
@@ -538,8 +538,8 @@ static const struct snd_soc_dapm_route sn95031_audio_map[] = {
538 /* speaker map */ 538 /* speaker map */
539 { "IHFOUTL", NULL, "Speaker Rail"}, 539 { "IHFOUTL", NULL, "Speaker Rail"},
540 { "IHFOUTR", NULL, "Speaker Rail"}, 540 { "IHFOUTR", NULL, "Speaker Rail"},
541 { "IHFOUTL", "NULL", "Speaker Left Playback"}, 541 { "IHFOUTL", NULL, "Speaker Left Playback"},
542 { "IHFOUTR", "NULL", "Speaker Right Playback"}, 542 { "IHFOUTR", NULL, "Speaker Right Playback"},
543 { "Speaker Left Playback", NULL, "Speaker Left Filter"}, 543 { "Speaker Left Playback", NULL, "Speaker Left Filter"},
544 { "Speaker Right Playback", NULL, "Speaker Right Filter"}, 544 { "Speaker Right Playback", NULL, "Speaker Right Filter"},
545 { "Speaker Left Filter", NULL, "IHFDAC Left"}, 545 { "Speaker Left Filter", NULL, "IHFDAC Left"},
diff --git a/sound/soc/codecs/sta32x.c b/sound/soc/codecs/sta32x.c
index 3a1343fa109b..007a0e3bc273 100644
--- a/sound/soc/codecs/sta32x.c
+++ b/sound/soc/codecs/sta32x.c
@@ -106,13 +106,11 @@ static const struct reg_default sta32x_regs[] = {
106}; 106};
107 107
108static const struct regmap_range sta32x_write_regs_range[] = { 108static const struct regmap_range sta32x_write_regs_range[] = {
109 regmap_reg_range(STA32X_CONFA, STA32X_AUTO2), 109 regmap_reg_range(STA32X_CONFA, STA32X_FDRC2),
110 regmap_reg_range(STA32X_C1CFG, STA32X_FDRC2),
111}; 110};
112 111
113static const struct regmap_range sta32x_read_regs_range[] = { 112static const struct regmap_range sta32x_read_regs_range[] = {
114 regmap_reg_range(STA32X_CONFA, STA32X_AUTO2), 113 regmap_reg_range(STA32X_CONFA, STA32X_FDRC2),
115 regmap_reg_range(STA32X_C1CFG, STA32X_FDRC2),
116}; 114};
117 115
118static const struct regmap_range sta32x_volatile_regs_range[] = { 116static const struct regmap_range sta32x_volatile_regs_range[] = {
diff --git a/sound/soc/codecs/tas5086.c b/sound/soc/codecs/tas5086.c
index 249ef5c4c762..32942bed34b1 100644
--- a/sound/soc/codecs/tas5086.c
+++ b/sound/soc/codecs/tas5086.c
@@ -281,7 +281,7 @@ static int tas5086_get_deemph(struct snd_kcontrol *kcontrol,
281 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 281 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
282 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); 282 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
283 283
284 ucontrol->value.enumerated.item[0] = priv->deemph; 284 ucontrol->value.integer.value[0] = priv->deemph;
285 285
286 return 0; 286 return 0;
287} 287}
@@ -292,7 +292,7 @@ static int tas5086_put_deemph(struct snd_kcontrol *kcontrol,
292 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 292 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
293 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec); 293 struct tas5086_private *priv = snd_soc_codec_get_drvdata(codec);
294 294
295 priv->deemph = ucontrol->value.enumerated.item[0]; 295 priv->deemph = ucontrol->value.integer.value[0];
296 296
297 return tas5086_set_deemph(codec); 297 return tas5086_set_deemph(codec);
298} 298}
diff --git a/sound/soc/codecs/wm2000.c b/sound/soc/codecs/wm2000.c
index 8d9de49a5052..21d5402e343f 100644
--- a/sound/soc/codecs/wm2000.c
+++ b/sound/soc/codecs/wm2000.c
@@ -610,7 +610,7 @@ static int wm2000_anc_mode_get(struct snd_kcontrol *kcontrol,
610 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 610 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
611 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev); 611 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev);
612 612
613 ucontrol->value.enumerated.item[0] = wm2000->anc_active; 613 ucontrol->value.integer.value[0] = wm2000->anc_active;
614 614
615 return 0; 615 return 0;
616} 616}
@@ -620,7 +620,7 @@ static int wm2000_anc_mode_put(struct snd_kcontrol *kcontrol,
620{ 620{
621 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 621 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
622 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev); 622 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev);
623 int anc_active = ucontrol->value.enumerated.item[0]; 623 int anc_active = ucontrol->value.integer.value[0];
624 int ret; 624 int ret;
625 625
626 if (anc_active > 1) 626 if (anc_active > 1)
@@ -643,7 +643,7 @@ static int wm2000_speaker_get(struct snd_kcontrol *kcontrol,
643 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 643 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
644 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev); 644 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev);
645 645
646 ucontrol->value.enumerated.item[0] = wm2000->spk_ena; 646 ucontrol->value.integer.value[0] = wm2000->spk_ena;
647 647
648 return 0; 648 return 0;
649} 649}
@@ -653,7 +653,7 @@ static int wm2000_speaker_put(struct snd_kcontrol *kcontrol,
653{ 653{
654 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 654 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
655 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev); 655 struct wm2000_priv *wm2000 = dev_get_drvdata(codec->dev);
656 int val = ucontrol->value.enumerated.item[0]; 656 int val = ucontrol->value.integer.value[0];
657 int ret; 657 int ret;
658 658
659 if (val > 1) 659 if (val > 1)
diff --git a/sound/soc/codecs/wm8731.c b/sound/soc/codecs/wm8731.c
index 098c143f44d6..c6d10533e2bd 100644
--- a/sound/soc/codecs/wm8731.c
+++ b/sound/soc/codecs/wm8731.c
@@ -125,7 +125,7 @@ static int wm8731_get_deemph(struct snd_kcontrol *kcontrol,
125 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 125 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
126 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec); 126 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
127 127
128 ucontrol->value.enumerated.item[0] = wm8731->deemph; 128 ucontrol->value.integer.value[0] = wm8731->deemph;
129 129
130 return 0; 130 return 0;
131} 131}
@@ -135,7 +135,7 @@ static int wm8731_put_deemph(struct snd_kcontrol *kcontrol,
135{ 135{
136 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 136 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
137 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec); 137 struct wm8731_priv *wm8731 = snd_soc_codec_get_drvdata(codec);
138 int deemph = ucontrol->value.enumerated.item[0]; 138 int deemph = ucontrol->value.integer.value[0];
139 int ret = 0; 139 int ret = 0;
140 140
141 if (deemph > 1) 141 if (deemph > 1)
diff --git a/sound/soc/codecs/wm8903.c b/sound/soc/codecs/wm8903.c
index dde462c082be..04b04f8e147c 100644
--- a/sound/soc/codecs/wm8903.c
+++ b/sound/soc/codecs/wm8903.c
@@ -442,7 +442,7 @@ static int wm8903_get_deemph(struct snd_kcontrol *kcontrol,
442 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 442 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
443 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec); 443 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
444 444
445 ucontrol->value.enumerated.item[0] = wm8903->deemph; 445 ucontrol->value.integer.value[0] = wm8903->deemph;
446 446
447 return 0; 447 return 0;
448} 448}
@@ -452,7 +452,7 @@ static int wm8903_put_deemph(struct snd_kcontrol *kcontrol,
452{ 452{
453 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 453 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
454 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec); 454 struct wm8903_priv *wm8903 = snd_soc_codec_get_drvdata(codec);
455 int deemph = ucontrol->value.enumerated.item[0]; 455 int deemph = ucontrol->value.integer.value[0];
456 int ret = 0; 456 int ret = 0;
457 457
458 if (deemph > 1) 458 if (deemph > 1)
diff --git a/sound/soc/codecs/wm8904.c b/sound/soc/codecs/wm8904.c
index d3b3f57668cc..215e93c1ddf0 100644
--- a/sound/soc/codecs/wm8904.c
+++ b/sound/soc/codecs/wm8904.c
@@ -525,7 +525,7 @@ static int wm8904_get_deemph(struct snd_kcontrol *kcontrol,
525 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 525 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
526 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 526 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
527 527
528 ucontrol->value.enumerated.item[0] = wm8904->deemph; 528 ucontrol->value.integer.value[0] = wm8904->deemph;
529 return 0; 529 return 0;
530} 530}
531 531
@@ -534,7 +534,7 @@ static int wm8904_put_deemph(struct snd_kcontrol *kcontrol,
534{ 534{
535 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 535 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
536 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec); 536 struct wm8904_priv *wm8904 = snd_soc_codec_get_drvdata(codec);
537 int deemph = ucontrol->value.enumerated.item[0]; 537 int deemph = ucontrol->value.integer.value[0];
538 538
539 if (deemph > 1) 539 if (deemph > 1)
540 return -EINVAL; 540 return -EINVAL;
diff --git a/sound/soc/codecs/wm8955.c b/sound/soc/codecs/wm8955.c
index 1ab2d462afad..00bec915d652 100644
--- a/sound/soc/codecs/wm8955.c
+++ b/sound/soc/codecs/wm8955.c
@@ -393,7 +393,7 @@ static int wm8955_get_deemph(struct snd_kcontrol *kcontrol,
393 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 393 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
394 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec); 394 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
395 395
396 ucontrol->value.enumerated.item[0] = wm8955->deemph; 396 ucontrol->value.integer.value[0] = wm8955->deemph;
397 return 0; 397 return 0;
398} 398}
399 399
@@ -402,7 +402,7 @@ static int wm8955_put_deemph(struct snd_kcontrol *kcontrol,
402{ 402{
403 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 403 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
404 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec); 404 struct wm8955_priv *wm8955 = snd_soc_codec_get_drvdata(codec);
405 int deemph = ucontrol->value.enumerated.item[0]; 405 int deemph = ucontrol->value.integer.value[0];
406 406
407 if (deemph > 1) 407 if (deemph > 1)
408 return -EINVAL; 408 return -EINVAL;
diff --git a/sound/soc/codecs/wm8960.c b/sound/soc/codecs/wm8960.c
index cf8fecf97f2c..3035d9856415 100644
--- a/sound/soc/codecs/wm8960.c
+++ b/sound/soc/codecs/wm8960.c
@@ -184,7 +184,7 @@ static int wm8960_get_deemph(struct snd_kcontrol *kcontrol,
184 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 184 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
185 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); 185 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
186 186
187 ucontrol->value.enumerated.item[0] = wm8960->deemph; 187 ucontrol->value.integer.value[0] = wm8960->deemph;
188 return 0; 188 return 0;
189} 189}
190 190
@@ -193,7 +193,7 @@ static int wm8960_put_deemph(struct snd_kcontrol *kcontrol,
193{ 193{
194 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol); 194 struct snd_soc_codec *codec = snd_soc_kcontrol_codec(kcontrol);
195 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec); 195 struct wm8960_priv *wm8960 = snd_soc_codec_get_drvdata(codec);
196 int deemph = ucontrol->value.enumerated.item[0]; 196 int deemph = ucontrol->value.integer.value[0];
197 197
198 if (deemph > 1) 198 if (deemph > 1)
199 return -EINVAL; 199 return -EINVAL;
diff --git a/sound/soc/codecs/wm9712.c b/sound/soc/codecs/wm9712.c
index 9517571e820d..98c9525bd751 100644
--- a/sound/soc/codecs/wm9712.c
+++ b/sound/soc/codecs/wm9712.c
@@ -180,7 +180,7 @@ static int wm9712_hp_mixer_put(struct snd_kcontrol *kcontrol,
180 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol); 180 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
181 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm); 181 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm);
182 struct wm9712_priv *wm9712 = snd_soc_codec_get_drvdata(codec); 182 struct wm9712_priv *wm9712 = snd_soc_codec_get_drvdata(codec);
183 unsigned int val = ucontrol->value.enumerated.item[0]; 183 unsigned int val = ucontrol->value.integer.value[0];
184 struct soc_mixer_control *mc = 184 struct soc_mixer_control *mc =
185 (struct soc_mixer_control *)kcontrol->private_value; 185 (struct soc_mixer_control *)kcontrol->private_value;
186 unsigned int mixer, mask, shift, old; 186 unsigned int mixer, mask, shift, old;
@@ -193,7 +193,7 @@ static int wm9712_hp_mixer_put(struct snd_kcontrol *kcontrol,
193 193
194 mutex_lock(&wm9712->lock); 194 mutex_lock(&wm9712->lock);
195 old = wm9712->hp_mixer[mixer]; 195 old = wm9712->hp_mixer[mixer];
196 if (ucontrol->value.enumerated.item[0]) 196 if (ucontrol->value.integer.value[0])
197 wm9712->hp_mixer[mixer] |= mask; 197 wm9712->hp_mixer[mixer] |= mask;
198 else 198 else
199 wm9712->hp_mixer[mixer] &= ~mask; 199 wm9712->hp_mixer[mixer] &= ~mask;
@@ -231,7 +231,7 @@ static int wm9712_hp_mixer_get(struct snd_kcontrol *kcontrol,
231 mixer = mc->shift >> 8; 231 mixer = mc->shift >> 8;
232 shift = mc->shift & 0xff; 232 shift = mc->shift & 0xff;
233 233
234 ucontrol->value.enumerated.item[0] = 234 ucontrol->value.integer.value[0] =
235 (wm9712->hp_mixer[mixer] >> shift) & 1; 235 (wm9712->hp_mixer[mixer] >> shift) & 1;
236 236
237 return 0; 237 return 0;
diff --git a/sound/soc/codecs/wm9713.c b/sound/soc/codecs/wm9713.c
index 68222917b396..79552953e1bd 100644
--- a/sound/soc/codecs/wm9713.c
+++ b/sound/soc/codecs/wm9713.c
@@ -255,7 +255,7 @@ static int wm9713_hp_mixer_put(struct snd_kcontrol *kcontrol,
255 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol); 255 struct snd_soc_dapm_context *dapm = snd_soc_dapm_kcontrol_dapm(kcontrol);
256 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm); 256 struct snd_soc_codec *codec = snd_soc_dapm_to_codec(dapm);
257 struct wm9713_priv *wm9713 = snd_soc_codec_get_drvdata(codec); 257 struct wm9713_priv *wm9713 = snd_soc_codec_get_drvdata(codec);
258 unsigned int val = ucontrol->value.enumerated.item[0]; 258 unsigned int val = ucontrol->value.integer.value[0];
259 struct soc_mixer_control *mc = 259 struct soc_mixer_control *mc =
260 (struct soc_mixer_control *)kcontrol->private_value; 260 (struct soc_mixer_control *)kcontrol->private_value;
261 unsigned int mixer, mask, shift, old; 261 unsigned int mixer, mask, shift, old;
@@ -268,7 +268,7 @@ static int wm9713_hp_mixer_put(struct snd_kcontrol *kcontrol,
268 268
269 mutex_lock(&wm9713->lock); 269 mutex_lock(&wm9713->lock);
270 old = wm9713->hp_mixer[mixer]; 270 old = wm9713->hp_mixer[mixer];
271 if (ucontrol->value.enumerated.item[0]) 271 if (ucontrol->value.integer.value[0])
272 wm9713->hp_mixer[mixer] |= mask; 272 wm9713->hp_mixer[mixer] |= mask;
273 else 273 else
274 wm9713->hp_mixer[mixer] &= ~mask; 274 wm9713->hp_mixer[mixer] &= ~mask;
@@ -306,7 +306,7 @@ static int wm9713_hp_mixer_get(struct snd_kcontrol *kcontrol,
306 mixer = mc->shift >> 8; 306 mixer = mc->shift >> 8;
307 shift = mc->shift & 0xff; 307 shift = mc->shift & 0xff;
308 308
309 ucontrol->value.enumerated.item[0] = 309 ucontrol->value.integer.value[0] =
310 (wm9713->hp_mixer[mixer] >> shift) & 1; 310 (wm9713->hp_mixer[mixer] >> shift) & 1;
311 311
312 return 0; 312 return 0;
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c
index 75870c0ea2c9..91eb3aef7f02 100644
--- a/sound/soc/fsl/fsl_spdif.c
+++ b/sound/soc/fsl/fsl_spdif.c
@@ -1049,7 +1049,7 @@ static u32 fsl_spdif_txclk_caldiv(struct fsl_spdif_priv *spdif_priv,
1049 enum spdif_txrate index, bool round) 1049 enum spdif_txrate index, bool round)
1050{ 1050{
1051 const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 }; 1051 const u32 rate[] = { 32000, 44100, 48000, 96000, 192000 };
1052 bool is_sysclk = clk == spdif_priv->sysclk; 1052 bool is_sysclk = clk_is_match(clk, spdif_priv->sysclk);
1053 u64 rate_ideal, rate_actual, sub; 1053 u64 rate_ideal, rate_actual, sub;
1054 u32 sysclk_dfmin, sysclk_dfmax; 1054 u32 sysclk_dfmin, sysclk_dfmax;
1055 u32 txclk_df, sysclk_df, arate; 1055 u32 txclk_df, sysclk_df, arate;
@@ -1143,7 +1143,7 @@ static int fsl_spdif_probe_txclk(struct fsl_spdif_priv *spdif_priv,
1143 spdif_priv->txclk_src[index], rate[index]); 1143 spdif_priv->txclk_src[index], rate[index]);
1144 dev_dbg(&pdev->dev, "use txclk df %d for %dHz sample rate\n", 1144 dev_dbg(&pdev->dev, "use txclk df %d for %dHz sample rate\n",
1145 spdif_priv->txclk_df[index], rate[index]); 1145 spdif_priv->txclk_df[index], rate[index]);
1146 if (spdif_priv->txclk[index] == spdif_priv->sysclk) 1146 if (clk_is_match(spdif_priv->txclk[index], spdif_priv->sysclk))
1147 dev_dbg(&pdev->dev, "use sysclk df %d for %dHz sample rate\n", 1147 dev_dbg(&pdev->dev, "use sysclk df %d for %dHz sample rate\n",
1148 spdif_priv->sysclk_df[index], rate[index]); 1148 spdif_priv->sysclk_df[index], rate[index]);
1149 dev_dbg(&pdev->dev, "the best rate for %dHz sample rate is %dHz\n", 1149 dev_dbg(&pdev->dev, "the best rate for %dHz sample rate is %dHz\n",
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c
index 2595611e8a6d..6b0c8f717ec2 100644
--- a/sound/soc/fsl/fsl_ssi.c
+++ b/sound/soc/fsl/fsl_ssi.c
@@ -603,17 +603,20 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream *substream,
603 factor = (div2 + 1) * (7 * psr + 1) * 2; 603 factor = (div2 + 1) * (7 * psr + 1) * 2;
604 604
605 for (i = 0; i < 255; i++) { 605 for (i = 0; i < 255; i++) {
606 /* The bclk rate must be smaller than 1/5 sysclk rate */ 606 tmprate = freq * factor * (i + 1);
607 if (factor * (i + 1) < 5)
608 continue;
609
610 tmprate = freq * factor * (i + 2);
611 607
612 if (baudclk_is_used) 608 if (baudclk_is_used)
613 clkrate = clk_get_rate(ssi_private->baudclk); 609 clkrate = clk_get_rate(ssi_private->baudclk);
614 else 610 else
615 clkrate = clk_round_rate(ssi_private->baudclk, tmprate); 611 clkrate = clk_round_rate(ssi_private->baudclk, tmprate);
616 612
613 /*
614 * Hardware limitation: The bclk rate must be
615 * never greater than 1/5 IPG clock rate
616 */
617 if (clkrate * 5 > clk_get_rate(ssi_private->clk))
618 continue;
619
617 clkrate /= factor; 620 clkrate /= factor;
618 afreq = clkrate / (i + 1); 621 afreq = clkrate / (i + 1);
619 622
@@ -1224,7 +1227,7 @@ static int fsl_ssi_imx_probe(struct platform_device *pdev,
1224 ssi_private->dma_params_tx.addr = ssi_private->ssi_phys + CCSR_SSI_STX0; 1227 ssi_private->dma_params_tx.addr = ssi_private->ssi_phys + CCSR_SSI_STX0;
1225 ssi_private->dma_params_rx.addr = ssi_private->ssi_phys + CCSR_SSI_SRX0; 1228 ssi_private->dma_params_rx.addr = ssi_private->ssi_phys + CCSR_SSI_SRX0;
1226 1229
1227 ret = !of_property_read_u32_array(np, "dmas", dmas, 4); 1230 ret = of_property_read_u32_array(np, "dmas", dmas, 4);
1228 if (ssi_private->use_dma && !ret && dmas[2] == IMX_DMATYPE_SSI_DUAL) { 1231 if (ssi_private->use_dma && !ret && dmas[2] == IMX_DMATYPE_SSI_DUAL) {
1229 ssi_private->use_dual_fifo = true; 1232 ssi_private->use_dual_fifo = true;
1230 /* When using dual fifo mode, we need to keep watermark 1233 /* When using dual fifo mode, we need to keep watermark
diff --git a/sound/soc/generic/simple-card.c b/sound/soc/generic/simple-card.c
index f7c6734bd5da..fb550b5869d2 100644
--- a/sound/soc/generic/simple-card.c
+++ b/sound/soc/generic/simple-card.c
@@ -372,6 +372,11 @@ static int asoc_simple_card_dai_link_of(struct device_node *node,
372 strlen(dai_link->cpu_dai_name) + 372 strlen(dai_link->cpu_dai_name) +
373 strlen(dai_link->codec_dai_name) + 2, 373 strlen(dai_link->codec_dai_name) + 2,
374 GFP_KERNEL); 374 GFP_KERNEL);
375 if (!name) {
376 ret = -ENOMEM;
377 goto dai_link_of_err;
378 }
379
375 sprintf(name, "%s-%s", dai_link->cpu_dai_name, 380 sprintf(name, "%s-%s", dai_link->cpu_dai_name,
376 dai_link->codec_dai_name); 381 dai_link->codec_dai_name);
377 dai_link->name = dai_link->stream_name = name; 382 dai_link->name = dai_link->stream_name = name;
diff --git a/sound/soc/intel/sst-atom-controls.h b/sound/soc/intel/sst-atom-controls.h
index dfebfdd5eb2a..daecc58f28af 100644
--- a/sound/soc/intel/sst-atom-controls.h
+++ b/sound/soc/intel/sst-atom-controls.h
@@ -150,7 +150,7 @@ enum sst_cmd_type {
150 150
151enum sst_task { 151enum sst_task {
152 SST_TASK_SBA = 1, 152 SST_TASK_SBA = 1,
153 SST_TASK_MMX, 153 SST_TASK_MMX = 3,
154}; 154};
155 155
156enum sst_type { 156enum sst_type {
diff --git a/sound/soc/intel/sst-haswell-dsp.c b/sound/soc/intel/sst-haswell-dsp.c
index c42ffae5fe9f..402b728c0a06 100644
--- a/sound/soc/intel/sst-haswell-dsp.c
+++ b/sound/soc/intel/sst-haswell-dsp.c
@@ -207,9 +207,6 @@ static int hsw_parse_fw_image(struct sst_fw *sst_fw)
207 module = (void *)module + sizeof(*module) + module->mod_size; 207 module = (void *)module + sizeof(*module) + module->mod_size;
208 } 208 }
209 209
210 /* allocate scratch mem regions */
211 sst_block_alloc_scratch(dsp);
212
213 return 0; 210 return 0;
214} 211}
215 212
diff --git a/sound/soc/intel/sst-haswell-ipc.c b/sound/soc/intel/sst-haswell-ipc.c
index 394af5684c05..863a9ca34b8e 100644
--- a/sound/soc/intel/sst-haswell-ipc.c
+++ b/sound/soc/intel/sst-haswell-ipc.c
@@ -1732,6 +1732,7 @@ static void sst_hsw_drop_all(struct sst_hsw *hsw)
1732int sst_hsw_dsp_load(struct sst_hsw *hsw) 1732int sst_hsw_dsp_load(struct sst_hsw *hsw)
1733{ 1733{
1734 struct sst_dsp *dsp = hsw->dsp; 1734 struct sst_dsp *dsp = hsw->dsp;
1735 struct sst_fw *sst_fw, *t;
1735 int ret; 1736 int ret;
1736 1737
1737 dev_dbg(hsw->dev, "loading audio DSP...."); 1738 dev_dbg(hsw->dev, "loading audio DSP....");
@@ -1748,12 +1749,17 @@ int sst_hsw_dsp_load(struct sst_hsw *hsw)
1748 return ret; 1749 return ret;
1749 } 1750 }
1750 1751
1751 ret = sst_fw_reload(hsw->sst_fw); 1752 list_for_each_entry_safe_reverse(sst_fw, t, &dsp->fw_list, list) {
1752 if (ret < 0) { 1753 ret = sst_fw_reload(sst_fw);
1753 dev_err(hsw->dev, "error: SST FW reload failed\n"); 1754 if (ret < 0) {
1754 sst_dsp_dma_put_channel(dsp); 1755 dev_err(hsw->dev, "error: SST FW reload failed\n");
1755 return -ENOMEM; 1756 sst_dsp_dma_put_channel(dsp);
1757 return -ENOMEM;
1758 }
1756 } 1759 }
1760 ret = sst_block_alloc_scratch(hsw->dsp);
1761 if (ret < 0)
1762 return -EINVAL;
1757 1763
1758 sst_dsp_dma_put_channel(dsp); 1764 sst_dsp_dma_put_channel(dsp);
1759 return 0; 1765 return 0;
@@ -1809,12 +1815,17 @@ int sst_hsw_dsp_runtime_suspend(struct sst_hsw *hsw)
1809 1815
1810int sst_hsw_dsp_runtime_sleep(struct sst_hsw *hsw) 1816int sst_hsw_dsp_runtime_sleep(struct sst_hsw *hsw)
1811{ 1817{
1812 sst_fw_unload(hsw->sst_fw); 1818 struct sst_fw *sst_fw, *t;
1813 sst_block_free_scratch(hsw->dsp); 1819 struct sst_dsp *dsp = hsw->dsp;
1820
1821 list_for_each_entry_safe(sst_fw, t, &dsp->fw_list, list) {
1822 sst_fw_unload(sst_fw);
1823 }
1824 sst_block_free_scratch(dsp);
1814 1825
1815 hsw->boot_complete = false; 1826 hsw->boot_complete = false;
1816 1827
1817 sst_dsp_sleep(hsw->dsp); 1828 sst_dsp_sleep(dsp);
1818 1829
1819 return 0; 1830 return 0;
1820} 1831}
@@ -1943,6 +1954,11 @@ int sst_hsw_dsp_init(struct device *dev, struct sst_pdata *pdata)
1943 goto fw_err; 1954 goto fw_err;
1944 } 1955 }
1945 1956
1957 /* allocate scratch mem regions */
1958 ret = sst_block_alloc_scratch(hsw->dsp);
1959 if (ret < 0)
1960 goto boot_err;
1961
1946 /* wait for DSP boot completion */ 1962 /* wait for DSP boot completion */
1947 sst_dsp_boot(hsw->dsp); 1963 sst_dsp_boot(hsw->dsp);
1948 ret = wait_event_timeout(hsw->boot_wait, hsw->boot_complete, 1964 ret = wait_event_timeout(hsw->boot_wait, hsw->boot_complete,
diff --git a/sound/soc/intel/sst-haswell-pcm.c b/sound/soc/intel/sst-haswell-pcm.c
index d6fa9d5514e1..7e21e8f85885 100644
--- a/sound/soc/intel/sst-haswell-pcm.c
+++ b/sound/soc/intel/sst-haswell-pcm.c
@@ -91,7 +91,8 @@ static const struct snd_pcm_hardware hsw_pcm_hardware = {
91 SNDRV_PCM_INFO_INTERLEAVED | 91 SNDRV_PCM_INFO_INTERLEAVED |
92 SNDRV_PCM_INFO_PAUSE | 92 SNDRV_PCM_INFO_PAUSE |
93 SNDRV_PCM_INFO_RESUME | 93 SNDRV_PCM_INFO_RESUME |
94 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP, 94 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP |
95 SNDRV_PCM_INFO_DRAIN_TRIGGER,
95 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE | 96 .formats = SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE |
96 SNDRV_PCM_FMTBIT_S32_LE, 97 SNDRV_PCM_FMTBIT_S32_LE,
97 .period_bytes_min = PAGE_SIZE, 98 .period_bytes_min = PAGE_SIZE,
diff --git a/sound/soc/intel/sst/sst.c b/sound/soc/intel/sst/sst.c
index 8a8d56a146e7..11c578651c1c 100644
--- a/sound/soc/intel/sst/sst.c
+++ b/sound/soc/intel/sst/sst.c
@@ -350,7 +350,9 @@ static inline void sst_save_shim64(struct intel_sst_drv *ctx,
350 350
351 spin_lock_irqsave(&ctx->ipc_spin_lock, irq_flags); 351 spin_lock_irqsave(&ctx->ipc_spin_lock, irq_flags);
352 352
353 shim_regs->imrx = sst_shim_read64(shim, SST_IMRX), 353 shim_regs->imrx = sst_shim_read64(shim, SST_IMRX);
354 shim_regs->csr = sst_shim_read64(shim, SST_CSR);
355
354 356
355 spin_unlock_irqrestore(&ctx->ipc_spin_lock, irq_flags); 357 spin_unlock_irqrestore(&ctx->ipc_spin_lock, irq_flags);
356} 358}
@@ -367,6 +369,7 @@ static inline void sst_restore_shim64(struct intel_sst_drv *ctx,
367 */ 369 */
368 spin_lock_irqsave(&ctx->ipc_spin_lock, irq_flags); 370 spin_lock_irqsave(&ctx->ipc_spin_lock, irq_flags);
369 sst_shim_write64(shim, SST_IMRX, shim_regs->imrx), 371 sst_shim_write64(shim, SST_IMRX, shim_regs->imrx),
372 sst_shim_write64(shim, SST_CSR, shim_regs->csr),
370 spin_unlock_irqrestore(&ctx->ipc_spin_lock, irq_flags); 373 spin_unlock_irqrestore(&ctx->ipc_spin_lock, irq_flags);
371} 374}
372 375
@@ -379,6 +382,10 @@ void sst_configure_runtime_pm(struct intel_sst_drv *ctx)
379 * initially active. So change the state to active before 382 * initially active. So change the state to active before
380 * enabling the pm 383 * enabling the pm
381 */ 384 */
385
386 if (!acpi_disabled)
387 pm_runtime_set_active(ctx->dev);
388
382 pm_runtime_enable(ctx->dev); 389 pm_runtime_enable(ctx->dev);
383 390
384 if (acpi_disabled) 391 if (acpi_disabled)
@@ -409,6 +416,7 @@ static int intel_sst_runtime_suspend(struct device *dev)
409 synchronize_irq(ctx->irq_num); 416 synchronize_irq(ctx->irq_num);
410 flush_workqueue(ctx->post_msg_wq); 417 flush_workqueue(ctx->post_msg_wq);
411 418
419 ctx->ops->reset(ctx);
412 /* save the shim registers because PMC doesn't save state */ 420 /* save the shim registers because PMC doesn't save state */
413 sst_save_shim64(ctx, ctx->shim, ctx->shim_regs64); 421 sst_save_shim64(ctx, ctx->shim, ctx->shim_regs64);
414 422
diff --git a/sound/soc/kirkwood/kirkwood-i2s.c b/sound/soc/kirkwood/kirkwood-i2s.c
index def7d8260c4e..d19483081f9b 100644
--- a/sound/soc/kirkwood/kirkwood-i2s.c
+++ b/sound/soc/kirkwood/kirkwood-i2s.c
@@ -579,7 +579,7 @@ static int kirkwood_i2s_dev_probe(struct platform_device *pdev)
579 if (PTR_ERR(priv->extclk) == -EPROBE_DEFER) 579 if (PTR_ERR(priv->extclk) == -EPROBE_DEFER)
580 return -EPROBE_DEFER; 580 return -EPROBE_DEFER;
581 } else { 581 } else {
582 if (priv->extclk == priv->clk) { 582 if (clk_is_match(priv->extclk, priv->clk)) {
583 devm_clk_put(&pdev->dev, priv->extclk); 583 devm_clk_put(&pdev->dev, priv->extclk);
584 priv->extclk = ERR_PTR(-EINVAL); 584 priv->extclk = ERR_PTR(-EINVAL);
585 } else { 585 } else {
diff --git a/sound/soc/omap/omap-hdmi-audio.c b/sound/soc/omap/omap-hdmi-audio.c
index ccfb41c22e53..f7eb42aa3f38 100644
--- a/sound/soc/omap/omap-hdmi-audio.c
+++ b/sound/soc/omap/omap-hdmi-audio.c
@@ -352,6 +352,9 @@ static int omap_hdmi_audio_probe(struct platform_device *pdev)
352 return ret; 352 return ret;
353 353
354 card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL); 354 card = devm_kzalloc(dev, sizeof(*card), GFP_KERNEL);
355 if (!card)
356 return -ENOMEM;
357
355 card->name = devm_kasprintf(dev, GFP_KERNEL, 358 card->name = devm_kasprintf(dev, GFP_KERNEL,
356 "HDMI %s", dev_name(ad->dssdev)); 359 "HDMI %s", dev_name(ad->dssdev));
357 card->owner = THIS_MODULE; 360 card->owner = THIS_MODULE;
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c
index c7eb9dd67f60..fd99d89de6a8 100644
--- a/sound/soc/omap/omap-mcbsp.c
+++ b/sound/soc/omap/omap-mcbsp.c
@@ -530,8 +530,19 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,
530 530
531 case OMAP_MCBSP_SYSCLK_CLKX_EXT: 531 case OMAP_MCBSP_SYSCLK_CLKX_EXT:
532 regs->srgr2 |= CLKSM; 532 regs->srgr2 |= CLKSM;
533 regs->pcr0 |= SCLKME;
534 /*
535 * If McBSP is master but yet the CLKX/CLKR pin drives the SRG,
536 * disable output on those pins. This enables to inject the
537 * reference clock through CLKX/CLKR. For this to work
538 * set_dai_sysclk() _needs_ to be called after set_dai_fmt().
539 */
540 regs->pcr0 &= ~CLKXM;
541 break;
533 case OMAP_MCBSP_SYSCLK_CLKR_EXT: 542 case OMAP_MCBSP_SYSCLK_CLKR_EXT:
534 regs->pcr0 |= SCLKME; 543 regs->pcr0 |= SCLKME;
544 /* Disable ouput on CLKR pin in master mode */
545 regs->pcr0 &= ~CLKRM;
535 break; 546 break;
536 default: 547 default:
537 err = -ENODEV; 548 err = -ENODEV;
diff --git a/sound/soc/omap/omap-pcm.c b/sound/soc/omap/omap-pcm.c
index f4b05bc23e4b..1343ecbf0bd5 100644
--- a/sound/soc/omap/omap-pcm.c
+++ b/sound/soc/omap/omap-pcm.c
@@ -201,7 +201,7 @@ static int omap_pcm_new(struct snd_soc_pcm_runtime *rtd)
201 struct snd_pcm *pcm = rtd->pcm; 201 struct snd_pcm *pcm = rtd->pcm;
202 int ret; 202 int ret;
203 203
204 ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(64)); 204 ret = dma_coerce_mask_and_coherent(card->dev, DMA_BIT_MASK(32));
205 if (ret) 205 if (ret)
206 return ret; 206 return ret;
207 207
diff --git a/sound/soc/samsung/Kconfig b/sound/soc/samsung/Kconfig
index 3cebf6ca03df..0632a36852c8 100644
--- a/sound/soc/samsung/Kconfig
+++ b/sound/soc/samsung/Kconfig
@@ -174,7 +174,7 @@ config SND_SOC_SMDK_WM8994_PCM
174 174
175config SND_SOC_SPEYSIDE 175config SND_SOC_SPEYSIDE
176 tristate "Audio support for Wolfson Speyside" 176 tristate "Audio support for Wolfson Speyside"
177 depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410 177 depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410 && I2C && SPI_MASTER
178 select SND_SAMSUNG_I2S 178 select SND_SAMSUNG_I2S
179 select SND_SOC_WM8996 179 select SND_SOC_WM8996
180 select SND_SOC_WM9081 180 select SND_SOC_WM9081
@@ -189,7 +189,7 @@ config SND_SOC_TOBERMORY
189 189
190config SND_SOC_BELLS 190config SND_SOC_BELLS
191 tristate "Audio support for Wolfson Bells" 191 tristate "Audio support for Wolfson Bells"
192 depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410 && MFD_ARIZONA 192 depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410 && MFD_ARIZONA && I2C && SPI_MASTER
193 select SND_SAMSUNG_I2S 193 select SND_SAMSUNG_I2S
194 select SND_SOC_WM5102 194 select SND_SOC_WM5102
195 select SND_SOC_WM5110 195 select SND_SOC_WM5110
@@ -206,7 +206,7 @@ config SND_SOC_LOWLAND
206 206
207config SND_SOC_LITTLEMILL 207config SND_SOC_LITTLEMILL
208 tristate "Audio support for Wolfson Littlemill" 208 tristate "Audio support for Wolfson Littlemill"
209 depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410 209 depends on SND_SOC_SAMSUNG && MACH_WLF_CRAGG_6410 && I2C
210 select SND_SAMSUNG_I2S 210 select SND_SAMSUNG_I2S
211 select MFD_WM8994 211 select MFD_WM8994
212 select SND_SOC_WM8994 212 select SND_SOC_WM8994
@@ -223,7 +223,7 @@ config SND_SOC_SNOW
223 223
224config SND_SOC_ODROIDX2 224config SND_SOC_ODROIDX2
225 tristate "Audio support for Odroid-X2 and Odroid-U3" 225 tristate "Audio support for Odroid-X2 and Odroid-U3"
226 depends on SND_SOC_SAMSUNG 226 depends on SND_SOC_SAMSUNG && I2C
227 select SND_SOC_MAX98090 227 select SND_SOC_MAX98090
228 select SND_SAMSUNG_I2S 228 select SND_SAMSUNG_I2S
229 help 229 help
@@ -231,6 +231,6 @@ config SND_SOC_ODROIDX2
231 231
232config SND_SOC_ARNDALE_RT5631_ALC5631 232config SND_SOC_ARNDALE_RT5631_ALC5631
233 tristate "Audio support for RT5631(ALC5631) on Arndale Board" 233 tristate "Audio support for RT5631(ALC5631) on Arndale Board"
234 depends on SND_SOC_SAMSUNG 234 depends on SND_SOC_SAMSUNG && I2C
235 select SND_SAMSUNG_I2S 235 select SND_SAMSUNG_I2S
236 select SND_SOC_RT5631 236 select SND_SOC_RT5631
diff --git a/sound/soc/sh/rcar/core.c b/sound/soc/sh/rcar/core.c
index 1b53605f7154..110577c52317 100644
--- a/sound/soc/sh/rcar/core.c
+++ b/sound/soc/sh/rcar/core.c
@@ -1252,6 +1252,8 @@ static int rsnd_probe(struct platform_device *pdev)
1252 goto exit_snd_probe; 1252 goto exit_snd_probe;
1253 } 1253 }
1254 1254
1255 dev_set_drvdata(dev, priv);
1256
1255 /* 1257 /*
1256 * asoc register 1258 * asoc register
1257 */ 1259 */
@@ -1268,8 +1270,6 @@ static int rsnd_probe(struct platform_device *pdev)
1268 goto exit_snd_soc; 1270 goto exit_snd_soc;
1269 } 1271 }
1270 1272
1271 dev_set_drvdata(dev, priv);
1272
1273 pm_runtime_enable(dev); 1273 pm_runtime_enable(dev);
1274 1274
1275 dev_info(dev, "probed\n"); 1275 dev_info(dev, "probed\n");
diff --git a/sound/soc/soc-core.c b/sound/soc/soc-core.c
index 30579ca5bacb..e5c990889dcc 100644
--- a/sound/soc/soc-core.c
+++ b/sound/soc/soc-core.c
@@ -347,6 +347,8 @@ static ssize_t codec_list_read_file(struct file *file, char __user *user_buf,
347 if (!buf) 347 if (!buf)
348 return -ENOMEM; 348 return -ENOMEM;
349 349
350 mutex_lock(&client_mutex);
351
350 list_for_each_entry(codec, &codec_list, list) { 352 list_for_each_entry(codec, &codec_list, list) {
351 len = snprintf(buf + ret, PAGE_SIZE - ret, "%s\n", 353 len = snprintf(buf + ret, PAGE_SIZE - ret, "%s\n",
352 codec->component.name); 354 codec->component.name);
@@ -358,6 +360,8 @@ static ssize_t codec_list_read_file(struct file *file, char __user *user_buf,
358 } 360 }
359 } 361 }
360 362
363 mutex_unlock(&client_mutex);
364
361 if (ret >= 0) 365 if (ret >= 0)
362 ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret); 366 ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret);
363 367
@@ -382,6 +386,8 @@ static ssize_t dai_list_read_file(struct file *file, char __user *user_buf,
382 if (!buf) 386 if (!buf)
383 return -ENOMEM; 387 return -ENOMEM;
384 388
389 mutex_lock(&client_mutex);
390
385 list_for_each_entry(component, &component_list, list) { 391 list_for_each_entry(component, &component_list, list) {
386 list_for_each_entry(dai, &component->dai_list, list) { 392 list_for_each_entry(dai, &component->dai_list, list) {
387 len = snprintf(buf + ret, PAGE_SIZE - ret, "%s\n", 393 len = snprintf(buf + ret, PAGE_SIZE - ret, "%s\n",
@@ -395,6 +401,8 @@ static ssize_t dai_list_read_file(struct file *file, char __user *user_buf,
395 } 401 }
396 } 402 }
397 403
404 mutex_unlock(&client_mutex);
405
398 ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret); 406 ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret);
399 407
400 kfree(buf); 408 kfree(buf);
@@ -418,6 +426,8 @@ static ssize_t platform_list_read_file(struct file *file,
418 if (!buf) 426 if (!buf)
419 return -ENOMEM; 427 return -ENOMEM;
420 428
429 mutex_lock(&client_mutex);
430
421 list_for_each_entry(platform, &platform_list, list) { 431 list_for_each_entry(platform, &platform_list, list) {
422 len = snprintf(buf + ret, PAGE_SIZE - ret, "%s\n", 432 len = snprintf(buf + ret, PAGE_SIZE - ret, "%s\n",
423 platform->component.name); 433 platform->component.name);
@@ -429,6 +439,8 @@ static ssize_t platform_list_read_file(struct file *file,
429 } 439 }
430 } 440 }
431 441
442 mutex_unlock(&client_mutex);
443
432 ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret); 444 ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret);
433 445
434 kfree(buf); 446 kfree(buf);
@@ -836,6 +848,8 @@ static struct snd_soc_component *soc_find_component(
836{ 848{
837 struct snd_soc_component *component; 849 struct snd_soc_component *component;
838 850
851 lockdep_assert_held(&client_mutex);
852
839 list_for_each_entry(component, &component_list, list) { 853 list_for_each_entry(component, &component_list, list) {
840 if (of_node) { 854 if (of_node) {
841 if (component->dev->of_node == of_node) 855 if (component->dev->of_node == of_node)
@@ -854,6 +868,8 @@ static struct snd_soc_dai *snd_soc_find_dai(
854 struct snd_soc_component *component; 868 struct snd_soc_component *component;
855 struct snd_soc_dai *dai; 869 struct snd_soc_dai *dai;
856 870
871 lockdep_assert_held(&client_mutex);
872
857 /* Find CPU DAI from registered DAIs*/ 873 /* Find CPU DAI from registered DAIs*/
858 list_for_each_entry(component, &component_list, list) { 874 list_for_each_entry(component, &component_list, list) {
859 if (dlc->of_node && component->dev->of_node != dlc->of_node) 875 if (dlc->of_node && component->dev->of_node != dlc->of_node)
@@ -1508,6 +1524,7 @@ static int snd_soc_instantiate_card(struct snd_soc_card *card)
1508 struct snd_soc_codec *codec; 1524 struct snd_soc_codec *codec;
1509 int ret, i, order; 1525 int ret, i, order;
1510 1526
1527 mutex_lock(&client_mutex);
1511 mutex_lock_nested(&card->mutex, SND_SOC_CARD_CLASS_INIT); 1528 mutex_lock_nested(&card->mutex, SND_SOC_CARD_CLASS_INIT);
1512 1529
1513 /* bind DAIs */ 1530 /* bind DAIs */
@@ -1662,6 +1679,7 @@ static int snd_soc_instantiate_card(struct snd_soc_card *card)
1662 card->instantiated = 1; 1679 card->instantiated = 1;
1663 snd_soc_dapm_sync(&card->dapm); 1680 snd_soc_dapm_sync(&card->dapm);
1664 mutex_unlock(&card->mutex); 1681 mutex_unlock(&card->mutex);
1682 mutex_unlock(&client_mutex);
1665 1683
1666 return 0; 1684 return 0;
1667 1685
@@ -1680,6 +1698,7 @@ card_probe_error:
1680 1698
1681base_error: 1699base_error:
1682 mutex_unlock(&card->mutex); 1700 mutex_unlock(&card->mutex);
1701 mutex_unlock(&client_mutex);
1683 1702
1684 return ret; 1703 return ret;
1685} 1704}
@@ -2713,13 +2732,6 @@ static void snd_soc_component_del_unlocked(struct snd_soc_component *component)
2713 list_del(&component->list); 2732 list_del(&component->list);
2714} 2733}
2715 2734
2716static void snd_soc_component_del(struct snd_soc_component *component)
2717{
2718 mutex_lock(&client_mutex);
2719 snd_soc_component_del_unlocked(component);
2720 mutex_unlock(&client_mutex);
2721}
2722
2723int snd_soc_register_component(struct device *dev, 2735int snd_soc_register_component(struct device *dev,
2724 const struct snd_soc_component_driver *cmpnt_drv, 2736 const struct snd_soc_component_driver *cmpnt_drv,
2725 struct snd_soc_dai_driver *dai_drv, 2737 struct snd_soc_dai_driver *dai_drv,
@@ -2767,14 +2779,17 @@ void snd_soc_unregister_component(struct device *dev)
2767{ 2779{
2768 struct snd_soc_component *cmpnt; 2780 struct snd_soc_component *cmpnt;
2769 2781
2782 mutex_lock(&client_mutex);
2770 list_for_each_entry(cmpnt, &component_list, list) { 2783 list_for_each_entry(cmpnt, &component_list, list) {
2771 if (dev == cmpnt->dev && cmpnt->registered_as_component) 2784 if (dev == cmpnt->dev && cmpnt->registered_as_component)
2772 goto found; 2785 goto found;
2773 } 2786 }
2787 mutex_unlock(&client_mutex);
2774 return; 2788 return;
2775 2789
2776found: 2790found:
2777 snd_soc_component_del(cmpnt); 2791 snd_soc_component_del_unlocked(cmpnt);
2792 mutex_unlock(&client_mutex);
2778 snd_soc_component_cleanup(cmpnt); 2793 snd_soc_component_cleanup(cmpnt);
2779 kfree(cmpnt); 2794 kfree(cmpnt);
2780} 2795}
@@ -2882,10 +2897,14 @@ struct snd_soc_platform *snd_soc_lookup_platform(struct device *dev)
2882{ 2897{
2883 struct snd_soc_platform *platform; 2898 struct snd_soc_platform *platform;
2884 2899
2900 mutex_lock(&client_mutex);
2885 list_for_each_entry(platform, &platform_list, list) { 2901 list_for_each_entry(platform, &platform_list, list) {
2886 if (dev == platform->dev) 2902 if (dev == platform->dev) {
2903 mutex_unlock(&client_mutex);
2887 return platform; 2904 return platform;
2905 }
2888 } 2906 }
2907 mutex_unlock(&client_mutex);
2889 2908
2890 return NULL; 2909 return NULL;
2891} 2910}
@@ -3090,15 +3109,15 @@ void snd_soc_unregister_codec(struct device *dev)
3090{ 3109{
3091 struct snd_soc_codec *codec; 3110 struct snd_soc_codec *codec;
3092 3111
3112 mutex_lock(&client_mutex);
3093 list_for_each_entry(codec, &codec_list, list) { 3113 list_for_each_entry(codec, &codec_list, list) {
3094 if (dev == codec->dev) 3114 if (dev == codec->dev)
3095 goto found; 3115 goto found;
3096 } 3116 }
3117 mutex_unlock(&client_mutex);
3097 return; 3118 return;
3098 3119
3099found: 3120found:
3100
3101 mutex_lock(&client_mutex);
3102 list_del(&codec->list); 3121 list_del(&codec->list);
3103 snd_soc_component_del_unlocked(&codec->component); 3122 snd_soc_component_del_unlocked(&codec->component);
3104 mutex_unlock(&client_mutex); 3123 mutex_unlock(&client_mutex);
diff --git a/sound/usb/clock.c b/sound/usb/clock.c
index 03fed6611d9e..2ed260b10f6d 100644
--- a/sound/usb/clock.c
+++ b/sound/usb/clock.c
@@ -303,6 +303,11 @@ static int set_sample_rate_v1(struct snd_usb_audio *chip, int iface,
303 return err; 303 return err;
304 } 304 }
305 305
306 /* Don't check the sample rate for devices which we know don't
307 * support reading */
308 if (snd_usb_get_sample_rate_quirk(chip))
309 return 0;
310
306 if ((err = snd_usb_ctl_msg(dev, usb_rcvctrlpipe(dev, 0), UAC_GET_CUR, 311 if ((err = snd_usb_ctl_msg(dev, usb_rcvctrlpipe(dev, 0), UAC_GET_CUR,
307 USB_TYPE_CLASS | USB_RECIP_ENDPOINT | USB_DIR_IN, 312 USB_TYPE_CLASS | USB_RECIP_ENDPOINT | USB_DIR_IN,
308 UAC_EP_CS_ATTR_SAMPLE_RATE << 8, ep, 313 UAC_EP_CS_ATTR_SAMPLE_RATE << 8, ep,
diff --git a/sound/usb/line6/driver.c b/sound/usb/line6/driver.c
index 99b63a7902f3..81b7da8e56d3 100644
--- a/sound/usb/line6/driver.c
+++ b/sound/usb/line6/driver.c
@@ -302,14 +302,17 @@ static void line6_data_received(struct urb *urb)
302/* 302/*
303 Read data from device. 303 Read data from device.
304*/ 304*/
305int line6_read_data(struct usb_line6 *line6, int address, void *data, 305int line6_read_data(struct usb_line6 *line6, unsigned address, void *data,
306 size_t datalen) 306 unsigned datalen)
307{ 307{
308 struct usb_device *usbdev = line6->usbdev; 308 struct usb_device *usbdev = line6->usbdev;
309 int ret; 309 int ret;
310 unsigned char len; 310 unsigned char len;
311 unsigned count; 311 unsigned count;
312 312
313 if (address > 0xffff || datalen > 0xff)
314 return -EINVAL;
315
313 /* query the serial number: */ 316 /* query the serial number: */
314 ret = usb_control_msg(usbdev, usb_sndctrlpipe(usbdev, 0), 0x67, 317 ret = usb_control_msg(usbdev, usb_sndctrlpipe(usbdev, 0), 0x67,
315 USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT, 318 USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
@@ -370,14 +373,17 @@ EXPORT_SYMBOL_GPL(line6_read_data);
370/* 373/*
371 Write data to device. 374 Write data to device.
372*/ 375*/
373int line6_write_data(struct usb_line6 *line6, int address, void *data, 376int line6_write_data(struct usb_line6 *line6, unsigned address, void *data,
374 size_t datalen) 377 unsigned datalen)
375{ 378{
376 struct usb_device *usbdev = line6->usbdev; 379 struct usb_device *usbdev = line6->usbdev;
377 int ret; 380 int ret;
378 unsigned char status; 381 unsigned char status;
379 int count; 382 int count;
380 383
384 if (address > 0xffff || datalen > 0xffff)
385 return -EINVAL;
386
381 ret = usb_control_msg(usbdev, usb_sndctrlpipe(usbdev, 0), 0x67, 387 ret = usb_control_msg(usbdev, usb_sndctrlpipe(usbdev, 0), 0x67,
382 USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT, 388 USB_TYPE_VENDOR | USB_RECIP_DEVICE | USB_DIR_OUT,
383 0x0022, address, data, datalen, 389 0x0022, address, data, datalen,
diff --git a/sound/usb/line6/driver.h b/sound/usb/line6/driver.h
index 5d20294d64f4..7da643e79e3b 100644
--- a/sound/usb/line6/driver.h
+++ b/sound/usb/line6/driver.h
@@ -147,8 +147,8 @@ struct usb_line6 {
147 147
148extern char *line6_alloc_sysex_buffer(struct usb_line6 *line6, int code1, 148extern char *line6_alloc_sysex_buffer(struct usb_line6 *line6, int code1,
149 int code2, int size); 149 int code2, int size);
150extern int line6_read_data(struct usb_line6 *line6, int address, void *data, 150extern int line6_read_data(struct usb_line6 *line6, unsigned address,
151 size_t datalen); 151 void *data, unsigned datalen);
152extern int line6_read_serial_number(struct usb_line6 *line6, 152extern int line6_read_serial_number(struct usb_line6 *line6,
153 u32 *serial_number); 153 u32 *serial_number);
154extern int line6_send_raw_message_async(struct usb_line6 *line6, 154extern int line6_send_raw_message_async(struct usb_line6 *line6,
@@ -161,8 +161,8 @@ extern void line6_start_timer(struct timer_list *timer, unsigned long msecs,
161 void (*function)(unsigned long), 161 void (*function)(unsigned long),
162 unsigned long data); 162 unsigned long data);
163extern int line6_version_request_async(struct usb_line6 *line6); 163extern int line6_version_request_async(struct usb_line6 *line6);
164extern int line6_write_data(struct usb_line6 *line6, int address, void *data, 164extern int line6_write_data(struct usb_line6 *line6, unsigned address,
165 size_t datalen); 165 void *data, unsigned datalen);
166 166
167int line6_probe(struct usb_interface *interface, 167int line6_probe(struct usb_interface *interface,
168 const struct usb_device_id *id, 168 const struct usb_device_id *id,
diff --git a/sound/usb/line6/playback.c b/sound/usb/line6/playback.c
index 05dee690f487..97ed593f6010 100644
--- a/sound/usb/line6/playback.c
+++ b/sound/usb/line6/playback.c
@@ -39,7 +39,7 @@ static void change_volume(struct urb *urb_out, int volume[],
39 for (; p < buf_end; ++p) { 39 for (; p < buf_end; ++p) {
40 short pv = le16_to_cpu(*p); 40 short pv = le16_to_cpu(*p);
41 int val = (pv * volume[chn & 1]) >> 8; 41 int val = (pv * volume[chn & 1]) >> 8;
42 pv = clamp(val, 0x7fff, -0x8000); 42 pv = clamp(val, -0x8000, 0x7fff);
43 *p = cpu_to_le16(pv); 43 *p = cpu_to_le16(pv);
44 ++chn; 44 ++chn;
45 } 45 }
@@ -54,7 +54,7 @@ static void change_volume(struct urb *urb_out, int volume[],
54 54
55 val = p[0] + (p[1] << 8) + ((signed char)p[2] << 16); 55 val = p[0] + (p[1] << 8) + ((signed char)p[2] << 16);
56 val = (val * volume[chn & 1]) >> 8; 56 val = (val * volume[chn & 1]) >> 8;
57 val = clamp(val, 0x7fffff, -0x800000); 57 val = clamp(val, -0x800000, 0x7fffff);
58 p[0] = val; 58 p[0] = val;
59 p[1] = val >> 8; 59 p[1] = val >> 8;
60 p[2] = val >> 16; 60 p[2] = val >> 16;
@@ -126,7 +126,7 @@ static void add_monitor_signal(struct urb *urb_out, unsigned char *signal,
126 short pov = le16_to_cpu(*po); 126 short pov = le16_to_cpu(*po);
127 short piv = le16_to_cpu(*pi); 127 short piv = le16_to_cpu(*pi);
128 int val = pov + ((piv * volume) >> 8); 128 int val = pov + ((piv * volume) >> 8);
129 pov = clamp(val, 0x7fff, -0x8000); 129 pov = clamp(val, -0x8000, 0x7fff);
130 *po = cpu_to_le16(pov); 130 *po = cpu_to_le16(pov);
131 } 131 }
132 } 132 }
diff --git a/sound/usb/quirks-table.h b/sound/usb/quirks-table.h
index 67d476548dcf..07f984d5f516 100644
--- a/sound/usb/quirks-table.h
+++ b/sound/usb/quirks-table.h
@@ -1773,6 +1773,36 @@ YAMAHA_DEVICE(0x7010, "UB99"),
1773 } 1773 }
1774 } 1774 }
1775}, 1775},
1776{
1777 USB_DEVICE(0x0582, 0x0159),
1778 .driver_info = (unsigned long) & (const struct snd_usb_audio_quirk) {
1779 /* .vendor_name = "Roland", */
1780 /* .product_name = "UA-22", */
1781 .ifnum = QUIRK_ANY_INTERFACE,
1782 .type = QUIRK_COMPOSITE,
1783 .data = (const struct snd_usb_audio_quirk[]) {
1784 {
1785 .ifnum = 0,
1786 .type = QUIRK_AUDIO_STANDARD_INTERFACE
1787 },
1788 {
1789 .ifnum = 1,
1790 .type = QUIRK_AUDIO_STANDARD_INTERFACE
1791 },
1792 {
1793 .ifnum = 2,
1794 .type = QUIRK_MIDI_FIXED_ENDPOINT,
1795 .data = & (const struct snd_usb_midi_endpoint_info) {
1796 .out_cables = 0x0001,
1797 .in_cables = 0x0001
1798 }
1799 },
1800 {
1801 .ifnum = -1
1802 }
1803 }
1804 }
1805},
1776/* this catches most recent vendor-specific Roland devices */ 1806/* this catches most recent vendor-specific Roland devices */
1777{ 1807{
1778 .match_flags = USB_DEVICE_ID_MATCH_VENDOR | 1808 .match_flags = USB_DEVICE_ID_MATCH_VENDOR |
diff --git a/sound/usb/quirks.c b/sound/usb/quirks.c
index a7398412310b..753a47de8459 100644
--- a/sound/usb/quirks.c
+++ b/sound/usb/quirks.c
@@ -1111,6 +1111,11 @@ void snd_usb_set_format_quirk(struct snd_usb_substream *subs,
1111 } 1111 }
1112} 1112}
1113 1113
1114bool snd_usb_get_sample_rate_quirk(struct snd_usb_audio *chip)
1115{
1116 /* MS Lifecam HD-5000 doesn't support reading the sample rate. */
1117 return chip->usb_id == USB_ID(0x045E, 0x076D);
1118}
1114 1119
1115/* Marantz/Denon USB DACs need a vendor cmd to switch 1120/* Marantz/Denon USB DACs need a vendor cmd to switch
1116 * between PCM and native DSD mode 1121 * between PCM and native DSD mode
@@ -1122,6 +1127,7 @@ int snd_usb_select_mode_quirk(struct snd_usb_substream *subs,
1122 int err; 1127 int err;
1123 1128
1124 switch (subs->stream->chip->usb_id) { 1129 switch (subs->stream->chip->usb_id) {
1130 case USB_ID(0x154e, 0x1003): /* Denon DA-300USB */
1125 case USB_ID(0x154e, 0x3005): /* Marantz HD-DAC1 */ 1131 case USB_ID(0x154e, 0x3005): /* Marantz HD-DAC1 */
1126 case USB_ID(0x154e, 0x3006): /* Marantz SA-14S1 */ 1132 case USB_ID(0x154e, 0x3006): /* Marantz SA-14S1 */
1127 1133
@@ -1201,6 +1207,7 @@ void snd_usb_ctl_msg_quirk(struct usb_device *dev, unsigned int pipe,
1201 (requesttype & USB_TYPE_MASK) == USB_TYPE_CLASS) { 1207 (requesttype & USB_TYPE_MASK) == USB_TYPE_CLASS) {
1202 1208
1203 switch (le16_to_cpu(dev->descriptor.idProduct)) { 1209 switch (le16_to_cpu(dev->descriptor.idProduct)) {
1210 case 0x1003: /* Denon DA300-USB */
1204 case 0x3005: /* Marantz HD-DAC1 */ 1211 case 0x3005: /* Marantz HD-DAC1 */
1205 case 0x3006: /* Marantz SA-14S1 */ 1212 case 0x3006: /* Marantz SA-14S1 */
1206 mdelay(20); 1213 mdelay(20);
@@ -1262,6 +1269,7 @@ u64 snd_usb_interface_dsd_format_quirks(struct snd_usb_audio *chip,
1262 1269
1263 /* Denon/Marantz devices with USB DAC functionality */ 1270 /* Denon/Marantz devices with USB DAC functionality */
1264 switch (chip->usb_id) { 1271 switch (chip->usb_id) {
1272 case USB_ID(0x154e, 0x1003): /* Denon DA300-USB */
1265 case USB_ID(0x154e, 0x3005): /* Marantz HD-DAC1 */ 1273 case USB_ID(0x154e, 0x3005): /* Marantz HD-DAC1 */
1266 case USB_ID(0x154e, 0x3006): /* Marantz SA-14S1 */ 1274 case USB_ID(0x154e, 0x3006): /* Marantz SA-14S1 */
1267 if (fp->altsetting == 2) 1275 if (fp->altsetting == 2)
diff --git a/sound/usb/quirks.h b/sound/usb/quirks.h
index 1b862386577d..2cd71ed1201f 100644
--- a/sound/usb/quirks.h
+++ b/sound/usb/quirks.h
@@ -21,6 +21,8 @@ int snd_usb_apply_boot_quirk(struct usb_device *dev,
21void snd_usb_set_format_quirk(struct snd_usb_substream *subs, 21void snd_usb_set_format_quirk(struct snd_usb_substream *subs,
22 struct audioformat *fmt); 22 struct audioformat *fmt);
23 23
24bool snd_usb_get_sample_rate_quirk(struct snd_usb_audio *chip);
25
24int snd_usb_is_big_endian_format(struct snd_usb_audio *chip, 26int snd_usb_is_big_endian_format(struct snd_usb_audio *chip,
25 struct audioformat *fp); 27 struct audioformat *fp);
26 28
diff --git a/tools/perf/bench/mem-memcpy.c b/tools/perf/bench/mem-memcpy.c
index 6c14afe8c1b1..db1d3a29d97f 100644
--- a/tools/perf/bench/mem-memcpy.c
+++ b/tools/perf/bench/mem-memcpy.c
@@ -289,7 +289,7 @@ static u64 do_memcpy_cycle(const struct routine *r, size_t len, bool prefault)
289 memcpy_t fn = r->fn.memcpy; 289 memcpy_t fn = r->fn.memcpy;
290 int i; 290 int i;
291 291
292 memcpy_alloc_mem(&src, &dst, len); 292 memcpy_alloc_mem(&dst, &src, len);
293 293
294 if (prefault) 294 if (prefault)
295 fn(dst, src, len); 295 fn(dst, src, len);
@@ -312,7 +312,7 @@ static double do_memcpy_gettimeofday(const struct routine *r, size_t len,
312 void *src = NULL, *dst = NULL; 312 void *src = NULL, *dst = NULL;
313 int i; 313 int i;
314 314
315 memcpy_alloc_mem(&src, &dst, len); 315 memcpy_alloc_mem(&dst, &src, len);
316 316
317 if (prefault) 317 if (prefault)
318 fn(dst, src, len); 318 fn(dst, src, len);
diff --git a/tools/perf/config/Makefile.arch b/tools/perf/config/Makefile.arch
index ff95a68741d1..ac8721ffa6c8 100644
--- a/tools/perf/config/Makefile.arch
+++ b/tools/perf/config/Makefile.arch
@@ -21,6 +21,10 @@ ifeq ($(RAW_ARCH),x86_64)
21 endif 21 endif
22endif 22endif
23 23
24ifeq ($(RAW_ARCH),sparc64)
25 ARCH ?= sparc
26endif
27
24ARCH ?= $(RAW_ARCH) 28ARCH ?= $(RAW_ARCH)
25 29
26LP64 := $(shell echo __LP64__ | ${CC} ${CFLAGS} -E -x c - | tail -n 1) 30LP64 := $(shell echo __LP64__ | ${CC} ${CFLAGS} -E -x c - | tail -n 1)
diff --git a/tools/perf/config/feature-checks/Makefile b/tools/perf/config/feature-checks/Makefile
index 42ac05aaf8ac..b32ff3372514 100644
--- a/tools/perf/config/feature-checks/Makefile
+++ b/tools/perf/config/feature-checks/Makefile
@@ -49,7 +49,7 @@ test-hello.bin:
49 $(BUILD) 49 $(BUILD)
50 50
51test-pthread-attr-setaffinity-np.bin: 51test-pthread-attr-setaffinity-np.bin:
52 $(BUILD) -Werror -lpthread 52 $(BUILD) -D_GNU_SOURCE -Werror -lpthread
53 53
54test-stackprotector-all.bin: 54test-stackprotector-all.bin:
55 $(BUILD) -Werror -fstack-protector-all 55 $(BUILD) -Werror -fstack-protector-all
diff --git a/tools/perf/config/feature-checks/test-pthread-attr-setaffinity-np.c b/tools/perf/config/feature-checks/test-pthread-attr-setaffinity-np.c
index 0a0d3ecb4e8a..2b81b72eca23 100644
--- a/tools/perf/config/feature-checks/test-pthread-attr-setaffinity-np.c
+++ b/tools/perf/config/feature-checks/test-pthread-attr-setaffinity-np.c
@@ -5,10 +5,11 @@ int main(void)
5{ 5{
6 int ret = 0; 6 int ret = 0;
7 pthread_attr_t thread_attr; 7 pthread_attr_t thread_attr;
8 cpu_set_t cs;
8 9
9 pthread_attr_init(&thread_attr); 10 pthread_attr_init(&thread_attr);
10 /* don't care abt exact args, just the API itself in libpthread */ 11 /* don't care abt exact args, just the API itself in libpthread */
11 ret = pthread_attr_setaffinity_np(&thread_attr, 0, NULL); 12 ret = pthread_attr_setaffinity_np(&thread_attr, sizeof(cs), &cs);
12 13
13 return ret; 14 return ret;
14} 15}
diff --git a/tools/perf/util/annotate.c b/tools/perf/util/annotate.c
index 61bf9128e1f2..9d9db3b296dd 100644
--- a/tools/perf/util/annotate.c
+++ b/tools/perf/util/annotate.c
@@ -30,6 +30,8 @@ static int disasm_line__parse(char *line, char **namep, char **rawp);
30 30
31static void ins__delete(struct ins_operands *ops) 31static void ins__delete(struct ins_operands *ops)
32{ 32{
33 if (ops == NULL)
34 return;
33 zfree(&ops->source.raw); 35 zfree(&ops->source.raw);
34 zfree(&ops->source.name); 36 zfree(&ops->source.name);
35 zfree(&ops->target.raw); 37 zfree(&ops->target.raw);
diff --git a/tools/perf/util/cloexec.c b/tools/perf/util/cloexec.c
index 47b78b3f0325..6da965bdbc2c 100644
--- a/tools/perf/util/cloexec.c
+++ b/tools/perf/util/cloexec.c
@@ -25,6 +25,10 @@ static int perf_flag_probe(void)
25 if (cpu < 0) 25 if (cpu < 0)
26 cpu = 0; 26 cpu = 0;
27 27
28 /*
29 * Using -1 for the pid is a workaround to avoid gratuitous jump label
30 * changes.
31 */
28 while (1) { 32 while (1) {
29 /* check cloexec flag */ 33 /* check cloexec flag */
30 fd = sys_perf_event_open(&attr, pid, cpu, -1, 34 fd = sys_perf_event_open(&attr, pid, cpu, -1,
@@ -47,16 +51,24 @@ static int perf_flag_probe(void)
47 err, strerror_r(err, sbuf, sizeof(sbuf))); 51 err, strerror_r(err, sbuf, sizeof(sbuf)));
48 52
49 /* not supported, confirm error related to PERF_FLAG_FD_CLOEXEC */ 53 /* not supported, confirm error related to PERF_FLAG_FD_CLOEXEC */
50 fd = sys_perf_event_open(&attr, pid, cpu, -1, 0); 54 while (1) {
55 fd = sys_perf_event_open(&attr, pid, cpu, -1, 0);
56 if (fd < 0 && pid == -1 && errno == EACCES) {
57 pid = 0;
58 continue;
59 }
60 break;
61 }
51 err = errno; 62 err = errno;
52 63
64 if (fd >= 0)
65 close(fd);
66
53 if (WARN_ONCE(fd < 0 && err != EBUSY, 67 if (WARN_ONCE(fd < 0 && err != EBUSY,
54 "perf_event_open(..., 0) failed unexpectedly with error %d (%s)\n", 68 "perf_event_open(..., 0) failed unexpectedly with error %d (%s)\n",
55 err, strerror_r(err, sbuf, sizeof(sbuf)))) 69 err, strerror_r(err, sbuf, sizeof(sbuf))))
56 return -1; 70 return -1;
57 71
58 close(fd);
59
60 return 0; 72 return 0;
61} 73}
62 74
diff --git a/tools/perf/util/evlist.h b/tools/perf/util/evlist.h
index c94a9e03ecf1..e99a67632831 100644
--- a/tools/perf/util/evlist.h
+++ b/tools/perf/util/evlist.h
@@ -28,7 +28,7 @@ struct perf_mmap {
28 int mask; 28 int mask;
29 int refcnt; 29 int refcnt;
30 unsigned int prev; 30 unsigned int prev;
31 char event_copy[PERF_SAMPLE_MAX_SIZE]; 31 char event_copy[PERF_SAMPLE_MAX_SIZE] __attribute__((aligned(8)));
32}; 32};
33 33
34struct perf_evlist { 34struct perf_evlist {
diff --git a/tools/perf/util/symbol-elf.c b/tools/perf/util/symbol-elf.c
index b24f9d8727a8..33b7a2aef713 100644
--- a/tools/perf/util/symbol-elf.c
+++ b/tools/perf/util/symbol-elf.c
@@ -11,6 +11,11 @@
11#include <symbol/kallsyms.h> 11#include <symbol/kallsyms.h>
12#include "debug.h" 12#include "debug.h"
13 13
14#ifndef EM_AARCH64
15#define EM_AARCH64 183 /* ARM 64 bit */
16#endif
17
18
14#ifdef HAVE_CPLUS_DEMANGLE_SUPPORT 19#ifdef HAVE_CPLUS_DEMANGLE_SUPPORT
15extern char *cplus_demangle(const char *, int); 20extern char *cplus_demangle(const char *, int);
16 21
diff --git a/tools/power/cpupower/Makefile b/tools/power/cpupower/Makefile
index 3ed7c0476d48..2e2ba2efa0d9 100644
--- a/tools/power/cpupower/Makefile
+++ b/tools/power/cpupower/Makefile
@@ -209,7 +209,7 @@ $(OUTPUT)%.o: %.c
209 209
210$(OUTPUT)cpupower: $(UTIL_OBJS) $(OUTPUT)libcpupower.so.$(LIB_MAJ) 210$(OUTPUT)cpupower: $(UTIL_OBJS) $(OUTPUT)libcpupower.so.$(LIB_MAJ)
211 $(ECHO) " CC " $@ 211 $(ECHO) " CC " $@
212 $(QUIET) $(CC) $(CFLAGS) $(LDFLAGS) $(UTIL_OBJS) -lcpupower -Wl,-rpath=./ -lrt -lpci -L$(OUTPUT) -o $@ 212 $(QUIET) $(CC) $(CFLAGS) $(LDFLAGS) $(UTIL_OBJS) -lcpupower -lrt -lpci -L$(OUTPUT) -o $@
213 $(QUIET) $(STRIPCMD) $@ 213 $(QUIET) $(STRIPCMD) $@
214 214
215$(OUTPUT)po/$(PACKAGE).pot: $(UTIL_SRC) 215$(OUTPUT)po/$(PACKAGE).pot: $(UTIL_SRC)
diff --git a/tools/testing/selftests/exec/execveat.c b/tools/testing/selftests/exec/execveat.c
index e238c9559caf..8d5d1d2ee7c1 100644
--- a/tools/testing/selftests/exec/execveat.c
+++ b/tools/testing/selftests/exec/execveat.c
@@ -30,7 +30,7 @@ static int execveat_(int fd, const char *path, char **argv, char **envp,
30#ifdef __NR_execveat 30#ifdef __NR_execveat
31 return syscall(__NR_execveat, fd, path, argv, envp, flags); 31 return syscall(__NR_execveat, fd, path, argv, envp, flags);
32#else 32#else
33 errno = -ENOSYS; 33 errno = ENOSYS;
34 return -1; 34 return -1;
35#endif 35#endif
36} 36}
@@ -234,6 +234,14 @@ static int run_tests(void)
234 int fd_cloexec = open_or_die("execveat", O_RDONLY|O_CLOEXEC); 234 int fd_cloexec = open_or_die("execveat", O_RDONLY|O_CLOEXEC);
235 int fd_script_cloexec = open_or_die("script", O_RDONLY|O_CLOEXEC); 235 int fd_script_cloexec = open_or_die("script", O_RDONLY|O_CLOEXEC);
236 236
237 /* Check if we have execveat at all, and bail early if not */
238 errno = 0;
239 execveat_(-1, NULL, NULL, NULL, 0);
240 if (errno == ENOSYS) {
241 printf("[FAIL] ENOSYS calling execveat - no kernel support?\n");
242 return 1;
243 }
244
237 /* Change file position to confirm it doesn't affect anything */ 245 /* Change file position to confirm it doesn't affect anything */
238 lseek(fd, 10, SEEK_SET); 246 lseek(fd, 10, SEEK_SET);
239 247
diff --git a/tools/thermal/tmon/.gitignore b/tools/thermal/tmon/.gitignore
new file mode 100644
index 000000000000..06e96be65276
--- /dev/null
+++ b/tools/thermal/tmon/.gitignore
@@ -0,0 +1 @@
/tmon
diff --git a/tools/thermal/tmon/Makefile b/tools/thermal/tmon/Makefile
index e775adcbd29f..0788621c8d76 100644
--- a/tools/thermal/tmon/Makefile
+++ b/tools/thermal/tmon/Makefile
@@ -2,8 +2,8 @@ VERSION = 1.0
2 2
3BINDIR=usr/bin 3BINDIR=usr/bin
4WARNFLAGS=-Wall -Wshadow -W -Wformat -Wimplicit-function-declaration -Wimplicit-int 4WARNFLAGS=-Wall -Wshadow -W -Wformat -Wimplicit-function-declaration -Wimplicit-int
5CFLAGS= -O1 ${WARNFLAGS} -fstack-protector 5CFLAGS+= -O1 ${WARNFLAGS} -fstack-protector
6CC=gcc 6CC=$(CROSS_COMPILE)gcc
7 7
8CFLAGS+=-D VERSION=\"$(VERSION)\" 8CFLAGS+=-D VERSION=\"$(VERSION)\"
9LDFLAGS+= 9LDFLAGS+=
@@ -16,12 +16,21 @@ INSTALL_CONFIGFILE=install -m 644 -p
16CONFIG_FILE= 16CONFIG_FILE=
17CONFIG_PATH= 17CONFIG_PATH=
18 18
19# Static builds might require -ltinfo, for instance
20ifneq ($(findstring -static, $(LDFLAGS)),)
21STATIC := --static
22endif
23
24TMON_LIBS=-lm -lpthread
25TMON_LIBS += $(shell pkg-config --libs $(STATIC) panelw ncursesw 2> /dev/null || \
26 pkg-config --libs $(STATIC) panel ncurses 2> /dev/null || \
27 echo -lpanel -lncurses)
19 28
20OBJS = tmon.o tui.o sysfs.o pid.o 29OBJS = tmon.o tui.o sysfs.o pid.o
21OBJS += 30OBJS +=
22 31
23tmon: $(OBJS) Makefile tmon.h 32tmon: $(OBJS) Makefile tmon.h
24 $(CC) ${CFLAGS} $(LDFLAGS) $(OBJS) -o $(TARGET) -lm -lpanel -lncursesw -ltinfo -lpthread 33 $(CC) $(CFLAGS) $(LDFLAGS) $(OBJS) -o $(TARGET) $(TMON_LIBS)
25 34
26valgrind: tmon 35valgrind: tmon
27 sudo valgrind -v --track-origins=yes --tool=memcheck --leak-check=yes --show-reachable=yes --num-callers=20 --track-fds=yes ./$(TARGET) 1> /dev/null 36 sudo valgrind -v --track-origins=yes --tool=memcheck --leak-check=yes --show-reachable=yes --num-callers=20 --track-fds=yes ./$(TARGET) 1> /dev/null
diff --git a/tools/thermal/tmon/tmon.8 b/tools/thermal/tmon/tmon.8
index 0be727cb9892..02d5179803aa 100644
--- a/tools/thermal/tmon/tmon.8
+++ b/tools/thermal/tmon/tmon.8
@@ -55,6 +55,8 @@ The \fB-l --log\fP option write data to /var/tmp/tmon.log
55.PP 55.PP
56The \fB-t --time-interval\fP option sets the polling interval in seconds 56The \fB-t --time-interval\fP option sets the polling interval in seconds
57.PP 57.PP
58The \fB-T --target-temp\fP option sets the initial target temperature
59.PP
58The \fB-v --version\fP option shows the version of \fBtmon \fP 60The \fB-v --version\fP option shows the version of \fBtmon \fP
59.PP 61.PP
60The \fB-z --zone\fP option sets the target therma zone instance to be controlled 62The \fB-z --zone\fP option sets the target therma zone instance to be controlled
diff --git a/tools/thermal/tmon/tmon.c b/tools/thermal/tmon/tmon.c
index 09b7c3218334..9aa19652e8e8 100644
--- a/tools/thermal/tmon/tmon.c
+++ b/tools/thermal/tmon/tmon.c
@@ -64,6 +64,7 @@ void usage()
64 printf(" -h, --help show this help message\n"); 64 printf(" -h, --help show this help message\n");
65 printf(" -l, --log log data to /var/tmp/tmon.log\n"); 65 printf(" -l, --log log data to /var/tmp/tmon.log\n");
66 printf(" -t, --time-interval sampling time interval, > 1 sec.\n"); 66 printf(" -t, --time-interval sampling time interval, > 1 sec.\n");
67 printf(" -T, --target-temp initial target temperature\n");
67 printf(" -v, --version show version\n"); 68 printf(" -v, --version show version\n");
68 printf(" -z, --zone target thermal zone id\n"); 69 printf(" -z, --zone target thermal zone id\n");
69 70
@@ -219,6 +220,7 @@ static struct option opts[] = {
219 { "control", 1, NULL, 'c' }, 220 { "control", 1, NULL, 'c' },
220 { "daemon", 0, NULL, 'd' }, 221 { "daemon", 0, NULL, 'd' },
221 { "time-interval", 1, NULL, 't' }, 222 { "time-interval", 1, NULL, 't' },
223 { "target-temp", 1, NULL, 'T' },
222 { "log", 0, NULL, 'l' }, 224 { "log", 0, NULL, 'l' },
223 { "help", 0, NULL, 'h' }, 225 { "help", 0, NULL, 'h' },
224 { "version", 0, NULL, 'v' }, 226 { "version", 0, NULL, 'v' },
@@ -231,7 +233,7 @@ int main(int argc, char **argv)
231{ 233{
232 int err = 0; 234 int err = 0;
233 int id2 = 0, c; 235 int id2 = 0, c;
234 double yk = 0.0; /* controller output */ 236 double yk = 0.0, temp; /* controller output */
235 int target_tz_index; 237 int target_tz_index;
236 238
237 if (geteuid() != 0) { 239 if (geteuid() != 0) {
@@ -239,7 +241,7 @@ int main(int argc, char **argv)
239 exit(EXIT_FAILURE); 241 exit(EXIT_FAILURE);
240 } 242 }
241 243
242 while ((c = getopt_long(argc, argv, "c:dlht:vgz:", opts, &id2)) != -1) { 244 while ((c = getopt_long(argc, argv, "c:dlht:T:vgz:", opts, &id2)) != -1) {
243 switch (c) { 245 switch (c) {
244 case 'c': 246 case 'c':
245 no_control = 0; 247 no_control = 0;
@@ -254,6 +256,14 @@ int main(int argc, char **argv)
254 if (ticktime < 1) 256 if (ticktime < 1)
255 ticktime = 1; 257 ticktime = 1;
256 break; 258 break;
259 case 'T':
260 temp = strtod(optarg, NULL);
261 if (temp < 0) {
262 fprintf(stderr, "error: temperature must be positive\n");
263 return 1;
264 }
265 target_temp_user = temp;
266 break;
257 case 'l': 267 case 'l':
258 printf("Logging data to /var/tmp/tmon.log\n"); 268 printf("Logging data to /var/tmp/tmon.log\n");
259 logging = 1; 269 logging = 1;
diff --git a/tools/thermal/tmon/tui.c b/tools/thermal/tmon/tui.c
index 89f8ef0e15c8..b5d1c6b22dd3 100644
--- a/tools/thermal/tmon/tui.c
+++ b/tools/thermal/tmon/tui.c
@@ -30,6 +30,18 @@
30 30
31#include "tmon.h" 31#include "tmon.h"
32 32
33#define min(x, y) ({ \
34 typeof(x) _min1 = (x); \
35 typeof(y) _min2 = (y); \
36 (void) (&_min1 == &_min2); \
37 _min1 < _min2 ? _min1 : _min2; })
38
39#define max(x, y) ({ \
40 typeof(x) _max1 = (x); \
41 typeof(y) _max2 = (y); \
42 (void) (&_max1 == &_max2); \
43 _max1 > _max2 ? _max1 : _max2; })
44
33static PANEL *data_panel; 45static PANEL *data_panel;
34static PANEL *dialogue_panel; 46static PANEL *dialogue_panel;
35static PANEL *top; 47static PANEL *top;
@@ -98,6 +110,18 @@ void write_status_bar(int x, char *line)
98 wrefresh(status_bar_window); 110 wrefresh(status_bar_window);
99} 111}
100 112
113/* wrap at 5 */
114#define DIAG_DEV_ROWS 5
115/*
116 * list cooling devices + "set temp" entry; wraps after 5 rows, if they fit
117 */
118static int diag_dev_rows(void)
119{
120 int entries = ptdata.nr_cooling_dev + 1;
121 int rows = max(DIAG_DEV_ROWS, (entries + 1) / 2);
122 return min(rows, entries);
123}
124
101void setup_windows(void) 125void setup_windows(void)
102{ 126{
103 int y_begin = 1; 127 int y_begin = 1;
@@ -122,7 +146,7 @@ void setup_windows(void)
122 * dialogue window is a pop-up, when needed it lays on top of cdev win 146 * dialogue window is a pop-up, when needed it lays on top of cdev win
123 */ 147 */
124 148
125 dialogue_window = subwin(stdscr, ptdata.nr_cooling_dev+5, maxx-50, 149 dialogue_window = subwin(stdscr, diag_dev_rows() + 5, maxx-50,
126 DIAG_Y, DIAG_X); 150 DIAG_Y, DIAG_X);
127 151
128 thermal_data_window = subwin(stdscr, ptdata.nr_tz_sensor * 152 thermal_data_window = subwin(stdscr, ptdata.nr_tz_sensor *
@@ -258,21 +282,26 @@ void show_cooling_device(void)
258} 282}
259 283
260const char DIAG_TITLE[] = "[ TUNABLES ]"; 284const char DIAG_TITLE[] = "[ TUNABLES ]";
261#define DIAG_DEV_ROWS 5
262void show_dialogue(void) 285void show_dialogue(void)
263{ 286{
264 int j, x = 0, y = 0; 287 int j, x = 0, y = 0;
288 int rows, cols;
265 WINDOW *w = dialogue_window; 289 WINDOW *w = dialogue_window;
266 290
267 if (tui_disabled || !w) 291 if (tui_disabled || !w)
268 return; 292 return;
269 293
294 getmaxyx(w, rows, cols);
295
296 /* Silence compiler 'unused' warnings */
297 (void)cols;
298
270 werase(w); 299 werase(w);
271 box(w, 0, 0); 300 box(w, 0, 0);
272 mvwprintw(w, 0, maxx/4, DIAG_TITLE); 301 mvwprintw(w, 0, maxx/4, DIAG_TITLE);
273 /* list all the available tunables */ 302 /* list all the available tunables */
274 for (j = 0; j <= ptdata.nr_cooling_dev; j++) { 303 for (j = 0; j <= ptdata.nr_cooling_dev; j++) {
275 y = j % DIAG_DEV_ROWS; 304 y = j % diag_dev_rows();
276 if (y == 0 && j != 0) 305 if (y == 0 && j != 0)
277 x += 20; 306 x += 20;
278 if (j == ptdata.nr_cooling_dev) 307 if (j == ptdata.nr_cooling_dev)
@@ -283,12 +312,10 @@ void show_dialogue(void)
283 ptdata.cdi[j].type, ptdata.cdi[j].instance); 312 ptdata.cdi[j].type, ptdata.cdi[j].instance);
284 } 313 }
285 wattron(w, A_BOLD); 314 wattron(w, A_BOLD);
286 mvwprintw(w, DIAG_DEV_ROWS+1, 1, "Enter Choice [A-Z]?"); 315 mvwprintw(w, diag_dev_rows()+1, 1, "Enter Choice [A-Z]?");
287 wattroff(w, A_BOLD); 316 wattroff(w, A_BOLD);
288 /* y size of dialogue win is nr cdev + 5, so print legend 317 /* print legend at the bottom line */
289 * at the bottom line 318 mvwprintw(w, rows - 2, 1,
290 */
291 mvwprintw(w, ptdata.nr_cooling_dev+3, 1,
292 "Legend: A=Active, P=Passive, C=Critical"); 319 "Legend: A=Active, P=Passive, C=Critical");
293 320
294 wrefresh(dialogue_window); 321 wrefresh(dialogue_window);
@@ -437,7 +464,7 @@ static void handle_input_choice(int ch)
437 snprintf(buf, sizeof(buf), "New Value for %.10s-%2d: ", 464 snprintf(buf, sizeof(buf), "New Value for %.10s-%2d: ",
438 ptdata.cdi[cdev_id].type, 465 ptdata.cdi[cdev_id].type,
439 ptdata.cdi[cdev_id].instance); 466 ptdata.cdi[cdev_id].instance);
440 write_dialogue_win(buf, DIAG_DEV_ROWS+2, 2); 467 write_dialogue_win(buf, diag_dev_rows() + 2, 2);
441 handle_input_val(cdev_id); 468 handle_input_val(cdev_id);
442 } else { 469 } else {
443 snprintf(buf, sizeof(buf), "Invalid selection %d", ch); 470 snprintf(buf, sizeof(buf), "Invalid selection %d", ch);
diff --git a/virt/kvm/arm/vgic-v2.c b/virt/kvm/arm/vgic-v2.c
index a0a7b5d1a070..f9b9c7c51372 100644
--- a/virt/kvm/arm/vgic-v2.c
+++ b/virt/kvm/arm/vgic-v2.c
@@ -72,6 +72,8 @@ static void vgic_v2_sync_lr_elrsr(struct kvm_vcpu *vcpu, int lr,
72{ 72{
73 if (!(lr_desc.state & LR_STATE_MASK)) 73 if (!(lr_desc.state & LR_STATE_MASK))
74 vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr |= (1ULL << lr); 74 vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr |= (1ULL << lr);
75 else
76 vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr &= ~(1ULL << lr);
75} 77}
76 78
77static u64 vgic_v2_get_elrsr(const struct kvm_vcpu *vcpu) 79static u64 vgic_v2_get_elrsr(const struct kvm_vcpu *vcpu)
@@ -84,6 +86,11 @@ static u64 vgic_v2_get_eisr(const struct kvm_vcpu *vcpu)
84 return vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr; 86 return vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr;
85} 87}
86 88
89static void vgic_v2_clear_eisr(struct kvm_vcpu *vcpu)
90{
91 vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr = 0;
92}
93
87static u32 vgic_v2_get_interrupt_status(const struct kvm_vcpu *vcpu) 94static u32 vgic_v2_get_interrupt_status(const struct kvm_vcpu *vcpu)
88{ 95{
89 u32 misr = vcpu->arch.vgic_cpu.vgic_v2.vgic_misr; 96 u32 misr = vcpu->arch.vgic_cpu.vgic_v2.vgic_misr;
@@ -148,6 +155,7 @@ static const struct vgic_ops vgic_v2_ops = {
148 .sync_lr_elrsr = vgic_v2_sync_lr_elrsr, 155 .sync_lr_elrsr = vgic_v2_sync_lr_elrsr,
149 .get_elrsr = vgic_v2_get_elrsr, 156 .get_elrsr = vgic_v2_get_elrsr,
150 .get_eisr = vgic_v2_get_eisr, 157 .get_eisr = vgic_v2_get_eisr,
158 .clear_eisr = vgic_v2_clear_eisr,
151 .get_interrupt_status = vgic_v2_get_interrupt_status, 159 .get_interrupt_status = vgic_v2_get_interrupt_status,
152 .enable_underflow = vgic_v2_enable_underflow, 160 .enable_underflow = vgic_v2_enable_underflow,
153 .disable_underflow = vgic_v2_disable_underflow, 161 .disable_underflow = vgic_v2_disable_underflow,
diff --git a/virt/kvm/arm/vgic-v3.c b/virt/kvm/arm/vgic-v3.c
index 3a62d8a9a2c6..dff06021e748 100644
--- a/virt/kvm/arm/vgic-v3.c
+++ b/virt/kvm/arm/vgic-v3.c
@@ -104,6 +104,8 @@ static void vgic_v3_sync_lr_elrsr(struct kvm_vcpu *vcpu, int lr,
104{ 104{
105 if (!(lr_desc.state & LR_STATE_MASK)) 105 if (!(lr_desc.state & LR_STATE_MASK))
106 vcpu->arch.vgic_cpu.vgic_v3.vgic_elrsr |= (1U << lr); 106 vcpu->arch.vgic_cpu.vgic_v3.vgic_elrsr |= (1U << lr);
107 else
108 vcpu->arch.vgic_cpu.vgic_v3.vgic_elrsr &= ~(1U << lr);
107} 109}
108 110
109static u64 vgic_v3_get_elrsr(const struct kvm_vcpu *vcpu) 111static u64 vgic_v3_get_elrsr(const struct kvm_vcpu *vcpu)
@@ -116,6 +118,11 @@ static u64 vgic_v3_get_eisr(const struct kvm_vcpu *vcpu)
116 return vcpu->arch.vgic_cpu.vgic_v3.vgic_eisr; 118 return vcpu->arch.vgic_cpu.vgic_v3.vgic_eisr;
117} 119}
118 120
121static void vgic_v3_clear_eisr(struct kvm_vcpu *vcpu)
122{
123 vcpu->arch.vgic_cpu.vgic_v3.vgic_eisr = 0;
124}
125
119static u32 vgic_v3_get_interrupt_status(const struct kvm_vcpu *vcpu) 126static u32 vgic_v3_get_interrupt_status(const struct kvm_vcpu *vcpu)
120{ 127{
121 u32 misr = vcpu->arch.vgic_cpu.vgic_v3.vgic_misr; 128 u32 misr = vcpu->arch.vgic_cpu.vgic_v3.vgic_misr;
@@ -192,6 +199,7 @@ static const struct vgic_ops vgic_v3_ops = {
192 .sync_lr_elrsr = vgic_v3_sync_lr_elrsr, 199 .sync_lr_elrsr = vgic_v3_sync_lr_elrsr,
193 .get_elrsr = vgic_v3_get_elrsr, 200 .get_elrsr = vgic_v3_get_elrsr,
194 .get_eisr = vgic_v3_get_eisr, 201 .get_eisr = vgic_v3_get_eisr,
202 .clear_eisr = vgic_v3_clear_eisr,
195 .get_interrupt_status = vgic_v3_get_interrupt_status, 203 .get_interrupt_status = vgic_v3_get_interrupt_status,
196 .enable_underflow = vgic_v3_enable_underflow, 204 .enable_underflow = vgic_v3_enable_underflow,
197 .disable_underflow = vgic_v3_disable_underflow, 205 .disable_underflow = vgic_v3_disable_underflow,
diff --git a/virt/kvm/arm/vgic.c b/virt/kvm/arm/vgic.c
index 0cc6ab6005a0..c9f60f524588 100644
--- a/virt/kvm/arm/vgic.c
+++ b/virt/kvm/arm/vgic.c
@@ -883,6 +883,11 @@ static inline u64 vgic_get_eisr(struct kvm_vcpu *vcpu)
883 return vgic_ops->get_eisr(vcpu); 883 return vgic_ops->get_eisr(vcpu);
884} 884}
885 885
886static inline void vgic_clear_eisr(struct kvm_vcpu *vcpu)
887{
888 vgic_ops->clear_eisr(vcpu);
889}
890
886static inline u32 vgic_get_interrupt_status(struct kvm_vcpu *vcpu) 891static inline u32 vgic_get_interrupt_status(struct kvm_vcpu *vcpu)
887{ 892{
888 return vgic_ops->get_interrupt_status(vcpu); 893 return vgic_ops->get_interrupt_status(vcpu);
@@ -922,6 +927,7 @@ static void vgic_retire_lr(int lr_nr, int irq, struct kvm_vcpu *vcpu)
922 vgic_set_lr(vcpu, lr_nr, vlr); 927 vgic_set_lr(vcpu, lr_nr, vlr);
923 clear_bit(lr_nr, vgic_cpu->lr_used); 928 clear_bit(lr_nr, vgic_cpu->lr_used);
924 vgic_cpu->vgic_irq_lr_map[irq] = LR_EMPTY; 929 vgic_cpu->vgic_irq_lr_map[irq] = LR_EMPTY;
930 vgic_sync_lr_elrsr(vcpu, lr_nr, vlr);
925} 931}
926 932
927/* 933/*
@@ -978,6 +984,7 @@ bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq)
978 BUG_ON(!test_bit(lr, vgic_cpu->lr_used)); 984 BUG_ON(!test_bit(lr, vgic_cpu->lr_used));
979 vlr.state |= LR_STATE_PENDING; 985 vlr.state |= LR_STATE_PENDING;
980 vgic_set_lr(vcpu, lr, vlr); 986 vgic_set_lr(vcpu, lr, vlr);
987 vgic_sync_lr_elrsr(vcpu, lr, vlr);
981 return true; 988 return true;
982 } 989 }
983 } 990 }
@@ -999,6 +1006,7 @@ bool vgic_queue_irq(struct kvm_vcpu *vcpu, u8 sgi_source_id, int irq)
999 vlr.state |= LR_EOI_INT; 1006 vlr.state |= LR_EOI_INT;
1000 1007
1001 vgic_set_lr(vcpu, lr, vlr); 1008 vgic_set_lr(vcpu, lr, vlr);
1009 vgic_sync_lr_elrsr(vcpu, lr, vlr);
1002 1010
1003 return true; 1011 return true;
1004} 1012}
@@ -1136,6 +1144,14 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
1136 if (status & INT_STATUS_UNDERFLOW) 1144 if (status & INT_STATUS_UNDERFLOW)
1137 vgic_disable_underflow(vcpu); 1145 vgic_disable_underflow(vcpu);
1138 1146
1147 /*
1148 * In the next iterations of the vcpu loop, if we sync the vgic state
1149 * after flushing it, but before entering the guest (this happens for
1150 * pending signals and vmid rollovers), then make sure we don't pick
1151 * up any old maintenance interrupts here.
1152 */
1153 vgic_clear_eisr(vcpu);
1154
1139 return level_pending; 1155 return level_pending;
1140} 1156}
1141 1157
@@ -1583,8 +1599,10 @@ int kvm_vgic_create(struct kvm *kvm, u32 type)
1583 * emulation. So check this here again. KVM_CREATE_DEVICE does 1599 * emulation. So check this here again. KVM_CREATE_DEVICE does
1584 * the proper checks already. 1600 * the proper checks already.
1585 */ 1601 */
1586 if (type == KVM_DEV_TYPE_ARM_VGIC_V2 && !vgic->can_emulate_gicv2) 1602 if (type == KVM_DEV_TYPE_ARM_VGIC_V2 && !vgic->can_emulate_gicv2) {
1587 return -ENODEV; 1603 ret = -ENODEV;
1604 goto out;
1605 }
1588 1606
1589 /* 1607 /*
1590 * Any time a vcpu is run, vcpu_load is called which tries to grab the 1608 * Any time a vcpu is run, vcpu_load is called which tries to grab the
diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c
index a1093700f3a4..a2214d9609bd 100644
--- a/virt/kvm/kvm_main.c
+++ b/virt/kvm/kvm_main.c
@@ -2492,6 +2492,7 @@ static long kvm_vm_ioctl_check_extension_generic(struct kvm *kvm, long arg)
2492 case KVM_CAP_SIGNAL_MSI: 2492 case KVM_CAP_SIGNAL_MSI:
2493#endif 2493#endif
2494#ifdef CONFIG_HAVE_KVM_IRQFD 2494#ifdef CONFIG_HAVE_KVM_IRQFD
2495 case KVM_CAP_IRQFD:
2495 case KVM_CAP_IRQFD_RESAMPLE: 2496 case KVM_CAP_IRQFD_RESAMPLE:
2496#endif 2497#endif
2497 case KVM_CAP_CHECK_EXTENSION_VM: 2498 case KVM_CAP_CHECK_EXTENSION_VM: