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authorOlof Johansson <olof@lixom.net>2019-07-07 16:33:01 -0400
committerOlof Johansson <olof@lixom.net>2019-07-07 16:33:03 -0400
commit35051f84344bcbd40ba76e943183f0e9a1be9fa5 (patch)
tree196556de2c886ec64096fc526917fce6ffba0fd9
parent4471e44f972fb240601dcb1e1ae050faf316f46d (diff)
parent841ed60264b3d37d5bf3e32cff168920e4923f88 (diff)
Merge tag 'samsung-dt-5.3-3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into arm/dt
Samsung DTS ARM changes for v5.3, third round 1. Fix imprecise abort on Exynos4210 caused by newly added Mali nodes, 2. Reorganize Mali nodes under /soc, 3. Adjust buck regulators voltages on Arndale Octa and Odroid XU3/XU4 family to sane values. * tag 'samsung-dt-5.3-3' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux: ARM: dts: exynos: Adjust buck[78] regulators to supported values on Arndale Octa ARM: dts: exynos: Adjust buck[78] regulators to supported values on Odroid XU3 family ARM: dts: exynos: Move Mali400 GPU node to "/soc" ARM: dts: exynos: Fix imprecise abort on Mali GPU probe on Exynos4210 Link: https://lore.kernel.org/r/20190707180115.5562-1-krzk@kernel.org Signed-off-by: Olof Johansson <olof@lixom.net>
-rw-r--r--arch/arm/boot/dts/exynos3250.dtsi66
-rw-r--r--arch/arm/boot/dts/exynos4.dtsi50
-rw-r--r--arch/arm/boot/dts/exynos4210.dtsi20
-rw-r--r--arch/arm/boot/dts/exynos4412.dtsi22
-rw-r--r--arch/arm/boot/dts/exynos5420-arndale-octa.dts6
-rw-r--r--arch/arm/boot/dts/exynos5422-odroid-core.dtsi10
6 files changed, 97 insertions, 77 deletions
diff --git a/arch/arm/boot/dts/exynos3250.dtsi b/arch/arm/boot/dts/exynos3250.dtsi
index c17870a54acf..5659c4a10729 100644
--- a/arch/arm/boot/dts/exynos3250.dtsi
+++ b/arch/arm/boot/dts/exynos3250.dtsi
@@ -126,39 +126,6 @@
126 }; 126 };
127 }; 127 };
128 128
129 gpu: gpu@13000000 {
130 compatible = "samsung,exynos4210-mali", "arm,mali-400";
131 reg = <0x13000000 0x10000>;
132 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
133 <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
134 <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
135 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
136 <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
137 <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
138 <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
139 <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
140 <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
141 <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
142 <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
143 interrupt-names = "gp",
144 "gpmmu",
145 "pp0",
146 "ppmmu0",
147 "pp1",
148 "ppmmu1",
149 "pp2",
150 "ppmmu2",
151 "pp3",
152 "ppmmu3",
153 "pmu";
154 clocks = <&cmu CLK_G3D>,
155 <&cmu CLK_SCLK_G3D>;
156 clock-names = "bus", "core";
157 power-domains = <&pd_g3d>;
158 status = "disabled";
159 /* TODO: operating points for DVFS, assigned clock as 134 MHz */
160 };
161
162 pmu { 129 pmu {
163 compatible = "arm,cortex-a7-pmu"; 130 compatible = "arm,cortex-a7-pmu";
164 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>, 131 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
@@ -495,6 +462,39 @@
495 status = "disabled"; 462 status = "disabled";
496 }; 463 };
497 464
465 gpu: gpu@13000000 {
466 compatible = "samsung,exynos4210-mali", "arm,mali-400";
467 reg = <0x13000000 0x10000>;
468 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>,
469 <GIC_SPI 182 IRQ_TYPE_LEVEL_HIGH>,
470 <GIC_SPI 183 IRQ_TYPE_LEVEL_HIGH>,
471 <GIC_SPI 178 IRQ_TYPE_LEVEL_HIGH>,
472 <GIC_SPI 184 IRQ_TYPE_LEVEL_HIGH>,
473 <GIC_SPI 179 IRQ_TYPE_LEVEL_HIGH>,
474 <GIC_SPI 185 IRQ_TYPE_LEVEL_HIGH>,
475 <GIC_SPI 180 IRQ_TYPE_LEVEL_HIGH>,
476 <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>,
477 <GIC_SPI 181 IRQ_TYPE_LEVEL_HIGH>,
478 <GIC_SPI 177 IRQ_TYPE_LEVEL_HIGH>;
479 interrupt-names = "gp",
480 "gpmmu",
481 "pp0",
482 "ppmmu0",
483 "pp1",
484 "ppmmu1",
485 "pp2",
486 "ppmmu2",
487 "pp3",
488 "ppmmu3",
489 "pmu";
490 clocks = <&cmu CLK_G3D>,
491 <&cmu CLK_SCLK_G3D>;
492 clock-names = "bus", "core";
493 power-domains = <&pd_g3d>;
494 status = "disabled";
495 /* TODO: operating points for DVFS, assigned clock as 134 MHz */
496 };
497
498 mfc: codec@13400000 { 498 mfc: codec@13400000 {
499 compatible = "samsung,mfc-v7"; 499 compatible = "samsung,mfc-v7";
500 reg = <0x13400000 0x10000>; 500 reg = <0x13400000 0x10000>;
diff --git a/arch/arm/boot/dts/exynos4.dtsi b/arch/arm/boot/dts/exynos4.dtsi
index 6005cfbbed89..1264cc431ff6 100644
--- a/arch/arm/boot/dts/exynos4.dtsi
+++ b/arch/arm/boot/dts/exynos4.dtsi
@@ -51,42 +51,6 @@
51 serial3 = &serial_3; 51 serial3 = &serial_3;
52 }; 52 };
53 53
54 gpu: gpu@13000000 {
55 compatible = "samsung,exynos4210-mali", "arm,mali-400";
56 reg = <0x13000000 0x10000>;
57 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
58 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
59 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
60 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
61 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
62 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
63 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
64 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
65 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
66 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
67 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
68 interrupt-names = "gp",
69 "gpmmu",
70 "pp0",
71 "ppmmu0",
72 "pp1",
73 "ppmmu1",
74 "pp2",
75 "ppmmu2",
76 "pp3",
77 "ppmmu3",
78 "pmu";
79 /*
80 * CLK_G3D is not actually bus clock but a IP-level clock.
81 * The bus clock is not described in hardware manual.
82 */
83 clocks = <&clock CLK_G3D>,
84 <&clock CLK_SCLK_G3D>;
85 clock-names = "bus", "core";
86 power-domains = <&pd_g3d>;
87 status = "disabled";
88 };
89
90 pmu: pmu { 54 pmu: pmu {
91 compatible = "arm,cortex-a9-pmu"; 55 compatible = "arm,cortex-a9-pmu";
92 interrupt-parent = <&combiner>; 56 interrupt-parent = <&combiner>;
@@ -451,6 +415,20 @@
451 }; 415 };
452 }; 416 };
453 417
418 gpu: gpu@13000000 {
419 compatible = "samsung,exynos4210-mali", "arm,mali-400";
420 reg = <0x13000000 0x10000>;
421 /*
422 * CLK_G3D is not actually bus clock but a IP-level clock.
423 * The bus clock is not described in hardware manual.
424 */
425 clocks = <&clock CLK_G3D>,
426 <&clock CLK_SCLK_G3D>;
427 clock-names = "bus", "core";
428 power-domains = <&pd_g3d>;
429 status = "disabled";
430 };
431
454 i2s1: i2s@13960000 { 432 i2s1: i2s@13960000 {
455 compatible = "samsung,s3c6410-i2s"; 433 compatible = "samsung,s3c6410-i2s";
456 reg = <0x13960000 0x100>; 434 reg = <0x13960000 0x100>;
diff --git a/arch/arm/boot/dts/exynos4210.dtsi b/arch/arm/boot/dts/exynos4210.dtsi
index 6122da368092..f220716239db 100644
--- a/arch/arm/boot/dts/exynos4210.dtsi
+++ b/arch/arm/boot/dts/exynos4210.dtsi
@@ -450,6 +450,26 @@
450}; 450};
451 451
452&gpu { 452&gpu {
453 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
454 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
455 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
456 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
457 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
458 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
459 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
460 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
461 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
462 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
463 interrupt-names = "gp",
464 "gpmmu",
465 "pp0",
466 "ppmmu0",
467 "pp1",
468 "ppmmu1",
469 "pp2",
470 "ppmmu2",
471 "pp3",
472 "ppmmu3";
453 operating-points-v2 = <&gpu_opp_table>; 473 operating-points-v2 = <&gpu_opp_table>;
454 474
455 gpu_opp_table: opp_table { 475 gpu_opp_table: opp_table {
diff --git a/arch/arm/boot/dts/exynos4412.dtsi b/arch/arm/boot/dts/exynos4412.dtsi
index 7bed6842575a..d20db2dfe8e2 100644
--- a/arch/arm/boot/dts/exynos4412.dtsi
+++ b/arch/arm/boot/dts/exynos4412.dtsi
@@ -717,6 +717,28 @@
717}; 717};
718 718
719&gpu { 719&gpu {
720 interrupts = <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>,
721 <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
722 <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
723 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
724 <GIC_SPI 124 IRQ_TYPE_LEVEL_HIGH>,
725 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>,
726 <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>,
727 <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>,
728 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>,
729 <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
730 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
731 interrupt-names = "gp",
732 "gpmmu",
733 "pp0",
734 "ppmmu0",
735 "pp1",
736 "ppmmu1",
737 "pp2",
738 "ppmmu2",
739 "pp3",
740 "ppmmu3",
741 "pmu";
720 operating-points-v2 = <&gpu_opp_table>; 742 operating-points-v2 = <&gpu_opp_table>;
721 743
722 gpu_opp_table: opp_table { 744 gpu_opp_table: opp_table {
diff --git a/arch/arm/boot/dts/exynos5420-arndale-octa.dts b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
index ac7f2fa0ba22..592d7b45ecc8 100644
--- a/arch/arm/boot/dts/exynos5420-arndale-octa.dts
+++ b/arch/arm/boot/dts/exynos5420-arndale-octa.dts
@@ -723,15 +723,15 @@
723 723
724 buck7_reg: BUCK7 { 724 buck7_reg: BUCK7 {
725 regulator-name = "VIN_LLDO_1V4"; 725 regulator-name = "VIN_LLDO_1V4";
726 regulator-min-microvolt = <800000>; 726 regulator-min-microvolt = <1200000>;
727 regulator-max-microvolt = <1500000>; 727 regulator-max-microvolt = <1500000>;
728 regulator-always-on; 728 regulator-always-on;
729 }; 729 };
730 730
731 buck8_reg: BUCK8 { 731 buck8_reg: BUCK8 {
732 regulator-name = "VIN_MLDO_2V0"; 732 regulator-name = "VIN_MLDO_2V0";
733 regulator-min-microvolt = <800000>; 733 regulator-min-microvolt = <1800000>;
734 regulator-max-microvolt = <2000000>; 734 regulator-max-microvolt = <2100000>;
735 regulator-always-on; 735 regulator-always-on;
736 }; 736 };
737 737
diff --git a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
index 9843d21d6924..829147e320e0 100644
--- a/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
+++ b/arch/arm/boot/dts/exynos5422-odroid-core.dtsi
@@ -551,17 +551,17 @@
551 }; 551 };
552 552
553 buck7_reg: BUCK7 { 553 buck7_reg: BUCK7 {
554 regulator-name = "vdd_1.0v_ldo"; 554 regulator-name = "vdd_1.35v_ldo";
555 regulator-min-microvolt = <800000>; 555 regulator-min-microvolt = <1200000>;
556 regulator-max-microvolt = <1500000>; 556 regulator-max-microvolt = <1500000>;
557 regulator-always-on; 557 regulator-always-on;
558 regulator-boot-on; 558 regulator-boot-on;
559 }; 559 };
560 560
561 buck8_reg: BUCK8 { 561 buck8_reg: BUCK8 {
562 regulator-name = "vdd_1.8v_ldo"; 562 regulator-name = "vdd_2.0v_ldo";
563 regulator-min-microvolt = <800000>; 563 regulator-min-microvolt = <1800000>;
564 regulator-max-microvolt = <2000000>; 564 regulator-max-microvolt = <2100000>;
565 regulator-always-on; 565 regulator-always-on;
566 regulator-boot-on; 566 regulator-boot-on;
567 }; 567 };