diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2016-06-23 23:41:48 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2016-07-07 15:02:05 -0400 |
commit | 34e3205e089606b07bdc90863e7c057def0c3fe4 (patch) | |
tree | d5273217f4f3d332e1ea9b46f8f8cd0cd1617838 | |
parent | 5a3f25dbcb583760e1a6e4e1bffd3d2e09a5c657 (diff) |
drm/amdgpu/gmc8: remove duplicate wait_for_idle functions
Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | 38 |
1 files changed, 5 insertions, 33 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c index e243e3a784e5..717359d3ba8c 100644 --- a/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gmc_v8_0.c | |||
@@ -41,6 +41,7 @@ | |||
41 | 41 | ||
42 | static void gmc_v8_0_set_gart_funcs(struct amdgpu_device *adev); | 42 | static void gmc_v8_0_set_gart_funcs(struct amdgpu_device *adev); |
43 | static void gmc_v8_0_set_irq_funcs(struct amdgpu_device *adev); | 43 | static void gmc_v8_0_set_irq_funcs(struct amdgpu_device *adev); |
44 | static int gmc_v8_0_wait_for_idle(void *handle); | ||
44 | 45 | ||
45 | MODULE_FIRMWARE("amdgpu/tonga_mc.bin"); | 46 | MODULE_FIRMWARE("amdgpu/tonga_mc.bin"); |
46 | MODULE_FIRMWARE("amdgpu/polaris11_mc.bin"); | 47 | MODULE_FIRMWARE("amdgpu/polaris11_mc.bin"); |
@@ -147,35 +148,6 @@ static void gmc_v8_0_init_golden_registers(struct amdgpu_device *adev) | |||
147 | } | 148 | } |
148 | } | 149 | } |
149 | 150 | ||
150 | /** | ||
151 | * gmc8_mc_wait_for_idle - wait for MC idle callback. | ||
152 | * | ||
153 | * @adev: amdgpu_device pointer | ||
154 | * | ||
155 | * Wait for the MC (memory controller) to be idle. | ||
156 | * (evergreen+). | ||
157 | * Returns 0 if the MC is idle, -1 if not. | ||
158 | */ | ||
159 | static int gmc_v8_0_mc_wait_for_idle(struct amdgpu_device *adev) | ||
160 | { | ||
161 | unsigned i; | ||
162 | u32 tmp; | ||
163 | |||
164 | for (i = 0; i < adev->usec_timeout; i++) { | ||
165 | /* read MC_STATUS */ | ||
166 | tmp = RREG32(mmSRBM_STATUS) & (SRBM_STATUS__VMC_BUSY_MASK | | ||
167 | SRBM_STATUS__MCB_BUSY_MASK | | ||
168 | SRBM_STATUS__MCB_NON_DISPLAY_BUSY_MASK | | ||
169 | SRBM_STATUS__MCC_BUSY_MASK | | ||
170 | SRBM_STATUS__MCD_BUSY_MASK | | ||
171 | SRBM_STATUS__VMC1_BUSY_MASK); | ||
172 | if (!tmp) | ||
173 | return 0; | ||
174 | udelay(1); | ||
175 | } | ||
176 | return -1; | ||
177 | } | ||
178 | |||
179 | static void gmc_v8_0_mc_stop(struct amdgpu_device *adev, | 151 | static void gmc_v8_0_mc_stop(struct amdgpu_device *adev, |
180 | struct amdgpu_mode_mc_save *save) | 152 | struct amdgpu_mode_mc_save *save) |
181 | { | 153 | { |
@@ -184,7 +156,7 @@ static void gmc_v8_0_mc_stop(struct amdgpu_device *adev, | |||
184 | if (adev->mode_info.num_crtc) | 156 | if (adev->mode_info.num_crtc) |
185 | amdgpu_display_stop_mc_access(adev, save); | 157 | amdgpu_display_stop_mc_access(adev, save); |
186 | 158 | ||
187 | gmc_v8_0_mc_wait_for_idle(adev); | 159 | gmc_v8_0_wait_for_idle(adev); |
188 | 160 | ||
189 | blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL); | 161 | blackout = RREG32(mmMC_SHARED_BLACKOUT_CNTL); |
190 | if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) { | 162 | if (REG_GET_FIELD(blackout, MC_SHARED_BLACKOUT_CNTL, BLACKOUT_MODE) != 1) { |
@@ -393,7 +365,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev) | |||
393 | amdgpu_display_set_vga_render_state(adev, false); | 365 | amdgpu_display_set_vga_render_state(adev, false); |
394 | 366 | ||
395 | gmc_v8_0_mc_stop(adev, &save); | 367 | gmc_v8_0_mc_stop(adev, &save); |
396 | if (gmc_v8_0_mc_wait_for_idle(adev)) { | 368 | if (gmc_v8_0_wait_for_idle((void *)adev)) { |
397 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); | 369 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); |
398 | } | 370 | } |
399 | /* Update configuration */ | 371 | /* Update configuration */ |
@@ -413,7 +385,7 @@ static void gmc_v8_0_mc_program(struct amdgpu_device *adev) | |||
413 | WREG32(mmMC_VM_AGP_BASE, 0); | 385 | WREG32(mmMC_VM_AGP_BASE, 0); |
414 | WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF); | 386 | WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF); |
415 | WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF); | 387 | WREG32(mmMC_VM_AGP_BOT, 0x0FFFFFFF); |
416 | if (gmc_v8_0_mc_wait_for_idle(adev)) { | 388 | if (gmc_v8_0_wait_for_idle((void *)adev)) { |
417 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); | 389 | dev_warn(adev->dev, "Wait for MC idle timedout !\n"); |
418 | } | 390 | } |
419 | gmc_v8_0_mc_resume(adev, &save); | 391 | gmc_v8_0_mc_resume(adev, &save); |
@@ -1140,7 +1112,7 @@ static int gmc_v8_0_soft_reset(void *handle) | |||
1140 | 1112 | ||
1141 | if (srbm_soft_reset) { | 1113 | if (srbm_soft_reset) { |
1142 | gmc_v8_0_mc_stop(adev, &save); | 1114 | gmc_v8_0_mc_stop(adev, &save); |
1143 | if (gmc_v8_0_wait_for_idle(adev)) { | 1115 | if (gmc_v8_0_wait_for_idle((void *)adev)) { |
1144 | dev_warn(adev->dev, "Wait for GMC idle timed out !\n"); | 1116 | dev_warn(adev->dev, "Wait for GMC idle timed out !\n"); |
1145 | } | 1117 | } |
1146 | 1118 | ||