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authorWill Deacon <will.deacon@arm.com>2019-02-22 08:37:21 -0500
committerWill Deacon <will.deacon@arm.com>2019-04-08 07:00:28 -0400
commit346e91ee090b07da8d15e36bc3169ddea6968713 (patch)
tree8ec14892fbf565049c4ffa4a23d628514da4e991
parente9e8543fecd2e1ca53616ba82fbd55a25cd2ab8a (diff)
mips/mmiowb: Add unconditional mmiowb() to arch_spin_unlock()
The mmiowb() macro is horribly difficult to use and drivers will continue to work most of the time if they omit a call when it is required. Rather than rely on driver authors getting this right, push mmiowb() into arch_spin_unlock() for mips. If this is deemed to be a performance issue, a subsequent optimisation could make use of ARCH_HAS_MMIOWB to elide the barrier in cases where no I/O writes were performed inside the critical section. Acked-by: Paul Burton <paul.burton@mips.com> Acked-by: Linus Torvalds <torvalds@linux-foundation.org> Signed-off-by: Will Deacon <will.deacon@arm.com>
-rw-r--r--arch/mips/include/asm/Kbuild1
-rw-r--r--arch/mips/include/asm/io.h3
-rw-r--r--arch/mips/include/asm/mmiowb.h11
-rw-r--r--arch/mips/include/asm/spinlock.h15
4 files changed, 26 insertions, 4 deletions
diff --git a/arch/mips/include/asm/Kbuild b/arch/mips/include/asm/Kbuild
index bf39c2253ec8..87b86cdf126a 100644
--- a/arch/mips/include/asm/Kbuild
+++ b/arch/mips/include/asm/Kbuild
@@ -12,7 +12,6 @@ generic-y += irq_work.h
12generic-y += local64.h 12generic-y += local64.h
13generic-y += mcs_spinlock.h 13generic-y += mcs_spinlock.h
14generic-y += mm-arch-hooks.h 14generic-y += mm-arch-hooks.h
15generic-y += mmiowb.h
16generic-y += msi.h 15generic-y += msi.h
17generic-y += parport.h 16generic-y += parport.h
18generic-y += percpu.h 17generic-y += percpu.h
diff --git a/arch/mips/include/asm/io.h b/arch/mips/include/asm/io.h
index 845fbbc7a2e3..29997e42480e 100644
--- a/arch/mips/include/asm/io.h
+++ b/arch/mips/include/asm/io.h
@@ -102,9 +102,6 @@ static inline void set_io_port_base(unsigned long base)
102#define iobarrier_w() wmb() 102#define iobarrier_w() wmb()
103#define iobarrier_sync() iob() 103#define iobarrier_sync() iob()
104 104
105/* Some callers use this older API instead. */
106#define mmiowb() iobarrier_w()
107
108/* 105/*
109 * virt_to_phys - map virtual addresses to physical 106 * virt_to_phys - map virtual addresses to physical
110 * @address: address to remap 107 * @address: address to remap
diff --git a/arch/mips/include/asm/mmiowb.h b/arch/mips/include/asm/mmiowb.h
new file mode 100644
index 000000000000..a40824e3ef8e
--- /dev/null
+++ b/arch/mips/include/asm/mmiowb.h
@@ -0,0 +1,11 @@
1/* SPDX-License-Identifier: GPL-2.0 */
2#ifndef _ASM_MMIOWB_H
3#define _ASM_MMIOWB_H
4
5#include <asm/io.h>
6
7#define mmiowb() iobarrier_w()
8
9#include <asm-generic/mmiowb.h>
10
11#endif /* _ASM_MMIOWB_H */
diff --git a/arch/mips/include/asm/spinlock.h b/arch/mips/include/asm/spinlock.h
index ee81297d9117..8a88eb265516 100644
--- a/arch/mips/include/asm/spinlock.h
+++ b/arch/mips/include/asm/spinlock.h
@@ -11,6 +11,21 @@
11 11
12#include <asm/processor.h> 12#include <asm/processor.h>
13#include <asm/qrwlock.h> 13#include <asm/qrwlock.h>
14
15#include <asm-generic/qspinlock_types.h>
16
17#define queued_spin_unlock queued_spin_unlock
18/**
19 * queued_spin_unlock - release a queued spinlock
20 * @lock : Pointer to queued spinlock structure
21 */
22static inline void queued_spin_unlock(struct qspinlock *lock)
23{
24 /* This could be optimised with ARCH_HAS_MMIOWB */
25 mmiowb();
26 smp_store_release(&lock->locked, 0);
27}
28
14#include <asm/qspinlock.h> 29#include <asm/qspinlock.h>
15 30
16#endif /* _ASM_SPINLOCK_H */ 31#endif /* _ASM_SPINLOCK_H */