diff options
author | Markus Elfring <elfring@users.sourceforge.net> | 2017-04-18 05:15:56 -0400 |
---|---|---|
committer | Stephen Boyd <sboyd@codeaurora.org> | 2017-04-19 14:29:49 -0400 |
commit | 34675d67032ae568331a2a230973c7b58ddcaf9d (patch) | |
tree | 6d0005527c3f58ef618e9bd3208efea7b6f70dc6 | |
parent | 3cda284b77cba833baea9a0f5e256a34d249761f (diff) |
clk: hi3620: Fix a typo in one variable name
The script "checkpatch.pl" pointed information out like the following.
CHECK: 'seperated' may be misspelled - perhaps 'separated'?
Thus rename the affected variable.
Signed-off-by: Markus Elfring <elfring@users.sourceforge.net>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
-rw-r--r-- | drivers/clk/hisilicon/clk-hi3620.c | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/drivers/clk/hisilicon/clk-hi3620.c b/drivers/clk/hisilicon/clk-hi3620.c index 33a713ac8fe6..fa0fba653898 100644 --- a/drivers/clk/hisilicon/clk-hi3620.c +++ b/drivers/clk/hisilicon/clk-hi3620.c | |||
@@ -144,7 +144,7 @@ static struct hisi_divider_clock hi3620_div_clks[] __initdata = { | |||
144 | { HI3620_MMC3_DIV, "mmc3_div", "mmc3_mux", 0, 0x140, 5, 4, CLK_DIVIDER_HIWORD_MASK, NULL, }, | 144 | { HI3620_MMC3_DIV, "mmc3_div", "mmc3_mux", 0, 0x140, 5, 4, CLK_DIVIDER_HIWORD_MASK, NULL, }, |
145 | }; | 145 | }; |
146 | 146 | ||
147 | static struct hisi_gate_clock hi3620_seperated_gate_clks[] __initdata = { | 147 | static struct hisi_gate_clock hi3620_separated_gate_clks[] __initdata = { |
148 | { HI3620_TIMERCLK01, "timerclk01", "timer_rclk01", CLK_SET_RATE_PARENT, 0x20, 0, 0, }, | 148 | { HI3620_TIMERCLK01, "timerclk01", "timer_rclk01", CLK_SET_RATE_PARENT, 0x20, 0, 0, }, |
149 | { HI3620_TIMER_RCLK01, "timer_rclk01", "rclk_tcxo", CLK_SET_RATE_PARENT, 0x20, 1, 0, }, | 149 | { HI3620_TIMER_RCLK01, "timer_rclk01", "rclk_tcxo", CLK_SET_RATE_PARENT, 0x20, 1, 0, }, |
150 | { HI3620_TIMERCLK23, "timerclk23", "timer_rclk23", CLK_SET_RATE_PARENT, 0x20, 2, 0, }, | 150 | { HI3620_TIMERCLK23, "timerclk23", "timer_rclk23", CLK_SET_RATE_PARENT, 0x20, 2, 0, }, |
@@ -224,8 +224,8 @@ static void __init hi3620_clk_init(struct device_node *np) | |||
224 | clk_data); | 224 | clk_data); |
225 | hisi_clk_register_divider(hi3620_div_clks, ARRAY_SIZE(hi3620_div_clks), | 225 | hisi_clk_register_divider(hi3620_div_clks, ARRAY_SIZE(hi3620_div_clks), |
226 | clk_data); | 226 | clk_data); |
227 | hisi_clk_register_gate_sep(hi3620_seperated_gate_clks, | 227 | hisi_clk_register_gate_sep(hi3620_separated_gate_clks, |
228 | ARRAY_SIZE(hi3620_seperated_gate_clks), | 228 | ARRAY_SIZE(hi3620_separated_gate_clks), |
229 | clk_data); | 229 | clk_data); |
230 | } | 230 | } |
231 | CLK_OF_DECLARE(hi3620_clk, "hisilicon,hi3620-clock", hi3620_clk_init); | 231 | CLK_OF_DECLARE(hi3620_clk, "hisilicon,hi3620-clock", hi3620_clk_init); |