diff options
author | David S. Miller <davem@davemloft.net> | 2016-12-06 11:44:45 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2016-12-06 11:44:45 -0500 |
commit | 32f16e142d7acabad68ef27c123d0caf1548aac3 (patch) | |
tree | 3dfd05fe193895006dd58375674129bca7952cd6 | |
parent | f85de6666347c974cdf97b1026180995d912d7d0 (diff) | |
parent | c0f1147d14e4b09018a495c5095094e5707a4f44 (diff) |
Merge branch 'mlx5-fixes'
Saeed Mahameed says:
====================
Mellanox 100G mlx5 fixes 2016-12-04
Some bug fixes for mlx5 core and mlx5e driver.
v1->v2:
- replace "uint" with "unsigned int"
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/cmd.c | 5 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en.h | 4 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en_main.c | 15 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en_rx.c | 8 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en_tx.c | 2 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c | 4 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/main.c | 42 | ||||
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h | 15 |
8 files changed, 53 insertions, 42 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c index 1e639f886021..bfe410e8a469 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/cmd.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/cmd.c | |||
@@ -268,11 +268,6 @@ static void dump_buf(void *buf, int size, int data_only, int offset) | |||
268 | pr_debug("\n"); | 268 | pr_debug("\n"); |
269 | } | 269 | } |
270 | 270 | ||
271 | enum { | ||
272 | MLX5_DRIVER_STATUS_ABORTED = 0xfe, | ||
273 | MLX5_DRIVER_SYND = 0xbadd00de, | ||
274 | }; | ||
275 | |||
276 | static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, | 271 | static int mlx5_internal_err_ret_value(struct mlx5_core_dev *dev, u16 op, |
277 | u32 *synd, u8 *status) | 272 | u32 *synd, u8 *status) |
278 | { | 273 | { |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en.h b/drivers/net/ethernet/mellanox/mlx5/core/en.h index 7a43502a89cc..71382df59fc0 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/en.h | |||
@@ -241,7 +241,7 @@ struct mlx5e_tstamp { | |||
241 | }; | 241 | }; |
242 | 242 | ||
243 | enum { | 243 | enum { |
244 | MLX5E_RQ_STATE_FLUSH, | 244 | MLX5E_RQ_STATE_ENABLED, |
245 | MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, | 245 | MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, |
246 | MLX5E_RQ_STATE_AM, | 246 | MLX5E_RQ_STATE_AM, |
247 | }; | 247 | }; |
@@ -394,7 +394,7 @@ struct mlx5e_sq_dma { | |||
394 | }; | 394 | }; |
395 | 395 | ||
396 | enum { | 396 | enum { |
397 | MLX5E_SQ_STATE_FLUSH, | 397 | MLX5E_SQ_STATE_ENABLED, |
398 | MLX5E_SQ_STATE_BF_ENABLE, | 398 | MLX5E_SQ_STATE_BF_ENABLE, |
399 | }; | 399 | }; |
400 | 400 | ||
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c index 84e8b250e2af..246d98ebb588 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_main.c | |||
@@ -759,6 +759,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c, | |||
759 | if (err) | 759 | if (err) |
760 | goto err_destroy_rq; | 760 | goto err_destroy_rq; |
761 | 761 | ||
762 | set_bit(MLX5E_RQ_STATE_ENABLED, &rq->state); | ||
762 | err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY); | 763 | err = mlx5e_modify_rq_state(rq, MLX5_RQC_STATE_RST, MLX5_RQC_STATE_RDY); |
763 | if (err) | 764 | if (err) |
764 | goto err_disable_rq; | 765 | goto err_disable_rq; |
@@ -773,6 +774,7 @@ static int mlx5e_open_rq(struct mlx5e_channel *c, | |||
773 | return 0; | 774 | return 0; |
774 | 775 | ||
775 | err_disable_rq: | 776 | err_disable_rq: |
777 | clear_bit(MLX5E_RQ_STATE_ENABLED, &rq->state); | ||
776 | mlx5e_disable_rq(rq); | 778 | mlx5e_disable_rq(rq); |
777 | err_destroy_rq: | 779 | err_destroy_rq: |
778 | mlx5e_destroy_rq(rq); | 780 | mlx5e_destroy_rq(rq); |
@@ -782,7 +784,7 @@ err_destroy_rq: | |||
782 | 784 | ||
783 | static void mlx5e_close_rq(struct mlx5e_rq *rq) | 785 | static void mlx5e_close_rq(struct mlx5e_rq *rq) |
784 | { | 786 | { |
785 | set_bit(MLX5E_RQ_STATE_FLUSH, &rq->state); | 787 | clear_bit(MLX5E_RQ_STATE_ENABLED, &rq->state); |
786 | napi_synchronize(&rq->channel->napi); /* prevent mlx5e_post_rx_wqes */ | 788 | napi_synchronize(&rq->channel->napi); /* prevent mlx5e_post_rx_wqes */ |
787 | cancel_work_sync(&rq->am.work); | 789 | cancel_work_sync(&rq->am.work); |
788 | 790 | ||
@@ -1006,7 +1008,6 @@ static int mlx5e_enable_sq(struct mlx5e_sq *sq, struct mlx5e_sq_param *param) | |||
1006 | MLX5_SET(sqc, sqc, min_wqe_inline_mode, sq->min_inline_mode); | 1008 | MLX5_SET(sqc, sqc, min_wqe_inline_mode, sq->min_inline_mode); |
1007 | MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); | 1009 | MLX5_SET(sqc, sqc, state, MLX5_SQC_STATE_RST); |
1008 | MLX5_SET(sqc, sqc, tis_lst_sz, param->type == MLX5E_SQ_ICO ? 0 : 1); | 1010 | MLX5_SET(sqc, sqc, tis_lst_sz, param->type == MLX5E_SQ_ICO ? 0 : 1); |
1009 | MLX5_SET(sqc, sqc, flush_in_error_en, 1); | ||
1010 | 1011 | ||
1011 | MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); | 1012 | MLX5_SET(wq, wq, wq_type, MLX5_WQ_TYPE_CYCLIC); |
1012 | MLX5_SET(wq, wq, uar_page, sq->uar.index); | 1013 | MLX5_SET(wq, wq, uar_page, sq->uar.index); |
@@ -1083,6 +1084,7 @@ static int mlx5e_open_sq(struct mlx5e_channel *c, | |||
1083 | if (err) | 1084 | if (err) |
1084 | goto err_destroy_sq; | 1085 | goto err_destroy_sq; |
1085 | 1086 | ||
1087 | set_bit(MLX5E_SQ_STATE_ENABLED, &sq->state); | ||
1086 | err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RST, MLX5_SQC_STATE_RDY, | 1088 | err = mlx5e_modify_sq(sq, MLX5_SQC_STATE_RST, MLX5_SQC_STATE_RDY, |
1087 | false, 0); | 1089 | false, 0); |
1088 | if (err) | 1090 | if (err) |
@@ -1096,6 +1098,7 @@ static int mlx5e_open_sq(struct mlx5e_channel *c, | |||
1096 | return 0; | 1098 | return 0; |
1097 | 1099 | ||
1098 | err_disable_sq: | 1100 | err_disable_sq: |
1101 | clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state); | ||
1099 | mlx5e_disable_sq(sq); | 1102 | mlx5e_disable_sq(sq); |
1100 | err_destroy_sq: | 1103 | err_destroy_sq: |
1101 | mlx5e_destroy_sq(sq); | 1104 | mlx5e_destroy_sq(sq); |
@@ -1112,7 +1115,7 @@ static inline void netif_tx_disable_queue(struct netdev_queue *txq) | |||
1112 | 1115 | ||
1113 | static void mlx5e_close_sq(struct mlx5e_sq *sq) | 1116 | static void mlx5e_close_sq(struct mlx5e_sq *sq) |
1114 | { | 1117 | { |
1115 | set_bit(MLX5E_SQ_STATE_FLUSH, &sq->state); | 1118 | clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state); |
1116 | /* prevent netif_tx_wake_queue */ | 1119 | /* prevent netif_tx_wake_queue */ |
1117 | napi_synchronize(&sq->channel->napi); | 1120 | napi_synchronize(&sq->channel->napi); |
1118 | 1121 | ||
@@ -3092,7 +3095,7 @@ static void mlx5e_tx_timeout(struct net_device *dev) | |||
3092 | if (!netif_xmit_stopped(netdev_get_tx_queue(dev, i))) | 3095 | if (!netif_xmit_stopped(netdev_get_tx_queue(dev, i))) |
3093 | continue; | 3096 | continue; |
3094 | sched_work = true; | 3097 | sched_work = true; |
3095 | set_bit(MLX5E_SQ_STATE_FLUSH, &sq->state); | 3098 | clear_bit(MLX5E_SQ_STATE_ENABLED, &sq->state); |
3096 | netdev_err(dev, "TX timeout on queue: %d, SQ: 0x%x, CQ: 0x%x, SQ Cons: 0x%x SQ Prod: 0x%x\n", | 3099 | netdev_err(dev, "TX timeout on queue: %d, SQ: 0x%x, CQ: 0x%x, SQ Cons: 0x%x SQ Prod: 0x%x\n", |
3097 | i, sq->sqn, sq->cq.mcq.cqn, sq->cc, sq->pc); | 3100 | i, sq->sqn, sq->cq.mcq.cqn, sq->cc, sq->pc); |
3098 | } | 3101 | } |
@@ -3147,13 +3150,13 @@ static int mlx5e_xdp_set(struct net_device *netdev, struct bpf_prog *prog) | |||
3147 | for (i = 0; i < priv->params.num_channels; i++) { | 3150 | for (i = 0; i < priv->params.num_channels; i++) { |
3148 | struct mlx5e_channel *c = priv->channel[i]; | 3151 | struct mlx5e_channel *c = priv->channel[i]; |
3149 | 3152 | ||
3150 | set_bit(MLX5E_RQ_STATE_FLUSH, &c->rq.state); | 3153 | clear_bit(MLX5E_RQ_STATE_ENABLED, &c->rq.state); |
3151 | napi_synchronize(&c->napi); | 3154 | napi_synchronize(&c->napi); |
3152 | /* prevent mlx5e_poll_rx_cq from accessing rq->xdp_prog */ | 3155 | /* prevent mlx5e_poll_rx_cq from accessing rq->xdp_prog */ |
3153 | 3156 | ||
3154 | old_prog = xchg(&c->rq.xdp_prog, prog); | 3157 | old_prog = xchg(&c->rq.xdp_prog, prog); |
3155 | 3158 | ||
3156 | clear_bit(MLX5E_RQ_STATE_FLUSH, &c->rq.state); | 3159 | set_bit(MLX5E_RQ_STATE_ENABLED, &c->rq.state); |
3157 | /* napi_schedule in case we have missed anything */ | 3160 | /* napi_schedule in case we have missed anything */ |
3158 | set_bit(MLX5E_CHANNEL_NAPI_SCHED, &c->flags); | 3161 | set_bit(MLX5E_CHANNEL_NAPI_SCHED, &c->flags); |
3159 | napi_schedule(&c->napi); | 3162 | napi_schedule(&c->napi); |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c index c6de6fba5843..33495d88aeb2 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_rx.c | |||
@@ -340,7 +340,7 @@ static inline void mlx5e_post_umr_wqe(struct mlx5e_rq *rq, u16 ix) | |||
340 | while ((pi = (sq->pc & wq->sz_m1)) > sq->edge) { | 340 | while ((pi = (sq->pc & wq->sz_m1)) > sq->edge) { |
341 | sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP; | 341 | sq->db.ico_wqe[pi].opcode = MLX5_OPCODE_NOP; |
342 | sq->db.ico_wqe[pi].num_wqebbs = 1; | 342 | sq->db.ico_wqe[pi].num_wqebbs = 1; |
343 | mlx5e_send_nop(sq, true); | 343 | mlx5e_send_nop(sq, false); |
344 | } | 344 | } |
345 | 345 | ||
346 | wqe = mlx5_wq_cyc_get_wqe(wq, pi); | 346 | wqe = mlx5_wq_cyc_get_wqe(wq, pi); |
@@ -412,7 +412,7 @@ void mlx5e_post_rx_mpwqe(struct mlx5e_rq *rq) | |||
412 | 412 | ||
413 | clear_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state); | 413 | clear_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state); |
414 | 414 | ||
415 | if (unlikely(test_bit(MLX5E_RQ_STATE_FLUSH, &rq->state))) { | 415 | if (unlikely(!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state))) { |
416 | mlx5e_free_rx_mpwqe(rq, &rq->mpwqe.info[wq->head]); | 416 | mlx5e_free_rx_mpwqe(rq, &rq->mpwqe.info[wq->head]); |
417 | return; | 417 | return; |
418 | } | 418 | } |
@@ -445,7 +445,7 @@ void mlx5e_dealloc_rx_mpwqe(struct mlx5e_rq *rq, u16 ix) | |||
445 | } | 445 | } |
446 | 446 | ||
447 | #define RQ_CANNOT_POST(rq) \ | 447 | #define RQ_CANNOT_POST(rq) \ |
448 | (test_bit(MLX5E_RQ_STATE_FLUSH, &rq->state) || \ | 448 | (!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state) || \ |
449 | test_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state)) | 449 | test_bit(MLX5E_RQ_STATE_UMR_WQE_IN_PROGRESS, &rq->state)) |
450 | 450 | ||
451 | bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq) | 451 | bool mlx5e_post_rx_wqes(struct mlx5e_rq *rq) |
@@ -924,7 +924,7 @@ int mlx5e_poll_rx_cq(struct mlx5e_cq *cq, int budget) | |||
924 | struct mlx5e_sq *xdp_sq = &rq->channel->xdp_sq; | 924 | struct mlx5e_sq *xdp_sq = &rq->channel->xdp_sq; |
925 | int work_done = 0; | 925 | int work_done = 0; |
926 | 926 | ||
927 | if (unlikely(test_bit(MLX5E_RQ_STATE_FLUSH, &rq->state))) | 927 | if (unlikely(!test_bit(MLX5E_RQ_STATE_ENABLED, &rq->state))) |
928 | return 0; | 928 | return 0; |
929 | 929 | ||
930 | if (cq->decmprs_left) | 930 | if (cq->decmprs_left) |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c index 70a717382357..cfb68371c397 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_tx.c | |||
@@ -409,7 +409,7 @@ bool mlx5e_poll_tx_cq(struct mlx5e_cq *cq, int napi_budget) | |||
409 | 409 | ||
410 | sq = container_of(cq, struct mlx5e_sq, cq); | 410 | sq = container_of(cq, struct mlx5e_sq, cq); |
411 | 411 | ||
412 | if (unlikely(test_bit(MLX5E_SQ_STATE_FLUSH, &sq->state))) | 412 | if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state))) |
413 | return false; | 413 | return false; |
414 | 414 | ||
415 | npkts = 0; | 415 | npkts = 0; |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c b/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c index 5703f19a6a24..e5c12a732aa1 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/en_txrx.c | |||
@@ -56,7 +56,7 @@ static void mlx5e_poll_ico_cq(struct mlx5e_cq *cq) | |||
56 | struct mlx5_cqe64 *cqe; | 56 | struct mlx5_cqe64 *cqe; |
57 | u16 sqcc; | 57 | u16 sqcc; |
58 | 58 | ||
59 | if (unlikely(test_bit(MLX5E_SQ_STATE_FLUSH, &sq->state))) | 59 | if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state))) |
60 | return; | 60 | return; |
61 | 61 | ||
62 | cqe = mlx5e_get_cqe(cq); | 62 | cqe = mlx5e_get_cqe(cq); |
@@ -113,7 +113,7 @@ static inline bool mlx5e_poll_xdp_tx_cq(struct mlx5e_cq *cq) | |||
113 | 113 | ||
114 | sq = container_of(cq, struct mlx5e_sq, cq); | 114 | sq = container_of(cq, struct mlx5e_sq, cq); |
115 | 115 | ||
116 | if (unlikely(test_bit(MLX5E_SQ_STATE_FLUSH, &sq->state))) | 116 | if (unlikely(!test_bit(MLX5E_SQ_STATE_ENABLED, &sq->state))) |
117 | return false; | 117 | return false; |
118 | 118 | ||
119 | /* sq->cc must be updated only after mlx5_cqwq_update_db_record(), | 119 | /* sq->cc must be updated only after mlx5_cqwq_update_db_record(), |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/main.c b/drivers/net/ethernet/mellanox/mlx5/core/main.c index 3b7c6a9f2b5f..ada24e103b02 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/main.c +++ b/drivers/net/ethernet/mellanox/mlx5/core/main.c | |||
@@ -62,13 +62,13 @@ MODULE_DESCRIPTION("Mellanox Connect-IB, ConnectX-4 core driver"); | |||
62 | MODULE_LICENSE("Dual BSD/GPL"); | 62 | MODULE_LICENSE("Dual BSD/GPL"); |
63 | MODULE_VERSION(DRIVER_VERSION); | 63 | MODULE_VERSION(DRIVER_VERSION); |
64 | 64 | ||
65 | int mlx5_core_debug_mask; | 65 | unsigned int mlx5_core_debug_mask; |
66 | module_param_named(debug_mask, mlx5_core_debug_mask, int, 0644); | 66 | module_param_named(debug_mask, mlx5_core_debug_mask, uint, 0644); |
67 | MODULE_PARM_DESC(debug_mask, "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0"); | 67 | MODULE_PARM_DESC(debug_mask, "debug mask: 1 = dump cmd data, 2 = dump cmd exec time, 3 = both. Default=0"); |
68 | 68 | ||
69 | #define MLX5_DEFAULT_PROF 2 | 69 | #define MLX5_DEFAULT_PROF 2 |
70 | static int prof_sel = MLX5_DEFAULT_PROF; | 70 | static unsigned int prof_sel = MLX5_DEFAULT_PROF; |
71 | module_param_named(prof_sel, prof_sel, int, 0444); | 71 | module_param_named(prof_sel, prof_sel, uint, 0444); |
72 | MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2"); | 72 | MODULE_PARM_DESC(prof_sel, "profile selector. Valid range 0 - 2"); |
73 | 73 | ||
74 | enum { | 74 | enum { |
@@ -732,13 +732,15 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev) | |||
732 | u8 status; | 732 | u8 status; |
733 | 733 | ||
734 | mlx5_cmd_mbox_status(query_out, &status, &syndrome); | 734 | mlx5_cmd_mbox_status(query_out, &status, &syndrome); |
735 | if (status == MLX5_CMD_STAT_BAD_OP_ERR) { | 735 | if (!status || syndrome == MLX5_DRIVER_SYND) { |
736 | pr_debug("Only ISSI 0 is supported\n"); | 736 | mlx5_core_err(dev, "Failed to query ISSI err(%d) status(%d) synd(%d)\n", |
737 | return 0; | 737 | err, status, syndrome); |
738 | return err; | ||
738 | } | 739 | } |
739 | 740 | ||
740 | pr_err("failed to query ISSI err(%d)\n", err); | 741 | mlx5_core_warn(dev, "Query ISSI is not supported by FW, ISSI is 0\n"); |
741 | return err; | 742 | dev->issi = 0; |
743 | return 0; | ||
742 | } | 744 | } |
743 | 745 | ||
744 | sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0); | 746 | sup_issi = MLX5_GET(query_issi_out, query_out, supported_issi_dw0); |
@@ -752,7 +754,8 @@ static int mlx5_core_set_issi(struct mlx5_core_dev *dev) | |||
752 | err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), | 754 | err = mlx5_cmd_exec(dev, set_in, sizeof(set_in), |
753 | set_out, sizeof(set_out)); | 755 | set_out, sizeof(set_out)); |
754 | if (err) { | 756 | if (err) { |
755 | pr_err("failed to set ISSI=1 err(%d)\n", err); | 757 | mlx5_core_err(dev, "Failed to set ISSI to 1 err(%d)\n", |
758 | err); | ||
756 | return err; | 759 | return err; |
757 | } | 760 | } |
758 | 761 | ||
@@ -1227,13 +1230,6 @@ static int init_one(struct pci_dev *pdev, | |||
1227 | 1230 | ||
1228 | dev->pdev = pdev; | 1231 | dev->pdev = pdev; |
1229 | dev->event = mlx5_core_event; | 1232 | dev->event = mlx5_core_event; |
1230 | |||
1231 | if (prof_sel < 0 || prof_sel >= ARRAY_SIZE(profile)) { | ||
1232 | mlx5_core_warn(dev, | ||
1233 | "selected profile out of range, selecting default (%d)\n", | ||
1234 | MLX5_DEFAULT_PROF); | ||
1235 | prof_sel = MLX5_DEFAULT_PROF; | ||
1236 | } | ||
1237 | dev->profile = &profile[prof_sel]; | 1233 | dev->profile = &profile[prof_sel]; |
1238 | 1234 | ||
1239 | INIT_LIST_HEAD(&priv->ctx_list); | 1235 | INIT_LIST_HEAD(&priv->ctx_list); |
@@ -1450,10 +1446,22 @@ static struct pci_driver mlx5_core_driver = { | |||
1450 | .sriov_configure = mlx5_core_sriov_configure, | 1446 | .sriov_configure = mlx5_core_sriov_configure, |
1451 | }; | 1447 | }; |
1452 | 1448 | ||
1449 | static void mlx5_core_verify_params(void) | ||
1450 | { | ||
1451 | if (prof_sel >= ARRAY_SIZE(profile)) { | ||
1452 | pr_warn("mlx5_core: WARNING: Invalid module parameter prof_sel %d, valid range 0-%zu, changing back to default(%d)\n", | ||
1453 | prof_sel, | ||
1454 | ARRAY_SIZE(profile) - 1, | ||
1455 | MLX5_DEFAULT_PROF); | ||
1456 | prof_sel = MLX5_DEFAULT_PROF; | ||
1457 | } | ||
1458 | } | ||
1459 | |||
1453 | static int __init init(void) | 1460 | static int __init init(void) |
1454 | { | 1461 | { |
1455 | int err; | 1462 | int err; |
1456 | 1463 | ||
1464 | mlx5_core_verify_params(); | ||
1457 | mlx5_register_debugfs(); | 1465 | mlx5_register_debugfs(); |
1458 | 1466 | ||
1459 | err = pci_register_driver(&mlx5_core_driver); | 1467 | err = pci_register_driver(&mlx5_core_driver); |
diff --git a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h index 187662c8ea96..63b9a0dba885 100644 --- a/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h +++ b/drivers/net/ethernet/mellanox/mlx5/core/mlx5_core.h | |||
@@ -44,11 +44,11 @@ | |||
44 | 44 | ||
45 | #define MLX5_TOTAL_VPORTS(mdev) (1 + pci_sriov_get_totalvfs(mdev->pdev)) | 45 | #define MLX5_TOTAL_VPORTS(mdev) (1 + pci_sriov_get_totalvfs(mdev->pdev)) |
46 | 46 | ||
47 | extern int mlx5_core_debug_mask; | 47 | extern uint mlx5_core_debug_mask; |
48 | 48 | ||
49 | #define mlx5_core_dbg(__dev, format, ...) \ | 49 | #define mlx5_core_dbg(__dev, format, ...) \ |
50 | dev_dbg(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format, \ | 50 | dev_dbg(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \ |
51 | (__dev)->priv.name, __func__, __LINE__, current->pid, \ | 51 | __func__, __LINE__, current->pid, \ |
52 | ##__VA_ARGS__) | 52 | ##__VA_ARGS__) |
53 | 53 | ||
54 | #define mlx5_core_dbg_mask(__dev, mask, format, ...) \ | 54 | #define mlx5_core_dbg_mask(__dev, mask, format, ...) \ |
@@ -63,8 +63,8 @@ do { \ | |||
63 | ##__VA_ARGS__) | 63 | ##__VA_ARGS__) |
64 | 64 | ||
65 | #define mlx5_core_warn(__dev, format, ...) \ | 65 | #define mlx5_core_warn(__dev, format, ...) \ |
66 | dev_warn(&(__dev)->pdev->dev, "%s:%s:%d:(pid %d): " format, \ | 66 | dev_warn(&(__dev)->pdev->dev, "%s:%d:(pid %d): " format, \ |
67 | (__dev)->priv.name, __func__, __LINE__, current->pid, \ | 67 | __func__, __LINE__, current->pid, \ |
68 | ##__VA_ARGS__) | 68 | ##__VA_ARGS__) |
69 | 69 | ||
70 | #define mlx5_core_info(__dev, format, ...) \ | 70 | #define mlx5_core_info(__dev, format, ...) \ |
@@ -75,6 +75,11 @@ enum { | |||
75 | MLX5_CMD_TIME, /* print command execution time */ | 75 | MLX5_CMD_TIME, /* print command execution time */ |
76 | }; | 76 | }; |
77 | 77 | ||
78 | enum { | ||
79 | MLX5_DRIVER_STATUS_ABORTED = 0xfe, | ||
80 | MLX5_DRIVER_SYND = 0xbadd00de, | ||
81 | }; | ||
82 | |||
78 | int mlx5_query_hca_caps(struct mlx5_core_dev *dev); | 83 | int mlx5_query_hca_caps(struct mlx5_core_dev *dev); |
79 | int mlx5_query_board_id(struct mlx5_core_dev *dev); | 84 | int mlx5_query_board_id(struct mlx5_core_dev *dev); |
80 | int mlx5_cmd_init_hca(struct mlx5_core_dev *dev); | 85 | int mlx5_cmd_init_hca(struct mlx5_core_dev *dev); |