diff options
author | Rex Zhu <Rex.Zhu@amd.com> | 2017-06-24 06:27:07 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2017-07-14 11:06:08 -0400 |
commit | 3272cfcf73b9e0932a037ed711347ce9dc97c16e (patch) | |
tree | d28409bba443e71992dbe87cc0e7d1cce8e8a9ed | |
parent | b7437509525a2de463594c77dc66bf675f8f99fd (diff) |
drm/amd/powerplay: export ACG related smu message for vega10
Signed-off-by: Rex Zhu <Rex.Zhu@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/smu9.h | 13 | ||||
-rw-r--r-- | drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h | 4 |
2 files changed, 11 insertions, 6 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/inc/smu9.h b/drivers/gpu/drm/amd/powerplay/inc/smu9.h index 9ef2490c7c2e..550ed675027a 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/smu9.h +++ b/drivers/gpu/drm/amd/powerplay/inc/smu9.h | |||
@@ -55,9 +55,9 @@ | |||
55 | #define FEATURE_FW_CTF_BIT 23 | 55 | #define FEATURE_FW_CTF_BIT 23 |
56 | #define FEATURE_LED_DISPLAY_BIT 24 | 56 | #define FEATURE_LED_DISPLAY_BIT 24 |
57 | #define FEATURE_FAN_CONTROL_BIT 25 | 57 | #define FEATURE_FAN_CONTROL_BIT 25 |
58 | #define FEATURE_VOLTAGE_CONTROLLER_BIT 26 | 58 | #define FEATURE_FAST_PPT_BIT 26 |
59 | #define FEATURE_SPARE_27_BIT 27 | 59 | #define FEATURE_GFX_EDC_BIT 27 |
60 | #define FEATURE_SPARE_28_BIT 28 | 60 | #define FEATURE_ACG_BIT 28 |
61 | #define FEATURE_SPARE_29_BIT 29 | 61 | #define FEATURE_SPARE_29_BIT 29 |
62 | #define FEATURE_SPARE_30_BIT 30 | 62 | #define FEATURE_SPARE_30_BIT 30 |
63 | #define FEATURE_SPARE_31_BIT 31 | 63 | #define FEATURE_SPARE_31_BIT 31 |
@@ -90,9 +90,10 @@ | |||
90 | #define FFEATURE_FW_CTF_MASK (1 << FEATURE_FW_CTF_BIT ) | 90 | #define FFEATURE_FW_CTF_MASK (1 << FEATURE_FW_CTF_BIT ) |
91 | #define FFEATURE_LED_DISPLAY_MASK (1 << FEATURE_LED_DISPLAY_BIT ) | 91 | #define FFEATURE_LED_DISPLAY_MASK (1 << FEATURE_LED_DISPLAY_BIT ) |
92 | #define FFEATURE_FAN_CONTROL_MASK (1 << FEATURE_FAN_CONTROL_BIT ) | 92 | #define FFEATURE_FAN_CONTROL_MASK (1 << FEATURE_FAN_CONTROL_BIT ) |
93 | #define FFEATURE_VOLTAGE_CONTROLLER_MASK (1 << FEATURE_VOLTAGE_CONTROLLER_BIT ) | 93 | |
94 | #define FFEATURE_SPARE_27_MASK (1 << FEATURE_SPARE_27_BIT ) | 94 | #define FEATURE_FAST_PPT_MASK (1 << FAST_PPT_BIT ) |
95 | #define FFEATURE_SPARE_28_MASK (1 << FEATURE_SPARE_28_BIT ) | 95 | #define FEATURE_GFX_EDC_MASK (1 << FEATURE_GFX_EDC_BIT ) |
96 | #define FEATURE_ACG_MASK (1 << FEATURE_ACG_BIT ) | ||
96 | #define FFEATURE_SPARE_29_MASK (1 << FEATURE_SPARE_29_BIT ) | 97 | #define FFEATURE_SPARE_29_MASK (1 << FEATURE_SPARE_29_BIT ) |
97 | #define FFEATURE_SPARE_30_MASK (1 << FEATURE_SPARE_30_BIT ) | 98 | #define FFEATURE_SPARE_30_MASK (1 << FEATURE_SPARE_30_BIT ) |
98 | #define FFEATURE_SPARE_31_MASK (1 << FEATURE_SPARE_31_BIT ) | 99 | #define FFEATURE_SPARE_31_MASK (1 << FEATURE_SPARE_31_BIT ) |
diff --git a/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h b/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h index b4af9e85dfa5..cb070ebc7de1 100644 --- a/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h +++ b/drivers/gpu/drm/amd/powerplay/inc/vega10_ppsmc.h | |||
@@ -124,6 +124,10 @@ typedef uint16_t PPSMC_Result; | |||
124 | #define PPSMC_MSG_NumOfDisplays 0x56 | 124 | #define PPSMC_MSG_NumOfDisplays 0x56 |
125 | #define PPSMC_MSG_ReadSerialNumTop32 0x58 | 125 | #define PPSMC_MSG_ReadSerialNumTop32 0x58 |
126 | #define PPSMC_MSG_ReadSerialNumBottom32 0x59 | 126 | #define PPSMC_MSG_ReadSerialNumBottom32 0x59 |
127 | #define PPSMC_MSG_RunAcgBtc 0x5C | ||
128 | #define PPSMC_MSG_RunAcgInClosedLoop 0x5D | ||
129 | #define PPSMC_MSG_RunAcgInOpenLoop 0x5E | ||
130 | #define PPSMC_MSG_InitializeAcg 0x5F | ||
127 | #define PPSMC_MSG_GetCurrPkgPwr 0x61 | 131 | #define PPSMC_MSG_GetCurrPkgPwr 0x61 |
128 | #define PPSMC_Message_Count 0x62 | 132 | #define PPSMC_Message_Count 0x62 |
129 | 133 | ||