diff options
author | Alex Deucher <alexander.deucher@amd.com> | 2018-04-20 00:31:04 -0400 |
---|---|---|
committer | Alex Deucher <alexander.deucher@amd.com> | 2018-05-17 11:13:22 -0400 |
commit | 3251c0438a1efcc51c357f7014b33b9e02b129cd (patch) | |
tree | 1233c948b473ee84f7aa5487270bfbefb53b0477 | |
parent | 59b0b509f1ae0c7ca54607f2770a1aec6e55d8dc (diff) |
drm/amdgpu: Use vbios table for gpu info on vega20
Use the vbios table rather than gpu info firmware.
Squash of the following patches:
drm/amdgpu/vg20: fallback to vbios table if gpu info fw is not available (v2)
drm/amdgpu: drop gpu_info firmware for vega20
Reviewed-by: Amber Lin <Amber.Lin@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r-- | drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | 14 |
1 files changed, 12 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c index 13253e09f4bd..d7530fdfaad5 100644 --- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c +++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c | |||
@@ -27,6 +27,7 @@ | |||
27 | #include "amdgpu_gfx.h" | 27 | #include "amdgpu_gfx.h" |
28 | #include "soc15.h" | 28 | #include "soc15.h" |
29 | #include "soc15d.h" | 29 | #include "soc15d.h" |
30 | #include "amdgpu_atomfirmware.h" | ||
30 | 31 | ||
31 | #include "gc/gc_9_0_offset.h" | 32 | #include "gc/gc_9_0_offset.h" |
32 | #include "gc/gc_9_0_sh_mask.h" | 33 | #include "gc/gc_9_0_sh_mask.h" |
@@ -1113,9 +1114,10 @@ static const struct amdgpu_gfx_funcs gfx_v9_0_gfx_funcs = { | |||
1113 | .select_me_pipe_q = &gfx_v9_0_select_me_pipe_q | 1114 | .select_me_pipe_q = &gfx_v9_0_select_me_pipe_q |
1114 | }; | 1115 | }; |
1115 | 1116 | ||
1116 | static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) | 1117 | static int gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) |
1117 | { | 1118 | { |
1118 | u32 gb_addr_config; | 1119 | u32 gb_addr_config; |
1120 | int err; | ||
1119 | 1121 | ||
1120 | adev->gfx.funcs = &gfx_v9_0_gfx_funcs; | 1122 | adev->gfx.funcs = &gfx_v9_0_gfx_funcs; |
1121 | 1123 | ||
@@ -1146,6 +1148,10 @@ static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) | |||
1146 | gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); | 1148 | gb_addr_config = RREG32_SOC15(GC, 0, mmGB_ADDR_CONFIG); |
1147 | gb_addr_config &= ~0xf3e777ff; | 1149 | gb_addr_config &= ~0xf3e777ff; |
1148 | gb_addr_config |= 0x22014042; | 1150 | gb_addr_config |= 0x22014042; |
1151 | /* check vbios table if gpu info is not available */ | ||
1152 | err = amdgpu_atomfirmware_get_gfx_info(adev); | ||
1153 | if (err) | ||
1154 | return err; | ||
1149 | break; | 1155 | break; |
1150 | case CHIP_RAVEN: | 1156 | case CHIP_RAVEN: |
1151 | adev->gfx.config.max_hw_contexts = 8; | 1157 | adev->gfx.config.max_hw_contexts = 8; |
@@ -1196,6 +1202,8 @@ static void gfx_v9_0_gpu_early_init(struct amdgpu_device *adev) | |||
1196 | adev->gfx.config.gb_addr_config, | 1202 | adev->gfx.config.gb_addr_config, |
1197 | GB_ADDR_CONFIG, | 1203 | GB_ADDR_CONFIG, |
1198 | PIPE_INTERLEAVE_SIZE)); | 1204 | PIPE_INTERLEAVE_SIZE)); |
1205 | |||
1206 | return 0; | ||
1199 | } | 1207 | } |
1200 | 1208 | ||
1201 | static int gfx_v9_0_ngg_create_buf(struct amdgpu_device *adev, | 1209 | static int gfx_v9_0_ngg_create_buf(struct amdgpu_device *adev, |
@@ -1557,7 +1565,9 @@ static int gfx_v9_0_sw_init(void *handle) | |||
1557 | 1565 | ||
1558 | adev->gfx.ce_ram_size = 0x8000; | 1566 | adev->gfx.ce_ram_size = 0x8000; |
1559 | 1567 | ||
1560 | gfx_v9_0_gpu_early_init(adev); | 1568 | r = gfx_v9_0_gpu_early_init(adev); |
1569 | if (r) | ||
1570 | return r; | ||
1561 | 1571 | ||
1562 | r = gfx_v9_0_ngg_init(adev); | 1572 | r = gfx_v9_0_ngg_init(adev); |
1563 | if (r) | 1573 | if (r) |