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authorMonk Liu <Monk.Liu@amd.com>2017-09-15 06:57:12 -0400
committerAlex Deucher <alexander.deucher@amd.com>2017-09-26 15:14:08 -0400
commit3224a12b90f6bee789d2051b18a8249a82ad92d4 (patch)
treee0179f53a1d96585e54989e015f5058567d21744
parent7c3f2167b4b66a0994a643c8a3bcf01ec3433b8b (diff)
drm/amdgpu/sriov:move in_reset to adev and rename
currently in_reset is only used in sriov gpu reset, and it will be used for other non-gfx hw component later, like PSP, so move it from gfx to adev and rename to in_sriov_reset make more sense. Signed-off-by: Monk Liu <Monk.Liu@amd.com> Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu.h2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_device.c4
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c6
-rw-r--r--drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c6
4 files changed, 9 insertions, 9 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu.h b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
index ac026f5f56fb..33e1d619d060 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu.h
@@ -1018,7 +1018,6 @@ struct amdgpu_gfx {
1018 /* reset mask */ 1018 /* reset mask */
1019 uint32_t grbm_soft_reset; 1019 uint32_t grbm_soft_reset;
1020 uint32_t srbm_soft_reset; 1020 uint32_t srbm_soft_reset;
1021 bool in_reset;
1022 /* s3/s4 mask */ 1021 /* s3/s4 mask */
1023 bool in_suspend; 1022 bool in_suspend;
1024 /* NGG */ 1023 /* NGG */
@@ -1583,6 +1582,7 @@ struct amdgpu_device {
1583 1582
1584 /* record last mm index being written through WREG32*/ 1583 /* record last mm index being written through WREG32*/
1585 unsigned long last_mm_index; 1584 unsigned long last_mm_index;
1585 bool in_sriov_reset;
1586}; 1586};
1587 1587
1588static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev) 1588static inline struct amdgpu_device *amdgpu_ttm_adev(struct ttm_bo_device *bdev)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
index 36979e1d7b5f..506a26793ce6 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
@@ -2690,7 +2690,7 @@ int amdgpu_sriov_gpu_reset(struct amdgpu_device *adev, struct amdgpu_job *job)
2690 2690
2691 mutex_lock(&adev->virt.lock_reset); 2691 mutex_lock(&adev->virt.lock_reset);
2692 atomic_inc(&adev->gpu_reset_counter); 2692 atomic_inc(&adev->gpu_reset_counter);
2693 adev->gfx.in_reset = true; 2693 adev->in_sriov_reset = true;
2694 2694
2695 /* block TTM */ 2695 /* block TTM */
2696 resched = ttm_bo_lock_delayed_workqueue(&adev->mman.bdev); 2696 resched = ttm_bo_lock_delayed_workqueue(&adev->mman.bdev);
@@ -2801,7 +2801,7 @@ give_up_reset:
2801 dev_info(adev->dev, "GPU reset successed!\n"); 2801 dev_info(adev->dev, "GPU reset successed!\n");
2802 } 2802 }
2803 2803
2804 adev->gfx.in_reset = false; 2804 adev->in_sriov_reset = false;
2805 mutex_unlock(&adev->virt.lock_reset); 2805 mutex_unlock(&adev->virt.lock_reset);
2806 return r; 2806 return r;
2807} 2807}
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
index 666a1545e949..fe603cc2c4a9 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
@@ -4811,7 +4811,7 @@ static int gfx_v8_0_kiq_init_queue(struct amdgpu_ring *ring)
4811 4811
4812 gfx_v8_0_kiq_setting(ring); 4812 gfx_v8_0_kiq_setting(ring);
4813 4813
4814 if (adev->gfx.in_reset) { /* for GPU_RESET case */ 4814 if (adev->in_sriov_reset) { /* for GPU_RESET case */
4815 /* reset MQD to a clean status */ 4815 /* reset MQD to a clean status */
4816 if (adev->gfx.mec.mqd_backup[mqd_idx]) 4816 if (adev->gfx.mec.mqd_backup[mqd_idx])
4817 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct vi_mqd_allocation)); 4817 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct vi_mqd_allocation));
@@ -4848,7 +4848,7 @@ static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring)
4848 struct vi_mqd *mqd = ring->mqd_ptr; 4848 struct vi_mqd *mqd = ring->mqd_ptr;
4849 int mqd_idx = ring - &adev->gfx.compute_ring[0]; 4849 int mqd_idx = ring - &adev->gfx.compute_ring[0];
4850 4850
4851 if (!adev->gfx.in_reset && !adev->gfx.in_suspend) { 4851 if (!adev->in_sriov_reset && !adev->gfx.in_suspend) {
4852 memset((void *)mqd, 0, sizeof(struct vi_mqd_allocation)); 4852 memset((void *)mqd, 0, sizeof(struct vi_mqd_allocation));
4853 ((struct vi_mqd_allocation *)mqd)->dynamic_cu_mask = 0xFFFFFFFF; 4853 ((struct vi_mqd_allocation *)mqd)->dynamic_cu_mask = 0xFFFFFFFF;
4854 ((struct vi_mqd_allocation *)mqd)->dynamic_rb_mask = 0xFFFFFFFF; 4854 ((struct vi_mqd_allocation *)mqd)->dynamic_rb_mask = 0xFFFFFFFF;
@@ -4860,7 +4860,7 @@ static int gfx_v8_0_kcq_init_queue(struct amdgpu_ring *ring)
4860 4860
4861 if (adev->gfx.mec.mqd_backup[mqd_idx]) 4861 if (adev->gfx.mec.mqd_backup[mqd_idx])
4862 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct vi_mqd_allocation)); 4862 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct vi_mqd_allocation));
4863 } else if (adev->gfx.in_reset) { /* for GPU_RESET case */ 4863 } else if (adev->in_sriov_reset) { /* for GPU_RESET case */
4864 /* reset MQD to a clean status */ 4864 /* reset MQD to a clean status */
4865 if (adev->gfx.mec.mqd_backup[mqd_idx]) 4865 if (adev->gfx.mec.mqd_backup[mqd_idx])
4866 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct vi_mqd_allocation)); 4866 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct vi_mqd_allocation));
diff --git a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
index 72dbf890c65b..ecb9674bc803 100644
--- a/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c
@@ -2698,7 +2698,7 @@ static int gfx_v9_0_kiq_init_queue(struct amdgpu_ring *ring)
2698 2698
2699 gfx_v9_0_kiq_setting(ring); 2699 gfx_v9_0_kiq_setting(ring);
2700 2700
2701 if (adev->gfx.in_reset) { /* for GPU_RESET case */ 2701 if (adev->in_sriov_reset) { /* for GPU_RESET case */
2702 /* reset MQD to a clean status */ 2702 /* reset MQD to a clean status */
2703 if (adev->gfx.mec.mqd_backup[mqd_idx]) 2703 if (adev->gfx.mec.mqd_backup[mqd_idx])
2704 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct v9_mqd_allocation)); 2704 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct v9_mqd_allocation));
@@ -2736,7 +2736,7 @@ static int gfx_v9_0_kcq_init_queue(struct amdgpu_ring *ring)
2736 struct v9_mqd *mqd = ring->mqd_ptr; 2736 struct v9_mqd *mqd = ring->mqd_ptr;
2737 int mqd_idx = ring - &adev->gfx.compute_ring[0]; 2737 int mqd_idx = ring - &adev->gfx.compute_ring[0];
2738 2738
2739 if (!adev->gfx.in_reset && !adev->gfx.in_suspend) { 2739 if (!adev->in_sriov_reset && !adev->gfx.in_suspend) {
2740 memset((void *)mqd, 0, sizeof(struct v9_mqd_allocation)); 2740 memset((void *)mqd, 0, sizeof(struct v9_mqd_allocation));
2741 ((struct v9_mqd_allocation *)mqd)->dynamic_cu_mask = 0xFFFFFFFF; 2741 ((struct v9_mqd_allocation *)mqd)->dynamic_cu_mask = 0xFFFFFFFF;
2742 ((struct v9_mqd_allocation *)mqd)->dynamic_rb_mask = 0xFFFFFFFF; 2742 ((struct v9_mqd_allocation *)mqd)->dynamic_rb_mask = 0xFFFFFFFF;
@@ -2748,7 +2748,7 @@ static int gfx_v9_0_kcq_init_queue(struct amdgpu_ring *ring)
2748 2748
2749 if (adev->gfx.mec.mqd_backup[mqd_idx]) 2749 if (adev->gfx.mec.mqd_backup[mqd_idx])
2750 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct v9_mqd_allocation)); 2750 memcpy(adev->gfx.mec.mqd_backup[mqd_idx], mqd, sizeof(struct v9_mqd_allocation));
2751 } else if (adev->gfx.in_reset) { /* for GPU_RESET case */ 2751 } else if (adev->in_sriov_reset) { /* for GPU_RESET case */
2752 /* reset MQD to a clean status */ 2752 /* reset MQD to a clean status */
2753 if (adev->gfx.mec.mqd_backup[mqd_idx]) 2753 if (adev->gfx.mec.mqd_backup[mqd_idx])
2754 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct v9_mqd_allocation)); 2754 memcpy(mqd, adev->gfx.mec.mqd_backup[mqd_idx], sizeof(struct v9_mqd_allocation));