diff options
author | Jani Nikula <jani.nikula@intel.com> | 2018-11-16 07:07:26 -0500 |
---|---|---|
committer | Jani Nikula <jani.nikula@intel.com> | 2018-11-20 05:42:33 -0500 |
commit | 3122b9c52705eec649c0dde5d9d8a9983b8c2572 (patch) | |
tree | d319cf1addcfc7f377d93315aafb17c2dda8731b | |
parent | 2d332ee12396d8f9007e1f896c48cc9088cf55be (diff) |
drm/i915/fixed: prefer kernel types over stdint types
While at it, conform to kernel spacing (i.e. no space) after cast. No
functional changes.
Reviewed-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20181116120729.7580-2-jani.nikula@intel.com
-rw-r--r-- | drivers/gpu/drm/i915/i915_fixed.h | 61 |
1 files changed, 29 insertions, 32 deletions
diff --git a/drivers/gpu/drm/i915/i915_fixed.h b/drivers/gpu/drm/i915/i915_fixed.h index c974e51c6d8b..6c914940b4a9 100644 --- a/drivers/gpu/drm/i915/i915_fixed.h +++ b/drivers/gpu/drm/i915/i915_fixed.h | |||
@@ -7,7 +7,7 @@ | |||
7 | #define _I915_FIXED_H_ | 7 | #define _I915_FIXED_H_ |
8 | 8 | ||
9 | typedef struct { | 9 | typedef struct { |
10 | uint32_t val; | 10 | u32 val; |
11 | } uint_fixed_16_16_t; | 11 | } uint_fixed_16_16_t; |
12 | 12 | ||
13 | #define FP_16_16_MAX ({ \ | 13 | #define FP_16_16_MAX ({ \ |
@@ -23,7 +23,7 @@ static inline bool is_fixed16_zero(uint_fixed_16_16_t val) | |||
23 | return false; | 23 | return false; |
24 | } | 24 | } |
25 | 25 | ||
26 | static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val) | 26 | static inline uint_fixed_16_16_t u32_to_fixed16(u32 val) |
27 | { | 27 | { |
28 | uint_fixed_16_16_t fp; | 28 | uint_fixed_16_16_t fp; |
29 | 29 | ||
@@ -33,12 +33,12 @@ static inline uint_fixed_16_16_t u32_to_fixed16(uint32_t val) | |||
33 | return fp; | 33 | return fp; |
34 | } | 34 | } |
35 | 35 | ||
36 | static inline uint32_t fixed16_to_u32_round_up(uint_fixed_16_16_t fp) | 36 | static inline u32 fixed16_to_u32_round_up(uint_fixed_16_16_t fp) |
37 | { | 37 | { |
38 | return DIV_ROUND_UP(fp.val, 1 << 16); | 38 | return DIV_ROUND_UP(fp.val, 1 << 16); |
39 | } | 39 | } |
40 | 40 | ||
41 | static inline uint32_t fixed16_to_u32(uint_fixed_16_16_t fp) | 41 | static inline u32 fixed16_to_u32(uint_fixed_16_16_t fp) |
42 | { | 42 | { |
43 | return fp.val >> 16; | 43 | return fp.val >> 16; |
44 | } | 44 | } |
@@ -61,86 +61,83 @@ static inline uint_fixed_16_16_t max_fixed16(uint_fixed_16_16_t max1, | |||
61 | return max; | 61 | return max; |
62 | } | 62 | } |
63 | 63 | ||
64 | static inline uint_fixed_16_16_t clamp_u64_to_fixed16(uint64_t val) | 64 | static inline uint_fixed_16_16_t clamp_u64_to_fixed16(u64 val) |
65 | { | 65 | { |
66 | uint_fixed_16_16_t fp; | 66 | uint_fixed_16_16_t fp; |
67 | WARN_ON(val > U32_MAX); | 67 | WARN_ON(val > U32_MAX); |
68 | fp.val = (uint32_t) val; | 68 | fp.val = (u32)val; |
69 | return fp; | 69 | return fp; |
70 | } | 70 | } |
71 | 71 | ||
72 | static inline uint32_t div_round_up_fixed16(uint_fixed_16_16_t val, | 72 | static inline u32 div_round_up_fixed16(uint_fixed_16_16_t val, |
73 | uint_fixed_16_16_t d) | 73 | uint_fixed_16_16_t d) |
74 | { | 74 | { |
75 | return DIV_ROUND_UP(val.val, d.val); | 75 | return DIV_ROUND_UP(val.val, d.val); |
76 | } | 76 | } |
77 | 77 | ||
78 | static inline uint32_t mul_round_up_u32_fixed16(uint32_t val, | 78 | static inline u32 mul_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t mul) |
79 | uint_fixed_16_16_t mul) | ||
80 | { | 79 | { |
81 | uint64_t intermediate_val; | 80 | u64 intermediate_val; |
82 | 81 | ||
83 | intermediate_val = (uint64_t) val * mul.val; | 82 | intermediate_val = (u64)val * mul.val; |
84 | intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16); | 83 | intermediate_val = DIV_ROUND_UP_ULL(intermediate_val, 1 << 16); |
85 | WARN_ON(intermediate_val > U32_MAX); | 84 | WARN_ON(intermediate_val > U32_MAX); |
86 | return (uint32_t) intermediate_val; | 85 | return (u32)intermediate_val; |
87 | } | 86 | } |
88 | 87 | ||
89 | static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val, | 88 | static inline uint_fixed_16_16_t mul_fixed16(uint_fixed_16_16_t val, |
90 | uint_fixed_16_16_t mul) | 89 | uint_fixed_16_16_t mul) |
91 | { | 90 | { |
92 | uint64_t intermediate_val; | 91 | u64 intermediate_val; |
93 | 92 | ||
94 | intermediate_val = (uint64_t) val.val * mul.val; | 93 | intermediate_val = (u64)val.val * mul.val; |
95 | intermediate_val = intermediate_val >> 16; | 94 | intermediate_val = intermediate_val >> 16; |
96 | return clamp_u64_to_fixed16(intermediate_val); | 95 | return clamp_u64_to_fixed16(intermediate_val); |
97 | } | 96 | } |
98 | 97 | ||
99 | static inline uint_fixed_16_16_t div_fixed16(uint32_t val, uint32_t d) | 98 | static inline uint_fixed_16_16_t div_fixed16(u32 val, u32 d) |
100 | { | 99 | { |
101 | uint64_t interm_val; | 100 | u64 interm_val; |
102 | 101 | ||
103 | interm_val = (uint64_t)val << 16; | 102 | interm_val = (u64)val << 16; |
104 | interm_val = DIV_ROUND_UP_ULL(interm_val, d); | 103 | interm_val = DIV_ROUND_UP_ULL(interm_val, d); |
105 | return clamp_u64_to_fixed16(interm_val); | 104 | return clamp_u64_to_fixed16(interm_val); |
106 | } | 105 | } |
107 | 106 | ||
108 | static inline uint32_t div_round_up_u32_fixed16(uint32_t val, | 107 | static inline u32 div_round_up_u32_fixed16(u32 val, uint_fixed_16_16_t d) |
109 | uint_fixed_16_16_t d) | ||
110 | { | 108 | { |
111 | uint64_t interm_val; | 109 | u64 interm_val; |
112 | 110 | ||
113 | interm_val = (uint64_t)val << 16; | 111 | interm_val = (u64)val << 16; |
114 | interm_val = DIV_ROUND_UP_ULL(interm_val, d.val); | 112 | interm_val = DIV_ROUND_UP_ULL(interm_val, d.val); |
115 | WARN_ON(interm_val > U32_MAX); | 113 | WARN_ON(interm_val > U32_MAX); |
116 | return (uint32_t) interm_val; | 114 | return (u32)interm_val; |
117 | } | 115 | } |
118 | 116 | ||
119 | static inline uint_fixed_16_16_t mul_u32_fixed16(uint32_t val, | 117 | static inline uint_fixed_16_16_t mul_u32_fixed16(u32 val, uint_fixed_16_16_t mul) |
120 | uint_fixed_16_16_t mul) | ||
121 | { | 118 | { |
122 | uint64_t intermediate_val; | 119 | u64 intermediate_val; |
123 | 120 | ||
124 | intermediate_val = (uint64_t) val * mul.val; | 121 | intermediate_val = (u64)val * mul.val; |
125 | return clamp_u64_to_fixed16(intermediate_val); | 122 | return clamp_u64_to_fixed16(intermediate_val); |
126 | } | 123 | } |
127 | 124 | ||
128 | static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1, | 125 | static inline uint_fixed_16_16_t add_fixed16(uint_fixed_16_16_t add1, |
129 | uint_fixed_16_16_t add2) | 126 | uint_fixed_16_16_t add2) |
130 | { | 127 | { |
131 | uint64_t interm_sum; | 128 | u64 interm_sum; |
132 | 129 | ||
133 | interm_sum = (uint64_t) add1.val + add2.val; | 130 | interm_sum = (u64)add1.val + add2.val; |
134 | return clamp_u64_to_fixed16(interm_sum); | 131 | return clamp_u64_to_fixed16(interm_sum); |
135 | } | 132 | } |
136 | 133 | ||
137 | static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1, | 134 | static inline uint_fixed_16_16_t add_fixed16_u32(uint_fixed_16_16_t add1, |
138 | uint32_t add2) | 135 | u32 add2) |
139 | { | 136 | { |
140 | uint64_t interm_sum; | 137 | u64 interm_sum; |
141 | uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2); | 138 | uint_fixed_16_16_t interm_add2 = u32_to_fixed16(add2); |
142 | 139 | ||
143 | interm_sum = (uint64_t) add1.val + interm_add2.val; | 140 | interm_sum = (u64)add1.val + interm_add2.val; |
144 | return clamp_u64_to_fixed16(interm_sum); | 141 | return clamp_u64_to_fixed16(interm_sum); |
145 | } | 142 | } |
146 | 143 | ||