diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2018-07-16 13:24:52 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2018-07-16 13:24:52 -0400 |
commit | 30b06abfb92bfd5f9b63ea6a2ffb0bd905d1a6da (patch) | |
tree | b561275d18641a7d81d636616a5fcf7b2cbac6d0 | |
parent | 706bf68b4339adf57cf7325561fddd8a3b41fa8e (diff) | |
parent | c29e9da56bebb4c2c794e871b0dc0298bbf08142 (diff) |
Merge tag 'pinctrl-v4.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control fixes from Linus Walleij:
- A slew of driver fixes for Mediatek mt7622
- Fix a direction inversion bug in the Ingenic driver
- Fix unsupported drive strength setting on the PFC r8a77970
- Off by one and NULL dereference fixes in the NSP driver
* tag 'pinctrl-v4.18-3' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl:
pinctrl: nsp: Fix potential NULL dereference
pinctrl: nsp: off by ones in nsp_pinmux_enable()
pinctrl: sh-pfc: r8a77970: remove SH_PFC_PIN_CFG_DRIVE_STRENGTH flag
pinctrl: ingenic: Fix inverted direction for < JZ4770
pinctrl: mt7622: fix a kernel panic when gpio-hog is being applied
pinctrl: mt7622: stop using the deprecated pinctrl_add_gpio_range
pinctrl: mt7622: fix that pinctrl_claim_hogs cannot work
pinctrl: mt7622: fix initialization sequence between eint and gpiochip
pinctrl: mt7622: fix error path on failing at groups building
-rw-r--r-- | drivers/pinctrl/bcm/pinctrl-nsp-mux.c | 6 | ||||
-rw-r--r-- | drivers/pinctrl/mediatek/pinctrl-mt7622.c | 48 | ||||
-rw-r--r-- | drivers/pinctrl/pinctrl-ingenic.c | 2 | ||||
-rw-r--r-- | drivers/pinctrl/sh-pfc/pfc-r8a77970.c | 14 |
4 files changed, 44 insertions, 26 deletions
diff --git a/drivers/pinctrl/bcm/pinctrl-nsp-mux.c b/drivers/pinctrl/bcm/pinctrl-nsp-mux.c index 35c17653c694..87618a4e90e4 100644 --- a/drivers/pinctrl/bcm/pinctrl-nsp-mux.c +++ b/drivers/pinctrl/bcm/pinctrl-nsp-mux.c | |||
@@ -460,8 +460,8 @@ static int nsp_pinmux_enable(struct pinctrl_dev *pctrl_dev, | |||
460 | const struct nsp_pin_function *func; | 460 | const struct nsp_pin_function *func; |
461 | const struct nsp_pin_group *grp; | 461 | const struct nsp_pin_group *grp; |
462 | 462 | ||
463 | if (grp_select > pinctrl->num_groups || | 463 | if (grp_select >= pinctrl->num_groups || |
464 | func_select > pinctrl->num_functions) | 464 | func_select >= pinctrl->num_functions) |
465 | return -EINVAL; | 465 | return -EINVAL; |
466 | 466 | ||
467 | func = &pinctrl->functions[func_select]; | 467 | func = &pinctrl->functions[func_select]; |
@@ -577,6 +577,8 @@ static int nsp_pinmux_probe(struct platform_device *pdev) | |||
577 | return PTR_ERR(pinctrl->base0); | 577 | return PTR_ERR(pinctrl->base0); |
578 | 578 | ||
579 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); | 579 | res = platform_get_resource(pdev, IORESOURCE_MEM, 1); |
580 | if (!res) | ||
581 | return -EINVAL; | ||
580 | pinctrl->base1 = devm_ioremap_nocache(&pdev->dev, res->start, | 582 | pinctrl->base1 = devm_ioremap_nocache(&pdev->dev, res->start, |
581 | resource_size(res)); | 583 | resource_size(res)); |
582 | if (!pinctrl->base1) { | 584 | if (!pinctrl->base1) { |
diff --git a/drivers/pinctrl/mediatek/pinctrl-mt7622.c b/drivers/pinctrl/mediatek/pinctrl-mt7622.c index e3f1ab2290fc..4c4740ffeb9c 100644 --- a/drivers/pinctrl/mediatek/pinctrl-mt7622.c +++ b/drivers/pinctrl/mediatek/pinctrl-mt7622.c | |||
@@ -1424,7 +1424,7 @@ static struct pinctrl_desc mtk_desc = { | |||
1424 | 1424 | ||
1425 | static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) | 1425 | static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) |
1426 | { | 1426 | { |
1427 | struct mtk_pinctrl *hw = dev_get_drvdata(chip->parent); | 1427 | struct mtk_pinctrl *hw = gpiochip_get_data(chip); |
1428 | int value, err; | 1428 | int value, err; |
1429 | 1429 | ||
1430 | err = mtk_hw_get_value(hw, gpio, PINCTRL_PIN_REG_DI, &value); | 1430 | err = mtk_hw_get_value(hw, gpio, PINCTRL_PIN_REG_DI, &value); |
@@ -1436,7 +1436,7 @@ static int mtk_gpio_get(struct gpio_chip *chip, unsigned int gpio) | |||
1436 | 1436 | ||
1437 | static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) | 1437 | static void mtk_gpio_set(struct gpio_chip *chip, unsigned int gpio, int value) |
1438 | { | 1438 | { |
1439 | struct mtk_pinctrl *hw = dev_get_drvdata(chip->parent); | 1439 | struct mtk_pinctrl *hw = gpiochip_get_data(chip); |
1440 | 1440 | ||
1441 | mtk_hw_set_value(hw, gpio, PINCTRL_PIN_REG_DO, !!value); | 1441 | mtk_hw_set_value(hw, gpio, PINCTRL_PIN_REG_DO, !!value); |
1442 | } | 1442 | } |
@@ -1508,11 +1508,20 @@ static int mtk_build_gpiochip(struct mtk_pinctrl *hw, struct device_node *np) | |||
1508 | if (ret < 0) | 1508 | if (ret < 0) |
1509 | return ret; | 1509 | return ret; |
1510 | 1510 | ||
1511 | ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0, | 1511 | /* Just for backward compatible for these old pinctrl nodes without |
1512 | chip->ngpio); | 1512 | * "gpio-ranges" property. Otherwise, called directly from a |
1513 | if (ret < 0) { | 1513 | * DeviceTree-supported pinctrl driver is DEPRECATED. |
1514 | gpiochip_remove(chip); | 1514 | * Please see Section 2.1 of |
1515 | return ret; | 1515 | * Documentation/devicetree/bindings/gpio/gpio.txt on how to |
1516 | * bind pinctrl and gpio drivers via the "gpio-ranges" property. | ||
1517 | */ | ||
1518 | if (!of_find_property(np, "gpio-ranges", NULL)) { | ||
1519 | ret = gpiochip_add_pin_range(chip, dev_name(hw->dev), 0, 0, | ||
1520 | chip->ngpio); | ||
1521 | if (ret < 0) { | ||
1522 | gpiochip_remove(chip); | ||
1523 | return ret; | ||
1524 | } | ||
1516 | } | 1525 | } |
1517 | 1526 | ||
1518 | return 0; | 1527 | return 0; |
@@ -1695,15 +1704,16 @@ static int mtk_pinctrl_probe(struct platform_device *pdev) | |||
1695 | mtk_desc.custom_conf_items = mtk_conf_items; | 1704 | mtk_desc.custom_conf_items = mtk_conf_items; |
1696 | #endif | 1705 | #endif |
1697 | 1706 | ||
1698 | hw->pctrl = devm_pinctrl_register(&pdev->dev, &mtk_desc, hw); | 1707 | err = devm_pinctrl_register_and_init(&pdev->dev, &mtk_desc, hw, |
1699 | if (IS_ERR(hw->pctrl)) | 1708 | &hw->pctrl); |
1700 | return PTR_ERR(hw->pctrl); | 1709 | if (err) |
1710 | return err; | ||
1701 | 1711 | ||
1702 | /* Setup groups descriptions per SoC types */ | 1712 | /* Setup groups descriptions per SoC types */ |
1703 | err = mtk_build_groups(hw); | 1713 | err = mtk_build_groups(hw); |
1704 | if (err) { | 1714 | if (err) { |
1705 | dev_err(&pdev->dev, "Failed to build groups\n"); | 1715 | dev_err(&pdev->dev, "Failed to build groups\n"); |
1706 | return 0; | 1716 | return err; |
1707 | } | 1717 | } |
1708 | 1718 | ||
1709 | /* Setup functions descriptions per SoC types */ | 1719 | /* Setup functions descriptions per SoC types */ |
@@ -1713,17 +1723,25 @@ static int mtk_pinctrl_probe(struct platform_device *pdev) | |||
1713 | return err; | 1723 | return err; |
1714 | } | 1724 | } |
1715 | 1725 | ||
1716 | err = mtk_build_gpiochip(hw, pdev->dev.of_node); | 1726 | /* For able to make pinctrl_claim_hogs, we must not enable pinctrl |
1717 | if (err) { | 1727 | * until all groups and functions are being added one. |
1718 | dev_err(&pdev->dev, "Failed to add gpio_chip\n"); | 1728 | */ |
1729 | err = pinctrl_enable(hw->pctrl); | ||
1730 | if (err) | ||
1719 | return err; | 1731 | return err; |
1720 | } | ||
1721 | 1732 | ||
1722 | err = mtk_build_eint(hw, pdev); | 1733 | err = mtk_build_eint(hw, pdev); |
1723 | if (err) | 1734 | if (err) |
1724 | dev_warn(&pdev->dev, | 1735 | dev_warn(&pdev->dev, |
1725 | "Failed to add EINT, but pinctrl still can work\n"); | 1736 | "Failed to add EINT, but pinctrl still can work\n"); |
1726 | 1737 | ||
1738 | /* Build gpiochip should be after pinctrl_enable is done */ | ||
1739 | err = mtk_build_gpiochip(hw, pdev->dev.of_node); | ||
1740 | if (err) { | ||
1741 | dev_err(&pdev->dev, "Failed to add gpio_chip\n"); | ||
1742 | return err; | ||
1743 | } | ||
1744 | |||
1727 | platform_set_drvdata(pdev, hw); | 1745 | platform_set_drvdata(pdev, hw); |
1728 | 1746 | ||
1729 | return 0; | 1747 | return 0; |
diff --git a/drivers/pinctrl/pinctrl-ingenic.c b/drivers/pinctrl/pinctrl-ingenic.c index a1d7156d0a43..6a1b6058b991 100644 --- a/drivers/pinctrl/pinctrl-ingenic.c +++ b/drivers/pinctrl/pinctrl-ingenic.c | |||
@@ -536,7 +536,7 @@ static int ingenic_pinmux_gpio_set_direction(struct pinctrl_dev *pctldev, | |||
536 | ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, input); | 536 | ingenic_config_pin(jzpc, pin, JZ4770_GPIO_PAT1, input); |
537 | } else { | 537 | } else { |
538 | ingenic_config_pin(jzpc, pin, JZ4740_GPIO_SELECT, false); | 538 | ingenic_config_pin(jzpc, pin, JZ4740_GPIO_SELECT, false); |
539 | ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DIR, input); | 539 | ingenic_config_pin(jzpc, pin, JZ4740_GPIO_DIR, !input); |
540 | ingenic_config_pin(jzpc, pin, JZ4740_GPIO_FUNC, false); | 540 | ingenic_config_pin(jzpc, pin, JZ4740_GPIO_FUNC, false); |
541 | } | 541 | } |
542 | 542 | ||
diff --git a/drivers/pinctrl/sh-pfc/pfc-r8a77970.c b/drivers/pinctrl/sh-pfc/pfc-r8a77970.c index b02caf316711..eeb58b3bbc9a 100644 --- a/drivers/pinctrl/sh-pfc/pfc-r8a77970.c +++ b/drivers/pinctrl/sh-pfc/pfc-r8a77970.c | |||
@@ -21,15 +21,13 @@ | |||
21 | #include "core.h" | 21 | #include "core.h" |
22 | #include "sh_pfc.h" | 22 | #include "sh_pfc.h" |
23 | 23 | ||
24 | #define CFG_FLAGS SH_PFC_PIN_CFG_DRIVE_STRENGTH | ||
25 | |||
26 | #define CPU_ALL_PORT(fn, sfx) \ | 24 | #define CPU_ALL_PORT(fn, sfx) \ |
27 | PORT_GP_CFG_22(0, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ | 25 | PORT_GP_CFG_22(0, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ |
28 | PORT_GP_CFG_28(1, fn, sfx, CFG_FLAGS), \ | 26 | PORT_GP_28(1, fn, sfx), \ |
29 | PORT_GP_CFG_17(2, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ | 27 | PORT_GP_CFG_17(2, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ |
30 | PORT_GP_CFG_17(3, fn, sfx, CFG_FLAGS | SH_PFC_PIN_CFG_IO_VOLTAGE), \ | 28 | PORT_GP_CFG_17(3, fn, sfx, SH_PFC_PIN_CFG_IO_VOLTAGE), \ |
31 | PORT_GP_CFG_6(4, fn, sfx, CFG_FLAGS), \ | 29 | PORT_GP_6(4, fn, sfx), \ |
32 | PORT_GP_CFG_15(5, fn, sfx, CFG_FLAGS) | 30 | PORT_GP_15(5, fn, sfx) |
33 | /* | 31 | /* |
34 | * F_() : just information | 32 | * F_() : just information |
35 | * FM() : macro for FN_xxx / xxx_MARK | 33 | * FM() : macro for FN_xxx / xxx_MARK |