aboutsummaryrefslogtreecommitdiffstats
diff options
context:
space:
mode:
authorHongtao Jia <hongtao.jia@freescale.com>2015-11-24 01:52:47 -0500
committerScott Wood <scottwood@freescale.com>2015-12-23 23:21:11 -0500
commit3045e409e403b35ea4e30393a97cb913c745b38d (patch)
tree8b696ffc0d0b540f3a285462c87fcaf0cbdbbe8d
parentbe489a3936349c5f68c8001f31580d697c474b98 (diff)
powerpc/mpc85xx: Add TMU device tree support for T1023/T1024
Also add nodes and properties for thermal management support. Meanwhile preprocessor support is needed using thermal of framework. Signed-off-by: Jia Hongtao <hongtao.jia@freescale.com> Reviewed-by: Scott Wood <scottwood@freescale.com> Signed-off-by: Scott Wood <scottwood@freescale.com>
-rw-r--r--arch/powerpc/boot/dts/fsl/t1023rdb.dts2
-rw-r--r--arch/powerpc/boot/dts/fsl/t1023si-post.dtsi86
-rw-r--r--arch/powerpc/boot/dts/fsl/t1024qds.dts2
-rw-r--r--arch/powerpc/boot/dts/fsl/t1024rdb.dts2
-rw-r--r--arch/powerpc/boot/dts/fsl/t1024si-post.dtsi2
-rw-r--r--arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi2
6 files changed, 92 insertions, 4 deletions
diff --git a/arch/powerpc/boot/dts/fsl/t1023rdb.dts b/arch/powerpc/boot/dts/fsl/t1023rdb.dts
index 2b2fff4a12a2..6bd842beb1dc 100644
--- a/arch/powerpc/boot/dts/fsl/t1023rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1023rdb.dts
@@ -159,4 +159,4 @@
159 }; 159 };
160}; 160};
161 161
162/include/ "t1023si-post.dtsi" 162#include "t1023si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
index 518ddaa8da2d..99e421df79d4 100644
--- a/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1023si-post.dtsi
@@ -32,6 +32,8 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35#include <dt-bindings/thermal/thermal.h>
36
35&ifc { 37&ifc {
36 #address-cells = <2>; 38 #address-cells = <2>;
37 #size-cells = <1>; 39 #size-cells = <1>;
@@ -275,6 +277,90 @@
275 reg = <0xea000 0x4000>; 277 reg = <0xea000 0x4000>;
276 }; 278 };
277 279
280 tmu: tmu@f0000 {
281 compatible = "fsl,qoriq-tmu";
282 reg = <0xf0000 0x1000>;
283 interrupts = <18 2 0 0>;
284 fsl,tmu-range = <0xb0000 0xa0026 0x80048 0x30061>;
285 fsl,tmu-calibration = <0x00000000 0x0000000f
286 0x00000001 0x00000017
287 0x00000002 0x0000001e
288 0x00000003 0x00000026
289 0x00000004 0x0000002e
290 0x00000005 0x00000035
291 0x00000006 0x0000003d
292 0x00000007 0x00000044
293 0x00000008 0x0000004c
294 0x00000009 0x00000053
295 0x0000000a 0x0000005b
296 0x0000000b 0x00000064
297
298 0x00010000 0x00000011
299 0x00010001 0x0000001c
300 0x00010002 0x00000024
301 0x00010003 0x0000002b
302 0x00010004 0x00000034
303 0x00010005 0x00000039
304 0x00010006 0x00000042
305 0x00010007 0x0000004c
306 0x00010008 0x00000051
307 0x00010009 0x0000005a
308 0x0001000a 0x00000063
309
310 0x00020000 0x00000013
311 0x00020001 0x00000019
312 0x00020002 0x00000024
313 0x00020003 0x0000002c
314 0x00020004 0x00000035
315 0x00020005 0x0000003d
316 0x00020006 0x00000046
317 0x00020007 0x00000050
318 0x00020008 0x00000059
319
320 0x00030000 0x00000002
321 0x00030001 0x0000000d
322 0x00030002 0x00000019
323 0x00030003 0x00000024>;
324 #thermal-sensor-cells = <0>;
325 };
326
327 thermal-zones {
328 cpu_thermal: cpu-thermal {
329 polling-delay-passive = <1000>;
330 polling-delay = <5000>;
331
332 thermal-sensors = <&tmu>;
333
334 trips {
335 cpu_alert: cpu-alert {
336 temperature = <85000>;
337 hysteresis = <2000>;
338 type = "passive";
339 };
340 cpu_crit: cpu-crit {
341 temperature = <95000>;
342 hysteresis = <2000>;
343 type = "critical";
344 };
345 };
346
347 cooling-maps {
348 map0 {
349 trip = <&cpu_alert>;
350 cooling-device =
351 <&cpu0 THERMAL_NO_LIMIT
352 THERMAL_NO_LIMIT>;
353 };
354 map1 {
355 trip = <&cpu_alert>;
356 cooling-device =
357 <&cpu1 THERMAL_NO_LIMIT
358 THERMAL_NO_LIMIT>;
359 };
360 };
361 };
362 };
363
278 scfg: global-utilities@fc000 { 364 scfg: global-utilities@fc000 {
279 compatible = "fsl,t1023-scfg"; 365 compatible = "fsl,t1023-scfg";
280 reg = <0xfc000 0x1000>; 366 reg = <0xfc000 0x1000>;
diff --git a/arch/powerpc/boot/dts/fsl/t1024qds.dts b/arch/powerpc/boot/dts/fsl/t1024qds.dts
index 43cd5b50cd0a..6a3581b8e1f8 100644
--- a/arch/powerpc/boot/dts/fsl/t1024qds.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024qds.dts
@@ -248,4 +248,4 @@
248 }; 248 };
249}; 249};
250 250
251/include/ "t1024si-post.dtsi" 251#include "t1024si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1024rdb.dts b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
index 429d8c73650a..0ccc7d03335e 100644
--- a/arch/powerpc/boot/dts/fsl/t1024rdb.dts
+++ b/arch/powerpc/boot/dts/fsl/t1024rdb.dts
@@ -188,4 +188,4 @@
188 }; 188 };
189}; 189};
190 190
191/include/ "t1024si-post.dtsi" 191#include "t1024si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi b/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
index 95e3af8d768e..bb480346a58d 100644
--- a/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t1024si-post.dtsi
@@ -32,7 +32,7 @@
32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 */ 33 */
34 34
35/include/ "t1023si-post.dtsi" 35#include "t1023si-post.dtsi"
36 36
37/ { 37/ {
38 aliases { 38 aliases {
diff --git a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
index 3e1528abf3f4..9d08a363bab3 100644
--- a/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/t102xsi-pre.dtsi
@@ -76,6 +76,7 @@
76 reg = <0>; 76 reg = <0>;
77 clocks = <&mux0>; 77 clocks = <&mux0>;
78 next-level-cache = <&L2_1>; 78 next-level-cache = <&L2_1>;
79 #cooling-cells = <2>;
79 L2_1: l2-cache { 80 L2_1: l2-cache {
80 next-level-cache = <&cpc>; 81 next-level-cache = <&cpc>;
81 }; 82 };
@@ -85,6 +86,7 @@
85 reg = <1>; 86 reg = <1>;
86 clocks = <&mux1>; 87 clocks = <&mux1>;
87 next-level-cache = <&L2_2>; 88 next-level-cache = <&L2_2>;
89 #cooling-cells = <2>;
88 L2_2: l2-cache { 90 L2_2: l2-cache {
89 next-level-cache = <&cpc>; 91 next-level-cache = <&cpc>;
90 }; 92 };