diff options
author | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-07 08:49:24 -0500 |
---|---|---|
committer | Daniel Vetter <daniel.vetter@ffwll.ch> | 2013-11-08 12:10:11 -0500 |
commit | 30100f2bea6b07940ce3ed777c0c7c1544ea4a15 (patch) | |
tree | 55a6c32118ed3d20994abb6d84d740bc25d83340 | |
parent | c42664cceb368ee04848e23a9964afd953a9145c (diff) |
drm/i915: Fix up the bdw pipe interrupt enable lists
- Pipe underrun can't just be enabled, we need some support code like
on ilk-hsw to make this happen. So drop it for now.
- CRC error is a special mode of the CRC hardware that we don't use,
so again drop it. Real CRC support for bdw will be added later.
- All the other error bits are about faults, so rename the #define and
adjust the output.
v2: Use pipe_name as pointed out by Ville. Ville's comment was on a
previous patch, but it was easier to squash in here.
Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
-rw-r--r-- | drivers/gpu/drm/i915/i915_irq.c | 10 | ||||
-rw-r--r-- | drivers/gpu/drm/i915/i915_reg.h | 9 |
2 files changed, 10 insertions, 9 deletions
diff --git a/drivers/gpu/drm/i915/i915_irq.c b/drivers/gpu/drm/i915/i915_irq.c index c04fbbf0acf7..e1bfc85d1789 100644 --- a/drivers/gpu/drm/i915/i915_irq.c +++ b/drivers/gpu/drm/i915/i915_irq.c | |||
@@ -1793,8 +1793,11 @@ static irqreturn_t gen8_irq_handler(int irq, void *arg) | |||
1793 | intel_finish_page_flip_plane(dev, pipe); | 1793 | intel_finish_page_flip_plane(dev, pipe); |
1794 | } | 1794 | } |
1795 | 1795 | ||
1796 | if (pipe_iir & GEN8_DE_PIPE_IRQ_ERRORS) | 1796 | if (pipe_iir & GEN8_DE_PIPE_IRQ_FAULT_ERRORS) { |
1797 | DRM_ERROR("Errors on pipe %c\n", 'A' + pipe); | 1797 | DRM_ERROR("Fault errors on pipe %c\n: 0x%08x", |
1798 | pipe_name(pipe), | ||
1799 | pipe_iir & GEN8_DE_PIPE_IRQ_FAULT_ERRORS); | ||
1800 | } | ||
1798 | 1801 | ||
1799 | if (pipe_iir) { | 1802 | if (pipe_iir) { |
1800 | ret = IRQ_HANDLED; | 1803 | ret = IRQ_HANDLED; |
@@ -2863,9 +2866,8 @@ static void gen8_de_irq_postinstall(struct drm_i915_private *dev_priv) | |||
2863 | { | 2866 | { |
2864 | struct drm_device *dev = dev_priv->dev; | 2867 | struct drm_device *dev = dev_priv->dev; |
2865 | uint32_t de_pipe_enables = GEN8_PIPE_FLIP_DONE | | 2868 | uint32_t de_pipe_enables = GEN8_PIPE_FLIP_DONE | |
2866 | GEN8_PIPE_SCAN_LINE_EVENT | | ||
2867 | GEN8_PIPE_VBLANK | | 2869 | GEN8_PIPE_VBLANK | |
2868 | GEN8_DE_PIPE_IRQ_ERRORS; | 2870 | GEN8_DE_PIPE_IRQ_FAULT_ERRORS; |
2869 | int pipe; | 2871 | int pipe; |
2870 | dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_enables; | 2872 | dev_priv->de_irq_mask[PIPE_A] = ~de_pipe_enables; |
2871 | dev_priv->de_irq_mask[PIPE_B] = ~de_pipe_enables; | 2873 | dev_priv->de_irq_mask[PIPE_B] = ~de_pipe_enables; |
diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index f150edaa64ca..9e7588345017 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h | |||
@@ -4064,11 +4064,10 @@ | |||
4064 | #define GEN8_PIPE_SCAN_LINE_EVENT (1 << 2) | 4064 | #define GEN8_PIPE_SCAN_LINE_EVENT (1 << 2) |
4065 | #define GEN8_PIPE_VSYNC (1 << 1) | 4065 | #define GEN8_PIPE_VSYNC (1 << 1) |
4066 | #define GEN8_PIPE_VBLANK (1 << 0) | 4066 | #define GEN8_PIPE_VBLANK (1 << 0) |
4067 | #define GEN8_DE_PIPE_IRQ_ERRORS (GEN8_PIPE_UNDERRUN | \ | 4067 | #define GEN8_DE_PIPE_IRQ_FAULT_ERRORS \ |
4068 | GEN8_PIPE_CDCLK_CRC_ERROR | \ | 4068 | (GEN8_PIPE_CURSOR_FAULT | \ |
4069 | GEN8_PIPE_CURSOR_FAULT | \ | 4069 | GEN8_PIPE_SPRITE_FAULT | \ |
4070 | GEN8_PIPE_SPRITE_FAULT | \ | 4070 | GEN8_PIPE_PRIMARY_FAULT) |
4071 | GEN8_PIPE_PRIMARY_FAULT) | ||
4072 | 4071 | ||
4073 | #define GEN8_DE_PORT_ISR 0x44440 | 4072 | #define GEN8_DE_PORT_ISR 0x44440 |
4074 | #define GEN8_DE_PORT_IMR 0x44444 | 4073 | #define GEN8_DE_PORT_IMR 0x44444 |