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authorChristian König <christian.koenig@amd.com>2019-05-06 07:22:06 -0400
committerAlex Deucher <alexander.deucher@amd.com>2019-05-24 13:20:48 -0400
commit2fbd6f94accdbb223acccada68940b50b0c668d9 (patch)
treefb50704ac78f04d0131de3bb54d4122ad645e53f
parent9b6eb00dbdaee49ba35569e3c72fbb05734610e3 (diff)
drm/amdgpu: rename amdgpu_prime.[ch] into amdgpu_dma_buf.[ch]
We are getting a dma-buf implementation completely separate from drm prime, so rename the files now and cleanup the code a bit. No functional change. Signed-off-by: Christian König <christian.koenig@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
-rw-r--r--drivers/gpu/drm/amd/amdgpu/Makefile2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c1
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c1
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c (renamed from drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c)131
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.h46
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c2
-rw-r--r--drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h16
7 files changed, 116 insertions, 83 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/Makefile b/drivers/gpu/drm/amd/amdgpu/Makefile
index fdd0ca4b0f0b..9ca3b4b261b5 100644
--- a/drivers/gpu/drm/amd/amdgpu/Makefile
+++ b/drivers/gpu/drm/amd/amdgpu/Makefile
@@ -49,7 +49,7 @@ amdgpu-y += amdgpu_device.o amdgpu_kms.o \
49 amdgpu_cs.o amdgpu_bios.o amdgpu_benchmark.o amdgpu_test.o \ 49 amdgpu_cs.o amdgpu_bios.o amdgpu_benchmark.o amdgpu_test.o \
50 amdgpu_pm.o atombios_dp.o amdgpu_afmt.o amdgpu_trace_points.o \ 50 amdgpu_pm.o atombios_dp.o amdgpu_afmt.o amdgpu_trace_points.o \
51 atombios_encoders.o amdgpu_sa.o atombios_i2c.o \ 51 atombios_encoders.o amdgpu_sa.o atombios_i2c.o \
52 amdgpu_prime.o amdgpu_vm.o amdgpu_ib.o amdgpu_pll.o \ 52 amdgpu_dma_buf.o amdgpu_vm.o amdgpu_ib.o amdgpu_pll.o \
53 amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \ 53 amdgpu_ucode.o amdgpu_bo_list.o amdgpu_ctx.o amdgpu_sync.o \
54 amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o amdgpu_atomfirmware.o \ 54 amdgpu_gtt_mgr.o amdgpu_vram_mgr.o amdgpu_virt.o amdgpu_atomfirmware.o \
55 amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \ 55 amdgpu_vf_error.o amdgpu_sched.o amdgpu_debugfs.o amdgpu_ids.o \
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
index 2e2a2617134b..98326e3b5619 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd.c
@@ -25,6 +25,7 @@
25#include <drm/drmP.h> 25#include <drm/drmP.h>
26#include "amdgpu.h" 26#include "amdgpu.h"
27#include "amdgpu_gfx.h" 27#include "amdgpu_gfx.h"
28#include "amdgpu_dma_buf.h"
28#include <linux/module.h> 29#include <linux/module.h>
29#include <linux/dma-buf.h> 30#include <linux/dma-buf.h>
30#include "amdgpu_xgmi.h" 31#include "amdgpu_xgmi.h"
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
index d39cb36b4830..5b4fff9a1509 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_amdkfd_gpuvm.c
@@ -30,6 +30,7 @@
30#include "amdgpu_object.h" 30#include "amdgpu_object.h"
31#include "amdgpu_vm.h" 31#include "amdgpu_vm.h"
32#include "amdgpu_amdkfd.h" 32#include "amdgpu_amdkfd.h"
33#include "amdgpu_dma_buf.h"
33 34
34/* Special VM and GART address alignment needed for VI pre-Fiji due to 35/* Special VM and GART address alignment needed for VI pre-Fiji due to
35 * a HW bug. 36 * a HW bug.
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
index a38e0fb4a6fe..4711cf1b5bd2 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_prime.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright 2012 Advanced Micro Devices, Inc. 2 * Copyright 2019 Advanced Micro Devices, Inc.
3 * 3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a 4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"), 5 * copy of this software and associated documentation files (the "Software"),
@@ -103,7 +103,8 @@ void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr)
103 * Returns: 103 * Returns:
104 * 0 on success or a negative error code on failure. 104 * 0 on success or a negative error code on failure.
105 */ 105 */
106int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma) 106int amdgpu_gem_prime_mmap(struct drm_gem_object *obj,
107 struct vm_area_struct *vma)
107{ 108{
108 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj); 109 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
109 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); 110 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
@@ -137,57 +138,6 @@ int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma
137 return ret; 138 return ret;
138} 139}
139 140
140/**
141 * amdgpu_gem_prime_import_sg_table - &drm_driver.gem_prime_import_sg_table
142 * implementation
143 * @dev: DRM device
144 * @attach: DMA-buf attachment
145 * @sg: Scatter/gather table
146 *
147 * Imports shared DMA buffer memory exported by another device.
148 *
149 * Returns:
150 * A new GEM BO of the given DRM device, representing the memory
151 * described by the given DMA-buf attachment and scatter/gather table.
152 */
153struct drm_gem_object *
154amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
155 struct dma_buf_attachment *attach,
156 struct sg_table *sg)
157{
158 struct reservation_object *resv = attach->dmabuf->resv;
159 struct amdgpu_device *adev = dev->dev_private;
160 struct amdgpu_bo *bo;
161 struct amdgpu_bo_param bp;
162 int ret;
163
164 memset(&bp, 0, sizeof(bp));
165 bp.size = attach->dmabuf->size;
166 bp.byte_align = PAGE_SIZE;
167 bp.domain = AMDGPU_GEM_DOMAIN_CPU;
168 bp.flags = 0;
169 bp.type = ttm_bo_type_sg;
170 bp.resv = resv;
171 ww_mutex_lock(&resv->lock, NULL);
172 ret = amdgpu_bo_create(adev, &bp, &bo);
173 if (ret)
174 goto error;
175
176 bo->tbo.sg = sg;
177 bo->tbo.ttm->sg = sg;
178 bo->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
179 bo->preferred_domains = AMDGPU_GEM_DOMAIN_GTT;
180 if (attach->dmabuf->ops != &amdgpu_dmabuf_ops)
181 bo->prime_shared_count = 1;
182
183 ww_mutex_unlock(&resv->lock);
184 return &bo->gem_base;
185
186error:
187 ww_mutex_unlock(&resv->lock);
188 return ERR_PTR(ret);
189}
190
191static int 141static int
192__reservation_object_make_exclusive(struct reservation_object *obj) 142__reservation_object_make_exclusive(struct reservation_object *obj)
193{ 143{
@@ -231,7 +181,7 @@ err_fences_put:
231} 181}
232 182
233/** 183/**
234 * amdgpu_gem_map_attach - &dma_buf_ops.attach implementation 184 * amdgpu_dma_buf_map_attach - &dma_buf_ops.attach implementation
235 * @dma_buf: Shared DMA buffer 185 * @dma_buf: Shared DMA buffer
236 * @attach: DMA-buf attachment 186 * @attach: DMA-buf attachment
237 * 187 *
@@ -242,8 +192,8 @@ err_fences_put:
242 * Returns: 192 * Returns:
243 * 0 on success or a negative error code on failure. 193 * 0 on success or a negative error code on failure.
244 */ 194 */
245static int amdgpu_gem_map_attach(struct dma_buf *dma_buf, 195static int amdgpu_dma_buf_map_attach(struct dma_buf *dma_buf,
246 struct dma_buf_attachment *attach) 196 struct dma_buf_attachment *attach)
247{ 197{
248 struct drm_gem_object *obj = dma_buf->priv; 198 struct drm_gem_object *obj = dma_buf->priv;
249 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj); 199 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
@@ -291,15 +241,15 @@ error_detach:
291} 241}
292 242
293/** 243/**
294 * amdgpu_gem_map_detach - &dma_buf_ops.detach implementation 244 * amdgpu_dma_buf_map_detach - &dma_buf_ops.detach implementation
295 * @dma_buf: Shared DMA buffer 245 * @dma_buf: Shared DMA buffer
296 * @attach: DMA-buf attachment 246 * @attach: DMA-buf attachment
297 * 247 *
298 * This is called when a shared DMA buffer no longer needs to be accessible by 248 * This is called when a shared DMA buffer no longer needs to be accessible by
299 * another device. For now, simply unpins the buffer from GTT. 249 * another device. For now, simply unpins the buffer from GTT.
300 */ 250 */
301static void amdgpu_gem_map_detach(struct dma_buf *dma_buf, 251static void amdgpu_dma_buf_map_detach(struct dma_buf *dma_buf,
302 struct dma_buf_attachment *attach) 252 struct dma_buf_attachment *attach)
303{ 253{
304 struct drm_gem_object *obj = dma_buf->priv; 254 struct drm_gem_object *obj = dma_buf->priv;
305 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj); 255 struct amdgpu_bo *bo = gem_to_amdgpu_bo(obj);
@@ -334,7 +284,7 @@ struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
334} 284}
335 285
336/** 286/**
337 * amdgpu_gem_begin_cpu_access - &dma_buf_ops.begin_cpu_access implementation 287 * amdgpu_dma_buf_begin_cpu_access - &dma_buf_ops.begin_cpu_access implementation
338 * @dma_buf: Shared DMA buffer 288 * @dma_buf: Shared DMA buffer
339 * @direction: Direction of DMA transfer 289 * @direction: Direction of DMA transfer
340 * 290 *
@@ -345,8 +295,8 @@ struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *obj)
345 * Returns: 295 * Returns:
346 * 0 on success or a negative error code on failure. 296 * 0 on success or a negative error code on failure.
347 */ 297 */
348static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf, 298static int amdgpu_dma_buf_begin_cpu_access(struct dma_buf *dma_buf,
349 enum dma_data_direction direction) 299 enum dma_data_direction direction)
350{ 300{
351 struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv); 301 struct amdgpu_bo *bo = gem_to_amdgpu_bo(dma_buf->priv);
352 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev); 302 struct amdgpu_device *adev = amdgpu_ttm_adev(bo->tbo.bdev);
@@ -374,12 +324,12 @@ static int amdgpu_gem_begin_cpu_access(struct dma_buf *dma_buf,
374} 324}
375 325
376const struct dma_buf_ops amdgpu_dmabuf_ops = { 326const struct dma_buf_ops amdgpu_dmabuf_ops = {
377 .attach = amdgpu_gem_map_attach, 327 .attach = amdgpu_dma_buf_map_attach,
378 .detach = amdgpu_gem_map_detach, 328 .detach = amdgpu_dma_buf_map_detach,
379 .map_dma_buf = drm_gem_map_dma_buf, 329 .map_dma_buf = drm_gem_map_dma_buf,
380 .unmap_dma_buf = drm_gem_unmap_dma_buf, 330 .unmap_dma_buf = drm_gem_unmap_dma_buf,
381 .release = drm_gem_dmabuf_release, 331 .release = drm_gem_dmabuf_release,
382 .begin_cpu_access = amdgpu_gem_begin_cpu_access, 332 .begin_cpu_access = amdgpu_dma_buf_begin_cpu_access,
383 .mmap = drm_gem_dmabuf_mmap, 333 .mmap = drm_gem_dmabuf_mmap,
384 .vmap = drm_gem_dmabuf_vmap, 334 .vmap = drm_gem_dmabuf_vmap,
385 .vunmap = drm_gem_dmabuf_vunmap, 335 .vunmap = drm_gem_dmabuf_vunmap,
@@ -418,6 +368,57 @@ struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
418} 368}
419 369
420/** 370/**
371 * amdgpu_gem_prime_import_sg_table - &drm_driver.gem_prime_import_sg_table
372 * implementation
373 * @dev: DRM device
374 * @attach: DMA-buf attachment
375 * @sg: Scatter/gather table
376 *
377 * Imports shared DMA buffer memory exported by another device.
378 *
379 * Returns:
380 * A new GEM BO of the given DRM device, representing the memory
381 * described by the given DMA-buf attachment and scatter/gather table.
382 */
383struct drm_gem_object *
384amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
385 struct dma_buf_attachment *attach,
386 struct sg_table *sg)
387{
388 struct reservation_object *resv = attach->dmabuf->resv;
389 struct amdgpu_device *adev = dev->dev_private;
390 struct amdgpu_bo *bo;
391 struct amdgpu_bo_param bp;
392 int ret;
393
394 memset(&bp, 0, sizeof(bp));
395 bp.size = attach->dmabuf->size;
396 bp.byte_align = PAGE_SIZE;
397 bp.domain = AMDGPU_GEM_DOMAIN_CPU;
398 bp.flags = 0;
399 bp.type = ttm_bo_type_sg;
400 bp.resv = resv;
401 ww_mutex_lock(&resv->lock, NULL);
402 ret = amdgpu_bo_create(adev, &bp, &bo);
403 if (ret)
404 goto error;
405
406 bo->tbo.sg = sg;
407 bo->tbo.ttm->sg = sg;
408 bo->allowed_domains = AMDGPU_GEM_DOMAIN_GTT;
409 bo->preferred_domains = AMDGPU_GEM_DOMAIN_GTT;
410 if (attach->dmabuf->ops != &amdgpu_dmabuf_ops)
411 bo->prime_shared_count = 1;
412
413 ww_mutex_unlock(&resv->lock);
414 return &bo->gem_base;
415
416error:
417 ww_mutex_unlock(&resv->lock);
418 return ERR_PTR(ret);
419}
420
421/**
421 * amdgpu_gem_prime_import - &drm_driver.gem_prime_import implementation 422 * amdgpu_gem_prime_import - &drm_driver.gem_prime_import implementation
422 * @dev: DRM device 423 * @dev: DRM device
423 * @dma_buf: Shared DMA buffer 424 * @dma_buf: Shared DMA buffer
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.h
new file mode 100644
index 000000000000..c7056cbe8685
--- /dev/null
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_dma_buf.h
@@ -0,0 +1,46 @@
1/*
2 * Copyright 2019 Advanced Micro Devices, Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
10 *
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
13 *
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
20 * OTHER DEALINGS IN THE SOFTWARE.
21 *
22 */
23#ifndef __AMDGPU_DMA_BUF_H__
24#define __AMDGPU_DMA_BUF_H__
25
26#include <drm/drm_gem.h>
27
28struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
29struct drm_gem_object *
30amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
31 struct dma_buf_attachment *attach,
32 struct sg_table *sg);
33struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
34 struct drm_gem_object *gobj,
35 int flags);
36struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
37 struct dma_buf *dma_buf);
38struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
39void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj);
40void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
41int amdgpu_gem_prime_mmap(struct drm_gem_object *obj,
42 struct vm_area_struct *vma);
43
44extern const struct dma_buf_ops amdgpu_dmabuf_ops;
45
46#endif
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
index 5924d89e0aee..8fd8807272a7 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_drv.c
@@ -36,7 +36,7 @@
36 36
37#include "amdgpu.h" 37#include "amdgpu.h"
38#include "amdgpu_irq.h" 38#include "amdgpu_irq.h"
39#include "amdgpu_gem.h" 39#include "amdgpu_dma_buf.h"
40 40
41#include "amdgpu_amdkfd.h" 41#include "amdgpu_amdkfd.h"
42 42
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h
index f1ddfc50bcc7..b8ba6e27c61f 100644
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_gem.h
@@ -39,22 +39,6 @@ int amdgpu_gem_object_open(struct drm_gem_object *obj,
39void amdgpu_gem_object_close(struct drm_gem_object *obj, 39void amdgpu_gem_object_close(struct drm_gem_object *obj,
40 struct drm_file *file_priv); 40 struct drm_file *file_priv);
41unsigned long amdgpu_gem_timeout(uint64_t timeout_ns); 41unsigned long amdgpu_gem_timeout(uint64_t timeout_ns);
42struct sg_table *amdgpu_gem_prime_get_sg_table(struct drm_gem_object *obj);
43struct drm_gem_object *
44amdgpu_gem_prime_import_sg_table(struct drm_device *dev,
45 struct dma_buf_attachment *attach,
46 struct sg_table *sg);
47struct dma_buf *amdgpu_gem_prime_export(struct drm_device *dev,
48 struct drm_gem_object *gobj,
49 int flags);
50struct drm_gem_object *amdgpu_gem_prime_import(struct drm_device *dev,
51 struct dma_buf *dma_buf);
52struct reservation_object *amdgpu_gem_prime_res_obj(struct drm_gem_object *);
53void *amdgpu_gem_prime_vmap(struct drm_gem_object *obj);
54void amdgpu_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
55int amdgpu_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
56
57extern const struct dma_buf_ops amdgpu_dmabuf_ops;
58 42
59/* 43/*
60 * GEM objects. 44 * GEM objects.