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| author | Dave Airlie <airlied@redhat.com> | 2016-03-31 23:13:34 -0400 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2016-03-31 23:13:34 -0400 |
| commit | 2f4fcb3eafd7e5d3e12f7e74093d2e8c43ef5eb6 (patch) | |
| tree | 38bfb3ba3e586587c73fc24d2d19c67205ef98b7 | |
| parent | c05c2ec96bb8b7310da1055c7b9d786a3ec6dc0c (diff) | |
| parent | 104ece975746d94b8276cd7f38d6b5c056d700b5 (diff) | |
Merge branch 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux into drm-fixes
Just a few fixes for 4.6 this week:
- Add some SI DPM quirks
- Improve the ACP Kconfig text
- Additional BO pinning checks
* 'drm-next-4.6' of git://people.freedesktop.org/~agd5f/linux:
drm/amdgpu: Don't move pinned BOs
drm/radeon: Don't move pinned BOs
drm/radeon: add a dpm quirk for all R7 370 parts
drm/radeon: add another R7 370 quirk
drm/radeon: add a dpm quirk for sapphire Dual-X R7 370 2G D5
drm/amd: Beef up ACP Kconfig menu text
| -rw-r--r-- | drivers/gpu/drm/amd/acp/Kconfig | 8 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_object.c | 4 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/radeon_ttm.c | 6 | ||||
| -rw-r--r-- | drivers/gpu/drm/radeon/si_dpm.c | 6 |
6 files changed, 32 insertions, 2 deletions
diff --git a/drivers/gpu/drm/amd/acp/Kconfig b/drivers/gpu/drm/amd/acp/Kconfig index 0f734ee05274..ca77ec10147c 100644 --- a/drivers/gpu/drm/amd/acp/Kconfig +++ b/drivers/gpu/drm/amd/acp/Kconfig | |||
| @@ -1,10 +1,14 @@ | |||
| 1 | menu "ACP Configuration" | 1 | menu "ACP (Audio CoProcessor) Configuration" |
| 2 | 2 | ||
| 3 | config DRM_AMD_ACP | 3 | config DRM_AMD_ACP |
| 4 | bool "Enable ACP IP support" | 4 | bool "Enable AMD Audio CoProcessor IP support" |
| 5 | select MFD_CORE | 5 | select MFD_CORE |
| 6 | select PM_GENERIC_DOMAINS if PM | 6 | select PM_GENERIC_DOMAINS if PM |
| 7 | help | 7 | help |
| 8 | Choose this option to enable ACP IP support for AMD SOCs. | 8 | Choose this option to enable ACP IP support for AMD SOCs. |
| 9 | This adds the ACP (Audio CoProcessor) IP driver and wires | ||
| 10 | it up into the amdgpu driver. The ACP block provides the DMA | ||
| 11 | engine for the i2s-based ALSA driver. It is required for audio | ||
| 12 | on APUs which utilize an i2s codec. | ||
| 9 | 13 | ||
| 10 | endmenu | 14 | endmenu |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c index 151a2d42c639..56d1458393cc 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_object.c | |||
| @@ -608,6 +608,10 @@ int amdgpu_bo_fault_reserve_notify(struct ttm_buffer_object *bo) | |||
| 608 | if ((offset + size) <= adev->mc.visible_vram_size) | 608 | if ((offset + size) <= adev->mc.visible_vram_size) |
| 609 | return 0; | 609 | return 0; |
| 610 | 610 | ||
| 611 | /* Can't move a pinned BO to visible VRAM */ | ||
| 612 | if (abo->pin_count > 0) | ||
| 613 | return -EINVAL; | ||
| 614 | |||
| 611 | /* hurrah the memory is not visible ! */ | 615 | /* hurrah the memory is not visible ! */ |
| 612 | amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_VRAM); | 616 | amdgpu_ttm_placement_from_domain(abo, AMDGPU_GEM_DOMAIN_VRAM); |
| 613 | lpfn = adev->mc.visible_vram_size >> PAGE_SHIFT; | 617 | lpfn = adev->mc.visible_vram_size >> PAGE_SHIFT; |
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c index ab34190859a8..f1a55d1888cb 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_ttm.c | |||
| @@ -384,9 +384,15 @@ static int amdgpu_bo_move(struct ttm_buffer_object *bo, | |||
| 384 | struct ttm_mem_reg *new_mem) | 384 | struct ttm_mem_reg *new_mem) |
| 385 | { | 385 | { |
| 386 | struct amdgpu_device *adev; | 386 | struct amdgpu_device *adev; |
| 387 | struct amdgpu_bo *abo; | ||
| 387 | struct ttm_mem_reg *old_mem = &bo->mem; | 388 | struct ttm_mem_reg *old_mem = &bo->mem; |
| 388 | int r; | 389 | int r; |
| 389 | 390 | ||
| 391 | /* Can't move a pinned BO */ | ||
| 392 | abo = container_of(bo, struct amdgpu_bo, tbo); | ||
| 393 | if (WARN_ON_ONCE(abo->pin_count > 0)) | ||
| 394 | return -EINVAL; | ||
| 395 | |||
| 390 | adev = amdgpu_get_adev(bo->bdev); | 396 | adev = amdgpu_get_adev(bo->bdev); |
| 391 | if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { | 397 | if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { |
| 392 | amdgpu_move_null(bo, new_mem); | 398 | amdgpu_move_null(bo, new_mem); |
diff --git a/drivers/gpu/drm/radeon/radeon_object.c b/drivers/gpu/drm/radeon/radeon_object.c index dd46c38676db..2d901bf28a94 100644 --- a/drivers/gpu/drm/radeon/radeon_object.c +++ b/drivers/gpu/drm/radeon/radeon_object.c | |||
| @@ -799,6 +799,10 @@ int radeon_bo_fault_reserve_notify(struct ttm_buffer_object *bo) | |||
| 799 | if ((offset + size) <= rdev->mc.visible_vram_size) | 799 | if ((offset + size) <= rdev->mc.visible_vram_size) |
| 800 | return 0; | 800 | return 0; |
| 801 | 801 | ||
| 802 | /* Can't move a pinned BO to visible VRAM */ | ||
| 803 | if (rbo->pin_count > 0) | ||
| 804 | return -EINVAL; | ||
| 805 | |||
| 802 | /* hurrah the memory is not visible ! */ | 806 | /* hurrah the memory is not visible ! */ |
| 803 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM); | 807 | radeon_ttm_placement_from_domain(rbo, RADEON_GEM_DOMAIN_VRAM); |
| 804 | lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT; | 808 | lpfn = rdev->mc.visible_vram_size >> PAGE_SHIFT; |
diff --git a/drivers/gpu/drm/radeon/radeon_ttm.c b/drivers/gpu/drm/radeon/radeon_ttm.c index 6d8c32377c6f..c008312e1bcd 100644 --- a/drivers/gpu/drm/radeon/radeon_ttm.c +++ b/drivers/gpu/drm/radeon/radeon_ttm.c | |||
| @@ -397,9 +397,15 @@ static int radeon_bo_move(struct ttm_buffer_object *bo, | |||
| 397 | struct ttm_mem_reg *new_mem) | 397 | struct ttm_mem_reg *new_mem) |
| 398 | { | 398 | { |
| 399 | struct radeon_device *rdev; | 399 | struct radeon_device *rdev; |
| 400 | struct radeon_bo *rbo; | ||
| 400 | struct ttm_mem_reg *old_mem = &bo->mem; | 401 | struct ttm_mem_reg *old_mem = &bo->mem; |
| 401 | int r; | 402 | int r; |
| 402 | 403 | ||
| 404 | /* Can't move a pinned BO */ | ||
| 405 | rbo = container_of(bo, struct radeon_bo, tbo); | ||
| 406 | if (WARN_ON_ONCE(rbo->pin_count > 0)) | ||
| 407 | return -EINVAL; | ||
| 408 | |||
| 403 | rdev = radeon_get_rdev(bo->bdev); | 409 | rdev = radeon_get_rdev(bo->bdev); |
| 404 | if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { | 410 | if (old_mem->mem_type == TTM_PL_SYSTEM && bo->ttm == NULL) { |
| 405 | radeon_move_null(bo, new_mem); | 411 | radeon_move_null(bo, new_mem); |
diff --git a/drivers/gpu/drm/radeon/si_dpm.c b/drivers/gpu/drm/radeon/si_dpm.c index cb75ab72098a..af4df81c4e0c 100644 --- a/drivers/gpu/drm/radeon/si_dpm.c +++ b/drivers/gpu/drm/radeon/si_dpm.c | |||
| @@ -2926,9 +2926,11 @@ static struct si_dpm_quirk si_dpm_quirk_list[] = { | |||
| 2926 | /* PITCAIRN - https://bugs.freedesktop.org/show_bug.cgi?id=76490 */ | 2926 | /* PITCAIRN - https://bugs.freedesktop.org/show_bug.cgi?id=76490 */ |
| 2927 | { PCI_VENDOR_ID_ATI, 0x6810, 0x1462, 0x3036, 0, 120000 }, | 2927 | { PCI_VENDOR_ID_ATI, 0x6810, 0x1462, 0x3036, 0, 120000 }, |
| 2928 | { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0xe271, 0, 120000 }, | 2928 | { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0xe271, 0, 120000 }, |
| 2929 | { PCI_VENDOR_ID_ATI, 0x6811, 0x174b, 0x2015, 0, 120000 }, | ||
| 2929 | { PCI_VENDOR_ID_ATI, 0x6810, 0x174b, 0xe271, 85000, 90000 }, | 2930 | { PCI_VENDOR_ID_ATI, 0x6810, 0x174b, 0xe271, 85000, 90000 }, |
| 2930 | { PCI_VENDOR_ID_ATI, 0x6811, 0x1462, 0x2015, 0, 120000 }, | 2931 | { PCI_VENDOR_ID_ATI, 0x6811, 0x1462, 0x2015, 0, 120000 }, |
| 2931 | { PCI_VENDOR_ID_ATI, 0x6811, 0x1043, 0x2015, 0, 120000 }, | 2932 | { PCI_VENDOR_ID_ATI, 0x6811, 0x1043, 0x2015, 0, 120000 }, |
| 2933 | { PCI_VENDOR_ID_ATI, 0x6811, 0x148c, 0x2015, 0, 120000 }, | ||
| 2932 | { 0, 0, 0, 0 }, | 2934 | { 0, 0, 0, 0 }, |
| 2933 | }; | 2935 | }; |
| 2934 | 2936 | ||
| @@ -3008,6 +3010,10 @@ static void si_apply_state_adjust_rules(struct radeon_device *rdev, | |||
| 3008 | } | 3010 | } |
| 3009 | ++p; | 3011 | ++p; |
| 3010 | } | 3012 | } |
| 3013 | /* limit mclk on all R7 370 parts for stability */ | ||
| 3014 | if (rdev->pdev->device == 0x6811 && | ||
| 3015 | rdev->pdev->revision == 0x81) | ||
| 3016 | max_mclk = 120000; | ||
| 3011 | 3017 | ||
| 3012 | if (rps->vce_active) { | 3018 | if (rps->vce_active) { |
| 3013 | rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; | 3019 | rps->evclk = rdev->pm.dpm.vce_states[rdev->pm.dpm.vce_level].evclk; |
